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62c476c7 BAY |
1 | /* |
2 | * Copyright (c) 2006, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
15 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
16 | * | |
17 | * Copyright (C) 2006-2008 Intel Corporation | |
18 | * Copyright IBM Corporation, 2008 | |
221d059d AK |
19 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. |
20 | * | |
62c476c7 BAY |
21 | * Author: Allen M. Kay <allen.m.kay@intel.com> |
22 | * Author: Weidong Han <weidong.han@intel.com> | |
23 | * Author: Ben-Ami Yassour <benami@il.ibm.com> | |
24 | */ | |
25 | ||
26 | #include <linux/list.h> | |
27 | #include <linux/kvm_host.h> | |
51441d43 | 28 | #include <linux/module.h> |
62c476c7 | 29 | #include <linux/pci.h> |
799fd8b2 | 30 | #include <linux/stat.h> |
62c476c7 | 31 | #include <linux/dmar.h> |
19de40a8 | 32 | #include <linux/iommu.h> |
62c476c7 BAY |
33 | #include <linux/intel-iommu.h> |
34 | ||
90ab5ee9 | 35 | static bool allow_unsafe_assigned_interrupts; |
3f68b031 AW |
36 | module_param_named(allow_unsafe_assigned_interrupts, |
37 | allow_unsafe_assigned_interrupts, bool, S_IRUGO | S_IWUSR); | |
38 | MODULE_PARM_DESC(allow_unsafe_assigned_interrupts, | |
39 | "Enable device assignment on platforms without interrupt remapping support."); | |
40 | ||
62c476c7 BAY |
41 | static int kvm_iommu_unmap_memslots(struct kvm *kvm); |
42 | static void kvm_iommu_put_pages(struct kvm *kvm, | |
43 | gfn_t base_gfn, unsigned long npages); | |
44 | ||
d5661048 | 45 | static pfn_t kvm_pin_pages(struct kvm_memory_slot *slot, gfn_t gfn, |
3d32e4db | 46 | unsigned long npages) |
fcd95807 JR |
47 | { |
48 | gfn_t end_gfn; | |
49 | pfn_t pfn; | |
50 | ||
d5661048 | 51 | pfn = gfn_to_pfn_memslot(slot, gfn); |
3d32e4db | 52 | end_gfn = gfn + npages; |
fcd95807 JR |
53 | gfn += 1; |
54 | ||
81c52c56 | 55 | if (is_error_noslot_pfn(pfn)) |
fcd95807 JR |
56 | return pfn; |
57 | ||
58 | while (gfn < end_gfn) | |
d5661048 | 59 | gfn_to_pfn_memslot(slot, gfn++); |
fcd95807 JR |
60 | |
61 | return pfn; | |
62 | } | |
63 | ||
350b8bdd MT |
64 | static void kvm_unpin_pages(struct kvm *kvm, pfn_t pfn, unsigned long npages) |
65 | { | |
66 | unsigned long i; | |
67 | ||
68 | for (i = 0; i < npages; ++i) | |
69 | kvm_release_pfn_clean(pfn + i); | |
70 | } | |
71 | ||
3ad26d81 | 72 | int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot) |
62c476c7 | 73 | { |
fcd95807 | 74 | gfn_t gfn, end_gfn; |
62c476c7 | 75 | pfn_t pfn; |
fcd95807 | 76 | int r = 0; |
19de40a8 | 77 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
522c68c4 | 78 | int flags; |
62c476c7 BAY |
79 | |
80 | /* check if iommu exists and in use */ | |
81 | if (!domain) | |
82 | return 0; | |
83 | ||
fcd95807 JR |
84 | gfn = slot->base_gfn; |
85 | end_gfn = gfn + slot->npages; | |
86 | ||
d47510e2 AW |
87 | flags = IOMMU_READ; |
88 | if (!(slot->flags & KVM_MEM_READONLY)) | |
89 | flags |= IOMMU_WRITE; | |
d96eb2c6 | 90 | if (!kvm->arch.iommu_noncoherent) |
522c68c4 SY |
91 | flags |= IOMMU_CACHE; |
92 | ||
fcd95807 JR |
93 | |
94 | while (gfn < end_gfn) { | |
95 | unsigned long page_size; | |
96 | ||
97 | /* Check if already mapped */ | |
98 | if (iommu_iova_to_phys(domain, gfn_to_gpa(gfn))) { | |
99 | gfn += 1; | |
100 | continue; | |
101 | } | |
102 | ||
103 | /* Get the page size we could use to map */ | |
104 | page_size = kvm_host_page_size(kvm, gfn); | |
105 | ||
106 | /* Make sure the page_size does not exceed the memslot */ | |
107 | while ((gfn + (page_size >> PAGE_SHIFT)) > end_gfn) | |
108 | page_size >>= 1; | |
109 | ||
110 | /* Make sure gfn is aligned to the page size we want to map */ | |
111 | while ((gfn << PAGE_SHIFT) & (page_size - 1)) | |
112 | page_size >>= 1; | |
113 | ||
27ef63c7 GE |
114 | /* Make sure hva is aligned to the page size we want to map */ |
115 | while (__gfn_to_hva_memslot(slot, gfn) & (page_size - 1)) | |
116 | page_size >>= 1; | |
117 | ||
fcd95807 JR |
118 | /* |
119 | * Pin all pages we are about to map in memory. This is | |
120 | * important because we unmap and unpin in 4kb steps later. | |
121 | */ | |
3d32e4db | 122 | pfn = kvm_pin_pages(slot, gfn, page_size >> PAGE_SHIFT); |
81c52c56 | 123 | if (is_error_noslot_pfn(pfn)) { |
fcd95807 | 124 | gfn += 1; |
62c476c7 | 125 | continue; |
fcd95807 | 126 | } |
62c476c7 | 127 | |
fcd95807 JR |
128 | /* Map into IO address space */ |
129 | r = iommu_map(domain, gfn_to_gpa(gfn), pfn_to_hpa(pfn), | |
7d3002cc | 130 | page_size, flags); |
e5fcfc82 | 131 | if (r) { |
260782bc | 132 | printk(KERN_ERR "kvm_iommu_map_address:" |
5689cc53 | 133 | "iommu failed to map pfn=%llx\n", pfn); |
3d32e4db | 134 | kvm_unpin_pages(kvm, pfn, page_size >> PAGE_SHIFT); |
62c476c7 BAY |
135 | goto unmap_pages; |
136 | } | |
fcd95807 JR |
137 | |
138 | gfn += page_size >> PAGE_SHIFT; | |
139 | ||
140 | ||
62c476c7 | 141 | } |
fcd95807 | 142 | |
62c476c7 BAY |
143 | return 0; |
144 | ||
145 | unmap_pages: | |
350b8bdd | 146 | kvm_iommu_put_pages(kvm, slot->base_gfn, gfn - slot->base_gfn); |
62c476c7 BAY |
147 | return r; |
148 | } | |
149 | ||
150 | static int kvm_iommu_map_memslots(struct kvm *kvm) | |
151 | { | |
be6ba0f0 | 152 | int idx, r = 0; |
46a26bf5 | 153 | struct kvm_memslots *slots; |
be6ba0f0 | 154 | struct kvm_memory_slot *memslot; |
62c476c7 | 155 | |
e0f0bbc5 AW |
156 | if (kvm->arch.iommu_noncoherent) |
157 | kvm_arch_register_noncoherent_dma(kvm); | |
158 | ||
95c87e2b | 159 | idx = srcu_read_lock(&kvm->srcu); |
90d83dc3 | 160 | slots = kvm_memslots(kvm); |
46a26bf5 | 161 | |
be6ba0f0 XG |
162 | kvm_for_each_memslot(memslot, slots) { |
163 | r = kvm_iommu_map_pages(kvm, memslot); | |
62c476c7 BAY |
164 | if (r) |
165 | break; | |
166 | } | |
95c87e2b | 167 | srcu_read_unlock(&kvm->srcu, idx); |
682edb4c | 168 | |
62c476c7 BAY |
169 | return r; |
170 | } | |
171 | ||
260782bc WH |
172 | int kvm_assign_device(struct kvm *kvm, |
173 | struct kvm_assigned_dev_kernel *assigned_dev) | |
62c476c7 BAY |
174 | { |
175 | struct pci_dev *pdev = NULL; | |
19de40a8 | 176 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
d96eb2c6 AW |
177 | int r; |
178 | bool noncoherent; | |
62c476c7 | 179 | |
260782bc WH |
180 | /* check if iommu exists and in use */ |
181 | if (!domain) | |
182 | return 0; | |
183 | ||
184 | pdev = assigned_dev->dev; | |
185 | if (pdev == NULL) | |
62c476c7 | 186 | return -ENODEV; |
260782bc | 187 | |
19de40a8 | 188 | r = iommu_attach_device(domain, &pdev->dev); |
260782bc | 189 | if (r) { |
d151f63f | 190 | dev_err(&pdev->dev, "kvm assign device failed ret %d", r); |
260782bc | 191 | return r; |
62c476c7 BAY |
192 | } |
193 | ||
ee5ba30f | 194 | noncoherent = !iommu_capable(&pci_bus_type, IOMMU_CAP_CACHE_COHERENCY); |
522c68c4 SY |
195 | |
196 | /* Check if need to update IOMMU page table for guest memory */ | |
d96eb2c6 | 197 | if (noncoherent != kvm->arch.iommu_noncoherent) { |
522c68c4 | 198 | kvm_iommu_unmap_memslots(kvm); |
d96eb2c6 | 199 | kvm->arch.iommu_noncoherent = noncoherent; |
522c68c4 SY |
200 | r = kvm_iommu_map_memslots(kvm); |
201 | if (r) | |
202 | goto out_unmap; | |
203 | } | |
204 | ||
ad0d217c | 205 | pci_set_dev_assigned(pdev); |
6777829c | 206 | |
29242cb5 | 207 | dev_info(&pdev->dev, "kvm assign device\n"); |
62c476c7 | 208 | |
260782bc | 209 | return 0; |
522c68c4 SY |
210 | out_unmap: |
211 | kvm_iommu_unmap_memslots(kvm); | |
212 | return r; | |
260782bc | 213 | } |
62c476c7 | 214 | |
0a920356 WH |
215 | int kvm_deassign_device(struct kvm *kvm, |
216 | struct kvm_assigned_dev_kernel *assigned_dev) | |
217 | { | |
19de40a8 | 218 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
0a920356 WH |
219 | struct pci_dev *pdev = NULL; |
220 | ||
221 | /* check if iommu exists and in use */ | |
222 | if (!domain) | |
223 | return 0; | |
224 | ||
225 | pdev = assigned_dev->dev; | |
226 | if (pdev == NULL) | |
227 | return -ENODEV; | |
228 | ||
19de40a8 | 229 | iommu_detach_device(domain, &pdev->dev); |
0a920356 | 230 | |
ad0d217c | 231 | pci_clear_dev_assigned(pdev); |
6777829c | 232 | |
29242cb5 | 233 | dev_info(&pdev->dev, "kvm deassign device\n"); |
0a920356 WH |
234 | |
235 | return 0; | |
236 | } | |
237 | ||
260782bc WH |
238 | int kvm_iommu_map_guest(struct kvm *kvm) |
239 | { | |
240 | int r; | |
241 | ||
a1b60c1c | 242 | if (!iommu_present(&pci_bus_type)) { |
19de40a8 | 243 | printk(KERN_ERR "%s: iommu not found\n", __func__); |
62c476c7 BAY |
244 | return -ENODEV; |
245 | } | |
246 | ||
21a1416a AW |
247 | mutex_lock(&kvm->slots_lock); |
248 | ||
905d66c1 | 249 | kvm->arch.iommu_domain = iommu_domain_alloc(&pci_bus_type); |
21a1416a AW |
250 | if (!kvm->arch.iommu_domain) { |
251 | r = -ENOMEM; | |
252 | goto out_unlock; | |
253 | } | |
62c476c7 | 254 | |
3f68b031 | 255 | if (!allow_unsafe_assigned_interrupts && |
ee5ba30f | 256 | !iommu_capable(&pci_bus_type, IOMMU_CAP_INTR_REMAP)) { |
3f68b031 AW |
257 | printk(KERN_WARNING "%s: No interrupt remapping support," |
258 | " disallowing device assignment." | |
259 | " Re-enble with \"allow_unsafe_assigned_interrupts=1\"" | |
260 | " module option.\n", __func__); | |
261 | iommu_domain_free(kvm->arch.iommu_domain); | |
262 | kvm->arch.iommu_domain = NULL; | |
21a1416a AW |
263 | r = -EPERM; |
264 | goto out_unlock; | |
3f68b031 AW |
265 | } |
266 | ||
62c476c7 BAY |
267 | r = kvm_iommu_map_memslots(kvm); |
268 | if (r) | |
21a1416a | 269 | kvm_iommu_unmap_memslots(kvm); |
62c476c7 | 270 | |
21a1416a AW |
271 | out_unlock: |
272 | mutex_unlock(&kvm->slots_lock); | |
62c476c7 BAY |
273 | return r; |
274 | } | |
275 | ||
276 | static void kvm_iommu_put_pages(struct kvm *kvm, | |
260782bc | 277 | gfn_t base_gfn, unsigned long npages) |
62c476c7 | 278 | { |
fcd95807 JR |
279 | struct iommu_domain *domain; |
280 | gfn_t end_gfn, gfn; | |
62c476c7 | 281 | pfn_t pfn; |
260782bc WH |
282 | u64 phys; |
283 | ||
fcd95807 JR |
284 | domain = kvm->arch.iommu_domain; |
285 | end_gfn = base_gfn + npages; | |
286 | gfn = base_gfn; | |
287 | ||
260782bc WH |
288 | /* check if iommu exists and in use */ |
289 | if (!domain) | |
290 | return; | |
62c476c7 | 291 | |
fcd95807 JR |
292 | while (gfn < end_gfn) { |
293 | unsigned long unmap_pages; | |
7d3002cc | 294 | size_t size; |
fcd95807 JR |
295 | |
296 | /* Get physical address */ | |
19de40a8 | 297 | phys = iommu_iova_to_phys(domain, gfn_to_gpa(gfn)); |
16b854c8 XG |
298 | |
299 | if (!phys) { | |
300 | gfn++; | |
301 | continue; | |
302 | } | |
303 | ||
fcd95807 JR |
304 | pfn = phys >> PAGE_SHIFT; |
305 | ||
306 | /* Unmap address from IO address space */ | |
7d3002cc OBC |
307 | size = iommu_unmap(domain, gfn_to_gpa(gfn), PAGE_SIZE); |
308 | unmap_pages = 1ULL << get_order(size); | |
260782bc | 309 | |
fcd95807 JR |
310 | /* Unpin all pages we just unmapped to not leak any memory */ |
311 | kvm_unpin_pages(kvm, pfn, unmap_pages); | |
312 | ||
313 | gfn += unmap_pages; | |
314 | } | |
62c476c7 BAY |
315 | } |
316 | ||
32f6daad AW |
317 | void kvm_iommu_unmap_pages(struct kvm *kvm, struct kvm_memory_slot *slot) |
318 | { | |
319 | kvm_iommu_put_pages(kvm, slot->base_gfn, slot->npages); | |
320 | } | |
321 | ||
62c476c7 BAY |
322 | static int kvm_iommu_unmap_memslots(struct kvm *kvm) |
323 | { | |
be6ba0f0 | 324 | int idx; |
46a26bf5 | 325 | struct kvm_memslots *slots; |
be6ba0f0 | 326 | struct kvm_memory_slot *memslot; |
46a26bf5 | 327 | |
95c87e2b | 328 | idx = srcu_read_lock(&kvm->srcu); |
90d83dc3 | 329 | slots = kvm_memslots(kvm); |
682edb4c | 330 | |
be6ba0f0 | 331 | kvm_for_each_memslot(memslot, slots) |
32f6daad | 332 | kvm_iommu_unmap_pages(kvm, memslot); |
be6ba0f0 | 333 | |
95c87e2b | 334 | srcu_read_unlock(&kvm->srcu, idx); |
62c476c7 | 335 | |
e0f0bbc5 AW |
336 | if (kvm->arch.iommu_noncoherent) |
337 | kvm_arch_unregister_noncoherent_dma(kvm); | |
338 | ||
62c476c7 BAY |
339 | return 0; |
340 | } | |
341 | ||
342 | int kvm_iommu_unmap_guest(struct kvm *kvm) | |
343 | { | |
19de40a8 | 344 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
62c476c7 BAY |
345 | |
346 | /* check if iommu exists and in use */ | |
347 | if (!domain) | |
348 | return 0; | |
349 | ||
21a1416a | 350 | mutex_lock(&kvm->slots_lock); |
62c476c7 | 351 | kvm_iommu_unmap_memslots(kvm); |
21a1416a | 352 | kvm->arch.iommu_domain = NULL; |
d96eb2c6 | 353 | kvm->arch.iommu_noncoherent = false; |
21a1416a AW |
354 | mutex_unlock(&kvm->slots_lock); |
355 | ||
19de40a8 | 356 | iommu_domain_free(domain); |
62c476c7 BAY |
357 | return 0; |
358 | } |