KVM: Move irq sharing information to irqchip level
[deliverable/linux.git] / virt / kvm / irq_comm.c
CommitLineData
3de42dc0
XZ
1/*
2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Authors:
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19 *
20 */
21
22#include <linux/kvm_host.h>
229456fc 23#include <trace/events/kvm.h>
79950e10 24
79950e10 25#include <asm/msidef.h>
58c2dde1
GN
26#ifdef CONFIG_IA64
27#include <asm/iosapic.h>
28#endif
79950e10 29
3de42dc0
XZ
30#include "irq.h"
31
32#include "ioapic.h"
33
1a6e4a8c
GN
34static inline int kvm_irq_line_state(unsigned long *irq_state,
35 int irq_source_id, int level)
36{
37 /* Logical OR for level trig interrupt */
38 if (level)
39 set_bit(irq_source_id, irq_state);
40 else
41 clear_bit(irq_source_id, irq_state);
42
43 return !!(*irq_state);
44}
45
4925663a 46static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c 47 struct kvm *kvm, int irq_source_id, int level)
399ec807
AK
48{
49#ifdef CONFIG_X86
1a6e4a8c
GN
50 struct kvm_pic *pic = pic_irqchip(kvm);
51 level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
52 irq_source_id, level);
53 return kvm_pic_set_irq(pic, e->irqchip.pin, level);
4925663a
GN
54#else
55 return -1;
399ec807
AK
56#endif
57}
58
4925663a 59static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c 60 struct kvm *kvm, int irq_source_id, int level)
399ec807 61{
1a6e4a8c
GN
62 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
63 level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
64 irq_source_id, level);
65
66 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
399ec807
AK
67}
68
58c2dde1 69inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
116191b6 70{
58c2dde1
GN
71#ifdef CONFIG_IA64
72 return irq->delivery_mode ==
73 (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
74#else
75 return irq->delivery_mode == APIC_DM_LOWEST;
76#endif
77}
116191b6 78
58c2dde1
GN
79int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
80 struct kvm_lapic_irq *irq)
81{
82 int i, r = -1;
83 struct kvm_vcpu *vcpu, *lowest = NULL;
84
fa40a821
MT
85 WARN_ON(!mutex_is_locked(&kvm->irq_lock));
86
58c2dde1
GN
87 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
88 kvm_is_dm_lowest_prio(irq))
343f94fe
GN
89 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
90
988a2cae
GN
91 kvm_for_each_vcpu(i, vcpu, kvm) {
92 if (!kvm_apic_present(vcpu))
343f94fe
GN
93 continue;
94
58c2dde1
GN
95 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
96 irq->dest_id, irq->dest_mode))
343f94fe
GN
97 continue;
98
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GN
99 if (!kvm_is_dm_lowest_prio(irq)) {
100 if (r < 0)
101 r = 0;
102 r += kvm_apic_set_irq(vcpu, irq);
e1035715 103 } else {
58c2dde1
GN
104 if (!lowest)
105 lowest = vcpu;
106 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
107 lowest = vcpu;
e1035715 108 }
343f94fe
GN
109 }
110
58c2dde1
GN
111 if (lowest)
112 r = kvm_apic_set_irq(lowest, irq);
113
114 return r;
116191b6
SY
115}
116
4925663a 117static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c 118 struct kvm *kvm, int irq_source_id, int level)
79950e10 119{
58c2dde1 120 struct kvm_lapic_irq irq;
79950e10 121
1a6e4a8c
GN
122 if (!level)
123 return -1;
124
1000ff8d
GN
125 trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
126
58c2dde1 127 irq.dest_id = (e->msi.address_lo &
116191b6 128 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
58c2dde1 129 irq.vector = (e->msi.data &
116191b6 130 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
58c2dde1
GN
131 irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
132 irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
133 irq.delivery_mode = e->msi.data & 0x700;
134 irq.level = 1;
135 irq.shorthand = 0;
116191b6
SY
136
137 /* TODO Deal with RH bit of MSI message address */
58c2dde1 138 return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
79950e10
SY
139}
140
fa40a821 141/* This should be called with the kvm->irq_lock mutex held
4925663a
GN
142 * Return value:
143 * < 0 Interrupt was ignored (masked or not delivered for other reasons)
144 * = 0 Interrupt was coalesced (previous irq is still pending)
145 * > 0 Number of CPUs interrupt was delivered to
146 */
147int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level)
3de42dc0 148{
399ec807 149 struct kvm_kernel_irq_routing_entry *e;
4925663a 150 int ret = -1;
79950e10 151
ae8c1c40 152 trace_kvm_set_irq(irq, level, irq_source_id);
229456fc 153
fa40a821
MT
154 WARN_ON(!mutex_is_locked(&kvm->irq_lock));
155
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156 /* Not possible to detect if the guest uses the PIC or the
157 * IOAPIC. So set the bit in both. The guest will ignore
158 * writes to the unused one.
159 */
399ec807 160 list_for_each_entry(e, &kvm->irq_routing, link)
4925663a 161 if (e->gsi == irq) {
1a6e4a8c 162 int r = e->set(e, kvm, irq_source_id, level);
4925663a
GN
163 if (r < 0)
164 continue;
165
166 ret = r + ((ret < 0) ? 0 : ret);
167 }
168 return ret;
3de42dc0
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169}
170
44882eed 171void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0 172{
44882eed 173 struct kvm_kernel_irq_routing_entry *e;
3de42dc0
XZ
174 struct kvm_irq_ack_notifier *kian;
175 struct hlist_node *n;
44882eed
MT
176 unsigned gsi = pin;
177
229456fc
MT
178 trace_kvm_ack_irq(irqchip, pin);
179
44882eed 180 list_for_each_entry(e, &kvm->irq_routing, link)
5116d8f6
MT
181 if (e->type == KVM_IRQ_ROUTING_IRQCHIP &&
182 e->irqchip.irqchip == irqchip &&
44882eed
MT
183 e->irqchip.pin == pin) {
184 gsi = e->gsi;
185 break;
186 }
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187
188 hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link)
189 if (kian->gsi == gsi)
190 kian->irq_acked(kian);
191}
192
193void kvm_register_irq_ack_notifier(struct kvm *kvm,
194 struct kvm_irq_ack_notifier *kian)
195{
fa40a821 196 mutex_lock(&kvm->irq_lock);
3de42dc0 197 hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list);
fa40a821 198 mutex_unlock(&kvm->irq_lock);
3de42dc0
XZ
199}
200
fa40a821
MT
201void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
202 struct kvm_irq_ack_notifier *kian)
3de42dc0 203{
fa40a821 204 mutex_lock(&kvm->irq_lock);
fdd897e6 205 hlist_del_init(&kian->link);
fa40a821 206 mutex_unlock(&kvm->irq_lock);
3de42dc0 207}
5550af4d 208
5550af4d
SY
209int kvm_request_irq_source_id(struct kvm *kvm)
210{
211 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
fa40a821
MT
212 int irq_source_id;
213
214 mutex_lock(&kvm->irq_lock);
215 irq_source_id = find_first_zero_bit(bitmap,
5550af4d 216 sizeof(kvm->arch.irq_sources_bitmap));
61552367 217
5550af4d
SY
218 if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
219 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
61552367
MM
220 return -EFAULT;
221 }
222
223 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
224 set_bit(irq_source_id, bitmap);
fa40a821 225 mutex_unlock(&kvm->irq_lock);
61552367 226
5550af4d
SY
227 return irq_source_id;
228}
229
230void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
231{
232 int i;
233
61552367
MM
234 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
235
fa40a821 236 mutex_lock(&kvm->irq_lock);
61552367 237 if (irq_source_id < 0 ||
5550af4d
SY
238 irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
239 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
240 return;
241 }
1a6e4a8c
GN
242 for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
243 clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
244 if (i >= 16)
245 continue;
246#ifdef CONFIG_X86
247 clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
248#endif
249 }
5550af4d 250 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
fa40a821 251 mutex_unlock(&kvm->irq_lock);
5550af4d 252}
75858a84
AK
253
254void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
255 struct kvm_irq_mask_notifier *kimn)
256{
fa40a821 257 mutex_lock(&kvm->irq_lock);
75858a84
AK
258 kimn->irq = irq;
259 hlist_add_head(&kimn->link, &kvm->mask_notifier_list);
fa40a821 260 mutex_unlock(&kvm->irq_lock);
75858a84
AK
261}
262
263void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
264 struct kvm_irq_mask_notifier *kimn)
265{
fa40a821 266 mutex_lock(&kvm->irq_lock);
75858a84 267 hlist_del(&kimn->link);
fa40a821 268 mutex_unlock(&kvm->irq_lock);
75858a84
AK
269}
270
271void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
272{
273 struct kvm_irq_mask_notifier *kimn;
274 struct hlist_node *n;
275
fa40a821
MT
276 WARN_ON(!mutex_is_locked(&kvm->irq_lock));
277
75858a84
AK
278 hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link)
279 if (kimn->irq == irq)
280 kimn->func(kimn, mask);
281}
282
399ec807
AK
283static void __kvm_free_irq_routing(struct list_head *irq_routing)
284{
285 struct kvm_kernel_irq_routing_entry *e, *n;
286
287 list_for_each_entry_safe(e, n, irq_routing, link)
288 kfree(e);
289}
290
291void kvm_free_irq_routing(struct kvm *kvm)
292{
fa40a821 293 mutex_lock(&kvm->irq_lock);
399ec807 294 __kvm_free_irq_routing(&kvm->irq_routing);
fa40a821 295 mutex_unlock(&kvm->irq_lock);
399ec807
AK
296}
297
cded19f3
HE
298static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e,
299 const struct kvm_irq_routing_entry *ue)
399ec807
AK
300{
301 int r = -EINVAL;
302 int delta;
303
304 e->gsi = ue->gsi;
5116d8f6 305 e->type = ue->type;
399ec807
AK
306 switch (ue->type) {
307 case KVM_IRQ_ROUTING_IRQCHIP:
308 delta = 0;
309 switch (ue->u.irqchip.irqchip) {
310 case KVM_IRQCHIP_PIC_MASTER:
311 e->set = kvm_set_pic_irq;
312 break;
313 case KVM_IRQCHIP_PIC_SLAVE:
4925663a 314 e->set = kvm_set_pic_irq;
399ec807
AK
315 delta = 8;
316 break;
317 case KVM_IRQCHIP_IOAPIC:
efbc100c 318 e->set = kvm_set_ioapic_irq;
399ec807
AK
319 break;
320 default:
321 goto out;
322 }
323 e->irqchip.irqchip = ue->u.irqchip.irqchip;
324 e->irqchip.pin = ue->u.irqchip.pin + delta;
325 break;
79950e10
SY
326 case KVM_IRQ_ROUTING_MSI:
327 e->set = kvm_set_msi;
328 e->msi.address_lo = ue->u.msi.address_lo;
329 e->msi.address_hi = ue->u.msi.address_hi;
330 e->msi.data = ue->u.msi.data;
331 break;
399ec807
AK
332 default:
333 goto out;
334 }
335 r = 0;
336out:
337 return r;
338}
339
340
341int kvm_set_irq_routing(struct kvm *kvm,
342 const struct kvm_irq_routing_entry *ue,
343 unsigned nr,
344 unsigned flags)
345{
346 struct list_head irq_list = LIST_HEAD_INIT(irq_list);
347 struct list_head tmp = LIST_HEAD_INIT(tmp);
348 struct kvm_kernel_irq_routing_entry *e = NULL;
349 unsigned i;
350 int r;
351
352 for (i = 0; i < nr; ++i) {
353 r = -EINVAL;
354 if (ue->gsi >= KVM_MAX_IRQ_ROUTES)
355 goto out;
356 if (ue->flags)
357 goto out;
358 r = -ENOMEM;
359 e = kzalloc(sizeof(*e), GFP_KERNEL);
360 if (!e)
361 goto out;
362 r = setup_routing_entry(e, ue);
363 if (r)
364 goto out;
365 ++ue;
366 list_add(&e->link, &irq_list);
367 e = NULL;
368 }
369
fa40a821 370 mutex_lock(&kvm->irq_lock);
399ec807
AK
371 list_splice(&kvm->irq_routing, &tmp);
372 INIT_LIST_HEAD(&kvm->irq_routing);
373 list_splice(&irq_list, &kvm->irq_routing);
374 INIT_LIST_HEAD(&irq_list);
375 list_splice(&tmp, &irq_list);
fa40a821 376 mutex_unlock(&kvm->irq_lock);
399ec807
AK
377
378 r = 0;
379
380out:
381 kfree(e);
382 __kvm_free_irq_routing(&irq_list);
383 return r;
384}
385
386#define IOAPIC_ROUTING_ENTRY(irq) \
387 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
388 .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
389#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
390
391#ifdef CONFIG_X86
399ec807
AK
392# define PIC_ROUTING_ENTRY(irq) \
393 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
394 .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
395# define ROUTING_ENTRY2(irq) \
396 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
397#else
398# define ROUTING_ENTRY2(irq) \
399 IOAPIC_ROUTING_ENTRY(irq)
400#endif
401
402static const struct kvm_irq_routing_entry default_routing[] = {
403 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
404 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
405 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
406 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
407 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
408 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
409 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
410 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
411 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
412 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
413 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
414 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
415#ifdef CONFIG_IA64
416 ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
417 ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
418 ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
419 ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
420 ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
421 ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
422 ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
423 ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
424 ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
425 ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
426 ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
427 ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
428#endif
429};
430
431int kvm_setup_default_irq_routing(struct kvm *kvm)
432{
433 return kvm_set_irq_routing(kvm, default_routing,
434 ARRAY_SIZE(default_routing), 0);
435}
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