| 1 | NVIDIA Tegra30 HDA controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise, |
| 5 | must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is |
| 6 | tegra114, tegra124, or tegra132. |
| 7 | - reg : Should contain the HDA registers location and length. |
| 8 | - interrupts : The interrupt from the HDA controller. |
| 9 | - clocks : Must contain an entry for each required entry in clock-names. |
| 10 | See ../clocks/clock-bindings.txt for details. |
| 11 | - clock-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x |
| 12 | - resets : Must contain an entry for each entry in reset-names. |
| 13 | See ../reset/reset.txt for details. |
| 14 | - reset-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x |
| 15 | |
| 16 | Example: |
| 17 | |
| 18 | hda@70030000 { |
| 19 | compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; |
| 20 | reg = <0x0 0x70030000 0x0 0x10000>; |
| 21 | interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; |
| 22 | clocks = <&tegra_car TEGRA124_CLK_HDA>, |
| 23 | <&tegra_car TEGRA124_CLK_HDA2HDMI>, |
| 24 | <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; |
| 25 | clock-names = "hda", "hda2hdmi", "hda2codec_2x"; |
| 26 | resets = <&tegra_car 125>, /* hda */ |
| 27 | <&tegra_car 128>, /* hda2hdmi */ |
| 28 | <&tegra_car 111>; /* hda2codec_2x */ |
| 29 | reset-names = "hda", "hda2hdmi", "hda2codec_2x"; |
| 30 | }; |