| 1 | /* |
| 2 | * Device Tree Source for AM4372 SoC |
| 3 | * |
| 4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | #include <dt-bindings/gpio/gpio.h> |
| 12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 13 | |
| 14 | #include "skeleton.dtsi" |
| 15 | |
| 16 | / { |
| 17 | compatible = "ti,am4372", "ti,am43"; |
| 18 | interrupt-parent = <&wakeupgen>; |
| 19 | |
| 20 | |
| 21 | aliases { |
| 22 | i2c0 = &i2c0; |
| 23 | i2c1 = &i2c1; |
| 24 | i2c2 = &i2c2; |
| 25 | serial0 = &uart0; |
| 26 | serial1 = &uart1; |
| 27 | serial2 = &uart2; |
| 28 | serial3 = &uart3; |
| 29 | serial4 = &uart4; |
| 30 | serial5 = &uart5; |
| 31 | ethernet0 = &cpsw_emac0; |
| 32 | ethernet1 = &cpsw_emac1; |
| 33 | spi0 = &qspi; |
| 34 | }; |
| 35 | |
| 36 | cpus { |
| 37 | #address-cells = <1>; |
| 38 | #size-cells = <0>; |
| 39 | cpu: cpu@0 { |
| 40 | compatible = "arm,cortex-a9"; |
| 41 | device_type = "cpu"; |
| 42 | reg = <0>; |
| 43 | |
| 44 | clocks = <&dpll_mpu_ck>; |
| 45 | clock-names = "cpu"; |
| 46 | |
| 47 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
| 48 | }; |
| 49 | }; |
| 50 | |
| 51 | gic: interrupt-controller@48241000 { |
| 52 | compatible = "arm,cortex-a9-gic"; |
| 53 | interrupt-controller; |
| 54 | #interrupt-cells = <3>; |
| 55 | reg = <0x48241000 0x1000>, |
| 56 | <0x48240100 0x0100>; |
| 57 | interrupt-parent = <&gic>; |
| 58 | }; |
| 59 | |
| 60 | wakeupgen: interrupt-controller@48281000 { |
| 61 | compatible = "ti,omap4-wugen-mpu"; |
| 62 | interrupt-controller; |
| 63 | #interrupt-cells = <3>; |
| 64 | reg = <0x48281000 0x1000>; |
| 65 | interrupt-parent = <&gic>; |
| 66 | }; |
| 67 | |
| 68 | scu: scu@48240000 { |
| 69 | compatible = "arm,cortex-a9-scu"; |
| 70 | reg = <0x48240000 0x100>; |
| 71 | }; |
| 72 | |
| 73 | global_timer: timer@48240200 { |
| 74 | compatible = "arm,cortex-a9-global-timer"; |
| 75 | reg = <0x48240200 0x100>; |
| 76 | interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; |
| 77 | interrupt-parent = <&gic>; |
| 78 | clocks = <&mpu_periphclk>; |
| 79 | }; |
| 80 | |
| 81 | local_timer: timer@48240600 { |
| 82 | compatible = "arm,cortex-a9-twd-timer"; |
| 83 | reg = <0x48240600 0x100>; |
| 84 | interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; |
| 85 | interrupt-parent = <&gic>; |
| 86 | clocks = <&mpu_periphclk>; |
| 87 | }; |
| 88 | |
| 89 | l2-cache-controller@48242000 { |
| 90 | compatible = "arm,pl310-cache"; |
| 91 | reg = <0x48242000 0x1000>; |
| 92 | cache-unified; |
| 93 | cache-level = <2>; |
| 94 | }; |
| 95 | |
| 96 | ocp { |
| 97 | compatible = "ti,am4372-l3-noc", "simple-bus"; |
| 98 | #address-cells = <1>; |
| 99 | #size-cells = <1>; |
| 100 | ranges; |
| 101 | ti,hwmods = "l3_main"; |
| 102 | reg = <0x44000000 0x400000 |
| 103 | 0x44800000 0x400000>; |
| 104 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, |
| 105 | <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
| 106 | |
| 107 | l4_wkup: l4_wkup@44c00000 { |
| 108 | compatible = "ti,am4-l4-wkup", "simple-bus"; |
| 109 | #address-cells = <1>; |
| 110 | #size-cells = <1>; |
| 111 | ranges = <0 0x44c00000 0x287000>; |
| 112 | |
| 113 | wkup_m3: wkup_m3@100000 { |
| 114 | compatible = "ti,am4372-wkup-m3"; |
| 115 | reg = <0x100000 0x4000>, |
| 116 | <0x180000 0x2000>; |
| 117 | reg-names = "umem", "dmem"; |
| 118 | ti,hwmods = "wkup_m3"; |
| 119 | ti,pm-firmware = "am335x-pm-firmware.elf"; |
| 120 | }; |
| 121 | |
| 122 | prcm: prcm@1f0000 { |
| 123 | compatible = "ti,am4-prcm"; |
| 124 | reg = <0x1f0000 0x11000>; |
| 125 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; |
| 126 | |
| 127 | prcm_clocks: clocks { |
| 128 | #address-cells = <1>; |
| 129 | #size-cells = <0>; |
| 130 | }; |
| 131 | |
| 132 | prcm_clockdomains: clockdomains { |
| 133 | }; |
| 134 | }; |
| 135 | |
| 136 | scm: scm@210000 { |
| 137 | compatible = "ti,am4-scm", "simple-bus"; |
| 138 | reg = <0x210000 0x4000>; |
| 139 | #address-cells = <1>; |
| 140 | #size-cells = <1>; |
| 141 | ranges = <0 0x210000 0x4000>; |
| 142 | |
| 143 | am43xx_pinmux: pinmux@800 { |
| 144 | compatible = "ti,am437-padconf", |
| 145 | "pinctrl-single"; |
| 146 | reg = <0x800 0x31c>; |
| 147 | #address-cells = <1>; |
| 148 | #size-cells = <0>; |
| 149 | #interrupt-cells = <1>; |
| 150 | interrupt-controller; |
| 151 | pinctrl-single,register-width = <32>; |
| 152 | pinctrl-single,function-mask = <0xffffffff>; |
| 153 | }; |
| 154 | |
| 155 | scm_conf: scm_conf@0 { |
| 156 | compatible = "syscon"; |
| 157 | reg = <0x0 0x800>; |
| 158 | #address-cells = <1>; |
| 159 | #size-cells = <1>; |
| 160 | |
| 161 | scm_clocks: clocks { |
| 162 | #address-cells = <1>; |
| 163 | #size-cells = <0>; |
| 164 | }; |
| 165 | }; |
| 166 | |
| 167 | wkup_m3_ipc: wkup_m3_ipc@1324 { |
| 168 | compatible = "ti,am4372-wkup-m3-ipc"; |
| 169 | reg = <0x1324 0x44>; |
| 170 | interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; |
| 171 | ti,rproc = <&wkup_m3>; |
| 172 | mboxes = <&mailbox &mbox_wkupm3>; |
| 173 | }; |
| 174 | |
| 175 | edma_xbar: dma-router@f90 { |
| 176 | compatible = "ti,am335x-edma-crossbar"; |
| 177 | reg = <0xf90 0x40>; |
| 178 | #dma-cells = <3>; |
| 179 | dma-requests = <64>; |
| 180 | dma-masters = <&edma>; |
| 181 | }; |
| 182 | |
| 183 | scm_clockdomains: clockdomains { |
| 184 | }; |
| 185 | }; |
| 186 | }; |
| 187 | |
| 188 | emif: emif@4c000000 { |
| 189 | compatible = "ti,emif-am4372"; |
| 190 | reg = <0x4c000000 0x1000000>; |
| 191 | ti,hwmods = "emif"; |
| 192 | }; |
| 193 | |
| 194 | edma: edma@49000000 { |
| 195 | compatible = "ti,edma3-tpcc"; |
| 196 | ti,hwmods = "tpcc"; |
| 197 | reg = <0x49000000 0x10000>; |
| 198 | reg-names = "edma3_cc"; |
| 199 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, |
| 200 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, |
| 201 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; |
| 202 | interrupt-names = "edma3_ccint", "emda3_mperr", |
| 203 | "edma3_ccerrint"; |
| 204 | dma-requests = <64>; |
| 205 | #dma-cells = <2>; |
| 206 | |
| 207 | ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, |
| 208 | <&edma_tptc2 0>; |
| 209 | |
| 210 | ti,edma-memcpy-channels = <58 59>; |
| 211 | }; |
| 212 | |
| 213 | edma_tptc0: tptc@49800000 { |
| 214 | compatible = "ti,edma3-tptc"; |
| 215 | ti,hwmods = "tptc0"; |
| 216 | reg = <0x49800000 0x100000>; |
| 217 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 218 | interrupt-names = "edma3_tcerrint"; |
| 219 | }; |
| 220 | |
| 221 | edma_tptc1: tptc@49900000 { |
| 222 | compatible = "ti,edma3-tptc"; |
| 223 | ti,hwmods = "tptc1"; |
| 224 | reg = <0x49900000 0x100000>; |
| 225 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| 226 | interrupt-names = "edma3_tcerrint"; |
| 227 | }; |
| 228 | |
| 229 | edma_tptc2: tptc@49a00000 { |
| 230 | compatible = "ti,edma3-tptc"; |
| 231 | ti,hwmods = "tptc2"; |
| 232 | reg = <0x49a00000 0x100000>; |
| 233 | interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; |
| 234 | interrupt-names = "edma3_tcerrint"; |
| 235 | }; |
| 236 | |
| 237 | uart0: serial@44e09000 { |
| 238 | compatible = "ti,am4372-uart","ti,omap2-uart"; |
| 239 | reg = <0x44e09000 0x2000>; |
| 240 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; |
| 241 | ti,hwmods = "uart1"; |
| 242 | }; |
| 243 | |
| 244 | uart1: serial@48022000 { |
| 245 | compatible = "ti,am4372-uart","ti,omap2-uart"; |
| 246 | reg = <0x48022000 0x2000>; |
| 247 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| 248 | ti,hwmods = "uart2"; |
| 249 | status = "disabled"; |
| 250 | }; |
| 251 | |
| 252 | uart2: serial@48024000 { |
| 253 | compatible = "ti,am4372-uart","ti,omap2-uart"; |
| 254 | reg = <0x48024000 0x2000>; |
| 255 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
| 256 | ti,hwmods = "uart3"; |
| 257 | status = "disabled"; |
| 258 | }; |
| 259 | |
| 260 | uart3: serial@481a6000 { |
| 261 | compatible = "ti,am4372-uart","ti,omap2-uart"; |
| 262 | reg = <0x481a6000 0x2000>; |
| 263 | interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; |
| 264 | ti,hwmods = "uart4"; |
| 265 | status = "disabled"; |
| 266 | }; |
| 267 | |
| 268 | uart4: serial@481a8000 { |
| 269 | compatible = "ti,am4372-uart","ti,omap2-uart"; |
| 270 | reg = <0x481a8000 0x2000>; |
| 271 | interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
| 272 | ti,hwmods = "uart5"; |
| 273 | status = "disabled"; |
| 274 | }; |
| 275 | |
| 276 | uart5: serial@481aa000 { |
| 277 | compatible = "ti,am4372-uart","ti,omap2-uart"; |
| 278 | reg = <0x481aa000 0x2000>; |
| 279 | interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; |
| 280 | ti,hwmods = "uart6"; |
| 281 | status = "disabled"; |
| 282 | }; |
| 283 | |
| 284 | mailbox: mailbox@480C8000 { |
| 285 | compatible = "ti,omap4-mailbox"; |
| 286 | reg = <0x480C8000 0x200>; |
| 287 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
| 288 | ti,hwmods = "mailbox"; |
| 289 | #mbox-cells = <1>; |
| 290 | ti,mbox-num-users = <4>; |
| 291 | ti,mbox-num-fifos = <8>; |
| 292 | mbox_wkupm3: wkup_m3 { |
| 293 | ti,mbox-send-noirq; |
| 294 | ti,mbox-tx = <0 0 0>; |
| 295 | ti,mbox-rx = <0 0 3>; |
| 296 | }; |
| 297 | }; |
| 298 | |
| 299 | timer1: timer@44e31000 { |
| 300 | compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; |
| 301 | reg = <0x44e31000 0x400>; |
| 302 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
| 303 | ti,timer-alwon; |
| 304 | ti,hwmods = "timer1"; |
| 305 | }; |
| 306 | |
| 307 | timer2: timer@48040000 { |
| 308 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 309 | reg = <0x48040000 0x400>; |
| 310 | interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; |
| 311 | ti,hwmods = "timer2"; |
| 312 | }; |
| 313 | |
| 314 | timer3: timer@48042000 { |
| 315 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 316 | reg = <0x48042000 0x400>; |
| 317 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
| 318 | ti,hwmods = "timer3"; |
| 319 | status = "disabled"; |
| 320 | }; |
| 321 | |
| 322 | timer4: timer@48044000 { |
| 323 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 324 | reg = <0x48044000 0x400>; |
| 325 | interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; |
| 326 | ti,timer-pwm; |
| 327 | ti,hwmods = "timer4"; |
| 328 | status = "disabled"; |
| 329 | }; |
| 330 | |
| 331 | timer5: timer@48046000 { |
| 332 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 333 | reg = <0x48046000 0x400>; |
| 334 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; |
| 335 | ti,timer-pwm; |
| 336 | ti,hwmods = "timer5"; |
| 337 | status = "disabled"; |
| 338 | }; |
| 339 | |
| 340 | timer6: timer@48048000 { |
| 341 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 342 | reg = <0x48048000 0x400>; |
| 343 | interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; |
| 344 | ti,timer-pwm; |
| 345 | ti,hwmods = "timer6"; |
| 346 | status = "disabled"; |
| 347 | }; |
| 348 | |
| 349 | timer7: timer@4804a000 { |
| 350 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 351 | reg = <0x4804a000 0x400>; |
| 352 | interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; |
| 353 | ti,timer-pwm; |
| 354 | ti,hwmods = "timer7"; |
| 355 | status = "disabled"; |
| 356 | }; |
| 357 | |
| 358 | timer8: timer@481c1000 { |
| 359 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 360 | reg = <0x481c1000 0x400>; |
| 361 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; |
| 362 | ti,hwmods = "timer8"; |
| 363 | status = "disabled"; |
| 364 | }; |
| 365 | |
| 366 | timer9: timer@4833d000 { |
| 367 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 368 | reg = <0x4833d000 0x400>; |
| 369 | interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; |
| 370 | ti,hwmods = "timer9"; |
| 371 | status = "disabled"; |
| 372 | }; |
| 373 | |
| 374 | timer10: timer@4833f000 { |
| 375 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 376 | reg = <0x4833f000 0x400>; |
| 377 | interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; |
| 378 | ti,hwmods = "timer10"; |
| 379 | status = "disabled"; |
| 380 | }; |
| 381 | |
| 382 | timer11: timer@48341000 { |
| 383 | compatible = "ti,am4372-timer","ti,am335x-timer"; |
| 384 | reg = <0x48341000 0x400>; |
| 385 | interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; |
| 386 | ti,hwmods = "timer11"; |
| 387 | status = "disabled"; |
| 388 | }; |
| 389 | |
| 390 | counter32k: counter@44e86000 { |
| 391 | compatible = "ti,am4372-counter32k","ti,omap-counter32k"; |
| 392 | reg = <0x44e86000 0x40>; |
| 393 | ti,hwmods = "counter_32k"; |
| 394 | }; |
| 395 | |
| 396 | rtc: rtc@44e3e000 { |
| 397 | compatible = "ti,am4372-rtc", "ti,am3352-rtc", |
| 398 | "ti,da830-rtc"; |
| 399 | reg = <0x44e3e000 0x1000>; |
| 400 | interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH |
| 401 | GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; |
| 402 | ti,hwmods = "rtc"; |
| 403 | clocks = <&clk_32768_ck>; |
| 404 | clock-names = "int-clk"; |
| 405 | status = "disabled"; |
| 406 | }; |
| 407 | |
| 408 | wdt: wdt@44e35000 { |
| 409 | compatible = "ti,am4372-wdt","ti,omap3-wdt"; |
| 410 | reg = <0x44e35000 0x1000>; |
| 411 | interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; |
| 412 | ti,hwmods = "wd_timer2"; |
| 413 | }; |
| 414 | |
| 415 | gpio0: gpio@44e07000 { |
| 416 | compatible = "ti,am4372-gpio","ti,omap4-gpio"; |
| 417 | reg = <0x44e07000 0x1000>; |
| 418 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; |
| 419 | gpio-controller; |
| 420 | #gpio-cells = <2>; |
| 421 | interrupt-controller; |
| 422 | #interrupt-cells = <2>; |
| 423 | ti,hwmods = "gpio1"; |
| 424 | status = "disabled"; |
| 425 | }; |
| 426 | |
| 427 | gpio1: gpio@4804c000 { |
| 428 | compatible = "ti,am4372-gpio","ti,omap4-gpio"; |
| 429 | reg = <0x4804c000 0x1000>; |
| 430 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; |
| 431 | gpio-controller; |
| 432 | #gpio-cells = <2>; |
| 433 | interrupt-controller; |
| 434 | #interrupt-cells = <2>; |
| 435 | ti,hwmods = "gpio2"; |
| 436 | status = "disabled"; |
| 437 | }; |
| 438 | |
| 439 | gpio2: gpio@481ac000 { |
| 440 | compatible = "ti,am4372-gpio","ti,omap4-gpio"; |
| 441 | reg = <0x481ac000 0x1000>; |
| 442 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
| 443 | gpio-controller; |
| 444 | #gpio-cells = <2>; |
| 445 | interrupt-controller; |
| 446 | #interrupt-cells = <2>; |
| 447 | ti,hwmods = "gpio3"; |
| 448 | status = "disabled"; |
| 449 | }; |
| 450 | |
| 451 | gpio3: gpio@481ae000 { |
| 452 | compatible = "ti,am4372-gpio","ti,omap4-gpio"; |
| 453 | reg = <0x481ae000 0x1000>; |
| 454 | interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; |
| 455 | gpio-controller; |
| 456 | #gpio-cells = <2>; |
| 457 | interrupt-controller; |
| 458 | #interrupt-cells = <2>; |
| 459 | ti,hwmods = "gpio4"; |
| 460 | status = "disabled"; |
| 461 | }; |
| 462 | |
| 463 | gpio4: gpio@48320000 { |
| 464 | compatible = "ti,am4372-gpio","ti,omap4-gpio"; |
| 465 | reg = <0x48320000 0x1000>; |
| 466 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
| 467 | gpio-controller; |
| 468 | #gpio-cells = <2>; |
| 469 | interrupt-controller; |
| 470 | #interrupt-cells = <2>; |
| 471 | ti,hwmods = "gpio5"; |
| 472 | status = "disabled"; |
| 473 | }; |
| 474 | |
| 475 | gpio5: gpio@48322000 { |
| 476 | compatible = "ti,am4372-gpio","ti,omap4-gpio"; |
| 477 | reg = <0x48322000 0x1000>; |
| 478 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| 479 | gpio-controller; |
| 480 | #gpio-cells = <2>; |
| 481 | interrupt-controller; |
| 482 | #interrupt-cells = <2>; |
| 483 | ti,hwmods = "gpio6"; |
| 484 | status = "disabled"; |
| 485 | }; |
| 486 | |
| 487 | hwspinlock: spinlock@480ca000 { |
| 488 | compatible = "ti,omap4-hwspinlock"; |
| 489 | reg = <0x480ca000 0x1000>; |
| 490 | ti,hwmods = "spinlock"; |
| 491 | #hwlock-cells = <1>; |
| 492 | }; |
| 493 | |
| 494 | i2c0: i2c@44e0b000 { |
| 495 | compatible = "ti,am4372-i2c","ti,omap4-i2c"; |
| 496 | reg = <0x44e0b000 0x1000>; |
| 497 | interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; |
| 498 | ti,hwmods = "i2c1"; |
| 499 | #address-cells = <1>; |
| 500 | #size-cells = <0>; |
| 501 | status = "disabled"; |
| 502 | }; |
| 503 | |
| 504 | i2c1: i2c@4802a000 { |
| 505 | compatible = "ti,am4372-i2c","ti,omap4-i2c"; |
| 506 | reg = <0x4802a000 0x1000>; |
| 507 | interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; |
| 508 | ti,hwmods = "i2c2"; |
| 509 | #address-cells = <1>; |
| 510 | #size-cells = <0>; |
| 511 | status = "disabled"; |
| 512 | }; |
| 513 | |
| 514 | i2c2: i2c@4819c000 { |
| 515 | compatible = "ti,am4372-i2c","ti,omap4-i2c"; |
| 516 | reg = <0x4819c000 0x1000>; |
| 517 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
| 518 | ti,hwmods = "i2c3"; |
| 519 | #address-cells = <1>; |
| 520 | #size-cells = <0>; |
| 521 | status = "disabled"; |
| 522 | }; |
| 523 | |
| 524 | spi0: spi@48030000 { |
| 525 | compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; |
| 526 | reg = <0x48030000 0x400>; |
| 527 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
| 528 | ti,hwmods = "spi0"; |
| 529 | #address-cells = <1>; |
| 530 | #size-cells = <0>; |
| 531 | status = "disabled"; |
| 532 | }; |
| 533 | |
| 534 | mmc1: mmc@48060000 { |
| 535 | compatible = "ti,omap4-hsmmc"; |
| 536 | reg = <0x48060000 0x1000>; |
| 537 | ti,hwmods = "mmc1"; |
| 538 | ti,dual-volt; |
| 539 | ti,needs-special-reset; |
| 540 | dmas = <&edma 24 0>, |
| 541 | <&edma 25 0>; |
| 542 | dma-names = "tx", "rx"; |
| 543 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
| 544 | status = "disabled"; |
| 545 | }; |
| 546 | |
| 547 | mmc2: mmc@481d8000 { |
| 548 | compatible = "ti,omap4-hsmmc"; |
| 549 | reg = <0x481d8000 0x1000>; |
| 550 | ti,hwmods = "mmc2"; |
| 551 | ti,needs-special-reset; |
| 552 | dmas = <&edma 2 0>, |
| 553 | <&edma 3 0>; |
| 554 | dma-names = "tx", "rx"; |
| 555 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; |
| 556 | status = "disabled"; |
| 557 | }; |
| 558 | |
| 559 | mmc3: mmc@47810000 { |
| 560 | compatible = "ti,omap4-hsmmc"; |
| 561 | reg = <0x47810000 0x1000>; |
| 562 | ti,hwmods = "mmc3"; |
| 563 | ti,needs-special-reset; |
| 564 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
| 565 | status = "disabled"; |
| 566 | }; |
| 567 | |
| 568 | spi1: spi@481a0000 { |
| 569 | compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; |
| 570 | reg = <0x481a0000 0x400>; |
| 571 | interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; |
| 572 | ti,hwmods = "spi1"; |
| 573 | #address-cells = <1>; |
| 574 | #size-cells = <0>; |
| 575 | status = "disabled"; |
| 576 | }; |
| 577 | |
| 578 | spi2: spi@481a2000 { |
| 579 | compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; |
| 580 | reg = <0x481a2000 0x400>; |
| 581 | interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; |
| 582 | ti,hwmods = "spi2"; |
| 583 | #address-cells = <1>; |
| 584 | #size-cells = <0>; |
| 585 | status = "disabled"; |
| 586 | }; |
| 587 | |
| 588 | spi3: spi@481a4000 { |
| 589 | compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; |
| 590 | reg = <0x481a4000 0x400>; |
| 591 | interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; |
| 592 | ti,hwmods = "spi3"; |
| 593 | #address-cells = <1>; |
| 594 | #size-cells = <0>; |
| 595 | status = "disabled"; |
| 596 | }; |
| 597 | |
| 598 | spi4: spi@48345000 { |
| 599 | compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; |
| 600 | reg = <0x48345000 0x400>; |
| 601 | interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; |
| 602 | ti,hwmods = "spi4"; |
| 603 | #address-cells = <1>; |
| 604 | #size-cells = <0>; |
| 605 | status = "disabled"; |
| 606 | }; |
| 607 | |
| 608 | mac: ethernet@4a100000 { |
| 609 | compatible = "ti,am4372-cpsw","ti,cpsw"; |
| 610 | reg = <0x4a100000 0x800 |
| 611 | 0x4a101200 0x100>; |
| 612 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH |
| 613 | GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH |
| 614 | GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH |
| 615 | GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; |
| 616 | #address-cells = <1>; |
| 617 | #size-cells = <1>; |
| 618 | ti,hwmods = "cpgmac0"; |
| 619 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, |
| 620 | <&dpll_clksel_mac_clk>; |
| 621 | clock-names = "fck", "cpts", "50mclk"; |
| 622 | assigned-clocks = <&dpll_clksel_mac_clk>; |
| 623 | assigned-clock-rates = <50000000>; |
| 624 | status = "disabled"; |
| 625 | cpdma_channels = <8>; |
| 626 | ale_entries = <1024>; |
| 627 | bd_ram_size = <0x2000>; |
| 628 | no_bd_ram = <0>; |
| 629 | rx_descs = <64>; |
| 630 | mac_control = <0x20>; |
| 631 | slaves = <2>; |
| 632 | active_slave = <0>; |
| 633 | cpts_clock_mult = <0x80000000>; |
| 634 | cpts_clock_shift = <29>; |
| 635 | ranges; |
| 636 | syscon = <&scm_conf>; |
| 637 | |
| 638 | davinci_mdio: mdio@4a101000 { |
| 639 | compatible = "ti,am4372-mdio","ti,davinci_mdio"; |
| 640 | reg = <0x4a101000 0x100>; |
| 641 | #address-cells = <1>; |
| 642 | #size-cells = <0>; |
| 643 | ti,hwmods = "davinci_mdio"; |
| 644 | bus_freq = <1000000>; |
| 645 | status = "disabled"; |
| 646 | }; |
| 647 | |
| 648 | cpsw_emac0: slave@4a100200 { |
| 649 | /* Filled in by U-Boot */ |
| 650 | mac-address = [ 00 00 00 00 00 00 ]; |
| 651 | }; |
| 652 | |
| 653 | cpsw_emac1: slave@4a100300 { |
| 654 | /* Filled in by U-Boot */ |
| 655 | mac-address = [ 00 00 00 00 00 00 ]; |
| 656 | }; |
| 657 | |
| 658 | phy_sel: cpsw-phy-sel@44e10650 { |
| 659 | compatible = "ti,am43xx-cpsw-phy-sel"; |
| 660 | reg= <0x44e10650 0x4>; |
| 661 | reg-names = "gmii-sel"; |
| 662 | }; |
| 663 | }; |
| 664 | |
| 665 | epwmss0: epwmss@48300000 { |
| 666 | compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; |
| 667 | reg = <0x48300000 0x10>; |
| 668 | #address-cells = <1>; |
| 669 | #size-cells = <1>; |
| 670 | ranges; |
| 671 | ti,hwmods = "epwmss0"; |
| 672 | status = "disabled"; |
| 673 | |
| 674 | ecap0: ecap@48300100 { |
| 675 | compatible = "ti,am4372-ecap","ti,am33xx-ecap"; |
| 676 | #pwm-cells = <3>; |
| 677 | reg = <0x48300100 0x80>; |
| 678 | ti,hwmods = "ecap0"; |
| 679 | status = "disabled"; |
| 680 | }; |
| 681 | |
| 682 | ehrpwm0: pwm@48300200 { |
| 683 | compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; |
| 684 | #pwm-cells = <3>; |
| 685 | reg = <0x48300200 0x80>; |
| 686 | ti,hwmods = "ehrpwm0"; |
| 687 | status = "disabled"; |
| 688 | }; |
| 689 | }; |
| 690 | |
| 691 | epwmss1: epwmss@48302000 { |
| 692 | compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; |
| 693 | reg = <0x48302000 0x10>; |
| 694 | #address-cells = <1>; |
| 695 | #size-cells = <1>; |
| 696 | ranges; |
| 697 | ti,hwmods = "epwmss1"; |
| 698 | status = "disabled"; |
| 699 | |
| 700 | ecap1: ecap@48302100 { |
| 701 | compatible = "ti,am4372-ecap","ti,am33xx-ecap"; |
| 702 | #pwm-cells = <3>; |
| 703 | reg = <0x48302100 0x80>; |
| 704 | ti,hwmods = "ecap1"; |
| 705 | status = "disabled"; |
| 706 | }; |
| 707 | |
| 708 | ehrpwm1: pwm@48302200 { |
| 709 | compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; |
| 710 | #pwm-cells = <3>; |
| 711 | reg = <0x48302200 0x80>; |
| 712 | ti,hwmods = "ehrpwm1"; |
| 713 | status = "disabled"; |
| 714 | }; |
| 715 | }; |
| 716 | |
| 717 | epwmss2: epwmss@48304000 { |
| 718 | compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; |
| 719 | reg = <0x48304000 0x10>; |
| 720 | #address-cells = <1>; |
| 721 | #size-cells = <1>; |
| 722 | ranges; |
| 723 | ti,hwmods = "epwmss2"; |
| 724 | status = "disabled"; |
| 725 | |
| 726 | ecap2: ecap@48304100 { |
| 727 | compatible = "ti,am4372-ecap","ti,am33xx-ecap"; |
| 728 | #pwm-cells = <3>; |
| 729 | reg = <0x48304100 0x80>; |
| 730 | ti,hwmods = "ecap2"; |
| 731 | status = "disabled"; |
| 732 | }; |
| 733 | |
| 734 | ehrpwm2: pwm@48304200 { |
| 735 | compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; |
| 736 | #pwm-cells = <3>; |
| 737 | reg = <0x48304200 0x80>; |
| 738 | ti,hwmods = "ehrpwm2"; |
| 739 | status = "disabled"; |
| 740 | }; |
| 741 | }; |
| 742 | |
| 743 | epwmss3: epwmss@48306000 { |
| 744 | compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; |
| 745 | reg = <0x48306000 0x10>; |
| 746 | #address-cells = <1>; |
| 747 | #size-cells = <1>; |
| 748 | ranges; |
| 749 | ti,hwmods = "epwmss3"; |
| 750 | status = "disabled"; |
| 751 | |
| 752 | ehrpwm3: pwm@48306200 { |
| 753 | compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; |
| 754 | #pwm-cells = <3>; |
| 755 | reg = <0x48306200 0x80>; |
| 756 | ti,hwmods = "ehrpwm3"; |
| 757 | status = "disabled"; |
| 758 | }; |
| 759 | }; |
| 760 | |
| 761 | epwmss4: epwmss@48308000 { |
| 762 | compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; |
| 763 | reg = <0x48308000 0x10>; |
| 764 | #address-cells = <1>; |
| 765 | #size-cells = <1>; |
| 766 | ranges; |
| 767 | ti,hwmods = "epwmss4"; |
| 768 | status = "disabled"; |
| 769 | |
| 770 | ehrpwm4: pwm@48308200 { |
| 771 | compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; |
| 772 | #pwm-cells = <3>; |
| 773 | reg = <0x48308200 0x80>; |
| 774 | ti,hwmods = "ehrpwm4"; |
| 775 | status = "disabled"; |
| 776 | }; |
| 777 | }; |
| 778 | |
| 779 | epwmss5: epwmss@4830a000 { |
| 780 | compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; |
| 781 | reg = <0x4830a000 0x10>; |
| 782 | #address-cells = <1>; |
| 783 | #size-cells = <1>; |
| 784 | ranges; |
| 785 | ti,hwmods = "epwmss5"; |
| 786 | status = "disabled"; |
| 787 | |
| 788 | ehrpwm5: pwm@4830a200 { |
| 789 | compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; |
| 790 | #pwm-cells = <3>; |
| 791 | reg = <0x4830a200 0x80>; |
| 792 | ti,hwmods = "ehrpwm5"; |
| 793 | status = "disabled"; |
| 794 | }; |
| 795 | }; |
| 796 | |
| 797 | tscadc: tscadc@44e0d000 { |
| 798 | compatible = "ti,am3359-tscadc"; |
| 799 | reg = <0x44e0d000 0x1000>; |
| 800 | ti,hwmods = "adc_tsc"; |
| 801 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 802 | clocks = <&adc_tsc_fck>; |
| 803 | clock-names = "fck"; |
| 804 | status = "disabled"; |
| 805 | |
| 806 | tsc { |
| 807 | compatible = "ti,am3359-tsc"; |
| 808 | }; |
| 809 | |
| 810 | adc { |
| 811 | #io-channel-cells = <1>; |
| 812 | compatible = "ti,am3359-adc"; |
| 813 | }; |
| 814 | |
| 815 | }; |
| 816 | |
| 817 | sham: sham@53100000 { |
| 818 | compatible = "ti,omap5-sham"; |
| 819 | ti,hwmods = "sham"; |
| 820 | reg = <0x53100000 0x300>; |
| 821 | dmas = <&edma 36 0>; |
| 822 | dma-names = "rx"; |
| 823 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |
| 824 | }; |
| 825 | |
| 826 | aes: aes@53501000 { |
| 827 | compatible = "ti,omap4-aes"; |
| 828 | ti,hwmods = "aes"; |
| 829 | reg = <0x53501000 0xa0>; |
| 830 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; |
| 831 | dmas = <&edma 6 0>, |
| 832 | <&edma 5 0>; |
| 833 | dma-names = "tx", "rx"; |
| 834 | }; |
| 835 | |
| 836 | des: des@53701000 { |
| 837 | compatible = "ti,omap4-des"; |
| 838 | ti,hwmods = "des"; |
| 839 | reg = <0x53701000 0xa0>; |
| 840 | interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; |
| 841 | dmas = <&edma 34 0>, |
| 842 | <&edma 33 0>; |
| 843 | dma-names = "tx", "rx"; |
| 844 | }; |
| 845 | |
| 846 | mcasp0: mcasp@48038000 { |
| 847 | compatible = "ti,am33xx-mcasp-audio"; |
| 848 | ti,hwmods = "mcasp0"; |
| 849 | reg = <0x48038000 0x2000>, |
| 850 | <0x46000000 0x400000>; |
| 851 | reg-names = "mpu", "dat"; |
| 852 | interrupts = <80>, <81>; |
| 853 | interrupt-names = "tx", "rx"; |
| 854 | status = "disabled"; |
| 855 | dmas = <&edma 8 2>, |
| 856 | <&edma 9 2>; |
| 857 | dma-names = "tx", "rx"; |
| 858 | }; |
| 859 | |
| 860 | mcasp1: mcasp@4803C000 { |
| 861 | compatible = "ti,am33xx-mcasp-audio"; |
| 862 | ti,hwmods = "mcasp1"; |
| 863 | reg = <0x4803C000 0x2000>, |
| 864 | <0x46400000 0x400000>; |
| 865 | reg-names = "mpu", "dat"; |
| 866 | interrupts = <82>, <83>; |
| 867 | interrupt-names = "tx", "rx"; |
| 868 | status = "disabled"; |
| 869 | dmas = <&edma 10 2>, |
| 870 | <&edma 11 2>; |
| 871 | dma-names = "tx", "rx"; |
| 872 | }; |
| 873 | |
| 874 | elm: elm@48080000 { |
| 875 | compatible = "ti,am3352-elm"; |
| 876 | reg = <0x48080000 0x2000>; |
| 877 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
| 878 | ti,hwmods = "elm"; |
| 879 | clocks = <&l4ls_gclk>; |
| 880 | clock-names = "fck"; |
| 881 | status = "disabled"; |
| 882 | }; |
| 883 | |
| 884 | gpmc: gpmc@50000000 { |
| 885 | compatible = "ti,am3352-gpmc"; |
| 886 | ti,hwmods = "gpmc"; |
| 887 | dmas = <&edma 52 0>; |
| 888 | dma-names = "rxtx"; |
| 889 | clocks = <&l3s_gclk>; |
| 890 | clock-names = "fck"; |
| 891 | reg = <0x50000000 0x2000>; |
| 892 | interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; |
| 893 | gpmc,num-cs = <7>; |
| 894 | gpmc,num-waitpins = <2>; |
| 895 | #address-cells = <2>; |
| 896 | #size-cells = <1>; |
| 897 | interrupt-controller; |
| 898 | #interrupt-cells = <2>; |
| 899 | gpio-controller; |
| 900 | #gpio-cells = <2>; |
| 901 | status = "disabled"; |
| 902 | }; |
| 903 | |
| 904 | ocp2scp0: ocp2scp@483a8000 { |
| 905 | compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; |
| 906 | #address-cells = <1>; |
| 907 | #size-cells = <1>; |
| 908 | ranges; |
| 909 | ti,hwmods = "ocp2scp0"; |
| 910 | |
| 911 | usb2_phy1: phy@483a8000 { |
| 912 | compatible = "ti,am437x-usb2"; |
| 913 | reg = <0x483a8000 0x8000>; |
| 914 | syscon-phy-power = <&scm_conf 0x620>; |
| 915 | clocks = <&usb_phy0_always_on_clk32k>, |
| 916 | <&usb_otg_ss0_refclk960m>; |
| 917 | clock-names = "wkupclk", "refclk"; |
| 918 | #phy-cells = <0>; |
| 919 | status = "disabled"; |
| 920 | }; |
| 921 | }; |
| 922 | |
| 923 | ocp2scp1: ocp2scp@483e8000 { |
| 924 | compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; |
| 925 | #address-cells = <1>; |
| 926 | #size-cells = <1>; |
| 927 | ranges; |
| 928 | ti,hwmods = "ocp2scp1"; |
| 929 | |
| 930 | usb2_phy2: phy@483e8000 { |
| 931 | compatible = "ti,am437x-usb2"; |
| 932 | reg = <0x483e8000 0x8000>; |
| 933 | syscon-phy-power = <&scm_conf 0x628>; |
| 934 | clocks = <&usb_phy1_always_on_clk32k>, |
| 935 | <&usb_otg_ss1_refclk960m>; |
| 936 | clock-names = "wkupclk", "refclk"; |
| 937 | #phy-cells = <0>; |
| 938 | status = "disabled"; |
| 939 | }; |
| 940 | }; |
| 941 | |
| 942 | dwc3_1: omap_dwc3@48380000 { |
| 943 | compatible = "ti,am437x-dwc3"; |
| 944 | ti,hwmods = "usb_otg_ss0"; |
| 945 | reg = <0x48380000 0x10000>; |
| 946 | interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; |
| 947 | #address-cells = <1>; |
| 948 | #size-cells = <1>; |
| 949 | utmi-mode = <1>; |
| 950 | ranges; |
| 951 | |
| 952 | usb1: usb@48390000 { |
| 953 | compatible = "synopsys,dwc3"; |
| 954 | reg = <0x48390000 0x10000>; |
| 955 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, |
| 956 | <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, |
| 957 | <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; |
| 958 | interrupt-names = "peripheral", |
| 959 | "host", |
| 960 | "otg"; |
| 961 | phys = <&usb2_phy1>; |
| 962 | phy-names = "usb2-phy"; |
| 963 | maximum-speed = "high-speed"; |
| 964 | dr_mode = "otg"; |
| 965 | status = "disabled"; |
| 966 | snps,dis_u3_susphy_quirk; |
| 967 | snps,dis_u2_susphy_quirk; |
| 968 | }; |
| 969 | }; |
| 970 | |
| 971 | dwc3_2: omap_dwc3@483c0000 { |
| 972 | compatible = "ti,am437x-dwc3"; |
| 973 | ti,hwmods = "usb_otg_ss1"; |
| 974 | reg = <0x483c0000 0x10000>; |
| 975 | interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; |
| 976 | #address-cells = <1>; |
| 977 | #size-cells = <1>; |
| 978 | utmi-mode = <1>; |
| 979 | ranges; |
| 980 | |
| 981 | usb2: usb@483d0000 { |
| 982 | compatible = "synopsys,dwc3"; |
| 983 | reg = <0x483d0000 0x10000>; |
| 984 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, |
| 985 | <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, |
| 986 | <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; |
| 987 | interrupt-names = "peripheral", |
| 988 | "host", |
| 989 | "otg"; |
| 990 | phys = <&usb2_phy2>; |
| 991 | phy-names = "usb2-phy"; |
| 992 | maximum-speed = "high-speed"; |
| 993 | dr_mode = "otg"; |
| 994 | status = "disabled"; |
| 995 | snps,dis_u3_susphy_quirk; |
| 996 | snps,dis_u2_susphy_quirk; |
| 997 | }; |
| 998 | }; |
| 999 | |
| 1000 | qspi: qspi@47900000 { |
| 1001 | compatible = "ti,am4372-qspi"; |
| 1002 | reg = <0x47900000 0x100>, |
| 1003 | <0x30000000 0x4000000>; |
| 1004 | reg-names = "qspi_base", "qspi_mmap"; |
| 1005 | #address-cells = <1>; |
| 1006 | #size-cells = <0>; |
| 1007 | ti,hwmods = "qspi"; |
| 1008 | interrupts = <0 138 0x4>; |
| 1009 | num-cs = <4>; |
| 1010 | status = "disabled"; |
| 1011 | }; |
| 1012 | |
| 1013 | hdq: hdq@48347000 { |
| 1014 | compatible = "ti,am4372-hdq"; |
| 1015 | reg = <0x48347000 0x1000>; |
| 1016 | interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; |
| 1017 | clocks = <&func_12m_clk>; |
| 1018 | clock-names = "fck"; |
| 1019 | ti,hwmods = "hdq1w"; |
| 1020 | status = "disabled"; |
| 1021 | }; |
| 1022 | |
| 1023 | dss: dss@4832a000 { |
| 1024 | compatible = "ti,omap3-dss"; |
| 1025 | reg = <0x4832a000 0x200>; |
| 1026 | status = "disabled"; |
| 1027 | ti,hwmods = "dss_core"; |
| 1028 | clocks = <&disp_clk>; |
| 1029 | clock-names = "fck"; |
| 1030 | #address-cells = <1>; |
| 1031 | #size-cells = <1>; |
| 1032 | ranges; |
| 1033 | |
| 1034 | dispc: dispc@4832a400 { |
| 1035 | compatible = "ti,omap3-dispc"; |
| 1036 | reg = <0x4832a400 0x400>; |
| 1037 | interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; |
| 1038 | ti,hwmods = "dss_dispc"; |
| 1039 | clocks = <&disp_clk>; |
| 1040 | clock-names = "fck"; |
| 1041 | }; |
| 1042 | |
| 1043 | rfbi: rfbi@4832a800 { |
| 1044 | compatible = "ti,omap3-rfbi"; |
| 1045 | reg = <0x4832a800 0x100>; |
| 1046 | ti,hwmods = "dss_rfbi"; |
| 1047 | clocks = <&disp_clk>; |
| 1048 | clock-names = "fck"; |
| 1049 | status = "disabled"; |
| 1050 | }; |
| 1051 | }; |
| 1052 | |
| 1053 | ocmcram: ocmcram@40300000 { |
| 1054 | compatible = "mmio-sram"; |
| 1055 | reg = <0x40300000 0x40000>; /* 256k */ |
| 1056 | }; |
| 1057 | |
| 1058 | dcan0: can@481cc000 { |
| 1059 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
| 1060 | ti,hwmods = "d_can0"; |
| 1061 | clocks = <&dcan0_fck>; |
| 1062 | clock-names = "fck"; |
| 1063 | reg = <0x481cc000 0x2000>; |
| 1064 | syscon-raminit = <&scm_conf 0x644 0>; |
| 1065 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; |
| 1066 | status = "disabled"; |
| 1067 | }; |
| 1068 | |
| 1069 | dcan1: can@481d0000 { |
| 1070 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
| 1071 | ti,hwmods = "d_can1"; |
| 1072 | clocks = <&dcan1_fck>; |
| 1073 | clock-names = "fck"; |
| 1074 | reg = <0x481d0000 0x2000>; |
| 1075 | syscon-raminit = <&scm_conf 0x644 1>; |
| 1076 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
| 1077 | status = "disabled"; |
| 1078 | }; |
| 1079 | |
| 1080 | vpfe0: vpfe@48326000 { |
| 1081 | compatible = "ti,am437x-vpfe"; |
| 1082 | reg = <0x48326000 0x2000>; |
| 1083 | interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
| 1084 | ti,hwmods = "vpfe0"; |
| 1085 | status = "disabled"; |
| 1086 | }; |
| 1087 | |
| 1088 | vpfe1: vpfe@48328000 { |
| 1089 | compatible = "ti,am437x-vpfe"; |
| 1090 | reg = <0x48328000 0x2000>; |
| 1091 | interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; |
| 1092 | ti,hwmods = "vpfe1"; |
| 1093 | status = "disabled"; |
| 1094 | }; |
| 1095 | }; |
| 1096 | }; |
| 1097 | |
| 1098 | /include/ "am43xx-clocks.dtsi" |