| 1 | /* |
| 2 | * Copyright 2012 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
| 13 | #include <dt-bindings/gpio/gpio.h> |
| 14 | #include <dt-bindings/input/input.h> |
| 15 | |
| 16 | / { |
| 17 | chosen { |
| 18 | stdout-path = &uart1; |
| 19 | }; |
| 20 | |
| 21 | memory { |
| 22 | reg = <0x10000000 0x40000000>; |
| 23 | }; |
| 24 | |
| 25 | regulators { |
| 26 | compatible = "simple-bus"; |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <0>; |
| 29 | |
| 30 | reg_usb_otg_vbus: regulator@0 { |
| 31 | compatible = "regulator-fixed"; |
| 32 | reg = <0>; |
| 33 | regulator-name = "usb_otg_vbus"; |
| 34 | regulator-min-microvolt = <5000000>; |
| 35 | regulator-max-microvolt = <5000000>; |
| 36 | gpio = <&gpio3 22 0>; |
| 37 | enable-active-high; |
| 38 | vin-supply = <&swbst_reg>; |
| 39 | }; |
| 40 | |
| 41 | reg_usb_h1_vbus: regulator@1 { |
| 42 | compatible = "regulator-fixed"; |
| 43 | reg = <1>; |
| 44 | regulator-name = "usb_h1_vbus"; |
| 45 | regulator-min-microvolt = <5000000>; |
| 46 | regulator-max-microvolt = <5000000>; |
| 47 | gpio = <&gpio1 29 0>; |
| 48 | enable-active-high; |
| 49 | vin-supply = <&swbst_reg>; |
| 50 | }; |
| 51 | |
| 52 | reg_audio: regulator@2 { |
| 53 | compatible = "regulator-fixed"; |
| 54 | reg = <2>; |
| 55 | regulator-name = "wm8962-supply"; |
| 56 | gpio = <&gpio4 10 0>; |
| 57 | enable-active-high; |
| 58 | }; |
| 59 | |
| 60 | reg_pcie: regulator@3 { |
| 61 | compatible = "regulator-fixed"; |
| 62 | reg = <3>; |
| 63 | pinctrl-names = "default"; |
| 64 | pinctrl-0 = <&pinctrl_pcie_reg>; |
| 65 | regulator-name = "MPCIE_3V3"; |
| 66 | regulator-min-microvolt = <3300000>; |
| 67 | regulator-max-microvolt = <3300000>; |
| 68 | gpio = <&gpio3 19 0>; |
| 69 | regulator-always-on; |
| 70 | enable-active-high; |
| 71 | }; |
| 72 | }; |
| 73 | |
| 74 | gpio-keys { |
| 75 | compatible = "gpio-keys"; |
| 76 | pinctrl-names = "default"; |
| 77 | pinctrl-0 = <&pinctrl_gpio_keys>; |
| 78 | |
| 79 | power { |
| 80 | label = "Power Button"; |
| 81 | gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; |
| 82 | wakeup-source; |
| 83 | linux,code = <KEY_POWER>; |
| 84 | }; |
| 85 | |
| 86 | volume-up { |
| 87 | label = "Volume Up"; |
| 88 | gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; |
| 89 | wakeup-source; |
| 90 | linux,code = <KEY_VOLUMEUP>; |
| 91 | }; |
| 92 | |
| 93 | volume-down { |
| 94 | label = "Volume Down"; |
| 95 | gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; |
| 96 | wakeup-source; |
| 97 | linux,code = <KEY_VOLUMEDOWN>; |
| 98 | }; |
| 99 | }; |
| 100 | |
| 101 | sound { |
| 102 | compatible = "fsl,imx6q-sabresd-wm8962", |
| 103 | "fsl,imx-audio-wm8962"; |
| 104 | model = "wm8962-audio"; |
| 105 | ssi-controller = <&ssi2>; |
| 106 | audio-codec = <&codec>; |
| 107 | audio-routing = |
| 108 | "Headphone Jack", "HPOUTL", |
| 109 | "Headphone Jack", "HPOUTR", |
| 110 | "Ext Spk", "SPKOUTL", |
| 111 | "Ext Spk", "SPKOUTR", |
| 112 | "AMIC", "MICBIAS", |
| 113 | "IN3R", "AMIC"; |
| 114 | mux-int-port = <2>; |
| 115 | mux-ext-port = <3>; |
| 116 | }; |
| 117 | |
| 118 | backlight_lvds: backlight-lvds { |
| 119 | compatible = "pwm-backlight"; |
| 120 | pwms = <&pwm1 0 5000000>; |
| 121 | brightness-levels = <0 4 8 16 32 64 128 255>; |
| 122 | default-brightness-level = <7>; |
| 123 | status = "okay"; |
| 124 | }; |
| 125 | |
| 126 | leds { |
| 127 | compatible = "gpio-leds"; |
| 128 | pinctrl-names = "default"; |
| 129 | pinctrl-0 = <&pinctrl_gpio_leds>; |
| 130 | |
| 131 | red { |
| 132 | gpios = <&gpio1 2 0>; |
| 133 | default-state = "on"; |
| 134 | }; |
| 135 | }; |
| 136 | |
| 137 | panel { |
| 138 | compatible = "hannstar,hsd100pxn1"; |
| 139 | backlight = <&backlight_lvds>; |
| 140 | |
| 141 | port { |
| 142 | panel_in: endpoint { |
| 143 | remote-endpoint = <&lvds0_out>; |
| 144 | }; |
| 145 | }; |
| 146 | }; |
| 147 | }; |
| 148 | |
| 149 | &audmux { |
| 150 | pinctrl-names = "default"; |
| 151 | pinctrl-0 = <&pinctrl_audmux>; |
| 152 | status = "okay"; |
| 153 | }; |
| 154 | |
| 155 | &clks { |
| 156 | assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, |
| 157 | <&clks IMX6QDL_CLK_LDB_DI1_SEL>; |
| 158 | assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, |
| 159 | <&clks IMX6QDL_CLK_PLL3_USB_OTG>; |
| 160 | }; |
| 161 | |
| 162 | &ecspi1 { |
| 163 | fsl,spi-num-chipselects = <1>; |
| 164 | cs-gpios = <&gpio4 9 0>; |
| 165 | pinctrl-names = "default"; |
| 166 | pinctrl-0 = <&pinctrl_ecspi1>; |
| 167 | status = "okay"; |
| 168 | |
| 169 | flash: m25p80@0 { |
| 170 | #address-cells = <1>; |
| 171 | #size-cells = <1>; |
| 172 | compatible = "st,m25p32", "jedec,spi-nor"; |
| 173 | spi-max-frequency = <20000000>; |
| 174 | reg = <0>; |
| 175 | }; |
| 176 | }; |
| 177 | |
| 178 | &fec { |
| 179 | pinctrl-names = "default"; |
| 180 | pinctrl-0 = <&pinctrl_enet>; |
| 181 | phy-mode = "rgmii"; |
| 182 | phy-reset-gpios = <&gpio1 25 0>; |
| 183 | status = "okay"; |
| 184 | }; |
| 185 | |
| 186 | &hdmi { |
| 187 | ddc-i2c-bus = <&i2c2>; |
| 188 | status = "okay"; |
| 189 | }; |
| 190 | |
| 191 | &i2c1 { |
| 192 | clock-frequency = <100000>; |
| 193 | pinctrl-names = "default"; |
| 194 | pinctrl-0 = <&pinctrl_i2c1>; |
| 195 | status = "okay"; |
| 196 | |
| 197 | codec: wm8962@1a { |
| 198 | compatible = "wlf,wm8962"; |
| 199 | reg = <0x1a>; |
| 200 | clocks = <&clks IMX6QDL_CLK_CKO>; |
| 201 | DCVDD-supply = <®_audio>; |
| 202 | DBVDD-supply = <®_audio>; |
| 203 | AVDD-supply = <®_audio>; |
| 204 | CPVDD-supply = <®_audio>; |
| 205 | MICVDD-supply = <®_audio>; |
| 206 | PLLVDD-supply = <®_audio>; |
| 207 | SPKVDD1-supply = <®_audio>; |
| 208 | SPKVDD2-supply = <®_audio>; |
| 209 | gpio-cfg = < |
| 210 | 0x0000 /* 0:Default */ |
| 211 | 0x0000 /* 1:Default */ |
| 212 | 0x0013 /* 2:FN_DMICCLK */ |
| 213 | 0x0000 /* 3:Default */ |
| 214 | 0x8014 /* 4:FN_DMICCDAT */ |
| 215 | 0x0000 /* 5:Default */ |
| 216 | >; |
| 217 | }; |
| 218 | }; |
| 219 | |
| 220 | &i2c2 { |
| 221 | clock-frequency = <100000>; |
| 222 | pinctrl-names = "default"; |
| 223 | pinctrl-0 = <&pinctrl_i2c2>; |
| 224 | status = "okay"; |
| 225 | |
| 226 | pmic: pfuze100@08 { |
| 227 | compatible = "fsl,pfuze100"; |
| 228 | reg = <0x08>; |
| 229 | |
| 230 | regulators { |
| 231 | sw1a_reg: sw1ab { |
| 232 | regulator-min-microvolt = <300000>; |
| 233 | regulator-max-microvolt = <1875000>; |
| 234 | regulator-boot-on; |
| 235 | regulator-always-on; |
| 236 | regulator-ramp-delay = <6250>; |
| 237 | }; |
| 238 | |
| 239 | sw1c_reg: sw1c { |
| 240 | regulator-min-microvolt = <300000>; |
| 241 | regulator-max-microvolt = <1875000>; |
| 242 | regulator-boot-on; |
| 243 | regulator-always-on; |
| 244 | regulator-ramp-delay = <6250>; |
| 245 | }; |
| 246 | |
| 247 | sw2_reg: sw2 { |
| 248 | regulator-min-microvolt = <800000>; |
| 249 | regulator-max-microvolt = <3300000>; |
| 250 | regulator-boot-on; |
| 251 | regulator-always-on; |
| 252 | regulator-ramp-delay = <6250>; |
| 253 | }; |
| 254 | |
| 255 | sw3a_reg: sw3a { |
| 256 | regulator-min-microvolt = <400000>; |
| 257 | regulator-max-microvolt = <1975000>; |
| 258 | regulator-boot-on; |
| 259 | regulator-always-on; |
| 260 | }; |
| 261 | |
| 262 | sw3b_reg: sw3b { |
| 263 | regulator-min-microvolt = <400000>; |
| 264 | regulator-max-microvolt = <1975000>; |
| 265 | regulator-boot-on; |
| 266 | regulator-always-on; |
| 267 | }; |
| 268 | |
| 269 | sw4_reg: sw4 { |
| 270 | regulator-min-microvolt = <800000>; |
| 271 | regulator-max-microvolt = <3300000>; |
| 272 | }; |
| 273 | |
| 274 | swbst_reg: swbst { |
| 275 | regulator-min-microvolt = <5000000>; |
| 276 | regulator-max-microvolt = <5150000>; |
| 277 | }; |
| 278 | |
| 279 | snvs_reg: vsnvs { |
| 280 | regulator-min-microvolt = <1000000>; |
| 281 | regulator-max-microvolt = <3000000>; |
| 282 | regulator-boot-on; |
| 283 | regulator-always-on; |
| 284 | }; |
| 285 | |
| 286 | vref_reg: vrefddr { |
| 287 | regulator-boot-on; |
| 288 | regulator-always-on; |
| 289 | }; |
| 290 | |
| 291 | vgen1_reg: vgen1 { |
| 292 | regulator-min-microvolt = <800000>; |
| 293 | regulator-max-microvolt = <1550000>; |
| 294 | }; |
| 295 | |
| 296 | vgen2_reg: vgen2 { |
| 297 | regulator-min-microvolt = <800000>; |
| 298 | regulator-max-microvolt = <1550000>; |
| 299 | }; |
| 300 | |
| 301 | vgen3_reg: vgen3 { |
| 302 | regulator-min-microvolt = <1800000>; |
| 303 | regulator-max-microvolt = <3300000>; |
| 304 | }; |
| 305 | |
| 306 | vgen4_reg: vgen4 { |
| 307 | regulator-min-microvolt = <1800000>; |
| 308 | regulator-max-microvolt = <3300000>; |
| 309 | regulator-always-on; |
| 310 | }; |
| 311 | |
| 312 | vgen5_reg: vgen5 { |
| 313 | regulator-min-microvolt = <1800000>; |
| 314 | regulator-max-microvolt = <3300000>; |
| 315 | regulator-always-on; |
| 316 | }; |
| 317 | |
| 318 | vgen6_reg: vgen6 { |
| 319 | regulator-min-microvolt = <1800000>; |
| 320 | regulator-max-microvolt = <3300000>; |
| 321 | regulator-always-on; |
| 322 | }; |
| 323 | }; |
| 324 | }; |
| 325 | }; |
| 326 | |
| 327 | &i2c3 { |
| 328 | clock-frequency = <100000>; |
| 329 | pinctrl-names = "default"; |
| 330 | pinctrl-0 = <&pinctrl_i2c3>; |
| 331 | status = "okay"; |
| 332 | |
| 333 | egalax_ts@04 { |
| 334 | compatible = "eeti,egalax_ts"; |
| 335 | reg = <0x04>; |
| 336 | interrupt-parent = <&gpio6>; |
| 337 | interrupts = <7 2>; |
| 338 | wakeup-gpios = <&gpio6 7 0>; |
| 339 | }; |
| 340 | }; |
| 341 | |
| 342 | &iomuxc { |
| 343 | pinctrl-names = "default"; |
| 344 | pinctrl-0 = <&pinctrl_hog>; |
| 345 | |
| 346 | imx6qdl-sabresd { |
| 347 | pinctrl_hog: hoggrp { |
| 348 | fsl,pins = < |
| 349 | MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 |
| 350 | MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 |
| 351 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 |
| 352 | MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 |
| 353 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 |
| 354 | MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0 |
| 355 | MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 |
| 356 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 |
| 357 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 |
| 358 | >; |
| 359 | }; |
| 360 | |
| 361 | pinctrl_audmux: audmuxgrp { |
| 362 | fsl,pins = < |
| 363 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
| 364 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 |
| 365 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 |
| 366 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 |
| 367 | >; |
| 368 | }; |
| 369 | |
| 370 | pinctrl_ecspi1: ecspi1grp { |
| 371 | fsl,pins = < |
| 372 | MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 |
| 373 | MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 |
| 374 | MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 |
| 375 | MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 |
| 376 | >; |
| 377 | }; |
| 378 | |
| 379 | pinctrl_enet: enetgrp { |
| 380 | fsl,pins = < |
| 381 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
| 382 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
| 383 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 |
| 384 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 |
| 385 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 |
| 386 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 |
| 387 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 |
| 388 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 |
| 389 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
| 390 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
| 391 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
| 392 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
| 393 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
| 394 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
| 395 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
| 396 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
| 397 | >; |
| 398 | }; |
| 399 | |
| 400 | pinctrl_gpio_keys: gpio_keysgrp { |
| 401 | fsl,pins = < |
| 402 | MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 |
| 403 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 |
| 404 | MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 |
| 405 | >; |
| 406 | }; |
| 407 | |
| 408 | pinctrl_i2c1: i2c1grp { |
| 409 | fsl,pins = < |
| 410 | MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 |
| 411 | MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 |
| 412 | >; |
| 413 | }; |
| 414 | |
| 415 | pinctrl_i2c2: i2c2grp { |
| 416 | fsl,pins = < |
| 417 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| 418 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| 419 | >; |
| 420 | }; |
| 421 | |
| 422 | pinctrl_i2c3: i2c3grp { |
| 423 | fsl,pins = < |
| 424 | MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 |
| 425 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
| 426 | >; |
| 427 | }; |
| 428 | |
| 429 | pinctrl_pcie: pciegrp { |
| 430 | fsl,pins = < |
| 431 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 |
| 432 | >; |
| 433 | }; |
| 434 | |
| 435 | pinctrl_pcie_reg: pciereggrp { |
| 436 | fsl,pins = < |
| 437 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 |
| 438 | >; |
| 439 | }; |
| 440 | |
| 441 | pinctrl_pwm1: pwm1grp { |
| 442 | fsl,pins = < |
| 443 | MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 |
| 444 | >; |
| 445 | }; |
| 446 | |
| 447 | pinctrl_uart1: uart1grp { |
| 448 | fsl,pins = < |
| 449 | MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |
| 450 | MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 |
| 451 | >; |
| 452 | }; |
| 453 | |
| 454 | pinctrl_usbotg: usbotggrp { |
| 455 | fsl,pins = < |
| 456 | MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |
| 457 | >; |
| 458 | }; |
| 459 | |
| 460 | pinctrl_usdhc2: usdhc2grp { |
| 461 | fsl,pins = < |
| 462 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 |
| 463 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 |
| 464 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 |
| 465 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 |
| 466 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 |
| 467 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 |
| 468 | MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 |
| 469 | MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 |
| 470 | MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 |
| 471 | MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 |
| 472 | >; |
| 473 | }; |
| 474 | |
| 475 | pinctrl_usdhc3: usdhc3grp { |
| 476 | fsl,pins = < |
| 477 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| 478 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| 479 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| 480 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| 481 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| 482 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| 483 | MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 |
| 484 | MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 |
| 485 | MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 |
| 486 | MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 |
| 487 | >; |
| 488 | }; |
| 489 | |
| 490 | pinctrl_usdhc4: usdhc4grp { |
| 491 | fsl,pins = < |
| 492 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 |
| 493 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 |
| 494 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 |
| 495 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 |
| 496 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 |
| 497 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 |
| 498 | MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 |
| 499 | MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 |
| 500 | MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 |
| 501 | MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 |
| 502 | >; |
| 503 | }; |
| 504 | }; |
| 505 | |
| 506 | gpio_leds { |
| 507 | pinctrl_gpio_leds: gpioledsgrp { |
| 508 | fsl,pins = < |
| 509 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 |
| 510 | >; |
| 511 | }; |
| 512 | }; |
| 513 | }; |
| 514 | |
| 515 | &ldb { |
| 516 | status = "okay"; |
| 517 | |
| 518 | lvds-channel@1 { |
| 519 | fsl,data-mapping = "spwg"; |
| 520 | fsl,data-width = <18>; |
| 521 | status = "okay"; |
| 522 | |
| 523 | port@4 { |
| 524 | reg = <4>; |
| 525 | |
| 526 | lvds0_out: endpoint { |
| 527 | remote-endpoint = <&panel_in>; |
| 528 | }; |
| 529 | }; |
| 530 | }; |
| 531 | }; |
| 532 | |
| 533 | &pcie { |
| 534 | pinctrl-names = "default"; |
| 535 | pinctrl-0 = <&pinctrl_pcie>; |
| 536 | reset-gpio = <&gpio7 12 0>; |
| 537 | status = "okay"; |
| 538 | }; |
| 539 | |
| 540 | &pwm1 { |
| 541 | pinctrl-names = "default"; |
| 542 | pinctrl-0 = <&pinctrl_pwm1>; |
| 543 | status = "okay"; |
| 544 | }; |
| 545 | |
| 546 | &snvs_poweroff { |
| 547 | status = "okay"; |
| 548 | }; |
| 549 | |
| 550 | &ssi2 { |
| 551 | status = "okay"; |
| 552 | }; |
| 553 | |
| 554 | &uart1 { |
| 555 | pinctrl-names = "default"; |
| 556 | pinctrl-0 = <&pinctrl_uart1>; |
| 557 | status = "okay"; |
| 558 | }; |
| 559 | |
| 560 | &usbh1 { |
| 561 | vbus-supply = <®_usb_h1_vbus>; |
| 562 | status = "okay"; |
| 563 | }; |
| 564 | |
| 565 | &usbotg { |
| 566 | vbus-supply = <®_usb_otg_vbus>; |
| 567 | pinctrl-names = "default"; |
| 568 | pinctrl-0 = <&pinctrl_usbotg>; |
| 569 | disable-over-current; |
| 570 | status = "okay"; |
| 571 | }; |
| 572 | |
| 573 | &usdhc2 { |
| 574 | pinctrl-names = "default"; |
| 575 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 576 | bus-width = <8>; |
| 577 | cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; |
| 578 | wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
| 579 | status = "okay"; |
| 580 | }; |
| 581 | |
| 582 | &usdhc3 { |
| 583 | pinctrl-names = "default"; |
| 584 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 585 | bus-width = <8>; |
| 586 | cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; |
| 587 | wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; |
| 588 | status = "okay"; |
| 589 | }; |
| 590 | |
| 591 | &usdhc4 { |
| 592 | pinctrl-names = "default"; |
| 593 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 594 | bus-width = <8>; |
| 595 | non-removable; |
| 596 | no-1-8-v; |
| 597 | status = "okay"; |
| 598 | }; |