| 1 | #ifndef __MACH_IMX_CLK_H |
| 2 | #define __MACH_IMX_CLK_H |
| 3 | |
| 4 | #include <linux/spinlock.h> |
| 5 | #include <linux/clk-provider.h> |
| 6 | |
| 7 | extern spinlock_t imx_ccm_lock; |
| 8 | |
| 9 | void imx_check_clocks(struct clk *clks[], unsigned int count); |
| 10 | |
| 11 | extern void imx_cscmr1_fixup(u32 *val); |
| 12 | |
| 13 | struct clk *imx_clk_pllv1(const char *name, const char *parent, |
| 14 | void __iomem *base); |
| 15 | |
| 16 | struct clk *imx_clk_pllv2(const char *name, const char *parent, |
| 17 | void __iomem *base); |
| 18 | |
| 19 | enum imx_pllv3_type { |
| 20 | IMX_PLLV3_GENERIC, |
| 21 | IMX_PLLV3_SYS, |
| 22 | IMX_PLLV3_USB, |
| 23 | IMX_PLLV3_AV, |
| 24 | IMX_PLLV3_ENET, |
| 25 | }; |
| 26 | |
| 27 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, |
| 28 | const char *parent_name, void __iomem *base, u32 div_mask); |
| 29 | |
| 30 | struct clk *clk_register_gate2(struct device *dev, const char *name, |
| 31 | const char *parent_name, unsigned long flags, |
| 32 | void __iomem *reg, u8 bit_idx, |
| 33 | u8 clk_gate_flags, spinlock_t *lock, |
| 34 | unsigned int *share_count); |
| 35 | |
| 36 | struct clk * imx_obtain_fixed_clock( |
| 37 | const char *name, unsigned long rate); |
| 38 | |
| 39 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, |
| 40 | void __iomem *reg, u8 shift) |
| 41 | { |
| 42 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 43 | shift, 0, &imx_ccm_lock, NULL); |
| 44 | } |
| 45 | |
| 46 | static inline struct clk *imx_clk_gate2_shared(const char *name, |
| 47 | const char *parent, void __iomem *reg, u8 shift, |
| 48 | unsigned int *share_count) |
| 49 | { |
| 50 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 51 | shift, 0, &imx_ccm_lock, share_count); |
| 52 | } |
| 53 | |
| 54 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, |
| 55 | void __iomem *reg, u8 idx); |
| 56 | |
| 57 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, |
| 58 | void __iomem *reg, u8 shift, u8 width, |
| 59 | void __iomem *busy_reg, u8 busy_shift); |
| 60 | |
| 61 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, |
| 62 | u8 width, void __iomem *busy_reg, u8 busy_shift, |
| 63 | const char **parent_names, int num_parents); |
| 64 | |
| 65 | struct clk *imx_clk_fixup_divider(const char *name, const char *parent, |
| 66 | void __iomem *reg, u8 shift, u8 width, |
| 67 | void (*fixup)(u32 *val)); |
| 68 | |
| 69 | struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, |
| 70 | u8 shift, u8 width, const char **parents, |
| 71 | int num_parents, void (*fixup)(u32 *val)); |
| 72 | |
| 73 | static inline struct clk *imx_clk_fixed(const char *name, int rate) |
| 74 | { |
| 75 | return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); |
| 76 | } |
| 77 | |
| 78 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, |
| 79 | void __iomem *reg, u8 shift, u8 width) |
| 80 | { |
| 81 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, |
| 82 | reg, shift, width, 0, &imx_ccm_lock); |
| 83 | } |
| 84 | |
| 85 | static inline struct clk *imx_clk_divider_flags(const char *name, |
| 86 | const char *parent, void __iomem *reg, u8 shift, u8 width, |
| 87 | unsigned long flags) |
| 88 | { |
| 89 | return clk_register_divider(NULL, name, parent, flags, |
| 90 | reg, shift, width, 0, &imx_ccm_lock); |
| 91 | } |
| 92 | |
| 93 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, |
| 94 | void __iomem *reg, u8 shift) |
| 95 | { |
| 96 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 97 | shift, 0, &imx_ccm_lock); |
| 98 | } |
| 99 | |
| 100 | static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, |
| 101 | void __iomem *reg, u8 shift) |
| 102 | { |
| 103 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 104 | shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); |
| 105 | } |
| 106 | |
| 107 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, |
| 108 | u8 shift, u8 width, const char **parents, int num_parents) |
| 109 | { |
| 110 | return clk_register_mux(NULL, name, parents, num_parents, |
| 111 | CLK_SET_RATE_NO_REPARENT, reg, shift, |
| 112 | width, 0, &imx_ccm_lock); |
| 113 | } |
| 114 | |
| 115 | static inline struct clk *imx_clk_mux_flags(const char *name, |
| 116 | void __iomem *reg, u8 shift, u8 width, const char **parents, |
| 117 | int num_parents, unsigned long flags) |
| 118 | { |
| 119 | return clk_register_mux(NULL, name, parents, num_parents, |
| 120 | flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, |
| 121 | &imx_ccm_lock); |
| 122 | } |
| 123 | |
| 124 | static inline struct clk *imx_clk_fixed_factor(const char *name, |
| 125 | const char *parent, unsigned int mult, unsigned int div) |
| 126 | { |
| 127 | return clk_register_fixed_factor(NULL, name, parent, |
| 128 | CLK_SET_RATE_PARENT, mult, div); |
| 129 | } |
| 130 | |
| 131 | #endif |