[deliverable/linux.git] / arch / arm / mach-imx / mxc.h

/*
 * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#ifndef __ASM_ARCH_MXC_H__
#define __ASM_ARCH_MXC_H__

#include <linux/types.h>

#ifndef __ASM_ARCH_MXC_HARDWARE_H__
#error "Do not include directly."
#endif

#define MXC_CPU_MX1		1
#define MXC_CPU_MX21		21
#define MXC_CPU_MX25		25
#define MXC_CPU_MX27		27
#define MXC_CPU_MX31		31
#define MXC_CPU_MX35		35
#define MXC_CPU_MX51		51
#define MXC_CPU_MX53		53
#define MXC_CPU_IMX6DL		0x61
#define MXC_CPU_IMX6Q		0x63

#define IMX_CHIP_REVISION_1_0		0x10
#define IMX_CHIP_REVISION_1_1		0x11
#define IMX_CHIP_REVISION_1_2		0x12
#define IMX_CHIP_REVISION_1_3		0x13
#define IMX_CHIP_REVISION_2_0		0x20
#define IMX_CHIP_REVISION_2_1		0x21
#define IMX_CHIP_REVISION_2_2		0x22
#define IMX_CHIP_REVISION_2_3		0x23
#define IMX_CHIP_REVISION_3_0		0x30
#define IMX_CHIP_REVISION_3_1		0x31
#define IMX_CHIP_REVISION_3_2		0x32
#define IMX_CHIP_REVISION_3_3		0x33
#define IMX_CHIP_REVISION_UNKNOWN	0xff

#ifndef __ASSEMBLY__
extern unsigned int __mxc_cpu_type;
#endif

#ifdef CONFIG_SOC_IMX1
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX1
# endif
# define cpu_is_mx1()		(mxc_cpu_type == MXC_CPU_MX1)
#else
# define cpu_is_mx1()		(0)
#endif

#ifdef CONFIG_SOC_IMX21
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX21
# endif
# define cpu_is_mx21()		(mxc_cpu_type == MXC_CPU_MX21)
#else
# define cpu_is_mx21()		(0)
#endif

#ifdef CONFIG_SOC_IMX25
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX25
# endif
# define cpu_is_mx25()		(mxc_cpu_type == MXC_CPU_MX25)
#else
# define cpu_is_mx25()		(0)
#endif

#ifdef CONFIG_SOC_IMX27
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX27
# endif
# define cpu_is_mx27()		(mxc_cpu_type == MXC_CPU_MX27)
#else
# define cpu_is_mx27()		(0)
#endif

#ifdef CONFIG_SOC_IMX31
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX31
# endif
# define cpu_is_mx31()		(mxc_cpu_type == MXC_CPU_MX31)
#else
# define cpu_is_mx31()		(0)
#endif

#ifdef CONFIG_SOC_IMX35
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX35
# endif
# define cpu_is_mx35()		(mxc_cpu_type == MXC_CPU_MX35)
#else
# define cpu_is_mx35()		(0)
#endif

#ifdef CONFIG_SOC_IMX51
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX51
# endif
# define cpu_is_mx51()		(mxc_cpu_type == MXC_CPU_MX51)
#else
# define cpu_is_mx51()		(0)
#endif

#ifdef CONFIG_SOC_IMX53
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX53
# endif
# define cpu_is_mx53()		(mxc_cpu_type == MXC_CPU_MX53)
#else
# define cpu_is_mx53()		(0)
#endif

#ifndef __ASSEMBLY__
static inline bool cpu_is_imx6dl(void)
{
	return __mxc_cpu_type == MXC_CPU_IMX6DL;
}

static inline bool cpu_is_imx6q(void)
{
	return __mxc_cpu_type == MXC_CPU_IMX6Q;
}

struct cpu_op {
	u32 cpu_rate;
};

int tzic_enable_wake(void);

extern struct cpu_op *(*get_cpu_op)(int *op);
#endif

#define cpu_is_mx3()	(cpu_is_mx31() || cpu_is_mx35())
#define cpu_is_mx2()	(cpu_is_mx21() || cpu_is_mx27())

#endif /*  __ASM_ARCH_MXC_H__ */
Commit	Line	Data
	1	/*
	2	* Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
	3	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
	20	#ifndef __ASM_ARCH_MXC_H__
	21	#define __ASM_ARCH_MXC_H__
	22
	23	#include <linux/types.h>
	24
	25	#ifndef __ASM_ARCH_MXC_HARDWARE_H__
	26	#error "Do not include directly."
	27	#endif
	28
	29	#define MXC_CPU_MX1 1
	30	#define MXC_CPU_MX21 21
	31	#define MXC_CPU_MX25 25
	32	#define MXC_CPU_MX27 27
	33	#define MXC_CPU_MX31 31
	34	#define MXC_CPU_MX35 35
	35	#define MXC_CPU_MX51 51
	36	#define MXC_CPU_MX53 53
	37	#define MXC_CPU_IMX6DL 0x61
	38	#define MXC_CPU_IMX6Q 0x63
	39
	40	#define IMX_CHIP_REVISION_1_0 0x10
	41	#define IMX_CHIP_REVISION_1_1 0x11
	42	#define IMX_CHIP_REVISION_1_2 0x12
	43	#define IMX_CHIP_REVISION_1_3 0x13
	44	#define IMX_CHIP_REVISION_2_0 0x20
	45	#define IMX_CHIP_REVISION_2_1 0x21
	46	#define IMX_CHIP_REVISION_2_2 0x22
	47	#define IMX_CHIP_REVISION_2_3 0x23
	48	#define IMX_CHIP_REVISION_3_0 0x30
	49	#define IMX_CHIP_REVISION_3_1 0x31
	50	#define IMX_CHIP_REVISION_3_2 0x32
	51	#define IMX_CHIP_REVISION_3_3 0x33
	52	#define IMX_CHIP_REVISION_UNKNOWN 0xff
	53
	54	#ifndef __ASSEMBLY__
	55	extern unsigned int __mxc_cpu_type;
	56	#endif
	57
	58	#ifdef CONFIG_SOC_IMX1
	59	# ifdef mxc_cpu_type
	60	# undef mxc_cpu_type
	61	# define mxc_cpu_type __mxc_cpu_type
	62	# else
	63	# define mxc_cpu_type MXC_CPU_MX1
	64	# endif
	65	# define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1)
	66	#else
	67	# define cpu_is_mx1() (0)
	68	#endif
	69
	70	#ifdef CONFIG_SOC_IMX21
	71	# ifdef mxc_cpu_type
	72	# undef mxc_cpu_type
	73	# define mxc_cpu_type __mxc_cpu_type
	74	# else
	75	# define mxc_cpu_type MXC_CPU_MX21
	76	# endif
	77	# define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21)
	78	#else
	79	# define cpu_is_mx21() (0)
	80	#endif
	81
	82	#ifdef CONFIG_SOC_IMX25
	83	# ifdef mxc_cpu_type
	84	# undef mxc_cpu_type
	85	# define mxc_cpu_type __mxc_cpu_type
	86	# else
	87	# define mxc_cpu_type MXC_CPU_MX25
	88	# endif
	89	# define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25)
	90	#else
	91	# define cpu_is_mx25() (0)
	92	#endif
	93
	94	#ifdef CONFIG_SOC_IMX27
	95	# ifdef mxc_cpu_type
	96	# undef mxc_cpu_type
	97	# define mxc_cpu_type __mxc_cpu_type
	98	# else
	99	# define mxc_cpu_type MXC_CPU_MX27
	100	# endif
	101	# define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27)
	102	#else
	103	# define cpu_is_mx27() (0)
	104	#endif
	105
	106	#ifdef CONFIG_SOC_IMX31
	107	# ifdef mxc_cpu_type
	108	# undef mxc_cpu_type
	109	# define mxc_cpu_type __mxc_cpu_type
	110	# else
	111	# define mxc_cpu_type MXC_CPU_MX31
	112	# endif
	113	# define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31)
	114	#else
	115	# define cpu_is_mx31() (0)
	116	#endif
	117
	118	#ifdef CONFIG_SOC_IMX35
	119	# ifdef mxc_cpu_type
	120	# undef mxc_cpu_type
	121	# define mxc_cpu_type __mxc_cpu_type
	122	# else
	123	# define mxc_cpu_type MXC_CPU_MX35
	124	# endif
	125	# define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35)
	126	#else
	127	# define cpu_is_mx35() (0)
	128	#endif
	129
	130	#ifdef CONFIG_SOC_IMX51
	131	# ifdef mxc_cpu_type
	132	# undef mxc_cpu_type
	133	# define mxc_cpu_type __mxc_cpu_type
	134	# else
	135	# define mxc_cpu_type MXC_CPU_MX51
	136	# endif
	137	# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51)
	138	#else
	139	# define cpu_is_mx51() (0)
	140	#endif
	141
	142	#ifdef CONFIG_SOC_IMX53
	143	# ifdef mxc_cpu_type
	144	# undef mxc_cpu_type
	145	# define mxc_cpu_type __mxc_cpu_type
	146	# else
	147	# define mxc_cpu_type MXC_CPU_MX53
	148	# endif
	149	# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53)
	150	#else
	151	# define cpu_is_mx53() (0)
	152	#endif
	153
	154	#ifndef __ASSEMBLY__
	155	static inline bool cpu_is_imx6dl(void)
	156	{
	157	return __mxc_cpu_type == MXC_CPU_IMX6DL;
	158	}
	159
	160	static inline bool cpu_is_imx6q(void)
	161	{
	162	return __mxc_cpu_type == MXC_CPU_IMX6Q;
	163	}
	164
	165	struct cpu_op {
	166	u32 cpu_rate;
	167	};
	168
	169	int tzic_enable_wake(void);
	170
	171	extern struct cpu_op (get_cpu_op)(int *op);
	172	#endif
	173
	174	#define cpu_is_mx3() (cpu_is_mx31() \|\| cpu_is_mx35())
	175	#define cpu_is_mx2() (cpu_is_mx21() \|\| cpu_is_mx27())
	176
	177	#endif /* __ASM_ARCH_MXC_H__ */