Merge branch 'pcmcia' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
[deliverable/linux.git] / arch / arm / mach-iop32x / iq80321.c
... / ...
CommitLineData
1/*
2 * arch/arm/mach-iop32x/iq80321.c
3 *
4 * Board support code for the Intel IQ80321 platform.
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright (C) 2004 Intel Corp.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/mm.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/string.h>
21#include <linux/serial_core.h>
22#include <linux/serial_8250.h>
23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <mach/hardware.h>
27#include <asm/irq.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/pci.h>
31#include <asm/mach/time.h>
32#include <asm/mach-types.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <mach/time.h>
36#include "gpio-iop32x.h"
37
38/*
39 * IQ80321 timer tick configuration.
40 */
41static void __init iq80321_timer_init(void)
42{
43 /* 33.333 MHz crystal. */
44 iop_init_time(200000000);
45}
46
47
48/*
49 * IQ80321 I/O.
50 */
51static struct map_desc iq80321_io_desc[] __initdata = {
52 { /* on-board devices */
53 .virtual = IQ80321_UART,
54 .pfn = __phys_to_pfn(IQ80321_UART),
55 .length = 0x00100000,
56 .type = MT_DEVICE,
57 },
58};
59
60void __init iq80321_map_io(void)
61{
62 iop3xx_map_io();
63 iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
64}
65
66
67/*
68 * IQ80321 PCI.
69 */
70static int __init
71iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
72{
73 int irq;
74
75 if ((slot == 2 || slot == 6) && pin == 1) {
76 /* PCI-X Slot INTA */
77 irq = IRQ_IOP32X_XINT2;
78 } else if ((slot == 2 || slot == 6) && pin == 2) {
79 /* PCI-X Slot INTA */
80 irq = IRQ_IOP32X_XINT3;
81 } else if ((slot == 2 || slot == 6) && pin == 3) {
82 /* PCI-X Slot INTA */
83 irq = IRQ_IOP32X_XINT0;
84 } else if ((slot == 2 || slot == 6) && pin == 4) {
85 /* PCI-X Slot INTA */
86 irq = IRQ_IOP32X_XINT1;
87 } else if (slot == 4 || slot == 8) {
88 /* Gig-E */
89 irq = IRQ_IOP32X_XINT0;
90 } else {
91 printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
92 "device PCI:%d:%d:%d\n", dev->bus->number,
93 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
94 irq = -1;
95 }
96
97 return irq;
98}
99
100static struct hw_pci iq80321_pci __initdata = {
101 .nr_controllers = 1,
102 .ops = &iop3xx_ops,
103 .setup = iop3xx_pci_setup,
104 .preinit = iop3xx_pci_preinit_cond,
105 .map_irq = iq80321_pci_map_irq,
106};
107
108static int __init iq80321_pci_init(void)
109{
110 if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
111 machine_is_iq80321())
112 pci_common_init(&iq80321_pci);
113
114 return 0;
115}
116
117subsys_initcall(iq80321_pci_init);
118
119
120/*
121 * IQ80321 machine initialisation.
122 */
123static struct physmap_flash_data iq80321_flash_data = {
124 .width = 1,
125};
126
127static struct resource iq80321_flash_resource = {
128 .start = 0xf0000000,
129 .end = 0xf07fffff,
130 .flags = IORESOURCE_MEM,
131};
132
133static struct platform_device iq80321_flash_device = {
134 .name = "physmap-flash",
135 .id = 0,
136 .dev = {
137 .platform_data = &iq80321_flash_data,
138 },
139 .num_resources = 1,
140 .resource = &iq80321_flash_resource,
141};
142
143static struct plat_serial8250_port iq80321_serial_port[] = {
144 {
145 .mapbase = IQ80321_UART,
146 .membase = (char *)IQ80321_UART,
147 .irq = IRQ_IOP32X_XINT1,
148 .flags = UPF_SKIP_TEST,
149 .iotype = UPIO_MEM,
150 .regshift = 0,
151 .uartclk = 1843200,
152 },
153 { },
154};
155
156static struct resource iq80321_uart_resource = {
157 .start = IQ80321_UART,
158 .end = IQ80321_UART + 7,
159 .flags = IORESOURCE_MEM,
160};
161
162static struct platform_device iq80321_serial_device = {
163 .name = "serial8250",
164 .id = PLAT8250_DEV_PLATFORM,
165 .dev = {
166 .platform_data = iq80321_serial_port,
167 },
168 .num_resources = 1,
169 .resource = &iq80321_uart_resource,
170};
171
172static void __init iq80321_init_machine(void)
173{
174 register_iop32x_gpio();
175 platform_device_register(&iop3xx_i2c0_device);
176 platform_device_register(&iop3xx_i2c1_device);
177 platform_device_register(&iq80321_flash_device);
178 platform_device_register(&iq80321_serial_device);
179 platform_device_register(&iop3xx_dma_0_channel);
180 platform_device_register(&iop3xx_dma_1_channel);
181 platform_device_register(&iop3xx_aau_channel);
182}
183
184MACHINE_START(IQ80321, "Intel IQ80321")
185 /* Maintainer: Intel Corp. */
186 .atag_offset = 0x100,
187 .map_io = iq80321_map_io,
188 .init_irq = iop32x_init_irq,
189 .init_time = iq80321_timer_init,
190 .init_machine = iq80321_init_machine,
191 .restart = iop3xx_restart,
192MACHINE_END
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