[deliverable/linux.git] / arch / arm / mach-s3c24xx / pm-s3c2410.c

/* linux/arch/arm/mach-s3c2410/pm.c
 *
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*/

#include <linux/init.h>
#include <linux/suspend.h>
#include <linux/errno.h>
#include <linux/time.h>
#include <linux/device.h>
#include <linux/syscore_ops.h>
#include <linux/gpio.h>
#include <linux/io.h>

#include <asm/mach-types.h>

#include <mach/hardware.h>
#include <mach/regs-gpio.h>
#include <mach/gpio-samsung.h>

#include <plat/cpu.h>
#include <plat/pm.h>

#include "h1940.h"

static void s3c2410_pm_prepare(void)
{
	/* ensure at least GSTATUS3 has the resume address */

	__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);

	S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
	S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));

	if (machine_is_h1940()) {
		void *base = phys_to_virt(H1940_SUSPEND_CHECK);
		unsigned long ptr;
		unsigned long calc = 0;

		/* generate check for the bootloader to check on resume */

		for (ptr = 0; ptr < 0x40000; ptr += 0x400)
			calc += __raw_readl(base+ptr);

		__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	}

	/* RX3715 and RX1950 use similar to H1940 code and the
	 * same offsets for resume and checksum pointers */

	if (machine_is_rx3715() || machine_is_rx1950()) {
		void *base = phys_to_virt(H1940_SUSPEND_CHECK);
		unsigned long ptr;
		unsigned long calc = 0;

		/* generate check for the bootloader to check on resume */

		for (ptr = 0; ptr < 0x40000; ptr += 0x4)
			calc += __raw_readl(base+ptr);

		__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	}

	if (machine_is_aml_m5900()) {
		gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL);
		gpio_free(S3C2410_GPF(2));
	}

	if (machine_is_rx1950()) {
		/* According to S3C2442 user's manual, page 7-17,
		 * when the system is operating in NAND boot mode,
		 * the hardware pin configuration - EINT[23:21] –
		 * must be set as input for starting up after
		 * wakeup from sleep mode
		 */
		s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
		s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
		s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
	}
}

static void s3c2410_pm_resume(void)
{
	unsigned long tmp;

	/* unset the return-from-sleep flag, to ensure reset */

	tmp = __raw_readl(S3C2410_GSTATUS2);
	tmp &= S3C2410_GSTATUS2_OFFRESET;
	__raw_writel(tmp, S3C2410_GSTATUS2);

	if (machine_is_aml_m5900()) {
		gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL);
		gpio_free(S3C2410_GPF(2));
	}
}

struct syscore_ops s3c2410_pm_syscore_ops = {
	.resume		= s3c2410_pm_resume,
};

static int s3c2410_pm_add(struct device *dev, struct subsys_interface *sif)
{
	pm_cpu_prep = s3c2410_pm_prepare;
	pm_cpu_sleep = s3c2410_cpu_suspend;

	return 0;
}

#if defined(CONFIG_CPU_S3C2410)
static struct subsys_interface s3c2410_pm_interface = {
	.name		= "s3c2410_pm",
	.subsys		= &s3c2410_subsys,
	.add_dev	= s3c2410_pm_add,
};

/* register ourselves */

static int __init s3c2410_pm_drvinit(void)
{
	return subsys_interface_register(&s3c2410_pm_interface);
}

arch_initcall(s3c2410_pm_drvinit);

static struct subsys_interface s3c2410a_pm_interface = {
	.name		= "s3c2410a_pm",
	.subsys		= &s3c2410a_subsys,
	.add_dev	= s3c2410_pm_add,
};

static int __init s3c2410a_pm_drvinit(void)
{
	return subsys_interface_register(&s3c2410a_pm_interface);
}

arch_initcall(s3c2410a_pm_drvinit);
#endif

#if defined(CONFIG_CPU_S3C2440)
static struct subsys_interface s3c2440_pm_interface = {
	.name		= "s3c2440_pm",
	.subsys		= &s3c2440_subsys,
	.add_dev	= s3c2410_pm_add,
};

static int __init s3c2440_pm_drvinit(void)
{
	return subsys_interface_register(&s3c2440_pm_interface);
}

arch_initcall(s3c2440_pm_drvinit);
#endif

#if defined(CONFIG_CPU_S3C2442)
static struct subsys_interface s3c2442_pm_interface = {
	.name		= "s3c2442_pm",
	.subsys		= &s3c2442_subsys,
	.add_dev	= s3c2410_pm_add,
};

static int __init s3c2442_pm_drvinit(void)
{
	return subsys_interface_register(&s3c2442_pm_interface);
}

arch_initcall(s3c2442_pm_drvinit);
#endif
Commit	Line	Data
	1	/* linux/arch/arm/mach-s3c2410/pm.c
	2	*
	3	* Copyright (c) 2006 Simtec Electronics
	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23	#include <linux/init.h>
	24	#include <linux/suspend.h>
	25	#include <linux/errno.h>
	26	#include <linux/time.h>
	27	#include <linux/device.h>
	28	#include <linux/syscore_ops.h>
	29	#include <linux/gpio.h>
	30	#include <linux/io.h>
	31
	32	#include <asm/mach-types.h>
	33
	34	#include <mach/hardware.h>
	35	#include <mach/regs-gpio.h>
	36	#include <mach/gpio-samsung.h>
	37
	38	#include <plat/cpu.h>
	39	#include <plat/pm.h>
	40
	41	#include "h1940.h"
	42
	43	static void s3c2410_pm_prepare(void)
	44	{
	45	/* ensure at least GSTATUS3 has the resume address */
	46
	47	__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);
	48
	49	S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
	50	S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
	51
	52	if (machine_is_h1940()) {
	53	void *base = phys_to_virt(H1940_SUSPEND_CHECK);
	54	unsigned long ptr;
	55	unsigned long calc = 0;
	56
	57	/* generate check for the bootloader to check on resume */
	58
	59	for (ptr = 0; ptr < 0x40000; ptr += 0x400)
	60	calc += __raw_readl(base+ptr);
	61
	62	__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	63	}
	64
	65	/* RX3715 and RX1950 use similar to H1940 code and the
	66	* same offsets for resume and checksum pointers */
	67
	68	if (machine_is_rx3715() \|\| machine_is_rx1950()) {
	69	void *base = phys_to_virt(H1940_SUSPEND_CHECK);
	70	unsigned long ptr;
	71	unsigned long calc = 0;
	72
	73	/* generate check for the bootloader to check on resume */
	74
	75	for (ptr = 0; ptr < 0x40000; ptr += 0x4)
	76	calc += __raw_readl(base+ptr);
	77
	78	__raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
	79	}
	80
	81	if (machine_is_aml_m5900()) {
	82	gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL);
	83	gpio_free(S3C2410_GPF(2));
	84	}
	85
	86	if (machine_is_rx1950()) {
	87	/* According to S3C2442 user's manual, page 7-17,
	88	* when the system is operating in NAND boot mode,
	89	* the hardware pin configuration - EINT[23:21] –
	90	* must be set as input for starting up after
	91	* wakeup from sleep mode
	92	*/
	93	s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
	94	s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
	95	s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
	96	}
	97	}
	98
	99	static void s3c2410_pm_resume(void)
	100	{
	101	unsigned long tmp;
	102
	103	/* unset the return-from-sleep flag, to ensure reset */
	104
	105	tmp = __raw_readl(S3C2410_GSTATUS2);
	106	tmp &= S3C2410_GSTATUS2_OFFRESET;
	107	__raw_writel(tmp, S3C2410_GSTATUS2);
	108
	109	if (machine_is_aml_m5900()) {
	110	gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL);
	111	gpio_free(S3C2410_GPF(2));
	112	}
	113	}
	114
	115	struct syscore_ops s3c2410_pm_syscore_ops = {
	116	.resume = s3c2410_pm_resume,
	117	};
	118
	119	static int s3c2410_pm_add(struct device dev, struct subsys_interface sif)
	120	{
	121	pm_cpu_prep = s3c2410_pm_prepare;
	122	pm_cpu_sleep = s3c2410_cpu_suspend;
	123
	124	return 0;
	125	}
	126
	127	#if defined(CONFIG_CPU_S3C2410)
	128	static struct subsys_interface s3c2410_pm_interface = {
	129	.name = "s3c2410_pm",
	130	.subsys = &s3c2410_subsys,
	131	.add_dev = s3c2410_pm_add,
	132	};
	133
	134	/* register ourselves */
	135
	136	static int __init s3c2410_pm_drvinit(void)
	137	{
	138	return subsys_interface_register(&s3c2410_pm_interface);
	139	}
	140
	141	arch_initcall(s3c2410_pm_drvinit);
	142
	143	static struct subsys_interface s3c2410a_pm_interface = {
	144	.name = "s3c2410a_pm",
	145	.subsys = &s3c2410a_subsys,
	146	.add_dev = s3c2410_pm_add,
	147	};
	148
	149	static int __init s3c2410a_pm_drvinit(void)
	150	{
	151	return subsys_interface_register(&s3c2410a_pm_interface);
	152	}
	153
	154	arch_initcall(s3c2410a_pm_drvinit);
	155	#endif
	156
	157	#if defined(CONFIG_CPU_S3C2440)
	158	static struct subsys_interface s3c2440_pm_interface = {
	159	.name = "s3c2440_pm",
	160	.subsys = &s3c2440_subsys,
	161	.add_dev = s3c2410_pm_add,
	162	};
	163
	164	static int __init s3c2440_pm_drvinit(void)
	165	{
	166	return subsys_interface_register(&s3c2440_pm_interface);
	167	}
	168
	169	arch_initcall(s3c2440_pm_drvinit);
	170	#endif
	171
	172	#if defined(CONFIG_CPU_S3C2442)
	173	static struct subsys_interface s3c2442_pm_interface = {
	174	.name = "s3c2442_pm",
	175	.subsys = &s3c2442_subsys,
	176	.add_dev = s3c2410_pm_add,
	177	};
	178
	179	static int __init s3c2442_pm_drvinit(void)
	180	{
	181	return subsys_interface_register(&s3c2442_pm_interface);
	182	}
	183
	184	arch_initcall(s3c2442_pm_drvinit);
	185	#endif