| 1 | /* |
| 2 | * File: arch/blackfin/kernel/setup.c |
| 3 | * Based on: |
| 4 | * Author: |
| 5 | * |
| 6 | * Created: |
| 7 | * Description: |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2004-2006 Analog Devices Inc. |
| 11 | * |
| 12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License as published by |
| 16 | * the Free Software Foundation; either version 2 of the License, or |
| 17 | * (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, see the file COPYING, or write |
| 26 | * to the Free Software Foundation, Inc., |
| 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 28 | */ |
| 29 | |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/console.h> |
| 32 | #include <linux/bootmem.h> |
| 33 | #include <linux/seq_file.h> |
| 34 | #include <linux/cpu.h> |
| 35 | #include <linux/module.h> |
| 36 | #include <linux/tty.h> |
| 37 | |
| 38 | #include <linux/ext2_fs.h> |
| 39 | #include <linux/cramfs_fs.h> |
| 40 | #include <linux/romfs_fs.h> |
| 41 | |
| 42 | #include <asm/cplb.h> |
| 43 | #include <asm/cacheflush.h> |
| 44 | #include <asm/blackfin.h> |
| 45 | #include <asm/cplbinit.h> |
| 46 | #include <asm/div64.h> |
| 47 | #include <asm/fixed_code.h> |
| 48 | #include <asm/early_printk.h> |
| 49 | |
| 50 | u16 _bfin_swrst; |
| 51 | |
| 52 | unsigned long memory_start, memory_end, physical_mem_end; |
| 53 | unsigned long reserved_mem_dcache_on; |
| 54 | unsigned long reserved_mem_icache_on; |
| 55 | EXPORT_SYMBOL(memory_start); |
| 56 | EXPORT_SYMBOL(memory_end); |
| 57 | EXPORT_SYMBOL(physical_mem_end); |
| 58 | EXPORT_SYMBOL(_ramend); |
| 59 | |
| 60 | #ifdef CONFIG_MTD_UCLINUX |
| 61 | unsigned long memory_mtd_end, memory_mtd_start, mtd_size; |
| 62 | unsigned long _ebss; |
| 63 | EXPORT_SYMBOL(memory_mtd_end); |
| 64 | EXPORT_SYMBOL(memory_mtd_start); |
| 65 | EXPORT_SYMBOL(mtd_size); |
| 66 | #endif |
| 67 | |
| 68 | char __initdata command_line[COMMAND_LINE_SIZE]; |
| 69 | |
| 70 | void __init bf53x_cache_init(void) |
| 71 | { |
| 72 | #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) |
| 73 | generate_cpl_tables(); |
| 74 | #endif |
| 75 | |
| 76 | #ifdef CONFIG_BFIN_ICACHE |
| 77 | bfin_icache_init(); |
| 78 | printk(KERN_INFO "Instruction Cache Enabled\n"); |
| 79 | #endif |
| 80 | |
| 81 | #ifdef CONFIG_BFIN_DCACHE |
| 82 | bfin_dcache_init(); |
| 83 | printk(KERN_INFO "Data Cache Enabled" |
| 84 | # if defined CONFIG_BFIN_WB |
| 85 | " (write-back)" |
| 86 | # elif defined CONFIG_BFIN_WT |
| 87 | " (write-through)" |
| 88 | # endif |
| 89 | "\n"); |
| 90 | #endif |
| 91 | } |
| 92 | |
| 93 | void __init bf53x_relocate_l1_mem(void) |
| 94 | { |
| 95 | unsigned long l1_code_length; |
| 96 | unsigned long l1_data_a_length; |
| 97 | unsigned long l1_data_b_length; |
| 98 | |
| 99 | l1_code_length = _etext_l1 - _stext_l1; |
| 100 | if (l1_code_length > L1_CODE_LENGTH) |
| 101 | l1_code_length = L1_CODE_LENGTH; |
| 102 | /* cannot complain as printk is not available as yet. |
| 103 | * But we can continue booting and complain later! |
| 104 | */ |
| 105 | |
| 106 | /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */ |
| 107 | dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length); |
| 108 | |
| 109 | l1_data_a_length = _ebss_l1 - _sdata_l1; |
| 110 | if (l1_data_a_length > L1_DATA_A_LENGTH) |
| 111 | l1_data_a_length = L1_DATA_A_LENGTH; |
| 112 | |
| 113 | /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */ |
| 114 | dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length); |
| 115 | |
| 116 | l1_data_b_length = _ebss_b_l1 - _sdata_b_l1; |
| 117 | if (l1_data_b_length > L1_DATA_B_LENGTH) |
| 118 | l1_data_b_length = L1_DATA_B_LENGTH; |
| 119 | |
| 120 | /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */ |
| 121 | dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + |
| 122 | l1_data_a_length, l1_data_b_length); |
| 123 | |
| 124 | } |
| 125 | |
| 126 | /* |
| 127 | * Initial parsing of the command line. Currently, we support: |
| 128 | * - Controlling the linux memory size: mem=xxx[KMG] |
| 129 | * - Controlling the physical memory size: max_mem=xxx[KMG][$][#] |
| 130 | * $ -> reserved memory is dcacheable |
| 131 | * # -> reserved memory is icacheable |
| 132 | */ |
| 133 | static __init void parse_cmdline_early(char *cmdline_p) |
| 134 | { |
| 135 | char c = ' ', *to = cmdline_p; |
| 136 | unsigned int memsize; |
| 137 | for (;;) { |
| 138 | if (c == ' ') { |
| 139 | |
| 140 | if (!memcmp(to, "mem=", 4)) { |
| 141 | to += 4; |
| 142 | memsize = memparse(to, &to); |
| 143 | if (memsize) |
| 144 | _ramend = memsize; |
| 145 | |
| 146 | } else if (!memcmp(to, "max_mem=", 8)) { |
| 147 | to += 8; |
| 148 | memsize = memparse(to, &to); |
| 149 | if (memsize) { |
| 150 | physical_mem_end = memsize; |
| 151 | if (*to != ' ') { |
| 152 | if (*to == '$' |
| 153 | || *(to + 1) == '$') |
| 154 | reserved_mem_dcache_on = |
| 155 | 1; |
| 156 | if (*to == '#' |
| 157 | || *(to + 1) == '#') |
| 158 | reserved_mem_icache_on = |
| 159 | 1; |
| 160 | } |
| 161 | } |
| 162 | } else if (!memcmp(to, "earlyprintk=", 12)) { |
| 163 | to += 12; |
| 164 | setup_early_printk(to); |
| 165 | } |
| 166 | } |
| 167 | c = *(to++); |
| 168 | if (!c) |
| 169 | break; |
| 170 | } |
| 171 | } |
| 172 | |
| 173 | void __init setup_arch(char **cmdline_p) |
| 174 | { |
| 175 | int bootmap_size; |
| 176 | unsigned long l1_length, sclk, cclk; |
| 177 | #ifdef CONFIG_MTD_UCLINUX |
| 178 | unsigned long mtd_phys = 0; |
| 179 | #endif |
| 180 | |
| 181 | #ifdef CONFIG_DUMMY_CONSOLE |
| 182 | conswitchp = &dummy_con; |
| 183 | #endif |
| 184 | |
| 185 | #if defined(CONFIG_CMDLINE_BOOL) |
| 186 | strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line)); |
| 187 | command_line[sizeof(command_line) - 1] = 0; |
| 188 | #endif |
| 189 | |
| 190 | /* Keep a copy of command line */ |
| 191 | *cmdline_p = &command_line[0]; |
| 192 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); |
| 193 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; |
| 194 | |
| 195 | /* setup memory defaults from the user config */ |
| 196 | physical_mem_end = 0; |
| 197 | _ramend = CONFIG_MEM_SIZE * 1024 * 1024; |
| 198 | |
| 199 | parse_cmdline_early(&command_line[0]); |
| 200 | |
| 201 | cclk = get_cclk(); |
| 202 | sclk = get_sclk(); |
| 203 | |
| 204 | #if !defined(CONFIG_BFIN_KERNEL_CLOCK) |
| 205 | if (ANOMALY_05000273 && cclk == sclk) |
| 206 | panic("ANOMALY 05000273, SCLK can not be same as CCLK"); |
| 207 | #endif |
| 208 | |
| 209 | #ifdef BF561_FAMILY |
| 210 | if (ANOMALY_05000266) { |
| 211 | bfin_read_IMDMA_D0_IRQ_STATUS(); |
| 212 | bfin_read_IMDMA_D1_IRQ_STATUS(); |
| 213 | } |
| 214 | #endif |
| 215 | |
| 216 | printk(KERN_INFO "Hardware Trace "); |
| 217 | if (bfin_read_TBUFCTL() & 0x1 ) |
| 218 | printk("Active "); |
| 219 | else |
| 220 | printk("Off "); |
| 221 | if (bfin_read_TBUFCTL() & 0x2) |
| 222 | printk("and Enabled\n"); |
| 223 | else |
| 224 | printk("and Disabled\n"); |
| 225 | |
| 226 | |
| 227 | #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) |
| 228 | /* we need to initialize the Flashrom device here since we might |
| 229 | * do things with flash early on in the boot |
| 230 | */ |
| 231 | flash_probe(); |
| 232 | #endif |
| 233 | |
| 234 | if (physical_mem_end == 0) |
| 235 | physical_mem_end = _ramend; |
| 236 | |
| 237 | /* by now the stack is part of the init task */ |
| 238 | memory_end = _ramend - DMA_UNCACHED_REGION; |
| 239 | |
| 240 | _ramstart = (unsigned long)__bss_stop; |
| 241 | _rambase = (unsigned long)_stext; |
| 242 | #ifdef CONFIG_MPU |
| 243 | /* Round up to multiple of 4MB. */ |
| 244 | memory_start = (_ramstart + 0x3fffff) & ~0x3fffff; |
| 245 | #else |
| 246 | memory_start = PAGE_ALIGN(_ramstart); |
| 247 | #endif |
| 248 | |
| 249 | #if defined(CONFIG_MTD_UCLINUX) |
| 250 | /* generic memory mapped MTD driver */ |
| 251 | memory_mtd_end = memory_end; |
| 252 | |
| 253 | mtd_phys = _ramstart; |
| 254 | mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8))); |
| 255 | |
| 256 | # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS) |
| 257 | if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC) |
| 258 | mtd_size = |
| 259 | PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10); |
| 260 | # endif |
| 261 | |
| 262 | # if defined(CONFIG_CRAMFS) |
| 263 | if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC) |
| 264 | mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4))); |
| 265 | # endif |
| 266 | |
| 267 | # if defined(CONFIG_ROMFS_FS) |
| 268 | if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0 |
| 269 | && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) |
| 270 | mtd_size = |
| 271 | PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); |
| 272 | # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) |
| 273 | /* Due to a Hardware Anomaly we need to limit the size of usable |
| 274 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on |
| 275 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception |
| 276 | */ |
| 277 | # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) |
| 278 | if (memory_end >= 56 * 1024 * 1024) |
| 279 | memory_end = 56 * 1024 * 1024; |
| 280 | # else |
| 281 | if (memory_end >= 60 * 1024 * 1024) |
| 282 | memory_end = 60 * 1024 * 1024; |
| 283 | # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ |
| 284 | # endif /* ANOMALY_05000263 */ |
| 285 | # endif /* CONFIG_ROMFS_FS */ |
| 286 | |
| 287 | memory_end -= mtd_size; |
| 288 | |
| 289 | if (mtd_size == 0) { |
| 290 | console_init(); |
| 291 | panic("Don't boot kernel without rootfs attached.\n"); |
| 292 | } |
| 293 | |
| 294 | /* Relocate MTD image to the top of memory after the uncached memory area */ |
| 295 | dma_memcpy((char *)memory_end, __bss_stop, mtd_size); |
| 296 | |
| 297 | memory_mtd_start = memory_end; |
| 298 | _ebss = memory_mtd_start; /* define _ebss for compatible */ |
| 299 | #endif /* CONFIG_MTD_UCLINUX */ |
| 300 | |
| 301 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) |
| 302 | /* Due to a Hardware Anomaly we need to limit the size of usable |
| 303 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on |
| 304 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception |
| 305 | */ |
| 306 | #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) |
| 307 | if (memory_end >= 56 * 1024 * 1024) |
| 308 | memory_end = 56 * 1024 * 1024; |
| 309 | #else |
| 310 | if (memory_end >= 60 * 1024 * 1024) |
| 311 | memory_end = 60 * 1024 * 1024; |
| 312 | #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ |
| 313 | printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20); |
| 314 | #endif /* ANOMALY_05000263 */ |
| 315 | |
| 316 | #ifdef CONFIG_MPU |
| 317 | page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32; |
| 318 | page_mask_order = get_order(3 * page_mask_nelts * sizeof(long)); |
| 319 | #endif |
| 320 | |
| 321 | #if !defined(CONFIG_MTD_UCLINUX) |
| 322 | memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ |
| 323 | #endif |
| 324 | init_mm.start_code = (unsigned long)_stext; |
| 325 | init_mm.end_code = (unsigned long)_etext; |
| 326 | init_mm.end_data = (unsigned long)_edata; |
| 327 | init_mm.brk = (unsigned long)0; |
| 328 | |
| 329 | _bfin_swrst = bfin_read_SWRST(); |
| 330 | |
| 331 | if (_bfin_swrst & RESET_DOUBLE) |
| 332 | printk(KERN_INFO "Recovering from Double Fault event\n"); |
| 333 | else if (_bfin_swrst & RESET_WDOG) |
| 334 | printk(KERN_INFO "Recovering from Watchdog event\n"); |
| 335 | else if (_bfin_swrst & RESET_SOFTWARE) |
| 336 | printk(KERN_NOTICE "Reset caused by Software reset\n"); |
| 337 | |
| 338 | printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n"); |
| 339 | if (bfin_compiled_revid() == 0xffff) |
| 340 | printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); |
| 341 | else if (bfin_compiled_revid() == -1) |
| 342 | printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU); |
| 343 | else |
| 344 | printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); |
| 345 | if (bfin_revid() != bfin_compiled_revid()) { |
| 346 | if (bfin_compiled_revid() == -1) |
| 347 | printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", |
| 348 | bfin_revid()); |
| 349 | else if (bfin_compiled_revid() != 0xffff) |
| 350 | printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", |
| 351 | bfin_compiled_revid(), bfin_revid()); |
| 352 | } |
| 353 | if (bfin_revid() < SUPPORTED_REVID) |
| 354 | printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n", |
| 355 | CPU, bfin_revid()); |
| 356 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); |
| 357 | |
| 358 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", |
| 359 | cclk / 1000000, sclk / 1000000); |
| 360 | |
| 361 | if (ANOMALY_05000273 && (cclk >> 1) <= sclk) |
| 362 | printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); |
| 363 | |
| 364 | printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); |
| 365 | printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); |
| 366 | |
| 367 | printk(KERN_INFO "Memory map:\n" |
| 368 | KERN_INFO " text = 0x%p-0x%p\n" |
| 369 | KERN_INFO " rodata = 0x%p-0x%p\n" |
| 370 | KERN_INFO " data = 0x%p-0x%p\n" |
| 371 | KERN_INFO " stack = 0x%p-0x%p\n" |
| 372 | KERN_INFO " init = 0x%p-0x%p\n" |
| 373 | KERN_INFO " bss = 0x%p-0x%p\n" |
| 374 | KERN_INFO " available = 0x%p-0x%p\n" |
| 375 | #ifdef CONFIG_MTD_UCLINUX |
| 376 | KERN_INFO " rootfs = 0x%p-0x%p\n" |
| 377 | #endif |
| 378 | #if DMA_UNCACHED_REGION > 0 |
| 379 | KERN_INFO " DMA Zone = 0x%p-0x%p\n" |
| 380 | #endif |
| 381 | , _stext, _etext, |
| 382 | __start_rodata, __end_rodata, |
| 383 | _sdata, _edata, |
| 384 | (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000), |
| 385 | __init_begin, __init_end, |
| 386 | __bss_start, __bss_stop, |
| 387 | (void *)_ramstart, (void *)memory_end |
| 388 | #ifdef CONFIG_MTD_UCLINUX |
| 389 | , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size) |
| 390 | #endif |
| 391 | #if DMA_UNCACHED_REGION > 0 |
| 392 | , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend) |
| 393 | #endif |
| 394 | ); |
| 395 | |
| 396 | /* |
| 397 | * give all the memory to the bootmap allocator, tell it to put the |
| 398 | * boot mem_map at the start of memory |
| 399 | */ |
| 400 | bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */ |
| 401 | PAGE_OFFSET >> PAGE_SHIFT, |
| 402 | memory_end >> PAGE_SHIFT); |
| 403 | /* |
| 404 | * free the usable memory, we have to make sure we do not free |
| 405 | * the bootmem bitmap so we then reserve it after freeing it :-) |
| 406 | */ |
| 407 | free_bootmem(memory_start, memory_end - memory_start); |
| 408 | |
| 409 | reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT); |
| 410 | /* |
| 411 | * get kmalloc into gear |
| 412 | */ |
| 413 | paging_init(); |
| 414 | |
| 415 | /* check the size of the l1 area */ |
| 416 | l1_length = _etext_l1 - _stext_l1; |
| 417 | if (l1_length > L1_CODE_LENGTH) |
| 418 | panic("L1 code memory overflow\n"); |
| 419 | |
| 420 | l1_length = _ebss_l1 - _sdata_l1; |
| 421 | if (l1_length > L1_DATA_A_LENGTH) |
| 422 | panic("L1 data memory overflow\n"); |
| 423 | |
| 424 | /* Copy atomic sequences to their fixed location, and sanity check that |
| 425 | these locations are the ones that we advertise to userspace. */ |
| 426 | memcpy((void *)FIXED_CODE_START, &fixed_code_start, |
| 427 | FIXED_CODE_END - FIXED_CODE_START); |
| 428 | BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start |
| 429 | != SIGRETURN_STUB - FIXED_CODE_START); |
| 430 | BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start |
| 431 | != ATOMIC_XCHG32 - FIXED_CODE_START); |
| 432 | BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start |
| 433 | != ATOMIC_CAS32 - FIXED_CODE_START); |
| 434 | BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start |
| 435 | != ATOMIC_ADD32 - FIXED_CODE_START); |
| 436 | BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start |
| 437 | != ATOMIC_SUB32 - FIXED_CODE_START); |
| 438 | BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start |
| 439 | != ATOMIC_IOR32 - FIXED_CODE_START); |
| 440 | BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start |
| 441 | != ATOMIC_AND32 - FIXED_CODE_START); |
| 442 | BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start |
| 443 | != ATOMIC_XOR32 - FIXED_CODE_START); |
| 444 | BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start |
| 445 | != SAFE_USER_INSTRUCTION - FIXED_CODE_START); |
| 446 | |
| 447 | init_exception_vectors(); |
| 448 | bf53x_cache_init(); |
| 449 | } |
| 450 | |
| 451 | static int __init topology_init(void) |
| 452 | { |
| 453 | #if defined (CONFIG_BF561) |
| 454 | static struct cpu cpu[2]; |
| 455 | register_cpu(&cpu[0], 0); |
| 456 | register_cpu(&cpu[1], 1); |
| 457 | return 0; |
| 458 | #else |
| 459 | static struct cpu cpu[1]; |
| 460 | return register_cpu(cpu, 0); |
| 461 | #endif |
| 462 | } |
| 463 | |
| 464 | subsys_initcall(topology_init); |
| 465 | |
| 466 | static u_long get_vco(void) |
| 467 | { |
| 468 | u_long msel; |
| 469 | u_long vco; |
| 470 | |
| 471 | msel = (bfin_read_PLL_CTL() >> 9) & 0x3F; |
| 472 | if (0 == msel) |
| 473 | msel = 64; |
| 474 | |
| 475 | vco = CONFIG_CLKIN_HZ; |
| 476 | vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */ |
| 477 | vco = msel * vco; |
| 478 | return vco; |
| 479 | } |
| 480 | |
| 481 | /* Get the Core clock */ |
| 482 | u_long get_cclk(void) |
| 483 | { |
| 484 | u_long csel, ssel; |
| 485 | if (bfin_read_PLL_STAT() & 0x1) |
| 486 | return CONFIG_CLKIN_HZ; |
| 487 | |
| 488 | ssel = bfin_read_PLL_DIV(); |
| 489 | csel = ((ssel >> 4) & 0x03); |
| 490 | ssel &= 0xf; |
| 491 | if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */ |
| 492 | return get_vco() / ssel; |
| 493 | return get_vco() >> csel; |
| 494 | } |
| 495 | EXPORT_SYMBOL(get_cclk); |
| 496 | |
| 497 | /* Get the System clock */ |
| 498 | u_long get_sclk(void) |
| 499 | { |
| 500 | u_long ssel; |
| 501 | |
| 502 | if (bfin_read_PLL_STAT() & 0x1) |
| 503 | return CONFIG_CLKIN_HZ; |
| 504 | |
| 505 | ssel = (bfin_read_PLL_DIV() & 0xf); |
| 506 | if (0 == ssel) { |
| 507 | printk(KERN_WARNING "Invalid System Clock\n"); |
| 508 | ssel = 1; |
| 509 | } |
| 510 | |
| 511 | return get_vco() / ssel; |
| 512 | } |
| 513 | EXPORT_SYMBOL(get_sclk); |
| 514 | |
| 515 | unsigned long sclk_to_usecs(unsigned long sclk) |
| 516 | { |
| 517 | u64 tmp = USEC_PER_SEC * (u64)sclk; |
| 518 | do_div(tmp, get_sclk()); |
| 519 | return tmp; |
| 520 | } |
| 521 | EXPORT_SYMBOL(sclk_to_usecs); |
| 522 | |
| 523 | unsigned long usecs_to_sclk(unsigned long usecs) |
| 524 | { |
| 525 | u64 tmp = get_sclk() * (u64)usecs; |
| 526 | do_div(tmp, USEC_PER_SEC); |
| 527 | return tmp; |
| 528 | } |
| 529 | EXPORT_SYMBOL(usecs_to_sclk); |
| 530 | |
| 531 | /* |
| 532 | * Get CPU information for use by the procfs. |
| 533 | */ |
| 534 | static int show_cpuinfo(struct seq_file *m, void *v) |
| 535 | { |
| 536 | char *cpu, *mmu, *fpu, *vendor, *cache; |
| 537 | uint32_t revid; |
| 538 | |
| 539 | u_long cclk = 0, sclk = 0; |
| 540 | u_int dcache_size = 0, dsup_banks = 0; |
| 541 | |
| 542 | cpu = CPU; |
| 543 | mmu = "none"; |
| 544 | fpu = "none"; |
| 545 | revid = bfin_revid(); |
| 546 | |
| 547 | cclk = get_cclk(); |
| 548 | sclk = get_sclk(); |
| 549 | |
| 550 | switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) { |
| 551 | case 0xca: |
| 552 | vendor = "Analog Devices"; |
| 553 | break; |
| 554 | default: |
| 555 | vendor = "unknown"; |
| 556 | break; |
| 557 | } |
| 558 | |
| 559 | seq_printf(m, "processor\t: %d\n" |
| 560 | "vendor_id\t: %s\n" |
| 561 | "cpu family\t: 0x%x\n" |
| 562 | "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n" |
| 563 | "stepping\t: %d\n", |
| 564 | 0, |
| 565 | vendor, |
| 566 | (bfin_read_CHIPID() & CHIPID_FAMILY), |
| 567 | cpu, cclk/1000000, sclk/1000000, |
| 568 | revid); |
| 569 | |
| 570 | seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n", |
| 571 | cclk/1000000, cclk%1000000, |
| 572 | sclk/1000000, sclk%1000000); |
| 573 | seq_printf(m, "bogomips\t: %lu.%02lu\n" |
| 574 | "Calibration\t: %lu loops\n", |
| 575 | (loops_per_jiffy * HZ) / 500000, |
| 576 | ((loops_per_jiffy * HZ) / 5000) % 100, |
| 577 | (loops_per_jiffy * HZ)); |
| 578 | |
| 579 | /* Check Cache configutation */ |
| 580 | switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) { |
| 581 | case ACACHE_BSRAM: |
| 582 | cache = "dbank-A/B\t: cache/sram"; |
| 583 | dcache_size = 16; |
| 584 | dsup_banks = 1; |
| 585 | break; |
| 586 | case ACACHE_BCACHE: |
| 587 | cache = "dbank-A/B\t: cache/cache"; |
| 588 | dcache_size = 32; |
| 589 | dsup_banks = 2; |
| 590 | break; |
| 591 | case ASRAM_BSRAM: |
| 592 | cache = "dbank-A/B\t: sram/sram"; |
| 593 | dcache_size = 0; |
| 594 | dsup_banks = 0; |
| 595 | break; |
| 596 | default: |
| 597 | cache = "unknown"; |
| 598 | dcache_size = 0; |
| 599 | dsup_banks = 0; |
| 600 | break; |
| 601 | } |
| 602 | |
| 603 | /* Is it turned on? */ |
| 604 | if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))) |
| 605 | dcache_size = 0; |
| 606 | |
| 607 | seq_printf(m, "cache size\t: %d KB(L1 icache) " |
| 608 | "%d KB(L1 dcache-%s) %d KB(L2 cache)\n", |
| 609 | BFIN_ICACHESIZE / 1024, dcache_size, |
| 610 | #if defined CONFIG_BFIN_WB |
| 611 | "wb" |
| 612 | #elif defined CONFIG_BFIN_WT |
| 613 | "wt" |
| 614 | #endif |
| 615 | "", 0); |
| 616 | |
| 617 | seq_printf(m, "%s\n", cache); |
| 618 | |
| 619 | seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n", |
| 620 | BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES); |
| 621 | seq_printf(m, |
| 622 | "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n", |
| 623 | dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, |
| 624 | BFIN_DLINES); |
| 625 | #ifdef CONFIG_BFIN_ICACHE_LOCK |
| 626 | switch (read_iloc()) { |
| 627 | case WAY0_L: |
| 628 | seq_printf(m, "Way0 Locked-Down\n"); |
| 629 | break; |
| 630 | case WAY1_L: |
| 631 | seq_printf(m, "Way1 Locked-Down\n"); |
| 632 | break; |
| 633 | case WAY01_L: |
| 634 | seq_printf(m, "Way0,Way1 Locked-Down\n"); |
| 635 | break; |
| 636 | case WAY2_L: |
| 637 | seq_printf(m, "Way2 Locked-Down\n"); |
| 638 | break; |
| 639 | case WAY02_L: |
| 640 | seq_printf(m, "Way0,Way2 Locked-Down\n"); |
| 641 | break; |
| 642 | case WAY12_L: |
| 643 | seq_printf(m, "Way1,Way2 Locked-Down\n"); |
| 644 | break; |
| 645 | case WAY012_L: |
| 646 | seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n"); |
| 647 | break; |
| 648 | case WAY3_L: |
| 649 | seq_printf(m, "Way3 Locked-Down\n"); |
| 650 | break; |
| 651 | case WAY03_L: |
| 652 | seq_printf(m, "Way0,Way3 Locked-Down\n"); |
| 653 | break; |
| 654 | case WAY13_L: |
| 655 | seq_printf(m, "Way1,Way3 Locked-Down\n"); |
| 656 | break; |
| 657 | case WAY013_L: |
| 658 | seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n"); |
| 659 | break; |
| 660 | case WAY32_L: |
| 661 | seq_printf(m, "Way3,Way2 Locked-Down\n"); |
| 662 | break; |
| 663 | case WAY320_L: |
| 664 | seq_printf(m, "Way3,Way2,Way0 Locked-Down\n"); |
| 665 | break; |
| 666 | case WAY321_L: |
| 667 | seq_printf(m, "Way3,Way2,Way1 Locked-Down\n"); |
| 668 | break; |
| 669 | case WAYALL_L: |
| 670 | seq_printf(m, "All Ways are locked\n"); |
| 671 | break; |
| 672 | default: |
| 673 | seq_printf(m, "No Ways are locked\n"); |
| 674 | } |
| 675 | #endif |
| 676 | |
| 677 | seq_printf(m, "board name\t: %s\n", bfin_board_name); |
| 678 | seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n", |
| 679 | physical_mem_end >> 10, (void *)0, (void *)physical_mem_end); |
| 680 | seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n", |
| 681 | ((int)memory_end - (int)_stext) >> 10, |
| 682 | _stext, |
| 683 | (void *)memory_end); |
| 684 | |
| 685 | return 0; |
| 686 | } |
| 687 | |
| 688 | static void *c_start(struct seq_file *m, loff_t *pos) |
| 689 | { |
| 690 | return *pos < NR_CPUS ? ((void *)0x12345678) : NULL; |
| 691 | } |
| 692 | |
| 693 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
| 694 | { |
| 695 | ++*pos; |
| 696 | return c_start(m, pos); |
| 697 | } |
| 698 | |
| 699 | static void c_stop(struct seq_file *m, void *v) |
| 700 | { |
| 701 | } |
| 702 | |
| 703 | struct seq_operations cpuinfo_op = { |
| 704 | .start = c_start, |
| 705 | .next = c_next, |
| 706 | .stop = c_stop, |
| 707 | .show = show_cpuinfo, |
| 708 | }; |
| 709 | |
| 710 | void __init cmdline_init(const char *r0) |
| 711 | { |
| 712 | if (r0) |
| 713 | strncpy(command_line, r0, COMMAND_LINE_SIZE); |
| 714 | } |