[deliverable/linux.git] / arch / powerpc / include / asm / hw_irq.h

/*
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
 */
#ifndef _ASM_POWERPC_HW_IRQ_H
#define _ASM_POWERPC_HW_IRQ_H

#ifdef __KERNEL__

#include <linux/errno.h>
#include <linux/compiler.h>
#include <asm/ptrace.h>
#include <asm/processor.h>

#ifdef CONFIG_PPC64

/*
 * PACA flags in paca->irq_happened.
 *
 * This bits are set when interrupts occur while soft-disabled
 * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
 * is set whenever we manually hard disable.
 */
#define PACA_IRQ_HARD_DIS	0x01
#define PACA_IRQ_DBELL		0x02
#define PACA_IRQ_EE		0x04
#define PACA_IRQ_DEC		0x08 /* Or FIT */
#define PACA_IRQ_EE_EDGE	0x10 /* BookE only */

#endif /* CONFIG_PPC64 */

#ifndef __ASSEMBLY__

extern void __replay_interrupt(unsigned int vector);

extern void timer_interrupt(struct pt_regs *);
extern void performance_monitor_exception(struct pt_regs *regs);

#ifdef CONFIG_PPC64
#include <asm/paca.h>

static inline unsigned long arch_local_save_flags(void)
{
	unsigned long flags;

	asm volatile(
		"lbz %0,%1(13)"
		: "=r" (flags)
		: "i" (offsetof(struct paca_struct, soft_enabled)));

	return flags;
}

static inline unsigned long arch_local_irq_disable(void)
{
	unsigned long flags, zero;

	asm volatile(
		"li %1,0; lbz %0,%2(13); stb %1,%2(13)"
		: "=r" (flags), "=&r" (zero)
		: "i" (offsetof(struct paca_struct, soft_enabled))
		: "memory");

	return flags;
}

extern void arch_local_irq_restore(unsigned long);

static inline void arch_local_irq_enable(void)
{
	arch_local_irq_restore(1);
}

static inline unsigned long arch_local_irq_save(void)
{
	return arch_local_irq_disable();
}

static inline bool arch_irqs_disabled_flags(unsigned long flags)
{
	return flags == 0;
}

static inline bool arch_irqs_disabled(void)
{
	return arch_irqs_disabled_flags(arch_local_save_flags());
}

#ifdef CONFIG_PPC_BOOK3E
#define __hard_irq_enable()	asm volatile("wrteei 1" : : : "memory")
#define __hard_irq_disable()	asm volatile("wrteei 0" : : : "memory")
#else
#define __hard_irq_enable()	__mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
#define __hard_irq_disable()	__mtmsrd(local_paca->kernel_msr, 1)
#endif

static inline void hard_irq_disable(void)
{
	__hard_irq_disable();
	get_paca()->soft_enabled = 0;
	get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
}

/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
#define hard_irq_disable	hard_irq_disable

static inline bool lazy_irq_pending(void)
{
	return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
}

/*
 * This is called by asynchronous interrupts to conditionally
 * re-enable hard interrupts when soft-disabled after having
 * cleared the source of the interrupt
 */
static inline void may_hard_irq_enable(void)
{
	get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
	if (!(get_paca()->irq_happened & PACA_IRQ_EE))
		__hard_irq_enable();
}

static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
{
	return !regs->softe;
}

extern bool prep_irq_for_idle(void);

#else /* CONFIG_PPC64 */

#define SET_MSR_EE(x)	mtmsr(x)

static inline unsigned long arch_local_save_flags(void)
{
	return mfmsr();
}

static inline void arch_local_irq_restore(unsigned long flags)
{
#if defined(CONFIG_BOOKE)
	asm volatile("wrtee %0" : : "r" (flags) : "memory");
#else
	mtmsr(flags);
#endif
}

static inline unsigned long arch_local_irq_save(void)
{
	unsigned long flags = arch_local_save_flags();
#ifdef CONFIG_BOOKE
	asm volatile("wrteei 0" : : : "memory");
#else
	SET_MSR_EE(flags & ~MSR_EE);
#endif
	return flags;
}

static inline void arch_local_irq_disable(void)
{
#ifdef CONFIG_BOOKE
	asm volatile("wrteei 0" : : : "memory");
#else
	arch_local_irq_save();
#endif
}

static inline void arch_local_irq_enable(void)
{
#ifdef CONFIG_BOOKE
	asm volatile("wrteei 1" : : : "memory");
#else
	unsigned long msr = mfmsr();
	SET_MSR_EE(msr | MSR_EE);
#endif
}

static inline bool arch_irqs_disabled_flags(unsigned long flags)
{
	return (flags & MSR_EE) == 0;
}

static inline bool arch_irqs_disabled(void)
{
	return arch_irqs_disabled_flags(arch_local_save_flags());
}

#define hard_irq_disable()		arch_local_irq_disable()

static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
{
	return !(regs->msr & MSR_EE);
}

static inline void may_hard_irq_enable(void) { }

#endif /* CONFIG_PPC64 */

#define ARCH_IRQ_INIT_FLAGS	IRQ_NOREQUEST

/*
 * interrupt-retrigger: should we handle this via lost interrupts and IPIs
 * or should we not care like we do now ? --BenH.
 */
struct irq_chip;

#endif  /* __ASSEMBLY__ */
#endif	/* __KERNEL__ */
#endif	/* _ASM_POWERPC_HW_IRQ_H */
Commit	Line	Data
	1	/*
	2	* Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
	3	*/
	4	#ifndef _ASM_POWERPC_HW_IRQ_H
	5	#define _ASM_POWERPC_HW_IRQ_H
	6
	7	#ifdef __KERNEL__
	8
	9	#include <linux/errno.h>
	10	#include <linux/compiler.h>
	11	#include <asm/ptrace.h>
	12	#include <asm/processor.h>
	13
	14	#ifdef CONFIG_PPC64
	15
	16	/*
	17	* PACA flags in paca->irq_happened.
	18	*
	19	* This bits are set when interrupts occur while soft-disabled
	20	* and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
	21	* is set whenever we manually hard disable.
	22	*/
	23	#define PACA_IRQ_HARD_DIS 0x01
	24	#define PACA_IRQ_DBELL 0x02
	25	#define PACA_IRQ_EE 0x04
	26	#define PACA_IRQ_DEC 0x08 /* Or FIT */
	27	#define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
	28
	29	#endif /* CONFIG_PPC64 */
	30
	31	#ifndef __ASSEMBLY__
	32
	33	extern void __replay_interrupt(unsigned int vector);
	34
	35	extern void timer_interrupt(struct pt_regs *);
	36	extern void performance_monitor_exception(struct pt_regs *regs);
	37
	38	#ifdef CONFIG_PPC64
	39	#include <asm/paca.h>
	40
	41	static inline unsigned long arch_local_save_flags(void)
	42	{
	43	unsigned long flags;
	44
	45	asm volatile(
	46	"lbz %0,%1(13)"
	47	: "=r" (flags)
	48	: "i" (offsetof(struct paca_struct, soft_enabled)));
	49
	50	return flags;
	51	}
	52
	53	static inline unsigned long arch_local_irq_disable(void)
	54	{
	55	unsigned long flags, zero;
	56
	57	asm volatile(
	58	"li %1,0; lbz %0,%2(13); stb %1,%2(13)"
	59	: "=r" (flags), "=&r" (zero)
	60	: "i" (offsetof(struct paca_struct, soft_enabled))
	61	: "memory");
	62
	63	return flags;
	64	}
	65
	66	extern void arch_local_irq_restore(unsigned long);
	67
	68	static inline void arch_local_irq_enable(void)
	69	{
	70	arch_local_irq_restore(1);
	71	}
	72
	73	static inline unsigned long arch_local_irq_save(void)
	74	{
	75	return arch_local_irq_disable();
	76	}
	77
	78	static inline bool arch_irqs_disabled_flags(unsigned long flags)
	79	{
	80	return flags == 0;
	81	}
	82
	83	static inline bool arch_irqs_disabled(void)
	84	{
	85	return arch_irqs_disabled_flags(arch_local_save_flags());
	86	}
	87
	88	#ifdef CONFIG_PPC_BOOK3E
	89	#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory")
	90	#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory")
	91	#else
	92	#define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr \| MSR_EE, 1)
	93	#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
	94	#endif
	95
	96	static inline void hard_irq_disable(void)
	97	{
	98	__hard_irq_disable();
	99	get_paca()->soft_enabled = 0;
	100	get_paca()->irq_happened \|= PACA_IRQ_HARD_DIS;
	101	}
	102
	103	/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
	104	#define hard_irq_disable hard_irq_disable
	105
	106	static inline bool lazy_irq_pending(void)
	107	{
	108	return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
	109	}
	110
	111	/*
	112	* This is called by asynchronous interrupts to conditionally
	113	* re-enable hard interrupts when soft-disabled after having
	114	* cleared the source of the interrupt
	115	*/
	116	static inline void may_hard_irq_enable(void)
	117	{
	118	get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
	119	if (!(get_paca()->irq_happened & PACA_IRQ_EE))
	120	__hard_irq_enable();
	121	}
	122
	123	static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
	124	{
	125	return !regs->softe;
	126	}
	127
	128	extern bool prep_irq_for_idle(void);
	129
	130	#else /* CONFIG_PPC64 */
	131
	132	#define SET_MSR_EE(x) mtmsr(x)
	133
	134	static inline unsigned long arch_local_save_flags(void)
	135	{
	136	return mfmsr();
	137	}
	138
	139	static inline void arch_local_irq_restore(unsigned long flags)
	140	{
	141	#if defined(CONFIG_BOOKE)
	142	asm volatile("wrtee %0" : : "r" (flags) : "memory");
	143	#else
	144	mtmsr(flags);
	145	#endif
	146	}
	147
	148	static inline unsigned long arch_local_irq_save(void)
	149	{
	150	unsigned long flags = arch_local_save_flags();
	151	#ifdef CONFIG_BOOKE
	152	asm volatile("wrteei 0" : : : "memory");
	153	#else
	154	SET_MSR_EE(flags & ~MSR_EE);
	155	#endif
	156	return flags;
	157	}
	158
	159	static inline void arch_local_irq_disable(void)
	160	{
	161	#ifdef CONFIG_BOOKE
	162	asm volatile("wrteei 0" : : : "memory");
	163	#else
	164	arch_local_irq_save();
	165	#endif
	166	}
	167
	168	static inline void arch_local_irq_enable(void)
	169	{
	170	#ifdef CONFIG_BOOKE
	171	asm volatile("wrteei 1" : : : "memory");
	172	#else
	173	unsigned long msr = mfmsr();
	174	SET_MSR_EE(msr \| MSR_EE);
	175	#endif
	176	}
	177
	178	static inline bool arch_irqs_disabled_flags(unsigned long flags)
	179	{
	180	return (flags & MSR_EE) == 0;
	181	}
	182
	183	static inline bool arch_irqs_disabled(void)
	184	{
	185	return arch_irqs_disabled_flags(arch_local_save_flags());
	186	}
	187
	188	#define hard_irq_disable() arch_local_irq_disable()
	189
	190	static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
	191	{
	192	return !(regs->msr & MSR_EE);
	193	}
	194
	195	static inline void may_hard_irq_enable(void) { }
	196
	197	#endif /* CONFIG_PPC64 */
	198
	199	#define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
	200
	201	/*
	202	* interrupt-retrigger: should we handle this via lost interrupts and IPIs
	203	* or should we not care like we do now ? --BenH.
	204	*/
	205	struct irq_chip;
	206
	207	#endif /* __ASSEMBLY__ */
	208	#endif /* __KERNEL__ */
	209	#endif /* _ASM_POWERPC_HW_IRQ_H */