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[POWERPC] 83xx: Removed PCI exclude of PHB
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
... / ...
CommitLineData
1/*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <linux/module.h>
18
19#include <asm/oprofile_impl.h>
20#include <asm/cputable.h>
21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22
23struct cpu_spec* cur_cpu_spec = NULL;
24EXPORT_SYMBOL(cur_cpu_spec);
25
26/* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33#ifdef CONFIG_PPC32
34extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42#endif /* CONFIG_PPC32 */
43#ifdef CONFIG_PPC64
44extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
47extern void __restore_cpu_pa6t(void);
48extern void __restore_cpu_ppc970(void);
49#endif /* CONFIG_PPC64 */
50
51/* This table only contains "desktop" CPUs, it need to be filled with embedded
52 * ones as well...
53 */
54#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
55 PPC_FEATURE_HAS_MMU)
56#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
57#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
58#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
62#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
63 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
64 PPC_FEATURE_TRUE_LE)
65#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
66 PPC_FEATURE_TRUE_LE | \
67 PPC_FEATURE_HAS_ALTIVEC_COMP)
68#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
69 PPC_FEATURE_BOOKE)
70
71/* We only set the spe features if the kernel was compiled with
72 * spe support
73 */
74#ifdef CONFIG_SPE
75#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
76#else
77#define PPC_FEATURE_SPE_COMP 0
78#endif
79
80static struct cpu_spec cpu_specs[] = {
81#ifdef CONFIG_PPC64
82 { /* Power3 */
83 .pvr_mask = 0xffff0000,
84 .pvr_value = 0x00400000,
85 .cpu_name = "POWER3 (630)",
86 .cpu_features = CPU_FTRS_POWER3,
87 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
88 .icache_bsize = 128,
89 .dcache_bsize = 128,
90 .num_pmcs = 8,
91 .pmc_type = PPC_PMC_IBM,
92 .oprofile_cpu_type = "ppc64/power3",
93 .oprofile_type = PPC_OPROFILE_RS64,
94 .platform = "power3",
95 },
96 { /* Power3+ */
97 .pvr_mask = 0xffff0000,
98 .pvr_value = 0x00410000,
99 .cpu_name = "POWER3 (630+)",
100 .cpu_features = CPU_FTRS_POWER3,
101 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
102 .icache_bsize = 128,
103 .dcache_bsize = 128,
104 .num_pmcs = 8,
105 .pmc_type = PPC_PMC_IBM,
106 .oprofile_cpu_type = "ppc64/power3",
107 .oprofile_type = PPC_OPROFILE_RS64,
108 .platform = "power3",
109 },
110 { /* Northstar */
111 .pvr_mask = 0xffff0000,
112 .pvr_value = 0x00330000,
113 .cpu_name = "RS64-II (northstar)",
114 .cpu_features = CPU_FTRS_RS64,
115 .cpu_user_features = COMMON_USER_PPC64,
116 .icache_bsize = 128,
117 .dcache_bsize = 128,
118 .num_pmcs = 8,
119 .pmc_type = PPC_PMC_IBM,
120 .oprofile_cpu_type = "ppc64/rs64",
121 .oprofile_type = PPC_OPROFILE_RS64,
122 .platform = "rs64",
123 },
124 { /* Pulsar */
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00340000,
127 .cpu_name = "RS64-III (pulsar)",
128 .cpu_features = CPU_FTRS_RS64,
129 .cpu_user_features = COMMON_USER_PPC64,
130 .icache_bsize = 128,
131 .dcache_bsize = 128,
132 .num_pmcs = 8,
133 .pmc_type = PPC_PMC_IBM,
134 .oprofile_cpu_type = "ppc64/rs64",
135 .oprofile_type = PPC_OPROFILE_RS64,
136 .platform = "rs64",
137 },
138 { /* I-star */
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x00360000,
141 .cpu_name = "RS64-III (icestar)",
142 .cpu_features = CPU_FTRS_RS64,
143 .cpu_user_features = COMMON_USER_PPC64,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .pmc_type = PPC_PMC_IBM,
148 .oprofile_cpu_type = "ppc64/rs64",
149 .oprofile_type = PPC_OPROFILE_RS64,
150 .platform = "rs64",
151 },
152 { /* S-star */
153 .pvr_mask = 0xffff0000,
154 .pvr_value = 0x00370000,
155 .cpu_name = "RS64-IV (sstar)",
156 .cpu_features = CPU_FTRS_RS64,
157 .cpu_user_features = COMMON_USER_PPC64,
158 .icache_bsize = 128,
159 .dcache_bsize = 128,
160 .num_pmcs = 8,
161 .pmc_type = PPC_PMC_IBM,
162 .oprofile_cpu_type = "ppc64/rs64",
163 .oprofile_type = PPC_OPROFILE_RS64,
164 .platform = "rs64",
165 },
166 { /* Power4 */
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00350000,
169 .cpu_name = "POWER4 (gp)",
170 .cpu_features = CPU_FTRS_POWER4,
171 .cpu_user_features = COMMON_USER_POWER4,
172 .icache_bsize = 128,
173 .dcache_bsize = 128,
174 .num_pmcs = 8,
175 .pmc_type = PPC_PMC_IBM,
176 .oprofile_cpu_type = "ppc64/power4",
177 .oprofile_type = PPC_OPROFILE_POWER4,
178 .platform = "power4",
179 },
180 { /* Power4+ */
181 .pvr_mask = 0xffff0000,
182 .pvr_value = 0x00380000,
183 .cpu_name = "POWER4+ (gq)",
184 .cpu_features = CPU_FTRS_POWER4,
185 .cpu_user_features = COMMON_USER_POWER4,
186 .icache_bsize = 128,
187 .dcache_bsize = 128,
188 .num_pmcs = 8,
189 .pmc_type = PPC_PMC_IBM,
190 .oprofile_cpu_type = "ppc64/power4",
191 .oprofile_type = PPC_OPROFILE_POWER4,
192 .platform = "power4",
193 },
194 { /* PPC970 */
195 .pvr_mask = 0xffff0000,
196 .pvr_value = 0x00390000,
197 .cpu_name = "PPC970",
198 .cpu_features = CPU_FTRS_PPC970,
199 .cpu_user_features = COMMON_USER_POWER4 |
200 PPC_FEATURE_HAS_ALTIVEC_COMP,
201 .icache_bsize = 128,
202 .dcache_bsize = 128,
203 .num_pmcs = 8,
204 .pmc_type = PPC_PMC_IBM,
205 .cpu_setup = __setup_cpu_ppc970,
206 .cpu_restore = __restore_cpu_ppc970,
207 .oprofile_cpu_type = "ppc64/970",
208 .oprofile_type = PPC_OPROFILE_POWER4,
209 .platform = "ppc970",
210 },
211 { /* PPC970FX */
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x003c0000,
214 .cpu_name = "PPC970FX",
215 .cpu_features = CPU_FTRS_PPC970,
216 .cpu_user_features = COMMON_USER_POWER4 |
217 PPC_FEATURE_HAS_ALTIVEC_COMP,
218 .icache_bsize = 128,
219 .dcache_bsize = 128,
220 .num_pmcs = 8,
221 .pmc_type = PPC_PMC_IBM,
222 .cpu_setup = __setup_cpu_ppc970,
223 .cpu_restore = __restore_cpu_ppc970,
224 .oprofile_cpu_type = "ppc64/970",
225 .oprofile_type = PPC_OPROFILE_POWER4,
226 .platform = "ppc970",
227 },
228 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
229 .pvr_mask = 0xffffffff,
230 .pvr_value = 0x00440100,
231 .cpu_name = "PPC970MP",
232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP,
235 .icache_bsize = 128,
236 .dcache_bsize = 128,
237 .num_pmcs = 8,
238 .pmc_type = PPC_PMC_IBM,
239 .cpu_setup = __setup_cpu_ppc970,
240 .cpu_restore = __restore_cpu_ppc970,
241 .oprofile_cpu_type = "ppc64/970MP",
242 .oprofile_type = PPC_OPROFILE_POWER4,
243 .platform = "ppc970",
244 },
245 { /* PPC970MP */
246 .pvr_mask = 0xffff0000,
247 .pvr_value = 0x00440000,
248 .cpu_name = "PPC970MP",
249 .cpu_features = CPU_FTRS_PPC970,
250 .cpu_user_features = COMMON_USER_POWER4 |
251 PPC_FEATURE_HAS_ALTIVEC_COMP,
252 .icache_bsize = 128,
253 .dcache_bsize = 128,
254 .num_pmcs = 8,
255 .pmc_type = PPC_PMC_IBM,
256 .cpu_setup = __setup_cpu_ppc970MP,
257 .cpu_restore = __restore_cpu_ppc970,
258 .oprofile_cpu_type = "ppc64/970MP",
259 .oprofile_type = PPC_OPROFILE_POWER4,
260 .platform = "ppc970",
261 },
262 { /* PPC970GX */
263 .pvr_mask = 0xffff0000,
264 .pvr_value = 0x00450000,
265 .cpu_name = "PPC970GX",
266 .cpu_features = CPU_FTRS_PPC970,
267 .cpu_user_features = COMMON_USER_POWER4 |
268 PPC_FEATURE_HAS_ALTIVEC_COMP,
269 .icache_bsize = 128,
270 .dcache_bsize = 128,
271 .num_pmcs = 8,
272 .pmc_type = PPC_PMC_IBM,
273 .cpu_setup = __setup_cpu_ppc970,
274 .oprofile_cpu_type = "ppc64/970",
275 .oprofile_type = PPC_OPROFILE_POWER4,
276 .platform = "ppc970",
277 },
278 { /* Power5 GR */
279 .pvr_mask = 0xffff0000,
280 .pvr_value = 0x003a0000,
281 .cpu_name = "POWER5 (gr)",
282 .cpu_features = CPU_FTRS_POWER5,
283 .cpu_user_features = COMMON_USER_POWER5,
284 .icache_bsize = 128,
285 .dcache_bsize = 128,
286 .num_pmcs = 6,
287 .pmc_type = PPC_PMC_IBM,
288 .oprofile_cpu_type = "ppc64/power5",
289 .oprofile_type = PPC_OPROFILE_POWER4,
290 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
291 * and above but only works on POWER5 and above
292 */
293 .oprofile_mmcra_sihv = MMCRA_SIHV,
294 .oprofile_mmcra_sipr = MMCRA_SIPR,
295 .platform = "power5",
296 },
297 { /* Power5++ */
298 .pvr_mask = 0xffffff00,
299 .pvr_value = 0x003b0300,
300 .cpu_name = "POWER5+ (gs)",
301 .cpu_features = CPU_FTRS_POWER5,
302 .cpu_user_features = COMMON_USER_POWER5_PLUS,
303 .icache_bsize = 128,
304 .dcache_bsize = 128,
305 .num_pmcs = 6,
306 .oprofile_cpu_type = "ppc64/power5++",
307 .oprofile_type = PPC_OPROFILE_POWER4,
308 .oprofile_mmcra_sihv = MMCRA_SIHV,
309 .oprofile_mmcra_sipr = MMCRA_SIPR,
310 .platform = "power5+",
311 },
312 { /* Power5 GS */
313 .pvr_mask = 0xffff0000,
314 .pvr_value = 0x003b0000,
315 .cpu_name = "POWER5+ (gs)",
316 .cpu_features = CPU_FTRS_POWER5,
317 .cpu_user_features = COMMON_USER_POWER5_PLUS,
318 .icache_bsize = 128,
319 .dcache_bsize = 128,
320 .num_pmcs = 6,
321 .pmc_type = PPC_PMC_IBM,
322 .oprofile_cpu_type = "ppc64/power5+",
323 .oprofile_type = PPC_OPROFILE_POWER4,
324 .oprofile_mmcra_sihv = MMCRA_SIHV,
325 .oprofile_mmcra_sipr = MMCRA_SIPR,
326 .platform = "power5+",
327 },
328 { /* POWER6 in P5+ mode; 2.04-compliant processor */
329 .pvr_mask = 0xffffffff,
330 .pvr_value = 0x0f000001,
331 .cpu_name = "POWER5+",
332 .cpu_features = CPU_FTRS_POWER5,
333 .cpu_user_features = COMMON_USER_POWER5_PLUS,
334 .icache_bsize = 128,
335 .dcache_bsize = 128,
336 .num_pmcs = 6,
337 .pmc_type = PPC_PMC_IBM,
338 .oprofile_cpu_type = "ppc64/power6",
339 .oprofile_type = PPC_OPROFILE_POWER4,
340 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
341 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
342 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
343 POWER6_MMCRA_OTHER,
344 .platform = "power5+",
345 },
346 { /* Power6 */
347 .pvr_mask = 0xffff0000,
348 .pvr_value = 0x003e0000,
349 .cpu_name = "POWER6 (raw)",
350 .cpu_features = CPU_FTRS_POWER6,
351 .cpu_user_features = COMMON_USER_POWER6 |
352 PPC_FEATURE_POWER6_EXT,
353 .icache_bsize = 128,
354 .dcache_bsize = 128,
355 .num_pmcs = 6,
356 .pmc_type = PPC_PMC_IBM,
357 .oprofile_cpu_type = "ppc64/power6",
358 .oprofile_type = PPC_OPROFILE_POWER4,
359 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
360 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
361 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
362 POWER6_MMCRA_OTHER,
363 .platform = "power6x",
364 },
365 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
366 .pvr_mask = 0xffffffff,
367 .pvr_value = 0x0f000002,
368 .cpu_name = "POWER6 (architected)",
369 .cpu_features = CPU_FTRS_POWER6,
370 .cpu_user_features = COMMON_USER_POWER6,
371 .icache_bsize = 128,
372 .dcache_bsize = 128,
373 .num_pmcs = 6,
374 .pmc_type = PPC_PMC_IBM,
375 .oprofile_cpu_type = "ppc64/power6",
376 .oprofile_type = PPC_OPROFILE_POWER4,
377 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
378 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
379 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
380 POWER6_MMCRA_OTHER,
381 .platform = "power6",
382 },
383 { /* Cell Broadband Engine */
384 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x00700000,
386 .cpu_name = "Cell Broadband Engine",
387 .cpu_features = CPU_FTRS_CELL,
388 .cpu_user_features = COMMON_USER_PPC64 |
389 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
390 PPC_FEATURE_SMT,
391 .icache_bsize = 128,
392 .dcache_bsize = 128,
393 .num_pmcs = 4,
394 .pmc_type = PPC_PMC_IBM,
395 .oprofile_cpu_type = "ppc64/cell-be",
396 .oprofile_type = PPC_OPROFILE_CELL,
397 .platform = "ppc-cell-be",
398 },
399 { /* PA Semi PA6T */
400 .pvr_mask = 0x7fff0000,
401 .pvr_value = 0x00900000,
402 .cpu_name = "PA6T",
403 .cpu_features = CPU_FTRS_PA6T,
404 .cpu_user_features = COMMON_USER_PA6T,
405 .icache_bsize = 64,
406 .dcache_bsize = 64,
407 .num_pmcs = 6,
408 .pmc_type = PPC_PMC_PA6T,
409 .cpu_setup = __setup_cpu_pa6t,
410 .cpu_restore = __restore_cpu_pa6t,
411 .oprofile_cpu_type = "ppc64/pa6t",
412 .oprofile_type = PPC_OPROFILE_PA6T,
413 .platform = "pa6t",
414 },
415 { /* default match */
416 .pvr_mask = 0x00000000,
417 .pvr_value = 0x00000000,
418 .cpu_name = "POWER4 (compatible)",
419 .cpu_features = CPU_FTRS_COMPATIBLE,
420 .cpu_user_features = COMMON_USER_PPC64,
421 .icache_bsize = 128,
422 .dcache_bsize = 128,
423 .num_pmcs = 6,
424 .pmc_type = PPC_PMC_IBM,
425 .platform = "power4",
426 }
427#endif /* CONFIG_PPC64 */
428#ifdef CONFIG_PPC32
429#if CLASSIC_PPC
430 { /* 601 */
431 .pvr_mask = 0xffff0000,
432 .pvr_value = 0x00010000,
433 .cpu_name = "601",
434 .cpu_features = CPU_FTRS_PPC601,
435 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
436 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
437 .icache_bsize = 32,
438 .dcache_bsize = 32,
439 .platform = "ppc601",
440 },
441 { /* 603 */
442 .pvr_mask = 0xffff0000,
443 .pvr_value = 0x00030000,
444 .cpu_name = "603",
445 .cpu_features = CPU_FTRS_603,
446 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
447 .icache_bsize = 32,
448 .dcache_bsize = 32,
449 .cpu_setup = __setup_cpu_603,
450 .platform = "ppc603",
451 },
452 { /* 603e */
453 .pvr_mask = 0xffff0000,
454 .pvr_value = 0x00060000,
455 .cpu_name = "603e",
456 .cpu_features = CPU_FTRS_603,
457 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
458 .icache_bsize = 32,
459 .dcache_bsize = 32,
460 .cpu_setup = __setup_cpu_603,
461 .platform = "ppc603",
462 },
463 { /* 603ev */
464 .pvr_mask = 0xffff0000,
465 .pvr_value = 0x00070000,
466 .cpu_name = "603ev",
467 .cpu_features = CPU_FTRS_603,
468 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
469 .icache_bsize = 32,
470 .dcache_bsize = 32,
471 .cpu_setup = __setup_cpu_603,
472 .platform = "ppc603",
473 },
474 { /* 604 */
475 .pvr_mask = 0xffff0000,
476 .pvr_value = 0x00040000,
477 .cpu_name = "604",
478 .cpu_features = CPU_FTRS_604,
479 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
480 .icache_bsize = 32,
481 .dcache_bsize = 32,
482 .num_pmcs = 2,
483 .cpu_setup = __setup_cpu_604,
484 .platform = "ppc604",
485 },
486 { /* 604e */
487 .pvr_mask = 0xfffff000,
488 .pvr_value = 0x00090000,
489 .cpu_name = "604e",
490 .cpu_features = CPU_FTRS_604,
491 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
492 .icache_bsize = 32,
493 .dcache_bsize = 32,
494 .num_pmcs = 4,
495 .cpu_setup = __setup_cpu_604,
496 .platform = "ppc604",
497 },
498 { /* 604r */
499 .pvr_mask = 0xffff0000,
500 .pvr_value = 0x00090000,
501 .cpu_name = "604r",
502 .cpu_features = CPU_FTRS_604,
503 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
504 .icache_bsize = 32,
505 .dcache_bsize = 32,
506 .num_pmcs = 4,
507 .cpu_setup = __setup_cpu_604,
508 .platform = "ppc604",
509 },
510 { /* 604ev */
511 .pvr_mask = 0xffff0000,
512 .pvr_value = 0x000a0000,
513 .cpu_name = "604ev",
514 .cpu_features = CPU_FTRS_604,
515 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
516 .icache_bsize = 32,
517 .dcache_bsize = 32,
518 .num_pmcs = 4,
519 .cpu_setup = __setup_cpu_604,
520 .platform = "ppc604",
521 },
522 { /* 740/750 (0x4202, don't support TAU ?) */
523 .pvr_mask = 0xffffffff,
524 .pvr_value = 0x00084202,
525 .cpu_name = "740/750",
526 .cpu_features = CPU_FTRS_740_NOTAU,
527 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
528 .icache_bsize = 32,
529 .dcache_bsize = 32,
530 .num_pmcs = 4,
531 .cpu_setup = __setup_cpu_750,
532 .platform = "ppc750",
533 },
534 { /* 750CX (80100 and 8010x?) */
535 .pvr_mask = 0xfffffff0,
536 .pvr_value = 0x00080100,
537 .cpu_name = "750CX",
538 .cpu_features = CPU_FTRS_750,
539 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
540 .icache_bsize = 32,
541 .dcache_bsize = 32,
542 .num_pmcs = 4,
543 .cpu_setup = __setup_cpu_750cx,
544 .platform = "ppc750",
545 },
546 { /* 750CX (82201 and 82202) */
547 .pvr_mask = 0xfffffff0,
548 .pvr_value = 0x00082200,
549 .cpu_name = "750CX",
550 .cpu_features = CPU_FTRS_750,
551 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
552 .icache_bsize = 32,
553 .dcache_bsize = 32,
554 .num_pmcs = 4,
555 .cpu_setup = __setup_cpu_750cx,
556 .platform = "ppc750",
557 },
558 { /* 750CXe (82214) */
559 .pvr_mask = 0xfffffff0,
560 .pvr_value = 0x00082210,
561 .cpu_name = "750CXe",
562 .cpu_features = CPU_FTRS_750,
563 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
564 .icache_bsize = 32,
565 .dcache_bsize = 32,
566 .num_pmcs = 4,
567 .cpu_setup = __setup_cpu_750cx,
568 .platform = "ppc750",
569 },
570 { /* 750CXe "Gekko" (83214) */
571 .pvr_mask = 0xffffffff,
572 .pvr_value = 0x00083214,
573 .cpu_name = "750CXe",
574 .cpu_features = CPU_FTRS_750,
575 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
576 .icache_bsize = 32,
577 .dcache_bsize = 32,
578 .num_pmcs = 4,
579 .cpu_setup = __setup_cpu_750cx,
580 .platform = "ppc750",
581 },
582 { /* 750CL */
583 .pvr_mask = 0xfffff0f0,
584 .pvr_value = 0x00087010,
585 .cpu_name = "750CL",
586 .cpu_features = CPU_FTRS_750CL,
587 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
588 .icache_bsize = 32,
589 .dcache_bsize = 32,
590 .num_pmcs = 4,
591 .cpu_setup = __setup_cpu_750,
592 .platform = "ppc750",
593 },
594 { /* 745/755 */
595 .pvr_mask = 0xfffff000,
596 .pvr_value = 0x00083000,
597 .cpu_name = "745/755",
598 .cpu_features = CPU_FTRS_750,
599 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
600 .icache_bsize = 32,
601 .dcache_bsize = 32,
602 .num_pmcs = 4,
603 .cpu_setup = __setup_cpu_750,
604 .platform = "ppc750",
605 },
606 { /* 750FX rev 1.x */
607 .pvr_mask = 0xffffff00,
608 .pvr_value = 0x70000100,
609 .cpu_name = "750FX",
610 .cpu_features = CPU_FTRS_750FX1,
611 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
612 .icache_bsize = 32,
613 .dcache_bsize = 32,
614 .num_pmcs = 4,
615 .cpu_setup = __setup_cpu_750,
616 .platform = "ppc750",
617 },
618 { /* 750FX rev 2.0 must disable HID0[DPM] */
619 .pvr_mask = 0xffffffff,
620 .pvr_value = 0x70000200,
621 .cpu_name = "750FX",
622 .cpu_features = CPU_FTRS_750FX2,
623 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
624 .icache_bsize = 32,
625 .dcache_bsize = 32,
626 .num_pmcs = 4,
627 .cpu_setup = __setup_cpu_750,
628 .platform = "ppc750",
629 },
630 { /* 750FX (All revs except 2.0) */
631 .pvr_mask = 0xffff0000,
632 .pvr_value = 0x70000000,
633 .cpu_name = "750FX",
634 .cpu_features = CPU_FTRS_750FX,
635 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
636 .icache_bsize = 32,
637 .dcache_bsize = 32,
638 .num_pmcs = 4,
639 .cpu_setup = __setup_cpu_750fx,
640 .platform = "ppc750",
641 },
642 { /* 750GX */
643 .pvr_mask = 0xffff0000,
644 .pvr_value = 0x70020000,
645 .cpu_name = "750GX",
646 .cpu_features = CPU_FTRS_750GX,
647 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
648 .icache_bsize = 32,
649 .dcache_bsize = 32,
650 .num_pmcs = 4,
651 .cpu_setup = __setup_cpu_750fx,
652 .platform = "ppc750",
653 },
654 { /* 740/750 (L2CR bit need fixup for 740) */
655 .pvr_mask = 0xffff0000,
656 .pvr_value = 0x00080000,
657 .cpu_name = "740/750",
658 .cpu_features = CPU_FTRS_740,
659 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
660 .icache_bsize = 32,
661 .dcache_bsize = 32,
662 .num_pmcs = 4,
663 .cpu_setup = __setup_cpu_750,
664 .platform = "ppc750",
665 },
666 { /* 7400 rev 1.1 ? (no TAU) */
667 .pvr_mask = 0xffffffff,
668 .pvr_value = 0x000c1101,
669 .cpu_name = "7400 (1.1)",
670 .cpu_features = CPU_FTRS_7400_NOTAU,
671 .cpu_user_features = COMMON_USER |
672 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
673 .icache_bsize = 32,
674 .dcache_bsize = 32,
675 .num_pmcs = 4,
676 .cpu_setup = __setup_cpu_7400,
677 .platform = "ppc7400",
678 },
679 { /* 7400 */
680 .pvr_mask = 0xffff0000,
681 .pvr_value = 0x000c0000,
682 .cpu_name = "7400",
683 .cpu_features = CPU_FTRS_7400,
684 .cpu_user_features = COMMON_USER |
685 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
686 .icache_bsize = 32,
687 .dcache_bsize = 32,
688 .num_pmcs = 4,
689 .cpu_setup = __setup_cpu_7400,
690 .platform = "ppc7400",
691 },
692 { /* 7410 */
693 .pvr_mask = 0xffff0000,
694 .pvr_value = 0x800c0000,
695 .cpu_name = "7410",
696 .cpu_features = CPU_FTRS_7400,
697 .cpu_user_features = COMMON_USER |
698 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
699 .icache_bsize = 32,
700 .dcache_bsize = 32,
701 .num_pmcs = 4,
702 .cpu_setup = __setup_cpu_7410,
703 .platform = "ppc7400",
704 },
705 { /* 7450 2.0 - no doze/nap */
706 .pvr_mask = 0xffffffff,
707 .pvr_value = 0x80000200,
708 .cpu_name = "7450",
709 .cpu_features = CPU_FTRS_7450_20,
710 .cpu_user_features = COMMON_USER |
711 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
712 .icache_bsize = 32,
713 .dcache_bsize = 32,
714 .num_pmcs = 6,
715 .cpu_setup = __setup_cpu_745x,
716 .oprofile_cpu_type = "ppc/7450",
717 .oprofile_type = PPC_OPROFILE_G4,
718 .platform = "ppc7450",
719 },
720 { /* 7450 2.1 */
721 .pvr_mask = 0xffffffff,
722 .pvr_value = 0x80000201,
723 .cpu_name = "7450",
724 .cpu_features = CPU_FTRS_7450_21,
725 .cpu_user_features = COMMON_USER |
726 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
727 .icache_bsize = 32,
728 .dcache_bsize = 32,
729 .num_pmcs = 6,
730 .cpu_setup = __setup_cpu_745x,
731 .oprofile_cpu_type = "ppc/7450",
732 .oprofile_type = PPC_OPROFILE_G4,
733 .platform = "ppc7450",
734 },
735 { /* 7450 2.3 and newer */
736 .pvr_mask = 0xffff0000,
737 .pvr_value = 0x80000000,
738 .cpu_name = "7450",
739 .cpu_features = CPU_FTRS_7450_23,
740 .cpu_user_features = COMMON_USER |
741 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
742 .icache_bsize = 32,
743 .dcache_bsize = 32,
744 .num_pmcs = 6,
745 .cpu_setup = __setup_cpu_745x,
746 .oprofile_cpu_type = "ppc/7450",
747 .oprofile_type = PPC_OPROFILE_G4,
748 .platform = "ppc7450",
749 },
750 { /* 7455 rev 1.x */
751 .pvr_mask = 0xffffff00,
752 .pvr_value = 0x80010100,
753 .cpu_name = "7455",
754 .cpu_features = CPU_FTRS_7455_1,
755 .cpu_user_features = COMMON_USER |
756 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
757 .icache_bsize = 32,
758 .dcache_bsize = 32,
759 .num_pmcs = 6,
760 .cpu_setup = __setup_cpu_745x,
761 .oprofile_cpu_type = "ppc/7450",
762 .oprofile_type = PPC_OPROFILE_G4,
763 .platform = "ppc7450",
764 },
765 { /* 7455 rev 2.0 */
766 .pvr_mask = 0xffffffff,
767 .pvr_value = 0x80010200,
768 .cpu_name = "7455",
769 .cpu_features = CPU_FTRS_7455_20,
770 .cpu_user_features = COMMON_USER |
771 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
772 .icache_bsize = 32,
773 .dcache_bsize = 32,
774 .num_pmcs = 6,
775 .cpu_setup = __setup_cpu_745x,
776 .oprofile_cpu_type = "ppc/7450",
777 .oprofile_type = PPC_OPROFILE_G4,
778 .platform = "ppc7450",
779 },
780 { /* 7455 others */
781 .pvr_mask = 0xffff0000,
782 .pvr_value = 0x80010000,
783 .cpu_name = "7455",
784 .cpu_features = CPU_FTRS_7455,
785 .cpu_user_features = COMMON_USER |
786 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
787 .icache_bsize = 32,
788 .dcache_bsize = 32,
789 .num_pmcs = 6,
790 .cpu_setup = __setup_cpu_745x,
791 .oprofile_cpu_type = "ppc/7450",
792 .oprofile_type = PPC_OPROFILE_G4,
793 .platform = "ppc7450",
794 },
795 { /* 7447/7457 Rev 1.0 */
796 .pvr_mask = 0xffffffff,
797 .pvr_value = 0x80020100,
798 .cpu_name = "7447/7457",
799 .cpu_features = CPU_FTRS_7447_10,
800 .cpu_user_features = COMMON_USER |
801 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
802 .icache_bsize = 32,
803 .dcache_bsize = 32,
804 .num_pmcs = 6,
805 .cpu_setup = __setup_cpu_745x,
806 .oprofile_cpu_type = "ppc/7450",
807 .oprofile_type = PPC_OPROFILE_G4,
808 .platform = "ppc7450",
809 },
810 { /* 7447/7457 Rev 1.1 */
811 .pvr_mask = 0xffffffff,
812 .pvr_value = 0x80020101,
813 .cpu_name = "7447/7457",
814 .cpu_features = CPU_FTRS_7447_10,
815 .cpu_user_features = COMMON_USER |
816 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
817 .icache_bsize = 32,
818 .dcache_bsize = 32,
819 .num_pmcs = 6,
820 .cpu_setup = __setup_cpu_745x,
821 .oprofile_cpu_type = "ppc/7450",
822 .oprofile_type = PPC_OPROFILE_G4,
823 .platform = "ppc7450",
824 },
825 { /* 7447/7457 Rev 1.2 and later */
826 .pvr_mask = 0xffff0000,
827 .pvr_value = 0x80020000,
828 .cpu_name = "7447/7457",
829 .cpu_features = CPU_FTRS_7447,
830 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
831 .icache_bsize = 32,
832 .dcache_bsize = 32,
833 .num_pmcs = 6,
834 .cpu_setup = __setup_cpu_745x,
835 .oprofile_cpu_type = "ppc/7450",
836 .oprofile_type = PPC_OPROFILE_G4,
837 .platform = "ppc7450",
838 },
839 { /* 7447A */
840 .pvr_mask = 0xffff0000,
841 .pvr_value = 0x80030000,
842 .cpu_name = "7447A",
843 .cpu_features = CPU_FTRS_7447A,
844 .cpu_user_features = COMMON_USER |
845 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
846 .icache_bsize = 32,
847 .dcache_bsize = 32,
848 .num_pmcs = 6,
849 .cpu_setup = __setup_cpu_745x,
850 .oprofile_cpu_type = "ppc/7450",
851 .oprofile_type = PPC_OPROFILE_G4,
852 .platform = "ppc7450",
853 },
854 { /* 7448 */
855 .pvr_mask = 0xffff0000,
856 .pvr_value = 0x80040000,
857 .cpu_name = "7448",
858 .cpu_features = CPU_FTRS_7448,
859 .cpu_user_features = COMMON_USER |
860 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
861 .icache_bsize = 32,
862 .dcache_bsize = 32,
863 .num_pmcs = 6,
864 .cpu_setup = __setup_cpu_745x,
865 .oprofile_cpu_type = "ppc/7450",
866 .oprofile_type = PPC_OPROFILE_G4,
867 .platform = "ppc7450",
868 },
869 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
870 .pvr_mask = 0x7fff0000,
871 .pvr_value = 0x00810000,
872 .cpu_name = "82xx",
873 .cpu_features = CPU_FTRS_82XX,
874 .cpu_user_features = COMMON_USER,
875 .icache_bsize = 32,
876 .dcache_bsize = 32,
877 .cpu_setup = __setup_cpu_603,
878 .platform = "ppc603",
879 },
880 { /* All G2_LE (603e core, plus some) have the same pvr */
881 .pvr_mask = 0x7fff0000,
882 .pvr_value = 0x00820000,
883 .cpu_name = "G2_LE",
884 .cpu_features = CPU_FTRS_G2_LE,
885 .cpu_user_features = COMMON_USER,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .cpu_setup = __setup_cpu_603,
889 .platform = "ppc603",
890 },
891 { /* e300c1 (a 603e core, plus some) on 83xx */
892 .pvr_mask = 0x7fff0000,
893 .pvr_value = 0x00830000,
894 .cpu_name = "e300c1",
895 .cpu_features = CPU_FTRS_E300,
896 .cpu_user_features = COMMON_USER,
897 .icache_bsize = 32,
898 .dcache_bsize = 32,
899 .cpu_setup = __setup_cpu_603,
900 .platform = "ppc603",
901 },
902 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
903 .pvr_mask = 0x7fff0000,
904 .pvr_value = 0x00840000,
905 .cpu_name = "e300c2",
906 .cpu_features = CPU_FTRS_E300C2,
907 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
908 .icache_bsize = 32,
909 .dcache_bsize = 32,
910 .cpu_setup = __setup_cpu_603,
911 .platform = "ppc603",
912 },
913 { /* e300c3 on 83xx */
914 .pvr_mask = 0x7fff0000,
915 .pvr_value = 0x00850000,
916 .cpu_name = "e300c3",
917 .cpu_features = CPU_FTRS_E300,
918 .cpu_user_features = COMMON_USER,
919 .icache_bsize = 32,
920 .dcache_bsize = 32,
921 .cpu_setup = __setup_cpu_603,
922 .platform = "ppc603",
923 },
924 { /* default match, we assume split I/D cache & TB (non-601)... */
925 .pvr_mask = 0x00000000,
926 .pvr_value = 0x00000000,
927 .cpu_name = "(generic PPC)",
928 .cpu_features = CPU_FTRS_CLASSIC32,
929 .cpu_user_features = COMMON_USER,
930 .icache_bsize = 32,
931 .dcache_bsize = 32,
932 .platform = "ppc603",
933 },
934#endif /* CLASSIC_PPC */
935#ifdef CONFIG_8xx
936 { /* 8xx */
937 .pvr_mask = 0xffff0000,
938 .pvr_value = 0x00500000,
939 .cpu_name = "8xx",
940 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
941 * if the 8xx code is there.... */
942 .cpu_features = CPU_FTRS_8XX,
943 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
944 .icache_bsize = 16,
945 .dcache_bsize = 16,
946 .platform = "ppc823",
947 },
948#endif /* CONFIG_8xx */
949#ifdef CONFIG_40x
950 { /* 403GC */
951 .pvr_mask = 0xffffff00,
952 .pvr_value = 0x00200200,
953 .cpu_name = "403GC",
954 .cpu_features = CPU_FTRS_40X,
955 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
956 .icache_bsize = 16,
957 .dcache_bsize = 16,
958 .platform = "ppc403",
959 },
960 { /* 403GCX */
961 .pvr_mask = 0xffffff00,
962 .pvr_value = 0x00201400,
963 .cpu_name = "403GCX",
964 .cpu_features = CPU_FTRS_40X,
965 .cpu_user_features = PPC_FEATURE_32 |
966 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
967 .icache_bsize = 16,
968 .dcache_bsize = 16,
969 .platform = "ppc403",
970 },
971 { /* 403G ?? */
972 .pvr_mask = 0xffff0000,
973 .pvr_value = 0x00200000,
974 .cpu_name = "403G ??",
975 .cpu_features = CPU_FTRS_40X,
976 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
977 .icache_bsize = 16,
978 .dcache_bsize = 16,
979 .platform = "ppc403",
980 },
981 { /* 405GP */
982 .pvr_mask = 0xffff0000,
983 .pvr_value = 0x40110000,
984 .cpu_name = "405GP",
985 .cpu_features = CPU_FTRS_40X,
986 .cpu_user_features = PPC_FEATURE_32 |
987 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
988 .icache_bsize = 32,
989 .dcache_bsize = 32,
990 .platform = "ppc405",
991 },
992 { /* STB 03xxx */
993 .pvr_mask = 0xffff0000,
994 .pvr_value = 0x40130000,
995 .cpu_name = "STB03xxx",
996 .cpu_features = CPU_FTRS_40X,
997 .cpu_user_features = PPC_FEATURE_32 |
998 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
999 .icache_bsize = 32,
1000 .dcache_bsize = 32,
1001 .platform = "ppc405",
1002 },
1003 { /* STB 04xxx */
1004 .pvr_mask = 0xffff0000,
1005 .pvr_value = 0x41810000,
1006 .cpu_name = "STB04xxx",
1007 .cpu_features = CPU_FTRS_40X,
1008 .cpu_user_features = PPC_FEATURE_32 |
1009 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1010 .icache_bsize = 32,
1011 .dcache_bsize = 32,
1012 .platform = "ppc405",
1013 },
1014 { /* NP405L */
1015 .pvr_mask = 0xffff0000,
1016 .pvr_value = 0x41610000,
1017 .cpu_name = "NP405L",
1018 .cpu_features = CPU_FTRS_40X,
1019 .cpu_user_features = PPC_FEATURE_32 |
1020 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1021 .icache_bsize = 32,
1022 .dcache_bsize = 32,
1023 .platform = "ppc405",
1024 },
1025 { /* NP4GS3 */
1026 .pvr_mask = 0xffff0000,
1027 .pvr_value = 0x40B10000,
1028 .cpu_name = "NP4GS3",
1029 .cpu_features = CPU_FTRS_40X,
1030 .cpu_user_features = PPC_FEATURE_32 |
1031 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1032 .icache_bsize = 32,
1033 .dcache_bsize = 32,
1034 .platform = "ppc405",
1035 },
1036 { /* NP405H */
1037 .pvr_mask = 0xffff0000,
1038 .pvr_value = 0x41410000,
1039 .cpu_name = "NP405H",
1040 .cpu_features = CPU_FTRS_40X,
1041 .cpu_user_features = PPC_FEATURE_32 |
1042 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1043 .icache_bsize = 32,
1044 .dcache_bsize = 32,
1045 .platform = "ppc405",
1046 },
1047 { /* 405GPr */
1048 .pvr_mask = 0xffff0000,
1049 .pvr_value = 0x50910000,
1050 .cpu_name = "405GPr",
1051 .cpu_features = CPU_FTRS_40X,
1052 .cpu_user_features = PPC_FEATURE_32 |
1053 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1054 .icache_bsize = 32,
1055 .dcache_bsize = 32,
1056 .platform = "ppc405",
1057 },
1058 { /* STBx25xx */
1059 .pvr_mask = 0xffff0000,
1060 .pvr_value = 0x51510000,
1061 .cpu_name = "STBx25xx",
1062 .cpu_features = CPU_FTRS_40X,
1063 .cpu_user_features = PPC_FEATURE_32 |
1064 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1065 .icache_bsize = 32,
1066 .dcache_bsize = 32,
1067 .platform = "ppc405",
1068 },
1069 { /* 405LP */
1070 .pvr_mask = 0xffff0000,
1071 .pvr_value = 0x41F10000,
1072 .cpu_name = "405LP",
1073 .cpu_features = CPU_FTRS_40X,
1074 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1075 .icache_bsize = 32,
1076 .dcache_bsize = 32,
1077 .platform = "ppc405",
1078 },
1079 { /* Xilinx Virtex-II Pro */
1080 .pvr_mask = 0xfffff000,
1081 .pvr_value = 0x20010000,
1082 .cpu_name = "Virtex-II Pro",
1083 .cpu_features = CPU_FTRS_40X,
1084 .cpu_user_features = PPC_FEATURE_32 |
1085 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1086 .icache_bsize = 32,
1087 .dcache_bsize = 32,
1088 .platform = "ppc405",
1089 },
1090 { /* Xilinx Virtex-4 FX */
1091 .pvr_mask = 0xfffff000,
1092 .pvr_value = 0x20011000,
1093 .cpu_name = "Virtex-4 FX",
1094 .cpu_features = CPU_FTRS_40X,
1095 .cpu_user_features = PPC_FEATURE_32 |
1096 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1097 .icache_bsize = 32,
1098 .dcache_bsize = 32,
1099 .platform = "ppc405",
1100 },
1101 { /* 405EP */
1102 .pvr_mask = 0xffff0000,
1103 .pvr_value = 0x51210000,
1104 .cpu_name = "405EP",
1105 .cpu_features = CPU_FTRS_40X,
1106 .cpu_user_features = PPC_FEATURE_32 |
1107 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1108 .icache_bsize = 32,
1109 .dcache_bsize = 32,
1110 .platform = "ppc405",
1111 },
1112
1113#endif /* CONFIG_40x */
1114#ifdef CONFIG_44x
1115 {
1116 .pvr_mask = 0xf0000fff,
1117 .pvr_value = 0x40000850,
1118 .cpu_name = "440EP Rev. A",
1119 .cpu_features = CPU_FTRS_44X,
1120 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1121 .icache_bsize = 32,
1122 .dcache_bsize = 32,
1123 .platform = "ppc440",
1124 },
1125 {
1126 .pvr_mask = 0xf0000fff,
1127 .pvr_value = 0x400008d3,
1128 .cpu_name = "440EP Rev. B",
1129 .cpu_features = CPU_FTRS_44X,
1130 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1131 .icache_bsize = 32,
1132 .dcache_bsize = 32,
1133 .platform = "ppc440",
1134 },
1135 { /* 440EPX */
1136 .pvr_mask = 0xf0000ffb,
1137 .pvr_value = 0x200008D0,
1138 .cpu_name = "440EPX",
1139 .cpu_features = CPU_FTRS_44X,
1140 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1141 .icache_bsize = 32,
1142 .dcache_bsize = 32,
1143 },
1144 { /* 440GRX */
1145 .pvr_mask = 0xf0000ffb,
1146 .pvr_value = 0x200008D8,
1147 .cpu_name = "440GRX",
1148 .cpu_features = CPU_FTRS_44X,
1149 .cpu_user_features = COMMON_USER_BOOKE,
1150 .icache_bsize = 32,
1151 .dcache_bsize = 32,
1152 },
1153 { /* 440GP Rev. B */
1154 .pvr_mask = 0xf0000fff,
1155 .pvr_value = 0x40000440,
1156 .cpu_name = "440GP Rev. B",
1157 .cpu_features = CPU_FTRS_44X,
1158 .cpu_user_features = COMMON_USER_BOOKE,
1159 .icache_bsize = 32,
1160 .dcache_bsize = 32,
1161 .platform = "ppc440gp",
1162 },
1163 { /* 440GP Rev. C */
1164 .pvr_mask = 0xf0000fff,
1165 .pvr_value = 0x40000481,
1166 .cpu_name = "440GP Rev. C",
1167 .cpu_features = CPU_FTRS_44X,
1168 .cpu_user_features = COMMON_USER_BOOKE,
1169 .icache_bsize = 32,
1170 .dcache_bsize = 32,
1171 .platform = "ppc440gp",
1172 },
1173 { /* 440GX Rev. A */
1174 .pvr_mask = 0xf0000fff,
1175 .pvr_value = 0x50000850,
1176 .cpu_name = "440GX Rev. A",
1177 .cpu_features = CPU_FTRS_44X,
1178 .cpu_user_features = COMMON_USER_BOOKE,
1179 .icache_bsize = 32,
1180 .dcache_bsize = 32,
1181 .platform = "ppc440",
1182 },
1183 { /* 440GX Rev. B */
1184 .pvr_mask = 0xf0000fff,
1185 .pvr_value = 0x50000851,
1186 .cpu_name = "440GX Rev. B",
1187 .cpu_features = CPU_FTRS_44X,
1188 .cpu_user_features = COMMON_USER_BOOKE,
1189 .icache_bsize = 32,
1190 .dcache_bsize = 32,
1191 .platform = "ppc440",
1192 },
1193 { /* 440GX Rev. C */
1194 .pvr_mask = 0xf0000fff,
1195 .pvr_value = 0x50000892,
1196 .cpu_name = "440GX Rev. C",
1197 .cpu_features = CPU_FTRS_44X,
1198 .cpu_user_features = COMMON_USER_BOOKE,
1199 .icache_bsize = 32,
1200 .dcache_bsize = 32,
1201 .platform = "ppc440",
1202 },
1203 { /* 440GX Rev. F */
1204 .pvr_mask = 0xf0000fff,
1205 .pvr_value = 0x50000894,
1206 .cpu_name = "440GX Rev. F",
1207 .cpu_features = CPU_FTRS_44X,
1208 .cpu_user_features = COMMON_USER_BOOKE,
1209 .icache_bsize = 32,
1210 .dcache_bsize = 32,
1211 .platform = "ppc440",
1212 },
1213 { /* 440SP Rev. A */
1214 .pvr_mask = 0xfff00fff,
1215 .pvr_value = 0x53200891,
1216 .cpu_name = "440SP Rev. A",
1217 .cpu_features = CPU_FTRS_44X,
1218 .cpu_user_features = COMMON_USER_BOOKE,
1219 .icache_bsize = 32,
1220 .dcache_bsize = 32,
1221 .platform = "ppc440",
1222 },
1223 { /* 440SPe Rev. A */
1224 .pvr_mask = 0xfff00fff,
1225 .pvr_value = 0x53400890,
1226 .cpu_name = "440SPe Rev. A",
1227 .cpu_features = CPU_FTRS_44X,
1228 .cpu_user_features = COMMON_USER_BOOKE,
1229 .icache_bsize = 32,
1230 .dcache_bsize = 32,
1231 .platform = "ppc440",
1232 },
1233 { /* 440SPe Rev. B */
1234 .pvr_mask = 0xfff00fff,
1235 .pvr_value = 0x53400891,
1236 .cpu_name = "440SPe Rev. B",
1237 .cpu_features = CPU_FTRS_44X,
1238 .cpu_user_features = COMMON_USER_BOOKE,
1239 .icache_bsize = 32,
1240 .dcache_bsize = 32,
1241 .platform = "ppc440",
1242 },
1243#endif /* CONFIG_44x */
1244#ifdef CONFIG_FSL_BOOKE
1245 { /* e200z5 */
1246 .pvr_mask = 0xfff00000,
1247 .pvr_value = 0x81000000,
1248 .cpu_name = "e200z5",
1249 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1250 .cpu_features = CPU_FTRS_E200,
1251 .cpu_user_features = COMMON_USER_BOOKE |
1252 PPC_FEATURE_HAS_EFP_SINGLE |
1253 PPC_FEATURE_UNIFIED_CACHE,
1254 .dcache_bsize = 32,
1255 .platform = "ppc5554",
1256 },
1257 { /* e200z6 */
1258 .pvr_mask = 0xfff00000,
1259 .pvr_value = 0x81100000,
1260 .cpu_name = "e200z6",
1261 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1262 .cpu_features = CPU_FTRS_E200,
1263 .cpu_user_features = COMMON_USER_BOOKE |
1264 PPC_FEATURE_SPE_COMP |
1265 PPC_FEATURE_HAS_EFP_SINGLE |
1266 PPC_FEATURE_UNIFIED_CACHE,
1267 .dcache_bsize = 32,
1268 .platform = "ppc5554",
1269 },
1270 { /* e500 */
1271 .pvr_mask = 0xffff0000,
1272 .pvr_value = 0x80200000,
1273 .cpu_name = "e500",
1274 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1275 .cpu_features = CPU_FTRS_E500,
1276 .cpu_user_features = COMMON_USER_BOOKE |
1277 PPC_FEATURE_SPE_COMP |
1278 PPC_FEATURE_HAS_EFP_SINGLE,
1279 .icache_bsize = 32,
1280 .dcache_bsize = 32,
1281 .num_pmcs = 4,
1282 .oprofile_cpu_type = "ppc/e500",
1283 .oprofile_type = PPC_OPROFILE_BOOKE,
1284 .platform = "ppc8540",
1285 },
1286 { /* e500v2 */
1287 .pvr_mask = 0xffff0000,
1288 .pvr_value = 0x80210000,
1289 .cpu_name = "e500v2",
1290 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1291 .cpu_features = CPU_FTRS_E500_2,
1292 .cpu_user_features = COMMON_USER_BOOKE |
1293 PPC_FEATURE_SPE_COMP |
1294 PPC_FEATURE_HAS_EFP_SINGLE |
1295 PPC_FEATURE_HAS_EFP_DOUBLE,
1296 .icache_bsize = 32,
1297 .dcache_bsize = 32,
1298 .num_pmcs = 4,
1299 .oprofile_cpu_type = "ppc/e500",
1300 .oprofile_type = PPC_OPROFILE_BOOKE,
1301 .platform = "ppc8548",
1302 },
1303#endif
1304#if !CLASSIC_PPC
1305 { /* default match */
1306 .pvr_mask = 0x00000000,
1307 .pvr_value = 0x00000000,
1308 .cpu_name = "(generic PPC)",
1309 .cpu_features = CPU_FTRS_GENERIC_32,
1310 .cpu_user_features = PPC_FEATURE_32,
1311 .icache_bsize = 32,
1312 .dcache_bsize = 32,
1313 .platform = "powerpc",
1314 }
1315#endif /* !CLASSIC_PPC */
1316#endif /* CONFIG_PPC32 */
1317};
1318
1319struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
1320{
1321 struct cpu_spec *s = cpu_specs;
1322 struct cpu_spec **cur = &cur_cpu_spec;
1323 int i;
1324
1325 s = PTRRELOC(s);
1326 cur = PTRRELOC(cur);
1327
1328 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1329 if ((pvr & s->pvr_mask) == s->pvr_value) {
1330 *cur = cpu_specs + i;
1331#ifdef CONFIG_PPC64
1332 /* ppc64 expects identify_cpu to also call setup_cpu
1333 * for that processor. I will consolidate that at a
1334 * later time, for now, just use our friend #ifdef.
1335 * we also don't need to PTRRELOC the function pointer
1336 * on ppc64 as we are running at 0 in real mode.
1337 */
1338 if (s->cpu_setup) {
1339 s->cpu_setup(offset, s);
1340 }
1341#endif /* CONFIG_PPC64 */
1342 return s;
1343 }
1344 BUG();
1345 return NULL;
1346}
1347
1348void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1349{
1350 struct fixup_entry {
1351 unsigned long mask;
1352 unsigned long value;
1353 long start_off;
1354 long end_off;
1355 } *fcur, *fend;
1356
1357 fcur = fixup_start;
1358 fend = fixup_end;
1359
1360 for (; fcur < fend; fcur++) {
1361 unsigned int *pstart, *pend, *p;
1362
1363 if ((value & fcur->mask) == fcur->value)
1364 continue;
1365
1366 /* These PTRRELOCs will disappear once the new scheme for
1367 * modules and vdso is implemented
1368 */
1369 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1370 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1371
1372 for (p = pstart; p < pend; p++) {
1373 *p = 0x60000000u;
1374 asm volatile ("dcbst 0, %0" : : "r" (p));
1375 }
1376 asm volatile ("sync" : : : "memory");
1377 for (p = pstart; p < pend; p++)
1378 asm volatile ("icbi 0,%0" : : "r" (p));
1379 asm volatile ("sync; isync" : : : "memory");
1380 }
1381}
Linux kernel - Deliverables
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