| 1 | /* |
| 2 | * Platform setup for the Embedded Planet EP88xC board |
| 3 | * |
| 4 | * Author: Scott Wood <scottwood@freescale.com> |
| 5 | * Copyright 2007 Freescale Semiconductor, Inc. |
| 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public License |
| 8 | * version 2. This program is licensed "as is" without any warranty of any |
| 9 | * kind, whether express or implied. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/of_address.h> |
| 14 | #include <linux/of_fdt.h> |
| 15 | #include <linux/of_platform.h> |
| 16 | |
| 17 | #include <asm/machdep.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <asm/udbg.h> |
| 20 | #include <asm/cpm1.h> |
| 21 | |
| 22 | #include "mpc8xx.h" |
| 23 | |
| 24 | struct cpm_pin { |
| 25 | int port, pin, flags; |
| 26 | }; |
| 27 | |
| 28 | static struct cpm_pin ep88xc_pins[] = { |
| 29 | /* SMC1 */ |
| 30 | {1, 24, CPM_PIN_INPUT}, /* RX */ |
| 31 | {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ |
| 32 | |
| 33 | /* SCC2 */ |
| 34 | {0, 12, CPM_PIN_INPUT}, /* TX */ |
| 35 | {0, 13, CPM_PIN_INPUT}, /* RX */ |
| 36 | {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */ |
| 37 | {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */ |
| 38 | {2, 14, CPM_PIN_INPUT}, /* RTS */ |
| 39 | |
| 40 | /* MII1 */ |
| 41 | {0, 0, CPM_PIN_INPUT}, |
| 42 | {0, 1, CPM_PIN_INPUT}, |
| 43 | {0, 2, CPM_PIN_INPUT}, |
| 44 | {0, 3, CPM_PIN_INPUT}, |
| 45 | {0, 4, CPM_PIN_OUTPUT}, |
| 46 | {0, 10, CPM_PIN_OUTPUT}, |
| 47 | {0, 11, CPM_PIN_OUTPUT}, |
| 48 | {1, 19, CPM_PIN_INPUT}, |
| 49 | {1, 31, CPM_PIN_INPUT}, |
| 50 | {2, 12, CPM_PIN_INPUT}, |
| 51 | {2, 13, CPM_PIN_INPUT}, |
| 52 | {3, 8, CPM_PIN_INPUT}, |
| 53 | {4, 30, CPM_PIN_OUTPUT}, |
| 54 | {4, 31, CPM_PIN_OUTPUT}, |
| 55 | |
| 56 | /* MII2 */ |
| 57 | {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, |
| 58 | {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, |
| 59 | {4, 16, CPM_PIN_OUTPUT}, |
| 60 | {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, |
| 61 | {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, |
| 62 | {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, |
| 63 | {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, |
| 64 | {4, 21, CPM_PIN_OUTPUT}, |
| 65 | {4, 22, CPM_PIN_OUTPUT}, |
| 66 | {4, 23, CPM_PIN_OUTPUT}, |
| 67 | {4, 24, CPM_PIN_OUTPUT}, |
| 68 | {4, 25, CPM_PIN_OUTPUT}, |
| 69 | {4, 26, CPM_PIN_OUTPUT}, |
| 70 | {4, 27, CPM_PIN_OUTPUT}, |
| 71 | {4, 28, CPM_PIN_OUTPUT}, |
| 72 | {4, 29, CPM_PIN_OUTPUT}, |
| 73 | |
| 74 | /* USB */ |
| 75 | {0, 6, CPM_PIN_INPUT}, /* CLK2 */ |
| 76 | {0, 14, CPM_PIN_INPUT}, /* USBOE */ |
| 77 | {0, 15, CPM_PIN_INPUT}, /* USBRXD */ |
| 78 | {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */ |
| 79 | {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */ |
| 80 | {2, 10, CPM_PIN_INPUT}, /* USBRXN */ |
| 81 | {2, 11, CPM_PIN_INPUT}, /* USBRXP */ |
| 82 | |
| 83 | /* Misc */ |
| 84 | {1, 26, CPM_PIN_INPUT}, /* BRGO2 */ |
| 85 | {1, 27, CPM_PIN_INPUT}, /* BRGO1 */ |
| 86 | }; |
| 87 | |
| 88 | static void __init init_ioports(void) |
| 89 | { |
| 90 | int i; |
| 91 | |
| 92 | for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) { |
| 93 | struct cpm_pin *pin = &ep88xc_pins[i]; |
| 94 | cpm1_set_pin(pin->port, pin->pin, pin->flags); |
| 95 | } |
| 96 | |
| 97 | cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); |
| 98 | cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */ |
| 99 | cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX); |
| 100 | cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX); |
| 101 | cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX); |
| 102 | } |
| 103 | |
| 104 | static u8 __iomem *ep88xc_bcsr; |
| 105 | |
| 106 | #define BCSR7_SCC2_ENABLE 0x10 |
| 107 | |
| 108 | #define BCSR8_PHY1_ENABLE 0x80 |
| 109 | #define BCSR8_PHY1_POWER 0x40 |
| 110 | #define BCSR8_PHY2_ENABLE 0x20 |
| 111 | #define BCSR8_PHY2_POWER 0x10 |
| 112 | |
| 113 | #define BCSR9_USB_ENABLE 0x80 |
| 114 | #define BCSR9_USB_POWER 0x40 |
| 115 | #define BCSR9_USB_HOST 0x20 |
| 116 | #define BCSR9_USB_FULL_SPEED_TARGET 0x10 |
| 117 | |
| 118 | static void __init ep88xc_setup_arch(void) |
| 119 | { |
| 120 | struct device_node *np; |
| 121 | |
| 122 | cpm_reset(); |
| 123 | init_ioports(); |
| 124 | |
| 125 | np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr"); |
| 126 | if (!np) { |
| 127 | printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n"); |
| 128 | return; |
| 129 | } |
| 130 | |
| 131 | ep88xc_bcsr = of_iomap(np, 0); |
| 132 | of_node_put(np); |
| 133 | |
| 134 | if (!ep88xc_bcsr) { |
| 135 | printk(KERN_CRIT "Could not remap BCSR\n"); |
| 136 | return; |
| 137 | } |
| 138 | |
| 139 | setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE); |
| 140 | setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER | |
| 141 | BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER); |
| 142 | } |
| 143 | |
| 144 | static int __init ep88xc_probe(void) |
| 145 | { |
| 146 | return of_machine_is_compatible("fsl,ep88xc"); |
| 147 | } |
| 148 | |
| 149 | static const struct of_device_id of_bus_ids[] __initconst = { |
| 150 | { .name = "soc", }, |
| 151 | { .name = "cpm", }, |
| 152 | { .name = "localbus", }, |
| 153 | {}, |
| 154 | }; |
| 155 | |
| 156 | static int __init declare_of_platform_devices(void) |
| 157 | { |
| 158 | /* Publish the QE devices */ |
| 159 | of_platform_bus_probe(NULL, of_bus_ids, NULL); |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | machine_device_initcall(ep88xc, declare_of_platform_devices); |
| 164 | |
| 165 | define_machine(ep88xc) { |
| 166 | .name = "Embedded Planet EP88xC", |
| 167 | .probe = ep88xc_probe, |
| 168 | .setup_arch = ep88xc_setup_arch, |
| 169 | .init_IRQ = mpc8xx_pics_init, |
| 170 | .get_irq = mpc8xx_get_irq, |
| 171 | .restart = mpc8xx_restart, |
| 172 | .calibrate_decr = mpc8xx_calibrate_decr, |
| 173 | .set_rtc_time = mpc8xx_set_rtc_time, |
| 174 | .get_rtc_time = mpc8xx_get_rtc_time, |
| 175 | .progress = udbg_progress, |
| 176 | }; |