| 1 | config PPC64 |
| 2 | bool "64-bit kernel" |
| 3 | default n |
| 4 | select ZLIB_DEFLATE |
| 5 | help |
| 6 | This option selects whether a 32-bit or a 64-bit kernel |
| 7 | will be built. |
| 8 | |
| 9 | menu "Processor support" |
| 10 | choice |
| 11 | prompt "Processor Type" |
| 12 | depends on PPC32 |
| 13 | help |
| 14 | There are five families of 32 bit PowerPC chips supported. |
| 15 | The most common ones are the desktop and server CPUs (601, 603, |
| 16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their |
| 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
| 18 | The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
| 19 | (85xx) each form a family of their own that is not compatible |
| 20 | with the others. |
| 21 | |
| 22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. |
| 23 | |
| 24 | config PPC_BOOK3S_32 |
| 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
| 26 | select PPC_FPU |
| 27 | |
| 28 | config PPC_85xx |
| 29 | bool "Freescale 85xx" |
| 30 | select E500 |
| 31 | |
| 32 | config PPC_8xx |
| 33 | bool "Freescale 8xx" |
| 34 | select FSL_SOC |
| 35 | select 8xx |
| 36 | select PPC_LIB_RHEAP |
| 37 | |
| 38 | config 40x |
| 39 | bool "AMCC 40x" |
| 40 | select PPC_DCR_NATIVE |
| 41 | select PPC_UDBG_16550 |
| 42 | select 4xx_SOC |
| 43 | select PPC_PCI_CHOICE |
| 44 | |
| 45 | config 44x |
| 46 | bool "AMCC 44x, 46x or 47x" |
| 47 | select PPC_DCR_NATIVE |
| 48 | select PPC_UDBG_16550 |
| 49 | select 4xx_SOC |
| 50 | select PPC_PCI_CHOICE |
| 51 | select PHYS_64BIT |
| 52 | |
| 53 | config E200 |
| 54 | bool "Freescale e200" |
| 55 | |
| 56 | endchoice |
| 57 | |
| 58 | choice |
| 59 | prompt "Processor Type" |
| 60 | depends on PPC64 |
| 61 | help |
| 62 | There are two families of 64 bit PowerPC chips supported. |
| 63 | The most common ones are the desktop and server CPUs |
| 64 | (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...) |
| 65 | |
| 66 | The other are the "embedded" processors compliant with the |
| 67 | "Book 3E" variant of the architecture |
| 68 | |
| 69 | config PPC_BOOK3S_64 |
| 70 | bool "Server processors" |
| 71 | select PPC_FPU |
| 72 | select PPC_HAVE_PMU_SUPPORT |
| 73 | select SYS_SUPPORTS_HUGETLBFS |
| 74 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE |
| 75 | select ARCH_SUPPORTS_NUMA_BALANCING |
| 76 | select IRQ_WORK |
| 77 | |
| 78 | config PPC_BOOK3E_64 |
| 79 | bool "Embedded processors" |
| 80 | select PPC_FPU # Make it a choice ? |
| 81 | select PPC_SMP_MUXED_IPI |
| 82 | select PPC_DOORBELL |
| 83 | |
| 84 | endchoice |
| 85 | |
| 86 | choice |
| 87 | prompt "CPU selection" |
| 88 | depends on PPC64 |
| 89 | default GENERIC_CPU |
| 90 | help |
| 91 | This will create a kernel which is optimised for a particular CPU. |
| 92 | The resulting kernel may not run on other CPUs, so use this with care. |
| 93 | |
| 94 | If unsure, select Generic. |
| 95 | |
| 96 | config GENERIC_CPU |
| 97 | bool "Generic" |
| 98 | depends on !CPU_LITTLE_ENDIAN |
| 99 | |
| 100 | config CELL_CPU |
| 101 | bool "Cell Broadband Engine" |
| 102 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
| 103 | |
| 104 | config POWER4_CPU |
| 105 | bool "POWER4" |
| 106 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
| 107 | |
| 108 | config POWER5_CPU |
| 109 | bool "POWER5" |
| 110 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
| 111 | |
| 112 | config POWER6_CPU |
| 113 | bool "POWER6" |
| 114 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
| 115 | |
| 116 | config POWER7_CPU |
| 117 | bool "POWER7" |
| 118 | depends on PPC_BOOK3S_64 |
| 119 | select ARCH_HAS_FAST_MULTIPLIER |
| 120 | |
| 121 | config POWER8_CPU |
| 122 | bool "POWER8" |
| 123 | depends on PPC_BOOK3S_64 |
| 124 | select ARCH_HAS_FAST_MULTIPLIER |
| 125 | |
| 126 | config E5500_CPU |
| 127 | bool "Freescale e5500" |
| 128 | depends on E500 |
| 129 | |
| 130 | config E6500_CPU |
| 131 | bool "Freescale e6500" |
| 132 | depends on E500 |
| 133 | |
| 134 | endchoice |
| 135 | |
| 136 | config PPC_BOOK3S |
| 137 | def_bool y |
| 138 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 |
| 139 | |
| 140 | config PPC_BOOK3E |
| 141 | def_bool y |
| 142 | depends on PPC_BOOK3E_64 |
| 143 | |
| 144 | config 6xx |
| 145 | def_bool y |
| 146 | depends on PPC32 && PPC_BOOK3S |
| 147 | select PPC_HAVE_PMU_SUPPORT |
| 148 | |
| 149 | # this is temp to handle compat with arch=ppc |
| 150 | config 8xx |
| 151 | bool |
| 152 | |
| 153 | config E500 |
| 154 | select FSL_EMB_PERFMON |
| 155 | select PPC_FSL_BOOK3E |
| 156 | bool |
| 157 | |
| 158 | config PPC_E500MC |
| 159 | bool "e500mc Support" |
| 160 | select PPC_FPU |
| 161 | select COMMON_CLK |
| 162 | depends on E500 |
| 163 | help |
| 164 | This must be enabled for running on e500mc (and derivatives |
| 165 | such as e5500/e6500), and must be disabled for running on |
| 166 | e500v1 or e500v2. |
| 167 | |
| 168 | config PPC_FPU |
| 169 | bool |
| 170 | default y if PPC64 |
| 171 | |
| 172 | config FSL_EMB_PERFMON |
| 173 | bool "Freescale Embedded Perfmon" |
| 174 | depends on E500 || PPC_83xx |
| 175 | help |
| 176 | This is the Performance Monitor support found on the e500 core |
| 177 | and some e300 cores (c3 and c4). Select this only if your |
| 178 | core supports the Embedded Performance Monitor APU |
| 179 | |
| 180 | config FSL_EMB_PERF_EVENT |
| 181 | bool |
| 182 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS |
| 183 | default y |
| 184 | |
| 185 | config FSL_EMB_PERF_EVENT_E500 |
| 186 | bool |
| 187 | depends on FSL_EMB_PERF_EVENT && E500 |
| 188 | default y |
| 189 | |
| 190 | config 4xx |
| 191 | bool |
| 192 | depends on 40x || 44x |
| 193 | default y |
| 194 | |
| 195 | config BOOKE |
| 196 | bool |
| 197 | depends on E200 || E500 || 44x || PPC_BOOK3E |
| 198 | default y |
| 199 | |
| 200 | config FSL_BOOKE |
| 201 | bool |
| 202 | depends on (E200 || E500) && PPC32 |
| 203 | default y |
| 204 | |
| 205 | # this is for common code between PPC32 & PPC64 FSL BOOKE |
| 206 | config PPC_FSL_BOOK3E |
| 207 | bool |
| 208 | select FSL_EMB_PERFMON |
| 209 | select PPC_SMP_MUXED_IPI |
| 210 | select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 |
| 211 | select PPC_DOORBELL |
| 212 | default y if FSL_BOOKE |
| 213 | |
| 214 | config PTE_64BIT |
| 215 | bool |
| 216 | depends on 44x || E500 || PPC_86xx |
| 217 | default y if PHYS_64BIT |
| 218 | |
| 219 | config PHYS_64BIT |
| 220 | bool 'Large physical address support' if E500 || PPC_86xx |
| 221 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx |
| 222 | ---help--- |
| 223 | This option enables kernel support for larger than 32-bit physical |
| 224 | addresses. This feature may not be available on all cores. |
| 225 | |
| 226 | If you have more than 3.5GB of RAM or so, you also need to enable |
| 227 | SWIOTLB under Kernel Options for this to work. The actual number |
| 228 | is platform-dependent. |
| 229 | |
| 230 | If in doubt, say N here. |
| 231 | |
| 232 | config ALTIVEC |
| 233 | bool "AltiVec Support" |
| 234 | depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64) |
| 235 | ---help--- |
| 236 | This option enables kernel support for the Altivec extensions to the |
| 237 | PowerPC processor. The kernel currently supports saving and restoring |
| 238 | altivec registers, and turning on the 'altivec enable' bit so user |
| 239 | processes can execute altivec instructions. |
| 240 | |
| 241 | This option is only usefully if you have a processor that supports |
| 242 | altivec (G4, otherwise known as 74xx series), but does not have |
| 243 | any affect on a non-altivec cpu (it does, however add code to the |
| 244 | kernel). |
| 245 | |
| 246 | If in doubt, say Y here. |
| 247 | |
| 248 | config VSX |
| 249 | bool "VSX Support" |
| 250 | depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU |
| 251 | ---help--- |
| 252 | |
| 253 | This option enables kernel support for the Vector Scaler extensions |
| 254 | to the PowerPC processor. The kernel currently supports saving and |
| 255 | restoring VSX registers, and turning on the 'VSX enable' bit so user |
| 256 | processes can execute VSX instructions. |
| 257 | |
| 258 | This option is only useful if you have a processor that supports |
| 259 | VSX (P7 and above), but does not have any affect on a non-VSX |
| 260 | CPUs (it does, however add code to the kernel). |
| 261 | |
| 262 | If in doubt, say Y here. |
| 263 | |
| 264 | config PPC_ICSWX |
| 265 | bool "Support for PowerPC icswx coprocessor instruction" |
| 266 | depends on PPC_BOOK3S_64 |
| 267 | default n |
| 268 | ---help--- |
| 269 | |
| 270 | This option enables kernel support for the PowerPC Initiate |
| 271 | Coprocessor Store Word (icswx) coprocessor instruction on POWER7 |
| 272 | or newer processors. |
| 273 | |
| 274 | This option is only useful if you have a processor that supports |
| 275 | the icswx coprocessor instruction. It does not have any effect |
| 276 | on processors without the icswx coprocessor instruction. |
| 277 | |
| 278 | This option slightly increases kernel memory usage. |
| 279 | |
| 280 | If in doubt, say N here. |
| 281 | |
| 282 | config PPC_ICSWX_PID |
| 283 | bool "icswx requires direct PID management" |
| 284 | depends on PPC_ICSWX |
| 285 | default y |
| 286 | ---help--- |
| 287 | The PID register in server is used explicitly for ICSWX. In |
| 288 | embedded systems PID management is done by the system. |
| 289 | |
| 290 | config PPC_ICSWX_USE_SIGILL |
| 291 | bool "Should a bad CT cause a SIGILL?" |
| 292 | depends on PPC_ICSWX |
| 293 | default n |
| 294 | ---help--- |
| 295 | Should a bad CT used for "non-record form ICSWX" cause an |
| 296 | illegal instruction signal or should it be silent as |
| 297 | architected. |
| 298 | |
| 299 | If in doubt, say N here. |
| 300 | |
| 301 | config SPE_POSSIBLE |
| 302 | def_bool y |
| 303 | depends on E200 || (E500 && !PPC_E500MC) |
| 304 | |
| 305 | config SPE |
| 306 | bool "SPE Support" |
| 307 | depends on SPE_POSSIBLE |
| 308 | default y |
| 309 | ---help--- |
| 310 | This option enables kernel support for the Signal Processing |
| 311 | Extensions (SPE) to the PowerPC processor. The kernel currently |
| 312 | supports saving and restoring SPE registers, and turning on the |
| 313 | 'spe enable' bit so user processes can execute SPE instructions. |
| 314 | |
| 315 | This option is only useful if you have a processor that supports |
| 316 | SPE (e500, otherwise known as 85xx series), but does not have any |
| 317 | effect on a non-spe cpu (it does, however add code to the kernel). |
| 318 | |
| 319 | If in doubt, say Y here. |
| 320 | |
| 321 | config PPC_STD_MMU |
| 322 | def_bool y |
| 323 | depends on PPC_BOOK3S |
| 324 | |
| 325 | config PPC_STD_MMU_32 |
| 326 | def_bool y |
| 327 | depends on PPC_STD_MMU && PPC32 |
| 328 | |
| 329 | config PPC_STD_MMU_64 |
| 330 | def_bool y |
| 331 | depends on PPC_STD_MMU && PPC64 |
| 332 | |
| 333 | config PPC_RADIX_MMU |
| 334 | bool "Radix MMU Support" |
| 335 | depends on PPC_BOOK3S_64 |
| 336 | default y |
| 337 | help |
| 338 | Enable support for the Power ISA 3.0 Radix style MMU. Currently this |
| 339 | is only implemented by IBM Power9 CPUs, if you don't have one of them |
| 340 | you can probably disable this. |
| 341 | |
| 342 | config PPC_MMU_NOHASH |
| 343 | def_bool y |
| 344 | depends on !PPC_STD_MMU |
| 345 | |
| 346 | config PPC_BOOK3E_MMU |
| 347 | def_bool y |
| 348 | depends on FSL_BOOKE || PPC_BOOK3E |
| 349 | |
| 350 | config PPC_MM_SLICES |
| 351 | bool |
| 352 | default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
| 353 | default n |
| 354 | |
| 355 | config PPC_HAVE_PMU_SUPPORT |
| 356 | bool |
| 357 | |
| 358 | config PPC_PERF_CTRS |
| 359 | def_bool y |
| 360 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
| 361 | help |
| 362 | This enables the powerpc-specific perf_event back-end. |
| 363 | |
| 364 | config SMP |
| 365 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x |
| 366 | bool "Symmetric multi-processing support" |
| 367 | ---help--- |
| 368 | This enables support for systems with more than one CPU. If you have |
| 369 | a system with only one CPU, say N. If you have a system with more |
| 370 | than one CPU, say Y. Note that the kernel does not currently |
| 371 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors |
| 372 | since they have inadequate hardware support for multiprocessor |
| 373 | operation. |
| 374 | |
| 375 | If you say N here, the kernel will run on single and multiprocessor |
| 376 | machines, but will use only one CPU of a multiprocessor machine. If |
| 377 | you say Y here, the kernel will run on single-processor machines. |
| 378 | On a single-processor machine, the kernel will run faster if you say |
| 379 | N here. |
| 380 | |
| 381 | If you don't know what to do here, say N. |
| 382 | |
| 383 | config NR_CPUS |
| 384 | int "Maximum number of CPUs (2-8192)" |
| 385 | range 2 8192 |
| 386 | depends on SMP |
| 387 | default "32" if PPC64 |
| 388 | default "4" |
| 389 | |
| 390 | config NOT_COHERENT_CACHE |
| 391 | bool |
| 392 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
| 393 | default n if PPC_47x |
| 394 | default y |
| 395 | |
| 396 | config CHECK_CACHE_COHERENCY |
| 397 | bool |
| 398 | |
| 399 | config PPC_DOORBELL |
| 400 | bool |
| 401 | default n |
| 402 | |
| 403 | endmenu |
| 404 | |
| 405 | config VDSO32 |
| 406 | def_bool y |
| 407 | depends on PPC32 || CPU_BIG_ENDIAN |
| 408 | help |
| 409 | This symbol controls whether we build the 32-bit VDSO. We obviously |
| 410 | want to do that if we're building a 32-bit kernel. If we're building |
| 411 | a 64-bit kernel then we only want a 32-bit VDSO if we're building for |
| 412 | big endian. That is because the only little endian configuration we |
| 413 | support is ppc64le which is 64-bit only. |
| 414 | |
| 415 | choice |
| 416 | prompt "Endianness selection" |
| 417 | default CPU_BIG_ENDIAN |
| 418 | help |
| 419 | This option selects whether a big endian or little endian kernel will |
| 420 | be built. |
| 421 | |
| 422 | config CPU_BIG_ENDIAN |
| 423 | bool "Build big endian kernel" |
| 424 | help |
| 425 | Build a big endian kernel. |
| 426 | |
| 427 | If unsure, select this option. |
| 428 | |
| 429 | config CPU_LITTLE_ENDIAN |
| 430 | bool "Build little endian kernel" |
| 431 | depends on PPC_BOOK3S_64 |
| 432 | select PPC64_BOOT_WRAPPER |
| 433 | help |
| 434 | Build a little endian kernel. |
| 435 | |
| 436 | Note that if cross compiling a little endian kernel, |
| 437 | CROSS_COMPILE must point to a toolchain capable of targeting |
| 438 | little endian powerpc. |
| 439 | |
| 440 | endchoice |
| 441 | |
| 442 | config PPC64_BOOT_WRAPPER |
| 443 | def_bool n |
| 444 | depends on CPU_LITTLE_ENDIAN |