| 1 | /* |
| 2 | * FSL SoC setup code |
| 3 | * |
| 4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) |
| 5 | * |
| 6 | * 2006 (c) MontaVista Software, Inc. |
| 7 | * Vitaly Bordug <vbordug@ru.mvista.com> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/stddef.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/errno.h> |
| 19 | #include <linux/major.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/irq.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/device.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/of.h> |
| 26 | #include <linux/of_platform.h> |
| 27 | #include <linux/phy.h> |
| 28 | #include <linux/phy_fixed.h> |
| 29 | #include <linux/spi/spi.h> |
| 30 | #include <linux/fsl_devices.h> |
| 31 | #include <linux/fs_enet_pd.h> |
| 32 | #include <linux/fs_uart_pd.h> |
| 33 | |
| 34 | #include <asm/system.h> |
| 35 | #include <asm/atomic.h> |
| 36 | #include <asm/io.h> |
| 37 | #include <asm/irq.h> |
| 38 | #include <asm/time.h> |
| 39 | #include <asm/prom.h> |
| 40 | #include <sysdev/fsl_soc.h> |
| 41 | #include <mm/mmu_decl.h> |
| 42 | #include <asm/cpm2.h> |
| 43 | |
| 44 | extern void init_fcc_ioports(struct fs_platform_info*); |
| 45 | extern void init_fec_ioports(struct fs_platform_info*); |
| 46 | extern void init_smc_ioports(struct fs_uart_platform_info*); |
| 47 | static phys_addr_t immrbase = -1; |
| 48 | |
| 49 | phys_addr_t get_immrbase(void) |
| 50 | { |
| 51 | struct device_node *soc; |
| 52 | |
| 53 | if (immrbase != -1) |
| 54 | return immrbase; |
| 55 | |
| 56 | soc = of_find_node_by_type(NULL, "soc"); |
| 57 | if (soc) { |
| 58 | int size; |
| 59 | u32 naddr; |
| 60 | const u32 *prop = of_get_property(soc, "#address-cells", &size); |
| 61 | |
| 62 | if (prop && size == 4) |
| 63 | naddr = *prop; |
| 64 | else |
| 65 | naddr = 2; |
| 66 | |
| 67 | prop = of_get_property(soc, "ranges", &size); |
| 68 | if (prop) |
| 69 | immrbase = of_translate_address(soc, prop + naddr); |
| 70 | |
| 71 | of_node_put(soc); |
| 72 | } |
| 73 | |
| 74 | return immrbase; |
| 75 | } |
| 76 | |
| 77 | EXPORT_SYMBOL(get_immrbase); |
| 78 | |
| 79 | static u32 sysfreq = -1; |
| 80 | |
| 81 | u32 fsl_get_sys_freq(void) |
| 82 | { |
| 83 | struct device_node *soc; |
| 84 | const u32 *prop; |
| 85 | int size; |
| 86 | |
| 87 | if (sysfreq != -1) |
| 88 | return sysfreq; |
| 89 | |
| 90 | soc = of_find_node_by_type(NULL, "soc"); |
| 91 | if (!soc) |
| 92 | return -1; |
| 93 | |
| 94 | prop = of_get_property(soc, "clock-frequency", &size); |
| 95 | if (!prop || size != sizeof(*prop) || *prop == 0) |
| 96 | prop = of_get_property(soc, "bus-frequency", &size); |
| 97 | |
| 98 | if (prop && size == sizeof(*prop)) |
| 99 | sysfreq = *prop; |
| 100 | |
| 101 | of_node_put(soc); |
| 102 | return sysfreq; |
| 103 | } |
| 104 | EXPORT_SYMBOL(fsl_get_sys_freq); |
| 105 | |
| 106 | #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) |
| 107 | |
| 108 | static u32 brgfreq = -1; |
| 109 | |
| 110 | u32 get_brgfreq(void) |
| 111 | { |
| 112 | struct device_node *node; |
| 113 | const unsigned int *prop; |
| 114 | int size; |
| 115 | |
| 116 | if (brgfreq != -1) |
| 117 | return brgfreq; |
| 118 | |
| 119 | node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); |
| 120 | if (node) { |
| 121 | prop = of_get_property(node, "clock-frequency", &size); |
| 122 | if (prop && size == 4) |
| 123 | brgfreq = *prop; |
| 124 | |
| 125 | of_node_put(node); |
| 126 | return brgfreq; |
| 127 | } |
| 128 | |
| 129 | /* Legacy device binding -- will go away when no users are left. */ |
| 130 | node = of_find_node_by_type(NULL, "cpm"); |
| 131 | if (!node) |
| 132 | node = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
| 133 | if (!node) |
| 134 | node = of_find_node_by_type(NULL, "qe"); |
| 135 | |
| 136 | if (node) { |
| 137 | prop = of_get_property(node, "brg-frequency", &size); |
| 138 | if (prop && size == 4) |
| 139 | brgfreq = *prop; |
| 140 | |
| 141 | if (brgfreq == -1 || brgfreq == 0) { |
| 142 | prop = of_get_property(node, "bus-frequency", &size); |
| 143 | if (prop && size == 4) |
| 144 | brgfreq = *prop / 2; |
| 145 | } |
| 146 | of_node_put(node); |
| 147 | } |
| 148 | |
| 149 | return brgfreq; |
| 150 | } |
| 151 | |
| 152 | EXPORT_SYMBOL(get_brgfreq); |
| 153 | |
| 154 | static u32 fs_baudrate = -1; |
| 155 | |
| 156 | u32 get_baudrate(void) |
| 157 | { |
| 158 | struct device_node *node; |
| 159 | |
| 160 | if (fs_baudrate != -1) |
| 161 | return fs_baudrate; |
| 162 | |
| 163 | node = of_find_node_by_type(NULL, "serial"); |
| 164 | if (node) { |
| 165 | int size; |
| 166 | const unsigned int *prop = of_get_property(node, |
| 167 | "current-speed", &size); |
| 168 | |
| 169 | if (prop) |
| 170 | fs_baudrate = *prop; |
| 171 | of_node_put(node); |
| 172 | } |
| 173 | |
| 174 | return fs_baudrate; |
| 175 | } |
| 176 | |
| 177 | EXPORT_SYMBOL(get_baudrate); |
| 178 | #endif /* CONFIG_CPM2 */ |
| 179 | |
| 180 | #ifdef CONFIG_FIXED_PHY |
| 181 | static int __init of_add_fixed_phys(void) |
| 182 | { |
| 183 | int ret; |
| 184 | struct device_node *np; |
| 185 | u32 *fixed_link; |
| 186 | struct fixed_phy_status status = {}; |
| 187 | |
| 188 | for_each_node_by_name(np, "ethernet") { |
| 189 | fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL); |
| 190 | if (!fixed_link) |
| 191 | continue; |
| 192 | |
| 193 | status.link = 1; |
| 194 | status.duplex = fixed_link[1]; |
| 195 | status.speed = fixed_link[2]; |
| 196 | status.pause = fixed_link[3]; |
| 197 | status.asym_pause = fixed_link[4]; |
| 198 | |
| 199 | ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status); |
| 200 | if (ret) { |
| 201 | of_node_put(np); |
| 202 | return ret; |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | return 0; |
| 207 | } |
| 208 | arch_initcall(of_add_fixed_phys); |
| 209 | #endif /* CONFIG_FIXED_PHY */ |
| 210 | |
| 211 | #ifdef CONFIG_PPC_83xx |
| 212 | static int __init mpc83xx_wdt_init(void) |
| 213 | { |
| 214 | struct resource r; |
| 215 | struct device_node *np; |
| 216 | struct platform_device *dev; |
| 217 | u32 freq = fsl_get_sys_freq(); |
| 218 | int ret; |
| 219 | |
| 220 | np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); |
| 221 | |
| 222 | if (!np) { |
| 223 | ret = -ENODEV; |
| 224 | goto nodev; |
| 225 | } |
| 226 | |
| 227 | memset(&r, 0, sizeof(r)); |
| 228 | |
| 229 | ret = of_address_to_resource(np, 0, &r); |
| 230 | if (ret) |
| 231 | goto err; |
| 232 | |
| 233 | dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1); |
| 234 | if (IS_ERR(dev)) { |
| 235 | ret = PTR_ERR(dev); |
| 236 | goto err; |
| 237 | } |
| 238 | |
| 239 | ret = platform_device_add_data(dev, &freq, sizeof(freq)); |
| 240 | if (ret) |
| 241 | goto unreg; |
| 242 | |
| 243 | of_node_put(np); |
| 244 | return 0; |
| 245 | |
| 246 | unreg: |
| 247 | platform_device_unregister(dev); |
| 248 | err: |
| 249 | of_node_put(np); |
| 250 | nodev: |
| 251 | return ret; |
| 252 | } |
| 253 | |
| 254 | arch_initcall(mpc83xx_wdt_init); |
| 255 | #endif |
| 256 | |
| 257 | static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) |
| 258 | { |
| 259 | if (!phy_type) |
| 260 | return FSL_USB2_PHY_NONE; |
| 261 | if (!strcasecmp(phy_type, "ulpi")) |
| 262 | return FSL_USB2_PHY_ULPI; |
| 263 | if (!strcasecmp(phy_type, "utmi")) |
| 264 | return FSL_USB2_PHY_UTMI; |
| 265 | if (!strcasecmp(phy_type, "utmi_wide")) |
| 266 | return FSL_USB2_PHY_UTMI_WIDE; |
| 267 | if (!strcasecmp(phy_type, "serial")) |
| 268 | return FSL_USB2_PHY_SERIAL; |
| 269 | |
| 270 | return FSL_USB2_PHY_NONE; |
| 271 | } |
| 272 | |
| 273 | static int __init fsl_usb_of_init(void) |
| 274 | { |
| 275 | struct device_node *np; |
| 276 | unsigned int i = 0; |
| 277 | struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL, |
| 278 | *usb_dev_dr_client = NULL; |
| 279 | int ret; |
| 280 | |
| 281 | for_each_compatible_node(np, NULL, "fsl-usb2-mph") { |
| 282 | struct resource r[2]; |
| 283 | struct fsl_usb2_platform_data usb_data; |
| 284 | const unsigned char *prop = NULL; |
| 285 | |
| 286 | memset(&r, 0, sizeof(r)); |
| 287 | memset(&usb_data, 0, sizeof(usb_data)); |
| 288 | |
| 289 | ret = of_address_to_resource(np, 0, &r[0]); |
| 290 | if (ret) |
| 291 | goto err; |
| 292 | |
| 293 | of_irq_to_resource(np, 0, &r[1]); |
| 294 | |
| 295 | usb_dev_mph = |
| 296 | platform_device_register_simple("fsl-ehci", i, r, 2); |
| 297 | if (IS_ERR(usb_dev_mph)) { |
| 298 | ret = PTR_ERR(usb_dev_mph); |
| 299 | goto err; |
| 300 | } |
| 301 | |
| 302 | usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL; |
| 303 | usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask; |
| 304 | |
| 305 | usb_data.operating_mode = FSL_USB2_MPH_HOST; |
| 306 | |
| 307 | prop = of_get_property(np, "port0", NULL); |
| 308 | if (prop) |
| 309 | usb_data.port_enables |= FSL_USB2_PORT0_ENABLED; |
| 310 | |
| 311 | prop = of_get_property(np, "port1", NULL); |
| 312 | if (prop) |
| 313 | usb_data.port_enables |= FSL_USB2_PORT1_ENABLED; |
| 314 | |
| 315 | prop = of_get_property(np, "phy_type", NULL); |
| 316 | usb_data.phy_mode = determine_usb_phy(prop); |
| 317 | |
| 318 | ret = |
| 319 | platform_device_add_data(usb_dev_mph, &usb_data, |
| 320 | sizeof(struct |
| 321 | fsl_usb2_platform_data)); |
| 322 | if (ret) |
| 323 | goto unreg_mph; |
| 324 | i++; |
| 325 | } |
| 326 | |
| 327 | for_each_compatible_node(np, NULL, "fsl-usb2-dr") { |
| 328 | struct resource r[2]; |
| 329 | struct fsl_usb2_platform_data usb_data; |
| 330 | const unsigned char *prop = NULL; |
| 331 | |
| 332 | if (!of_device_is_available(np)) |
| 333 | continue; |
| 334 | |
| 335 | memset(&r, 0, sizeof(r)); |
| 336 | memset(&usb_data, 0, sizeof(usb_data)); |
| 337 | |
| 338 | ret = of_address_to_resource(np, 0, &r[0]); |
| 339 | if (ret) |
| 340 | goto unreg_mph; |
| 341 | |
| 342 | of_irq_to_resource(np, 0, &r[1]); |
| 343 | |
| 344 | prop = of_get_property(np, "dr_mode", NULL); |
| 345 | |
| 346 | if (!prop || !strcmp(prop, "host")) { |
| 347 | usb_data.operating_mode = FSL_USB2_DR_HOST; |
| 348 | usb_dev_dr_host = platform_device_register_simple( |
| 349 | "fsl-ehci", i, r, 2); |
| 350 | if (IS_ERR(usb_dev_dr_host)) { |
| 351 | ret = PTR_ERR(usb_dev_dr_host); |
| 352 | goto err; |
| 353 | } |
| 354 | } else if (prop && !strcmp(prop, "peripheral")) { |
| 355 | usb_data.operating_mode = FSL_USB2_DR_DEVICE; |
| 356 | usb_dev_dr_client = platform_device_register_simple( |
| 357 | "fsl-usb2-udc", i, r, 2); |
| 358 | if (IS_ERR(usb_dev_dr_client)) { |
| 359 | ret = PTR_ERR(usb_dev_dr_client); |
| 360 | goto err; |
| 361 | } |
| 362 | } else if (prop && !strcmp(prop, "otg")) { |
| 363 | usb_data.operating_mode = FSL_USB2_DR_OTG; |
| 364 | usb_dev_dr_host = platform_device_register_simple( |
| 365 | "fsl-ehci", i, r, 2); |
| 366 | if (IS_ERR(usb_dev_dr_host)) { |
| 367 | ret = PTR_ERR(usb_dev_dr_host); |
| 368 | goto err; |
| 369 | } |
| 370 | usb_dev_dr_client = platform_device_register_simple( |
| 371 | "fsl-usb2-udc", i, r, 2); |
| 372 | if (IS_ERR(usb_dev_dr_client)) { |
| 373 | ret = PTR_ERR(usb_dev_dr_client); |
| 374 | goto err; |
| 375 | } |
| 376 | } else { |
| 377 | ret = -EINVAL; |
| 378 | goto err; |
| 379 | } |
| 380 | |
| 381 | prop = of_get_property(np, "phy_type", NULL); |
| 382 | usb_data.phy_mode = determine_usb_phy(prop); |
| 383 | |
| 384 | if (usb_dev_dr_host) { |
| 385 | usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL; |
| 386 | usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host-> |
| 387 | dev.coherent_dma_mask; |
| 388 | if ((ret = platform_device_add_data(usb_dev_dr_host, |
| 389 | &usb_data, sizeof(struct |
| 390 | fsl_usb2_platform_data)))) |
| 391 | goto unreg_dr; |
| 392 | } |
| 393 | if (usb_dev_dr_client) { |
| 394 | usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL; |
| 395 | usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client-> |
| 396 | dev.coherent_dma_mask; |
| 397 | if ((ret = platform_device_add_data(usb_dev_dr_client, |
| 398 | &usb_data, sizeof(struct |
| 399 | fsl_usb2_platform_data)))) |
| 400 | goto unreg_dr; |
| 401 | } |
| 402 | i++; |
| 403 | } |
| 404 | return 0; |
| 405 | |
| 406 | unreg_dr: |
| 407 | if (usb_dev_dr_host) |
| 408 | platform_device_unregister(usb_dev_dr_host); |
| 409 | if (usb_dev_dr_client) |
| 410 | platform_device_unregister(usb_dev_dr_client); |
| 411 | unreg_mph: |
| 412 | if (usb_dev_mph) |
| 413 | platform_device_unregister(usb_dev_mph); |
| 414 | err: |
| 415 | return ret; |
| 416 | } |
| 417 | |
| 418 | arch_initcall(fsl_usb_of_init); |
| 419 | |
| 420 | static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, |
| 421 | struct spi_board_info *board_infos, |
| 422 | unsigned int num_board_infos, |
| 423 | void (*activate_cs)(u8 cs, u8 polarity), |
| 424 | void (*deactivate_cs)(u8 cs, u8 polarity)) |
| 425 | { |
| 426 | struct device_node *np; |
| 427 | unsigned int i = 0; |
| 428 | |
| 429 | for_each_compatible_node(np, type, compatible) { |
| 430 | int ret; |
| 431 | unsigned int j; |
| 432 | const void *prop; |
| 433 | struct resource res[2]; |
| 434 | struct platform_device *pdev; |
| 435 | struct fsl_spi_platform_data pdata = { |
| 436 | .activate_cs = activate_cs, |
| 437 | .deactivate_cs = deactivate_cs, |
| 438 | }; |
| 439 | |
| 440 | memset(res, 0, sizeof(res)); |
| 441 | |
| 442 | pdata.sysclk = sysclk; |
| 443 | |
| 444 | prop = of_get_property(np, "reg", NULL); |
| 445 | if (!prop) |
| 446 | goto err; |
| 447 | pdata.bus_num = *(u32 *)prop; |
| 448 | |
| 449 | prop = of_get_property(np, "cell-index", NULL); |
| 450 | if (prop) |
| 451 | i = *(u32 *)prop; |
| 452 | |
| 453 | prop = of_get_property(np, "mode", NULL); |
| 454 | if (prop && !strcmp(prop, "cpu-qe")) |
| 455 | pdata.qe_mode = 1; |
| 456 | |
| 457 | for (j = 0; j < num_board_infos; j++) { |
| 458 | if (board_infos[j].bus_num == pdata.bus_num) |
| 459 | pdata.max_chipselect++; |
| 460 | } |
| 461 | |
| 462 | if (!pdata.max_chipselect) |
| 463 | continue; |
| 464 | |
| 465 | ret = of_address_to_resource(np, 0, &res[0]); |
| 466 | if (ret) |
| 467 | goto err; |
| 468 | |
| 469 | ret = of_irq_to_resource(np, 0, &res[1]); |
| 470 | if (ret == NO_IRQ) |
| 471 | goto err; |
| 472 | |
| 473 | pdev = platform_device_alloc("mpc83xx_spi", i); |
| 474 | if (!pdev) |
| 475 | goto err; |
| 476 | |
| 477 | ret = platform_device_add_data(pdev, &pdata, sizeof(pdata)); |
| 478 | if (ret) |
| 479 | goto unreg; |
| 480 | |
| 481 | ret = platform_device_add_resources(pdev, res, |
| 482 | ARRAY_SIZE(res)); |
| 483 | if (ret) |
| 484 | goto unreg; |
| 485 | |
| 486 | ret = platform_device_add(pdev); |
| 487 | if (ret) |
| 488 | goto unreg; |
| 489 | |
| 490 | goto next; |
| 491 | unreg: |
| 492 | platform_device_del(pdev); |
| 493 | err: |
| 494 | pr_err("%s: registration failed\n", np->full_name); |
| 495 | next: |
| 496 | i++; |
| 497 | } |
| 498 | |
| 499 | return i; |
| 500 | } |
| 501 | |
| 502 | int __init fsl_spi_init(struct spi_board_info *board_infos, |
| 503 | unsigned int num_board_infos, |
| 504 | void (*activate_cs)(u8 cs, u8 polarity), |
| 505 | void (*deactivate_cs)(u8 cs, u8 polarity)) |
| 506 | { |
| 507 | u32 sysclk = -1; |
| 508 | int ret; |
| 509 | |
| 510 | #ifdef CONFIG_QUICC_ENGINE |
| 511 | /* SPI controller is either clocked from QE or SoC clock */ |
| 512 | sysclk = get_brgfreq(); |
| 513 | #endif |
| 514 | if (sysclk == -1) { |
| 515 | sysclk = fsl_get_sys_freq(); |
| 516 | if (sysclk == -1) |
| 517 | return -ENODEV; |
| 518 | } |
| 519 | |
| 520 | ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos, |
| 521 | num_board_infos, activate_cs, deactivate_cs); |
| 522 | if (!ret) |
| 523 | of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos, |
| 524 | num_board_infos, activate_cs, deactivate_cs); |
| 525 | |
| 526 | return spi_register_board_info(board_infos, num_board_infos); |
| 527 | } |
| 528 | |
| 529 | #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) |
| 530 | static __be32 __iomem *rstcr; |
| 531 | |
| 532 | static int __init setup_rstcr(void) |
| 533 | { |
| 534 | struct device_node *np; |
| 535 | np = of_find_node_by_name(NULL, "global-utilities"); |
| 536 | if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) { |
| 537 | const u32 *prop = of_get_property(np, "reg", NULL); |
| 538 | if (prop) { |
| 539 | /* map reset control register |
| 540 | * 0xE00B0 is offset of reset control register |
| 541 | */ |
| 542 | rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff); |
| 543 | if (!rstcr) |
| 544 | printk (KERN_EMERG "Error: reset control " |
| 545 | "register not mapped!\n"); |
| 546 | } |
| 547 | } else |
| 548 | printk (KERN_INFO "rstcr compatible register does not exist!\n"); |
| 549 | if (np) |
| 550 | of_node_put(np); |
| 551 | return 0; |
| 552 | } |
| 553 | |
| 554 | arch_initcall(setup_rstcr); |
| 555 | |
| 556 | void fsl_rstcr_restart(char *cmd) |
| 557 | { |
| 558 | local_irq_disable(); |
| 559 | if (rstcr) |
| 560 | /* set reset control register */ |
| 561 | out_be32(rstcr, 0x2); /* HRESET_REQ */ |
| 562 | |
| 563 | while (1) ; |
| 564 | } |
| 565 | #endif |
| 566 | |
| 567 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) |
| 568 | struct platform_diu_data_ops diu_ops; |
| 569 | EXPORT_SYMBOL(diu_ops); |
| 570 | #endif |