| 1 | /* |
| 2 | * s390 (re)ipl support |
| 3 | * |
| 4 | * Copyright IBM Corp. 2007 |
| 5 | */ |
| 6 | |
| 7 | #ifndef _ASM_S390_IPL_H |
| 8 | #define _ASM_S390_IPL_H |
| 9 | |
| 10 | #include <asm/lowcore.h> |
| 11 | #include <asm/types.h> |
| 12 | #include <asm/cio.h> |
| 13 | #include <asm/setup.h> |
| 14 | |
| 15 | #define IPL_PARMBLOCK_ORIGIN 0x2000 |
| 16 | |
| 17 | #define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \ |
| 18 | sizeof(struct ipl_block_fcp)) |
| 19 | |
| 20 | #define IPL_PARM_BLK0_FCP_LEN (sizeof(struct ipl_block_fcp) + 16) |
| 21 | |
| 22 | #define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \ |
| 23 | sizeof(struct ipl_block_ccw)) |
| 24 | |
| 25 | #define IPL_PARM_BLK0_CCW_LEN (sizeof(struct ipl_block_ccw) + 16) |
| 26 | |
| 27 | #define IPL_MAX_SUPPORTED_VERSION (0) |
| 28 | |
| 29 | #define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \ |
| 30 | IPL_PARMBLOCK_ORIGIN) |
| 31 | #define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.len) |
| 32 | |
| 33 | struct ipl_list_hdr { |
| 34 | u32 len; |
| 35 | u8 reserved1[3]; |
| 36 | u8 version; |
| 37 | u32 blk0_len; |
| 38 | u8 pbt; |
| 39 | u8 flags; |
| 40 | u16 reserved2; |
| 41 | u8 loadparm[8]; |
| 42 | } __attribute__((packed)); |
| 43 | |
| 44 | struct ipl_block_fcp { |
| 45 | u8 reserved1[305-1]; |
| 46 | u8 opt; |
| 47 | u8 reserved2[3]; |
| 48 | u16 reserved3; |
| 49 | u16 devno; |
| 50 | u8 reserved4[4]; |
| 51 | u64 wwpn; |
| 52 | u64 lun; |
| 53 | u32 bootprog; |
| 54 | u8 reserved5[12]; |
| 55 | u64 br_lba; |
| 56 | u32 scp_data_len; |
| 57 | u8 reserved6[260]; |
| 58 | u8 scp_data[]; |
| 59 | } __attribute__((packed)); |
| 60 | |
| 61 | #define DIAG308_VMPARM_SIZE 64 |
| 62 | #define DIAG308_SCPDATA_SIZE (PAGE_SIZE - (sizeof(struct ipl_list_hdr) + \ |
| 63 | offsetof(struct ipl_block_fcp, scp_data))) |
| 64 | |
| 65 | struct ipl_block_ccw { |
| 66 | u8 reserved1[84]; |
| 67 | u16 reserved2 : 13; |
| 68 | u8 ssid : 3; |
| 69 | u16 devno; |
| 70 | u8 vm_flags; |
| 71 | u8 reserved3[3]; |
| 72 | u32 vm_parm_len; |
| 73 | u8 nss_name[8]; |
| 74 | u8 vm_parm[DIAG308_VMPARM_SIZE]; |
| 75 | u8 reserved4[8]; |
| 76 | } __attribute__((packed)); |
| 77 | |
| 78 | struct ipl_parameter_block { |
| 79 | struct ipl_list_hdr hdr; |
| 80 | union { |
| 81 | struct ipl_block_fcp fcp; |
| 82 | struct ipl_block_ccw ccw; |
| 83 | } ipl_info; |
| 84 | } __attribute__((packed,aligned(4096))); |
| 85 | |
| 86 | /* |
| 87 | * IPL validity flags |
| 88 | */ |
| 89 | extern u32 ipl_flags; |
| 90 | |
| 91 | struct save_area; |
| 92 | struct save_area * __init save_area_alloc(bool is_boot_cpu); |
| 93 | struct save_area * __init save_area_boot_cpu(void); |
| 94 | void __init save_area_add_regs(struct save_area *, void *regs); |
| 95 | void __init save_area_add_vxrs(struct save_area *, __vector128 *vxrs); |
| 96 | |
| 97 | extern void do_reipl(void); |
| 98 | extern void do_halt(void); |
| 99 | extern void do_poff(void); |
| 100 | extern void ipl_save_parameters(void); |
| 101 | extern void ipl_update_parameters(void); |
| 102 | extern size_t append_ipl_vmparm(char *, size_t); |
| 103 | extern size_t append_ipl_scpdata(char *, size_t); |
| 104 | |
| 105 | enum { |
| 106 | IPL_DEVNO_VALID = 1, |
| 107 | IPL_PARMBLOCK_VALID = 2, |
| 108 | IPL_NSS_VALID = 4, |
| 109 | }; |
| 110 | |
| 111 | enum ipl_type { |
| 112 | IPL_TYPE_UNKNOWN = 1, |
| 113 | IPL_TYPE_CCW = 2, |
| 114 | IPL_TYPE_FCP = 4, |
| 115 | IPL_TYPE_FCP_DUMP = 8, |
| 116 | IPL_TYPE_NSS = 16, |
| 117 | }; |
| 118 | |
| 119 | struct ipl_info |
| 120 | { |
| 121 | enum ipl_type type; |
| 122 | union { |
| 123 | struct { |
| 124 | struct ccw_dev_id dev_id; |
| 125 | } ccw; |
| 126 | struct { |
| 127 | struct ccw_dev_id dev_id; |
| 128 | u64 wwpn; |
| 129 | u64 lun; |
| 130 | } fcp; |
| 131 | struct { |
| 132 | char name[NSS_NAME_SIZE + 1]; |
| 133 | } nss; |
| 134 | } data; |
| 135 | }; |
| 136 | |
| 137 | extern struct ipl_info ipl_info; |
| 138 | extern void setup_ipl(void); |
| 139 | |
| 140 | /* |
| 141 | * DIAG 308 support |
| 142 | */ |
| 143 | enum diag308_subcode { |
| 144 | DIAG308_REL_HSA = 2, |
| 145 | DIAG308_IPL = 3, |
| 146 | DIAG308_DUMP = 4, |
| 147 | DIAG308_SET = 5, |
| 148 | DIAG308_STORE = 6, |
| 149 | }; |
| 150 | |
| 151 | enum diag308_ipl_type { |
| 152 | DIAG308_IPL_TYPE_FCP = 0, |
| 153 | DIAG308_IPL_TYPE_CCW = 2, |
| 154 | }; |
| 155 | |
| 156 | enum diag308_opt { |
| 157 | DIAG308_IPL_OPT_IPL = 0x10, |
| 158 | DIAG308_IPL_OPT_DUMP = 0x20, |
| 159 | }; |
| 160 | |
| 161 | enum diag308_flags { |
| 162 | DIAG308_FLAGS_LP_VALID = 0x80, |
| 163 | }; |
| 164 | |
| 165 | enum diag308_vm_flags { |
| 166 | DIAG308_VM_FLAGS_NSS_VALID = 0x80, |
| 167 | DIAG308_VM_FLAGS_VP_VALID = 0x40, |
| 168 | }; |
| 169 | |
| 170 | enum diag308_rc { |
| 171 | DIAG308_RC_OK = 0x0001, |
| 172 | DIAG308_RC_NOCONFIG = 0x0102, |
| 173 | }; |
| 174 | |
| 175 | extern int diag308(unsigned long subcode, void *addr); |
| 176 | extern void diag308_reset(void); |
| 177 | extern void store_status(void (*fn)(void *), void *data); |
| 178 | extern void lgr_info_log(void); |
| 179 | |
| 180 | #endif /* _ASM_S390_IPL_H */ |