| 1 | /* |
| 2 | * Kernel-based Virtual Machine driver for Linux |
| 3 | * |
| 4 | * This module enables machines with Intel VT-x extensions to run virtual |
| 5 | * machines without emulation or binary translation. |
| 6 | * |
| 7 | * MMU support |
| 8 | * |
| 9 | * Copyright (C) 2006 Qumranet, Inc. |
| 10 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. |
| 11 | * |
| 12 | * Authors: |
| 13 | * Yaniv Kamay <yaniv@qumranet.com> |
| 14 | * Avi Kivity <avi@qumranet.com> |
| 15 | * |
| 16 | * This work is licensed under the terms of the GNU GPL, version 2. See |
| 17 | * the COPYING file in the top-level directory. |
| 18 | * |
| 19 | */ |
| 20 | |
| 21 | #include "irq.h" |
| 22 | #include "mmu.h" |
| 23 | #include "x86.h" |
| 24 | #include "kvm_cache_regs.h" |
| 25 | #include "cpuid.h" |
| 26 | |
| 27 | #include <linux/kvm_host.h> |
| 28 | #include <linux/types.h> |
| 29 | #include <linux/string.h> |
| 30 | #include <linux/mm.h> |
| 31 | #include <linux/highmem.h> |
| 32 | #include <linux/module.h> |
| 33 | #include <linux/swap.h> |
| 34 | #include <linux/hugetlb.h> |
| 35 | #include <linux/compiler.h> |
| 36 | #include <linux/srcu.h> |
| 37 | #include <linux/slab.h> |
| 38 | #include <linux/uaccess.h> |
| 39 | |
| 40 | #include <asm/page.h> |
| 41 | #include <asm/cmpxchg.h> |
| 42 | #include <asm/io.h> |
| 43 | #include <asm/vmx.h> |
| 44 | #include <asm/kvm_page_track.h> |
| 45 | |
| 46 | /* |
| 47 | * When setting this variable to true it enables Two-Dimensional-Paging |
| 48 | * where the hardware walks 2 page tables: |
| 49 | * 1. the guest-virtual to guest-physical |
| 50 | * 2. while doing 1. it walks guest-physical to host-physical |
| 51 | * If the hardware supports that we don't need to do shadow paging. |
| 52 | */ |
| 53 | bool tdp_enabled = false; |
| 54 | |
| 55 | enum { |
| 56 | AUDIT_PRE_PAGE_FAULT, |
| 57 | AUDIT_POST_PAGE_FAULT, |
| 58 | AUDIT_PRE_PTE_WRITE, |
| 59 | AUDIT_POST_PTE_WRITE, |
| 60 | AUDIT_PRE_SYNC, |
| 61 | AUDIT_POST_SYNC |
| 62 | }; |
| 63 | |
| 64 | #undef MMU_DEBUG |
| 65 | |
| 66 | #ifdef MMU_DEBUG |
| 67 | static bool dbg = 0; |
| 68 | module_param(dbg, bool, 0644); |
| 69 | |
| 70 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) |
| 71 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) |
| 72 | #define MMU_WARN_ON(x) WARN_ON(x) |
| 73 | #else |
| 74 | #define pgprintk(x...) do { } while (0) |
| 75 | #define rmap_printk(x...) do { } while (0) |
| 76 | #define MMU_WARN_ON(x) do { } while (0) |
| 77 | #endif |
| 78 | |
| 79 | #define PTE_PREFETCH_NUM 8 |
| 80 | |
| 81 | #define PT_FIRST_AVAIL_BITS_SHIFT 10 |
| 82 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 |
| 83 | |
| 84 | #define PT64_LEVEL_BITS 9 |
| 85 | |
| 86 | #define PT64_LEVEL_SHIFT(level) \ |
| 87 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
| 88 | |
| 89 | #define PT64_INDEX(address, level)\ |
| 90 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) |
| 91 | |
| 92 | |
| 93 | #define PT32_LEVEL_BITS 10 |
| 94 | |
| 95 | #define PT32_LEVEL_SHIFT(level) \ |
| 96 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
| 97 | |
| 98 | #define PT32_LVL_OFFSET_MASK(level) \ |
| 99 | (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ |
| 100 | * PT32_LEVEL_BITS))) - 1)) |
| 101 | |
| 102 | #define PT32_INDEX(address, level)\ |
| 103 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) |
| 104 | |
| 105 | |
| 106 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
| 107 | #define PT64_DIR_BASE_ADDR_MASK \ |
| 108 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) |
| 109 | #define PT64_LVL_ADDR_MASK(level) \ |
| 110 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ |
| 111 | * PT64_LEVEL_BITS))) - 1)) |
| 112 | #define PT64_LVL_OFFSET_MASK(level) \ |
| 113 | (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ |
| 114 | * PT64_LEVEL_BITS))) - 1)) |
| 115 | |
| 116 | #define PT32_BASE_ADDR_MASK PAGE_MASK |
| 117 | #define PT32_DIR_BASE_ADDR_MASK \ |
| 118 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) |
| 119 | #define PT32_LVL_ADDR_MASK(level) \ |
| 120 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ |
| 121 | * PT32_LEVEL_BITS))) - 1)) |
| 122 | |
| 123 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \ |
| 124 | | shadow_x_mask | shadow_nx_mask) |
| 125 | |
| 126 | #define ACC_EXEC_MASK 1 |
| 127 | #define ACC_WRITE_MASK PT_WRITABLE_MASK |
| 128 | #define ACC_USER_MASK PT_USER_MASK |
| 129 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) |
| 130 | |
| 131 | #include <trace/events/kvm.h> |
| 132 | |
| 133 | #define CREATE_TRACE_POINTS |
| 134 | #include "mmutrace.h" |
| 135 | |
| 136 | #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
| 137 | #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1)) |
| 138 | |
| 139 | #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) |
| 140 | |
| 141 | /* make pte_list_desc fit well in cache line */ |
| 142 | #define PTE_LIST_EXT 3 |
| 143 | |
| 144 | struct pte_list_desc { |
| 145 | u64 *sptes[PTE_LIST_EXT]; |
| 146 | struct pte_list_desc *more; |
| 147 | }; |
| 148 | |
| 149 | struct kvm_shadow_walk_iterator { |
| 150 | u64 addr; |
| 151 | hpa_t shadow_addr; |
| 152 | u64 *sptep; |
| 153 | int level; |
| 154 | unsigned index; |
| 155 | }; |
| 156 | |
| 157 | #define for_each_shadow_entry(_vcpu, _addr, _walker) \ |
| 158 | for (shadow_walk_init(&(_walker), _vcpu, _addr); \ |
| 159 | shadow_walk_okay(&(_walker)); \ |
| 160 | shadow_walk_next(&(_walker))) |
| 161 | |
| 162 | #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \ |
| 163 | for (shadow_walk_init(&(_walker), _vcpu, _addr); \ |
| 164 | shadow_walk_okay(&(_walker)) && \ |
| 165 | ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \ |
| 166 | __shadow_walk_next(&(_walker), spte)) |
| 167 | |
| 168 | static struct kmem_cache *pte_list_desc_cache; |
| 169 | static struct kmem_cache *mmu_page_header_cache; |
| 170 | static struct percpu_counter kvm_total_used_mmu_pages; |
| 171 | |
| 172 | static u64 __read_mostly shadow_nx_mask; |
| 173 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ |
| 174 | static u64 __read_mostly shadow_user_mask; |
| 175 | static u64 __read_mostly shadow_accessed_mask; |
| 176 | static u64 __read_mostly shadow_dirty_mask; |
| 177 | static u64 __read_mostly shadow_mmio_mask; |
| 178 | |
| 179 | static void mmu_spte_set(u64 *sptep, u64 spte); |
| 180 | static void mmu_free_roots(struct kvm_vcpu *vcpu); |
| 181 | |
| 182 | void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask) |
| 183 | { |
| 184 | shadow_mmio_mask = mmio_mask; |
| 185 | } |
| 186 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask); |
| 187 | |
| 188 | /* |
| 189 | * the low bit of the generation number is always presumed to be zero. |
| 190 | * This disables mmio caching during memslot updates. The concept is |
| 191 | * similar to a seqcount but instead of retrying the access we just punt |
| 192 | * and ignore the cache. |
| 193 | * |
| 194 | * spte bits 3-11 are used as bits 1-9 of the generation number, |
| 195 | * the bits 52-61 are used as bits 10-19 of the generation number. |
| 196 | */ |
| 197 | #define MMIO_SPTE_GEN_LOW_SHIFT 2 |
| 198 | #define MMIO_SPTE_GEN_HIGH_SHIFT 52 |
| 199 | |
| 200 | #define MMIO_GEN_SHIFT 20 |
| 201 | #define MMIO_GEN_LOW_SHIFT 10 |
| 202 | #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2) |
| 203 | #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1) |
| 204 | |
| 205 | static u64 generation_mmio_spte_mask(unsigned int gen) |
| 206 | { |
| 207 | u64 mask; |
| 208 | |
| 209 | WARN_ON(gen & ~MMIO_GEN_MASK); |
| 210 | |
| 211 | mask = (gen & MMIO_GEN_LOW_MASK) << MMIO_SPTE_GEN_LOW_SHIFT; |
| 212 | mask |= ((u64)gen >> MMIO_GEN_LOW_SHIFT) << MMIO_SPTE_GEN_HIGH_SHIFT; |
| 213 | return mask; |
| 214 | } |
| 215 | |
| 216 | static unsigned int get_mmio_spte_generation(u64 spte) |
| 217 | { |
| 218 | unsigned int gen; |
| 219 | |
| 220 | spte &= ~shadow_mmio_mask; |
| 221 | |
| 222 | gen = (spte >> MMIO_SPTE_GEN_LOW_SHIFT) & MMIO_GEN_LOW_MASK; |
| 223 | gen |= (spte >> MMIO_SPTE_GEN_HIGH_SHIFT) << MMIO_GEN_LOW_SHIFT; |
| 224 | return gen; |
| 225 | } |
| 226 | |
| 227 | static unsigned int kvm_current_mmio_generation(struct kvm_vcpu *vcpu) |
| 228 | { |
| 229 | return kvm_vcpu_memslots(vcpu)->generation & MMIO_GEN_MASK; |
| 230 | } |
| 231 | |
| 232 | static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn, |
| 233 | unsigned access) |
| 234 | { |
| 235 | unsigned int gen = kvm_current_mmio_generation(vcpu); |
| 236 | u64 mask = generation_mmio_spte_mask(gen); |
| 237 | |
| 238 | access &= ACC_WRITE_MASK | ACC_USER_MASK; |
| 239 | mask |= shadow_mmio_mask | access | gfn << PAGE_SHIFT; |
| 240 | |
| 241 | trace_mark_mmio_spte(sptep, gfn, access, gen); |
| 242 | mmu_spte_set(sptep, mask); |
| 243 | } |
| 244 | |
| 245 | static bool is_mmio_spte(u64 spte) |
| 246 | { |
| 247 | return (spte & shadow_mmio_mask) == shadow_mmio_mask; |
| 248 | } |
| 249 | |
| 250 | static gfn_t get_mmio_spte_gfn(u64 spte) |
| 251 | { |
| 252 | u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask; |
| 253 | return (spte & ~mask) >> PAGE_SHIFT; |
| 254 | } |
| 255 | |
| 256 | static unsigned get_mmio_spte_access(u64 spte) |
| 257 | { |
| 258 | u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask; |
| 259 | return (spte & ~mask) & ~PAGE_MASK; |
| 260 | } |
| 261 | |
| 262 | static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, |
| 263 | kvm_pfn_t pfn, unsigned access) |
| 264 | { |
| 265 | if (unlikely(is_noslot_pfn(pfn))) { |
| 266 | mark_mmio_spte(vcpu, sptep, gfn, access); |
| 267 | return true; |
| 268 | } |
| 269 | |
| 270 | return false; |
| 271 | } |
| 272 | |
| 273 | static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte) |
| 274 | { |
| 275 | unsigned int kvm_gen, spte_gen; |
| 276 | |
| 277 | kvm_gen = kvm_current_mmio_generation(vcpu); |
| 278 | spte_gen = get_mmio_spte_generation(spte); |
| 279 | |
| 280 | trace_check_mmio_spte(spte, kvm_gen, spte_gen); |
| 281 | return likely(kvm_gen == spte_gen); |
| 282 | } |
| 283 | |
| 284 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, |
| 285 | u64 dirty_mask, u64 nx_mask, u64 x_mask) |
| 286 | { |
| 287 | shadow_user_mask = user_mask; |
| 288 | shadow_accessed_mask = accessed_mask; |
| 289 | shadow_dirty_mask = dirty_mask; |
| 290 | shadow_nx_mask = nx_mask; |
| 291 | shadow_x_mask = x_mask; |
| 292 | } |
| 293 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); |
| 294 | |
| 295 | static int is_cpuid_PSE36(void) |
| 296 | { |
| 297 | return 1; |
| 298 | } |
| 299 | |
| 300 | static int is_nx(struct kvm_vcpu *vcpu) |
| 301 | { |
| 302 | return vcpu->arch.efer & EFER_NX; |
| 303 | } |
| 304 | |
| 305 | static int is_shadow_present_pte(u64 pte) |
| 306 | { |
| 307 | return pte & PT_PRESENT_MASK && !is_mmio_spte(pte); |
| 308 | } |
| 309 | |
| 310 | static int is_large_pte(u64 pte) |
| 311 | { |
| 312 | return pte & PT_PAGE_SIZE_MASK; |
| 313 | } |
| 314 | |
| 315 | static int is_last_spte(u64 pte, int level) |
| 316 | { |
| 317 | if (level == PT_PAGE_TABLE_LEVEL) |
| 318 | return 1; |
| 319 | if (is_large_pte(pte)) |
| 320 | return 1; |
| 321 | return 0; |
| 322 | } |
| 323 | |
| 324 | static kvm_pfn_t spte_to_pfn(u64 pte) |
| 325 | { |
| 326 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
| 327 | } |
| 328 | |
| 329 | static gfn_t pse36_gfn_delta(u32 gpte) |
| 330 | { |
| 331 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; |
| 332 | |
| 333 | return (gpte & PT32_DIR_PSE36_MASK) << shift; |
| 334 | } |
| 335 | |
| 336 | #ifdef CONFIG_X86_64 |
| 337 | static void __set_spte(u64 *sptep, u64 spte) |
| 338 | { |
| 339 | WRITE_ONCE(*sptep, spte); |
| 340 | } |
| 341 | |
| 342 | static void __update_clear_spte_fast(u64 *sptep, u64 spte) |
| 343 | { |
| 344 | WRITE_ONCE(*sptep, spte); |
| 345 | } |
| 346 | |
| 347 | static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) |
| 348 | { |
| 349 | return xchg(sptep, spte); |
| 350 | } |
| 351 | |
| 352 | static u64 __get_spte_lockless(u64 *sptep) |
| 353 | { |
| 354 | return ACCESS_ONCE(*sptep); |
| 355 | } |
| 356 | #else |
| 357 | union split_spte { |
| 358 | struct { |
| 359 | u32 spte_low; |
| 360 | u32 spte_high; |
| 361 | }; |
| 362 | u64 spte; |
| 363 | }; |
| 364 | |
| 365 | static void count_spte_clear(u64 *sptep, u64 spte) |
| 366 | { |
| 367 | struct kvm_mmu_page *sp = page_header(__pa(sptep)); |
| 368 | |
| 369 | if (is_shadow_present_pte(spte)) |
| 370 | return; |
| 371 | |
| 372 | /* Ensure the spte is completely set before we increase the count */ |
| 373 | smp_wmb(); |
| 374 | sp->clear_spte_count++; |
| 375 | } |
| 376 | |
| 377 | static void __set_spte(u64 *sptep, u64 spte) |
| 378 | { |
| 379 | union split_spte *ssptep, sspte; |
| 380 | |
| 381 | ssptep = (union split_spte *)sptep; |
| 382 | sspte = (union split_spte)spte; |
| 383 | |
| 384 | ssptep->spte_high = sspte.spte_high; |
| 385 | |
| 386 | /* |
| 387 | * If we map the spte from nonpresent to present, We should store |
| 388 | * the high bits firstly, then set present bit, so cpu can not |
| 389 | * fetch this spte while we are setting the spte. |
| 390 | */ |
| 391 | smp_wmb(); |
| 392 | |
| 393 | WRITE_ONCE(ssptep->spte_low, sspte.spte_low); |
| 394 | } |
| 395 | |
| 396 | static void __update_clear_spte_fast(u64 *sptep, u64 spte) |
| 397 | { |
| 398 | union split_spte *ssptep, sspte; |
| 399 | |
| 400 | ssptep = (union split_spte *)sptep; |
| 401 | sspte = (union split_spte)spte; |
| 402 | |
| 403 | WRITE_ONCE(ssptep->spte_low, sspte.spte_low); |
| 404 | |
| 405 | /* |
| 406 | * If we map the spte from present to nonpresent, we should clear |
| 407 | * present bit firstly to avoid vcpu fetch the old high bits. |
| 408 | */ |
| 409 | smp_wmb(); |
| 410 | |
| 411 | ssptep->spte_high = sspte.spte_high; |
| 412 | count_spte_clear(sptep, spte); |
| 413 | } |
| 414 | |
| 415 | static u64 __update_clear_spte_slow(u64 *sptep, u64 spte) |
| 416 | { |
| 417 | union split_spte *ssptep, sspte, orig; |
| 418 | |
| 419 | ssptep = (union split_spte *)sptep; |
| 420 | sspte = (union split_spte)spte; |
| 421 | |
| 422 | /* xchg acts as a barrier before the setting of the high bits */ |
| 423 | orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); |
| 424 | orig.spte_high = ssptep->spte_high; |
| 425 | ssptep->spte_high = sspte.spte_high; |
| 426 | count_spte_clear(sptep, spte); |
| 427 | |
| 428 | return orig.spte; |
| 429 | } |
| 430 | |
| 431 | /* |
| 432 | * The idea using the light way get the spte on x86_32 guest is from |
| 433 | * gup_get_pte(arch/x86/mm/gup.c). |
| 434 | * |
| 435 | * An spte tlb flush may be pending, because kvm_set_pte_rmapp |
| 436 | * coalesces them and we are running out of the MMU lock. Therefore |
| 437 | * we need to protect against in-progress updates of the spte. |
| 438 | * |
| 439 | * Reading the spte while an update is in progress may get the old value |
| 440 | * for the high part of the spte. The race is fine for a present->non-present |
| 441 | * change (because the high part of the spte is ignored for non-present spte), |
| 442 | * but for a present->present change we must reread the spte. |
| 443 | * |
| 444 | * All such changes are done in two steps (present->non-present and |
| 445 | * non-present->present), hence it is enough to count the number of |
| 446 | * present->non-present updates: if it changed while reading the spte, |
| 447 | * we might have hit the race. This is done using clear_spte_count. |
| 448 | */ |
| 449 | static u64 __get_spte_lockless(u64 *sptep) |
| 450 | { |
| 451 | struct kvm_mmu_page *sp = page_header(__pa(sptep)); |
| 452 | union split_spte spte, *orig = (union split_spte *)sptep; |
| 453 | int count; |
| 454 | |
| 455 | retry: |
| 456 | count = sp->clear_spte_count; |
| 457 | smp_rmb(); |
| 458 | |
| 459 | spte.spte_low = orig->spte_low; |
| 460 | smp_rmb(); |
| 461 | |
| 462 | spte.spte_high = orig->spte_high; |
| 463 | smp_rmb(); |
| 464 | |
| 465 | if (unlikely(spte.spte_low != orig->spte_low || |
| 466 | count != sp->clear_spte_count)) |
| 467 | goto retry; |
| 468 | |
| 469 | return spte.spte; |
| 470 | } |
| 471 | #endif |
| 472 | |
| 473 | static bool spte_is_locklessly_modifiable(u64 spte) |
| 474 | { |
| 475 | return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) == |
| 476 | (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE); |
| 477 | } |
| 478 | |
| 479 | static bool spte_has_volatile_bits(u64 spte) |
| 480 | { |
| 481 | /* |
| 482 | * Always atomically update spte if it can be updated |
| 483 | * out of mmu-lock, it can ensure dirty bit is not lost, |
| 484 | * also, it can help us to get a stable is_writable_pte() |
| 485 | * to ensure tlb flush is not missed. |
| 486 | */ |
| 487 | if (spte_is_locklessly_modifiable(spte)) |
| 488 | return true; |
| 489 | |
| 490 | if (!shadow_accessed_mask) |
| 491 | return false; |
| 492 | |
| 493 | if (!is_shadow_present_pte(spte)) |
| 494 | return false; |
| 495 | |
| 496 | if ((spte & shadow_accessed_mask) && |
| 497 | (!is_writable_pte(spte) || (spte & shadow_dirty_mask))) |
| 498 | return false; |
| 499 | |
| 500 | return true; |
| 501 | } |
| 502 | |
| 503 | static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask) |
| 504 | { |
| 505 | return (old_spte & bit_mask) && !(new_spte & bit_mask); |
| 506 | } |
| 507 | |
| 508 | static bool spte_is_bit_changed(u64 old_spte, u64 new_spte, u64 bit_mask) |
| 509 | { |
| 510 | return (old_spte & bit_mask) != (new_spte & bit_mask); |
| 511 | } |
| 512 | |
| 513 | /* Rules for using mmu_spte_set: |
| 514 | * Set the sptep from nonpresent to present. |
| 515 | * Note: the sptep being assigned *must* be either not present |
| 516 | * or in a state where the hardware will not attempt to update |
| 517 | * the spte. |
| 518 | */ |
| 519 | static void mmu_spte_set(u64 *sptep, u64 new_spte) |
| 520 | { |
| 521 | WARN_ON(is_shadow_present_pte(*sptep)); |
| 522 | __set_spte(sptep, new_spte); |
| 523 | } |
| 524 | |
| 525 | /* Rules for using mmu_spte_update: |
| 526 | * Update the state bits, it means the mapped pfn is not changged. |
| 527 | * |
| 528 | * Whenever we overwrite a writable spte with a read-only one we |
| 529 | * should flush remote TLBs. Otherwise rmap_write_protect |
| 530 | * will find a read-only spte, even though the writable spte |
| 531 | * might be cached on a CPU's TLB, the return value indicates this |
| 532 | * case. |
| 533 | */ |
| 534 | static bool mmu_spte_update(u64 *sptep, u64 new_spte) |
| 535 | { |
| 536 | u64 old_spte = *sptep; |
| 537 | bool ret = false; |
| 538 | |
| 539 | WARN_ON(!is_shadow_present_pte(new_spte)); |
| 540 | |
| 541 | if (!is_shadow_present_pte(old_spte)) { |
| 542 | mmu_spte_set(sptep, new_spte); |
| 543 | return ret; |
| 544 | } |
| 545 | |
| 546 | if (!spte_has_volatile_bits(old_spte)) |
| 547 | __update_clear_spte_fast(sptep, new_spte); |
| 548 | else |
| 549 | old_spte = __update_clear_spte_slow(sptep, new_spte); |
| 550 | |
| 551 | /* |
| 552 | * For the spte updated out of mmu-lock is safe, since |
| 553 | * we always atomically update it, see the comments in |
| 554 | * spte_has_volatile_bits(). |
| 555 | */ |
| 556 | if (spte_is_locklessly_modifiable(old_spte) && |
| 557 | !is_writable_pte(new_spte)) |
| 558 | ret = true; |
| 559 | |
| 560 | if (!shadow_accessed_mask) { |
| 561 | /* |
| 562 | * We don't set page dirty when dropping non-writable spte. |
| 563 | * So do it now if the new spte is becoming non-writable. |
| 564 | */ |
| 565 | if (ret) |
| 566 | kvm_set_pfn_dirty(spte_to_pfn(old_spte)); |
| 567 | return ret; |
| 568 | } |
| 569 | |
| 570 | /* |
| 571 | * Flush TLB when accessed/dirty bits are changed in the page tables, |
| 572 | * to guarantee consistency between TLB and page tables. |
| 573 | */ |
| 574 | if (spte_is_bit_changed(old_spte, new_spte, |
| 575 | shadow_accessed_mask | shadow_dirty_mask)) |
| 576 | ret = true; |
| 577 | |
| 578 | if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask)) |
| 579 | kvm_set_pfn_accessed(spte_to_pfn(old_spte)); |
| 580 | if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask)) |
| 581 | kvm_set_pfn_dirty(spte_to_pfn(old_spte)); |
| 582 | |
| 583 | return ret; |
| 584 | } |
| 585 | |
| 586 | /* |
| 587 | * Rules for using mmu_spte_clear_track_bits: |
| 588 | * It sets the sptep from present to nonpresent, and track the |
| 589 | * state bits, it is used to clear the last level sptep. |
| 590 | */ |
| 591 | static int mmu_spte_clear_track_bits(u64 *sptep) |
| 592 | { |
| 593 | kvm_pfn_t pfn; |
| 594 | u64 old_spte = *sptep; |
| 595 | |
| 596 | if (!spte_has_volatile_bits(old_spte)) |
| 597 | __update_clear_spte_fast(sptep, 0ull); |
| 598 | else |
| 599 | old_spte = __update_clear_spte_slow(sptep, 0ull); |
| 600 | |
| 601 | if (!is_shadow_present_pte(old_spte)) |
| 602 | return 0; |
| 603 | |
| 604 | pfn = spte_to_pfn(old_spte); |
| 605 | |
| 606 | /* |
| 607 | * KVM does not hold the refcount of the page used by |
| 608 | * kvm mmu, before reclaiming the page, we should |
| 609 | * unmap it from mmu first. |
| 610 | */ |
| 611 | WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn))); |
| 612 | |
| 613 | if (!shadow_accessed_mask || old_spte & shadow_accessed_mask) |
| 614 | kvm_set_pfn_accessed(pfn); |
| 615 | if (old_spte & (shadow_dirty_mask ? shadow_dirty_mask : |
| 616 | PT_WRITABLE_MASK)) |
| 617 | kvm_set_pfn_dirty(pfn); |
| 618 | return 1; |
| 619 | } |
| 620 | |
| 621 | /* |
| 622 | * Rules for using mmu_spte_clear_no_track: |
| 623 | * Directly clear spte without caring the state bits of sptep, |
| 624 | * it is used to set the upper level spte. |
| 625 | */ |
| 626 | static void mmu_spte_clear_no_track(u64 *sptep) |
| 627 | { |
| 628 | __update_clear_spte_fast(sptep, 0ull); |
| 629 | } |
| 630 | |
| 631 | static u64 mmu_spte_get_lockless(u64 *sptep) |
| 632 | { |
| 633 | return __get_spte_lockless(sptep); |
| 634 | } |
| 635 | |
| 636 | static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu) |
| 637 | { |
| 638 | /* |
| 639 | * Prevent page table teardown by making any free-er wait during |
| 640 | * kvm_flush_remote_tlbs() IPI to all active vcpus. |
| 641 | */ |
| 642 | local_irq_disable(); |
| 643 | |
| 644 | /* |
| 645 | * Make sure a following spte read is not reordered ahead of the write |
| 646 | * to vcpu->mode. |
| 647 | */ |
| 648 | smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); |
| 649 | } |
| 650 | |
| 651 | static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) |
| 652 | { |
| 653 | /* |
| 654 | * Make sure the write to vcpu->mode is not reordered in front of |
| 655 | * reads to sptes. If it does, kvm_commit_zap_page() can see us |
| 656 | * OUTSIDE_GUEST_MODE and proceed to free the shadow page table. |
| 657 | */ |
| 658 | smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); |
| 659 | local_irq_enable(); |
| 660 | } |
| 661 | |
| 662 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
| 663 | struct kmem_cache *base_cache, int min) |
| 664 | { |
| 665 | void *obj; |
| 666 | |
| 667 | if (cache->nobjs >= min) |
| 668 | return 0; |
| 669 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
| 670 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
| 671 | if (!obj) |
| 672 | return -ENOMEM; |
| 673 | cache->objects[cache->nobjs++] = obj; |
| 674 | } |
| 675 | return 0; |
| 676 | } |
| 677 | |
| 678 | static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache) |
| 679 | { |
| 680 | return cache->nobjs; |
| 681 | } |
| 682 | |
| 683 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc, |
| 684 | struct kmem_cache *cache) |
| 685 | { |
| 686 | while (mc->nobjs) |
| 687 | kmem_cache_free(cache, mc->objects[--mc->nobjs]); |
| 688 | } |
| 689 | |
| 690 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
| 691 | int min) |
| 692 | { |
| 693 | void *page; |
| 694 | |
| 695 | if (cache->nobjs >= min) |
| 696 | return 0; |
| 697 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
| 698 | page = (void *)__get_free_page(GFP_KERNEL); |
| 699 | if (!page) |
| 700 | return -ENOMEM; |
| 701 | cache->objects[cache->nobjs++] = page; |
| 702 | } |
| 703 | return 0; |
| 704 | } |
| 705 | |
| 706 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) |
| 707 | { |
| 708 | while (mc->nobjs) |
| 709 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
| 710 | } |
| 711 | |
| 712 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
| 713 | { |
| 714 | int r; |
| 715 | |
| 716 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, |
| 717 | pte_list_desc_cache, 8 + PTE_PREFETCH_NUM); |
| 718 | if (r) |
| 719 | goto out; |
| 720 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
| 721 | if (r) |
| 722 | goto out; |
| 723 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
| 724 | mmu_page_header_cache, 4); |
| 725 | out: |
| 726 | return r; |
| 727 | } |
| 728 | |
| 729 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
| 730 | { |
| 731 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, |
| 732 | pte_list_desc_cache); |
| 733 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); |
| 734 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache, |
| 735 | mmu_page_header_cache); |
| 736 | } |
| 737 | |
| 738 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc) |
| 739 | { |
| 740 | void *p; |
| 741 | |
| 742 | BUG_ON(!mc->nobjs); |
| 743 | p = mc->objects[--mc->nobjs]; |
| 744 | return p; |
| 745 | } |
| 746 | |
| 747 | static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu) |
| 748 | { |
| 749 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache); |
| 750 | } |
| 751 | |
| 752 | static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc) |
| 753 | { |
| 754 | kmem_cache_free(pte_list_desc_cache, pte_list_desc); |
| 755 | } |
| 756 | |
| 757 | static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index) |
| 758 | { |
| 759 | if (!sp->role.direct) |
| 760 | return sp->gfns[index]; |
| 761 | |
| 762 | return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS)); |
| 763 | } |
| 764 | |
| 765 | static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn) |
| 766 | { |
| 767 | if (sp->role.direct) |
| 768 | BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index)); |
| 769 | else |
| 770 | sp->gfns[index] = gfn; |
| 771 | } |
| 772 | |
| 773 | /* |
| 774 | * Return the pointer to the large page information for a given gfn, |
| 775 | * handling slots that are not large page aligned. |
| 776 | */ |
| 777 | static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn, |
| 778 | struct kvm_memory_slot *slot, |
| 779 | int level) |
| 780 | { |
| 781 | unsigned long idx; |
| 782 | |
| 783 | idx = gfn_to_index(gfn, slot->base_gfn, level); |
| 784 | return &slot->arch.lpage_info[level - 2][idx]; |
| 785 | } |
| 786 | |
| 787 | static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot, |
| 788 | gfn_t gfn, int count) |
| 789 | { |
| 790 | struct kvm_lpage_info *linfo; |
| 791 | int i; |
| 792 | |
| 793 | for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) { |
| 794 | linfo = lpage_info_slot(gfn, slot, i); |
| 795 | linfo->disallow_lpage += count; |
| 796 | WARN_ON(linfo->disallow_lpage < 0); |
| 797 | } |
| 798 | } |
| 799 | |
| 800 | void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) |
| 801 | { |
| 802 | update_gfn_disallow_lpage_count(slot, gfn, 1); |
| 803 | } |
| 804 | |
| 805 | void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn) |
| 806 | { |
| 807 | update_gfn_disallow_lpage_count(slot, gfn, -1); |
| 808 | } |
| 809 | |
| 810 | static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) |
| 811 | { |
| 812 | struct kvm_memslots *slots; |
| 813 | struct kvm_memory_slot *slot; |
| 814 | gfn_t gfn; |
| 815 | |
| 816 | kvm->arch.indirect_shadow_pages++; |
| 817 | gfn = sp->gfn; |
| 818 | slots = kvm_memslots_for_spte_role(kvm, sp->role); |
| 819 | slot = __gfn_to_memslot(slots, gfn); |
| 820 | |
| 821 | /* the non-leaf shadow pages are keeping readonly. */ |
| 822 | if (sp->role.level > PT_PAGE_TABLE_LEVEL) |
| 823 | return kvm_slot_page_track_add_page(kvm, slot, gfn, |
| 824 | KVM_PAGE_TRACK_WRITE); |
| 825 | |
| 826 | kvm_mmu_gfn_disallow_lpage(slot, gfn); |
| 827 | } |
| 828 | |
| 829 | static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp) |
| 830 | { |
| 831 | struct kvm_memslots *slots; |
| 832 | struct kvm_memory_slot *slot; |
| 833 | gfn_t gfn; |
| 834 | |
| 835 | kvm->arch.indirect_shadow_pages--; |
| 836 | gfn = sp->gfn; |
| 837 | slots = kvm_memslots_for_spte_role(kvm, sp->role); |
| 838 | slot = __gfn_to_memslot(slots, gfn); |
| 839 | if (sp->role.level > PT_PAGE_TABLE_LEVEL) |
| 840 | return kvm_slot_page_track_remove_page(kvm, slot, gfn, |
| 841 | KVM_PAGE_TRACK_WRITE); |
| 842 | |
| 843 | kvm_mmu_gfn_allow_lpage(slot, gfn); |
| 844 | } |
| 845 | |
| 846 | static bool __mmu_gfn_lpage_is_disallowed(gfn_t gfn, int level, |
| 847 | struct kvm_memory_slot *slot) |
| 848 | { |
| 849 | struct kvm_lpage_info *linfo; |
| 850 | |
| 851 | if (slot) { |
| 852 | linfo = lpage_info_slot(gfn, slot, level); |
| 853 | return !!linfo->disallow_lpage; |
| 854 | } |
| 855 | |
| 856 | return true; |
| 857 | } |
| 858 | |
| 859 | static bool mmu_gfn_lpage_is_disallowed(struct kvm_vcpu *vcpu, gfn_t gfn, |
| 860 | int level) |
| 861 | { |
| 862 | struct kvm_memory_slot *slot; |
| 863 | |
| 864 | slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); |
| 865 | return __mmu_gfn_lpage_is_disallowed(gfn, level, slot); |
| 866 | } |
| 867 | |
| 868 | static int host_mapping_level(struct kvm *kvm, gfn_t gfn) |
| 869 | { |
| 870 | unsigned long page_size; |
| 871 | int i, ret = 0; |
| 872 | |
| 873 | page_size = kvm_host_page_size(kvm, gfn); |
| 874 | |
| 875 | for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) { |
| 876 | if (page_size >= KVM_HPAGE_SIZE(i)) |
| 877 | ret = i; |
| 878 | else |
| 879 | break; |
| 880 | } |
| 881 | |
| 882 | return ret; |
| 883 | } |
| 884 | |
| 885 | static inline bool memslot_valid_for_gpte(struct kvm_memory_slot *slot, |
| 886 | bool no_dirty_log) |
| 887 | { |
| 888 | if (!slot || slot->flags & KVM_MEMSLOT_INVALID) |
| 889 | return false; |
| 890 | if (no_dirty_log && slot->dirty_bitmap) |
| 891 | return false; |
| 892 | |
| 893 | return true; |
| 894 | } |
| 895 | |
| 896 | static struct kvm_memory_slot * |
| 897 | gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn, |
| 898 | bool no_dirty_log) |
| 899 | { |
| 900 | struct kvm_memory_slot *slot; |
| 901 | |
| 902 | slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); |
| 903 | if (!memslot_valid_for_gpte(slot, no_dirty_log)) |
| 904 | slot = NULL; |
| 905 | |
| 906 | return slot; |
| 907 | } |
| 908 | |
| 909 | static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn, |
| 910 | bool *force_pt_level) |
| 911 | { |
| 912 | int host_level, level, max_level; |
| 913 | struct kvm_memory_slot *slot; |
| 914 | |
| 915 | if (unlikely(*force_pt_level)) |
| 916 | return PT_PAGE_TABLE_LEVEL; |
| 917 | |
| 918 | slot = kvm_vcpu_gfn_to_memslot(vcpu, large_gfn); |
| 919 | *force_pt_level = !memslot_valid_for_gpte(slot, true); |
| 920 | if (unlikely(*force_pt_level)) |
| 921 | return PT_PAGE_TABLE_LEVEL; |
| 922 | |
| 923 | host_level = host_mapping_level(vcpu->kvm, large_gfn); |
| 924 | |
| 925 | if (host_level == PT_PAGE_TABLE_LEVEL) |
| 926 | return host_level; |
| 927 | |
| 928 | max_level = min(kvm_x86_ops->get_lpage_level(), host_level); |
| 929 | |
| 930 | for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level) |
| 931 | if (__mmu_gfn_lpage_is_disallowed(large_gfn, level, slot)) |
| 932 | break; |
| 933 | |
| 934 | return level - 1; |
| 935 | } |
| 936 | |
| 937 | /* |
| 938 | * About rmap_head encoding: |
| 939 | * |
| 940 | * If the bit zero of rmap_head->val is clear, then it points to the only spte |
| 941 | * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct |
| 942 | * pte_list_desc containing more mappings. |
| 943 | */ |
| 944 | |
| 945 | /* |
| 946 | * Returns the number of pointers in the rmap chain, not counting the new one. |
| 947 | */ |
| 948 | static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte, |
| 949 | struct kvm_rmap_head *rmap_head) |
| 950 | { |
| 951 | struct pte_list_desc *desc; |
| 952 | int i, count = 0; |
| 953 | |
| 954 | if (!rmap_head->val) { |
| 955 | rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte); |
| 956 | rmap_head->val = (unsigned long)spte; |
| 957 | } else if (!(rmap_head->val & 1)) { |
| 958 | rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte); |
| 959 | desc = mmu_alloc_pte_list_desc(vcpu); |
| 960 | desc->sptes[0] = (u64 *)rmap_head->val; |
| 961 | desc->sptes[1] = spte; |
| 962 | rmap_head->val = (unsigned long)desc | 1; |
| 963 | ++count; |
| 964 | } else { |
| 965 | rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte); |
| 966 | desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); |
| 967 | while (desc->sptes[PTE_LIST_EXT-1] && desc->more) { |
| 968 | desc = desc->more; |
| 969 | count += PTE_LIST_EXT; |
| 970 | } |
| 971 | if (desc->sptes[PTE_LIST_EXT-1]) { |
| 972 | desc->more = mmu_alloc_pte_list_desc(vcpu); |
| 973 | desc = desc->more; |
| 974 | } |
| 975 | for (i = 0; desc->sptes[i]; ++i) |
| 976 | ++count; |
| 977 | desc->sptes[i] = spte; |
| 978 | } |
| 979 | return count; |
| 980 | } |
| 981 | |
| 982 | static void |
| 983 | pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head, |
| 984 | struct pte_list_desc *desc, int i, |
| 985 | struct pte_list_desc *prev_desc) |
| 986 | { |
| 987 | int j; |
| 988 | |
| 989 | for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j) |
| 990 | ; |
| 991 | desc->sptes[i] = desc->sptes[j]; |
| 992 | desc->sptes[j] = NULL; |
| 993 | if (j != 0) |
| 994 | return; |
| 995 | if (!prev_desc && !desc->more) |
| 996 | rmap_head->val = (unsigned long)desc->sptes[0]; |
| 997 | else |
| 998 | if (prev_desc) |
| 999 | prev_desc->more = desc->more; |
| 1000 | else |
| 1001 | rmap_head->val = (unsigned long)desc->more | 1; |
| 1002 | mmu_free_pte_list_desc(desc); |
| 1003 | } |
| 1004 | |
| 1005 | static void pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head) |
| 1006 | { |
| 1007 | struct pte_list_desc *desc; |
| 1008 | struct pte_list_desc *prev_desc; |
| 1009 | int i; |
| 1010 | |
| 1011 | if (!rmap_head->val) { |
| 1012 | printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte); |
| 1013 | BUG(); |
| 1014 | } else if (!(rmap_head->val & 1)) { |
| 1015 | rmap_printk("pte_list_remove: %p 1->0\n", spte); |
| 1016 | if ((u64 *)rmap_head->val != spte) { |
| 1017 | printk(KERN_ERR "pte_list_remove: %p 1->BUG\n", spte); |
| 1018 | BUG(); |
| 1019 | } |
| 1020 | rmap_head->val = 0; |
| 1021 | } else { |
| 1022 | rmap_printk("pte_list_remove: %p many->many\n", spte); |
| 1023 | desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); |
| 1024 | prev_desc = NULL; |
| 1025 | while (desc) { |
| 1026 | for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) { |
| 1027 | if (desc->sptes[i] == spte) { |
| 1028 | pte_list_desc_remove_entry(rmap_head, |
| 1029 | desc, i, prev_desc); |
| 1030 | return; |
| 1031 | } |
| 1032 | } |
| 1033 | prev_desc = desc; |
| 1034 | desc = desc->more; |
| 1035 | } |
| 1036 | pr_err("pte_list_remove: %p many->many\n", spte); |
| 1037 | BUG(); |
| 1038 | } |
| 1039 | } |
| 1040 | |
| 1041 | static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level, |
| 1042 | struct kvm_memory_slot *slot) |
| 1043 | { |
| 1044 | unsigned long idx; |
| 1045 | |
| 1046 | idx = gfn_to_index(gfn, slot->base_gfn, level); |
| 1047 | return &slot->arch.rmap[level - PT_PAGE_TABLE_LEVEL][idx]; |
| 1048 | } |
| 1049 | |
| 1050 | static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, |
| 1051 | struct kvm_mmu_page *sp) |
| 1052 | { |
| 1053 | struct kvm_memslots *slots; |
| 1054 | struct kvm_memory_slot *slot; |
| 1055 | |
| 1056 | slots = kvm_memslots_for_spte_role(kvm, sp->role); |
| 1057 | slot = __gfn_to_memslot(slots, gfn); |
| 1058 | return __gfn_to_rmap(gfn, sp->role.level, slot); |
| 1059 | } |
| 1060 | |
| 1061 | static bool rmap_can_add(struct kvm_vcpu *vcpu) |
| 1062 | { |
| 1063 | struct kvm_mmu_memory_cache *cache; |
| 1064 | |
| 1065 | cache = &vcpu->arch.mmu_pte_list_desc_cache; |
| 1066 | return mmu_memory_cache_free_objects(cache); |
| 1067 | } |
| 1068 | |
| 1069 | static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
| 1070 | { |
| 1071 | struct kvm_mmu_page *sp; |
| 1072 | struct kvm_rmap_head *rmap_head; |
| 1073 | |
| 1074 | sp = page_header(__pa(spte)); |
| 1075 | kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn); |
| 1076 | rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); |
| 1077 | return pte_list_add(vcpu, spte, rmap_head); |
| 1078 | } |
| 1079 | |
| 1080 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
| 1081 | { |
| 1082 | struct kvm_mmu_page *sp; |
| 1083 | gfn_t gfn; |
| 1084 | struct kvm_rmap_head *rmap_head; |
| 1085 | |
| 1086 | sp = page_header(__pa(spte)); |
| 1087 | gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt); |
| 1088 | rmap_head = gfn_to_rmap(kvm, gfn, sp); |
| 1089 | pte_list_remove(spte, rmap_head); |
| 1090 | } |
| 1091 | |
| 1092 | /* |
| 1093 | * Used by the following functions to iterate through the sptes linked by a |
| 1094 | * rmap. All fields are private and not assumed to be used outside. |
| 1095 | */ |
| 1096 | struct rmap_iterator { |
| 1097 | /* private fields */ |
| 1098 | struct pte_list_desc *desc; /* holds the sptep if not NULL */ |
| 1099 | int pos; /* index of the sptep */ |
| 1100 | }; |
| 1101 | |
| 1102 | /* |
| 1103 | * Iteration must be started by this function. This should also be used after |
| 1104 | * removing/dropping sptes from the rmap link because in such cases the |
| 1105 | * information in the itererator may not be valid. |
| 1106 | * |
| 1107 | * Returns sptep if found, NULL otherwise. |
| 1108 | */ |
| 1109 | static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head, |
| 1110 | struct rmap_iterator *iter) |
| 1111 | { |
| 1112 | u64 *sptep; |
| 1113 | |
| 1114 | if (!rmap_head->val) |
| 1115 | return NULL; |
| 1116 | |
| 1117 | if (!(rmap_head->val & 1)) { |
| 1118 | iter->desc = NULL; |
| 1119 | sptep = (u64 *)rmap_head->val; |
| 1120 | goto out; |
| 1121 | } |
| 1122 | |
| 1123 | iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); |
| 1124 | iter->pos = 0; |
| 1125 | sptep = iter->desc->sptes[iter->pos]; |
| 1126 | out: |
| 1127 | BUG_ON(!is_shadow_present_pte(*sptep)); |
| 1128 | return sptep; |
| 1129 | } |
| 1130 | |
| 1131 | /* |
| 1132 | * Must be used with a valid iterator: e.g. after rmap_get_first(). |
| 1133 | * |
| 1134 | * Returns sptep if found, NULL otherwise. |
| 1135 | */ |
| 1136 | static u64 *rmap_get_next(struct rmap_iterator *iter) |
| 1137 | { |
| 1138 | u64 *sptep; |
| 1139 | |
| 1140 | if (iter->desc) { |
| 1141 | if (iter->pos < PTE_LIST_EXT - 1) { |
| 1142 | ++iter->pos; |
| 1143 | sptep = iter->desc->sptes[iter->pos]; |
| 1144 | if (sptep) |
| 1145 | goto out; |
| 1146 | } |
| 1147 | |
| 1148 | iter->desc = iter->desc->more; |
| 1149 | |
| 1150 | if (iter->desc) { |
| 1151 | iter->pos = 0; |
| 1152 | /* desc->sptes[0] cannot be NULL */ |
| 1153 | sptep = iter->desc->sptes[iter->pos]; |
| 1154 | goto out; |
| 1155 | } |
| 1156 | } |
| 1157 | |
| 1158 | return NULL; |
| 1159 | out: |
| 1160 | BUG_ON(!is_shadow_present_pte(*sptep)); |
| 1161 | return sptep; |
| 1162 | } |
| 1163 | |
| 1164 | #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \ |
| 1165 | for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \ |
| 1166 | _spte_; _spte_ = rmap_get_next(_iter_)) |
| 1167 | |
| 1168 | static void drop_spte(struct kvm *kvm, u64 *sptep) |
| 1169 | { |
| 1170 | if (mmu_spte_clear_track_bits(sptep)) |
| 1171 | rmap_remove(kvm, sptep); |
| 1172 | } |
| 1173 | |
| 1174 | |
| 1175 | static bool __drop_large_spte(struct kvm *kvm, u64 *sptep) |
| 1176 | { |
| 1177 | if (is_large_pte(*sptep)) { |
| 1178 | WARN_ON(page_header(__pa(sptep))->role.level == |
| 1179 | PT_PAGE_TABLE_LEVEL); |
| 1180 | drop_spte(kvm, sptep); |
| 1181 | --kvm->stat.lpages; |
| 1182 | return true; |
| 1183 | } |
| 1184 | |
| 1185 | return false; |
| 1186 | } |
| 1187 | |
| 1188 | static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep) |
| 1189 | { |
| 1190 | if (__drop_large_spte(vcpu->kvm, sptep)) |
| 1191 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 1192 | } |
| 1193 | |
| 1194 | /* |
| 1195 | * Write-protect on the specified @sptep, @pt_protect indicates whether |
| 1196 | * spte write-protection is caused by protecting shadow page table. |
| 1197 | * |
| 1198 | * Note: write protection is difference between dirty logging and spte |
| 1199 | * protection: |
| 1200 | * - for dirty logging, the spte can be set to writable at anytime if |
| 1201 | * its dirty bitmap is properly set. |
| 1202 | * - for spte protection, the spte can be writable only after unsync-ing |
| 1203 | * shadow page. |
| 1204 | * |
| 1205 | * Return true if tlb need be flushed. |
| 1206 | */ |
| 1207 | static bool spte_write_protect(struct kvm *kvm, u64 *sptep, bool pt_protect) |
| 1208 | { |
| 1209 | u64 spte = *sptep; |
| 1210 | |
| 1211 | if (!is_writable_pte(spte) && |
| 1212 | !(pt_protect && spte_is_locklessly_modifiable(spte))) |
| 1213 | return false; |
| 1214 | |
| 1215 | rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep); |
| 1216 | |
| 1217 | if (pt_protect) |
| 1218 | spte &= ~SPTE_MMU_WRITEABLE; |
| 1219 | spte = spte & ~PT_WRITABLE_MASK; |
| 1220 | |
| 1221 | return mmu_spte_update(sptep, spte); |
| 1222 | } |
| 1223 | |
| 1224 | static bool __rmap_write_protect(struct kvm *kvm, |
| 1225 | struct kvm_rmap_head *rmap_head, |
| 1226 | bool pt_protect) |
| 1227 | { |
| 1228 | u64 *sptep; |
| 1229 | struct rmap_iterator iter; |
| 1230 | bool flush = false; |
| 1231 | |
| 1232 | for_each_rmap_spte(rmap_head, &iter, sptep) |
| 1233 | flush |= spte_write_protect(kvm, sptep, pt_protect); |
| 1234 | |
| 1235 | return flush; |
| 1236 | } |
| 1237 | |
| 1238 | static bool spte_clear_dirty(struct kvm *kvm, u64 *sptep) |
| 1239 | { |
| 1240 | u64 spte = *sptep; |
| 1241 | |
| 1242 | rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep); |
| 1243 | |
| 1244 | spte &= ~shadow_dirty_mask; |
| 1245 | |
| 1246 | return mmu_spte_update(sptep, spte); |
| 1247 | } |
| 1248 | |
| 1249 | static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) |
| 1250 | { |
| 1251 | u64 *sptep; |
| 1252 | struct rmap_iterator iter; |
| 1253 | bool flush = false; |
| 1254 | |
| 1255 | for_each_rmap_spte(rmap_head, &iter, sptep) |
| 1256 | flush |= spte_clear_dirty(kvm, sptep); |
| 1257 | |
| 1258 | return flush; |
| 1259 | } |
| 1260 | |
| 1261 | static bool spte_set_dirty(struct kvm *kvm, u64 *sptep) |
| 1262 | { |
| 1263 | u64 spte = *sptep; |
| 1264 | |
| 1265 | rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep); |
| 1266 | |
| 1267 | spte |= shadow_dirty_mask; |
| 1268 | |
| 1269 | return mmu_spte_update(sptep, spte); |
| 1270 | } |
| 1271 | |
| 1272 | static bool __rmap_set_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) |
| 1273 | { |
| 1274 | u64 *sptep; |
| 1275 | struct rmap_iterator iter; |
| 1276 | bool flush = false; |
| 1277 | |
| 1278 | for_each_rmap_spte(rmap_head, &iter, sptep) |
| 1279 | flush |= spte_set_dirty(kvm, sptep); |
| 1280 | |
| 1281 | return flush; |
| 1282 | } |
| 1283 | |
| 1284 | /** |
| 1285 | * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages |
| 1286 | * @kvm: kvm instance |
| 1287 | * @slot: slot to protect |
| 1288 | * @gfn_offset: start of the BITS_PER_LONG pages we care about |
| 1289 | * @mask: indicates which pages we should protect |
| 1290 | * |
| 1291 | * Used when we do not need to care about huge page mappings: e.g. during dirty |
| 1292 | * logging we do not have any such mappings. |
| 1293 | */ |
| 1294 | static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, |
| 1295 | struct kvm_memory_slot *slot, |
| 1296 | gfn_t gfn_offset, unsigned long mask) |
| 1297 | { |
| 1298 | struct kvm_rmap_head *rmap_head; |
| 1299 | |
| 1300 | while (mask) { |
| 1301 | rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), |
| 1302 | PT_PAGE_TABLE_LEVEL, slot); |
| 1303 | __rmap_write_protect(kvm, rmap_head, false); |
| 1304 | |
| 1305 | /* clear the first set bit */ |
| 1306 | mask &= mask - 1; |
| 1307 | } |
| 1308 | } |
| 1309 | |
| 1310 | /** |
| 1311 | * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages |
| 1312 | * @kvm: kvm instance |
| 1313 | * @slot: slot to clear D-bit |
| 1314 | * @gfn_offset: start of the BITS_PER_LONG pages we care about |
| 1315 | * @mask: indicates which pages we should clear D-bit |
| 1316 | * |
| 1317 | * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap. |
| 1318 | */ |
| 1319 | void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, |
| 1320 | struct kvm_memory_slot *slot, |
| 1321 | gfn_t gfn_offset, unsigned long mask) |
| 1322 | { |
| 1323 | struct kvm_rmap_head *rmap_head; |
| 1324 | |
| 1325 | while (mask) { |
| 1326 | rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), |
| 1327 | PT_PAGE_TABLE_LEVEL, slot); |
| 1328 | __rmap_clear_dirty(kvm, rmap_head); |
| 1329 | |
| 1330 | /* clear the first set bit */ |
| 1331 | mask &= mask - 1; |
| 1332 | } |
| 1333 | } |
| 1334 | EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked); |
| 1335 | |
| 1336 | /** |
| 1337 | * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected |
| 1338 | * PT level pages. |
| 1339 | * |
| 1340 | * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to |
| 1341 | * enable dirty logging for them. |
| 1342 | * |
| 1343 | * Used when we do not need to care about huge page mappings: e.g. during dirty |
| 1344 | * logging we do not have any such mappings. |
| 1345 | */ |
| 1346 | void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, |
| 1347 | struct kvm_memory_slot *slot, |
| 1348 | gfn_t gfn_offset, unsigned long mask) |
| 1349 | { |
| 1350 | if (kvm_x86_ops->enable_log_dirty_pt_masked) |
| 1351 | kvm_x86_ops->enable_log_dirty_pt_masked(kvm, slot, gfn_offset, |
| 1352 | mask); |
| 1353 | else |
| 1354 | kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); |
| 1355 | } |
| 1356 | |
| 1357 | bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, |
| 1358 | struct kvm_memory_slot *slot, u64 gfn) |
| 1359 | { |
| 1360 | struct kvm_rmap_head *rmap_head; |
| 1361 | int i; |
| 1362 | bool write_protected = false; |
| 1363 | |
| 1364 | for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) { |
| 1365 | rmap_head = __gfn_to_rmap(gfn, i, slot); |
| 1366 | write_protected |= __rmap_write_protect(kvm, rmap_head, true); |
| 1367 | } |
| 1368 | |
| 1369 | return write_protected; |
| 1370 | } |
| 1371 | |
| 1372 | static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
| 1373 | { |
| 1374 | struct kvm_memory_slot *slot; |
| 1375 | |
| 1376 | slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); |
| 1377 | return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn); |
| 1378 | } |
| 1379 | |
| 1380 | static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head) |
| 1381 | { |
| 1382 | u64 *sptep; |
| 1383 | struct rmap_iterator iter; |
| 1384 | bool flush = false; |
| 1385 | |
| 1386 | while ((sptep = rmap_get_first(rmap_head, &iter))) { |
| 1387 | rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep); |
| 1388 | |
| 1389 | drop_spte(kvm, sptep); |
| 1390 | flush = true; |
| 1391 | } |
| 1392 | |
| 1393 | return flush; |
| 1394 | } |
| 1395 | |
| 1396 | static int kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, |
| 1397 | struct kvm_memory_slot *slot, gfn_t gfn, int level, |
| 1398 | unsigned long data) |
| 1399 | { |
| 1400 | return kvm_zap_rmapp(kvm, rmap_head); |
| 1401 | } |
| 1402 | |
| 1403 | static int kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, |
| 1404 | struct kvm_memory_slot *slot, gfn_t gfn, int level, |
| 1405 | unsigned long data) |
| 1406 | { |
| 1407 | u64 *sptep; |
| 1408 | struct rmap_iterator iter; |
| 1409 | int need_flush = 0; |
| 1410 | u64 new_spte; |
| 1411 | pte_t *ptep = (pte_t *)data; |
| 1412 | kvm_pfn_t new_pfn; |
| 1413 | |
| 1414 | WARN_ON(pte_huge(*ptep)); |
| 1415 | new_pfn = pte_pfn(*ptep); |
| 1416 | |
| 1417 | restart: |
| 1418 | for_each_rmap_spte(rmap_head, &iter, sptep) { |
| 1419 | rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n", |
| 1420 | sptep, *sptep, gfn, level); |
| 1421 | |
| 1422 | need_flush = 1; |
| 1423 | |
| 1424 | if (pte_write(*ptep)) { |
| 1425 | drop_spte(kvm, sptep); |
| 1426 | goto restart; |
| 1427 | } else { |
| 1428 | new_spte = *sptep & ~PT64_BASE_ADDR_MASK; |
| 1429 | new_spte |= (u64)new_pfn << PAGE_SHIFT; |
| 1430 | |
| 1431 | new_spte &= ~PT_WRITABLE_MASK; |
| 1432 | new_spte &= ~SPTE_HOST_WRITEABLE; |
| 1433 | new_spte &= ~shadow_accessed_mask; |
| 1434 | |
| 1435 | mmu_spte_clear_track_bits(sptep); |
| 1436 | mmu_spte_set(sptep, new_spte); |
| 1437 | } |
| 1438 | } |
| 1439 | |
| 1440 | if (need_flush) |
| 1441 | kvm_flush_remote_tlbs(kvm); |
| 1442 | |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
| 1446 | struct slot_rmap_walk_iterator { |
| 1447 | /* input fields. */ |
| 1448 | struct kvm_memory_slot *slot; |
| 1449 | gfn_t start_gfn; |
| 1450 | gfn_t end_gfn; |
| 1451 | int start_level; |
| 1452 | int end_level; |
| 1453 | |
| 1454 | /* output fields. */ |
| 1455 | gfn_t gfn; |
| 1456 | struct kvm_rmap_head *rmap; |
| 1457 | int level; |
| 1458 | |
| 1459 | /* private field. */ |
| 1460 | struct kvm_rmap_head *end_rmap; |
| 1461 | }; |
| 1462 | |
| 1463 | static void |
| 1464 | rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level) |
| 1465 | { |
| 1466 | iterator->level = level; |
| 1467 | iterator->gfn = iterator->start_gfn; |
| 1468 | iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot); |
| 1469 | iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level, |
| 1470 | iterator->slot); |
| 1471 | } |
| 1472 | |
| 1473 | static void |
| 1474 | slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator, |
| 1475 | struct kvm_memory_slot *slot, int start_level, |
| 1476 | int end_level, gfn_t start_gfn, gfn_t end_gfn) |
| 1477 | { |
| 1478 | iterator->slot = slot; |
| 1479 | iterator->start_level = start_level; |
| 1480 | iterator->end_level = end_level; |
| 1481 | iterator->start_gfn = start_gfn; |
| 1482 | iterator->end_gfn = end_gfn; |
| 1483 | |
| 1484 | rmap_walk_init_level(iterator, iterator->start_level); |
| 1485 | } |
| 1486 | |
| 1487 | static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator) |
| 1488 | { |
| 1489 | return !!iterator->rmap; |
| 1490 | } |
| 1491 | |
| 1492 | static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator) |
| 1493 | { |
| 1494 | if (++iterator->rmap <= iterator->end_rmap) { |
| 1495 | iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); |
| 1496 | return; |
| 1497 | } |
| 1498 | |
| 1499 | if (++iterator->level > iterator->end_level) { |
| 1500 | iterator->rmap = NULL; |
| 1501 | return; |
| 1502 | } |
| 1503 | |
| 1504 | rmap_walk_init_level(iterator, iterator->level); |
| 1505 | } |
| 1506 | |
| 1507 | #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \ |
| 1508 | _start_gfn, _end_gfn, _iter_) \ |
| 1509 | for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \ |
| 1510 | _end_level_, _start_gfn, _end_gfn); \ |
| 1511 | slot_rmap_walk_okay(_iter_); \ |
| 1512 | slot_rmap_walk_next(_iter_)) |
| 1513 | |
| 1514 | static int kvm_handle_hva_range(struct kvm *kvm, |
| 1515 | unsigned long start, |
| 1516 | unsigned long end, |
| 1517 | unsigned long data, |
| 1518 | int (*handler)(struct kvm *kvm, |
| 1519 | struct kvm_rmap_head *rmap_head, |
| 1520 | struct kvm_memory_slot *slot, |
| 1521 | gfn_t gfn, |
| 1522 | int level, |
| 1523 | unsigned long data)) |
| 1524 | { |
| 1525 | struct kvm_memslots *slots; |
| 1526 | struct kvm_memory_slot *memslot; |
| 1527 | struct slot_rmap_walk_iterator iterator; |
| 1528 | int ret = 0; |
| 1529 | int i; |
| 1530 | |
| 1531 | for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { |
| 1532 | slots = __kvm_memslots(kvm, i); |
| 1533 | kvm_for_each_memslot(memslot, slots) { |
| 1534 | unsigned long hva_start, hva_end; |
| 1535 | gfn_t gfn_start, gfn_end; |
| 1536 | |
| 1537 | hva_start = max(start, memslot->userspace_addr); |
| 1538 | hva_end = min(end, memslot->userspace_addr + |
| 1539 | (memslot->npages << PAGE_SHIFT)); |
| 1540 | if (hva_start >= hva_end) |
| 1541 | continue; |
| 1542 | /* |
| 1543 | * {gfn(page) | page intersects with [hva_start, hva_end)} = |
| 1544 | * {gfn_start, gfn_start+1, ..., gfn_end-1}. |
| 1545 | */ |
| 1546 | gfn_start = hva_to_gfn_memslot(hva_start, memslot); |
| 1547 | gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); |
| 1548 | |
| 1549 | for_each_slot_rmap_range(memslot, PT_PAGE_TABLE_LEVEL, |
| 1550 | PT_MAX_HUGEPAGE_LEVEL, |
| 1551 | gfn_start, gfn_end - 1, |
| 1552 | &iterator) |
| 1553 | ret |= handler(kvm, iterator.rmap, memslot, |
| 1554 | iterator.gfn, iterator.level, data); |
| 1555 | } |
| 1556 | } |
| 1557 | |
| 1558 | return ret; |
| 1559 | } |
| 1560 | |
| 1561 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, |
| 1562 | unsigned long data, |
| 1563 | int (*handler)(struct kvm *kvm, |
| 1564 | struct kvm_rmap_head *rmap_head, |
| 1565 | struct kvm_memory_slot *slot, |
| 1566 | gfn_t gfn, int level, |
| 1567 | unsigned long data)) |
| 1568 | { |
| 1569 | return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler); |
| 1570 | } |
| 1571 | |
| 1572 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) |
| 1573 | { |
| 1574 | return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp); |
| 1575 | } |
| 1576 | |
| 1577 | int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) |
| 1578 | { |
| 1579 | return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp); |
| 1580 | } |
| 1581 | |
| 1582 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) |
| 1583 | { |
| 1584 | kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); |
| 1585 | } |
| 1586 | |
| 1587 | static int kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, |
| 1588 | struct kvm_memory_slot *slot, gfn_t gfn, int level, |
| 1589 | unsigned long data) |
| 1590 | { |
| 1591 | u64 *sptep; |
| 1592 | struct rmap_iterator uninitialized_var(iter); |
| 1593 | int young = 0; |
| 1594 | |
| 1595 | BUG_ON(!shadow_accessed_mask); |
| 1596 | |
| 1597 | for_each_rmap_spte(rmap_head, &iter, sptep) { |
| 1598 | if (*sptep & shadow_accessed_mask) { |
| 1599 | young = 1; |
| 1600 | clear_bit((ffs(shadow_accessed_mask) - 1), |
| 1601 | (unsigned long *)sptep); |
| 1602 | } |
| 1603 | } |
| 1604 | |
| 1605 | trace_kvm_age_page(gfn, level, slot, young); |
| 1606 | return young; |
| 1607 | } |
| 1608 | |
| 1609 | static int kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head, |
| 1610 | struct kvm_memory_slot *slot, gfn_t gfn, |
| 1611 | int level, unsigned long data) |
| 1612 | { |
| 1613 | u64 *sptep; |
| 1614 | struct rmap_iterator iter; |
| 1615 | int young = 0; |
| 1616 | |
| 1617 | /* |
| 1618 | * If there's no access bit in the secondary pte set by the |
| 1619 | * hardware it's up to gup-fast/gup to set the access bit in |
| 1620 | * the primary pte or in the page structure. |
| 1621 | */ |
| 1622 | if (!shadow_accessed_mask) |
| 1623 | goto out; |
| 1624 | |
| 1625 | for_each_rmap_spte(rmap_head, &iter, sptep) { |
| 1626 | if (*sptep & shadow_accessed_mask) { |
| 1627 | young = 1; |
| 1628 | break; |
| 1629 | } |
| 1630 | } |
| 1631 | out: |
| 1632 | return young; |
| 1633 | } |
| 1634 | |
| 1635 | #define RMAP_RECYCLE_THRESHOLD 1000 |
| 1636 | |
| 1637 | static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
| 1638 | { |
| 1639 | struct kvm_rmap_head *rmap_head; |
| 1640 | struct kvm_mmu_page *sp; |
| 1641 | |
| 1642 | sp = page_header(__pa(spte)); |
| 1643 | |
| 1644 | rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp); |
| 1645 | |
| 1646 | kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, 0); |
| 1647 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 1648 | } |
| 1649 | |
| 1650 | int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) |
| 1651 | { |
| 1652 | /* |
| 1653 | * In case of absence of EPT Access and Dirty Bits supports, |
| 1654 | * emulate the accessed bit for EPT, by checking if this page has |
| 1655 | * an EPT mapping, and clearing it if it does. On the next access, |
| 1656 | * a new EPT mapping will be established. |
| 1657 | * This has some overhead, but not as much as the cost of swapping |
| 1658 | * out actively used pages or breaking up actively used hugepages. |
| 1659 | */ |
| 1660 | if (!shadow_accessed_mask) { |
| 1661 | /* |
| 1662 | * We are holding the kvm->mmu_lock, and we are blowing up |
| 1663 | * shadow PTEs. MMU notifier consumers need to be kept at bay. |
| 1664 | * This is correct as long as we don't decouple the mmu_lock |
| 1665 | * protected regions (like invalidate_range_start|end does). |
| 1666 | */ |
| 1667 | kvm->mmu_notifier_seq++; |
| 1668 | return kvm_handle_hva_range(kvm, start, end, 0, |
| 1669 | kvm_unmap_rmapp); |
| 1670 | } |
| 1671 | |
| 1672 | return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp); |
| 1673 | } |
| 1674 | |
| 1675 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) |
| 1676 | { |
| 1677 | return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp); |
| 1678 | } |
| 1679 | |
| 1680 | #ifdef MMU_DEBUG |
| 1681 | static int is_empty_shadow_page(u64 *spt) |
| 1682 | { |
| 1683 | u64 *pos; |
| 1684 | u64 *end; |
| 1685 | |
| 1686 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
| 1687 | if (is_shadow_present_pte(*pos)) { |
| 1688 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
| 1689 | pos, *pos); |
| 1690 | return 0; |
| 1691 | } |
| 1692 | return 1; |
| 1693 | } |
| 1694 | #endif |
| 1695 | |
| 1696 | /* |
| 1697 | * This value is the sum of all of the kvm instances's |
| 1698 | * kvm->arch.n_used_mmu_pages values. We need a global, |
| 1699 | * aggregate version in order to make the slab shrinker |
| 1700 | * faster |
| 1701 | */ |
| 1702 | static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr) |
| 1703 | { |
| 1704 | kvm->arch.n_used_mmu_pages += nr; |
| 1705 | percpu_counter_add(&kvm_total_used_mmu_pages, nr); |
| 1706 | } |
| 1707 | |
| 1708 | static void kvm_mmu_free_page(struct kvm_mmu_page *sp) |
| 1709 | { |
| 1710 | MMU_WARN_ON(!is_empty_shadow_page(sp->spt)); |
| 1711 | hlist_del(&sp->hash_link); |
| 1712 | list_del(&sp->link); |
| 1713 | free_page((unsigned long)sp->spt); |
| 1714 | if (!sp->role.direct) |
| 1715 | free_page((unsigned long)sp->gfns); |
| 1716 | kmem_cache_free(mmu_page_header_cache, sp); |
| 1717 | } |
| 1718 | |
| 1719 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
| 1720 | { |
| 1721 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
| 1722 | } |
| 1723 | |
| 1724 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
| 1725 | struct kvm_mmu_page *sp, u64 *parent_pte) |
| 1726 | { |
| 1727 | if (!parent_pte) |
| 1728 | return; |
| 1729 | |
| 1730 | pte_list_add(vcpu, parent_pte, &sp->parent_ptes); |
| 1731 | } |
| 1732 | |
| 1733 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
| 1734 | u64 *parent_pte) |
| 1735 | { |
| 1736 | pte_list_remove(parent_pte, &sp->parent_ptes); |
| 1737 | } |
| 1738 | |
| 1739 | static void drop_parent_pte(struct kvm_mmu_page *sp, |
| 1740 | u64 *parent_pte) |
| 1741 | { |
| 1742 | mmu_page_remove_parent_pte(sp, parent_pte); |
| 1743 | mmu_spte_clear_no_track(parent_pte); |
| 1744 | } |
| 1745 | |
| 1746 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct) |
| 1747 | { |
| 1748 | struct kvm_mmu_page *sp; |
| 1749 | |
| 1750 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache); |
| 1751 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache); |
| 1752 | if (!direct) |
| 1753 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache); |
| 1754 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
| 1755 | |
| 1756 | /* |
| 1757 | * The active_mmu_pages list is the FIFO list, do not move the |
| 1758 | * page until it is zapped. kvm_zap_obsolete_pages depends on |
| 1759 | * this feature. See the comments in kvm_zap_obsolete_pages(). |
| 1760 | */ |
| 1761 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
| 1762 | kvm_mod_used_mmu_pages(vcpu->kvm, +1); |
| 1763 | return sp; |
| 1764 | } |
| 1765 | |
| 1766 | static void mark_unsync(u64 *spte); |
| 1767 | static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp) |
| 1768 | { |
| 1769 | u64 *sptep; |
| 1770 | struct rmap_iterator iter; |
| 1771 | |
| 1772 | for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { |
| 1773 | mark_unsync(sptep); |
| 1774 | } |
| 1775 | } |
| 1776 | |
| 1777 | static void mark_unsync(u64 *spte) |
| 1778 | { |
| 1779 | struct kvm_mmu_page *sp; |
| 1780 | unsigned int index; |
| 1781 | |
| 1782 | sp = page_header(__pa(spte)); |
| 1783 | index = spte - sp->spt; |
| 1784 | if (__test_and_set_bit(index, sp->unsync_child_bitmap)) |
| 1785 | return; |
| 1786 | if (sp->unsync_children++) |
| 1787 | return; |
| 1788 | kvm_mmu_mark_parents_unsync(sp); |
| 1789 | } |
| 1790 | |
| 1791 | static int nonpaging_sync_page(struct kvm_vcpu *vcpu, |
| 1792 | struct kvm_mmu_page *sp) |
| 1793 | { |
| 1794 | return 0; |
| 1795 | } |
| 1796 | |
| 1797 | static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
| 1798 | { |
| 1799 | } |
| 1800 | |
| 1801 | static void nonpaging_update_pte(struct kvm_vcpu *vcpu, |
| 1802 | struct kvm_mmu_page *sp, u64 *spte, |
| 1803 | const void *pte) |
| 1804 | { |
| 1805 | WARN_ON(1); |
| 1806 | } |
| 1807 | |
| 1808 | #define KVM_PAGE_ARRAY_NR 16 |
| 1809 | |
| 1810 | struct kvm_mmu_pages { |
| 1811 | struct mmu_page_and_offset { |
| 1812 | struct kvm_mmu_page *sp; |
| 1813 | unsigned int idx; |
| 1814 | } page[KVM_PAGE_ARRAY_NR]; |
| 1815 | unsigned int nr; |
| 1816 | }; |
| 1817 | |
| 1818 | static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, |
| 1819 | int idx) |
| 1820 | { |
| 1821 | int i; |
| 1822 | |
| 1823 | if (sp->unsync) |
| 1824 | for (i=0; i < pvec->nr; i++) |
| 1825 | if (pvec->page[i].sp == sp) |
| 1826 | return 0; |
| 1827 | |
| 1828 | pvec->page[pvec->nr].sp = sp; |
| 1829 | pvec->page[pvec->nr].idx = idx; |
| 1830 | pvec->nr++; |
| 1831 | return (pvec->nr == KVM_PAGE_ARRAY_NR); |
| 1832 | } |
| 1833 | |
| 1834 | static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx) |
| 1835 | { |
| 1836 | --sp->unsync_children; |
| 1837 | WARN_ON((int)sp->unsync_children < 0); |
| 1838 | __clear_bit(idx, sp->unsync_child_bitmap); |
| 1839 | } |
| 1840 | |
| 1841 | static int __mmu_unsync_walk(struct kvm_mmu_page *sp, |
| 1842 | struct kvm_mmu_pages *pvec) |
| 1843 | { |
| 1844 | int i, ret, nr_unsync_leaf = 0; |
| 1845 | |
| 1846 | for_each_set_bit(i, sp->unsync_child_bitmap, 512) { |
| 1847 | struct kvm_mmu_page *child; |
| 1848 | u64 ent = sp->spt[i]; |
| 1849 | |
| 1850 | if (!is_shadow_present_pte(ent) || is_large_pte(ent)) { |
| 1851 | clear_unsync_child_bit(sp, i); |
| 1852 | continue; |
| 1853 | } |
| 1854 | |
| 1855 | child = page_header(ent & PT64_BASE_ADDR_MASK); |
| 1856 | |
| 1857 | if (child->unsync_children) { |
| 1858 | if (mmu_pages_add(pvec, child, i)) |
| 1859 | return -ENOSPC; |
| 1860 | |
| 1861 | ret = __mmu_unsync_walk(child, pvec); |
| 1862 | if (!ret) { |
| 1863 | clear_unsync_child_bit(sp, i); |
| 1864 | continue; |
| 1865 | } else if (ret > 0) { |
| 1866 | nr_unsync_leaf += ret; |
| 1867 | } else |
| 1868 | return ret; |
| 1869 | } else if (child->unsync) { |
| 1870 | nr_unsync_leaf++; |
| 1871 | if (mmu_pages_add(pvec, child, i)) |
| 1872 | return -ENOSPC; |
| 1873 | } else |
| 1874 | clear_unsync_child_bit(sp, i); |
| 1875 | } |
| 1876 | |
| 1877 | return nr_unsync_leaf; |
| 1878 | } |
| 1879 | |
| 1880 | #define INVALID_INDEX (-1) |
| 1881 | |
| 1882 | static int mmu_unsync_walk(struct kvm_mmu_page *sp, |
| 1883 | struct kvm_mmu_pages *pvec) |
| 1884 | { |
| 1885 | pvec->nr = 0; |
| 1886 | if (!sp->unsync_children) |
| 1887 | return 0; |
| 1888 | |
| 1889 | mmu_pages_add(pvec, sp, INVALID_INDEX); |
| 1890 | return __mmu_unsync_walk(sp, pvec); |
| 1891 | } |
| 1892 | |
| 1893 | static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
| 1894 | { |
| 1895 | WARN_ON(!sp->unsync); |
| 1896 | trace_kvm_mmu_sync_page(sp); |
| 1897 | sp->unsync = 0; |
| 1898 | --kvm->stat.mmu_unsync; |
| 1899 | } |
| 1900 | |
| 1901 | static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, |
| 1902 | struct list_head *invalid_list); |
| 1903 | static void kvm_mmu_commit_zap_page(struct kvm *kvm, |
| 1904 | struct list_head *invalid_list); |
| 1905 | |
| 1906 | /* |
| 1907 | * NOTE: we should pay more attention on the zapped-obsolete page |
| 1908 | * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk |
| 1909 | * since it has been deleted from active_mmu_pages but still can be found |
| 1910 | * at hast list. |
| 1911 | * |
| 1912 | * for_each_gfn_valid_sp() has skipped that kind of pages. |
| 1913 | */ |
| 1914 | #define for_each_gfn_valid_sp(_kvm, _sp, _gfn) \ |
| 1915 | hlist_for_each_entry(_sp, \ |
| 1916 | &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \ |
| 1917 | if ((_sp)->gfn != (_gfn) || is_obsolete_sp((_kvm), (_sp)) \ |
| 1918 | || (_sp)->role.invalid) {} else |
| 1919 | |
| 1920 | #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \ |
| 1921 | for_each_gfn_valid_sp(_kvm, _sp, _gfn) \ |
| 1922 | if ((_sp)->role.direct) {} else |
| 1923 | |
| 1924 | /* @sp->gfn should be write-protected at the call site */ |
| 1925 | static bool __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, |
| 1926 | struct list_head *invalid_list) |
| 1927 | { |
| 1928 | if (sp->role.cr4_pae != !!is_pae(vcpu)) { |
| 1929 | kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); |
| 1930 | return false; |
| 1931 | } |
| 1932 | |
| 1933 | if (vcpu->arch.mmu.sync_page(vcpu, sp) == 0) { |
| 1934 | kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); |
| 1935 | return false; |
| 1936 | } |
| 1937 | |
| 1938 | return true; |
| 1939 | } |
| 1940 | |
| 1941 | static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu, |
| 1942 | struct list_head *invalid_list, |
| 1943 | bool remote_flush, bool local_flush) |
| 1944 | { |
| 1945 | if (!list_empty(invalid_list)) { |
| 1946 | kvm_mmu_commit_zap_page(vcpu->kvm, invalid_list); |
| 1947 | return; |
| 1948 | } |
| 1949 | |
| 1950 | if (remote_flush) |
| 1951 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 1952 | else if (local_flush) |
| 1953 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
| 1954 | } |
| 1955 | |
| 1956 | #ifdef CONFIG_KVM_MMU_AUDIT |
| 1957 | #include "mmu_audit.c" |
| 1958 | #else |
| 1959 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { } |
| 1960 | static void mmu_audit_disable(void) { } |
| 1961 | #endif |
| 1962 | |
| 1963 | static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp) |
| 1964 | { |
| 1965 | return unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); |
| 1966 | } |
| 1967 | |
| 1968 | static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, |
| 1969 | struct list_head *invalid_list) |
| 1970 | { |
| 1971 | kvm_unlink_unsync_page(vcpu->kvm, sp); |
| 1972 | return __kvm_sync_page(vcpu, sp, invalid_list); |
| 1973 | } |
| 1974 | |
| 1975 | /* @gfn should be write-protected at the call site */ |
| 1976 | static bool kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn, |
| 1977 | struct list_head *invalid_list) |
| 1978 | { |
| 1979 | struct kvm_mmu_page *s; |
| 1980 | bool ret = false; |
| 1981 | |
| 1982 | for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) { |
| 1983 | if (!s->unsync) |
| 1984 | continue; |
| 1985 | |
| 1986 | WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL); |
| 1987 | ret |= kvm_sync_page(vcpu, s, invalid_list); |
| 1988 | } |
| 1989 | |
| 1990 | return ret; |
| 1991 | } |
| 1992 | |
| 1993 | struct mmu_page_path { |
| 1994 | struct kvm_mmu_page *parent[PT64_ROOT_LEVEL]; |
| 1995 | unsigned int idx[PT64_ROOT_LEVEL]; |
| 1996 | }; |
| 1997 | |
| 1998 | #define for_each_sp(pvec, sp, parents, i) \ |
| 1999 | for (i = mmu_pages_first(&pvec, &parents); \ |
| 2000 | i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ |
| 2001 | i = mmu_pages_next(&pvec, &parents, i)) |
| 2002 | |
| 2003 | static int mmu_pages_next(struct kvm_mmu_pages *pvec, |
| 2004 | struct mmu_page_path *parents, |
| 2005 | int i) |
| 2006 | { |
| 2007 | int n; |
| 2008 | |
| 2009 | for (n = i+1; n < pvec->nr; n++) { |
| 2010 | struct kvm_mmu_page *sp = pvec->page[n].sp; |
| 2011 | unsigned idx = pvec->page[n].idx; |
| 2012 | int level = sp->role.level; |
| 2013 | |
| 2014 | parents->idx[level-1] = idx; |
| 2015 | if (level == PT_PAGE_TABLE_LEVEL) |
| 2016 | break; |
| 2017 | |
| 2018 | parents->parent[level-2] = sp; |
| 2019 | } |
| 2020 | |
| 2021 | return n; |
| 2022 | } |
| 2023 | |
| 2024 | static int mmu_pages_first(struct kvm_mmu_pages *pvec, |
| 2025 | struct mmu_page_path *parents) |
| 2026 | { |
| 2027 | struct kvm_mmu_page *sp; |
| 2028 | int level; |
| 2029 | |
| 2030 | if (pvec->nr == 0) |
| 2031 | return 0; |
| 2032 | |
| 2033 | WARN_ON(pvec->page[0].idx != INVALID_INDEX); |
| 2034 | |
| 2035 | sp = pvec->page[0].sp; |
| 2036 | level = sp->role.level; |
| 2037 | WARN_ON(level == PT_PAGE_TABLE_LEVEL); |
| 2038 | |
| 2039 | parents->parent[level-2] = sp; |
| 2040 | |
| 2041 | /* Also set up a sentinel. Further entries in pvec are all |
| 2042 | * children of sp, so this element is never overwritten. |
| 2043 | */ |
| 2044 | parents->parent[level-1] = NULL; |
| 2045 | return mmu_pages_next(pvec, parents, 0); |
| 2046 | } |
| 2047 | |
| 2048 | static void mmu_pages_clear_parents(struct mmu_page_path *parents) |
| 2049 | { |
| 2050 | struct kvm_mmu_page *sp; |
| 2051 | unsigned int level = 0; |
| 2052 | |
| 2053 | do { |
| 2054 | unsigned int idx = parents->idx[level]; |
| 2055 | sp = parents->parent[level]; |
| 2056 | if (!sp) |
| 2057 | return; |
| 2058 | |
| 2059 | WARN_ON(idx == INVALID_INDEX); |
| 2060 | clear_unsync_child_bit(sp, idx); |
| 2061 | level++; |
| 2062 | } while (!sp->unsync_children); |
| 2063 | } |
| 2064 | |
| 2065 | static void mmu_sync_children(struct kvm_vcpu *vcpu, |
| 2066 | struct kvm_mmu_page *parent) |
| 2067 | { |
| 2068 | int i; |
| 2069 | struct kvm_mmu_page *sp; |
| 2070 | struct mmu_page_path parents; |
| 2071 | struct kvm_mmu_pages pages; |
| 2072 | LIST_HEAD(invalid_list); |
| 2073 | bool flush = false; |
| 2074 | |
| 2075 | while (mmu_unsync_walk(parent, &pages)) { |
| 2076 | bool protected = false; |
| 2077 | |
| 2078 | for_each_sp(pages, sp, parents, i) |
| 2079 | protected |= rmap_write_protect(vcpu, sp->gfn); |
| 2080 | |
| 2081 | if (protected) { |
| 2082 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 2083 | flush = false; |
| 2084 | } |
| 2085 | |
| 2086 | for_each_sp(pages, sp, parents, i) { |
| 2087 | flush |= kvm_sync_page(vcpu, sp, &invalid_list); |
| 2088 | mmu_pages_clear_parents(&parents); |
| 2089 | } |
| 2090 | if (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock)) { |
| 2091 | kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); |
| 2092 | cond_resched_lock(&vcpu->kvm->mmu_lock); |
| 2093 | flush = false; |
| 2094 | } |
| 2095 | } |
| 2096 | |
| 2097 | kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); |
| 2098 | } |
| 2099 | |
| 2100 | static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp) |
| 2101 | { |
| 2102 | atomic_set(&sp->write_flooding_count, 0); |
| 2103 | } |
| 2104 | |
| 2105 | static void clear_sp_write_flooding_count(u64 *spte) |
| 2106 | { |
| 2107 | struct kvm_mmu_page *sp = page_header(__pa(spte)); |
| 2108 | |
| 2109 | __clear_sp_write_flooding_count(sp); |
| 2110 | } |
| 2111 | |
| 2112 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, |
| 2113 | gfn_t gfn, |
| 2114 | gva_t gaddr, |
| 2115 | unsigned level, |
| 2116 | int direct, |
| 2117 | unsigned access) |
| 2118 | { |
| 2119 | union kvm_mmu_page_role role; |
| 2120 | unsigned quadrant; |
| 2121 | struct kvm_mmu_page *sp; |
| 2122 | bool need_sync = false; |
| 2123 | bool flush = false; |
| 2124 | LIST_HEAD(invalid_list); |
| 2125 | |
| 2126 | role = vcpu->arch.mmu.base_role; |
| 2127 | role.level = level; |
| 2128 | role.direct = direct; |
| 2129 | if (role.direct) |
| 2130 | role.cr4_pae = 0; |
| 2131 | role.access = access; |
| 2132 | if (!vcpu->arch.mmu.direct_map |
| 2133 | && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
| 2134 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
| 2135 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; |
| 2136 | role.quadrant = quadrant; |
| 2137 | } |
| 2138 | for_each_gfn_valid_sp(vcpu->kvm, sp, gfn) { |
| 2139 | if (!need_sync && sp->unsync) |
| 2140 | need_sync = true; |
| 2141 | |
| 2142 | if (sp->role.word != role.word) |
| 2143 | continue; |
| 2144 | |
| 2145 | if (sp->unsync) { |
| 2146 | /* The page is good, but __kvm_sync_page might still end |
| 2147 | * up zapping it. If so, break in order to rebuild it. |
| 2148 | */ |
| 2149 | if (!__kvm_sync_page(vcpu, sp, &invalid_list)) |
| 2150 | break; |
| 2151 | |
| 2152 | WARN_ON(!list_empty(&invalid_list)); |
| 2153 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
| 2154 | } |
| 2155 | |
| 2156 | if (sp->unsync_children) |
| 2157 | kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); |
| 2158 | |
| 2159 | __clear_sp_write_flooding_count(sp); |
| 2160 | trace_kvm_mmu_get_page(sp, false); |
| 2161 | return sp; |
| 2162 | } |
| 2163 | |
| 2164 | ++vcpu->kvm->stat.mmu_cache_miss; |
| 2165 | |
| 2166 | sp = kvm_mmu_alloc_page(vcpu, direct); |
| 2167 | |
| 2168 | sp->gfn = gfn; |
| 2169 | sp->role = role; |
| 2170 | hlist_add_head(&sp->hash_link, |
| 2171 | &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]); |
| 2172 | if (!direct) { |
| 2173 | /* |
| 2174 | * we should do write protection before syncing pages |
| 2175 | * otherwise the content of the synced shadow page may |
| 2176 | * be inconsistent with guest page table. |
| 2177 | */ |
| 2178 | account_shadowed(vcpu->kvm, sp); |
| 2179 | if (level == PT_PAGE_TABLE_LEVEL && |
| 2180 | rmap_write_protect(vcpu, gfn)) |
| 2181 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 2182 | |
| 2183 | if (level > PT_PAGE_TABLE_LEVEL && need_sync) |
| 2184 | flush |= kvm_sync_pages(vcpu, gfn, &invalid_list); |
| 2185 | } |
| 2186 | sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen; |
| 2187 | clear_page(sp->spt); |
| 2188 | trace_kvm_mmu_get_page(sp, true); |
| 2189 | |
| 2190 | kvm_mmu_flush_or_zap(vcpu, &invalid_list, false, flush); |
| 2191 | return sp; |
| 2192 | } |
| 2193 | |
| 2194 | static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, |
| 2195 | struct kvm_vcpu *vcpu, u64 addr) |
| 2196 | { |
| 2197 | iterator->addr = addr; |
| 2198 | iterator->shadow_addr = vcpu->arch.mmu.root_hpa; |
| 2199 | iterator->level = vcpu->arch.mmu.shadow_root_level; |
| 2200 | |
| 2201 | if (iterator->level == PT64_ROOT_LEVEL && |
| 2202 | vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL && |
| 2203 | !vcpu->arch.mmu.direct_map) |
| 2204 | --iterator->level; |
| 2205 | |
| 2206 | if (iterator->level == PT32E_ROOT_LEVEL) { |
| 2207 | iterator->shadow_addr |
| 2208 | = vcpu->arch.mmu.pae_root[(addr >> 30) & 3]; |
| 2209 | iterator->shadow_addr &= PT64_BASE_ADDR_MASK; |
| 2210 | --iterator->level; |
| 2211 | if (!iterator->shadow_addr) |
| 2212 | iterator->level = 0; |
| 2213 | } |
| 2214 | } |
| 2215 | |
| 2216 | static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) |
| 2217 | { |
| 2218 | if (iterator->level < PT_PAGE_TABLE_LEVEL) |
| 2219 | return false; |
| 2220 | |
| 2221 | iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); |
| 2222 | iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; |
| 2223 | return true; |
| 2224 | } |
| 2225 | |
| 2226 | static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator, |
| 2227 | u64 spte) |
| 2228 | { |
| 2229 | if (is_last_spte(spte, iterator->level)) { |
| 2230 | iterator->level = 0; |
| 2231 | return; |
| 2232 | } |
| 2233 | |
| 2234 | iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK; |
| 2235 | --iterator->level; |
| 2236 | } |
| 2237 | |
| 2238 | static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) |
| 2239 | { |
| 2240 | return __shadow_walk_next(iterator, *iterator->sptep); |
| 2241 | } |
| 2242 | |
| 2243 | static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, |
| 2244 | struct kvm_mmu_page *sp) |
| 2245 | { |
| 2246 | u64 spte; |
| 2247 | |
| 2248 | BUILD_BUG_ON(VMX_EPT_READABLE_MASK != PT_PRESENT_MASK || |
| 2249 | VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); |
| 2250 | |
| 2251 | spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
| 2252 | shadow_user_mask | shadow_x_mask | shadow_accessed_mask; |
| 2253 | |
| 2254 | mmu_spte_set(sptep, spte); |
| 2255 | |
| 2256 | mmu_page_add_parent_pte(vcpu, sp, sptep); |
| 2257 | |
| 2258 | if (sp->unsync_children || sp->unsync) |
| 2259 | mark_unsync(sptep); |
| 2260 | } |
| 2261 | |
| 2262 | static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, |
| 2263 | unsigned direct_access) |
| 2264 | { |
| 2265 | if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) { |
| 2266 | struct kvm_mmu_page *child; |
| 2267 | |
| 2268 | /* |
| 2269 | * For the direct sp, if the guest pte's dirty bit |
| 2270 | * changed form clean to dirty, it will corrupt the |
| 2271 | * sp's access: allow writable in the read-only sp, |
| 2272 | * so we should update the spte at this point to get |
| 2273 | * a new sp with the correct access. |
| 2274 | */ |
| 2275 | child = page_header(*sptep & PT64_BASE_ADDR_MASK); |
| 2276 | if (child->role.access == direct_access) |
| 2277 | return; |
| 2278 | |
| 2279 | drop_parent_pte(child, sptep); |
| 2280 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 2281 | } |
| 2282 | } |
| 2283 | |
| 2284 | static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp, |
| 2285 | u64 *spte) |
| 2286 | { |
| 2287 | u64 pte; |
| 2288 | struct kvm_mmu_page *child; |
| 2289 | |
| 2290 | pte = *spte; |
| 2291 | if (is_shadow_present_pte(pte)) { |
| 2292 | if (is_last_spte(pte, sp->role.level)) { |
| 2293 | drop_spte(kvm, spte); |
| 2294 | if (is_large_pte(pte)) |
| 2295 | --kvm->stat.lpages; |
| 2296 | } else { |
| 2297 | child = page_header(pte & PT64_BASE_ADDR_MASK); |
| 2298 | drop_parent_pte(child, spte); |
| 2299 | } |
| 2300 | return true; |
| 2301 | } |
| 2302 | |
| 2303 | if (is_mmio_spte(pte)) |
| 2304 | mmu_spte_clear_no_track(spte); |
| 2305 | |
| 2306 | return false; |
| 2307 | } |
| 2308 | |
| 2309 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
| 2310 | struct kvm_mmu_page *sp) |
| 2311 | { |
| 2312 | unsigned i; |
| 2313 | |
| 2314 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
| 2315 | mmu_page_zap_pte(kvm, sp, sp->spt + i); |
| 2316 | } |
| 2317 | |
| 2318 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
| 2319 | { |
| 2320 | u64 *sptep; |
| 2321 | struct rmap_iterator iter; |
| 2322 | |
| 2323 | while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) |
| 2324 | drop_parent_pte(sp, sptep); |
| 2325 | } |
| 2326 | |
| 2327 | static int mmu_zap_unsync_children(struct kvm *kvm, |
| 2328 | struct kvm_mmu_page *parent, |
| 2329 | struct list_head *invalid_list) |
| 2330 | { |
| 2331 | int i, zapped = 0; |
| 2332 | struct mmu_page_path parents; |
| 2333 | struct kvm_mmu_pages pages; |
| 2334 | |
| 2335 | if (parent->role.level == PT_PAGE_TABLE_LEVEL) |
| 2336 | return 0; |
| 2337 | |
| 2338 | while (mmu_unsync_walk(parent, &pages)) { |
| 2339 | struct kvm_mmu_page *sp; |
| 2340 | |
| 2341 | for_each_sp(pages, sp, parents, i) { |
| 2342 | kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); |
| 2343 | mmu_pages_clear_parents(&parents); |
| 2344 | zapped++; |
| 2345 | } |
| 2346 | } |
| 2347 | |
| 2348 | return zapped; |
| 2349 | } |
| 2350 | |
| 2351 | static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp, |
| 2352 | struct list_head *invalid_list) |
| 2353 | { |
| 2354 | int ret; |
| 2355 | |
| 2356 | trace_kvm_mmu_prepare_zap_page(sp); |
| 2357 | ++kvm->stat.mmu_shadow_zapped; |
| 2358 | ret = mmu_zap_unsync_children(kvm, sp, invalid_list); |
| 2359 | kvm_mmu_page_unlink_children(kvm, sp); |
| 2360 | kvm_mmu_unlink_parents(kvm, sp); |
| 2361 | |
| 2362 | if (!sp->role.invalid && !sp->role.direct) |
| 2363 | unaccount_shadowed(kvm, sp); |
| 2364 | |
| 2365 | if (sp->unsync) |
| 2366 | kvm_unlink_unsync_page(kvm, sp); |
| 2367 | if (!sp->root_count) { |
| 2368 | /* Count self */ |
| 2369 | ret++; |
| 2370 | list_move(&sp->link, invalid_list); |
| 2371 | kvm_mod_used_mmu_pages(kvm, -1); |
| 2372 | } else { |
| 2373 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
| 2374 | |
| 2375 | /* |
| 2376 | * The obsolete pages can not be used on any vcpus. |
| 2377 | * See the comments in kvm_mmu_invalidate_zap_all_pages(). |
| 2378 | */ |
| 2379 | if (!sp->role.invalid && !is_obsolete_sp(kvm, sp)) |
| 2380 | kvm_reload_remote_mmus(kvm); |
| 2381 | } |
| 2382 | |
| 2383 | sp->role.invalid = 1; |
| 2384 | return ret; |
| 2385 | } |
| 2386 | |
| 2387 | static void kvm_mmu_commit_zap_page(struct kvm *kvm, |
| 2388 | struct list_head *invalid_list) |
| 2389 | { |
| 2390 | struct kvm_mmu_page *sp, *nsp; |
| 2391 | |
| 2392 | if (list_empty(invalid_list)) |
| 2393 | return; |
| 2394 | |
| 2395 | /* |
| 2396 | * We need to make sure everyone sees our modifications to |
| 2397 | * the page tables and see changes to vcpu->mode here. The barrier |
| 2398 | * in the kvm_flush_remote_tlbs() achieves this. This pairs |
| 2399 | * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end. |
| 2400 | * |
| 2401 | * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit |
| 2402 | * guest mode and/or lockless shadow page table walks. |
| 2403 | */ |
| 2404 | kvm_flush_remote_tlbs(kvm); |
| 2405 | |
| 2406 | list_for_each_entry_safe(sp, nsp, invalid_list, link) { |
| 2407 | WARN_ON(!sp->role.invalid || sp->root_count); |
| 2408 | kvm_mmu_free_page(sp); |
| 2409 | } |
| 2410 | } |
| 2411 | |
| 2412 | static bool prepare_zap_oldest_mmu_page(struct kvm *kvm, |
| 2413 | struct list_head *invalid_list) |
| 2414 | { |
| 2415 | struct kvm_mmu_page *sp; |
| 2416 | |
| 2417 | if (list_empty(&kvm->arch.active_mmu_pages)) |
| 2418 | return false; |
| 2419 | |
| 2420 | sp = list_last_entry(&kvm->arch.active_mmu_pages, |
| 2421 | struct kvm_mmu_page, link); |
| 2422 | kvm_mmu_prepare_zap_page(kvm, sp, invalid_list); |
| 2423 | |
| 2424 | return true; |
| 2425 | } |
| 2426 | |
| 2427 | /* |
| 2428 | * Changing the number of mmu pages allocated to the vm |
| 2429 | * Note: if goal_nr_mmu_pages is too small, you will get dead lock |
| 2430 | */ |
| 2431 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages) |
| 2432 | { |
| 2433 | LIST_HEAD(invalid_list); |
| 2434 | |
| 2435 | spin_lock(&kvm->mmu_lock); |
| 2436 | |
| 2437 | if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { |
| 2438 | /* Need to free some mmu pages to achieve the goal. */ |
| 2439 | while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) |
| 2440 | if (!prepare_zap_oldest_mmu_page(kvm, &invalid_list)) |
| 2441 | break; |
| 2442 | |
| 2443 | kvm_mmu_commit_zap_page(kvm, &invalid_list); |
| 2444 | goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; |
| 2445 | } |
| 2446 | |
| 2447 | kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; |
| 2448 | |
| 2449 | spin_unlock(&kvm->mmu_lock); |
| 2450 | } |
| 2451 | |
| 2452 | int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
| 2453 | { |
| 2454 | struct kvm_mmu_page *sp; |
| 2455 | LIST_HEAD(invalid_list); |
| 2456 | int r; |
| 2457 | |
| 2458 | pgprintk("%s: looking for gfn %llx\n", __func__, gfn); |
| 2459 | r = 0; |
| 2460 | spin_lock(&kvm->mmu_lock); |
| 2461 | for_each_gfn_indirect_valid_sp(kvm, sp, gfn) { |
| 2462 | pgprintk("%s: gfn %llx role %x\n", __func__, gfn, |
| 2463 | sp->role.word); |
| 2464 | r = 1; |
| 2465 | kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); |
| 2466 | } |
| 2467 | kvm_mmu_commit_zap_page(kvm, &invalid_list); |
| 2468 | spin_unlock(&kvm->mmu_lock); |
| 2469 | |
| 2470 | return r; |
| 2471 | } |
| 2472 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page); |
| 2473 | |
| 2474 | static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) |
| 2475 | { |
| 2476 | trace_kvm_mmu_unsync_page(sp); |
| 2477 | ++vcpu->kvm->stat.mmu_unsync; |
| 2478 | sp->unsync = 1; |
| 2479 | |
| 2480 | kvm_mmu_mark_parents_unsync(sp); |
| 2481 | } |
| 2482 | |
| 2483 | static bool mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, |
| 2484 | bool can_unsync) |
| 2485 | { |
| 2486 | struct kvm_mmu_page *sp; |
| 2487 | |
| 2488 | if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) |
| 2489 | return true; |
| 2490 | |
| 2491 | for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { |
| 2492 | if (!can_unsync) |
| 2493 | return true; |
| 2494 | |
| 2495 | if (sp->unsync) |
| 2496 | continue; |
| 2497 | |
| 2498 | WARN_ON(sp->role.level != PT_PAGE_TABLE_LEVEL); |
| 2499 | kvm_unsync_page(vcpu, sp); |
| 2500 | } |
| 2501 | |
| 2502 | return false; |
| 2503 | } |
| 2504 | |
| 2505 | static bool kvm_is_mmio_pfn(kvm_pfn_t pfn) |
| 2506 | { |
| 2507 | if (pfn_valid(pfn)) |
| 2508 | return !is_zero_pfn(pfn) && PageReserved(pfn_to_page(pfn)); |
| 2509 | |
| 2510 | return true; |
| 2511 | } |
| 2512 | |
| 2513 | static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, |
| 2514 | unsigned pte_access, int level, |
| 2515 | gfn_t gfn, kvm_pfn_t pfn, bool speculative, |
| 2516 | bool can_unsync, bool host_writable) |
| 2517 | { |
| 2518 | u64 spte; |
| 2519 | int ret = 0; |
| 2520 | |
| 2521 | if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access)) |
| 2522 | return 0; |
| 2523 | |
| 2524 | spte = PT_PRESENT_MASK; |
| 2525 | if (!speculative) |
| 2526 | spte |= shadow_accessed_mask; |
| 2527 | |
| 2528 | if (pte_access & ACC_EXEC_MASK) |
| 2529 | spte |= shadow_x_mask; |
| 2530 | else |
| 2531 | spte |= shadow_nx_mask; |
| 2532 | |
| 2533 | if (pte_access & ACC_USER_MASK) |
| 2534 | spte |= shadow_user_mask; |
| 2535 | |
| 2536 | if (level > PT_PAGE_TABLE_LEVEL) |
| 2537 | spte |= PT_PAGE_SIZE_MASK; |
| 2538 | if (tdp_enabled) |
| 2539 | spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn, |
| 2540 | kvm_is_mmio_pfn(pfn)); |
| 2541 | |
| 2542 | if (host_writable) |
| 2543 | spte |= SPTE_HOST_WRITEABLE; |
| 2544 | else |
| 2545 | pte_access &= ~ACC_WRITE_MASK; |
| 2546 | |
| 2547 | spte |= (u64)pfn << PAGE_SHIFT; |
| 2548 | |
| 2549 | if (pte_access & ACC_WRITE_MASK) { |
| 2550 | |
| 2551 | /* |
| 2552 | * Other vcpu creates new sp in the window between |
| 2553 | * mapping_level() and acquiring mmu-lock. We can |
| 2554 | * allow guest to retry the access, the mapping can |
| 2555 | * be fixed if guest refault. |
| 2556 | */ |
| 2557 | if (level > PT_PAGE_TABLE_LEVEL && |
| 2558 | mmu_gfn_lpage_is_disallowed(vcpu, gfn, level)) |
| 2559 | goto done; |
| 2560 | |
| 2561 | spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE; |
| 2562 | |
| 2563 | /* |
| 2564 | * Optimization: for pte sync, if spte was writable the hash |
| 2565 | * lookup is unnecessary (and expensive). Write protection |
| 2566 | * is responsibility of mmu_get_page / kvm_sync_page. |
| 2567 | * Same reasoning can be applied to dirty page accounting. |
| 2568 | */ |
| 2569 | if (!can_unsync && is_writable_pte(*sptep)) |
| 2570 | goto set_pte; |
| 2571 | |
| 2572 | if (mmu_need_write_protect(vcpu, gfn, can_unsync)) { |
| 2573 | pgprintk("%s: found shadow page for %llx, marking ro\n", |
| 2574 | __func__, gfn); |
| 2575 | ret = 1; |
| 2576 | pte_access &= ~ACC_WRITE_MASK; |
| 2577 | spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE); |
| 2578 | } |
| 2579 | } |
| 2580 | |
| 2581 | if (pte_access & ACC_WRITE_MASK) { |
| 2582 | kvm_vcpu_mark_page_dirty(vcpu, gfn); |
| 2583 | spte |= shadow_dirty_mask; |
| 2584 | } |
| 2585 | |
| 2586 | set_pte: |
| 2587 | if (mmu_spte_update(sptep, spte)) |
| 2588 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 2589 | done: |
| 2590 | return ret; |
| 2591 | } |
| 2592 | |
| 2593 | static bool mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, unsigned pte_access, |
| 2594 | int write_fault, int level, gfn_t gfn, kvm_pfn_t pfn, |
| 2595 | bool speculative, bool host_writable) |
| 2596 | { |
| 2597 | int was_rmapped = 0; |
| 2598 | int rmap_count; |
| 2599 | bool emulate = false; |
| 2600 | |
| 2601 | pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__, |
| 2602 | *sptep, write_fault, gfn); |
| 2603 | |
| 2604 | if (is_shadow_present_pte(*sptep)) { |
| 2605 | /* |
| 2606 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink |
| 2607 | * the parent of the now unreachable PTE. |
| 2608 | */ |
| 2609 | if (level > PT_PAGE_TABLE_LEVEL && |
| 2610 | !is_large_pte(*sptep)) { |
| 2611 | struct kvm_mmu_page *child; |
| 2612 | u64 pte = *sptep; |
| 2613 | |
| 2614 | child = page_header(pte & PT64_BASE_ADDR_MASK); |
| 2615 | drop_parent_pte(child, sptep); |
| 2616 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 2617 | } else if (pfn != spte_to_pfn(*sptep)) { |
| 2618 | pgprintk("hfn old %llx new %llx\n", |
| 2619 | spte_to_pfn(*sptep), pfn); |
| 2620 | drop_spte(vcpu->kvm, sptep); |
| 2621 | kvm_flush_remote_tlbs(vcpu->kvm); |
| 2622 | } else |
| 2623 | was_rmapped = 1; |
| 2624 | } |
| 2625 | |
| 2626 | if (set_spte(vcpu, sptep, pte_access, level, gfn, pfn, speculative, |
| 2627 | true, host_writable)) { |
| 2628 | if (write_fault) |
| 2629 | emulate = true; |
| 2630 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
| 2631 | } |
| 2632 | |
| 2633 | if (unlikely(is_mmio_spte(*sptep))) |
| 2634 | emulate = true; |
| 2635 | |
| 2636 | pgprintk("%s: setting spte %llx\n", __func__, *sptep); |
| 2637 | pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n", |
| 2638 | is_large_pte(*sptep)? "2MB" : "4kB", |
| 2639 | *sptep & PT_PRESENT_MASK ?"RW":"R", gfn, |
| 2640 | *sptep, sptep); |
| 2641 | if (!was_rmapped && is_large_pte(*sptep)) |
| 2642 | ++vcpu->kvm->stat.lpages; |
| 2643 | |
| 2644 | if (is_shadow_present_pte(*sptep)) { |
| 2645 | if (!was_rmapped) { |
| 2646 | rmap_count = rmap_add(vcpu, sptep, gfn); |
| 2647 | if (rmap_count > RMAP_RECYCLE_THRESHOLD) |
| 2648 | rmap_recycle(vcpu, sptep, gfn); |
| 2649 | } |
| 2650 | } |
| 2651 | |
| 2652 | kvm_release_pfn_clean(pfn); |
| 2653 | |
| 2654 | return emulate; |
| 2655 | } |
| 2656 | |
| 2657 | static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn, |
| 2658 | bool no_dirty_log) |
| 2659 | { |
| 2660 | struct kvm_memory_slot *slot; |
| 2661 | |
| 2662 | slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log); |
| 2663 | if (!slot) |
| 2664 | return KVM_PFN_ERR_FAULT; |
| 2665 | |
| 2666 | return gfn_to_pfn_memslot_atomic(slot, gfn); |
| 2667 | } |
| 2668 | |
| 2669 | static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu, |
| 2670 | struct kvm_mmu_page *sp, |
| 2671 | u64 *start, u64 *end) |
| 2672 | { |
| 2673 | struct page *pages[PTE_PREFETCH_NUM]; |
| 2674 | struct kvm_memory_slot *slot; |
| 2675 | unsigned access = sp->role.access; |
| 2676 | int i, ret; |
| 2677 | gfn_t gfn; |
| 2678 | |
| 2679 | gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt); |
| 2680 | slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK); |
| 2681 | if (!slot) |
| 2682 | return -1; |
| 2683 | |
| 2684 | ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); |
| 2685 | if (ret <= 0) |
| 2686 | return -1; |
| 2687 | |
| 2688 | for (i = 0; i < ret; i++, gfn++, start++) |
| 2689 | mmu_set_spte(vcpu, start, access, 0, sp->role.level, gfn, |
| 2690 | page_to_pfn(pages[i]), true, true); |
| 2691 | |
| 2692 | return 0; |
| 2693 | } |
| 2694 | |
| 2695 | static void __direct_pte_prefetch(struct kvm_vcpu *vcpu, |
| 2696 | struct kvm_mmu_page *sp, u64 *sptep) |
| 2697 | { |
| 2698 | u64 *spte, *start = NULL; |
| 2699 | int i; |
| 2700 | |
| 2701 | WARN_ON(!sp->role.direct); |
| 2702 | |
| 2703 | i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1); |
| 2704 | spte = sp->spt + i; |
| 2705 | |
| 2706 | for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) { |
| 2707 | if (is_shadow_present_pte(*spte) || spte == sptep) { |
| 2708 | if (!start) |
| 2709 | continue; |
| 2710 | if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0) |
| 2711 | break; |
| 2712 | start = NULL; |
| 2713 | } else if (!start) |
| 2714 | start = spte; |
| 2715 | } |
| 2716 | } |
| 2717 | |
| 2718 | static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep) |
| 2719 | { |
| 2720 | struct kvm_mmu_page *sp; |
| 2721 | |
| 2722 | /* |
| 2723 | * Since it's no accessed bit on EPT, it's no way to |
| 2724 | * distinguish between actually accessed translations |
| 2725 | * and prefetched, so disable pte prefetch if EPT is |
| 2726 | * enabled. |
| 2727 | */ |
| 2728 | if (!shadow_accessed_mask) |
| 2729 | return; |
| 2730 | |
| 2731 | sp = page_header(__pa(sptep)); |
| 2732 | if (sp->role.level > PT_PAGE_TABLE_LEVEL) |
| 2733 | return; |
| 2734 | |
| 2735 | __direct_pte_prefetch(vcpu, sp, sptep); |
| 2736 | } |
| 2737 | |
| 2738 | static int __direct_map(struct kvm_vcpu *vcpu, int write, int map_writable, |
| 2739 | int level, gfn_t gfn, kvm_pfn_t pfn, bool prefault) |
| 2740 | { |
| 2741 | struct kvm_shadow_walk_iterator iterator; |
| 2742 | struct kvm_mmu_page *sp; |
| 2743 | int emulate = 0; |
| 2744 | gfn_t pseudo_gfn; |
| 2745 | |
| 2746 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
| 2747 | return 0; |
| 2748 | |
| 2749 | for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) { |
| 2750 | if (iterator.level == level) { |
| 2751 | emulate = mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, |
| 2752 | write, level, gfn, pfn, prefault, |
| 2753 | map_writable); |
| 2754 | direct_pte_prefetch(vcpu, iterator.sptep); |
| 2755 | ++vcpu->stat.pf_fixed; |
| 2756 | break; |
| 2757 | } |
| 2758 | |
| 2759 | drop_large_spte(vcpu, iterator.sptep); |
| 2760 | if (!is_shadow_present_pte(*iterator.sptep)) { |
| 2761 | u64 base_addr = iterator.addr; |
| 2762 | |
| 2763 | base_addr &= PT64_LVL_ADDR_MASK(iterator.level); |
| 2764 | pseudo_gfn = base_addr >> PAGE_SHIFT; |
| 2765 | sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr, |
| 2766 | iterator.level - 1, 1, ACC_ALL); |
| 2767 | |
| 2768 | link_shadow_page(vcpu, iterator.sptep, sp); |
| 2769 | } |
| 2770 | } |
| 2771 | return emulate; |
| 2772 | } |
| 2773 | |
| 2774 | static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk) |
| 2775 | { |
| 2776 | siginfo_t info; |
| 2777 | |
| 2778 | info.si_signo = SIGBUS; |
| 2779 | info.si_errno = 0; |
| 2780 | info.si_code = BUS_MCEERR_AR; |
| 2781 | info.si_addr = (void __user *)address; |
| 2782 | info.si_addr_lsb = PAGE_SHIFT; |
| 2783 | |
| 2784 | send_sig_info(SIGBUS, &info, tsk); |
| 2785 | } |
| 2786 | |
| 2787 | static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) |
| 2788 | { |
| 2789 | /* |
| 2790 | * Do not cache the mmio info caused by writing the readonly gfn |
| 2791 | * into the spte otherwise read access on readonly gfn also can |
| 2792 | * caused mmio page fault and treat it as mmio access. |
| 2793 | * Return 1 to tell kvm to emulate it. |
| 2794 | */ |
| 2795 | if (pfn == KVM_PFN_ERR_RO_FAULT) |
| 2796 | return 1; |
| 2797 | |
| 2798 | if (pfn == KVM_PFN_ERR_HWPOISON) { |
| 2799 | kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current); |
| 2800 | return 0; |
| 2801 | } |
| 2802 | |
| 2803 | return -EFAULT; |
| 2804 | } |
| 2805 | |
| 2806 | static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu, |
| 2807 | gfn_t *gfnp, kvm_pfn_t *pfnp, |
| 2808 | int *levelp) |
| 2809 | { |
| 2810 | kvm_pfn_t pfn = *pfnp; |
| 2811 | gfn_t gfn = *gfnp; |
| 2812 | int level = *levelp; |
| 2813 | |
| 2814 | /* |
| 2815 | * Check if it's a transparent hugepage. If this would be an |
| 2816 | * hugetlbfs page, level wouldn't be set to |
| 2817 | * PT_PAGE_TABLE_LEVEL and there would be no adjustment done |
| 2818 | * here. |
| 2819 | */ |
| 2820 | if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) && |
| 2821 | level == PT_PAGE_TABLE_LEVEL && |
| 2822 | PageTransCompoundMap(pfn_to_page(pfn)) && |
| 2823 | !mmu_gfn_lpage_is_disallowed(vcpu, gfn, PT_DIRECTORY_LEVEL)) { |
| 2824 | unsigned long mask; |
| 2825 | /* |
| 2826 | * mmu_notifier_retry was successful and we hold the |
| 2827 | * mmu_lock here, so the pmd can't become splitting |
| 2828 | * from under us, and in turn |
| 2829 | * __split_huge_page_refcount() can't run from under |
| 2830 | * us and we can safely transfer the refcount from |
| 2831 | * PG_tail to PG_head as we switch the pfn to tail to |
| 2832 | * head. |
| 2833 | */ |
| 2834 | *levelp = level = PT_DIRECTORY_LEVEL; |
| 2835 | mask = KVM_PAGES_PER_HPAGE(level) - 1; |
| 2836 | VM_BUG_ON((gfn & mask) != (pfn & mask)); |
| 2837 | if (pfn & mask) { |
| 2838 | gfn &= ~mask; |
| 2839 | *gfnp = gfn; |
| 2840 | kvm_release_pfn_clean(pfn); |
| 2841 | pfn &= ~mask; |
| 2842 | kvm_get_pfn(pfn); |
| 2843 | *pfnp = pfn; |
| 2844 | } |
| 2845 | } |
| 2846 | } |
| 2847 | |
| 2848 | static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, |
| 2849 | kvm_pfn_t pfn, unsigned access, int *ret_val) |
| 2850 | { |
| 2851 | /* The pfn is invalid, report the error! */ |
| 2852 | if (unlikely(is_error_pfn(pfn))) { |
| 2853 | *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); |
| 2854 | return true; |
| 2855 | } |
| 2856 | |
| 2857 | if (unlikely(is_noslot_pfn(pfn))) |
| 2858 | vcpu_cache_mmio_info(vcpu, gva, gfn, access); |
| 2859 | |
| 2860 | return false; |
| 2861 | } |
| 2862 | |
| 2863 | static bool page_fault_can_be_fast(u32 error_code) |
| 2864 | { |
| 2865 | /* |
| 2866 | * Do not fix the mmio spte with invalid generation number which |
| 2867 | * need to be updated by slow page fault path. |
| 2868 | */ |
| 2869 | if (unlikely(error_code & PFERR_RSVD_MASK)) |
| 2870 | return false; |
| 2871 | |
| 2872 | /* |
| 2873 | * #PF can be fast only if the shadow page table is present and it |
| 2874 | * is caused by write-protect, that means we just need change the |
| 2875 | * W bit of the spte which can be done out of mmu-lock. |
| 2876 | */ |
| 2877 | if (!(error_code & PFERR_PRESENT_MASK) || |
| 2878 | !(error_code & PFERR_WRITE_MASK)) |
| 2879 | return false; |
| 2880 | |
| 2881 | return true; |
| 2882 | } |
| 2883 | |
| 2884 | static bool |
| 2885 | fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, |
| 2886 | u64 *sptep, u64 spte) |
| 2887 | { |
| 2888 | gfn_t gfn; |
| 2889 | |
| 2890 | WARN_ON(!sp->role.direct); |
| 2891 | |
| 2892 | /* |
| 2893 | * The gfn of direct spte is stable since it is calculated |
| 2894 | * by sp->gfn. |
| 2895 | */ |
| 2896 | gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt); |
| 2897 | |
| 2898 | /* |
| 2899 | * Theoretically we could also set dirty bit (and flush TLB) here in |
| 2900 | * order to eliminate unnecessary PML logging. See comments in |
| 2901 | * set_spte. But fast_page_fault is very unlikely to happen with PML |
| 2902 | * enabled, so we do not do this. This might result in the same GPA |
| 2903 | * to be logged in PML buffer again when the write really happens, and |
| 2904 | * eventually to be called by mark_page_dirty twice. But it's also no |
| 2905 | * harm. This also avoids the TLB flush needed after setting dirty bit |
| 2906 | * so non-PML cases won't be impacted. |
| 2907 | * |
| 2908 | * Compare with set_spte where instead shadow_dirty_mask is set. |
| 2909 | */ |
| 2910 | if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte) |
| 2911 | kvm_vcpu_mark_page_dirty(vcpu, gfn); |
| 2912 | |
| 2913 | return true; |
| 2914 | } |
| 2915 | |
| 2916 | /* |
| 2917 | * Return value: |
| 2918 | * - true: let the vcpu to access on the same address again. |
| 2919 | * - false: let the real page fault path to fix it. |
| 2920 | */ |
| 2921 | static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level, |
| 2922 | u32 error_code) |
| 2923 | { |
| 2924 | struct kvm_shadow_walk_iterator iterator; |
| 2925 | struct kvm_mmu_page *sp; |
| 2926 | bool ret = false; |
| 2927 | u64 spte = 0ull; |
| 2928 | |
| 2929 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
| 2930 | return false; |
| 2931 | |
| 2932 | if (!page_fault_can_be_fast(error_code)) |
| 2933 | return false; |
| 2934 | |
| 2935 | walk_shadow_page_lockless_begin(vcpu); |
| 2936 | for_each_shadow_entry_lockless(vcpu, gva, iterator, spte) |
| 2937 | if (!is_shadow_present_pte(spte) || iterator.level < level) |
| 2938 | break; |
| 2939 | |
| 2940 | /* |
| 2941 | * If the mapping has been changed, let the vcpu fault on the |
| 2942 | * same address again. |
| 2943 | */ |
| 2944 | if (!is_shadow_present_pte(spte)) { |
| 2945 | ret = true; |
| 2946 | goto exit; |
| 2947 | } |
| 2948 | |
| 2949 | sp = page_header(__pa(iterator.sptep)); |
| 2950 | if (!is_last_spte(spte, sp->role.level)) |
| 2951 | goto exit; |
| 2952 | |
| 2953 | /* |
| 2954 | * Check if it is a spurious fault caused by TLB lazily flushed. |
| 2955 | * |
| 2956 | * Need not check the access of upper level table entries since |
| 2957 | * they are always ACC_ALL. |
| 2958 | */ |
| 2959 | if (is_writable_pte(spte)) { |
| 2960 | ret = true; |
| 2961 | goto exit; |
| 2962 | } |
| 2963 | |
| 2964 | /* |
| 2965 | * Currently, to simplify the code, only the spte write-protected |
| 2966 | * by dirty-log can be fast fixed. |
| 2967 | */ |
| 2968 | if (!spte_is_locklessly_modifiable(spte)) |
| 2969 | goto exit; |
| 2970 | |
| 2971 | /* |
| 2972 | * Do not fix write-permission on the large spte since we only dirty |
| 2973 | * the first page into the dirty-bitmap in fast_pf_fix_direct_spte() |
| 2974 | * that means other pages are missed if its slot is dirty-logged. |
| 2975 | * |
| 2976 | * Instead, we let the slow page fault path create a normal spte to |
| 2977 | * fix the access. |
| 2978 | * |
| 2979 | * See the comments in kvm_arch_commit_memory_region(). |
| 2980 | */ |
| 2981 | if (sp->role.level > PT_PAGE_TABLE_LEVEL) |
| 2982 | goto exit; |
| 2983 | |
| 2984 | /* |
| 2985 | * Currently, fast page fault only works for direct mapping since |
| 2986 | * the gfn is not stable for indirect shadow page. |
| 2987 | * See Documentation/virtual/kvm/locking.txt to get more detail. |
| 2988 | */ |
| 2989 | ret = fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte); |
| 2990 | exit: |
| 2991 | trace_fast_page_fault(vcpu, gva, error_code, iterator.sptep, |
| 2992 | spte, ret); |
| 2993 | walk_shadow_page_lockless_end(vcpu); |
| 2994 | |
| 2995 | return ret; |
| 2996 | } |
| 2997 | |
| 2998 | static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, |
| 2999 | gva_t gva, kvm_pfn_t *pfn, bool write, bool *writable); |
| 3000 | static void make_mmu_pages_available(struct kvm_vcpu *vcpu); |
| 3001 | |
| 3002 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, u32 error_code, |
| 3003 | gfn_t gfn, bool prefault) |
| 3004 | { |
| 3005 | int r; |
| 3006 | int level; |
| 3007 | bool force_pt_level = false; |
| 3008 | kvm_pfn_t pfn; |
| 3009 | unsigned long mmu_seq; |
| 3010 | bool map_writable, write = error_code & PFERR_WRITE_MASK; |
| 3011 | |
| 3012 | level = mapping_level(vcpu, gfn, &force_pt_level); |
| 3013 | if (likely(!force_pt_level)) { |
| 3014 | /* |
| 3015 | * This path builds a PAE pagetable - so we can map |
| 3016 | * 2mb pages at maximum. Therefore check if the level |
| 3017 | * is larger than that. |
| 3018 | */ |
| 3019 | if (level > PT_DIRECTORY_LEVEL) |
| 3020 | level = PT_DIRECTORY_LEVEL; |
| 3021 | |
| 3022 | gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1); |
| 3023 | } |
| 3024 | |
| 3025 | if (fast_page_fault(vcpu, v, level, error_code)) |
| 3026 | return 0; |
| 3027 | |
| 3028 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
| 3029 | smp_rmb(); |
| 3030 | |
| 3031 | if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable)) |
| 3032 | return 0; |
| 3033 | |
| 3034 | if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r)) |
| 3035 | return r; |
| 3036 | |
| 3037 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3038 | if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) |
| 3039 | goto out_unlock; |
| 3040 | make_mmu_pages_available(vcpu); |
| 3041 | if (likely(!force_pt_level)) |
| 3042 | transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level); |
| 3043 | r = __direct_map(vcpu, write, map_writable, level, gfn, pfn, prefault); |
| 3044 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3045 | |
| 3046 | return r; |
| 3047 | |
| 3048 | out_unlock: |
| 3049 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3050 | kvm_release_pfn_clean(pfn); |
| 3051 | return 0; |
| 3052 | } |
| 3053 | |
| 3054 | |
| 3055 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
| 3056 | { |
| 3057 | int i; |
| 3058 | struct kvm_mmu_page *sp; |
| 3059 | LIST_HEAD(invalid_list); |
| 3060 | |
| 3061 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
| 3062 | return; |
| 3063 | |
| 3064 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL && |
| 3065 | (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL || |
| 3066 | vcpu->arch.mmu.direct_map)) { |
| 3067 | hpa_t root = vcpu->arch.mmu.root_hpa; |
| 3068 | |
| 3069 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3070 | sp = page_header(root); |
| 3071 | --sp->root_count; |
| 3072 | if (!sp->root_count && sp->role.invalid) { |
| 3073 | kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); |
| 3074 | kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); |
| 3075 | } |
| 3076 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3077 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
| 3078 | return; |
| 3079 | } |
| 3080 | |
| 3081 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3082 | for (i = 0; i < 4; ++i) { |
| 3083 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
| 3084 | |
| 3085 | if (root) { |
| 3086 | root &= PT64_BASE_ADDR_MASK; |
| 3087 | sp = page_header(root); |
| 3088 | --sp->root_count; |
| 3089 | if (!sp->root_count && sp->role.invalid) |
| 3090 | kvm_mmu_prepare_zap_page(vcpu->kvm, sp, |
| 3091 | &invalid_list); |
| 3092 | } |
| 3093 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
| 3094 | } |
| 3095 | kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); |
| 3096 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3097 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
| 3098 | } |
| 3099 | |
| 3100 | static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) |
| 3101 | { |
| 3102 | int ret = 0; |
| 3103 | |
| 3104 | if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) { |
| 3105 | kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu); |
| 3106 | ret = 1; |
| 3107 | } |
| 3108 | |
| 3109 | return ret; |
| 3110 | } |
| 3111 | |
| 3112 | static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu) |
| 3113 | { |
| 3114 | struct kvm_mmu_page *sp; |
| 3115 | unsigned i; |
| 3116 | |
| 3117 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
| 3118 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3119 | make_mmu_pages_available(vcpu); |
| 3120 | sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL, 1, ACC_ALL); |
| 3121 | ++sp->root_count; |
| 3122 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3123 | vcpu->arch.mmu.root_hpa = __pa(sp->spt); |
| 3124 | } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) { |
| 3125 | for (i = 0; i < 4; ++i) { |
| 3126 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
| 3127 | |
| 3128 | MMU_WARN_ON(VALID_PAGE(root)); |
| 3129 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3130 | make_mmu_pages_available(vcpu); |
| 3131 | sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT), |
| 3132 | i << 30, PT32_ROOT_LEVEL, 1, ACC_ALL); |
| 3133 | root = __pa(sp->spt); |
| 3134 | ++sp->root_count; |
| 3135 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3136 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
| 3137 | } |
| 3138 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
| 3139 | } else |
| 3140 | BUG(); |
| 3141 | |
| 3142 | return 0; |
| 3143 | } |
| 3144 | |
| 3145 | static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu) |
| 3146 | { |
| 3147 | struct kvm_mmu_page *sp; |
| 3148 | u64 pdptr, pm_mask; |
| 3149 | gfn_t root_gfn; |
| 3150 | int i; |
| 3151 | |
| 3152 | root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT; |
| 3153 | |
| 3154 | if (mmu_check_root(vcpu, root_gfn)) |
| 3155 | return 1; |
| 3156 | |
| 3157 | /* |
| 3158 | * Do we shadow a long mode page table? If so we need to |
| 3159 | * write-protect the guests page table root. |
| 3160 | */ |
| 3161 | if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) { |
| 3162 | hpa_t root = vcpu->arch.mmu.root_hpa; |
| 3163 | |
| 3164 | MMU_WARN_ON(VALID_PAGE(root)); |
| 3165 | |
| 3166 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3167 | make_mmu_pages_available(vcpu); |
| 3168 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL, |
| 3169 | 0, ACC_ALL); |
| 3170 | root = __pa(sp->spt); |
| 3171 | ++sp->root_count; |
| 3172 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3173 | vcpu->arch.mmu.root_hpa = root; |
| 3174 | return 0; |
| 3175 | } |
| 3176 | |
| 3177 | /* |
| 3178 | * We shadow a 32 bit page table. This may be a legacy 2-level |
| 3179 | * or a PAE 3-level page table. In either case we need to be aware that |
| 3180 | * the shadow page table may be a PAE or a long mode page table. |
| 3181 | */ |
| 3182 | pm_mask = PT_PRESENT_MASK; |
| 3183 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) |
| 3184 | pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK; |
| 3185 | |
| 3186 | for (i = 0; i < 4; ++i) { |
| 3187 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
| 3188 | |
| 3189 | MMU_WARN_ON(VALID_PAGE(root)); |
| 3190 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
| 3191 | pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i); |
| 3192 | if (!is_present_gpte(pdptr)) { |
| 3193 | vcpu->arch.mmu.pae_root[i] = 0; |
| 3194 | continue; |
| 3195 | } |
| 3196 | root_gfn = pdptr >> PAGE_SHIFT; |
| 3197 | if (mmu_check_root(vcpu, root_gfn)) |
| 3198 | return 1; |
| 3199 | } |
| 3200 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3201 | make_mmu_pages_available(vcpu); |
| 3202 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, PT32_ROOT_LEVEL, |
| 3203 | 0, ACC_ALL); |
| 3204 | root = __pa(sp->spt); |
| 3205 | ++sp->root_count; |
| 3206 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3207 | |
| 3208 | vcpu->arch.mmu.pae_root[i] = root | pm_mask; |
| 3209 | } |
| 3210 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
| 3211 | |
| 3212 | /* |
| 3213 | * If we shadow a 32 bit page table with a long mode page |
| 3214 | * table we enter this path. |
| 3215 | */ |
| 3216 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
| 3217 | if (vcpu->arch.mmu.lm_root == NULL) { |
| 3218 | /* |
| 3219 | * The additional page necessary for this is only |
| 3220 | * allocated on demand. |
| 3221 | */ |
| 3222 | |
| 3223 | u64 *lm_root; |
| 3224 | |
| 3225 | lm_root = (void*)get_zeroed_page(GFP_KERNEL); |
| 3226 | if (lm_root == NULL) |
| 3227 | return 1; |
| 3228 | |
| 3229 | lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask; |
| 3230 | |
| 3231 | vcpu->arch.mmu.lm_root = lm_root; |
| 3232 | } |
| 3233 | |
| 3234 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root); |
| 3235 | } |
| 3236 | |
| 3237 | return 0; |
| 3238 | } |
| 3239 | |
| 3240 | static int mmu_alloc_roots(struct kvm_vcpu *vcpu) |
| 3241 | { |
| 3242 | if (vcpu->arch.mmu.direct_map) |
| 3243 | return mmu_alloc_direct_roots(vcpu); |
| 3244 | else |
| 3245 | return mmu_alloc_shadow_roots(vcpu); |
| 3246 | } |
| 3247 | |
| 3248 | static void mmu_sync_roots(struct kvm_vcpu *vcpu) |
| 3249 | { |
| 3250 | int i; |
| 3251 | struct kvm_mmu_page *sp; |
| 3252 | |
| 3253 | if (vcpu->arch.mmu.direct_map) |
| 3254 | return; |
| 3255 | |
| 3256 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
| 3257 | return; |
| 3258 | |
| 3259 | vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY); |
| 3260 | kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC); |
| 3261 | if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) { |
| 3262 | hpa_t root = vcpu->arch.mmu.root_hpa; |
| 3263 | sp = page_header(root); |
| 3264 | mmu_sync_children(vcpu, sp); |
| 3265 | kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); |
| 3266 | return; |
| 3267 | } |
| 3268 | for (i = 0; i < 4; ++i) { |
| 3269 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
| 3270 | |
| 3271 | if (root && VALID_PAGE(root)) { |
| 3272 | root &= PT64_BASE_ADDR_MASK; |
| 3273 | sp = page_header(root); |
| 3274 | mmu_sync_children(vcpu, sp); |
| 3275 | } |
| 3276 | } |
| 3277 | kvm_mmu_audit(vcpu, AUDIT_POST_SYNC); |
| 3278 | } |
| 3279 | |
| 3280 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) |
| 3281 | { |
| 3282 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3283 | mmu_sync_roots(vcpu); |
| 3284 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3285 | } |
| 3286 | EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots); |
| 3287 | |
| 3288 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr, |
| 3289 | u32 access, struct x86_exception *exception) |
| 3290 | { |
| 3291 | if (exception) |
| 3292 | exception->error_code = 0; |
| 3293 | return vaddr; |
| 3294 | } |
| 3295 | |
| 3296 | static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr, |
| 3297 | u32 access, |
| 3298 | struct x86_exception *exception) |
| 3299 | { |
| 3300 | if (exception) |
| 3301 | exception->error_code = 0; |
| 3302 | return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception); |
| 3303 | } |
| 3304 | |
| 3305 | static bool |
| 3306 | __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level) |
| 3307 | { |
| 3308 | int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f; |
| 3309 | |
| 3310 | return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) | |
| 3311 | ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0); |
| 3312 | } |
| 3313 | |
| 3314 | static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level) |
| 3315 | { |
| 3316 | return __is_rsvd_bits_set(&mmu->guest_rsvd_check, gpte, level); |
| 3317 | } |
| 3318 | |
| 3319 | static bool is_shadow_zero_bits_set(struct kvm_mmu *mmu, u64 spte, int level) |
| 3320 | { |
| 3321 | return __is_rsvd_bits_set(&mmu->shadow_zero_check, spte, level); |
| 3322 | } |
| 3323 | |
| 3324 | static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct) |
| 3325 | { |
| 3326 | if (direct) |
| 3327 | return vcpu_match_mmio_gpa(vcpu, addr); |
| 3328 | |
| 3329 | return vcpu_match_mmio_gva(vcpu, addr); |
| 3330 | } |
| 3331 | |
| 3332 | /* return true if reserved bit is detected on spte. */ |
| 3333 | static bool |
| 3334 | walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep) |
| 3335 | { |
| 3336 | struct kvm_shadow_walk_iterator iterator; |
| 3337 | u64 sptes[PT64_ROOT_LEVEL], spte = 0ull; |
| 3338 | int root, leaf; |
| 3339 | bool reserved = false; |
| 3340 | |
| 3341 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
| 3342 | goto exit; |
| 3343 | |
| 3344 | walk_shadow_page_lockless_begin(vcpu); |
| 3345 | |
| 3346 | for (shadow_walk_init(&iterator, vcpu, addr), |
| 3347 | leaf = root = iterator.level; |
| 3348 | shadow_walk_okay(&iterator); |
| 3349 | __shadow_walk_next(&iterator, spte)) { |
| 3350 | spte = mmu_spte_get_lockless(iterator.sptep); |
| 3351 | |
| 3352 | sptes[leaf - 1] = spte; |
| 3353 | leaf--; |
| 3354 | |
| 3355 | if (!is_shadow_present_pte(spte)) |
| 3356 | break; |
| 3357 | |
| 3358 | reserved |= is_shadow_zero_bits_set(&vcpu->arch.mmu, spte, |
| 3359 | iterator.level); |
| 3360 | } |
| 3361 | |
| 3362 | walk_shadow_page_lockless_end(vcpu); |
| 3363 | |
| 3364 | if (reserved) { |
| 3365 | pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n", |
| 3366 | __func__, addr); |
| 3367 | while (root > leaf) { |
| 3368 | pr_err("------ spte 0x%llx level %d.\n", |
| 3369 | sptes[root - 1], root); |
| 3370 | root--; |
| 3371 | } |
| 3372 | } |
| 3373 | exit: |
| 3374 | *sptep = spte; |
| 3375 | return reserved; |
| 3376 | } |
| 3377 | |
| 3378 | int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct) |
| 3379 | { |
| 3380 | u64 spte; |
| 3381 | bool reserved; |
| 3382 | |
| 3383 | if (mmio_info_in_cache(vcpu, addr, direct)) |
| 3384 | return RET_MMIO_PF_EMULATE; |
| 3385 | |
| 3386 | reserved = walk_shadow_page_get_mmio_spte(vcpu, addr, &spte); |
| 3387 | if (WARN_ON(reserved)) |
| 3388 | return RET_MMIO_PF_BUG; |
| 3389 | |
| 3390 | if (is_mmio_spte(spte)) { |
| 3391 | gfn_t gfn = get_mmio_spte_gfn(spte); |
| 3392 | unsigned access = get_mmio_spte_access(spte); |
| 3393 | |
| 3394 | if (!check_mmio_spte(vcpu, spte)) |
| 3395 | return RET_MMIO_PF_INVALID; |
| 3396 | |
| 3397 | if (direct) |
| 3398 | addr = 0; |
| 3399 | |
| 3400 | trace_handle_mmio_page_fault(addr, gfn, access); |
| 3401 | vcpu_cache_mmio_info(vcpu, addr, gfn, access); |
| 3402 | return RET_MMIO_PF_EMULATE; |
| 3403 | } |
| 3404 | |
| 3405 | /* |
| 3406 | * If the page table is zapped by other cpus, let CPU fault again on |
| 3407 | * the address. |
| 3408 | */ |
| 3409 | return RET_MMIO_PF_RETRY; |
| 3410 | } |
| 3411 | EXPORT_SYMBOL_GPL(handle_mmio_page_fault); |
| 3412 | |
| 3413 | static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu, |
| 3414 | u32 error_code, gfn_t gfn) |
| 3415 | { |
| 3416 | if (unlikely(error_code & PFERR_RSVD_MASK)) |
| 3417 | return false; |
| 3418 | |
| 3419 | if (!(error_code & PFERR_PRESENT_MASK) || |
| 3420 | !(error_code & PFERR_WRITE_MASK)) |
| 3421 | return false; |
| 3422 | |
| 3423 | /* |
| 3424 | * guest is writing the page which is write tracked which can |
| 3425 | * not be fixed by page fault handler. |
| 3426 | */ |
| 3427 | if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE)) |
| 3428 | return true; |
| 3429 | |
| 3430 | return false; |
| 3431 | } |
| 3432 | |
| 3433 | static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr) |
| 3434 | { |
| 3435 | struct kvm_shadow_walk_iterator iterator; |
| 3436 | u64 spte; |
| 3437 | |
| 3438 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
| 3439 | return; |
| 3440 | |
| 3441 | walk_shadow_page_lockless_begin(vcpu); |
| 3442 | for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) { |
| 3443 | clear_sp_write_flooding_count(iterator.sptep); |
| 3444 | if (!is_shadow_present_pte(spte)) |
| 3445 | break; |
| 3446 | } |
| 3447 | walk_shadow_page_lockless_end(vcpu); |
| 3448 | } |
| 3449 | |
| 3450 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, |
| 3451 | u32 error_code, bool prefault) |
| 3452 | { |
| 3453 | gfn_t gfn = gva >> PAGE_SHIFT; |
| 3454 | int r; |
| 3455 | |
| 3456 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
| 3457 | |
| 3458 | if (page_fault_handle_page_track(vcpu, error_code, gfn)) |
| 3459 | return 1; |
| 3460 | |
| 3461 | r = mmu_topup_memory_caches(vcpu); |
| 3462 | if (r) |
| 3463 | return r; |
| 3464 | |
| 3465 | MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
| 3466 | |
| 3467 | |
| 3468 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
| 3469 | error_code, gfn, prefault); |
| 3470 | } |
| 3471 | |
| 3472 | static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn) |
| 3473 | { |
| 3474 | struct kvm_arch_async_pf arch; |
| 3475 | |
| 3476 | arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; |
| 3477 | arch.gfn = gfn; |
| 3478 | arch.direct_map = vcpu->arch.mmu.direct_map; |
| 3479 | arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu); |
| 3480 | |
| 3481 | return kvm_setup_async_pf(vcpu, gva, kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); |
| 3482 | } |
| 3483 | |
| 3484 | static bool can_do_async_pf(struct kvm_vcpu *vcpu) |
| 3485 | { |
| 3486 | if (unlikely(!lapic_in_kernel(vcpu) || |
| 3487 | kvm_event_needs_reinjection(vcpu))) |
| 3488 | return false; |
| 3489 | |
| 3490 | return kvm_x86_ops->interrupt_allowed(vcpu); |
| 3491 | } |
| 3492 | |
| 3493 | static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, |
| 3494 | gva_t gva, kvm_pfn_t *pfn, bool write, bool *writable) |
| 3495 | { |
| 3496 | struct kvm_memory_slot *slot; |
| 3497 | bool async; |
| 3498 | |
| 3499 | slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn); |
| 3500 | async = false; |
| 3501 | *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable); |
| 3502 | if (!async) |
| 3503 | return false; /* *pfn has correct page already */ |
| 3504 | |
| 3505 | if (!prefault && can_do_async_pf(vcpu)) { |
| 3506 | trace_kvm_try_async_get_page(gva, gfn); |
| 3507 | if (kvm_find_async_pf_gfn(vcpu, gfn)) { |
| 3508 | trace_kvm_async_pf_doublefault(gva, gfn); |
| 3509 | kvm_make_request(KVM_REQ_APF_HALT, vcpu); |
| 3510 | return true; |
| 3511 | } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn)) |
| 3512 | return true; |
| 3513 | } |
| 3514 | |
| 3515 | *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable); |
| 3516 | return false; |
| 3517 | } |
| 3518 | |
| 3519 | static bool |
| 3520 | check_hugepage_cache_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, int level) |
| 3521 | { |
| 3522 | int page_num = KVM_PAGES_PER_HPAGE(level); |
| 3523 | |
| 3524 | gfn &= ~(page_num - 1); |
| 3525 | |
| 3526 | return kvm_mtrr_check_gfn_range_consistency(vcpu, gfn, page_num); |
| 3527 | } |
| 3528 | |
| 3529 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code, |
| 3530 | bool prefault) |
| 3531 | { |
| 3532 | kvm_pfn_t pfn; |
| 3533 | int r; |
| 3534 | int level; |
| 3535 | bool force_pt_level; |
| 3536 | gfn_t gfn = gpa >> PAGE_SHIFT; |
| 3537 | unsigned long mmu_seq; |
| 3538 | int write = error_code & PFERR_WRITE_MASK; |
| 3539 | bool map_writable; |
| 3540 | |
| 3541 | MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
| 3542 | |
| 3543 | if (page_fault_handle_page_track(vcpu, error_code, gfn)) |
| 3544 | return 1; |
| 3545 | |
| 3546 | r = mmu_topup_memory_caches(vcpu); |
| 3547 | if (r) |
| 3548 | return r; |
| 3549 | |
| 3550 | force_pt_level = !check_hugepage_cache_consistency(vcpu, gfn, |
| 3551 | PT_DIRECTORY_LEVEL); |
| 3552 | level = mapping_level(vcpu, gfn, &force_pt_level); |
| 3553 | if (likely(!force_pt_level)) { |
| 3554 | if (level > PT_DIRECTORY_LEVEL && |
| 3555 | !check_hugepage_cache_consistency(vcpu, gfn, level)) |
| 3556 | level = PT_DIRECTORY_LEVEL; |
| 3557 | gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1); |
| 3558 | } |
| 3559 | |
| 3560 | if (fast_page_fault(vcpu, gpa, level, error_code)) |
| 3561 | return 0; |
| 3562 | |
| 3563 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
| 3564 | smp_rmb(); |
| 3565 | |
| 3566 | if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable)) |
| 3567 | return 0; |
| 3568 | |
| 3569 | if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r)) |
| 3570 | return r; |
| 3571 | |
| 3572 | spin_lock(&vcpu->kvm->mmu_lock); |
| 3573 | if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) |
| 3574 | goto out_unlock; |
| 3575 | make_mmu_pages_available(vcpu); |
| 3576 | if (likely(!force_pt_level)) |
| 3577 | transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level); |
| 3578 | r = __direct_map(vcpu, write, map_writable, level, gfn, pfn, prefault); |
| 3579 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3580 | |
| 3581 | return r; |
| 3582 | |
| 3583 | out_unlock: |
| 3584 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 3585 | kvm_release_pfn_clean(pfn); |
| 3586 | return 0; |
| 3587 | } |
| 3588 | |
| 3589 | static void nonpaging_init_context(struct kvm_vcpu *vcpu, |
| 3590 | struct kvm_mmu *context) |
| 3591 | { |
| 3592 | context->page_fault = nonpaging_page_fault; |
| 3593 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
| 3594 | context->sync_page = nonpaging_sync_page; |
| 3595 | context->invlpg = nonpaging_invlpg; |
| 3596 | context->update_pte = nonpaging_update_pte; |
| 3597 | context->root_level = 0; |
| 3598 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
| 3599 | context->root_hpa = INVALID_PAGE; |
| 3600 | context->direct_map = true; |
| 3601 | context->nx = false; |
| 3602 | } |
| 3603 | |
| 3604 | void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu) |
| 3605 | { |
| 3606 | mmu_free_roots(vcpu); |
| 3607 | } |
| 3608 | |
| 3609 | static unsigned long get_cr3(struct kvm_vcpu *vcpu) |
| 3610 | { |
| 3611 | return kvm_read_cr3(vcpu); |
| 3612 | } |
| 3613 | |
| 3614 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
| 3615 | struct x86_exception *fault) |
| 3616 | { |
| 3617 | vcpu->arch.mmu.inject_page_fault(vcpu, fault); |
| 3618 | } |
| 3619 | |
| 3620 | static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, |
| 3621 | unsigned access, int *nr_present) |
| 3622 | { |
| 3623 | if (unlikely(is_mmio_spte(*sptep))) { |
| 3624 | if (gfn != get_mmio_spte_gfn(*sptep)) { |
| 3625 | mmu_spte_clear_no_track(sptep); |
| 3626 | return true; |
| 3627 | } |
| 3628 | |
| 3629 | (*nr_present)++; |
| 3630 | mark_mmio_spte(vcpu, sptep, gfn, access); |
| 3631 | return true; |
| 3632 | } |
| 3633 | |
| 3634 | return false; |
| 3635 | } |
| 3636 | |
| 3637 | static inline bool is_last_gpte(struct kvm_mmu *mmu, |
| 3638 | unsigned level, unsigned gpte) |
| 3639 | { |
| 3640 | /* |
| 3641 | * PT_PAGE_TABLE_LEVEL always terminates. The RHS has bit 7 set |
| 3642 | * iff level <= PT_PAGE_TABLE_LEVEL, which for our purpose means |
| 3643 | * level == PT_PAGE_TABLE_LEVEL; set PT_PAGE_SIZE_MASK in gpte then. |
| 3644 | */ |
| 3645 | gpte |= level - PT_PAGE_TABLE_LEVEL - 1; |
| 3646 | |
| 3647 | /* |
| 3648 | * The RHS has bit 7 set iff level < mmu->last_nonleaf_level. |
| 3649 | * If it is clear, there are no large pages at this level, so clear |
| 3650 | * PT_PAGE_SIZE_MASK in gpte if that is the case. |
| 3651 | */ |
| 3652 | gpte &= level - mmu->last_nonleaf_level; |
| 3653 | |
| 3654 | return gpte & PT_PAGE_SIZE_MASK; |
| 3655 | } |
| 3656 | |
| 3657 | #define PTTYPE_EPT 18 /* arbitrary */ |
| 3658 | #define PTTYPE PTTYPE_EPT |
| 3659 | #include "paging_tmpl.h" |
| 3660 | #undef PTTYPE |
| 3661 | |
| 3662 | #define PTTYPE 64 |
| 3663 | #include "paging_tmpl.h" |
| 3664 | #undef PTTYPE |
| 3665 | |
| 3666 | #define PTTYPE 32 |
| 3667 | #include "paging_tmpl.h" |
| 3668 | #undef PTTYPE |
| 3669 | |
| 3670 | static void |
| 3671 | __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, |
| 3672 | struct rsvd_bits_validate *rsvd_check, |
| 3673 | int maxphyaddr, int level, bool nx, bool gbpages, |
| 3674 | bool pse, bool amd) |
| 3675 | { |
| 3676 | u64 exb_bit_rsvd = 0; |
| 3677 | u64 gbpages_bit_rsvd = 0; |
| 3678 | u64 nonleaf_bit8_rsvd = 0; |
| 3679 | |
| 3680 | rsvd_check->bad_mt_xwr = 0; |
| 3681 | |
| 3682 | if (!nx) |
| 3683 | exb_bit_rsvd = rsvd_bits(63, 63); |
| 3684 | if (!gbpages) |
| 3685 | gbpages_bit_rsvd = rsvd_bits(7, 7); |
| 3686 | |
| 3687 | /* |
| 3688 | * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for |
| 3689 | * leaf entries) on AMD CPUs only. |
| 3690 | */ |
| 3691 | if (amd) |
| 3692 | nonleaf_bit8_rsvd = rsvd_bits(8, 8); |
| 3693 | |
| 3694 | switch (level) { |
| 3695 | case PT32_ROOT_LEVEL: |
| 3696 | /* no rsvd bits for 2 level 4K page table entries */ |
| 3697 | rsvd_check->rsvd_bits_mask[0][1] = 0; |
| 3698 | rsvd_check->rsvd_bits_mask[0][0] = 0; |
| 3699 | rsvd_check->rsvd_bits_mask[1][0] = |
| 3700 | rsvd_check->rsvd_bits_mask[0][0]; |
| 3701 | |
| 3702 | if (!pse) { |
| 3703 | rsvd_check->rsvd_bits_mask[1][1] = 0; |
| 3704 | break; |
| 3705 | } |
| 3706 | |
| 3707 | if (is_cpuid_PSE36()) |
| 3708 | /* 36bits PSE 4MB page */ |
| 3709 | rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); |
| 3710 | else |
| 3711 | /* 32 bits PSE 4MB page */ |
| 3712 | rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); |
| 3713 | break; |
| 3714 | case PT32E_ROOT_LEVEL: |
| 3715 | rsvd_check->rsvd_bits_mask[0][2] = |
| 3716 | rsvd_bits(maxphyaddr, 63) | |
| 3717 | rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */ |
| 3718 | rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | |
| 3719 | rsvd_bits(maxphyaddr, 62); /* PDE */ |
| 3720 | rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd | |
| 3721 | rsvd_bits(maxphyaddr, 62); /* PTE */ |
| 3722 | rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd | |
| 3723 | rsvd_bits(maxphyaddr, 62) | |
| 3724 | rsvd_bits(13, 20); /* large page */ |
| 3725 | rsvd_check->rsvd_bits_mask[1][0] = |
| 3726 | rsvd_check->rsvd_bits_mask[0][0]; |
| 3727 | break; |
| 3728 | case PT64_ROOT_LEVEL: |
| 3729 | rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd | |
| 3730 | nonleaf_bit8_rsvd | rsvd_bits(7, 7) | |
| 3731 | rsvd_bits(maxphyaddr, 51); |
| 3732 | rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd | |
| 3733 | nonleaf_bit8_rsvd | gbpages_bit_rsvd | |
| 3734 | rsvd_bits(maxphyaddr, 51); |
| 3735 | rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | |
| 3736 | rsvd_bits(maxphyaddr, 51); |
| 3737 | rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd | |
| 3738 | rsvd_bits(maxphyaddr, 51); |
| 3739 | rsvd_check->rsvd_bits_mask[1][3] = |
| 3740 | rsvd_check->rsvd_bits_mask[0][3]; |
| 3741 | rsvd_check->rsvd_bits_mask[1][2] = exb_bit_rsvd | |
| 3742 | gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) | |
| 3743 | rsvd_bits(13, 29); |
| 3744 | rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd | |
| 3745 | rsvd_bits(maxphyaddr, 51) | |
| 3746 | rsvd_bits(13, 20); /* large page */ |
| 3747 | rsvd_check->rsvd_bits_mask[1][0] = |
| 3748 | rsvd_check->rsvd_bits_mask[0][0]; |
| 3749 | break; |
| 3750 | } |
| 3751 | } |
| 3752 | |
| 3753 | static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, |
| 3754 | struct kvm_mmu *context) |
| 3755 | { |
| 3756 | __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check, |
| 3757 | cpuid_maxphyaddr(vcpu), context->root_level, |
| 3758 | context->nx, guest_cpuid_has_gbpages(vcpu), |
| 3759 | is_pse(vcpu), guest_cpuid_is_amd(vcpu)); |
| 3760 | } |
| 3761 | |
| 3762 | static void |
| 3763 | __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, |
| 3764 | int maxphyaddr, bool execonly) |
| 3765 | { |
| 3766 | u64 bad_mt_xwr; |
| 3767 | |
| 3768 | rsvd_check->rsvd_bits_mask[0][3] = |
| 3769 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7); |
| 3770 | rsvd_check->rsvd_bits_mask[0][2] = |
| 3771 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6); |
| 3772 | rsvd_check->rsvd_bits_mask[0][1] = |
| 3773 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6); |
| 3774 | rsvd_check->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51); |
| 3775 | |
| 3776 | /* large page */ |
| 3777 | rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; |
| 3778 | rsvd_check->rsvd_bits_mask[1][2] = |
| 3779 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29); |
| 3780 | rsvd_check->rsvd_bits_mask[1][1] = |
| 3781 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20); |
| 3782 | rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; |
| 3783 | |
| 3784 | bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */ |
| 3785 | bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */ |
| 3786 | bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */ |
| 3787 | bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */ |
| 3788 | bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */ |
| 3789 | if (!execonly) { |
| 3790 | /* bits 0..2 must not be 100 unless VMX capabilities allow it */ |
| 3791 | bad_mt_xwr |= REPEAT_BYTE(1ull << 4); |
| 3792 | } |
| 3793 | rsvd_check->bad_mt_xwr = bad_mt_xwr; |
| 3794 | } |
| 3795 | |
| 3796 | static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu, |
| 3797 | struct kvm_mmu *context, bool execonly) |
| 3798 | { |
| 3799 | __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, |
| 3800 | cpuid_maxphyaddr(vcpu), execonly); |
| 3801 | } |
| 3802 | |
| 3803 | /* |
| 3804 | * the page table on host is the shadow page table for the page |
| 3805 | * table in guest or amd nested guest, its mmu features completely |
| 3806 | * follow the features in guest. |
| 3807 | */ |
| 3808 | void |
| 3809 | reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) |
| 3810 | { |
| 3811 | bool uses_nx = context->nx || context->base_role.smep_andnot_wp; |
| 3812 | |
| 3813 | /* |
| 3814 | * Passing "true" to the last argument is okay; it adds a check |
| 3815 | * on bit 8 of the SPTEs which KVM doesn't use anyway. |
| 3816 | */ |
| 3817 | __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check, |
| 3818 | boot_cpu_data.x86_phys_bits, |
| 3819 | context->shadow_root_level, uses_nx, |
| 3820 | guest_cpuid_has_gbpages(vcpu), is_pse(vcpu), |
| 3821 | true); |
| 3822 | } |
| 3823 | EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask); |
| 3824 | |
| 3825 | static inline bool boot_cpu_is_amd(void) |
| 3826 | { |
| 3827 | WARN_ON_ONCE(!tdp_enabled); |
| 3828 | return shadow_x_mask == 0; |
| 3829 | } |
| 3830 | |
| 3831 | /* |
| 3832 | * the direct page table on host, use as much mmu features as |
| 3833 | * possible, however, kvm currently does not do execution-protection. |
| 3834 | */ |
| 3835 | static void |
| 3836 | reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, |
| 3837 | struct kvm_mmu *context) |
| 3838 | { |
| 3839 | if (boot_cpu_is_amd()) |
| 3840 | __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check, |
| 3841 | boot_cpu_data.x86_phys_bits, |
| 3842 | context->shadow_root_level, false, |
| 3843 | boot_cpu_has(X86_FEATURE_GBPAGES), |
| 3844 | true, true); |
| 3845 | else |
| 3846 | __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, |
| 3847 | boot_cpu_data.x86_phys_bits, |
| 3848 | false); |
| 3849 | |
| 3850 | } |
| 3851 | |
| 3852 | /* |
| 3853 | * as the comments in reset_shadow_zero_bits_mask() except it |
| 3854 | * is the shadow page table for intel nested guest. |
| 3855 | */ |
| 3856 | static void |
| 3857 | reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, |
| 3858 | struct kvm_mmu *context, bool execonly) |
| 3859 | { |
| 3860 | __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, |
| 3861 | boot_cpu_data.x86_phys_bits, execonly); |
| 3862 | } |
| 3863 | |
| 3864 | static void update_permission_bitmask(struct kvm_vcpu *vcpu, |
| 3865 | struct kvm_mmu *mmu, bool ept) |
| 3866 | { |
| 3867 | unsigned bit, byte, pfec; |
| 3868 | u8 map; |
| 3869 | bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0; |
| 3870 | |
| 3871 | cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); |
| 3872 | cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); |
| 3873 | for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { |
| 3874 | pfec = byte << 1; |
| 3875 | map = 0; |
| 3876 | wf = pfec & PFERR_WRITE_MASK; |
| 3877 | uf = pfec & PFERR_USER_MASK; |
| 3878 | ff = pfec & PFERR_FETCH_MASK; |
| 3879 | /* |
| 3880 | * PFERR_RSVD_MASK bit is set in PFEC if the access is not |
| 3881 | * subject to SMAP restrictions, and cleared otherwise. The |
| 3882 | * bit is only meaningful if the SMAP bit is set in CR4. |
| 3883 | */ |
| 3884 | smapf = !(pfec & PFERR_RSVD_MASK); |
| 3885 | for (bit = 0; bit < 8; ++bit) { |
| 3886 | x = bit & ACC_EXEC_MASK; |
| 3887 | w = bit & ACC_WRITE_MASK; |
| 3888 | u = bit & ACC_USER_MASK; |
| 3889 | |
| 3890 | if (!ept) { |
| 3891 | /* Not really needed: !nx will cause pte.nx to fault */ |
| 3892 | x |= !mmu->nx; |
| 3893 | /* Allow supervisor writes if !cr0.wp */ |
| 3894 | w |= !is_write_protection(vcpu) && !uf; |
| 3895 | /* Disallow supervisor fetches of user code if cr4.smep */ |
| 3896 | x &= !(cr4_smep && u && !uf); |
| 3897 | |
| 3898 | /* |
| 3899 | * SMAP:kernel-mode data accesses from user-mode |
| 3900 | * mappings should fault. A fault is considered |
| 3901 | * as a SMAP violation if all of the following |
| 3902 | * conditions are ture: |
| 3903 | * - X86_CR4_SMAP is set in CR4 |
| 3904 | * - An user page is accessed |
| 3905 | * - Page fault in kernel mode |
| 3906 | * - if CPL = 3 or X86_EFLAGS_AC is clear |
| 3907 | * |
| 3908 | * Here, we cover the first three conditions. |
| 3909 | * The fourth is computed dynamically in |
| 3910 | * permission_fault() and is in smapf. |
| 3911 | * |
| 3912 | * Also, SMAP does not affect instruction |
| 3913 | * fetches, add the !ff check here to make it |
| 3914 | * clearer. |
| 3915 | */ |
| 3916 | smap = cr4_smap && u && !uf && !ff; |
| 3917 | } else |
| 3918 | /* Not really needed: no U/S accesses on ept */ |
| 3919 | u = 1; |
| 3920 | |
| 3921 | fault = (ff && !x) || (uf && !u) || (wf && !w) || |
| 3922 | (smapf && smap); |
| 3923 | map |= fault << bit; |
| 3924 | } |
| 3925 | mmu->permissions[byte] = map; |
| 3926 | } |
| 3927 | } |
| 3928 | |
| 3929 | /* |
| 3930 | * PKU is an additional mechanism by which the paging controls access to |
| 3931 | * user-mode addresses based on the value in the PKRU register. Protection |
| 3932 | * key violations are reported through a bit in the page fault error code. |
| 3933 | * Unlike other bits of the error code, the PK bit is not known at the |
| 3934 | * call site of e.g. gva_to_gpa; it must be computed directly in |
| 3935 | * permission_fault based on two bits of PKRU, on some machine state (CR4, |
| 3936 | * CR0, EFER, CPL), and on other bits of the error code and the page tables. |
| 3937 | * |
| 3938 | * In particular the following conditions come from the error code, the |
| 3939 | * page tables and the machine state: |
| 3940 | * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1 |
| 3941 | * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch) |
| 3942 | * - PK is always zero if U=0 in the page tables |
| 3943 | * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access. |
| 3944 | * |
| 3945 | * The PKRU bitmask caches the result of these four conditions. The error |
| 3946 | * code (minus the P bit) and the page table's U bit form an index into the |
| 3947 | * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed |
| 3948 | * with the two bits of the PKRU register corresponding to the protection key. |
| 3949 | * For the first three conditions above the bits will be 00, thus masking |
| 3950 | * away both AD and WD. For all reads or if the last condition holds, WD |
| 3951 | * only will be masked away. |
| 3952 | */ |
| 3953 | static void update_pkru_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, |
| 3954 | bool ept) |
| 3955 | { |
| 3956 | unsigned bit; |
| 3957 | bool wp; |
| 3958 | |
| 3959 | if (ept) { |
| 3960 | mmu->pkru_mask = 0; |
| 3961 | return; |
| 3962 | } |
| 3963 | |
| 3964 | /* PKEY is enabled only if CR4.PKE and EFER.LMA are both set. */ |
| 3965 | if (!kvm_read_cr4_bits(vcpu, X86_CR4_PKE) || !is_long_mode(vcpu)) { |
| 3966 | mmu->pkru_mask = 0; |
| 3967 | return; |
| 3968 | } |
| 3969 | |
| 3970 | wp = is_write_protection(vcpu); |
| 3971 | |
| 3972 | for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { |
| 3973 | unsigned pfec, pkey_bits; |
| 3974 | bool check_pkey, check_write, ff, uf, wf, pte_user; |
| 3975 | |
| 3976 | pfec = bit << 1; |
| 3977 | ff = pfec & PFERR_FETCH_MASK; |
| 3978 | uf = pfec & PFERR_USER_MASK; |
| 3979 | wf = pfec & PFERR_WRITE_MASK; |
| 3980 | |
| 3981 | /* PFEC.RSVD is replaced by ACC_USER_MASK. */ |
| 3982 | pte_user = pfec & PFERR_RSVD_MASK; |
| 3983 | |
| 3984 | /* |
| 3985 | * Only need to check the access which is not an |
| 3986 | * instruction fetch and is to a user page. |
| 3987 | */ |
| 3988 | check_pkey = (!ff && pte_user); |
| 3989 | /* |
| 3990 | * write access is controlled by PKRU if it is a |
| 3991 | * user access or CR0.WP = 1. |
| 3992 | */ |
| 3993 | check_write = check_pkey && wf && (uf || wp); |
| 3994 | |
| 3995 | /* PKRU.AD stops both read and write access. */ |
| 3996 | pkey_bits = !!check_pkey; |
| 3997 | /* PKRU.WD stops write access. */ |
| 3998 | pkey_bits |= (!!check_write) << 1; |
| 3999 | |
| 4000 | mmu->pkru_mask |= (pkey_bits & 3) << pfec; |
| 4001 | } |
| 4002 | } |
| 4003 | |
| 4004 | static void update_last_nonleaf_level(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu) |
| 4005 | { |
| 4006 | unsigned root_level = mmu->root_level; |
| 4007 | |
| 4008 | mmu->last_nonleaf_level = root_level; |
| 4009 | if (root_level == PT32_ROOT_LEVEL && is_pse(vcpu)) |
| 4010 | mmu->last_nonleaf_level++; |
| 4011 | } |
| 4012 | |
| 4013 | static void paging64_init_context_common(struct kvm_vcpu *vcpu, |
| 4014 | struct kvm_mmu *context, |
| 4015 | int level) |
| 4016 | { |
| 4017 | context->nx = is_nx(vcpu); |
| 4018 | context->root_level = level; |
| 4019 | |
| 4020 | reset_rsvds_bits_mask(vcpu, context); |
| 4021 | update_permission_bitmask(vcpu, context, false); |
| 4022 | update_pkru_bitmask(vcpu, context, false); |
| 4023 | update_last_nonleaf_level(vcpu, context); |
| 4024 | |
| 4025 | MMU_WARN_ON(!is_pae(vcpu)); |
| 4026 | context->page_fault = paging64_page_fault; |
| 4027 | context->gva_to_gpa = paging64_gva_to_gpa; |
| 4028 | context->sync_page = paging64_sync_page; |
| 4029 | context->invlpg = paging64_invlpg; |
| 4030 | context->update_pte = paging64_update_pte; |
| 4031 | context->shadow_root_level = level; |
| 4032 | context->root_hpa = INVALID_PAGE; |
| 4033 | context->direct_map = false; |
| 4034 | } |
| 4035 | |
| 4036 | static void paging64_init_context(struct kvm_vcpu *vcpu, |
| 4037 | struct kvm_mmu *context) |
| 4038 | { |
| 4039 | paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL); |
| 4040 | } |
| 4041 | |
| 4042 | static void paging32_init_context(struct kvm_vcpu *vcpu, |
| 4043 | struct kvm_mmu *context) |
| 4044 | { |
| 4045 | context->nx = false; |
| 4046 | context->root_level = PT32_ROOT_LEVEL; |
| 4047 | |
| 4048 | reset_rsvds_bits_mask(vcpu, context); |
| 4049 | update_permission_bitmask(vcpu, context, false); |
| 4050 | update_pkru_bitmask(vcpu, context, false); |
| 4051 | update_last_nonleaf_level(vcpu, context); |
| 4052 | |
| 4053 | context->page_fault = paging32_page_fault; |
| 4054 | context->gva_to_gpa = paging32_gva_to_gpa; |
| 4055 | context->sync_page = paging32_sync_page; |
| 4056 | context->invlpg = paging32_invlpg; |
| 4057 | context->update_pte = paging32_update_pte; |
| 4058 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
| 4059 | context->root_hpa = INVALID_PAGE; |
| 4060 | context->direct_map = false; |
| 4061 | } |
| 4062 | |
| 4063 | static void paging32E_init_context(struct kvm_vcpu *vcpu, |
| 4064 | struct kvm_mmu *context) |
| 4065 | { |
| 4066 | paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL); |
| 4067 | } |
| 4068 | |
| 4069 | static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
| 4070 | { |
| 4071 | struct kvm_mmu *context = &vcpu->arch.mmu; |
| 4072 | |
| 4073 | context->base_role.word = 0; |
| 4074 | context->base_role.smm = is_smm(vcpu); |
| 4075 | context->page_fault = tdp_page_fault; |
| 4076 | context->sync_page = nonpaging_sync_page; |
| 4077 | context->invlpg = nonpaging_invlpg; |
| 4078 | context->update_pte = nonpaging_update_pte; |
| 4079 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
| 4080 | context->root_hpa = INVALID_PAGE; |
| 4081 | context->direct_map = true; |
| 4082 | context->set_cr3 = kvm_x86_ops->set_tdp_cr3; |
| 4083 | context->get_cr3 = get_cr3; |
| 4084 | context->get_pdptr = kvm_pdptr_read; |
| 4085 | context->inject_page_fault = kvm_inject_page_fault; |
| 4086 | |
| 4087 | if (!is_paging(vcpu)) { |
| 4088 | context->nx = false; |
| 4089 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
| 4090 | context->root_level = 0; |
| 4091 | } else if (is_long_mode(vcpu)) { |
| 4092 | context->nx = is_nx(vcpu); |
| 4093 | context->root_level = PT64_ROOT_LEVEL; |
| 4094 | reset_rsvds_bits_mask(vcpu, context); |
| 4095 | context->gva_to_gpa = paging64_gva_to_gpa; |
| 4096 | } else if (is_pae(vcpu)) { |
| 4097 | context->nx = is_nx(vcpu); |
| 4098 | context->root_level = PT32E_ROOT_LEVEL; |
| 4099 | reset_rsvds_bits_mask(vcpu, context); |
| 4100 | context->gva_to_gpa = paging64_gva_to_gpa; |
| 4101 | } else { |
| 4102 | context->nx = false; |
| 4103 | context->root_level = PT32_ROOT_LEVEL; |
| 4104 | reset_rsvds_bits_mask(vcpu, context); |
| 4105 | context->gva_to_gpa = paging32_gva_to_gpa; |
| 4106 | } |
| 4107 | |
| 4108 | update_permission_bitmask(vcpu, context, false); |
| 4109 | update_pkru_bitmask(vcpu, context, false); |
| 4110 | update_last_nonleaf_level(vcpu, context); |
| 4111 | reset_tdp_shadow_zero_bits_mask(vcpu, context); |
| 4112 | } |
| 4113 | |
| 4114 | void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu) |
| 4115 | { |
| 4116 | bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP); |
| 4117 | bool smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP); |
| 4118 | struct kvm_mmu *context = &vcpu->arch.mmu; |
| 4119 | |
| 4120 | MMU_WARN_ON(VALID_PAGE(context->root_hpa)); |
| 4121 | |
| 4122 | if (!is_paging(vcpu)) |
| 4123 | nonpaging_init_context(vcpu, context); |
| 4124 | else if (is_long_mode(vcpu)) |
| 4125 | paging64_init_context(vcpu, context); |
| 4126 | else if (is_pae(vcpu)) |
| 4127 | paging32E_init_context(vcpu, context); |
| 4128 | else |
| 4129 | paging32_init_context(vcpu, context); |
| 4130 | |
| 4131 | context->base_role.nxe = is_nx(vcpu); |
| 4132 | context->base_role.cr4_pae = !!is_pae(vcpu); |
| 4133 | context->base_role.cr0_wp = is_write_protection(vcpu); |
| 4134 | context->base_role.smep_andnot_wp |
| 4135 | = smep && !is_write_protection(vcpu); |
| 4136 | context->base_role.smap_andnot_wp |
| 4137 | = smap && !is_write_protection(vcpu); |
| 4138 | context->base_role.smm = is_smm(vcpu); |
| 4139 | reset_shadow_zero_bits_mask(vcpu, context); |
| 4140 | } |
| 4141 | EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu); |
| 4142 | |
| 4143 | void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly) |
| 4144 | { |
| 4145 | struct kvm_mmu *context = &vcpu->arch.mmu; |
| 4146 | |
| 4147 | MMU_WARN_ON(VALID_PAGE(context->root_hpa)); |
| 4148 | |
| 4149 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
| 4150 | |
| 4151 | context->nx = true; |
| 4152 | context->page_fault = ept_page_fault; |
| 4153 | context->gva_to_gpa = ept_gva_to_gpa; |
| 4154 | context->sync_page = ept_sync_page; |
| 4155 | context->invlpg = ept_invlpg; |
| 4156 | context->update_pte = ept_update_pte; |
| 4157 | context->root_level = context->shadow_root_level; |
| 4158 | context->root_hpa = INVALID_PAGE; |
| 4159 | context->direct_map = false; |
| 4160 | |
| 4161 | update_permission_bitmask(vcpu, context, true); |
| 4162 | update_pkru_bitmask(vcpu, context, true); |
| 4163 | reset_rsvds_bits_mask_ept(vcpu, context, execonly); |
| 4164 | reset_ept_shadow_zero_bits_mask(vcpu, context, execonly); |
| 4165 | } |
| 4166 | EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu); |
| 4167 | |
| 4168 | static void init_kvm_softmmu(struct kvm_vcpu *vcpu) |
| 4169 | { |
| 4170 | struct kvm_mmu *context = &vcpu->arch.mmu; |
| 4171 | |
| 4172 | kvm_init_shadow_mmu(vcpu); |
| 4173 | context->set_cr3 = kvm_x86_ops->set_cr3; |
| 4174 | context->get_cr3 = get_cr3; |
| 4175 | context->get_pdptr = kvm_pdptr_read; |
| 4176 | context->inject_page_fault = kvm_inject_page_fault; |
| 4177 | } |
| 4178 | |
| 4179 | static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu) |
| 4180 | { |
| 4181 | struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; |
| 4182 | |
| 4183 | g_context->get_cr3 = get_cr3; |
| 4184 | g_context->get_pdptr = kvm_pdptr_read; |
| 4185 | g_context->inject_page_fault = kvm_inject_page_fault; |
| 4186 | |
| 4187 | /* |
| 4188 | * Note that arch.mmu.gva_to_gpa translates l2_gpa to l1_gpa using |
| 4189 | * L1's nested page tables (e.g. EPT12). The nested translation |
| 4190 | * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using |
| 4191 | * L2's page tables as the first level of translation and L1's |
| 4192 | * nested page tables as the second level of translation. Basically |
| 4193 | * the gva_to_gpa functions between mmu and nested_mmu are swapped. |
| 4194 | */ |
| 4195 | if (!is_paging(vcpu)) { |
| 4196 | g_context->nx = false; |
| 4197 | g_context->root_level = 0; |
| 4198 | g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; |
| 4199 | } else if (is_long_mode(vcpu)) { |
| 4200 | g_context->nx = is_nx(vcpu); |
| 4201 | g_context->root_level = PT64_ROOT_LEVEL; |
| 4202 | reset_rsvds_bits_mask(vcpu, g_context); |
| 4203 | g_context->gva_to_gpa = paging64_gva_to_gpa_nested; |
| 4204 | } else if (is_pae(vcpu)) { |
| 4205 | g_context->nx = is_nx(vcpu); |
| 4206 | g_context->root_level = PT32E_ROOT_LEVEL; |
| 4207 | reset_rsvds_bits_mask(vcpu, g_context); |
| 4208 | g_context->gva_to_gpa = paging64_gva_to_gpa_nested; |
| 4209 | } else { |
| 4210 | g_context->nx = false; |
| 4211 | g_context->root_level = PT32_ROOT_LEVEL; |
| 4212 | reset_rsvds_bits_mask(vcpu, g_context); |
| 4213 | g_context->gva_to_gpa = paging32_gva_to_gpa_nested; |
| 4214 | } |
| 4215 | |
| 4216 | update_permission_bitmask(vcpu, g_context, false); |
| 4217 | update_pkru_bitmask(vcpu, g_context, false); |
| 4218 | update_last_nonleaf_level(vcpu, g_context); |
| 4219 | } |
| 4220 | |
| 4221 | static void init_kvm_mmu(struct kvm_vcpu *vcpu) |
| 4222 | { |
| 4223 | if (mmu_is_nested(vcpu)) |
| 4224 | init_kvm_nested_mmu(vcpu); |
| 4225 | else if (tdp_enabled) |
| 4226 | init_kvm_tdp_mmu(vcpu); |
| 4227 | else |
| 4228 | init_kvm_softmmu(vcpu); |
| 4229 | } |
| 4230 | |
| 4231 | void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) |
| 4232 | { |
| 4233 | kvm_mmu_unload(vcpu); |
| 4234 | init_kvm_mmu(vcpu); |
| 4235 | } |
| 4236 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
| 4237 | |
| 4238 | int kvm_mmu_load(struct kvm_vcpu *vcpu) |
| 4239 | { |
| 4240 | int r; |
| 4241 | |
| 4242 | r = mmu_topup_memory_caches(vcpu); |
| 4243 | if (r) |
| 4244 | goto out; |
| 4245 | r = mmu_alloc_roots(vcpu); |
| 4246 | kvm_mmu_sync_roots(vcpu); |
| 4247 | if (r) |
| 4248 | goto out; |
| 4249 | /* set_cr3() should ensure TLB has been flushed */ |
| 4250 | vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
| 4251 | out: |
| 4252 | return r; |
| 4253 | } |
| 4254 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
| 4255 | |
| 4256 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) |
| 4257 | { |
| 4258 | mmu_free_roots(vcpu); |
| 4259 | WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
| 4260 | } |
| 4261 | EXPORT_SYMBOL_GPL(kvm_mmu_unload); |
| 4262 | |
| 4263 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
| 4264 | struct kvm_mmu_page *sp, u64 *spte, |
| 4265 | const void *new) |
| 4266 | { |
| 4267 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
| 4268 | ++vcpu->kvm->stat.mmu_pde_zapped; |
| 4269 | return; |
| 4270 | } |
| 4271 | |
| 4272 | ++vcpu->kvm->stat.mmu_pte_updated; |
| 4273 | vcpu->arch.mmu.update_pte(vcpu, sp, spte, new); |
| 4274 | } |
| 4275 | |
| 4276 | static bool need_remote_flush(u64 old, u64 new) |
| 4277 | { |
| 4278 | if (!is_shadow_present_pte(old)) |
| 4279 | return false; |
| 4280 | if (!is_shadow_present_pte(new)) |
| 4281 | return true; |
| 4282 | if ((old ^ new) & PT64_BASE_ADDR_MASK) |
| 4283 | return true; |
| 4284 | old ^= shadow_nx_mask; |
| 4285 | new ^= shadow_nx_mask; |
| 4286 | return (old & ~new & PT64_PERM_MASK) != 0; |
| 4287 | } |
| 4288 | |
| 4289 | static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa, |
| 4290 | const u8 *new, int *bytes) |
| 4291 | { |
| 4292 | u64 gentry; |
| 4293 | int r; |
| 4294 | |
| 4295 | /* |
| 4296 | * Assume that the pte write on a page table of the same type |
| 4297 | * as the current vcpu paging mode since we update the sptes only |
| 4298 | * when they have the same mode. |
| 4299 | */ |
| 4300 | if (is_pae(vcpu) && *bytes == 4) { |
| 4301 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ |
| 4302 | *gpa &= ~(gpa_t)7; |
| 4303 | *bytes = 8; |
| 4304 | r = kvm_vcpu_read_guest(vcpu, *gpa, &gentry, 8); |
| 4305 | if (r) |
| 4306 | gentry = 0; |
| 4307 | new = (const u8 *)&gentry; |
| 4308 | } |
| 4309 | |
| 4310 | switch (*bytes) { |
| 4311 | case 4: |
| 4312 | gentry = *(const u32 *)new; |
| 4313 | break; |
| 4314 | case 8: |
| 4315 | gentry = *(const u64 *)new; |
| 4316 | break; |
| 4317 | default: |
| 4318 | gentry = 0; |
| 4319 | break; |
| 4320 | } |
| 4321 | |
| 4322 | return gentry; |
| 4323 | } |
| 4324 | |
| 4325 | /* |
| 4326 | * If we're seeing too many writes to a page, it may no longer be a page table, |
| 4327 | * or we may be forking, in which case it is better to unmap the page. |
| 4328 | */ |
| 4329 | static bool detect_write_flooding(struct kvm_mmu_page *sp) |
| 4330 | { |
| 4331 | /* |
| 4332 | * Skip write-flooding detected for the sp whose level is 1, because |
| 4333 | * it can become unsync, then the guest page is not write-protected. |
| 4334 | */ |
| 4335 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) |
| 4336 | return false; |
| 4337 | |
| 4338 | atomic_inc(&sp->write_flooding_count); |
| 4339 | return atomic_read(&sp->write_flooding_count) >= 3; |
| 4340 | } |
| 4341 | |
| 4342 | /* |
| 4343 | * Misaligned accesses are too much trouble to fix up; also, they usually |
| 4344 | * indicate a page is not used as a page table. |
| 4345 | */ |
| 4346 | static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa, |
| 4347 | int bytes) |
| 4348 | { |
| 4349 | unsigned offset, pte_size, misaligned; |
| 4350 | |
| 4351 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", |
| 4352 | gpa, bytes, sp->role.word); |
| 4353 | |
| 4354 | offset = offset_in_page(gpa); |
| 4355 | pte_size = sp->role.cr4_pae ? 8 : 4; |
| 4356 | |
| 4357 | /* |
| 4358 | * Sometimes, the OS only writes the last one bytes to update status |
| 4359 | * bits, for example, in linux, andb instruction is used in clear_bit(). |
| 4360 | */ |
| 4361 | if (!(offset & (pte_size - 1)) && bytes == 1) |
| 4362 | return false; |
| 4363 | |
| 4364 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
| 4365 | misaligned |= bytes < 4; |
| 4366 | |
| 4367 | return misaligned; |
| 4368 | } |
| 4369 | |
| 4370 | static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte) |
| 4371 | { |
| 4372 | unsigned page_offset, quadrant; |
| 4373 | u64 *spte; |
| 4374 | int level; |
| 4375 | |
| 4376 | page_offset = offset_in_page(gpa); |
| 4377 | level = sp->role.level; |
| 4378 | *nspte = 1; |
| 4379 | if (!sp->role.cr4_pae) { |
| 4380 | page_offset <<= 1; /* 32->64 */ |
| 4381 | /* |
| 4382 | * A 32-bit pde maps 4MB while the shadow pdes map |
| 4383 | * only 2MB. So we need to double the offset again |
| 4384 | * and zap two pdes instead of one. |
| 4385 | */ |
| 4386 | if (level == PT32_ROOT_LEVEL) { |
| 4387 | page_offset &= ~7; /* kill rounding error */ |
| 4388 | page_offset <<= 1; |
| 4389 | *nspte = 2; |
| 4390 | } |
| 4391 | quadrant = page_offset >> PAGE_SHIFT; |
| 4392 | page_offset &= ~PAGE_MASK; |
| 4393 | if (quadrant != sp->role.quadrant) |
| 4394 | return NULL; |
| 4395 | } |
| 4396 | |
| 4397 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
| 4398 | return spte; |
| 4399 | } |
| 4400 | |
| 4401 | static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
| 4402 | const u8 *new, int bytes) |
| 4403 | { |
| 4404 | gfn_t gfn = gpa >> PAGE_SHIFT; |
| 4405 | struct kvm_mmu_page *sp; |
| 4406 | LIST_HEAD(invalid_list); |
| 4407 | u64 entry, gentry, *spte; |
| 4408 | int npte; |
| 4409 | bool remote_flush, local_flush; |
| 4410 | union kvm_mmu_page_role mask = { }; |
| 4411 | |
| 4412 | mask.cr0_wp = 1; |
| 4413 | mask.cr4_pae = 1; |
| 4414 | mask.nxe = 1; |
| 4415 | mask.smep_andnot_wp = 1; |
| 4416 | mask.smap_andnot_wp = 1; |
| 4417 | mask.smm = 1; |
| 4418 | |
| 4419 | /* |
| 4420 | * If we don't have indirect shadow pages, it means no page is |
| 4421 | * write-protected, so we can exit simply. |
| 4422 | */ |
| 4423 | if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) |
| 4424 | return; |
| 4425 | |
| 4426 | remote_flush = local_flush = false; |
| 4427 | |
| 4428 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
| 4429 | |
| 4430 | gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes); |
| 4431 | |
| 4432 | /* |
| 4433 | * No need to care whether allocation memory is successful |
| 4434 | * or not since pte prefetch is skiped if it does not have |
| 4435 | * enough objects in the cache. |
| 4436 | */ |
| 4437 | mmu_topup_memory_caches(vcpu); |
| 4438 | |
| 4439 | spin_lock(&vcpu->kvm->mmu_lock); |
| 4440 | ++vcpu->kvm->stat.mmu_pte_write; |
| 4441 | kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE); |
| 4442 | |
| 4443 | for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) { |
| 4444 | if (detect_write_misaligned(sp, gpa, bytes) || |
| 4445 | detect_write_flooding(sp)) { |
| 4446 | kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); |
| 4447 | ++vcpu->kvm->stat.mmu_flooded; |
| 4448 | continue; |
| 4449 | } |
| 4450 | |
| 4451 | spte = get_written_sptes(sp, gpa, &npte); |
| 4452 | if (!spte) |
| 4453 | continue; |
| 4454 | |
| 4455 | local_flush = true; |
| 4456 | while (npte--) { |
| 4457 | entry = *spte; |
| 4458 | mmu_page_zap_pte(vcpu->kvm, sp, spte); |
| 4459 | if (gentry && |
| 4460 | !((sp->role.word ^ vcpu->arch.mmu.base_role.word) |
| 4461 | & mask.word) && rmap_can_add(vcpu)) |
| 4462 | mmu_pte_write_new_pte(vcpu, sp, spte, &gentry); |
| 4463 | if (need_remote_flush(entry, *spte)) |
| 4464 | remote_flush = true; |
| 4465 | ++spte; |
| 4466 | } |
| 4467 | } |
| 4468 | kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush); |
| 4469 | kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE); |
| 4470 | spin_unlock(&vcpu->kvm->mmu_lock); |
| 4471 | } |
| 4472 | |
| 4473 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
| 4474 | { |
| 4475 | gpa_t gpa; |
| 4476 | int r; |
| 4477 | |
| 4478 | if (vcpu->arch.mmu.direct_map) |
| 4479 | return 0; |
| 4480 | |
| 4481 | gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); |
| 4482 | |
| 4483 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
| 4484 | |
| 4485 | return r; |
| 4486 | } |
| 4487 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
| 4488 | |
| 4489 | static void make_mmu_pages_available(struct kvm_vcpu *vcpu) |
| 4490 | { |
| 4491 | LIST_HEAD(invalid_list); |
| 4492 | |
| 4493 | if (likely(kvm_mmu_available_pages(vcpu->kvm) >= KVM_MIN_FREE_MMU_PAGES)) |
| 4494 | return; |
| 4495 | |
| 4496 | while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES) { |
| 4497 | if (!prepare_zap_oldest_mmu_page(vcpu->kvm, &invalid_list)) |
| 4498 | break; |
| 4499 | |
| 4500 | ++vcpu->kvm->stat.mmu_recycled; |
| 4501 | } |
| 4502 | kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list); |
| 4503 | } |
| 4504 | |
| 4505 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code, |
| 4506 | void *insn, int insn_len) |
| 4507 | { |
| 4508 | int r, emulation_type = EMULTYPE_RETRY; |
| 4509 | enum emulation_result er; |
| 4510 | bool direct = vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu); |
| 4511 | |
| 4512 | if (unlikely(error_code & PFERR_RSVD_MASK)) { |
| 4513 | r = handle_mmio_page_fault(vcpu, cr2, direct); |
| 4514 | if (r == RET_MMIO_PF_EMULATE) { |
| 4515 | emulation_type = 0; |
| 4516 | goto emulate; |
| 4517 | } |
| 4518 | if (r == RET_MMIO_PF_RETRY) |
| 4519 | return 1; |
| 4520 | if (r < 0) |
| 4521 | return r; |
| 4522 | } |
| 4523 | |
| 4524 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false); |
| 4525 | if (r < 0) |
| 4526 | return r; |
| 4527 | if (!r) |
| 4528 | return 1; |
| 4529 | |
| 4530 | if (mmio_info_in_cache(vcpu, cr2, direct)) |
| 4531 | emulation_type = 0; |
| 4532 | emulate: |
| 4533 | er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len); |
| 4534 | |
| 4535 | switch (er) { |
| 4536 | case EMULATE_DONE: |
| 4537 | return 1; |
| 4538 | case EMULATE_USER_EXIT: |
| 4539 | ++vcpu->stat.mmio_exits; |
| 4540 | /* fall through */ |
| 4541 | case EMULATE_FAIL: |
| 4542 | return 0; |
| 4543 | default: |
| 4544 | BUG(); |
| 4545 | } |
| 4546 | } |
| 4547 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); |
| 4548 | |
| 4549 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
| 4550 | { |
| 4551 | vcpu->arch.mmu.invlpg(vcpu, gva); |
| 4552 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
| 4553 | ++vcpu->stat.invlpg; |
| 4554 | } |
| 4555 | EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); |
| 4556 | |
| 4557 | void kvm_enable_tdp(void) |
| 4558 | { |
| 4559 | tdp_enabled = true; |
| 4560 | } |
| 4561 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); |
| 4562 | |
| 4563 | void kvm_disable_tdp(void) |
| 4564 | { |
| 4565 | tdp_enabled = false; |
| 4566 | } |
| 4567 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); |
| 4568 | |
| 4569 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
| 4570 | { |
| 4571 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
| 4572 | if (vcpu->arch.mmu.lm_root != NULL) |
| 4573 | free_page((unsigned long)vcpu->arch.mmu.lm_root); |
| 4574 | } |
| 4575 | |
| 4576 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) |
| 4577 | { |
| 4578 | struct page *page; |
| 4579 | int i; |
| 4580 | |
| 4581 | /* |
| 4582 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. |
| 4583 | * Therefore we need to allocate shadow page tables in the first |
| 4584 | * 4GB of memory, which happens to fit the DMA32 zone. |
| 4585 | */ |
| 4586 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); |
| 4587 | if (!page) |
| 4588 | return -ENOMEM; |
| 4589 | |
| 4590 | vcpu->arch.mmu.pae_root = page_address(page); |
| 4591 | for (i = 0; i < 4; ++i) |
| 4592 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
| 4593 | |
| 4594 | return 0; |
| 4595 | } |
| 4596 | |
| 4597 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
| 4598 | { |
| 4599 | vcpu->arch.walk_mmu = &vcpu->arch.mmu; |
| 4600 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
| 4601 | vcpu->arch.mmu.translate_gpa = translate_gpa; |
| 4602 | vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; |
| 4603 | |
| 4604 | return alloc_mmu_pages(vcpu); |
| 4605 | } |
| 4606 | |
| 4607 | void kvm_mmu_setup(struct kvm_vcpu *vcpu) |
| 4608 | { |
| 4609 | MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
| 4610 | |
| 4611 | init_kvm_mmu(vcpu); |
| 4612 | } |
| 4613 | |
| 4614 | void kvm_mmu_init_vm(struct kvm *kvm) |
| 4615 | { |
| 4616 | struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; |
| 4617 | |
| 4618 | node->track_write = kvm_mmu_pte_write; |
| 4619 | kvm_page_track_register_notifier(kvm, node); |
| 4620 | } |
| 4621 | |
| 4622 | void kvm_mmu_uninit_vm(struct kvm *kvm) |
| 4623 | { |
| 4624 | struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker; |
| 4625 | |
| 4626 | kvm_page_track_unregister_notifier(kvm, node); |
| 4627 | } |
| 4628 | |
| 4629 | /* The return value indicates if tlb flush on all vcpus is needed. */ |
| 4630 | typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head); |
| 4631 | |
| 4632 | /* The caller should hold mmu-lock before calling this function. */ |
| 4633 | static bool |
| 4634 | slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot, |
| 4635 | slot_level_handler fn, int start_level, int end_level, |
| 4636 | gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb) |
| 4637 | { |
| 4638 | struct slot_rmap_walk_iterator iterator; |
| 4639 | bool flush = false; |
| 4640 | |
| 4641 | for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn, |
| 4642 | end_gfn, &iterator) { |
| 4643 | if (iterator.rmap) |
| 4644 | flush |= fn(kvm, iterator.rmap); |
| 4645 | |
| 4646 | if (need_resched() || spin_needbreak(&kvm->mmu_lock)) { |
| 4647 | if (flush && lock_flush_tlb) { |
| 4648 | kvm_flush_remote_tlbs(kvm); |
| 4649 | flush = false; |
| 4650 | } |
| 4651 | cond_resched_lock(&kvm->mmu_lock); |
| 4652 | } |
| 4653 | } |
| 4654 | |
| 4655 | if (flush && lock_flush_tlb) { |
| 4656 | kvm_flush_remote_tlbs(kvm); |
| 4657 | flush = false; |
| 4658 | } |
| 4659 | |
| 4660 | return flush; |
| 4661 | } |
| 4662 | |
| 4663 | static bool |
| 4664 | slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot, |
| 4665 | slot_level_handler fn, int start_level, int end_level, |
| 4666 | bool lock_flush_tlb) |
| 4667 | { |
| 4668 | return slot_handle_level_range(kvm, memslot, fn, start_level, |
| 4669 | end_level, memslot->base_gfn, |
| 4670 | memslot->base_gfn + memslot->npages - 1, |
| 4671 | lock_flush_tlb); |
| 4672 | } |
| 4673 | |
| 4674 | static bool |
| 4675 | slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot, |
| 4676 | slot_level_handler fn, bool lock_flush_tlb) |
| 4677 | { |
| 4678 | return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL, |
| 4679 | PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); |
| 4680 | } |
| 4681 | |
| 4682 | static bool |
| 4683 | slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot, |
| 4684 | slot_level_handler fn, bool lock_flush_tlb) |
| 4685 | { |
| 4686 | return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL + 1, |
| 4687 | PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb); |
| 4688 | } |
| 4689 | |
| 4690 | static bool |
| 4691 | slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot, |
| 4692 | slot_level_handler fn, bool lock_flush_tlb) |
| 4693 | { |
| 4694 | return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL, |
| 4695 | PT_PAGE_TABLE_LEVEL, lock_flush_tlb); |
| 4696 | } |
| 4697 | |
| 4698 | void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end) |
| 4699 | { |
| 4700 | struct kvm_memslots *slots; |
| 4701 | struct kvm_memory_slot *memslot; |
| 4702 | int i; |
| 4703 | |
| 4704 | spin_lock(&kvm->mmu_lock); |
| 4705 | for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { |
| 4706 | slots = __kvm_memslots(kvm, i); |
| 4707 | kvm_for_each_memslot(memslot, slots) { |
| 4708 | gfn_t start, end; |
| 4709 | |
| 4710 | start = max(gfn_start, memslot->base_gfn); |
| 4711 | end = min(gfn_end, memslot->base_gfn + memslot->npages); |
| 4712 | if (start >= end) |
| 4713 | continue; |
| 4714 | |
| 4715 | slot_handle_level_range(kvm, memslot, kvm_zap_rmapp, |
| 4716 | PT_PAGE_TABLE_LEVEL, PT_MAX_HUGEPAGE_LEVEL, |
| 4717 | start, end - 1, true); |
| 4718 | } |
| 4719 | } |
| 4720 | |
| 4721 | spin_unlock(&kvm->mmu_lock); |
| 4722 | } |
| 4723 | |
| 4724 | static bool slot_rmap_write_protect(struct kvm *kvm, |
| 4725 | struct kvm_rmap_head *rmap_head) |
| 4726 | { |
| 4727 | return __rmap_write_protect(kvm, rmap_head, false); |
| 4728 | } |
| 4729 | |
| 4730 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, |
| 4731 | struct kvm_memory_slot *memslot) |
| 4732 | { |
| 4733 | bool flush; |
| 4734 | |
| 4735 | spin_lock(&kvm->mmu_lock); |
| 4736 | flush = slot_handle_all_level(kvm, memslot, slot_rmap_write_protect, |
| 4737 | false); |
| 4738 | spin_unlock(&kvm->mmu_lock); |
| 4739 | |
| 4740 | /* |
| 4741 | * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log() |
| 4742 | * which do tlb flush out of mmu-lock should be serialized by |
| 4743 | * kvm->slots_lock otherwise tlb flush would be missed. |
| 4744 | */ |
| 4745 | lockdep_assert_held(&kvm->slots_lock); |
| 4746 | |
| 4747 | /* |
| 4748 | * We can flush all the TLBs out of the mmu lock without TLB |
| 4749 | * corruption since we just change the spte from writable to |
| 4750 | * readonly so that we only need to care the case of changing |
| 4751 | * spte from present to present (changing the spte from present |
| 4752 | * to nonpresent will flush all the TLBs immediately), in other |
| 4753 | * words, the only case we care is mmu_spte_update() where we |
| 4754 | * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE |
| 4755 | * instead of PT_WRITABLE_MASK, that means it does not depend |
| 4756 | * on PT_WRITABLE_MASK anymore. |
| 4757 | */ |
| 4758 | if (flush) |
| 4759 | kvm_flush_remote_tlbs(kvm); |
| 4760 | } |
| 4761 | |
| 4762 | static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm, |
| 4763 | struct kvm_rmap_head *rmap_head) |
| 4764 | { |
| 4765 | u64 *sptep; |
| 4766 | struct rmap_iterator iter; |
| 4767 | int need_tlb_flush = 0; |
| 4768 | kvm_pfn_t pfn; |
| 4769 | struct kvm_mmu_page *sp; |
| 4770 | |
| 4771 | restart: |
| 4772 | for_each_rmap_spte(rmap_head, &iter, sptep) { |
| 4773 | sp = page_header(__pa(sptep)); |
| 4774 | pfn = spte_to_pfn(*sptep); |
| 4775 | |
| 4776 | /* |
| 4777 | * We cannot do huge page mapping for indirect shadow pages, |
| 4778 | * which are found on the last rmap (level = 1) when not using |
| 4779 | * tdp; such shadow pages are synced with the page table in |
| 4780 | * the guest, and the guest page table is using 4K page size |
| 4781 | * mapping if the indirect sp has level = 1. |
| 4782 | */ |
| 4783 | if (sp->role.direct && |
| 4784 | !kvm_is_reserved_pfn(pfn) && |
| 4785 | PageTransCompoundMap(pfn_to_page(pfn))) { |
| 4786 | drop_spte(kvm, sptep); |
| 4787 | need_tlb_flush = 1; |
| 4788 | goto restart; |
| 4789 | } |
| 4790 | } |
| 4791 | |
| 4792 | return need_tlb_flush; |
| 4793 | } |
| 4794 | |
| 4795 | void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, |
| 4796 | const struct kvm_memory_slot *memslot) |
| 4797 | { |
| 4798 | /* FIXME: const-ify all uses of struct kvm_memory_slot. */ |
| 4799 | spin_lock(&kvm->mmu_lock); |
| 4800 | slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot, |
| 4801 | kvm_mmu_zap_collapsible_spte, true); |
| 4802 | spin_unlock(&kvm->mmu_lock); |
| 4803 | } |
| 4804 | |
| 4805 | void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, |
| 4806 | struct kvm_memory_slot *memslot) |
| 4807 | { |
| 4808 | bool flush; |
| 4809 | |
| 4810 | spin_lock(&kvm->mmu_lock); |
| 4811 | flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false); |
| 4812 | spin_unlock(&kvm->mmu_lock); |
| 4813 | |
| 4814 | lockdep_assert_held(&kvm->slots_lock); |
| 4815 | |
| 4816 | /* |
| 4817 | * It's also safe to flush TLBs out of mmu lock here as currently this |
| 4818 | * function is only used for dirty logging, in which case flushing TLB |
| 4819 | * out of mmu lock also guarantees no dirty pages will be lost in |
| 4820 | * dirty_bitmap. |
| 4821 | */ |
| 4822 | if (flush) |
| 4823 | kvm_flush_remote_tlbs(kvm); |
| 4824 | } |
| 4825 | EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty); |
| 4826 | |
| 4827 | void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, |
| 4828 | struct kvm_memory_slot *memslot) |
| 4829 | { |
| 4830 | bool flush; |
| 4831 | |
| 4832 | spin_lock(&kvm->mmu_lock); |
| 4833 | flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect, |
| 4834 | false); |
| 4835 | spin_unlock(&kvm->mmu_lock); |
| 4836 | |
| 4837 | /* see kvm_mmu_slot_remove_write_access */ |
| 4838 | lockdep_assert_held(&kvm->slots_lock); |
| 4839 | |
| 4840 | if (flush) |
| 4841 | kvm_flush_remote_tlbs(kvm); |
| 4842 | } |
| 4843 | EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access); |
| 4844 | |
| 4845 | void kvm_mmu_slot_set_dirty(struct kvm *kvm, |
| 4846 | struct kvm_memory_slot *memslot) |
| 4847 | { |
| 4848 | bool flush; |
| 4849 | |
| 4850 | spin_lock(&kvm->mmu_lock); |
| 4851 | flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false); |
| 4852 | spin_unlock(&kvm->mmu_lock); |
| 4853 | |
| 4854 | lockdep_assert_held(&kvm->slots_lock); |
| 4855 | |
| 4856 | /* see kvm_mmu_slot_leaf_clear_dirty */ |
| 4857 | if (flush) |
| 4858 | kvm_flush_remote_tlbs(kvm); |
| 4859 | } |
| 4860 | EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty); |
| 4861 | |
| 4862 | #define BATCH_ZAP_PAGES 10 |
| 4863 | static void kvm_zap_obsolete_pages(struct kvm *kvm) |
| 4864 | { |
| 4865 | struct kvm_mmu_page *sp, *node; |
| 4866 | int batch = 0; |
| 4867 | |
| 4868 | restart: |
| 4869 | list_for_each_entry_safe_reverse(sp, node, |
| 4870 | &kvm->arch.active_mmu_pages, link) { |
| 4871 | int ret; |
| 4872 | |
| 4873 | /* |
| 4874 | * No obsolete page exists before new created page since |
| 4875 | * active_mmu_pages is the FIFO list. |
| 4876 | */ |
| 4877 | if (!is_obsolete_sp(kvm, sp)) |
| 4878 | break; |
| 4879 | |
| 4880 | /* |
| 4881 | * Since we are reversely walking the list and the invalid |
| 4882 | * list will be moved to the head, skip the invalid page |
| 4883 | * can help us to avoid the infinity list walking. |
| 4884 | */ |
| 4885 | if (sp->role.invalid) |
| 4886 | continue; |
| 4887 | |
| 4888 | /* |
| 4889 | * Need not flush tlb since we only zap the sp with invalid |
| 4890 | * generation number. |
| 4891 | */ |
| 4892 | if (batch >= BATCH_ZAP_PAGES && |
| 4893 | cond_resched_lock(&kvm->mmu_lock)) { |
| 4894 | batch = 0; |
| 4895 | goto restart; |
| 4896 | } |
| 4897 | |
| 4898 | ret = kvm_mmu_prepare_zap_page(kvm, sp, |
| 4899 | &kvm->arch.zapped_obsolete_pages); |
| 4900 | batch += ret; |
| 4901 | |
| 4902 | if (ret) |
| 4903 | goto restart; |
| 4904 | } |
| 4905 | |
| 4906 | /* |
| 4907 | * Should flush tlb before free page tables since lockless-walking |
| 4908 | * may use the pages. |
| 4909 | */ |
| 4910 | kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); |
| 4911 | } |
| 4912 | |
| 4913 | /* |
| 4914 | * Fast invalidate all shadow pages and use lock-break technique |
| 4915 | * to zap obsolete pages. |
| 4916 | * |
| 4917 | * It's required when memslot is being deleted or VM is being |
| 4918 | * destroyed, in these cases, we should ensure that KVM MMU does |
| 4919 | * not use any resource of the being-deleted slot or all slots |
| 4920 | * after calling the function. |
| 4921 | */ |
| 4922 | void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm) |
| 4923 | { |
| 4924 | spin_lock(&kvm->mmu_lock); |
| 4925 | trace_kvm_mmu_invalidate_zap_all_pages(kvm); |
| 4926 | kvm->arch.mmu_valid_gen++; |
| 4927 | |
| 4928 | /* |
| 4929 | * Notify all vcpus to reload its shadow page table |
| 4930 | * and flush TLB. Then all vcpus will switch to new |
| 4931 | * shadow page table with the new mmu_valid_gen. |
| 4932 | * |
| 4933 | * Note: we should do this under the protection of |
| 4934 | * mmu-lock, otherwise, vcpu would purge shadow page |
| 4935 | * but miss tlb flush. |
| 4936 | */ |
| 4937 | kvm_reload_remote_mmus(kvm); |
| 4938 | |
| 4939 | kvm_zap_obsolete_pages(kvm); |
| 4940 | spin_unlock(&kvm->mmu_lock); |
| 4941 | } |
| 4942 | |
| 4943 | static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm) |
| 4944 | { |
| 4945 | return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); |
| 4946 | } |
| 4947 | |
| 4948 | void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots) |
| 4949 | { |
| 4950 | /* |
| 4951 | * The very rare case: if the generation-number is round, |
| 4952 | * zap all shadow pages. |
| 4953 | */ |
| 4954 | if (unlikely((slots->generation & MMIO_GEN_MASK) == 0)) { |
| 4955 | printk_ratelimited(KERN_DEBUG "kvm: zapping shadow pages for mmio generation wraparound\n"); |
| 4956 | kvm_mmu_invalidate_zap_all_pages(kvm); |
| 4957 | } |
| 4958 | } |
| 4959 | |
| 4960 | static unsigned long |
| 4961 | mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) |
| 4962 | { |
| 4963 | struct kvm *kvm; |
| 4964 | int nr_to_scan = sc->nr_to_scan; |
| 4965 | unsigned long freed = 0; |
| 4966 | |
| 4967 | spin_lock(&kvm_lock); |
| 4968 | |
| 4969 | list_for_each_entry(kvm, &vm_list, vm_list) { |
| 4970 | int idx; |
| 4971 | LIST_HEAD(invalid_list); |
| 4972 | |
| 4973 | /* |
| 4974 | * Never scan more than sc->nr_to_scan VM instances. |
| 4975 | * Will not hit this condition practically since we do not try |
| 4976 | * to shrink more than one VM and it is very unlikely to see |
| 4977 | * !n_used_mmu_pages so many times. |
| 4978 | */ |
| 4979 | if (!nr_to_scan--) |
| 4980 | break; |
| 4981 | /* |
| 4982 | * n_used_mmu_pages is accessed without holding kvm->mmu_lock |
| 4983 | * here. We may skip a VM instance errorneosly, but we do not |
| 4984 | * want to shrink a VM that only started to populate its MMU |
| 4985 | * anyway. |
| 4986 | */ |
| 4987 | if (!kvm->arch.n_used_mmu_pages && |
| 4988 | !kvm_has_zapped_obsolete_pages(kvm)) |
| 4989 | continue; |
| 4990 | |
| 4991 | idx = srcu_read_lock(&kvm->srcu); |
| 4992 | spin_lock(&kvm->mmu_lock); |
| 4993 | |
| 4994 | if (kvm_has_zapped_obsolete_pages(kvm)) { |
| 4995 | kvm_mmu_commit_zap_page(kvm, |
| 4996 | &kvm->arch.zapped_obsolete_pages); |
| 4997 | goto unlock; |
| 4998 | } |
| 4999 | |
| 5000 | if (prepare_zap_oldest_mmu_page(kvm, &invalid_list)) |
| 5001 | freed++; |
| 5002 | kvm_mmu_commit_zap_page(kvm, &invalid_list); |
| 5003 | |
| 5004 | unlock: |
| 5005 | spin_unlock(&kvm->mmu_lock); |
| 5006 | srcu_read_unlock(&kvm->srcu, idx); |
| 5007 | |
| 5008 | /* |
| 5009 | * unfair on small ones |
| 5010 | * per-vm shrinkers cry out |
| 5011 | * sadness comes quickly |
| 5012 | */ |
| 5013 | list_move_tail(&kvm->vm_list, &vm_list); |
| 5014 | break; |
| 5015 | } |
| 5016 | |
| 5017 | spin_unlock(&kvm_lock); |
| 5018 | return freed; |
| 5019 | } |
| 5020 | |
| 5021 | static unsigned long |
| 5022 | mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc) |
| 5023 | { |
| 5024 | return percpu_counter_read_positive(&kvm_total_used_mmu_pages); |
| 5025 | } |
| 5026 | |
| 5027 | static struct shrinker mmu_shrinker = { |
| 5028 | .count_objects = mmu_shrink_count, |
| 5029 | .scan_objects = mmu_shrink_scan, |
| 5030 | .seeks = DEFAULT_SEEKS * 10, |
| 5031 | }; |
| 5032 | |
| 5033 | static void mmu_destroy_caches(void) |
| 5034 | { |
| 5035 | if (pte_list_desc_cache) |
| 5036 | kmem_cache_destroy(pte_list_desc_cache); |
| 5037 | if (mmu_page_header_cache) |
| 5038 | kmem_cache_destroy(mmu_page_header_cache); |
| 5039 | } |
| 5040 | |
| 5041 | int kvm_mmu_module_init(void) |
| 5042 | { |
| 5043 | pte_list_desc_cache = kmem_cache_create("pte_list_desc", |
| 5044 | sizeof(struct pte_list_desc), |
| 5045 | 0, 0, NULL); |
| 5046 | if (!pte_list_desc_cache) |
| 5047 | goto nomem; |
| 5048 | |
| 5049 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
| 5050 | sizeof(struct kvm_mmu_page), |
| 5051 | 0, 0, NULL); |
| 5052 | if (!mmu_page_header_cache) |
| 5053 | goto nomem; |
| 5054 | |
| 5055 | if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL)) |
| 5056 | goto nomem; |
| 5057 | |
| 5058 | register_shrinker(&mmu_shrinker); |
| 5059 | |
| 5060 | return 0; |
| 5061 | |
| 5062 | nomem: |
| 5063 | mmu_destroy_caches(); |
| 5064 | return -ENOMEM; |
| 5065 | } |
| 5066 | |
| 5067 | /* |
| 5068 | * Caculate mmu pages needed for kvm. |
| 5069 | */ |
| 5070 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) |
| 5071 | { |
| 5072 | unsigned int nr_mmu_pages; |
| 5073 | unsigned int nr_pages = 0; |
| 5074 | struct kvm_memslots *slots; |
| 5075 | struct kvm_memory_slot *memslot; |
| 5076 | int i; |
| 5077 | |
| 5078 | for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { |
| 5079 | slots = __kvm_memslots(kvm, i); |
| 5080 | |
| 5081 | kvm_for_each_memslot(memslot, slots) |
| 5082 | nr_pages += memslot->npages; |
| 5083 | } |
| 5084 | |
| 5085 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; |
| 5086 | nr_mmu_pages = max(nr_mmu_pages, |
| 5087 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); |
| 5088 | |
| 5089 | return nr_mmu_pages; |
| 5090 | } |
| 5091 | |
| 5092 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) |
| 5093 | { |
| 5094 | kvm_mmu_unload(vcpu); |
| 5095 | free_mmu_pages(vcpu); |
| 5096 | mmu_free_memory_caches(vcpu); |
| 5097 | } |
| 5098 | |
| 5099 | void kvm_mmu_module_exit(void) |
| 5100 | { |
| 5101 | mmu_destroy_caches(); |
| 5102 | percpu_counter_destroy(&kvm_total_used_mmu_pages); |
| 5103 | unregister_shrinker(&mmu_shrinker); |
| 5104 | mmu_audit_disable(); |
| 5105 | } |