| 1 | /* 32-bit ELF support for ARM |
| 2 | Copyright (C) 1998-2019 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of BFD, the Binary File Descriptor library. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 19 | MA 02110-1301, USA. */ |
| 20 | |
| 21 | #include "sysdep.h" |
| 22 | #include <limits.h> |
| 23 | |
| 24 | #include "bfd.h" |
| 25 | #include "libiberty.h" |
| 26 | #include "libbfd.h" |
| 27 | #include "elf-bfd.h" |
| 28 | #include "elf-nacl.h" |
| 29 | #include "elf-vxworks.h" |
| 30 | #include "elf/arm.h" |
| 31 | |
| 32 | /* Return the relocation section associated with NAME. HTAB is the |
| 33 | bfd's elf32_arm_link_hash_entry. */ |
| 34 | #define RELOC_SECTION(HTAB, NAME) \ |
| 35 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) |
| 36 | |
| 37 | /* Return size of a relocation entry. HTAB is the bfd's |
| 38 | elf32_arm_link_hash_entry. */ |
| 39 | #define RELOC_SIZE(HTAB) \ |
| 40 | ((HTAB)->use_rel \ |
| 41 | ? sizeof (Elf32_External_Rel) \ |
| 42 | : sizeof (Elf32_External_Rela)) |
| 43 | |
| 44 | /* Return function to swap relocations in. HTAB is the bfd's |
| 45 | elf32_arm_link_hash_entry. */ |
| 46 | #define SWAP_RELOC_IN(HTAB) \ |
| 47 | ((HTAB)->use_rel \ |
| 48 | ? bfd_elf32_swap_reloc_in \ |
| 49 | : bfd_elf32_swap_reloca_in) |
| 50 | |
| 51 | /* Return function to swap relocations out. HTAB is the bfd's |
| 52 | elf32_arm_link_hash_entry. */ |
| 53 | #define SWAP_RELOC_OUT(HTAB) \ |
| 54 | ((HTAB)->use_rel \ |
| 55 | ? bfd_elf32_swap_reloc_out \ |
| 56 | : bfd_elf32_swap_reloca_out) |
| 57 | |
| 58 | #define elf_info_to_howto NULL |
| 59 | #define elf_info_to_howto_rel elf32_arm_info_to_howto |
| 60 | |
| 61 | #define ARM_ELF_ABI_VERSION 0 |
| 62 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM |
| 63 | |
| 64 | /* The Adjusted Place, as defined by AAELF. */ |
| 65 | #define Pa(X) ((X) & 0xfffffffc) |
| 66 | |
| 67 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
| 68 | struct bfd_link_info *link_info, |
| 69 | asection *sec, |
| 70 | bfd_byte *contents); |
| 71 | |
| 72 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
| 73 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO |
| 74 | in that slot. */ |
| 75 | |
| 76 | static reloc_howto_type elf32_arm_howto_table_1[] = |
| 77 | { |
| 78 | /* No relocation. */ |
| 79 | HOWTO (R_ARM_NONE, /* type */ |
| 80 | 0, /* rightshift */ |
| 81 | 3, /* size (0 = byte, 1 = short, 2 = long) */ |
| 82 | 0, /* bitsize */ |
| 83 | FALSE, /* pc_relative */ |
| 84 | 0, /* bitpos */ |
| 85 | complain_overflow_dont,/* complain_on_overflow */ |
| 86 | bfd_elf_generic_reloc, /* special_function */ |
| 87 | "R_ARM_NONE", /* name */ |
| 88 | FALSE, /* partial_inplace */ |
| 89 | 0, /* src_mask */ |
| 90 | 0, /* dst_mask */ |
| 91 | FALSE), /* pcrel_offset */ |
| 92 | |
| 93 | HOWTO (R_ARM_PC24, /* type */ |
| 94 | 2, /* rightshift */ |
| 95 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 96 | 24, /* bitsize */ |
| 97 | TRUE, /* pc_relative */ |
| 98 | 0, /* bitpos */ |
| 99 | complain_overflow_signed,/* complain_on_overflow */ |
| 100 | bfd_elf_generic_reloc, /* special_function */ |
| 101 | "R_ARM_PC24", /* name */ |
| 102 | FALSE, /* partial_inplace */ |
| 103 | 0x00ffffff, /* src_mask */ |
| 104 | 0x00ffffff, /* dst_mask */ |
| 105 | TRUE), /* pcrel_offset */ |
| 106 | |
| 107 | /* 32 bit absolute */ |
| 108 | HOWTO (R_ARM_ABS32, /* type */ |
| 109 | 0, /* rightshift */ |
| 110 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 111 | 32, /* bitsize */ |
| 112 | FALSE, /* pc_relative */ |
| 113 | 0, /* bitpos */ |
| 114 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 115 | bfd_elf_generic_reloc, /* special_function */ |
| 116 | "R_ARM_ABS32", /* name */ |
| 117 | FALSE, /* partial_inplace */ |
| 118 | 0xffffffff, /* src_mask */ |
| 119 | 0xffffffff, /* dst_mask */ |
| 120 | FALSE), /* pcrel_offset */ |
| 121 | |
| 122 | /* standard 32bit pc-relative reloc */ |
| 123 | HOWTO (R_ARM_REL32, /* type */ |
| 124 | 0, /* rightshift */ |
| 125 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 126 | 32, /* bitsize */ |
| 127 | TRUE, /* pc_relative */ |
| 128 | 0, /* bitpos */ |
| 129 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 130 | bfd_elf_generic_reloc, /* special_function */ |
| 131 | "R_ARM_REL32", /* name */ |
| 132 | FALSE, /* partial_inplace */ |
| 133 | 0xffffffff, /* src_mask */ |
| 134 | 0xffffffff, /* dst_mask */ |
| 135 | TRUE), /* pcrel_offset */ |
| 136 | |
| 137 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
| 138 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
| 139 | 0, /* rightshift */ |
| 140 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 141 | 32, /* bitsize */ |
| 142 | TRUE, /* pc_relative */ |
| 143 | 0, /* bitpos */ |
| 144 | complain_overflow_dont,/* complain_on_overflow */ |
| 145 | bfd_elf_generic_reloc, /* special_function */ |
| 146 | "R_ARM_LDR_PC_G0", /* name */ |
| 147 | FALSE, /* partial_inplace */ |
| 148 | 0xffffffff, /* src_mask */ |
| 149 | 0xffffffff, /* dst_mask */ |
| 150 | TRUE), /* pcrel_offset */ |
| 151 | |
| 152 | /* 16 bit absolute */ |
| 153 | HOWTO (R_ARM_ABS16, /* type */ |
| 154 | 0, /* rightshift */ |
| 155 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 156 | 16, /* bitsize */ |
| 157 | FALSE, /* pc_relative */ |
| 158 | 0, /* bitpos */ |
| 159 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 160 | bfd_elf_generic_reloc, /* special_function */ |
| 161 | "R_ARM_ABS16", /* name */ |
| 162 | FALSE, /* partial_inplace */ |
| 163 | 0x0000ffff, /* src_mask */ |
| 164 | 0x0000ffff, /* dst_mask */ |
| 165 | FALSE), /* pcrel_offset */ |
| 166 | |
| 167 | /* 12 bit absolute */ |
| 168 | HOWTO (R_ARM_ABS12, /* type */ |
| 169 | 0, /* rightshift */ |
| 170 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 171 | 12, /* bitsize */ |
| 172 | FALSE, /* pc_relative */ |
| 173 | 0, /* bitpos */ |
| 174 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 175 | bfd_elf_generic_reloc, /* special_function */ |
| 176 | "R_ARM_ABS12", /* name */ |
| 177 | FALSE, /* partial_inplace */ |
| 178 | 0x00000fff, /* src_mask */ |
| 179 | 0x00000fff, /* dst_mask */ |
| 180 | FALSE), /* pcrel_offset */ |
| 181 | |
| 182 | HOWTO (R_ARM_THM_ABS5, /* type */ |
| 183 | 6, /* rightshift */ |
| 184 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 185 | 5, /* bitsize */ |
| 186 | FALSE, /* pc_relative */ |
| 187 | 0, /* bitpos */ |
| 188 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 189 | bfd_elf_generic_reloc, /* special_function */ |
| 190 | "R_ARM_THM_ABS5", /* name */ |
| 191 | FALSE, /* partial_inplace */ |
| 192 | 0x000007e0, /* src_mask */ |
| 193 | 0x000007e0, /* dst_mask */ |
| 194 | FALSE), /* pcrel_offset */ |
| 195 | |
| 196 | /* 8 bit absolute */ |
| 197 | HOWTO (R_ARM_ABS8, /* type */ |
| 198 | 0, /* rightshift */ |
| 199 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 200 | 8, /* bitsize */ |
| 201 | FALSE, /* pc_relative */ |
| 202 | 0, /* bitpos */ |
| 203 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 204 | bfd_elf_generic_reloc, /* special_function */ |
| 205 | "R_ARM_ABS8", /* name */ |
| 206 | FALSE, /* partial_inplace */ |
| 207 | 0x000000ff, /* src_mask */ |
| 208 | 0x000000ff, /* dst_mask */ |
| 209 | FALSE), /* pcrel_offset */ |
| 210 | |
| 211 | HOWTO (R_ARM_SBREL32, /* type */ |
| 212 | 0, /* rightshift */ |
| 213 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 214 | 32, /* bitsize */ |
| 215 | FALSE, /* pc_relative */ |
| 216 | 0, /* bitpos */ |
| 217 | complain_overflow_dont,/* complain_on_overflow */ |
| 218 | bfd_elf_generic_reloc, /* special_function */ |
| 219 | "R_ARM_SBREL32", /* name */ |
| 220 | FALSE, /* partial_inplace */ |
| 221 | 0xffffffff, /* src_mask */ |
| 222 | 0xffffffff, /* dst_mask */ |
| 223 | FALSE), /* pcrel_offset */ |
| 224 | |
| 225 | HOWTO (R_ARM_THM_CALL, /* type */ |
| 226 | 1, /* rightshift */ |
| 227 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 228 | 24, /* bitsize */ |
| 229 | TRUE, /* pc_relative */ |
| 230 | 0, /* bitpos */ |
| 231 | complain_overflow_signed,/* complain_on_overflow */ |
| 232 | bfd_elf_generic_reloc, /* special_function */ |
| 233 | "R_ARM_THM_CALL", /* name */ |
| 234 | FALSE, /* partial_inplace */ |
| 235 | 0x07ff2fff, /* src_mask */ |
| 236 | 0x07ff2fff, /* dst_mask */ |
| 237 | TRUE), /* pcrel_offset */ |
| 238 | |
| 239 | HOWTO (R_ARM_THM_PC8, /* type */ |
| 240 | 1, /* rightshift */ |
| 241 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 242 | 8, /* bitsize */ |
| 243 | TRUE, /* pc_relative */ |
| 244 | 0, /* bitpos */ |
| 245 | complain_overflow_signed,/* complain_on_overflow */ |
| 246 | bfd_elf_generic_reloc, /* special_function */ |
| 247 | "R_ARM_THM_PC8", /* name */ |
| 248 | FALSE, /* partial_inplace */ |
| 249 | 0x000000ff, /* src_mask */ |
| 250 | 0x000000ff, /* dst_mask */ |
| 251 | TRUE), /* pcrel_offset */ |
| 252 | |
| 253 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
| 254 | 1, /* rightshift */ |
| 255 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 256 | 32, /* bitsize */ |
| 257 | FALSE, /* pc_relative */ |
| 258 | 0, /* bitpos */ |
| 259 | complain_overflow_signed,/* complain_on_overflow */ |
| 260 | bfd_elf_generic_reloc, /* special_function */ |
| 261 | "R_ARM_BREL_ADJ", /* name */ |
| 262 | FALSE, /* partial_inplace */ |
| 263 | 0xffffffff, /* src_mask */ |
| 264 | 0xffffffff, /* dst_mask */ |
| 265 | FALSE), /* pcrel_offset */ |
| 266 | |
| 267 | HOWTO (R_ARM_TLS_DESC, /* type */ |
| 268 | 0, /* rightshift */ |
| 269 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 270 | 32, /* bitsize */ |
| 271 | FALSE, /* pc_relative */ |
| 272 | 0, /* bitpos */ |
| 273 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 274 | bfd_elf_generic_reloc, /* special_function */ |
| 275 | "R_ARM_TLS_DESC", /* name */ |
| 276 | FALSE, /* partial_inplace */ |
| 277 | 0xffffffff, /* src_mask */ |
| 278 | 0xffffffff, /* dst_mask */ |
| 279 | FALSE), /* pcrel_offset */ |
| 280 | |
| 281 | HOWTO (R_ARM_THM_SWI8, /* type */ |
| 282 | 0, /* rightshift */ |
| 283 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 284 | 0, /* bitsize */ |
| 285 | FALSE, /* pc_relative */ |
| 286 | 0, /* bitpos */ |
| 287 | complain_overflow_signed,/* complain_on_overflow */ |
| 288 | bfd_elf_generic_reloc, /* special_function */ |
| 289 | "R_ARM_SWI8", /* name */ |
| 290 | FALSE, /* partial_inplace */ |
| 291 | 0x00000000, /* src_mask */ |
| 292 | 0x00000000, /* dst_mask */ |
| 293 | FALSE), /* pcrel_offset */ |
| 294 | |
| 295 | /* BLX instruction for the ARM. */ |
| 296 | HOWTO (R_ARM_XPC25, /* type */ |
| 297 | 2, /* rightshift */ |
| 298 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 299 | 24, /* bitsize */ |
| 300 | TRUE, /* pc_relative */ |
| 301 | 0, /* bitpos */ |
| 302 | complain_overflow_signed,/* complain_on_overflow */ |
| 303 | bfd_elf_generic_reloc, /* special_function */ |
| 304 | "R_ARM_XPC25", /* name */ |
| 305 | FALSE, /* partial_inplace */ |
| 306 | 0x00ffffff, /* src_mask */ |
| 307 | 0x00ffffff, /* dst_mask */ |
| 308 | TRUE), /* pcrel_offset */ |
| 309 | |
| 310 | /* BLX instruction for the Thumb. */ |
| 311 | HOWTO (R_ARM_THM_XPC22, /* type */ |
| 312 | 2, /* rightshift */ |
| 313 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 314 | 24, /* bitsize */ |
| 315 | TRUE, /* pc_relative */ |
| 316 | 0, /* bitpos */ |
| 317 | complain_overflow_signed,/* complain_on_overflow */ |
| 318 | bfd_elf_generic_reloc, /* special_function */ |
| 319 | "R_ARM_THM_XPC22", /* name */ |
| 320 | FALSE, /* partial_inplace */ |
| 321 | 0x07ff2fff, /* src_mask */ |
| 322 | 0x07ff2fff, /* dst_mask */ |
| 323 | TRUE), /* pcrel_offset */ |
| 324 | |
| 325 | /* Dynamic TLS relocations. */ |
| 326 | |
| 327 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
| 328 | 0, /* rightshift */ |
| 329 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 330 | 32, /* bitsize */ |
| 331 | FALSE, /* pc_relative */ |
| 332 | 0, /* bitpos */ |
| 333 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 334 | bfd_elf_generic_reloc, /* special_function */ |
| 335 | "R_ARM_TLS_DTPMOD32", /* name */ |
| 336 | TRUE, /* partial_inplace */ |
| 337 | 0xffffffff, /* src_mask */ |
| 338 | 0xffffffff, /* dst_mask */ |
| 339 | FALSE), /* pcrel_offset */ |
| 340 | |
| 341 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
| 342 | 0, /* rightshift */ |
| 343 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 344 | 32, /* bitsize */ |
| 345 | FALSE, /* pc_relative */ |
| 346 | 0, /* bitpos */ |
| 347 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 348 | bfd_elf_generic_reloc, /* special_function */ |
| 349 | "R_ARM_TLS_DTPOFF32", /* name */ |
| 350 | TRUE, /* partial_inplace */ |
| 351 | 0xffffffff, /* src_mask */ |
| 352 | 0xffffffff, /* dst_mask */ |
| 353 | FALSE), /* pcrel_offset */ |
| 354 | |
| 355 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
| 356 | 0, /* rightshift */ |
| 357 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 358 | 32, /* bitsize */ |
| 359 | FALSE, /* pc_relative */ |
| 360 | 0, /* bitpos */ |
| 361 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 362 | bfd_elf_generic_reloc, /* special_function */ |
| 363 | "R_ARM_TLS_TPOFF32", /* name */ |
| 364 | TRUE, /* partial_inplace */ |
| 365 | 0xffffffff, /* src_mask */ |
| 366 | 0xffffffff, /* dst_mask */ |
| 367 | FALSE), /* pcrel_offset */ |
| 368 | |
| 369 | /* Relocs used in ARM Linux */ |
| 370 | |
| 371 | HOWTO (R_ARM_COPY, /* type */ |
| 372 | 0, /* rightshift */ |
| 373 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 374 | 32, /* bitsize */ |
| 375 | FALSE, /* pc_relative */ |
| 376 | 0, /* bitpos */ |
| 377 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 378 | bfd_elf_generic_reloc, /* special_function */ |
| 379 | "R_ARM_COPY", /* name */ |
| 380 | TRUE, /* partial_inplace */ |
| 381 | 0xffffffff, /* src_mask */ |
| 382 | 0xffffffff, /* dst_mask */ |
| 383 | FALSE), /* pcrel_offset */ |
| 384 | |
| 385 | HOWTO (R_ARM_GLOB_DAT, /* type */ |
| 386 | 0, /* rightshift */ |
| 387 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 388 | 32, /* bitsize */ |
| 389 | FALSE, /* pc_relative */ |
| 390 | 0, /* bitpos */ |
| 391 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 392 | bfd_elf_generic_reloc, /* special_function */ |
| 393 | "R_ARM_GLOB_DAT", /* name */ |
| 394 | TRUE, /* partial_inplace */ |
| 395 | 0xffffffff, /* src_mask */ |
| 396 | 0xffffffff, /* dst_mask */ |
| 397 | FALSE), /* pcrel_offset */ |
| 398 | |
| 399 | HOWTO (R_ARM_JUMP_SLOT, /* type */ |
| 400 | 0, /* rightshift */ |
| 401 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 402 | 32, /* bitsize */ |
| 403 | FALSE, /* pc_relative */ |
| 404 | 0, /* bitpos */ |
| 405 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 406 | bfd_elf_generic_reloc, /* special_function */ |
| 407 | "R_ARM_JUMP_SLOT", /* name */ |
| 408 | TRUE, /* partial_inplace */ |
| 409 | 0xffffffff, /* src_mask */ |
| 410 | 0xffffffff, /* dst_mask */ |
| 411 | FALSE), /* pcrel_offset */ |
| 412 | |
| 413 | HOWTO (R_ARM_RELATIVE, /* type */ |
| 414 | 0, /* rightshift */ |
| 415 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 416 | 32, /* bitsize */ |
| 417 | FALSE, /* pc_relative */ |
| 418 | 0, /* bitpos */ |
| 419 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 420 | bfd_elf_generic_reloc, /* special_function */ |
| 421 | "R_ARM_RELATIVE", /* name */ |
| 422 | TRUE, /* partial_inplace */ |
| 423 | 0xffffffff, /* src_mask */ |
| 424 | 0xffffffff, /* dst_mask */ |
| 425 | FALSE), /* pcrel_offset */ |
| 426 | |
| 427 | HOWTO (R_ARM_GOTOFF32, /* type */ |
| 428 | 0, /* rightshift */ |
| 429 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 430 | 32, /* bitsize */ |
| 431 | FALSE, /* pc_relative */ |
| 432 | 0, /* bitpos */ |
| 433 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 434 | bfd_elf_generic_reloc, /* special_function */ |
| 435 | "R_ARM_GOTOFF32", /* name */ |
| 436 | TRUE, /* partial_inplace */ |
| 437 | 0xffffffff, /* src_mask */ |
| 438 | 0xffffffff, /* dst_mask */ |
| 439 | FALSE), /* pcrel_offset */ |
| 440 | |
| 441 | HOWTO (R_ARM_GOTPC, /* type */ |
| 442 | 0, /* rightshift */ |
| 443 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 444 | 32, /* bitsize */ |
| 445 | TRUE, /* pc_relative */ |
| 446 | 0, /* bitpos */ |
| 447 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 448 | bfd_elf_generic_reloc, /* special_function */ |
| 449 | "R_ARM_GOTPC", /* name */ |
| 450 | TRUE, /* partial_inplace */ |
| 451 | 0xffffffff, /* src_mask */ |
| 452 | 0xffffffff, /* dst_mask */ |
| 453 | TRUE), /* pcrel_offset */ |
| 454 | |
| 455 | HOWTO (R_ARM_GOT32, /* type */ |
| 456 | 0, /* rightshift */ |
| 457 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 458 | 32, /* bitsize */ |
| 459 | FALSE, /* pc_relative */ |
| 460 | 0, /* bitpos */ |
| 461 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 462 | bfd_elf_generic_reloc, /* special_function */ |
| 463 | "R_ARM_GOT32", /* name */ |
| 464 | TRUE, /* partial_inplace */ |
| 465 | 0xffffffff, /* src_mask */ |
| 466 | 0xffffffff, /* dst_mask */ |
| 467 | FALSE), /* pcrel_offset */ |
| 468 | |
| 469 | HOWTO (R_ARM_PLT32, /* type */ |
| 470 | 2, /* rightshift */ |
| 471 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 472 | 24, /* bitsize */ |
| 473 | TRUE, /* pc_relative */ |
| 474 | 0, /* bitpos */ |
| 475 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 476 | bfd_elf_generic_reloc, /* special_function */ |
| 477 | "R_ARM_PLT32", /* name */ |
| 478 | FALSE, /* partial_inplace */ |
| 479 | 0x00ffffff, /* src_mask */ |
| 480 | 0x00ffffff, /* dst_mask */ |
| 481 | TRUE), /* pcrel_offset */ |
| 482 | |
| 483 | HOWTO (R_ARM_CALL, /* type */ |
| 484 | 2, /* rightshift */ |
| 485 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 486 | 24, /* bitsize */ |
| 487 | TRUE, /* pc_relative */ |
| 488 | 0, /* bitpos */ |
| 489 | complain_overflow_signed,/* complain_on_overflow */ |
| 490 | bfd_elf_generic_reloc, /* special_function */ |
| 491 | "R_ARM_CALL", /* name */ |
| 492 | FALSE, /* partial_inplace */ |
| 493 | 0x00ffffff, /* src_mask */ |
| 494 | 0x00ffffff, /* dst_mask */ |
| 495 | TRUE), /* pcrel_offset */ |
| 496 | |
| 497 | HOWTO (R_ARM_JUMP24, /* type */ |
| 498 | 2, /* rightshift */ |
| 499 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 500 | 24, /* bitsize */ |
| 501 | TRUE, /* pc_relative */ |
| 502 | 0, /* bitpos */ |
| 503 | complain_overflow_signed,/* complain_on_overflow */ |
| 504 | bfd_elf_generic_reloc, /* special_function */ |
| 505 | "R_ARM_JUMP24", /* name */ |
| 506 | FALSE, /* partial_inplace */ |
| 507 | 0x00ffffff, /* src_mask */ |
| 508 | 0x00ffffff, /* dst_mask */ |
| 509 | TRUE), /* pcrel_offset */ |
| 510 | |
| 511 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
| 512 | 1, /* rightshift */ |
| 513 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 514 | 24, /* bitsize */ |
| 515 | TRUE, /* pc_relative */ |
| 516 | 0, /* bitpos */ |
| 517 | complain_overflow_signed,/* complain_on_overflow */ |
| 518 | bfd_elf_generic_reloc, /* special_function */ |
| 519 | "R_ARM_THM_JUMP24", /* name */ |
| 520 | FALSE, /* partial_inplace */ |
| 521 | 0x07ff2fff, /* src_mask */ |
| 522 | 0x07ff2fff, /* dst_mask */ |
| 523 | TRUE), /* pcrel_offset */ |
| 524 | |
| 525 | HOWTO (R_ARM_BASE_ABS, /* type */ |
| 526 | 0, /* rightshift */ |
| 527 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 528 | 32, /* bitsize */ |
| 529 | FALSE, /* pc_relative */ |
| 530 | 0, /* bitpos */ |
| 531 | complain_overflow_dont,/* complain_on_overflow */ |
| 532 | bfd_elf_generic_reloc, /* special_function */ |
| 533 | "R_ARM_BASE_ABS", /* name */ |
| 534 | FALSE, /* partial_inplace */ |
| 535 | 0xffffffff, /* src_mask */ |
| 536 | 0xffffffff, /* dst_mask */ |
| 537 | FALSE), /* pcrel_offset */ |
| 538 | |
| 539 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ |
| 540 | 0, /* rightshift */ |
| 541 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 542 | 12, /* bitsize */ |
| 543 | TRUE, /* pc_relative */ |
| 544 | 0, /* bitpos */ |
| 545 | complain_overflow_dont,/* complain_on_overflow */ |
| 546 | bfd_elf_generic_reloc, /* special_function */ |
| 547 | "R_ARM_ALU_PCREL_7_0", /* name */ |
| 548 | FALSE, /* partial_inplace */ |
| 549 | 0x00000fff, /* src_mask */ |
| 550 | 0x00000fff, /* dst_mask */ |
| 551 | TRUE), /* pcrel_offset */ |
| 552 | |
| 553 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ |
| 554 | 0, /* rightshift */ |
| 555 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 556 | 12, /* bitsize */ |
| 557 | TRUE, /* pc_relative */ |
| 558 | 8, /* bitpos */ |
| 559 | complain_overflow_dont,/* complain_on_overflow */ |
| 560 | bfd_elf_generic_reloc, /* special_function */ |
| 561 | "R_ARM_ALU_PCREL_15_8",/* name */ |
| 562 | FALSE, /* partial_inplace */ |
| 563 | 0x00000fff, /* src_mask */ |
| 564 | 0x00000fff, /* dst_mask */ |
| 565 | TRUE), /* pcrel_offset */ |
| 566 | |
| 567 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ |
| 568 | 0, /* rightshift */ |
| 569 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 570 | 12, /* bitsize */ |
| 571 | TRUE, /* pc_relative */ |
| 572 | 16, /* bitpos */ |
| 573 | complain_overflow_dont,/* complain_on_overflow */ |
| 574 | bfd_elf_generic_reloc, /* special_function */ |
| 575 | "R_ARM_ALU_PCREL_23_15",/* name */ |
| 576 | FALSE, /* partial_inplace */ |
| 577 | 0x00000fff, /* src_mask */ |
| 578 | 0x00000fff, /* dst_mask */ |
| 579 | TRUE), /* pcrel_offset */ |
| 580 | |
| 581 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ |
| 582 | 0, /* rightshift */ |
| 583 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 584 | 12, /* bitsize */ |
| 585 | FALSE, /* pc_relative */ |
| 586 | 0, /* bitpos */ |
| 587 | complain_overflow_dont,/* complain_on_overflow */ |
| 588 | bfd_elf_generic_reloc, /* special_function */ |
| 589 | "R_ARM_LDR_SBREL_11_0",/* name */ |
| 590 | FALSE, /* partial_inplace */ |
| 591 | 0x00000fff, /* src_mask */ |
| 592 | 0x00000fff, /* dst_mask */ |
| 593 | FALSE), /* pcrel_offset */ |
| 594 | |
| 595 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ |
| 596 | 0, /* rightshift */ |
| 597 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 598 | 8, /* bitsize */ |
| 599 | FALSE, /* pc_relative */ |
| 600 | 12, /* bitpos */ |
| 601 | complain_overflow_dont,/* complain_on_overflow */ |
| 602 | bfd_elf_generic_reloc, /* special_function */ |
| 603 | "R_ARM_ALU_SBREL_19_12",/* name */ |
| 604 | FALSE, /* partial_inplace */ |
| 605 | 0x000ff000, /* src_mask */ |
| 606 | 0x000ff000, /* dst_mask */ |
| 607 | FALSE), /* pcrel_offset */ |
| 608 | |
| 609 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ |
| 610 | 0, /* rightshift */ |
| 611 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 612 | 8, /* bitsize */ |
| 613 | FALSE, /* pc_relative */ |
| 614 | 20, /* bitpos */ |
| 615 | complain_overflow_dont,/* complain_on_overflow */ |
| 616 | bfd_elf_generic_reloc, /* special_function */ |
| 617 | "R_ARM_ALU_SBREL_27_20",/* name */ |
| 618 | FALSE, /* partial_inplace */ |
| 619 | 0x0ff00000, /* src_mask */ |
| 620 | 0x0ff00000, /* dst_mask */ |
| 621 | FALSE), /* pcrel_offset */ |
| 622 | |
| 623 | HOWTO (R_ARM_TARGET1, /* type */ |
| 624 | 0, /* rightshift */ |
| 625 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 626 | 32, /* bitsize */ |
| 627 | FALSE, /* pc_relative */ |
| 628 | 0, /* bitpos */ |
| 629 | complain_overflow_dont,/* complain_on_overflow */ |
| 630 | bfd_elf_generic_reloc, /* special_function */ |
| 631 | "R_ARM_TARGET1", /* name */ |
| 632 | FALSE, /* partial_inplace */ |
| 633 | 0xffffffff, /* src_mask */ |
| 634 | 0xffffffff, /* dst_mask */ |
| 635 | FALSE), /* pcrel_offset */ |
| 636 | |
| 637 | HOWTO (R_ARM_ROSEGREL32, /* type */ |
| 638 | 0, /* rightshift */ |
| 639 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 640 | 32, /* bitsize */ |
| 641 | FALSE, /* pc_relative */ |
| 642 | 0, /* bitpos */ |
| 643 | complain_overflow_dont,/* complain_on_overflow */ |
| 644 | bfd_elf_generic_reloc, /* special_function */ |
| 645 | "R_ARM_ROSEGREL32", /* name */ |
| 646 | FALSE, /* partial_inplace */ |
| 647 | 0xffffffff, /* src_mask */ |
| 648 | 0xffffffff, /* dst_mask */ |
| 649 | FALSE), /* pcrel_offset */ |
| 650 | |
| 651 | HOWTO (R_ARM_V4BX, /* type */ |
| 652 | 0, /* rightshift */ |
| 653 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 654 | 32, /* bitsize */ |
| 655 | FALSE, /* pc_relative */ |
| 656 | 0, /* bitpos */ |
| 657 | complain_overflow_dont,/* complain_on_overflow */ |
| 658 | bfd_elf_generic_reloc, /* special_function */ |
| 659 | "R_ARM_V4BX", /* name */ |
| 660 | FALSE, /* partial_inplace */ |
| 661 | 0xffffffff, /* src_mask */ |
| 662 | 0xffffffff, /* dst_mask */ |
| 663 | FALSE), /* pcrel_offset */ |
| 664 | |
| 665 | HOWTO (R_ARM_TARGET2, /* type */ |
| 666 | 0, /* rightshift */ |
| 667 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 668 | 32, /* bitsize */ |
| 669 | FALSE, /* pc_relative */ |
| 670 | 0, /* bitpos */ |
| 671 | complain_overflow_signed,/* complain_on_overflow */ |
| 672 | bfd_elf_generic_reloc, /* special_function */ |
| 673 | "R_ARM_TARGET2", /* name */ |
| 674 | FALSE, /* partial_inplace */ |
| 675 | 0xffffffff, /* src_mask */ |
| 676 | 0xffffffff, /* dst_mask */ |
| 677 | TRUE), /* pcrel_offset */ |
| 678 | |
| 679 | HOWTO (R_ARM_PREL31, /* type */ |
| 680 | 0, /* rightshift */ |
| 681 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 682 | 31, /* bitsize */ |
| 683 | TRUE, /* pc_relative */ |
| 684 | 0, /* bitpos */ |
| 685 | complain_overflow_signed,/* complain_on_overflow */ |
| 686 | bfd_elf_generic_reloc, /* special_function */ |
| 687 | "R_ARM_PREL31", /* name */ |
| 688 | FALSE, /* partial_inplace */ |
| 689 | 0x7fffffff, /* src_mask */ |
| 690 | 0x7fffffff, /* dst_mask */ |
| 691 | TRUE), /* pcrel_offset */ |
| 692 | |
| 693 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ |
| 694 | 0, /* rightshift */ |
| 695 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 696 | 16, /* bitsize */ |
| 697 | FALSE, /* pc_relative */ |
| 698 | 0, /* bitpos */ |
| 699 | complain_overflow_dont,/* complain_on_overflow */ |
| 700 | bfd_elf_generic_reloc, /* special_function */ |
| 701 | "R_ARM_MOVW_ABS_NC", /* name */ |
| 702 | FALSE, /* partial_inplace */ |
| 703 | 0x000f0fff, /* src_mask */ |
| 704 | 0x000f0fff, /* dst_mask */ |
| 705 | FALSE), /* pcrel_offset */ |
| 706 | |
| 707 | HOWTO (R_ARM_MOVT_ABS, /* type */ |
| 708 | 0, /* rightshift */ |
| 709 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 710 | 16, /* bitsize */ |
| 711 | FALSE, /* pc_relative */ |
| 712 | 0, /* bitpos */ |
| 713 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 714 | bfd_elf_generic_reloc, /* special_function */ |
| 715 | "R_ARM_MOVT_ABS", /* name */ |
| 716 | FALSE, /* partial_inplace */ |
| 717 | 0x000f0fff, /* src_mask */ |
| 718 | 0x000f0fff, /* dst_mask */ |
| 719 | FALSE), /* pcrel_offset */ |
| 720 | |
| 721 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ |
| 722 | 0, /* rightshift */ |
| 723 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 724 | 16, /* bitsize */ |
| 725 | TRUE, /* pc_relative */ |
| 726 | 0, /* bitpos */ |
| 727 | complain_overflow_dont,/* complain_on_overflow */ |
| 728 | bfd_elf_generic_reloc, /* special_function */ |
| 729 | "R_ARM_MOVW_PREL_NC", /* name */ |
| 730 | FALSE, /* partial_inplace */ |
| 731 | 0x000f0fff, /* src_mask */ |
| 732 | 0x000f0fff, /* dst_mask */ |
| 733 | TRUE), /* pcrel_offset */ |
| 734 | |
| 735 | HOWTO (R_ARM_MOVT_PREL, /* type */ |
| 736 | 0, /* rightshift */ |
| 737 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 738 | 16, /* bitsize */ |
| 739 | TRUE, /* pc_relative */ |
| 740 | 0, /* bitpos */ |
| 741 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 742 | bfd_elf_generic_reloc, /* special_function */ |
| 743 | "R_ARM_MOVT_PREL", /* name */ |
| 744 | FALSE, /* partial_inplace */ |
| 745 | 0x000f0fff, /* src_mask */ |
| 746 | 0x000f0fff, /* dst_mask */ |
| 747 | TRUE), /* pcrel_offset */ |
| 748 | |
| 749 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ |
| 750 | 0, /* rightshift */ |
| 751 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 752 | 16, /* bitsize */ |
| 753 | FALSE, /* pc_relative */ |
| 754 | 0, /* bitpos */ |
| 755 | complain_overflow_dont,/* complain_on_overflow */ |
| 756 | bfd_elf_generic_reloc, /* special_function */ |
| 757 | "R_ARM_THM_MOVW_ABS_NC",/* name */ |
| 758 | FALSE, /* partial_inplace */ |
| 759 | 0x040f70ff, /* src_mask */ |
| 760 | 0x040f70ff, /* dst_mask */ |
| 761 | FALSE), /* pcrel_offset */ |
| 762 | |
| 763 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ |
| 764 | 0, /* rightshift */ |
| 765 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 766 | 16, /* bitsize */ |
| 767 | FALSE, /* pc_relative */ |
| 768 | 0, /* bitpos */ |
| 769 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 770 | bfd_elf_generic_reloc, /* special_function */ |
| 771 | "R_ARM_THM_MOVT_ABS", /* name */ |
| 772 | FALSE, /* partial_inplace */ |
| 773 | 0x040f70ff, /* src_mask */ |
| 774 | 0x040f70ff, /* dst_mask */ |
| 775 | FALSE), /* pcrel_offset */ |
| 776 | |
| 777 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ |
| 778 | 0, /* rightshift */ |
| 779 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 780 | 16, /* bitsize */ |
| 781 | TRUE, /* pc_relative */ |
| 782 | 0, /* bitpos */ |
| 783 | complain_overflow_dont,/* complain_on_overflow */ |
| 784 | bfd_elf_generic_reloc, /* special_function */ |
| 785 | "R_ARM_THM_MOVW_PREL_NC",/* name */ |
| 786 | FALSE, /* partial_inplace */ |
| 787 | 0x040f70ff, /* src_mask */ |
| 788 | 0x040f70ff, /* dst_mask */ |
| 789 | TRUE), /* pcrel_offset */ |
| 790 | |
| 791 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ |
| 792 | 0, /* rightshift */ |
| 793 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 794 | 16, /* bitsize */ |
| 795 | TRUE, /* pc_relative */ |
| 796 | 0, /* bitpos */ |
| 797 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 798 | bfd_elf_generic_reloc, /* special_function */ |
| 799 | "R_ARM_THM_MOVT_PREL", /* name */ |
| 800 | FALSE, /* partial_inplace */ |
| 801 | 0x040f70ff, /* src_mask */ |
| 802 | 0x040f70ff, /* dst_mask */ |
| 803 | TRUE), /* pcrel_offset */ |
| 804 | |
| 805 | HOWTO (R_ARM_THM_JUMP19, /* type */ |
| 806 | 1, /* rightshift */ |
| 807 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 808 | 19, /* bitsize */ |
| 809 | TRUE, /* pc_relative */ |
| 810 | 0, /* bitpos */ |
| 811 | complain_overflow_signed,/* complain_on_overflow */ |
| 812 | bfd_elf_generic_reloc, /* special_function */ |
| 813 | "R_ARM_THM_JUMP19", /* name */ |
| 814 | FALSE, /* partial_inplace */ |
| 815 | 0x043f2fff, /* src_mask */ |
| 816 | 0x043f2fff, /* dst_mask */ |
| 817 | TRUE), /* pcrel_offset */ |
| 818 | |
| 819 | HOWTO (R_ARM_THM_JUMP6, /* type */ |
| 820 | 1, /* rightshift */ |
| 821 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 822 | 6, /* bitsize */ |
| 823 | TRUE, /* pc_relative */ |
| 824 | 0, /* bitpos */ |
| 825 | complain_overflow_unsigned,/* complain_on_overflow */ |
| 826 | bfd_elf_generic_reloc, /* special_function */ |
| 827 | "R_ARM_THM_JUMP6", /* name */ |
| 828 | FALSE, /* partial_inplace */ |
| 829 | 0x02f8, /* src_mask */ |
| 830 | 0x02f8, /* dst_mask */ |
| 831 | TRUE), /* pcrel_offset */ |
| 832 | |
| 833 | /* These are declared as 13-bit signed relocations because we can |
| 834 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice |
| 835 | versa. */ |
| 836 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ |
| 837 | 0, /* rightshift */ |
| 838 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 839 | 13, /* bitsize */ |
| 840 | TRUE, /* pc_relative */ |
| 841 | 0, /* bitpos */ |
| 842 | complain_overflow_dont,/* complain_on_overflow */ |
| 843 | bfd_elf_generic_reloc, /* special_function */ |
| 844 | "R_ARM_THM_ALU_PREL_11_0",/* name */ |
| 845 | FALSE, /* partial_inplace */ |
| 846 | 0xffffffff, /* src_mask */ |
| 847 | 0xffffffff, /* dst_mask */ |
| 848 | TRUE), /* pcrel_offset */ |
| 849 | |
| 850 | HOWTO (R_ARM_THM_PC12, /* type */ |
| 851 | 0, /* rightshift */ |
| 852 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 853 | 13, /* bitsize */ |
| 854 | TRUE, /* pc_relative */ |
| 855 | 0, /* bitpos */ |
| 856 | complain_overflow_dont,/* complain_on_overflow */ |
| 857 | bfd_elf_generic_reloc, /* special_function */ |
| 858 | "R_ARM_THM_PC12", /* name */ |
| 859 | FALSE, /* partial_inplace */ |
| 860 | 0xffffffff, /* src_mask */ |
| 861 | 0xffffffff, /* dst_mask */ |
| 862 | TRUE), /* pcrel_offset */ |
| 863 | |
| 864 | HOWTO (R_ARM_ABS32_NOI, /* type */ |
| 865 | 0, /* rightshift */ |
| 866 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 867 | 32, /* bitsize */ |
| 868 | FALSE, /* pc_relative */ |
| 869 | 0, /* bitpos */ |
| 870 | complain_overflow_dont,/* complain_on_overflow */ |
| 871 | bfd_elf_generic_reloc, /* special_function */ |
| 872 | "R_ARM_ABS32_NOI", /* name */ |
| 873 | FALSE, /* partial_inplace */ |
| 874 | 0xffffffff, /* src_mask */ |
| 875 | 0xffffffff, /* dst_mask */ |
| 876 | FALSE), /* pcrel_offset */ |
| 877 | |
| 878 | HOWTO (R_ARM_REL32_NOI, /* type */ |
| 879 | 0, /* rightshift */ |
| 880 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 881 | 32, /* bitsize */ |
| 882 | TRUE, /* pc_relative */ |
| 883 | 0, /* bitpos */ |
| 884 | complain_overflow_dont,/* complain_on_overflow */ |
| 885 | bfd_elf_generic_reloc, /* special_function */ |
| 886 | "R_ARM_REL32_NOI", /* name */ |
| 887 | FALSE, /* partial_inplace */ |
| 888 | 0xffffffff, /* src_mask */ |
| 889 | 0xffffffff, /* dst_mask */ |
| 890 | FALSE), /* pcrel_offset */ |
| 891 | |
| 892 | /* Group relocations. */ |
| 893 | |
| 894 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ |
| 895 | 0, /* rightshift */ |
| 896 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 897 | 32, /* bitsize */ |
| 898 | TRUE, /* pc_relative */ |
| 899 | 0, /* bitpos */ |
| 900 | complain_overflow_dont,/* complain_on_overflow */ |
| 901 | bfd_elf_generic_reloc, /* special_function */ |
| 902 | "R_ARM_ALU_PC_G0_NC", /* name */ |
| 903 | FALSE, /* partial_inplace */ |
| 904 | 0xffffffff, /* src_mask */ |
| 905 | 0xffffffff, /* dst_mask */ |
| 906 | TRUE), /* pcrel_offset */ |
| 907 | |
| 908 | HOWTO (R_ARM_ALU_PC_G0, /* type */ |
| 909 | 0, /* rightshift */ |
| 910 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 911 | 32, /* bitsize */ |
| 912 | TRUE, /* pc_relative */ |
| 913 | 0, /* bitpos */ |
| 914 | complain_overflow_dont,/* complain_on_overflow */ |
| 915 | bfd_elf_generic_reloc, /* special_function */ |
| 916 | "R_ARM_ALU_PC_G0", /* name */ |
| 917 | FALSE, /* partial_inplace */ |
| 918 | 0xffffffff, /* src_mask */ |
| 919 | 0xffffffff, /* dst_mask */ |
| 920 | TRUE), /* pcrel_offset */ |
| 921 | |
| 922 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ |
| 923 | 0, /* rightshift */ |
| 924 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 925 | 32, /* bitsize */ |
| 926 | TRUE, /* pc_relative */ |
| 927 | 0, /* bitpos */ |
| 928 | complain_overflow_dont,/* complain_on_overflow */ |
| 929 | bfd_elf_generic_reloc, /* special_function */ |
| 930 | "R_ARM_ALU_PC_G1_NC", /* name */ |
| 931 | FALSE, /* partial_inplace */ |
| 932 | 0xffffffff, /* src_mask */ |
| 933 | 0xffffffff, /* dst_mask */ |
| 934 | TRUE), /* pcrel_offset */ |
| 935 | |
| 936 | HOWTO (R_ARM_ALU_PC_G1, /* type */ |
| 937 | 0, /* rightshift */ |
| 938 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 939 | 32, /* bitsize */ |
| 940 | TRUE, /* pc_relative */ |
| 941 | 0, /* bitpos */ |
| 942 | complain_overflow_dont,/* complain_on_overflow */ |
| 943 | bfd_elf_generic_reloc, /* special_function */ |
| 944 | "R_ARM_ALU_PC_G1", /* name */ |
| 945 | FALSE, /* partial_inplace */ |
| 946 | 0xffffffff, /* src_mask */ |
| 947 | 0xffffffff, /* dst_mask */ |
| 948 | TRUE), /* pcrel_offset */ |
| 949 | |
| 950 | HOWTO (R_ARM_ALU_PC_G2, /* type */ |
| 951 | 0, /* rightshift */ |
| 952 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 953 | 32, /* bitsize */ |
| 954 | TRUE, /* pc_relative */ |
| 955 | 0, /* bitpos */ |
| 956 | complain_overflow_dont,/* complain_on_overflow */ |
| 957 | bfd_elf_generic_reloc, /* special_function */ |
| 958 | "R_ARM_ALU_PC_G2", /* name */ |
| 959 | FALSE, /* partial_inplace */ |
| 960 | 0xffffffff, /* src_mask */ |
| 961 | 0xffffffff, /* dst_mask */ |
| 962 | TRUE), /* pcrel_offset */ |
| 963 | |
| 964 | HOWTO (R_ARM_LDR_PC_G1, /* type */ |
| 965 | 0, /* rightshift */ |
| 966 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 967 | 32, /* bitsize */ |
| 968 | TRUE, /* pc_relative */ |
| 969 | 0, /* bitpos */ |
| 970 | complain_overflow_dont,/* complain_on_overflow */ |
| 971 | bfd_elf_generic_reloc, /* special_function */ |
| 972 | "R_ARM_LDR_PC_G1", /* name */ |
| 973 | FALSE, /* partial_inplace */ |
| 974 | 0xffffffff, /* src_mask */ |
| 975 | 0xffffffff, /* dst_mask */ |
| 976 | TRUE), /* pcrel_offset */ |
| 977 | |
| 978 | HOWTO (R_ARM_LDR_PC_G2, /* type */ |
| 979 | 0, /* rightshift */ |
| 980 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 981 | 32, /* bitsize */ |
| 982 | TRUE, /* pc_relative */ |
| 983 | 0, /* bitpos */ |
| 984 | complain_overflow_dont,/* complain_on_overflow */ |
| 985 | bfd_elf_generic_reloc, /* special_function */ |
| 986 | "R_ARM_LDR_PC_G2", /* name */ |
| 987 | FALSE, /* partial_inplace */ |
| 988 | 0xffffffff, /* src_mask */ |
| 989 | 0xffffffff, /* dst_mask */ |
| 990 | TRUE), /* pcrel_offset */ |
| 991 | |
| 992 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ |
| 993 | 0, /* rightshift */ |
| 994 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 995 | 32, /* bitsize */ |
| 996 | TRUE, /* pc_relative */ |
| 997 | 0, /* bitpos */ |
| 998 | complain_overflow_dont,/* complain_on_overflow */ |
| 999 | bfd_elf_generic_reloc, /* special_function */ |
| 1000 | "R_ARM_LDRS_PC_G0", /* name */ |
| 1001 | FALSE, /* partial_inplace */ |
| 1002 | 0xffffffff, /* src_mask */ |
| 1003 | 0xffffffff, /* dst_mask */ |
| 1004 | TRUE), /* pcrel_offset */ |
| 1005 | |
| 1006 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ |
| 1007 | 0, /* rightshift */ |
| 1008 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1009 | 32, /* bitsize */ |
| 1010 | TRUE, /* pc_relative */ |
| 1011 | 0, /* bitpos */ |
| 1012 | complain_overflow_dont,/* complain_on_overflow */ |
| 1013 | bfd_elf_generic_reloc, /* special_function */ |
| 1014 | "R_ARM_LDRS_PC_G1", /* name */ |
| 1015 | FALSE, /* partial_inplace */ |
| 1016 | 0xffffffff, /* src_mask */ |
| 1017 | 0xffffffff, /* dst_mask */ |
| 1018 | TRUE), /* pcrel_offset */ |
| 1019 | |
| 1020 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ |
| 1021 | 0, /* rightshift */ |
| 1022 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1023 | 32, /* bitsize */ |
| 1024 | TRUE, /* pc_relative */ |
| 1025 | 0, /* bitpos */ |
| 1026 | complain_overflow_dont,/* complain_on_overflow */ |
| 1027 | bfd_elf_generic_reloc, /* special_function */ |
| 1028 | "R_ARM_LDRS_PC_G2", /* name */ |
| 1029 | FALSE, /* partial_inplace */ |
| 1030 | 0xffffffff, /* src_mask */ |
| 1031 | 0xffffffff, /* dst_mask */ |
| 1032 | TRUE), /* pcrel_offset */ |
| 1033 | |
| 1034 | HOWTO (R_ARM_LDC_PC_G0, /* type */ |
| 1035 | 0, /* rightshift */ |
| 1036 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1037 | 32, /* bitsize */ |
| 1038 | TRUE, /* pc_relative */ |
| 1039 | 0, /* bitpos */ |
| 1040 | complain_overflow_dont,/* complain_on_overflow */ |
| 1041 | bfd_elf_generic_reloc, /* special_function */ |
| 1042 | "R_ARM_LDC_PC_G0", /* name */ |
| 1043 | FALSE, /* partial_inplace */ |
| 1044 | 0xffffffff, /* src_mask */ |
| 1045 | 0xffffffff, /* dst_mask */ |
| 1046 | TRUE), /* pcrel_offset */ |
| 1047 | |
| 1048 | HOWTO (R_ARM_LDC_PC_G1, /* type */ |
| 1049 | 0, /* rightshift */ |
| 1050 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1051 | 32, /* bitsize */ |
| 1052 | TRUE, /* pc_relative */ |
| 1053 | 0, /* bitpos */ |
| 1054 | complain_overflow_dont,/* complain_on_overflow */ |
| 1055 | bfd_elf_generic_reloc, /* special_function */ |
| 1056 | "R_ARM_LDC_PC_G1", /* name */ |
| 1057 | FALSE, /* partial_inplace */ |
| 1058 | 0xffffffff, /* src_mask */ |
| 1059 | 0xffffffff, /* dst_mask */ |
| 1060 | TRUE), /* pcrel_offset */ |
| 1061 | |
| 1062 | HOWTO (R_ARM_LDC_PC_G2, /* type */ |
| 1063 | 0, /* rightshift */ |
| 1064 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1065 | 32, /* bitsize */ |
| 1066 | TRUE, /* pc_relative */ |
| 1067 | 0, /* bitpos */ |
| 1068 | complain_overflow_dont,/* complain_on_overflow */ |
| 1069 | bfd_elf_generic_reloc, /* special_function */ |
| 1070 | "R_ARM_LDC_PC_G2", /* name */ |
| 1071 | FALSE, /* partial_inplace */ |
| 1072 | 0xffffffff, /* src_mask */ |
| 1073 | 0xffffffff, /* dst_mask */ |
| 1074 | TRUE), /* pcrel_offset */ |
| 1075 | |
| 1076 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ |
| 1077 | 0, /* rightshift */ |
| 1078 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1079 | 32, /* bitsize */ |
| 1080 | TRUE, /* pc_relative */ |
| 1081 | 0, /* bitpos */ |
| 1082 | complain_overflow_dont,/* complain_on_overflow */ |
| 1083 | bfd_elf_generic_reloc, /* special_function */ |
| 1084 | "R_ARM_ALU_SB_G0_NC", /* name */ |
| 1085 | FALSE, /* partial_inplace */ |
| 1086 | 0xffffffff, /* src_mask */ |
| 1087 | 0xffffffff, /* dst_mask */ |
| 1088 | TRUE), /* pcrel_offset */ |
| 1089 | |
| 1090 | HOWTO (R_ARM_ALU_SB_G0, /* type */ |
| 1091 | 0, /* rightshift */ |
| 1092 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1093 | 32, /* bitsize */ |
| 1094 | TRUE, /* pc_relative */ |
| 1095 | 0, /* bitpos */ |
| 1096 | complain_overflow_dont,/* complain_on_overflow */ |
| 1097 | bfd_elf_generic_reloc, /* special_function */ |
| 1098 | "R_ARM_ALU_SB_G0", /* name */ |
| 1099 | FALSE, /* partial_inplace */ |
| 1100 | 0xffffffff, /* src_mask */ |
| 1101 | 0xffffffff, /* dst_mask */ |
| 1102 | TRUE), /* pcrel_offset */ |
| 1103 | |
| 1104 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ |
| 1105 | 0, /* rightshift */ |
| 1106 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1107 | 32, /* bitsize */ |
| 1108 | TRUE, /* pc_relative */ |
| 1109 | 0, /* bitpos */ |
| 1110 | complain_overflow_dont,/* complain_on_overflow */ |
| 1111 | bfd_elf_generic_reloc, /* special_function */ |
| 1112 | "R_ARM_ALU_SB_G1_NC", /* name */ |
| 1113 | FALSE, /* partial_inplace */ |
| 1114 | 0xffffffff, /* src_mask */ |
| 1115 | 0xffffffff, /* dst_mask */ |
| 1116 | TRUE), /* pcrel_offset */ |
| 1117 | |
| 1118 | HOWTO (R_ARM_ALU_SB_G1, /* type */ |
| 1119 | 0, /* rightshift */ |
| 1120 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1121 | 32, /* bitsize */ |
| 1122 | TRUE, /* pc_relative */ |
| 1123 | 0, /* bitpos */ |
| 1124 | complain_overflow_dont,/* complain_on_overflow */ |
| 1125 | bfd_elf_generic_reloc, /* special_function */ |
| 1126 | "R_ARM_ALU_SB_G1", /* name */ |
| 1127 | FALSE, /* partial_inplace */ |
| 1128 | 0xffffffff, /* src_mask */ |
| 1129 | 0xffffffff, /* dst_mask */ |
| 1130 | TRUE), /* pcrel_offset */ |
| 1131 | |
| 1132 | HOWTO (R_ARM_ALU_SB_G2, /* type */ |
| 1133 | 0, /* rightshift */ |
| 1134 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1135 | 32, /* bitsize */ |
| 1136 | TRUE, /* pc_relative */ |
| 1137 | 0, /* bitpos */ |
| 1138 | complain_overflow_dont,/* complain_on_overflow */ |
| 1139 | bfd_elf_generic_reloc, /* special_function */ |
| 1140 | "R_ARM_ALU_SB_G2", /* name */ |
| 1141 | FALSE, /* partial_inplace */ |
| 1142 | 0xffffffff, /* src_mask */ |
| 1143 | 0xffffffff, /* dst_mask */ |
| 1144 | TRUE), /* pcrel_offset */ |
| 1145 | |
| 1146 | HOWTO (R_ARM_LDR_SB_G0, /* type */ |
| 1147 | 0, /* rightshift */ |
| 1148 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1149 | 32, /* bitsize */ |
| 1150 | TRUE, /* pc_relative */ |
| 1151 | 0, /* bitpos */ |
| 1152 | complain_overflow_dont,/* complain_on_overflow */ |
| 1153 | bfd_elf_generic_reloc, /* special_function */ |
| 1154 | "R_ARM_LDR_SB_G0", /* name */ |
| 1155 | FALSE, /* partial_inplace */ |
| 1156 | 0xffffffff, /* src_mask */ |
| 1157 | 0xffffffff, /* dst_mask */ |
| 1158 | TRUE), /* pcrel_offset */ |
| 1159 | |
| 1160 | HOWTO (R_ARM_LDR_SB_G1, /* type */ |
| 1161 | 0, /* rightshift */ |
| 1162 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1163 | 32, /* bitsize */ |
| 1164 | TRUE, /* pc_relative */ |
| 1165 | 0, /* bitpos */ |
| 1166 | complain_overflow_dont,/* complain_on_overflow */ |
| 1167 | bfd_elf_generic_reloc, /* special_function */ |
| 1168 | "R_ARM_LDR_SB_G1", /* name */ |
| 1169 | FALSE, /* partial_inplace */ |
| 1170 | 0xffffffff, /* src_mask */ |
| 1171 | 0xffffffff, /* dst_mask */ |
| 1172 | TRUE), /* pcrel_offset */ |
| 1173 | |
| 1174 | HOWTO (R_ARM_LDR_SB_G2, /* type */ |
| 1175 | 0, /* rightshift */ |
| 1176 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1177 | 32, /* bitsize */ |
| 1178 | TRUE, /* pc_relative */ |
| 1179 | 0, /* bitpos */ |
| 1180 | complain_overflow_dont,/* complain_on_overflow */ |
| 1181 | bfd_elf_generic_reloc, /* special_function */ |
| 1182 | "R_ARM_LDR_SB_G2", /* name */ |
| 1183 | FALSE, /* partial_inplace */ |
| 1184 | 0xffffffff, /* src_mask */ |
| 1185 | 0xffffffff, /* dst_mask */ |
| 1186 | TRUE), /* pcrel_offset */ |
| 1187 | |
| 1188 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ |
| 1189 | 0, /* rightshift */ |
| 1190 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1191 | 32, /* bitsize */ |
| 1192 | TRUE, /* pc_relative */ |
| 1193 | 0, /* bitpos */ |
| 1194 | complain_overflow_dont,/* complain_on_overflow */ |
| 1195 | bfd_elf_generic_reloc, /* special_function */ |
| 1196 | "R_ARM_LDRS_SB_G0", /* name */ |
| 1197 | FALSE, /* partial_inplace */ |
| 1198 | 0xffffffff, /* src_mask */ |
| 1199 | 0xffffffff, /* dst_mask */ |
| 1200 | TRUE), /* pcrel_offset */ |
| 1201 | |
| 1202 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ |
| 1203 | 0, /* rightshift */ |
| 1204 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1205 | 32, /* bitsize */ |
| 1206 | TRUE, /* pc_relative */ |
| 1207 | 0, /* bitpos */ |
| 1208 | complain_overflow_dont,/* complain_on_overflow */ |
| 1209 | bfd_elf_generic_reloc, /* special_function */ |
| 1210 | "R_ARM_LDRS_SB_G1", /* name */ |
| 1211 | FALSE, /* partial_inplace */ |
| 1212 | 0xffffffff, /* src_mask */ |
| 1213 | 0xffffffff, /* dst_mask */ |
| 1214 | TRUE), /* pcrel_offset */ |
| 1215 | |
| 1216 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ |
| 1217 | 0, /* rightshift */ |
| 1218 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1219 | 32, /* bitsize */ |
| 1220 | TRUE, /* pc_relative */ |
| 1221 | 0, /* bitpos */ |
| 1222 | complain_overflow_dont,/* complain_on_overflow */ |
| 1223 | bfd_elf_generic_reloc, /* special_function */ |
| 1224 | "R_ARM_LDRS_SB_G2", /* name */ |
| 1225 | FALSE, /* partial_inplace */ |
| 1226 | 0xffffffff, /* src_mask */ |
| 1227 | 0xffffffff, /* dst_mask */ |
| 1228 | TRUE), /* pcrel_offset */ |
| 1229 | |
| 1230 | HOWTO (R_ARM_LDC_SB_G0, /* type */ |
| 1231 | 0, /* rightshift */ |
| 1232 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1233 | 32, /* bitsize */ |
| 1234 | TRUE, /* pc_relative */ |
| 1235 | 0, /* bitpos */ |
| 1236 | complain_overflow_dont,/* complain_on_overflow */ |
| 1237 | bfd_elf_generic_reloc, /* special_function */ |
| 1238 | "R_ARM_LDC_SB_G0", /* name */ |
| 1239 | FALSE, /* partial_inplace */ |
| 1240 | 0xffffffff, /* src_mask */ |
| 1241 | 0xffffffff, /* dst_mask */ |
| 1242 | TRUE), /* pcrel_offset */ |
| 1243 | |
| 1244 | HOWTO (R_ARM_LDC_SB_G1, /* type */ |
| 1245 | 0, /* rightshift */ |
| 1246 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1247 | 32, /* bitsize */ |
| 1248 | TRUE, /* pc_relative */ |
| 1249 | 0, /* bitpos */ |
| 1250 | complain_overflow_dont,/* complain_on_overflow */ |
| 1251 | bfd_elf_generic_reloc, /* special_function */ |
| 1252 | "R_ARM_LDC_SB_G1", /* name */ |
| 1253 | FALSE, /* partial_inplace */ |
| 1254 | 0xffffffff, /* src_mask */ |
| 1255 | 0xffffffff, /* dst_mask */ |
| 1256 | TRUE), /* pcrel_offset */ |
| 1257 | |
| 1258 | HOWTO (R_ARM_LDC_SB_G2, /* type */ |
| 1259 | 0, /* rightshift */ |
| 1260 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1261 | 32, /* bitsize */ |
| 1262 | TRUE, /* pc_relative */ |
| 1263 | 0, /* bitpos */ |
| 1264 | complain_overflow_dont,/* complain_on_overflow */ |
| 1265 | bfd_elf_generic_reloc, /* special_function */ |
| 1266 | "R_ARM_LDC_SB_G2", /* name */ |
| 1267 | FALSE, /* partial_inplace */ |
| 1268 | 0xffffffff, /* src_mask */ |
| 1269 | 0xffffffff, /* dst_mask */ |
| 1270 | TRUE), /* pcrel_offset */ |
| 1271 | |
| 1272 | /* End of group relocations. */ |
| 1273 | |
| 1274 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
| 1275 | 0, /* rightshift */ |
| 1276 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1277 | 16, /* bitsize */ |
| 1278 | FALSE, /* pc_relative */ |
| 1279 | 0, /* bitpos */ |
| 1280 | complain_overflow_dont,/* complain_on_overflow */ |
| 1281 | bfd_elf_generic_reloc, /* special_function */ |
| 1282 | "R_ARM_MOVW_BREL_NC", /* name */ |
| 1283 | FALSE, /* partial_inplace */ |
| 1284 | 0x0000ffff, /* src_mask */ |
| 1285 | 0x0000ffff, /* dst_mask */ |
| 1286 | FALSE), /* pcrel_offset */ |
| 1287 | |
| 1288 | HOWTO (R_ARM_MOVT_BREL, /* type */ |
| 1289 | 0, /* rightshift */ |
| 1290 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1291 | 16, /* bitsize */ |
| 1292 | FALSE, /* pc_relative */ |
| 1293 | 0, /* bitpos */ |
| 1294 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1295 | bfd_elf_generic_reloc, /* special_function */ |
| 1296 | "R_ARM_MOVT_BREL", /* name */ |
| 1297 | FALSE, /* partial_inplace */ |
| 1298 | 0x0000ffff, /* src_mask */ |
| 1299 | 0x0000ffff, /* dst_mask */ |
| 1300 | FALSE), /* pcrel_offset */ |
| 1301 | |
| 1302 | HOWTO (R_ARM_MOVW_BREL, /* type */ |
| 1303 | 0, /* rightshift */ |
| 1304 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1305 | 16, /* bitsize */ |
| 1306 | FALSE, /* pc_relative */ |
| 1307 | 0, /* bitpos */ |
| 1308 | complain_overflow_dont,/* complain_on_overflow */ |
| 1309 | bfd_elf_generic_reloc, /* special_function */ |
| 1310 | "R_ARM_MOVW_BREL", /* name */ |
| 1311 | FALSE, /* partial_inplace */ |
| 1312 | 0x0000ffff, /* src_mask */ |
| 1313 | 0x0000ffff, /* dst_mask */ |
| 1314 | FALSE), /* pcrel_offset */ |
| 1315 | |
| 1316 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ |
| 1317 | 0, /* rightshift */ |
| 1318 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1319 | 16, /* bitsize */ |
| 1320 | FALSE, /* pc_relative */ |
| 1321 | 0, /* bitpos */ |
| 1322 | complain_overflow_dont,/* complain_on_overflow */ |
| 1323 | bfd_elf_generic_reloc, /* special_function */ |
| 1324 | "R_ARM_THM_MOVW_BREL_NC",/* name */ |
| 1325 | FALSE, /* partial_inplace */ |
| 1326 | 0x040f70ff, /* src_mask */ |
| 1327 | 0x040f70ff, /* dst_mask */ |
| 1328 | FALSE), /* pcrel_offset */ |
| 1329 | |
| 1330 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ |
| 1331 | 0, /* rightshift */ |
| 1332 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1333 | 16, /* bitsize */ |
| 1334 | FALSE, /* pc_relative */ |
| 1335 | 0, /* bitpos */ |
| 1336 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1337 | bfd_elf_generic_reloc, /* special_function */ |
| 1338 | "R_ARM_THM_MOVT_BREL", /* name */ |
| 1339 | FALSE, /* partial_inplace */ |
| 1340 | 0x040f70ff, /* src_mask */ |
| 1341 | 0x040f70ff, /* dst_mask */ |
| 1342 | FALSE), /* pcrel_offset */ |
| 1343 | |
| 1344 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ |
| 1345 | 0, /* rightshift */ |
| 1346 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1347 | 16, /* bitsize */ |
| 1348 | FALSE, /* pc_relative */ |
| 1349 | 0, /* bitpos */ |
| 1350 | complain_overflow_dont,/* complain_on_overflow */ |
| 1351 | bfd_elf_generic_reloc, /* special_function */ |
| 1352 | "R_ARM_THM_MOVW_BREL", /* name */ |
| 1353 | FALSE, /* partial_inplace */ |
| 1354 | 0x040f70ff, /* src_mask */ |
| 1355 | 0x040f70ff, /* dst_mask */ |
| 1356 | FALSE), /* pcrel_offset */ |
| 1357 | |
| 1358 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
| 1359 | 0, /* rightshift */ |
| 1360 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1361 | 32, /* bitsize */ |
| 1362 | FALSE, /* pc_relative */ |
| 1363 | 0, /* bitpos */ |
| 1364 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1365 | NULL, /* special_function */ |
| 1366 | "R_ARM_TLS_GOTDESC", /* name */ |
| 1367 | TRUE, /* partial_inplace */ |
| 1368 | 0xffffffff, /* src_mask */ |
| 1369 | 0xffffffff, /* dst_mask */ |
| 1370 | FALSE), /* pcrel_offset */ |
| 1371 | |
| 1372 | HOWTO (R_ARM_TLS_CALL, /* type */ |
| 1373 | 0, /* rightshift */ |
| 1374 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1375 | 24, /* bitsize */ |
| 1376 | FALSE, /* pc_relative */ |
| 1377 | 0, /* bitpos */ |
| 1378 | complain_overflow_dont,/* complain_on_overflow */ |
| 1379 | bfd_elf_generic_reloc, /* special_function */ |
| 1380 | "R_ARM_TLS_CALL", /* name */ |
| 1381 | FALSE, /* partial_inplace */ |
| 1382 | 0x00ffffff, /* src_mask */ |
| 1383 | 0x00ffffff, /* dst_mask */ |
| 1384 | FALSE), /* pcrel_offset */ |
| 1385 | |
| 1386 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ |
| 1387 | 0, /* rightshift */ |
| 1388 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1389 | 0, /* bitsize */ |
| 1390 | FALSE, /* pc_relative */ |
| 1391 | 0, /* bitpos */ |
| 1392 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1393 | bfd_elf_generic_reloc, /* special_function */ |
| 1394 | "R_ARM_TLS_DESCSEQ", /* name */ |
| 1395 | FALSE, /* partial_inplace */ |
| 1396 | 0x00000000, /* src_mask */ |
| 1397 | 0x00000000, /* dst_mask */ |
| 1398 | FALSE), /* pcrel_offset */ |
| 1399 | |
| 1400 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ |
| 1401 | 0, /* rightshift */ |
| 1402 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1403 | 24, /* bitsize */ |
| 1404 | FALSE, /* pc_relative */ |
| 1405 | 0, /* bitpos */ |
| 1406 | complain_overflow_dont,/* complain_on_overflow */ |
| 1407 | bfd_elf_generic_reloc, /* special_function */ |
| 1408 | "R_ARM_THM_TLS_CALL", /* name */ |
| 1409 | FALSE, /* partial_inplace */ |
| 1410 | 0x07ff07ff, /* src_mask */ |
| 1411 | 0x07ff07ff, /* dst_mask */ |
| 1412 | FALSE), /* pcrel_offset */ |
| 1413 | |
| 1414 | HOWTO (R_ARM_PLT32_ABS, /* type */ |
| 1415 | 0, /* rightshift */ |
| 1416 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1417 | 32, /* bitsize */ |
| 1418 | FALSE, /* pc_relative */ |
| 1419 | 0, /* bitpos */ |
| 1420 | complain_overflow_dont,/* complain_on_overflow */ |
| 1421 | bfd_elf_generic_reloc, /* special_function */ |
| 1422 | "R_ARM_PLT32_ABS", /* name */ |
| 1423 | FALSE, /* partial_inplace */ |
| 1424 | 0xffffffff, /* src_mask */ |
| 1425 | 0xffffffff, /* dst_mask */ |
| 1426 | FALSE), /* pcrel_offset */ |
| 1427 | |
| 1428 | HOWTO (R_ARM_GOT_ABS, /* type */ |
| 1429 | 0, /* rightshift */ |
| 1430 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1431 | 32, /* bitsize */ |
| 1432 | FALSE, /* pc_relative */ |
| 1433 | 0, /* bitpos */ |
| 1434 | complain_overflow_dont,/* complain_on_overflow */ |
| 1435 | bfd_elf_generic_reloc, /* special_function */ |
| 1436 | "R_ARM_GOT_ABS", /* name */ |
| 1437 | FALSE, /* partial_inplace */ |
| 1438 | 0xffffffff, /* src_mask */ |
| 1439 | 0xffffffff, /* dst_mask */ |
| 1440 | FALSE), /* pcrel_offset */ |
| 1441 | |
| 1442 | HOWTO (R_ARM_GOT_PREL, /* type */ |
| 1443 | 0, /* rightshift */ |
| 1444 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1445 | 32, /* bitsize */ |
| 1446 | TRUE, /* pc_relative */ |
| 1447 | 0, /* bitpos */ |
| 1448 | complain_overflow_dont, /* complain_on_overflow */ |
| 1449 | bfd_elf_generic_reloc, /* special_function */ |
| 1450 | "R_ARM_GOT_PREL", /* name */ |
| 1451 | FALSE, /* partial_inplace */ |
| 1452 | 0xffffffff, /* src_mask */ |
| 1453 | 0xffffffff, /* dst_mask */ |
| 1454 | TRUE), /* pcrel_offset */ |
| 1455 | |
| 1456 | HOWTO (R_ARM_GOT_BREL12, /* type */ |
| 1457 | 0, /* rightshift */ |
| 1458 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1459 | 12, /* bitsize */ |
| 1460 | FALSE, /* pc_relative */ |
| 1461 | 0, /* bitpos */ |
| 1462 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1463 | bfd_elf_generic_reloc, /* special_function */ |
| 1464 | "R_ARM_GOT_BREL12", /* name */ |
| 1465 | FALSE, /* partial_inplace */ |
| 1466 | 0x00000fff, /* src_mask */ |
| 1467 | 0x00000fff, /* dst_mask */ |
| 1468 | FALSE), /* pcrel_offset */ |
| 1469 | |
| 1470 | HOWTO (R_ARM_GOTOFF12, /* type */ |
| 1471 | 0, /* rightshift */ |
| 1472 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1473 | 12, /* bitsize */ |
| 1474 | FALSE, /* pc_relative */ |
| 1475 | 0, /* bitpos */ |
| 1476 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1477 | bfd_elf_generic_reloc, /* special_function */ |
| 1478 | "R_ARM_GOTOFF12", /* name */ |
| 1479 | FALSE, /* partial_inplace */ |
| 1480 | 0x00000fff, /* src_mask */ |
| 1481 | 0x00000fff, /* dst_mask */ |
| 1482 | FALSE), /* pcrel_offset */ |
| 1483 | |
| 1484 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ |
| 1485 | |
| 1486 | /* GNU extension to record C++ vtable member usage */ |
| 1487 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ |
| 1488 | 0, /* rightshift */ |
| 1489 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1490 | 0, /* bitsize */ |
| 1491 | FALSE, /* pc_relative */ |
| 1492 | 0, /* bitpos */ |
| 1493 | complain_overflow_dont, /* complain_on_overflow */ |
| 1494 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ |
| 1495 | "R_ARM_GNU_VTENTRY", /* name */ |
| 1496 | FALSE, /* partial_inplace */ |
| 1497 | 0, /* src_mask */ |
| 1498 | 0, /* dst_mask */ |
| 1499 | FALSE), /* pcrel_offset */ |
| 1500 | |
| 1501 | /* GNU extension to record C++ vtable hierarchy */ |
| 1502 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ |
| 1503 | 0, /* rightshift */ |
| 1504 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1505 | 0, /* bitsize */ |
| 1506 | FALSE, /* pc_relative */ |
| 1507 | 0, /* bitpos */ |
| 1508 | complain_overflow_dont, /* complain_on_overflow */ |
| 1509 | NULL, /* special_function */ |
| 1510 | "R_ARM_GNU_VTINHERIT", /* name */ |
| 1511 | FALSE, /* partial_inplace */ |
| 1512 | 0, /* src_mask */ |
| 1513 | 0, /* dst_mask */ |
| 1514 | FALSE), /* pcrel_offset */ |
| 1515 | |
| 1516 | HOWTO (R_ARM_THM_JUMP11, /* type */ |
| 1517 | 1, /* rightshift */ |
| 1518 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1519 | 11, /* bitsize */ |
| 1520 | TRUE, /* pc_relative */ |
| 1521 | 0, /* bitpos */ |
| 1522 | complain_overflow_signed, /* complain_on_overflow */ |
| 1523 | bfd_elf_generic_reloc, /* special_function */ |
| 1524 | "R_ARM_THM_JUMP11", /* name */ |
| 1525 | FALSE, /* partial_inplace */ |
| 1526 | 0x000007ff, /* src_mask */ |
| 1527 | 0x000007ff, /* dst_mask */ |
| 1528 | TRUE), /* pcrel_offset */ |
| 1529 | |
| 1530 | HOWTO (R_ARM_THM_JUMP8, /* type */ |
| 1531 | 1, /* rightshift */ |
| 1532 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1533 | 8, /* bitsize */ |
| 1534 | TRUE, /* pc_relative */ |
| 1535 | 0, /* bitpos */ |
| 1536 | complain_overflow_signed, /* complain_on_overflow */ |
| 1537 | bfd_elf_generic_reloc, /* special_function */ |
| 1538 | "R_ARM_THM_JUMP8", /* name */ |
| 1539 | FALSE, /* partial_inplace */ |
| 1540 | 0x000000ff, /* src_mask */ |
| 1541 | 0x000000ff, /* dst_mask */ |
| 1542 | TRUE), /* pcrel_offset */ |
| 1543 | |
| 1544 | /* TLS relocations */ |
| 1545 | HOWTO (R_ARM_TLS_GD32, /* type */ |
| 1546 | 0, /* rightshift */ |
| 1547 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1548 | 32, /* bitsize */ |
| 1549 | FALSE, /* pc_relative */ |
| 1550 | 0, /* bitpos */ |
| 1551 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1552 | NULL, /* special_function */ |
| 1553 | "R_ARM_TLS_GD32", /* name */ |
| 1554 | TRUE, /* partial_inplace */ |
| 1555 | 0xffffffff, /* src_mask */ |
| 1556 | 0xffffffff, /* dst_mask */ |
| 1557 | FALSE), /* pcrel_offset */ |
| 1558 | |
| 1559 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
| 1560 | 0, /* rightshift */ |
| 1561 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1562 | 32, /* bitsize */ |
| 1563 | FALSE, /* pc_relative */ |
| 1564 | 0, /* bitpos */ |
| 1565 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1566 | bfd_elf_generic_reloc, /* special_function */ |
| 1567 | "R_ARM_TLS_LDM32", /* name */ |
| 1568 | TRUE, /* partial_inplace */ |
| 1569 | 0xffffffff, /* src_mask */ |
| 1570 | 0xffffffff, /* dst_mask */ |
| 1571 | FALSE), /* pcrel_offset */ |
| 1572 | |
| 1573 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
| 1574 | 0, /* rightshift */ |
| 1575 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1576 | 32, /* bitsize */ |
| 1577 | FALSE, /* pc_relative */ |
| 1578 | 0, /* bitpos */ |
| 1579 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1580 | bfd_elf_generic_reloc, /* special_function */ |
| 1581 | "R_ARM_TLS_LDO32", /* name */ |
| 1582 | TRUE, /* partial_inplace */ |
| 1583 | 0xffffffff, /* src_mask */ |
| 1584 | 0xffffffff, /* dst_mask */ |
| 1585 | FALSE), /* pcrel_offset */ |
| 1586 | |
| 1587 | HOWTO (R_ARM_TLS_IE32, /* type */ |
| 1588 | 0, /* rightshift */ |
| 1589 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1590 | 32, /* bitsize */ |
| 1591 | FALSE, /* pc_relative */ |
| 1592 | 0, /* bitpos */ |
| 1593 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1594 | NULL, /* special_function */ |
| 1595 | "R_ARM_TLS_IE32", /* name */ |
| 1596 | TRUE, /* partial_inplace */ |
| 1597 | 0xffffffff, /* src_mask */ |
| 1598 | 0xffffffff, /* dst_mask */ |
| 1599 | FALSE), /* pcrel_offset */ |
| 1600 | |
| 1601 | HOWTO (R_ARM_TLS_LE32, /* type */ |
| 1602 | 0, /* rightshift */ |
| 1603 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1604 | 32, /* bitsize */ |
| 1605 | FALSE, /* pc_relative */ |
| 1606 | 0, /* bitpos */ |
| 1607 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1608 | NULL, /* special_function */ |
| 1609 | "R_ARM_TLS_LE32", /* name */ |
| 1610 | TRUE, /* partial_inplace */ |
| 1611 | 0xffffffff, /* src_mask */ |
| 1612 | 0xffffffff, /* dst_mask */ |
| 1613 | FALSE), /* pcrel_offset */ |
| 1614 | |
| 1615 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
| 1616 | 0, /* rightshift */ |
| 1617 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1618 | 12, /* bitsize */ |
| 1619 | FALSE, /* pc_relative */ |
| 1620 | 0, /* bitpos */ |
| 1621 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1622 | bfd_elf_generic_reloc, /* special_function */ |
| 1623 | "R_ARM_TLS_LDO12", /* name */ |
| 1624 | FALSE, /* partial_inplace */ |
| 1625 | 0x00000fff, /* src_mask */ |
| 1626 | 0x00000fff, /* dst_mask */ |
| 1627 | FALSE), /* pcrel_offset */ |
| 1628 | |
| 1629 | HOWTO (R_ARM_TLS_LE12, /* type */ |
| 1630 | 0, /* rightshift */ |
| 1631 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1632 | 12, /* bitsize */ |
| 1633 | FALSE, /* pc_relative */ |
| 1634 | 0, /* bitpos */ |
| 1635 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1636 | bfd_elf_generic_reloc, /* special_function */ |
| 1637 | "R_ARM_TLS_LE12", /* name */ |
| 1638 | FALSE, /* partial_inplace */ |
| 1639 | 0x00000fff, /* src_mask */ |
| 1640 | 0x00000fff, /* dst_mask */ |
| 1641 | FALSE), /* pcrel_offset */ |
| 1642 | |
| 1643 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
| 1644 | 0, /* rightshift */ |
| 1645 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1646 | 12, /* bitsize */ |
| 1647 | FALSE, /* pc_relative */ |
| 1648 | 0, /* bitpos */ |
| 1649 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1650 | bfd_elf_generic_reloc, /* special_function */ |
| 1651 | "R_ARM_TLS_IE12GP", /* name */ |
| 1652 | FALSE, /* partial_inplace */ |
| 1653 | 0x00000fff, /* src_mask */ |
| 1654 | 0x00000fff, /* dst_mask */ |
| 1655 | FALSE), /* pcrel_offset */ |
| 1656 | |
| 1657 | /* 112-127 private relocations. */ |
| 1658 | EMPTY_HOWTO (112), |
| 1659 | EMPTY_HOWTO (113), |
| 1660 | EMPTY_HOWTO (114), |
| 1661 | EMPTY_HOWTO (115), |
| 1662 | EMPTY_HOWTO (116), |
| 1663 | EMPTY_HOWTO (117), |
| 1664 | EMPTY_HOWTO (118), |
| 1665 | EMPTY_HOWTO (119), |
| 1666 | EMPTY_HOWTO (120), |
| 1667 | EMPTY_HOWTO (121), |
| 1668 | EMPTY_HOWTO (122), |
| 1669 | EMPTY_HOWTO (123), |
| 1670 | EMPTY_HOWTO (124), |
| 1671 | EMPTY_HOWTO (125), |
| 1672 | EMPTY_HOWTO (126), |
| 1673 | EMPTY_HOWTO (127), |
| 1674 | |
| 1675 | /* R_ARM_ME_TOO, obsolete. */ |
| 1676 | EMPTY_HOWTO (128), |
| 1677 | |
| 1678 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ |
| 1679 | 0, /* rightshift */ |
| 1680 | 1, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1681 | 0, /* bitsize */ |
| 1682 | FALSE, /* pc_relative */ |
| 1683 | 0, /* bitpos */ |
| 1684 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1685 | bfd_elf_generic_reloc, /* special_function */ |
| 1686 | "R_ARM_THM_TLS_DESCSEQ",/* name */ |
| 1687 | FALSE, /* partial_inplace */ |
| 1688 | 0x00000000, /* src_mask */ |
| 1689 | 0x00000000, /* dst_mask */ |
| 1690 | FALSE), /* pcrel_offset */ |
| 1691 | EMPTY_HOWTO (130), |
| 1692 | EMPTY_HOWTO (131), |
| 1693 | HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */ |
| 1694 | 0, /* rightshift. */ |
| 1695 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1696 | 16, /* bitsize. */ |
| 1697 | FALSE, /* pc_relative. */ |
| 1698 | 0, /* bitpos. */ |
| 1699 | complain_overflow_bitfield,/* complain_on_overflow. */ |
| 1700 | bfd_elf_generic_reloc, /* special_function. */ |
| 1701 | "R_ARM_THM_ALU_ABS_G0_NC",/* name. */ |
| 1702 | FALSE, /* partial_inplace. */ |
| 1703 | 0x00000000, /* src_mask. */ |
| 1704 | 0x00000000, /* dst_mask. */ |
| 1705 | FALSE), /* pcrel_offset. */ |
| 1706 | HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */ |
| 1707 | 0, /* rightshift. */ |
| 1708 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1709 | 16, /* bitsize. */ |
| 1710 | FALSE, /* pc_relative. */ |
| 1711 | 0, /* bitpos. */ |
| 1712 | complain_overflow_bitfield,/* complain_on_overflow. */ |
| 1713 | bfd_elf_generic_reloc, /* special_function. */ |
| 1714 | "R_ARM_THM_ALU_ABS_G1_NC",/* name. */ |
| 1715 | FALSE, /* partial_inplace. */ |
| 1716 | 0x00000000, /* src_mask. */ |
| 1717 | 0x00000000, /* dst_mask. */ |
| 1718 | FALSE), /* pcrel_offset. */ |
| 1719 | HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */ |
| 1720 | 0, /* rightshift. */ |
| 1721 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1722 | 16, /* bitsize. */ |
| 1723 | FALSE, /* pc_relative. */ |
| 1724 | 0, /* bitpos. */ |
| 1725 | complain_overflow_bitfield,/* complain_on_overflow. */ |
| 1726 | bfd_elf_generic_reloc, /* special_function. */ |
| 1727 | "R_ARM_THM_ALU_ABS_G2_NC",/* name. */ |
| 1728 | FALSE, /* partial_inplace. */ |
| 1729 | 0x00000000, /* src_mask. */ |
| 1730 | 0x00000000, /* dst_mask. */ |
| 1731 | FALSE), /* pcrel_offset. */ |
| 1732 | HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */ |
| 1733 | 0, /* rightshift. */ |
| 1734 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1735 | 16, /* bitsize. */ |
| 1736 | FALSE, /* pc_relative. */ |
| 1737 | 0, /* bitpos. */ |
| 1738 | complain_overflow_bitfield,/* complain_on_overflow. */ |
| 1739 | bfd_elf_generic_reloc, /* special_function. */ |
| 1740 | "R_ARM_THM_ALU_ABS_G3_NC",/* name. */ |
| 1741 | FALSE, /* partial_inplace. */ |
| 1742 | 0x00000000, /* src_mask. */ |
| 1743 | 0x00000000, /* dst_mask. */ |
| 1744 | FALSE), /* pcrel_offset. */ |
| 1745 | /* Relocations for Armv8.1-M Mainline. */ |
| 1746 | HOWTO (R_ARM_THM_BF16, /* type. */ |
| 1747 | 0, /* rightshift. */ |
| 1748 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1749 | 16, /* bitsize. */ |
| 1750 | TRUE, /* pc_relative. */ |
| 1751 | 0, /* bitpos. */ |
| 1752 | complain_overflow_dont,/* do not complain_on_overflow. */ |
| 1753 | bfd_elf_generic_reloc, /* special_function. */ |
| 1754 | "R_ARM_THM_BF16", /* name. */ |
| 1755 | FALSE, /* partial_inplace. */ |
| 1756 | 0x001f0ffe, /* src_mask. */ |
| 1757 | 0x001f0ffe, /* dst_mask. */ |
| 1758 | TRUE), /* pcrel_offset. */ |
| 1759 | HOWTO (R_ARM_THM_BF12, /* type. */ |
| 1760 | 0, /* rightshift. */ |
| 1761 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1762 | 12, /* bitsize. */ |
| 1763 | TRUE, /* pc_relative. */ |
| 1764 | 0, /* bitpos. */ |
| 1765 | complain_overflow_dont,/* do not complain_on_overflow. */ |
| 1766 | bfd_elf_generic_reloc, /* special_function. */ |
| 1767 | "R_ARM_THM_BF12", /* name. */ |
| 1768 | FALSE, /* partial_inplace. */ |
| 1769 | 0x00010ffe, /* src_mask. */ |
| 1770 | 0x00010ffe, /* dst_mask. */ |
| 1771 | TRUE), /* pcrel_offset. */ |
| 1772 | HOWTO (R_ARM_THM_BF18, /* type. */ |
| 1773 | 0, /* rightshift. */ |
| 1774 | 1, /* size (0 = byte, 1 = short, 2 = long). */ |
| 1775 | 18, /* bitsize. */ |
| 1776 | TRUE, /* pc_relative. */ |
| 1777 | 0, /* bitpos. */ |
| 1778 | complain_overflow_dont,/* do not complain_on_overflow. */ |
| 1779 | bfd_elf_generic_reloc, /* special_function. */ |
| 1780 | "R_ARM_THM_BF18", /* name. */ |
| 1781 | FALSE, /* partial_inplace. */ |
| 1782 | 0x007f0ffe, /* src_mask. */ |
| 1783 | 0x007f0ffe, /* dst_mask. */ |
| 1784 | TRUE), /* pcrel_offset. */ |
| 1785 | }; |
| 1786 | |
| 1787 | /* 160 onwards: */ |
| 1788 | static reloc_howto_type elf32_arm_howto_table_2[8] = |
| 1789 | { |
| 1790 | HOWTO (R_ARM_IRELATIVE, /* type */ |
| 1791 | 0, /* rightshift */ |
| 1792 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1793 | 32, /* bitsize */ |
| 1794 | FALSE, /* pc_relative */ |
| 1795 | 0, /* bitpos */ |
| 1796 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1797 | bfd_elf_generic_reloc, /* special_function */ |
| 1798 | "R_ARM_IRELATIVE", /* name */ |
| 1799 | TRUE, /* partial_inplace */ |
| 1800 | 0xffffffff, /* src_mask */ |
| 1801 | 0xffffffff, /* dst_mask */ |
| 1802 | FALSE), /* pcrel_offset */ |
| 1803 | HOWTO (R_ARM_GOTFUNCDESC, /* type */ |
| 1804 | 0, /* rightshift */ |
| 1805 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1806 | 32, /* bitsize */ |
| 1807 | FALSE, /* pc_relative */ |
| 1808 | 0, /* bitpos */ |
| 1809 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1810 | bfd_elf_generic_reloc, /* special_function */ |
| 1811 | "R_ARM_GOTFUNCDESC", /* name */ |
| 1812 | FALSE, /* partial_inplace */ |
| 1813 | 0, /* src_mask */ |
| 1814 | 0xffffffff, /* dst_mask */ |
| 1815 | FALSE), /* pcrel_offset */ |
| 1816 | HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */ |
| 1817 | 0, /* rightshift */ |
| 1818 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1819 | 32, /* bitsize */ |
| 1820 | FALSE, /* pc_relative */ |
| 1821 | 0, /* bitpos */ |
| 1822 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1823 | bfd_elf_generic_reloc, /* special_function */ |
| 1824 | "R_ARM_GOTOFFFUNCDESC",/* name */ |
| 1825 | FALSE, /* partial_inplace */ |
| 1826 | 0, /* src_mask */ |
| 1827 | 0xffffffff, /* dst_mask */ |
| 1828 | FALSE), /* pcrel_offset */ |
| 1829 | HOWTO (R_ARM_FUNCDESC, /* type */ |
| 1830 | 0, /* rightshift */ |
| 1831 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1832 | 32, /* bitsize */ |
| 1833 | FALSE, /* pc_relative */ |
| 1834 | 0, /* bitpos */ |
| 1835 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1836 | bfd_elf_generic_reloc, /* special_function */ |
| 1837 | "R_ARM_FUNCDESC", /* name */ |
| 1838 | FALSE, /* partial_inplace */ |
| 1839 | 0, /* src_mask */ |
| 1840 | 0xffffffff, /* dst_mask */ |
| 1841 | FALSE), /* pcrel_offset */ |
| 1842 | HOWTO (R_ARM_FUNCDESC_VALUE, /* type */ |
| 1843 | 0, /* rightshift */ |
| 1844 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1845 | 64, /* bitsize */ |
| 1846 | FALSE, /* pc_relative */ |
| 1847 | 0, /* bitpos */ |
| 1848 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1849 | bfd_elf_generic_reloc, /* special_function */ |
| 1850 | "R_ARM_FUNCDESC_VALUE",/* name */ |
| 1851 | FALSE, /* partial_inplace */ |
| 1852 | 0, /* src_mask */ |
| 1853 | 0xffffffff, /* dst_mask */ |
| 1854 | FALSE), /* pcrel_offset */ |
| 1855 | HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */ |
| 1856 | 0, /* rightshift */ |
| 1857 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1858 | 32, /* bitsize */ |
| 1859 | FALSE, /* pc_relative */ |
| 1860 | 0, /* bitpos */ |
| 1861 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1862 | bfd_elf_generic_reloc, /* special_function */ |
| 1863 | "R_ARM_TLS_GD32_FDPIC",/* name */ |
| 1864 | FALSE, /* partial_inplace */ |
| 1865 | 0, /* src_mask */ |
| 1866 | 0xffffffff, /* dst_mask */ |
| 1867 | FALSE), /* pcrel_offset */ |
| 1868 | HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */ |
| 1869 | 0, /* rightshift */ |
| 1870 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1871 | 32, /* bitsize */ |
| 1872 | FALSE, /* pc_relative */ |
| 1873 | 0, /* bitpos */ |
| 1874 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1875 | bfd_elf_generic_reloc, /* special_function */ |
| 1876 | "R_ARM_TLS_LDM32_FDPIC",/* name */ |
| 1877 | FALSE, /* partial_inplace */ |
| 1878 | 0, /* src_mask */ |
| 1879 | 0xffffffff, /* dst_mask */ |
| 1880 | FALSE), /* pcrel_offset */ |
| 1881 | HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */ |
| 1882 | 0, /* rightshift */ |
| 1883 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1884 | 32, /* bitsize */ |
| 1885 | FALSE, /* pc_relative */ |
| 1886 | 0, /* bitpos */ |
| 1887 | complain_overflow_bitfield,/* complain_on_overflow */ |
| 1888 | bfd_elf_generic_reloc, /* special_function */ |
| 1889 | "R_ARM_TLS_IE32_FDPIC",/* name */ |
| 1890 | FALSE, /* partial_inplace */ |
| 1891 | 0, /* src_mask */ |
| 1892 | 0xffffffff, /* dst_mask */ |
| 1893 | FALSE), /* pcrel_offset */ |
| 1894 | }; |
| 1895 | |
| 1896 | /* 249-255 extended, currently unused, relocations: */ |
| 1897 | static reloc_howto_type elf32_arm_howto_table_3[4] = |
| 1898 | { |
| 1899 | HOWTO (R_ARM_RREL32, /* type */ |
| 1900 | 0, /* rightshift */ |
| 1901 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1902 | 0, /* bitsize */ |
| 1903 | FALSE, /* pc_relative */ |
| 1904 | 0, /* bitpos */ |
| 1905 | complain_overflow_dont,/* complain_on_overflow */ |
| 1906 | bfd_elf_generic_reloc, /* special_function */ |
| 1907 | "R_ARM_RREL32", /* name */ |
| 1908 | FALSE, /* partial_inplace */ |
| 1909 | 0, /* src_mask */ |
| 1910 | 0, /* dst_mask */ |
| 1911 | FALSE), /* pcrel_offset */ |
| 1912 | |
| 1913 | HOWTO (R_ARM_RABS32, /* type */ |
| 1914 | 0, /* rightshift */ |
| 1915 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1916 | 0, /* bitsize */ |
| 1917 | FALSE, /* pc_relative */ |
| 1918 | 0, /* bitpos */ |
| 1919 | complain_overflow_dont,/* complain_on_overflow */ |
| 1920 | bfd_elf_generic_reloc, /* special_function */ |
| 1921 | "R_ARM_RABS32", /* name */ |
| 1922 | FALSE, /* partial_inplace */ |
| 1923 | 0, /* src_mask */ |
| 1924 | 0, /* dst_mask */ |
| 1925 | FALSE), /* pcrel_offset */ |
| 1926 | |
| 1927 | HOWTO (R_ARM_RPC24, /* type */ |
| 1928 | 0, /* rightshift */ |
| 1929 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1930 | 0, /* bitsize */ |
| 1931 | FALSE, /* pc_relative */ |
| 1932 | 0, /* bitpos */ |
| 1933 | complain_overflow_dont,/* complain_on_overflow */ |
| 1934 | bfd_elf_generic_reloc, /* special_function */ |
| 1935 | "R_ARM_RPC24", /* name */ |
| 1936 | FALSE, /* partial_inplace */ |
| 1937 | 0, /* src_mask */ |
| 1938 | 0, /* dst_mask */ |
| 1939 | FALSE), /* pcrel_offset */ |
| 1940 | |
| 1941 | HOWTO (R_ARM_RBASE, /* type */ |
| 1942 | 0, /* rightshift */ |
| 1943 | 0, /* size (0 = byte, 1 = short, 2 = long) */ |
| 1944 | 0, /* bitsize */ |
| 1945 | FALSE, /* pc_relative */ |
| 1946 | 0, /* bitpos */ |
| 1947 | complain_overflow_dont,/* complain_on_overflow */ |
| 1948 | bfd_elf_generic_reloc, /* special_function */ |
| 1949 | "R_ARM_RBASE", /* name */ |
| 1950 | FALSE, /* partial_inplace */ |
| 1951 | 0, /* src_mask */ |
| 1952 | 0, /* dst_mask */ |
| 1953 | FALSE) /* pcrel_offset */ |
| 1954 | }; |
| 1955 | |
| 1956 | static reloc_howto_type * |
| 1957 | elf32_arm_howto_from_type (unsigned int r_type) |
| 1958 | { |
| 1959 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
| 1960 | return &elf32_arm_howto_table_1[r_type]; |
| 1961 | |
| 1962 | if (r_type >= R_ARM_IRELATIVE |
| 1963 | && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2)) |
| 1964 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; |
| 1965 | |
| 1966 | if (r_type >= R_ARM_RREL32 |
| 1967 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
| 1968 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; |
| 1969 | |
| 1970 | return NULL; |
| 1971 | } |
| 1972 | |
| 1973 | static bfd_boolean |
| 1974 | elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc, |
| 1975 | Elf_Internal_Rela * elf_reloc) |
| 1976 | { |
| 1977 | unsigned int r_type; |
| 1978 | |
| 1979 | r_type = ELF32_R_TYPE (elf_reloc->r_info); |
| 1980 | if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL) |
| 1981 | { |
| 1982 | /* xgettext:c-format */ |
| 1983 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), |
| 1984 | abfd, r_type); |
| 1985 | bfd_set_error (bfd_error_bad_value); |
| 1986 | return FALSE; |
| 1987 | } |
| 1988 | return TRUE; |
| 1989 | } |
| 1990 | |
| 1991 | struct elf32_arm_reloc_map |
| 1992 | { |
| 1993 | bfd_reloc_code_real_type bfd_reloc_val; |
| 1994 | unsigned char elf_reloc_val; |
| 1995 | }; |
| 1996 | |
| 1997 | /* All entries in this list must also be present in elf32_arm_howto_table. */ |
| 1998 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = |
| 1999 | { |
| 2000 | {BFD_RELOC_NONE, R_ARM_NONE}, |
| 2001 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, |
| 2002 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
| 2003 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, |
| 2004 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
| 2005 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, |
| 2006 | {BFD_RELOC_32, R_ARM_ABS32}, |
| 2007 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, |
| 2008 | {BFD_RELOC_8, R_ARM_ABS8}, |
| 2009 | {BFD_RELOC_16, R_ARM_ABS16}, |
| 2010 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, |
| 2011 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, |
| 2012 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
| 2013 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, |
| 2014 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, |
| 2015 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, |
| 2016 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, |
| 2017 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, |
| 2018 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
| 2019 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, |
| 2020 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, |
| 2021 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, |
| 2022 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, |
| 2023 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, |
| 2024 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, |
| 2025 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, |
| 2026 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, |
| 2027 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, |
| 2028 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, |
| 2029 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, |
| 2030 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
| 2031 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, |
| 2032 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, |
| 2033 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, |
| 2034 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, |
| 2035 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, |
| 2036 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, |
| 2037 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, |
| 2038 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
| 2039 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, |
| 2040 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, |
| 2041 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, |
| 2042 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, |
| 2043 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, |
| 2044 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, |
| 2045 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, |
| 2046 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, |
| 2047 | {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC}, |
| 2048 | {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC}, |
| 2049 | {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC}, |
| 2050 | {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE}, |
| 2051 | {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC}, |
| 2052 | {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC}, |
| 2053 | {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC}, |
| 2054 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
| 2055 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, |
| 2056 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
| 2057 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, |
| 2058 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, |
| 2059 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, |
| 2060 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, |
| 2061 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, |
| 2062 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, |
| 2063 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, |
| 2064 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
| 2065 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, |
| 2066 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, |
| 2067 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, |
| 2068 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, |
| 2069 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, |
| 2070 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, |
| 2071 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, |
| 2072 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, |
| 2073 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, |
| 2074 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, |
| 2075 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, |
| 2076 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, |
| 2077 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, |
| 2078 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, |
| 2079 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, |
| 2080 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, |
| 2081 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, |
| 2082 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, |
| 2083 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, |
| 2084 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, |
| 2085 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, |
| 2086 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, |
| 2087 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, |
| 2088 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, |
| 2089 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, |
| 2090 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, |
| 2091 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
| 2092 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}, |
| 2093 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC}, |
| 2094 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC}, |
| 2095 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC}, |
| 2096 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}, |
| 2097 | {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16}, |
| 2098 | {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12}, |
| 2099 | {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18} |
| 2100 | }; |
| 2101 | |
| 2102 | static reloc_howto_type * |
| 2103 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
| 2104 | bfd_reloc_code_real_type code) |
| 2105 | { |
| 2106 | unsigned int i; |
| 2107 | |
| 2108 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
| 2109 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
| 2110 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); |
| 2111 | |
| 2112 | return NULL; |
| 2113 | } |
| 2114 | |
| 2115 | static reloc_howto_type * |
| 2116 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
| 2117 | const char *r_name) |
| 2118 | { |
| 2119 | unsigned int i; |
| 2120 | |
| 2121 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
| 2122 | if (elf32_arm_howto_table_1[i].name != NULL |
| 2123 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) |
| 2124 | return &elf32_arm_howto_table_1[i]; |
| 2125 | |
| 2126 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
| 2127 | if (elf32_arm_howto_table_2[i].name != NULL |
| 2128 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) |
| 2129 | return &elf32_arm_howto_table_2[i]; |
| 2130 | |
| 2131 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
| 2132 | if (elf32_arm_howto_table_3[i].name != NULL |
| 2133 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) |
| 2134 | return &elf32_arm_howto_table_3[i]; |
| 2135 | |
| 2136 | return NULL; |
| 2137 | } |
| 2138 | |
| 2139 | /* Support for core dump NOTE sections. */ |
| 2140 | |
| 2141 | static bfd_boolean |
| 2142 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
| 2143 | { |
| 2144 | int offset; |
| 2145 | size_t size; |
| 2146 | |
| 2147 | switch (note->descsz) |
| 2148 | { |
| 2149 | default: |
| 2150 | return FALSE; |
| 2151 | |
| 2152 | case 148: /* Linux/ARM 32-bit. */ |
| 2153 | /* pr_cursig */ |
| 2154 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
| 2155 | |
| 2156 | /* pr_pid */ |
| 2157 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
| 2158 | |
| 2159 | /* pr_reg */ |
| 2160 | offset = 72; |
| 2161 | size = 72; |
| 2162 | |
| 2163 | break; |
| 2164 | } |
| 2165 | |
| 2166 | /* Make a ".reg/999" section. */ |
| 2167 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", |
| 2168 | size, note->descpos + offset); |
| 2169 | } |
| 2170 | |
| 2171 | static bfd_boolean |
| 2172 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
| 2173 | { |
| 2174 | switch (note->descsz) |
| 2175 | { |
| 2176 | default: |
| 2177 | return FALSE; |
| 2178 | |
| 2179 | case 124: /* Linux/ARM elf_prpsinfo. */ |
| 2180 | elf_tdata (abfd)->core->pid |
| 2181 | = bfd_get_32 (abfd, note->descdata + 12); |
| 2182 | elf_tdata (abfd)->core->program |
| 2183 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); |
| 2184 | elf_tdata (abfd)->core->command |
| 2185 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); |
| 2186 | } |
| 2187 | |
| 2188 | /* Note that for some reason, a spurious space is tacked |
| 2189 | onto the end of the args in some (at least one anyway) |
| 2190 | implementations, so strip it off if it exists. */ |
| 2191 | { |
| 2192 | char *command = elf_tdata (abfd)->core->command; |
| 2193 | int n = strlen (command); |
| 2194 | |
| 2195 | if (0 < n && command[n - 1] == ' ') |
| 2196 | command[n - 1] = '\0'; |
| 2197 | } |
| 2198 | |
| 2199 | return TRUE; |
| 2200 | } |
| 2201 | |
| 2202 | static char * |
| 2203 | elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz, |
| 2204 | int note_type, ...) |
| 2205 | { |
| 2206 | switch (note_type) |
| 2207 | { |
| 2208 | default: |
| 2209 | return NULL; |
| 2210 | |
| 2211 | case NT_PRPSINFO: |
| 2212 | { |
| 2213 | char data[124] ATTRIBUTE_NONSTRING; |
| 2214 | va_list ap; |
| 2215 | |
| 2216 | va_start (ap, note_type); |
| 2217 | memset (data, 0, sizeof (data)); |
| 2218 | strncpy (data + 28, va_arg (ap, const char *), 16); |
| 2219 | #if GCC_VERSION == 8000 || GCC_VERSION == 8001 |
| 2220 | DIAGNOSTIC_PUSH; |
| 2221 | /* GCC 8.0 and 8.1 warn about 80 equals destination size with |
| 2222 | -Wstringop-truncation: |
| 2223 | https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643 |
| 2224 | */ |
| 2225 | DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION; |
| 2226 | #endif |
| 2227 | strncpy (data + 44, va_arg (ap, const char *), 80); |
| 2228 | #if GCC_VERSION == 8000 || GCC_VERSION == 8001 |
| 2229 | DIAGNOSTIC_POP; |
| 2230 | #endif |
| 2231 | va_end (ap); |
| 2232 | |
| 2233 | return elfcore_write_note (abfd, buf, bufsiz, |
| 2234 | "CORE", note_type, data, sizeof (data)); |
| 2235 | } |
| 2236 | |
| 2237 | case NT_PRSTATUS: |
| 2238 | { |
| 2239 | char data[148]; |
| 2240 | va_list ap; |
| 2241 | long pid; |
| 2242 | int cursig; |
| 2243 | const void *greg; |
| 2244 | |
| 2245 | va_start (ap, note_type); |
| 2246 | memset (data, 0, sizeof (data)); |
| 2247 | pid = va_arg (ap, long); |
| 2248 | bfd_put_32 (abfd, pid, data + 24); |
| 2249 | cursig = va_arg (ap, int); |
| 2250 | bfd_put_16 (abfd, cursig, data + 12); |
| 2251 | greg = va_arg (ap, const void *); |
| 2252 | memcpy (data + 72, greg, 72); |
| 2253 | va_end (ap); |
| 2254 | |
| 2255 | return elfcore_write_note (abfd, buf, bufsiz, |
| 2256 | "CORE", note_type, data, sizeof (data)); |
| 2257 | } |
| 2258 | } |
| 2259 | } |
| 2260 | |
| 2261 | #define TARGET_LITTLE_SYM arm_elf32_le_vec |
| 2262 | #define TARGET_LITTLE_NAME "elf32-littlearm" |
| 2263 | #define TARGET_BIG_SYM arm_elf32_be_vec |
| 2264 | #define TARGET_BIG_NAME "elf32-bigarm" |
| 2265 | |
| 2266 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus |
| 2267 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo |
| 2268 | #define elf_backend_write_core_note elf32_arm_nabi_write_core_note |
| 2269 | |
| 2270 | typedef unsigned long int insn32; |
| 2271 | typedef unsigned short int insn16; |
| 2272 | |
| 2273 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
| 2274 | interworkable. */ |
| 2275 | #define INTERWORK_FLAG(abfd) \ |
| 2276 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
| 2277 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
| 2278 | || ((abfd)->flags & BFD_LINKER_CREATED)) |
| 2279 | |
| 2280 | /* The linker script knows the section names for placement. |
| 2281 | The entry_names are used to do simple name mangling on the stubs. |
| 2282 | Given a function name, and its type, the stub can be found. The |
| 2283 | name can be changed. The only requirement is the %s be present. */ |
| 2284 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
| 2285 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" |
| 2286 | |
| 2287 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" |
| 2288 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" |
| 2289 | |
| 2290 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
| 2291 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" |
| 2292 | |
| 2293 | #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer" |
| 2294 | #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x" |
| 2295 | |
| 2296 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
| 2297 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" |
| 2298 | |
| 2299 | #define STUB_ENTRY_NAME "__%s_veneer" |
| 2300 | |
| 2301 | #define CMSE_PREFIX "__acle_se_" |
| 2302 | |
| 2303 | #define CMSE_STUB_NAME ".gnu.sgstubs" |
| 2304 | |
| 2305 | /* The name of the dynamic interpreter. This is put in the .interp |
| 2306 | section. */ |
| 2307 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" |
| 2308 | |
| 2309 | /* FDPIC default stack size. */ |
| 2310 | #define DEFAULT_STACK_SIZE 0x8000 |
| 2311 | |
| 2312 | static const unsigned long tls_trampoline [] = |
| 2313 | { |
| 2314 | 0xe08e0000, /* add r0, lr, r0 */ |
| 2315 | 0xe5901004, /* ldr r1, [r0,#4] */ |
| 2316 | 0xe12fff11, /* bx r1 */ |
| 2317 | }; |
| 2318 | |
| 2319 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = |
| 2320 | { |
| 2321 | 0xe52d2004, /* push {r2} */ |
| 2322 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ |
| 2323 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ |
| 2324 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ |
| 2325 | 0xe081100f, /* 2: add r1, pc */ |
| 2326 | 0xe12fff12, /* bx r2 */ |
| 2327 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 |
| 2328 | + dl_tlsdesc_lazy_resolver(GOT) */ |
| 2329 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ |
| 2330 | }; |
| 2331 | |
| 2332 | /* ARM FDPIC PLT entry. */ |
| 2333 | /* The last 5 words contain PLT lazy fragment code and data. */ |
| 2334 | static const bfd_vma elf32_arm_fdpic_plt_entry [] = |
| 2335 | { |
| 2336 | 0xe59fc008, /* ldr r12, .L1 */ |
| 2337 | 0xe08cc009, /* add r12, r12, r9 */ |
| 2338 | 0xe59c9004, /* ldr r9, [r12, #4] */ |
| 2339 | 0xe59cf000, /* ldr pc, [r12] */ |
| 2340 | 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */ |
| 2341 | 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */ |
| 2342 | 0xe51fc00c, /* ldr r12, [pc, #-12] */ |
| 2343 | 0xe92d1000, /* push {r12} */ |
| 2344 | 0xe599c004, /* ldr r12, [r9, #4] */ |
| 2345 | 0xe599f000, /* ldr pc, [r9] */ |
| 2346 | }; |
| 2347 | |
| 2348 | /* Thumb FDPIC PLT entry. */ |
| 2349 | /* The last 5 words contain PLT lazy fragment code and data. */ |
| 2350 | static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] = |
| 2351 | { |
| 2352 | 0xc00cf8df, /* ldr.w r12, .L1 */ |
| 2353 | 0x0c09eb0c, /* add.w r12, r12, r9 */ |
| 2354 | 0x9004f8dc, /* ldr.w r9, [r12, #4] */ |
| 2355 | 0xf000f8dc, /* ldr.w pc, [r12] */ |
| 2356 | 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */ |
| 2357 | 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */ |
| 2358 | 0xc008f85f, /* ldr.w r12, .L2 */ |
| 2359 | 0xcd04f84d, /* push {r12} */ |
| 2360 | 0xc004f8d9, /* ldr.w r12, [r9, #4] */ |
| 2361 | 0xf000f8d9, /* ldr.w pc, [r9] */ |
| 2362 | }; |
| 2363 | |
| 2364 | #ifdef FOUR_WORD_PLT |
| 2365 | |
| 2366 | /* The first entry in a procedure linkage table looks like |
| 2367 | this. It is set up so that any shared library function that is |
| 2368 | called before the relocation has been set up calls the dynamic |
| 2369 | linker first. */ |
| 2370 | static const bfd_vma elf32_arm_plt0_entry [] = |
| 2371 | { |
| 2372 | 0xe52de004, /* str lr, [sp, #-4]! */ |
| 2373 | 0xe59fe010, /* ldr lr, [pc, #16] */ |
| 2374 | 0xe08fe00e, /* add lr, pc, lr */ |
| 2375 | 0xe5bef008, /* ldr pc, [lr, #8]! */ |
| 2376 | }; |
| 2377 | |
| 2378 | /* Subsequent entries in a procedure linkage table look like |
| 2379 | this. */ |
| 2380 | static const bfd_vma elf32_arm_plt_entry [] = |
| 2381 | { |
| 2382 | 0xe28fc600, /* add ip, pc, #NN */ |
| 2383 | 0xe28cca00, /* add ip, ip, #NN */ |
| 2384 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ |
| 2385 | 0x00000000, /* unused */ |
| 2386 | }; |
| 2387 | |
| 2388 | #else /* not FOUR_WORD_PLT */ |
| 2389 | |
| 2390 | /* The first entry in a procedure linkage table looks like |
| 2391 | this. It is set up so that any shared library function that is |
| 2392 | called before the relocation has been set up calls the dynamic |
| 2393 | linker first. */ |
| 2394 | static const bfd_vma elf32_arm_plt0_entry [] = |
| 2395 | { |
| 2396 | 0xe52de004, /* str lr, [sp, #-4]! */ |
| 2397 | 0xe59fe004, /* ldr lr, [pc, #4] */ |
| 2398 | 0xe08fe00e, /* add lr, pc, lr */ |
| 2399 | 0xe5bef008, /* ldr pc, [lr, #8]! */ |
| 2400 | 0x00000000, /* &GOT[0] - . */ |
| 2401 | }; |
| 2402 | |
| 2403 | /* By default subsequent entries in a procedure linkage table look like |
| 2404 | this. Offsets that don't fit into 28 bits will cause link error. */ |
| 2405 | static const bfd_vma elf32_arm_plt_entry_short [] = |
| 2406 | { |
| 2407 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ |
| 2408 | 0xe28cca00, /* add ip, ip, #0xNN000 */ |
| 2409 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ |
| 2410 | }; |
| 2411 | |
| 2412 | /* When explicitly asked, we'll use this "long" entry format |
| 2413 | which can cope with arbitrary displacements. */ |
| 2414 | static const bfd_vma elf32_arm_plt_entry_long [] = |
| 2415 | { |
| 2416 | 0xe28fc200, /* add ip, pc, #0xN0000000 */ |
| 2417 | 0xe28cc600, /* add ip, ip, #0xNN00000 */ |
| 2418 | 0xe28cca00, /* add ip, ip, #0xNN000 */ |
| 2419 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ |
| 2420 | }; |
| 2421 | |
| 2422 | static bfd_boolean elf32_arm_use_long_plt_entry = FALSE; |
| 2423 | |
| 2424 | #endif /* not FOUR_WORD_PLT */ |
| 2425 | |
| 2426 | /* The first entry in a procedure linkage table looks like this. |
| 2427 | It is set up so that any shared library function that is called before the |
| 2428 | relocation has been set up calls the dynamic linker first. */ |
| 2429 | static const bfd_vma elf32_thumb2_plt0_entry [] = |
| 2430 | { |
| 2431 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, |
| 2432 | an instruction maybe encoded to one or two array elements. */ |
| 2433 | 0xf8dfb500, /* push {lr} */ |
| 2434 | 0x44fee008, /* ldr.w lr, [pc, #8] */ |
| 2435 | /* add lr, pc */ |
| 2436 | 0xff08f85e, /* ldr.w pc, [lr, #8]! */ |
| 2437 | 0x00000000, /* &GOT[0] - . */ |
| 2438 | }; |
| 2439 | |
| 2440 | /* Subsequent entries in a procedure linkage table for thumb only target |
| 2441 | look like this. */ |
| 2442 | static const bfd_vma elf32_thumb2_plt_entry [] = |
| 2443 | { |
| 2444 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, |
| 2445 | an instruction maybe encoded to one or two array elements. */ |
| 2446 | 0x0c00f240, /* movw ip, #0xNNNN */ |
| 2447 | 0x0c00f2c0, /* movt ip, #0xNNNN */ |
| 2448 | 0xf8dc44fc, /* add ip, pc */ |
| 2449 | 0xbf00f000 /* ldr.w pc, [ip] */ |
| 2450 | /* nop */ |
| 2451 | }; |
| 2452 | |
| 2453 | /* The format of the first entry in the procedure linkage table |
| 2454 | for a VxWorks executable. */ |
| 2455 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = |
| 2456 | { |
| 2457 | 0xe52dc008, /* str ip,[sp,#-8]! */ |
| 2458 | 0xe59fc000, /* ldr ip,[pc] */ |
| 2459 | 0xe59cf008, /* ldr pc,[ip,#8] */ |
| 2460 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ |
| 2461 | }; |
| 2462 | |
| 2463 | /* The format of subsequent entries in a VxWorks executable. */ |
| 2464 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = |
| 2465 | { |
| 2466 | 0xe59fc000, /* ldr ip,[pc] */ |
| 2467 | 0xe59cf000, /* ldr pc,[ip] */ |
| 2468 | 0x00000000, /* .long @got */ |
| 2469 | 0xe59fc000, /* ldr ip,[pc] */ |
| 2470 | 0xea000000, /* b _PLT */ |
| 2471 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ |
| 2472 | }; |
| 2473 | |
| 2474 | /* The format of entries in a VxWorks shared library. */ |
| 2475 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = |
| 2476 | { |
| 2477 | 0xe59fc000, /* ldr ip,[pc] */ |
| 2478 | 0xe79cf009, /* ldr pc,[ip,r9] */ |
| 2479 | 0x00000000, /* .long @got */ |
| 2480 | 0xe59fc000, /* ldr ip,[pc] */ |
| 2481 | 0xe599f008, /* ldr pc,[r9,#8] */ |
| 2482 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ |
| 2483 | }; |
| 2484 | |
| 2485 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
| 2486 | #define PLT_THUMB_STUB_SIZE 4 |
| 2487 | static const bfd_vma elf32_arm_plt_thumb_stub [] = |
| 2488 | { |
| 2489 | 0x4778, /* bx pc */ |
| 2490 | 0x46c0 /* nop */ |
| 2491 | }; |
| 2492 | |
| 2493 | /* The entries in a PLT when using a DLL-based target with multiple |
| 2494 | address spaces. */ |
| 2495 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
| 2496 | { |
| 2497 | 0xe51ff004, /* ldr pc, [pc, #-4] */ |
| 2498 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ |
| 2499 | }; |
| 2500 | |
| 2501 | /* The first entry in a procedure linkage table looks like |
| 2502 | this. It is set up so that any shared library function that is |
| 2503 | called before the relocation has been set up calls the dynamic |
| 2504 | linker first. */ |
| 2505 | static const bfd_vma elf32_arm_nacl_plt0_entry [] = |
| 2506 | { |
| 2507 | /* First bundle: */ |
| 2508 | 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */ |
| 2509 | 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */ |
| 2510 | 0xe08cc00f, /* add ip, ip, pc */ |
| 2511 | 0xe52dc008, /* str ip, [sp, #-8]! */ |
| 2512 | /* Second bundle: */ |
| 2513 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
| 2514 | 0xe59cc000, /* ldr ip, [ip] */ |
| 2515 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
| 2516 | 0xe12fff1c, /* bx ip */ |
| 2517 | /* Third bundle: */ |
| 2518 | 0xe320f000, /* nop */ |
| 2519 | 0xe320f000, /* nop */ |
| 2520 | 0xe320f000, /* nop */ |
| 2521 | /* .Lplt_tail: */ |
| 2522 | 0xe50dc004, /* str ip, [sp, #-4] */ |
| 2523 | /* Fourth bundle: */ |
| 2524 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
| 2525 | 0xe59cc000, /* ldr ip, [ip] */ |
| 2526 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
| 2527 | 0xe12fff1c, /* bx ip */ |
| 2528 | }; |
| 2529 | #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4) |
| 2530 | |
| 2531 | /* Subsequent entries in a procedure linkage table look like this. */ |
| 2532 | static const bfd_vma elf32_arm_nacl_plt_entry [] = |
| 2533 | { |
| 2534 | 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */ |
| 2535 | 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */ |
| 2536 | 0xe08cc00f, /* add ip, ip, pc */ |
| 2537 | 0xea000000, /* b .Lplt_tail */ |
| 2538 | }; |
| 2539 | |
| 2540 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
| 2541 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) |
| 2542 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) |
| 2543 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) |
| 2544 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) |
| 2545 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) |
| 2546 | #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4) |
| 2547 | #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4) |
| 2548 | |
| 2549 | enum stub_insn_type |
| 2550 | { |
| 2551 | THUMB16_TYPE = 1, |
| 2552 | THUMB32_TYPE, |
| 2553 | ARM_TYPE, |
| 2554 | DATA_TYPE |
| 2555 | }; |
| 2556 | |
| 2557 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
| 2558 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition |
| 2559 | is inserted in arm_build_one_stub(). */ |
| 2560 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} |
| 2561 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} |
| 2562 | #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0} |
| 2563 | #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0} |
| 2564 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} |
| 2565 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} |
| 2566 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} |
| 2567 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} |
| 2568 | |
| 2569 | typedef struct |
| 2570 | { |
| 2571 | bfd_vma data; |
| 2572 | enum stub_insn_type type; |
| 2573 | unsigned int r_type; |
| 2574 | int reloc_addend; |
| 2575 | } insn_sequence; |
| 2576 | |
| 2577 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
| 2578 | to reach the stub if necessary. */ |
| 2579 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
| 2580 | { |
| 2581 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ |
| 2582 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
| 2583 | }; |
| 2584 | |
| 2585 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
| 2586 | available. */ |
| 2587 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
| 2588 | { |
| 2589 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
| 2590 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2591 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
| 2592 | }; |
| 2593 | |
| 2594 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
| 2595 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
| 2596 | { |
| 2597 | THUMB16_INSN (0xb401), /* push {r0} */ |
| 2598 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ |
| 2599 | THUMB16_INSN (0x4684), /* mov ip, r0 */ |
| 2600 | THUMB16_INSN (0xbc01), /* pop {r0} */ |
| 2601 | THUMB16_INSN (0x4760), /* bx ip */ |
| 2602 | THUMB16_INSN (0xbf00), /* nop */ |
| 2603 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
| 2604 | }; |
| 2605 | |
| 2606 | /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */ |
| 2607 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] = |
| 2608 | { |
| 2609 | THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */ |
| 2610 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */ |
| 2611 | }; |
| 2612 | |
| 2613 | /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2 |
| 2614 | M-profile architectures. */ |
| 2615 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] = |
| 2616 | { |
| 2617 | THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */ |
| 2618 | THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */ |
| 2619 | THUMB16_INSN (0x4760), /* bx ip */ |
| 2620 | }; |
| 2621 | |
| 2622 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
| 2623 | allowed. */ |
| 2624 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = |
| 2625 | { |
| 2626 | THUMB16_INSN (0x4778), /* bx pc */ |
| 2627 | THUMB16_INSN (0x46c0), /* nop */ |
| 2628 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
| 2629 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2630 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
| 2631 | }; |
| 2632 | |
| 2633 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
| 2634 | available. */ |
| 2635 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
| 2636 | { |
| 2637 | THUMB16_INSN (0x4778), /* bx pc */ |
| 2638 | THUMB16_INSN (0x46c0), /* nop */ |
| 2639 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ |
| 2640 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
| 2641 | }; |
| 2642 | |
| 2643 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
| 2644 | one, when the destination is close enough. */ |
| 2645 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
| 2646 | { |
| 2647 | THUMB16_INSN (0x4778), /* bx pc */ |
| 2648 | THUMB16_INSN (0x46c0), /* nop */ |
| 2649 | ARM_REL_INSN (0xea000000, -8), /* b (X-8) */ |
| 2650 | }; |
| 2651 | |
| 2652 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
| 2653 | blx to reach the stub if necessary. */ |
| 2654 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
| 2655 | { |
| 2656 | ARM_INSN (0xe59fc000), /* ldr ip, [pc] */ |
| 2657 | ARM_INSN (0xe08ff00c), /* add pc, pc, ip */ |
| 2658 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ |
| 2659 | }; |
| 2660 | |
| 2661 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
| 2662 | blx to reach the stub if necessary. We can not add into pc; |
| 2663 | it is not guaranteed to mode switch (different in ARMv6 and |
| 2664 | ARMv7). */ |
| 2665 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = |
| 2666 | { |
| 2667 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
| 2668 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ |
| 2669 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2670 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
| 2671 | }; |
| 2672 | |
| 2673 | /* V4T ARM -> ARM long branch stub, PIC. */ |
| 2674 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = |
| 2675 | { |
| 2676 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
| 2677 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ |
| 2678 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2679 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
| 2680 | }; |
| 2681 | |
| 2682 | /* V4T Thumb -> ARM long branch stub, PIC. */ |
| 2683 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = |
| 2684 | { |
| 2685 | THUMB16_INSN (0x4778), /* bx pc */ |
| 2686 | THUMB16_INSN (0x46c0), /* nop */ |
| 2687 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
| 2688 | ARM_INSN (0xe08cf00f), /* add pc, ip, pc */ |
| 2689 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ |
| 2690 | }; |
| 2691 | |
| 2692 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
| 2693 | architectures. */ |
| 2694 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
| 2695 | { |
| 2696 | THUMB16_INSN (0xb401), /* push {r0} */ |
| 2697 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ |
| 2698 | THUMB16_INSN (0x46fc), /* mov ip, pc */ |
| 2699 | THUMB16_INSN (0x4484), /* add ip, r0 */ |
| 2700 | THUMB16_INSN (0xbc01), /* pop {r0} */ |
| 2701 | THUMB16_INSN (0x4760), /* bx ip */ |
| 2702 | DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ |
| 2703 | }; |
| 2704 | |
| 2705 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
| 2706 | allowed. */ |
| 2707 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = |
| 2708 | { |
| 2709 | THUMB16_INSN (0x4778), /* bx pc */ |
| 2710 | THUMB16_INSN (0x46c0), /* nop */ |
| 2711 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
| 2712 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ |
| 2713 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2714 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
| 2715 | }; |
| 2716 | |
| 2717 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
| 2718 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ |
| 2719 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = |
| 2720 | { |
| 2721 | ARM_INSN (0xe59f1000), /* ldr r1, [pc] */ |
| 2722 | ARM_INSN (0xe08ff001), /* add pc, pc, r1 */ |
| 2723 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ |
| 2724 | }; |
| 2725 | |
| 2726 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a |
| 2727 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ |
| 2728 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = |
| 2729 | { |
| 2730 | THUMB16_INSN (0x4778), /* bx pc */ |
| 2731 | THUMB16_INSN (0x46c0), /* nop */ |
| 2732 | ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */ |
| 2733 | ARM_INSN (0xe081f00f), /* add pc, r1, pc */ |
| 2734 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ |
| 2735 | }; |
| 2736 | |
| 2737 | /* NaCl ARM -> ARM long branch stub. */ |
| 2738 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] = |
| 2739 | { |
| 2740 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ |
| 2741 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ |
| 2742 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2743 | ARM_INSN (0xe320f000), /* nop */ |
| 2744 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ |
| 2745 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
| 2746 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ |
| 2747 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ |
| 2748 | }; |
| 2749 | |
| 2750 | /* NaCl ARM -> ARM long branch stub, PIC. */ |
| 2751 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] = |
| 2752 | { |
| 2753 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ |
| 2754 | ARM_INSN (0xe08cc00f), /* add ip, ip, pc */ |
| 2755 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ |
| 2756 | ARM_INSN (0xe12fff1c), /* bx ip */ |
| 2757 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ |
| 2758 | DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */ |
| 2759 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ |
| 2760 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ |
| 2761 | }; |
| 2762 | |
| 2763 | /* Stub used for transition to secure state (aka SG veneer). */ |
| 2764 | static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] = |
| 2765 | { |
| 2766 | THUMB32_INSN (0xe97fe97f), /* sg. */ |
| 2767 | THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */ |
| 2768 | }; |
| 2769 | |
| 2770 | |
| 2771 | /* Cortex-A8 erratum-workaround stubs. */ |
| 2772 | |
| 2773 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we |
| 2774 | can't use a conditional branch to reach this stub). */ |
| 2775 | |
| 2776 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = |
| 2777 | { |
| 2778 | THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */ |
| 2779 | THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */ |
| 2780 | THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */ |
| 2781 | }; |
| 2782 | |
| 2783 | /* Stub used for b.w and bl.w instructions. */ |
| 2784 | |
| 2785 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = |
| 2786 | { |
| 2787 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ |
| 2788 | }; |
| 2789 | |
| 2790 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = |
| 2791 | { |
| 2792 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ |
| 2793 | }; |
| 2794 | |
| 2795 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w |
| 2796 | instruction (which switches to ARM mode) to point to this stub. Jump to the |
| 2797 | real destination using an ARM-mode branch. */ |
| 2798 | |
| 2799 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = |
| 2800 | { |
| 2801 | ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */ |
| 2802 | }; |
| 2803 | |
| 2804 | /* For each section group there can be a specially created linker section |
| 2805 | to hold the stubs for that group. The name of the stub section is based |
| 2806 | upon the name of another section within that group with the suffix below |
| 2807 | applied. |
| 2808 | |
| 2809 | PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to |
| 2810 | create what appeared to be a linker stub section when it actually |
| 2811 | contained user code/data. For example, consider this fragment: |
| 2812 | |
| 2813 | const char * stubborn_problems[] = { "np" }; |
| 2814 | |
| 2815 | If this is compiled with "-fPIC -fdata-sections" then gcc produces a |
| 2816 | section called: |
| 2817 | |
| 2818 | .data.rel.local.stubborn_problems |
| 2819 | |
| 2820 | This then causes problems in arm32_arm_build_stubs() as it triggers: |
| 2821 | |
| 2822 | // Ignore non-stub sections. |
| 2823 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
| 2824 | continue; |
| 2825 | |
| 2826 | And so the section would be ignored instead of being processed. Hence |
| 2827 | the change in definition of STUB_SUFFIX to a name that cannot be a valid |
| 2828 | C identifier. */ |
| 2829 | #define STUB_SUFFIX ".__stub" |
| 2830 | |
| 2831 | /* One entry per long/short branch stub defined above. */ |
| 2832 | #define DEF_STUBS \ |
| 2833 | DEF_STUB(long_branch_any_any) \ |
| 2834 | DEF_STUB(long_branch_v4t_arm_thumb) \ |
| 2835 | DEF_STUB(long_branch_thumb_only) \ |
| 2836 | DEF_STUB(long_branch_v4t_thumb_thumb) \ |
| 2837 | DEF_STUB(long_branch_v4t_thumb_arm) \ |
| 2838 | DEF_STUB(short_branch_v4t_thumb_arm) \ |
| 2839 | DEF_STUB(long_branch_any_arm_pic) \ |
| 2840 | DEF_STUB(long_branch_any_thumb_pic) \ |
| 2841 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ |
| 2842 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ |
| 2843 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ |
| 2844 | DEF_STUB(long_branch_thumb_only_pic) \ |
| 2845 | DEF_STUB(long_branch_any_tls_pic) \ |
| 2846 | DEF_STUB(long_branch_v4t_thumb_tls_pic) \ |
| 2847 | DEF_STUB(long_branch_arm_nacl) \ |
| 2848 | DEF_STUB(long_branch_arm_nacl_pic) \ |
| 2849 | DEF_STUB(cmse_branch_thumb_only) \ |
| 2850 | DEF_STUB(a8_veneer_b_cond) \ |
| 2851 | DEF_STUB(a8_veneer_b) \ |
| 2852 | DEF_STUB(a8_veneer_bl) \ |
| 2853 | DEF_STUB(a8_veneer_blx) \ |
| 2854 | DEF_STUB(long_branch_thumb2_only) \ |
| 2855 | DEF_STUB(long_branch_thumb2_only_pure) |
| 2856 | |
| 2857 | #define DEF_STUB(x) arm_stub_##x, |
| 2858 | enum elf32_arm_stub_type |
| 2859 | { |
| 2860 | arm_stub_none, |
| 2861 | DEF_STUBS |
| 2862 | max_stub_type |
| 2863 | }; |
| 2864 | #undef DEF_STUB |
| 2865 | |
| 2866 | /* Note the first a8_veneer type. */ |
| 2867 | const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond; |
| 2868 | |
| 2869 | typedef struct |
| 2870 | { |
| 2871 | const insn_sequence* template_sequence; |
| 2872 | int template_size; |
| 2873 | } stub_def; |
| 2874 | |
| 2875 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, |
| 2876 | static const stub_def stub_definitions[] = |
| 2877 | { |
| 2878 | {NULL, 0}, |
| 2879 | DEF_STUBS |
| 2880 | }; |
| 2881 | |
| 2882 | struct elf32_arm_stub_hash_entry |
| 2883 | { |
| 2884 | /* Base hash table entry structure. */ |
| 2885 | struct bfd_hash_entry root; |
| 2886 | |
| 2887 | /* The stub section. */ |
| 2888 | asection *stub_sec; |
| 2889 | |
| 2890 | /* Offset within stub_sec of the beginning of this stub. */ |
| 2891 | bfd_vma stub_offset; |
| 2892 | |
| 2893 | /* Given the symbol's value and its section we can determine its final |
| 2894 | value when building the stubs (so the stub knows where to jump). */ |
| 2895 | bfd_vma target_value; |
| 2896 | asection *target_section; |
| 2897 | |
| 2898 | /* Same as above but for the source of the branch to the stub. Used for |
| 2899 | Cortex-A8 erratum workaround to patch it to branch to the stub. As |
| 2900 | such, source section does not need to be recorded since Cortex-A8 erratum |
| 2901 | workaround stubs are only generated when both source and target are in the |
| 2902 | same section. */ |
| 2903 | bfd_vma source_value; |
| 2904 | |
| 2905 | /* The instruction which caused this stub to be generated (only valid for |
| 2906 | Cortex-A8 erratum workaround stubs at present). */ |
| 2907 | unsigned long orig_insn; |
| 2908 | |
| 2909 | /* The stub type. */ |
| 2910 | enum elf32_arm_stub_type stub_type; |
| 2911 | /* Its encoding size in bytes. */ |
| 2912 | int stub_size; |
| 2913 | /* Its template. */ |
| 2914 | const insn_sequence *stub_template; |
| 2915 | /* The size of the template (number of entries). */ |
| 2916 | int stub_template_size; |
| 2917 | |
| 2918 | /* The symbol table entry, if any, that this was derived from. */ |
| 2919 | struct elf32_arm_link_hash_entry *h; |
| 2920 | |
| 2921 | /* Type of branch. */ |
| 2922 | enum arm_st_branch_type branch_type; |
| 2923 | |
| 2924 | /* Where this stub is being called from, or, in the case of combined |
| 2925 | stub sections, the first input section in the group. */ |
| 2926 | asection *id_sec; |
| 2927 | |
| 2928 | /* The name for the local symbol at the start of this stub. The |
| 2929 | stub name in the hash table has to be unique; this does not, so |
| 2930 | it can be friendlier. */ |
| 2931 | char *output_name; |
| 2932 | }; |
| 2933 | |
| 2934 | /* Used to build a map of a section. This is required for mixed-endian |
| 2935 | code/data. */ |
| 2936 | |
| 2937 | typedef struct elf32_elf_section_map |
| 2938 | { |
| 2939 | bfd_vma vma; |
| 2940 | char type; |
| 2941 | } |
| 2942 | elf32_arm_section_map; |
| 2943 | |
| 2944 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
| 2945 | |
| 2946 | typedef enum |
| 2947 | { |
| 2948 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, |
| 2949 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, |
| 2950 | VFP11_ERRATUM_ARM_VENEER, |
| 2951 | VFP11_ERRATUM_THUMB_VENEER |
| 2952 | } |
| 2953 | elf32_vfp11_erratum_type; |
| 2954 | |
| 2955 | typedef struct elf32_vfp11_erratum_list |
| 2956 | { |
| 2957 | struct elf32_vfp11_erratum_list *next; |
| 2958 | bfd_vma vma; |
| 2959 | union |
| 2960 | { |
| 2961 | struct |
| 2962 | { |
| 2963 | struct elf32_vfp11_erratum_list *veneer; |
| 2964 | unsigned int vfp_insn; |
| 2965 | } b; |
| 2966 | struct |
| 2967 | { |
| 2968 | struct elf32_vfp11_erratum_list *branch; |
| 2969 | unsigned int id; |
| 2970 | } v; |
| 2971 | } u; |
| 2972 | elf32_vfp11_erratum_type type; |
| 2973 | } |
| 2974 | elf32_vfp11_erratum_list; |
| 2975 | |
| 2976 | /* Information about a STM32L4XX erratum veneer, or a branch to such a |
| 2977 | veneer. */ |
| 2978 | typedef enum |
| 2979 | { |
| 2980 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER, |
| 2981 | STM32L4XX_ERRATUM_VENEER |
| 2982 | } |
| 2983 | elf32_stm32l4xx_erratum_type; |
| 2984 | |
| 2985 | typedef struct elf32_stm32l4xx_erratum_list |
| 2986 | { |
| 2987 | struct elf32_stm32l4xx_erratum_list *next; |
| 2988 | bfd_vma vma; |
| 2989 | union |
| 2990 | { |
| 2991 | struct |
| 2992 | { |
| 2993 | struct elf32_stm32l4xx_erratum_list *veneer; |
| 2994 | unsigned int insn; |
| 2995 | } b; |
| 2996 | struct |
| 2997 | { |
| 2998 | struct elf32_stm32l4xx_erratum_list *branch; |
| 2999 | unsigned int id; |
| 3000 | } v; |
| 3001 | } u; |
| 3002 | elf32_stm32l4xx_erratum_type type; |
| 3003 | } |
| 3004 | elf32_stm32l4xx_erratum_list; |
| 3005 | |
| 3006 | typedef enum |
| 3007 | { |
| 3008 | DELETE_EXIDX_ENTRY, |
| 3009 | INSERT_EXIDX_CANTUNWIND_AT_END |
| 3010 | } |
| 3011 | arm_unwind_edit_type; |
| 3012 | |
| 3013 | /* A (sorted) list of edits to apply to an unwind table. */ |
| 3014 | typedef struct arm_unwind_table_edit |
| 3015 | { |
| 3016 | arm_unwind_edit_type type; |
| 3017 | /* Note: we sometimes want to insert an unwind entry corresponding to a |
| 3018 | section different from the one we're currently writing out, so record the |
| 3019 | (text) section this edit relates to here. */ |
| 3020 | asection *linked_section; |
| 3021 | unsigned int index; |
| 3022 | struct arm_unwind_table_edit *next; |
| 3023 | } |
| 3024 | arm_unwind_table_edit; |
| 3025 | |
| 3026 | typedef struct _arm_elf_section_data |
| 3027 | { |
| 3028 | /* Information about mapping symbols. */ |
| 3029 | struct bfd_elf_section_data elf; |
| 3030 | unsigned int mapcount; |
| 3031 | unsigned int mapsize; |
| 3032 | elf32_arm_section_map *map; |
| 3033 | /* Information about CPU errata. */ |
| 3034 | unsigned int erratumcount; |
| 3035 | elf32_vfp11_erratum_list *erratumlist; |
| 3036 | unsigned int stm32l4xx_erratumcount; |
| 3037 | elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist; |
| 3038 | unsigned int additional_reloc_count; |
| 3039 | /* Information about unwind tables. */ |
| 3040 | union |
| 3041 | { |
| 3042 | /* Unwind info attached to a text section. */ |
| 3043 | struct |
| 3044 | { |
| 3045 | asection *arm_exidx_sec; |
| 3046 | } text; |
| 3047 | |
| 3048 | /* Unwind info attached to an .ARM.exidx section. */ |
| 3049 | struct |
| 3050 | { |
| 3051 | arm_unwind_table_edit *unwind_edit_list; |
| 3052 | arm_unwind_table_edit *unwind_edit_tail; |
| 3053 | } exidx; |
| 3054 | } u; |
| 3055 | } |
| 3056 | _arm_elf_section_data; |
| 3057 | |
| 3058 | #define elf32_arm_section_data(sec) \ |
| 3059 | ((_arm_elf_section_data *) elf_section_data (sec)) |
| 3060 | |
| 3061 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
| 3062 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), |
| 3063 | so may be created multiple times: we use an array of these entries whilst |
| 3064 | relaxing which we can refresh easily, then create stubs for each potentially |
| 3065 | erratum-triggering instruction once we've settled on a solution. */ |
| 3066 | |
| 3067 | struct a8_erratum_fix |
| 3068 | { |
| 3069 | bfd *input_bfd; |
| 3070 | asection *section; |
| 3071 | bfd_vma offset; |
| 3072 | bfd_vma target_offset; |
| 3073 | unsigned long orig_insn; |
| 3074 | char *stub_name; |
| 3075 | enum elf32_arm_stub_type stub_type; |
| 3076 | enum arm_st_branch_type branch_type; |
| 3077 | }; |
| 3078 | |
| 3079 | /* A table of relocs applied to branches which might trigger Cortex-A8 |
| 3080 | erratum. */ |
| 3081 | |
| 3082 | struct a8_erratum_reloc |
| 3083 | { |
| 3084 | bfd_vma from; |
| 3085 | bfd_vma destination; |
| 3086 | struct elf32_arm_link_hash_entry *hash; |
| 3087 | const char *sym_name; |
| 3088 | unsigned int r_type; |
| 3089 | enum arm_st_branch_type branch_type; |
| 3090 | bfd_boolean non_a8_stub; |
| 3091 | }; |
| 3092 | |
| 3093 | /* The size of the thread control block. */ |
| 3094 | #define TCB_SIZE 8 |
| 3095 | |
| 3096 | /* ARM-specific information about a PLT entry, over and above the usual |
| 3097 | gotplt_union. */ |
| 3098 | struct arm_plt_info |
| 3099 | { |
| 3100 | /* We reference count Thumb references to a PLT entry separately, |
| 3101 | so that we can emit the Thumb trampoline only if needed. */ |
| 3102 | bfd_signed_vma thumb_refcount; |
| 3103 | |
| 3104 | /* Some references from Thumb code may be eliminated by BL->BLX |
| 3105 | conversion, so record them separately. */ |
| 3106 | bfd_signed_vma maybe_thumb_refcount; |
| 3107 | |
| 3108 | /* How many of the recorded PLT accesses were from non-call relocations. |
| 3109 | This information is useful when deciding whether anything takes the |
| 3110 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all |
| 3111 | non-call references to the function should resolve directly to the |
| 3112 | real runtime target. */ |
| 3113 | unsigned int noncall_refcount; |
| 3114 | |
| 3115 | /* Since PLT entries have variable size if the Thumb prologue is |
| 3116 | used, we need to record the index into .got.plt instead of |
| 3117 | recomputing it from the PLT offset. */ |
| 3118 | bfd_signed_vma got_offset; |
| 3119 | }; |
| 3120 | |
| 3121 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ |
| 3122 | struct arm_local_iplt_info |
| 3123 | { |
| 3124 | /* The information that is usually found in the generic ELF part of |
| 3125 | the hash table entry. */ |
| 3126 | union gotplt_union root; |
| 3127 | |
| 3128 | /* The information that is usually found in the ARM-specific part of |
| 3129 | the hash table entry. */ |
| 3130 | struct arm_plt_info arm; |
| 3131 | |
| 3132 | /* A list of all potential dynamic relocations against this symbol. */ |
| 3133 | struct elf_dyn_relocs *dyn_relocs; |
| 3134 | }; |
| 3135 | |
| 3136 | /* Structure to handle FDPIC support for local functions. */ |
| 3137 | struct fdpic_local { |
| 3138 | unsigned int funcdesc_cnt; |
| 3139 | unsigned int gotofffuncdesc_cnt; |
| 3140 | int funcdesc_offset; |
| 3141 | }; |
| 3142 | |
| 3143 | struct elf_arm_obj_tdata |
| 3144 | { |
| 3145 | struct elf_obj_tdata root; |
| 3146 | |
| 3147 | /* tls_type for each local got entry. */ |
| 3148 | char *local_got_tls_type; |
| 3149 | |
| 3150 | /* GOTPLT entries for TLS descriptors. */ |
| 3151 | bfd_vma *local_tlsdesc_gotent; |
| 3152 | |
| 3153 | /* Information for local symbols that need entries in .iplt. */ |
| 3154 | struct arm_local_iplt_info **local_iplt; |
| 3155 | |
| 3156 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
| 3157 | int no_enum_size_warning; |
| 3158 | |
| 3159 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ |
| 3160 | int no_wchar_size_warning; |
| 3161 | |
| 3162 | /* Maintains FDPIC counters and funcdesc info. */ |
| 3163 | struct fdpic_local *local_fdpic_cnts; |
| 3164 | }; |
| 3165 | |
| 3166 | #define elf_arm_tdata(bfd) \ |
| 3167 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) |
| 3168 | |
| 3169 | #define elf32_arm_local_got_tls_type(bfd) \ |
| 3170 | (elf_arm_tdata (bfd)->local_got_tls_type) |
| 3171 | |
| 3172 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
| 3173 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) |
| 3174 | |
| 3175 | #define elf32_arm_local_iplt(bfd) \ |
| 3176 | (elf_arm_tdata (bfd)->local_iplt) |
| 3177 | |
| 3178 | #define elf32_arm_local_fdpic_cnts(bfd) \ |
| 3179 | (elf_arm_tdata (bfd)->local_fdpic_cnts) |
| 3180 | |
| 3181 | #define is_arm_elf(bfd) \ |
| 3182 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ |
| 3183 | && elf_tdata (bfd) != NULL \ |
| 3184 | && elf_object_id (bfd) == ARM_ELF_DATA) |
| 3185 | |
| 3186 | static bfd_boolean |
| 3187 | elf32_arm_mkobject (bfd *abfd) |
| 3188 | { |
| 3189 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
| 3190 | ARM_ELF_DATA); |
| 3191 | } |
| 3192 | |
| 3193 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
| 3194 | |
| 3195 | /* Structure to handle FDPIC support for extern functions. */ |
| 3196 | struct fdpic_global { |
| 3197 | unsigned int gotofffuncdesc_cnt; |
| 3198 | unsigned int gotfuncdesc_cnt; |
| 3199 | unsigned int funcdesc_cnt; |
| 3200 | int funcdesc_offset; |
| 3201 | int gotfuncdesc_offset; |
| 3202 | }; |
| 3203 | |
| 3204 | /* Arm ELF linker hash entry. */ |
| 3205 | struct elf32_arm_link_hash_entry |
| 3206 | { |
| 3207 | struct elf_link_hash_entry root; |
| 3208 | |
| 3209 | /* Track dynamic relocs copied for this symbol. */ |
| 3210 | struct elf_dyn_relocs *dyn_relocs; |
| 3211 | |
| 3212 | /* ARM-specific PLT information. */ |
| 3213 | struct arm_plt_info plt; |
| 3214 | |
| 3215 | #define GOT_UNKNOWN 0 |
| 3216 | #define GOT_NORMAL 1 |
| 3217 | #define GOT_TLS_GD 2 |
| 3218 | #define GOT_TLS_IE 4 |
| 3219 | #define GOT_TLS_GDESC 8 |
| 3220 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) |
| 3221 | unsigned int tls_type : 8; |
| 3222 | |
| 3223 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ |
| 3224 | unsigned int is_iplt : 1; |
| 3225 | |
| 3226 | unsigned int unused : 23; |
| 3227 | |
| 3228 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
| 3229 | starting at the end of the jump table. */ |
| 3230 | bfd_vma tlsdesc_got; |
| 3231 | |
| 3232 | /* The symbol marking the real symbol location for exported thumb |
| 3233 | symbols with Arm stubs. */ |
| 3234 | struct elf_link_hash_entry *export_glue; |
| 3235 | |
| 3236 | /* A pointer to the most recently used stub hash entry against this |
| 3237 | symbol. */ |
| 3238 | struct elf32_arm_stub_hash_entry *stub_cache; |
| 3239 | |
| 3240 | /* Counter for FDPIC relocations against this symbol. */ |
| 3241 | struct fdpic_global fdpic_cnts; |
| 3242 | }; |
| 3243 | |
| 3244 | /* Traverse an arm ELF linker hash table. */ |
| 3245 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
| 3246 | (elf_link_hash_traverse \ |
| 3247 | (&(table)->root, \ |
| 3248 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
| 3249 | (info))) |
| 3250 | |
| 3251 | /* Get the ARM elf linker hash table from a link_info structure. */ |
| 3252 | #define elf32_arm_hash_table(info) \ |
| 3253 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
| 3254 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) |
| 3255 | |
| 3256 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
| 3257 | ((struct elf32_arm_stub_hash_entry *) \ |
| 3258 | bfd_hash_lookup ((table), (string), (create), (copy))) |
| 3259 | |
| 3260 | /* Array to keep track of which stub sections have been created, and |
| 3261 | information on stub grouping. */ |
| 3262 | struct map_stub |
| 3263 | { |
| 3264 | /* This is the section to which stubs in the group will be |
| 3265 | attached. */ |
| 3266 | asection *link_sec; |
| 3267 | /* The stub section. */ |
| 3268 | asection *stub_sec; |
| 3269 | }; |
| 3270 | |
| 3271 | #define elf32_arm_compute_jump_table_size(htab) \ |
| 3272 | ((htab)->next_tls_desc_index * 4) |
| 3273 | |
| 3274 | /* ARM ELF linker hash table. */ |
| 3275 | struct elf32_arm_link_hash_table |
| 3276 | { |
| 3277 | /* The main hash table. */ |
| 3278 | struct elf_link_hash_table root; |
| 3279 | |
| 3280 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
| 3281 | bfd_size_type thumb_glue_size; |
| 3282 | |
| 3283 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
| 3284 | bfd_size_type arm_glue_size; |
| 3285 | |
| 3286 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
| 3287 | bfd_size_type bx_glue_size; |
| 3288 | |
| 3289 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
| 3290 | veneer has been populated. */ |
| 3291 | bfd_vma bx_glue_offset[15]; |
| 3292 | |
| 3293 | /* The size in bytes of the section containing glue for VFP11 erratum |
| 3294 | veneers. */ |
| 3295 | bfd_size_type vfp11_erratum_glue_size; |
| 3296 | |
| 3297 | /* The size in bytes of the section containing glue for STM32L4XX erratum |
| 3298 | veneers. */ |
| 3299 | bfd_size_type stm32l4xx_erratum_glue_size; |
| 3300 | |
| 3301 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
| 3302 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and |
| 3303 | elf32_arm_write_section(). */ |
| 3304 | struct a8_erratum_fix *a8_erratum_fixes; |
| 3305 | unsigned int num_a8_erratum_fixes; |
| 3306 | |
| 3307 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
| 3308 | bfd * bfd_of_glue_owner; |
| 3309 | |
| 3310 | /* Nonzero to output a BE8 image. */ |
| 3311 | int byteswap_code; |
| 3312 | |
| 3313 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
| 3314 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ |
| 3315 | int target1_is_rel; |
| 3316 | |
| 3317 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
| 3318 | int target2_reloc; |
| 3319 | |
| 3320 | /* 0 = Ignore R_ARM_V4BX. |
| 3321 | 1 = Convert BX to MOV PC. |
| 3322 | 2 = Generate v4 interworing stubs. */ |
| 3323 | int fix_v4bx; |
| 3324 | |
| 3325 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
| 3326 | int fix_cortex_a8; |
| 3327 | |
| 3328 | /* Whether we should fix the ARM1176 BLX immediate issue. */ |
| 3329 | int fix_arm1176; |
| 3330 | |
| 3331 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
| 3332 | int use_blx; |
| 3333 | |
| 3334 | /* What sort of code sequences we should look for which may trigger the |
| 3335 | VFP11 denorm erratum. */ |
| 3336 | bfd_arm_vfp11_fix vfp11_fix; |
| 3337 | |
| 3338 | /* Global counter for the number of fixes we have emitted. */ |
| 3339 | int num_vfp11_fixes; |
| 3340 | |
| 3341 | /* What sort of code sequences we should look for which may trigger the |
| 3342 | STM32L4XX erratum. */ |
| 3343 | bfd_arm_stm32l4xx_fix stm32l4xx_fix; |
| 3344 | |
| 3345 | /* Global counter for the number of fixes we have emitted. */ |
| 3346 | int num_stm32l4xx_fixes; |
| 3347 | |
| 3348 | /* Nonzero to force PIC branch veneers. */ |
| 3349 | int pic_veneer; |
| 3350 | |
| 3351 | /* The number of bytes in the initial entry in the PLT. */ |
| 3352 | bfd_size_type plt_header_size; |
| 3353 | |
| 3354 | /* The number of bytes in the subsequent PLT etries. */ |
| 3355 | bfd_size_type plt_entry_size; |
| 3356 | |
| 3357 | /* True if the target system is VxWorks. */ |
| 3358 | int vxworks_p; |
| 3359 | |
| 3360 | /* True if the target system is Symbian OS. */ |
| 3361 | int symbian_p; |
| 3362 | |
| 3363 | /* True if the target system is Native Client. */ |
| 3364 | int nacl_p; |
| 3365 | |
| 3366 | /* True if the target uses REL relocations. */ |
| 3367 | bfd_boolean use_rel; |
| 3368 | |
| 3369 | /* Nonzero if import library must be a secure gateway import library |
| 3370 | as per ARMv8-M Security Extensions. */ |
| 3371 | int cmse_implib; |
| 3372 | |
| 3373 | /* The import library whose symbols' address must remain stable in |
| 3374 | the import library generated. */ |
| 3375 | bfd *in_implib_bfd; |
| 3376 | |
| 3377 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
| 3378 | bfd_vma next_tls_desc_index; |
| 3379 | |
| 3380 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ |
| 3381 | bfd_vma num_tls_desc; |
| 3382 | |
| 3383 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
| 3384 | asection *srelplt2; |
| 3385 | |
| 3386 | /* The offset into splt of the PLT entry for the TLS descriptor |
| 3387 | resolver. Special values are 0, if not necessary (or not found |
| 3388 | to be necessary yet), and -1 if needed but not determined |
| 3389 | yet. */ |
| 3390 | bfd_vma dt_tlsdesc_plt; |
| 3391 | |
| 3392 | /* The offset into sgot of the GOT entry used by the PLT entry |
| 3393 | above. */ |
| 3394 | bfd_vma dt_tlsdesc_got; |
| 3395 | |
| 3396 | /* Offset in .plt section of tls_arm_trampoline. */ |
| 3397 | bfd_vma tls_trampoline; |
| 3398 | |
| 3399 | /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */ |
| 3400 | union |
| 3401 | { |
| 3402 | bfd_signed_vma refcount; |
| 3403 | bfd_vma offset; |
| 3404 | } tls_ldm_got; |
| 3405 | |
| 3406 | /* Small local sym cache. */ |
| 3407 | struct sym_cache sym_cache; |
| 3408 | |
| 3409 | /* For convenience in allocate_dynrelocs. */ |
| 3410 | bfd * obfd; |
| 3411 | |
| 3412 | /* The amount of space used by the reserved portion of the sgotplt |
| 3413 | section, plus whatever space is used by the jump slots. */ |
| 3414 | bfd_vma sgotplt_jump_table_size; |
| 3415 | |
| 3416 | /* The stub hash table. */ |
| 3417 | struct bfd_hash_table stub_hash_table; |
| 3418 | |
| 3419 | /* Linker stub bfd. */ |
| 3420 | bfd *stub_bfd; |
| 3421 | |
| 3422 | /* Linker call-backs. */ |
| 3423 | asection * (*add_stub_section) (const char *, asection *, asection *, |
| 3424 | unsigned int); |
| 3425 | void (*layout_sections_again) (void); |
| 3426 | |
| 3427 | /* Array to keep track of which stub sections have been created, and |
| 3428 | information on stub grouping. */ |
| 3429 | struct map_stub *stub_group; |
| 3430 | |
| 3431 | /* Input stub section holding secure gateway veneers. */ |
| 3432 | asection *cmse_stub_sec; |
| 3433 | |
| 3434 | /* Offset in cmse_stub_sec where new SG veneers (not in input import library) |
| 3435 | start to be allocated. */ |
| 3436 | bfd_vma new_cmse_stub_offset; |
| 3437 | |
| 3438 | /* Number of elements in stub_group. */ |
| 3439 | unsigned int top_id; |
| 3440 | |
| 3441 | /* Assorted information used by elf32_arm_size_stubs. */ |
| 3442 | unsigned int bfd_count; |
| 3443 | unsigned int top_index; |
| 3444 | asection **input_list; |
| 3445 | |
| 3446 | /* True if the target system uses FDPIC. */ |
| 3447 | int fdpic_p; |
| 3448 | |
| 3449 | /* Fixup section. Used for FDPIC. */ |
| 3450 | asection *srofixup; |
| 3451 | }; |
| 3452 | |
| 3453 | /* Add an FDPIC read-only fixup. */ |
| 3454 | static void |
| 3455 | arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset) |
| 3456 | { |
| 3457 | bfd_vma fixup_offset; |
| 3458 | |
| 3459 | fixup_offset = srofixup->reloc_count++ * 4; |
| 3460 | BFD_ASSERT (fixup_offset < srofixup->size); |
| 3461 | bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset); |
| 3462 | } |
| 3463 | |
| 3464 | static inline int |
| 3465 | ctz (unsigned int mask) |
| 3466 | { |
| 3467 | #if GCC_VERSION >= 3004 |
| 3468 | return __builtin_ctz (mask); |
| 3469 | #else |
| 3470 | unsigned int i; |
| 3471 | |
| 3472 | for (i = 0; i < 8 * sizeof (mask); i++) |
| 3473 | { |
| 3474 | if (mask & 0x1) |
| 3475 | break; |
| 3476 | mask = (mask >> 1); |
| 3477 | } |
| 3478 | return i; |
| 3479 | #endif |
| 3480 | } |
| 3481 | |
| 3482 | static inline int |
| 3483 | elf32_arm_popcount (unsigned int mask) |
| 3484 | { |
| 3485 | #if GCC_VERSION >= 3004 |
| 3486 | return __builtin_popcount (mask); |
| 3487 | #else |
| 3488 | unsigned int i; |
| 3489 | int sum = 0; |
| 3490 | |
| 3491 | for (i = 0; i < 8 * sizeof (mask); i++) |
| 3492 | { |
| 3493 | if (mask & 0x1) |
| 3494 | sum++; |
| 3495 | mask = (mask >> 1); |
| 3496 | } |
| 3497 | return sum; |
| 3498 | #endif |
| 3499 | } |
| 3500 | |
| 3501 | static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, |
| 3502 | asection *sreloc, Elf_Internal_Rela *rel); |
| 3503 | |
| 3504 | static void |
| 3505 | arm_elf_fill_funcdesc(bfd *output_bfd, |
| 3506 | struct bfd_link_info *info, |
| 3507 | int *funcdesc_offset, |
| 3508 | int dynindx, |
| 3509 | int offset, |
| 3510 | bfd_vma addr, |
| 3511 | bfd_vma dynreloc_value, |
| 3512 | bfd_vma seg) |
| 3513 | { |
| 3514 | if ((*funcdesc_offset & 1) == 0) |
| 3515 | { |
| 3516 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
| 3517 | asection *sgot = globals->root.sgot; |
| 3518 | |
| 3519 | if (bfd_link_pic(info)) |
| 3520 | { |
| 3521 | asection *srelgot = globals->root.srelgot; |
| 3522 | Elf_Internal_Rela outrel; |
| 3523 | |
| 3524 | outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE); |
| 3525 | outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset; |
| 3526 | outrel.r_addend = 0; |
| 3527 | |
| 3528 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 3529 | bfd_put_32 (output_bfd, addr, sgot->contents + offset); |
| 3530 | bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4); |
| 3531 | } |
| 3532 | else |
| 3533 | { |
| 3534 | struct elf_link_hash_entry *hgot = globals->root.hgot; |
| 3535 | bfd_vma got_value = hgot->root.u.def.value |
| 3536 | + hgot->root.u.def.section->output_section->vma |
| 3537 | + hgot->root.u.def.section->output_offset; |
| 3538 | |
| 3539 | arm_elf_add_rofixup(output_bfd, globals->srofixup, |
| 3540 | sgot->output_section->vma + sgot->output_offset |
| 3541 | + offset); |
| 3542 | arm_elf_add_rofixup(output_bfd, globals->srofixup, |
| 3543 | sgot->output_section->vma + sgot->output_offset |
| 3544 | + offset + 4); |
| 3545 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset); |
| 3546 | bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4); |
| 3547 | } |
| 3548 | *funcdesc_offset |= 1; |
| 3549 | } |
| 3550 | } |
| 3551 | |
| 3552 | /* Create an entry in an ARM ELF linker hash table. */ |
| 3553 | |
| 3554 | static struct bfd_hash_entry * |
| 3555 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
| 3556 | struct bfd_hash_table * table, |
| 3557 | const char * string) |
| 3558 | { |
| 3559 | struct elf32_arm_link_hash_entry * ret = |
| 3560 | (struct elf32_arm_link_hash_entry *) entry; |
| 3561 | |
| 3562 | /* Allocate the structure if it has not already been allocated by a |
| 3563 | subclass. */ |
| 3564 | if (ret == NULL) |
| 3565 | ret = (struct elf32_arm_link_hash_entry *) |
| 3566 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); |
| 3567 | if (ret == NULL) |
| 3568 | return (struct bfd_hash_entry *) ret; |
| 3569 | |
| 3570 | /* Call the allocation method of the superclass. */ |
| 3571 | ret = ((struct elf32_arm_link_hash_entry *) |
| 3572 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, |
| 3573 | table, string)); |
| 3574 | if (ret != NULL) |
| 3575 | { |
| 3576 | ret->dyn_relocs = NULL; |
| 3577 | ret->tls_type = GOT_UNKNOWN; |
| 3578 | ret->tlsdesc_got = (bfd_vma) -1; |
| 3579 | ret->plt.thumb_refcount = 0; |
| 3580 | ret->plt.maybe_thumb_refcount = 0; |
| 3581 | ret->plt.noncall_refcount = 0; |
| 3582 | ret->plt.got_offset = -1; |
| 3583 | ret->is_iplt = FALSE; |
| 3584 | ret->export_glue = NULL; |
| 3585 | |
| 3586 | ret->stub_cache = NULL; |
| 3587 | |
| 3588 | ret->fdpic_cnts.gotofffuncdesc_cnt = 0; |
| 3589 | ret->fdpic_cnts.gotfuncdesc_cnt = 0; |
| 3590 | ret->fdpic_cnts.funcdesc_cnt = 0; |
| 3591 | ret->fdpic_cnts.funcdesc_offset = -1; |
| 3592 | ret->fdpic_cnts.gotfuncdesc_offset = -1; |
| 3593 | } |
| 3594 | |
| 3595 | return (struct bfd_hash_entry *) ret; |
| 3596 | } |
| 3597 | |
| 3598 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
| 3599 | symbols. */ |
| 3600 | |
| 3601 | static bfd_boolean |
| 3602 | elf32_arm_allocate_local_sym_info (bfd *abfd) |
| 3603 | { |
| 3604 | if (elf_local_got_refcounts (abfd) == NULL) |
| 3605 | { |
| 3606 | bfd_size_type num_syms; |
| 3607 | bfd_size_type size; |
| 3608 | char *data; |
| 3609 | |
| 3610 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; |
| 3611 | size = num_syms * (sizeof (bfd_signed_vma) |
| 3612 | + sizeof (struct arm_local_iplt_info *) |
| 3613 | + sizeof (bfd_vma) |
| 3614 | + sizeof (char) |
| 3615 | + sizeof (struct fdpic_local)); |
| 3616 | data = bfd_zalloc (abfd, size); |
| 3617 | if (data == NULL) |
| 3618 | return FALSE; |
| 3619 | |
| 3620 | elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data; |
| 3621 | data += num_syms * sizeof (struct fdpic_local); |
| 3622 | |
| 3623 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data; |
| 3624 | data += num_syms * sizeof (bfd_signed_vma); |
| 3625 | |
| 3626 | elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data; |
| 3627 | data += num_syms * sizeof (struct arm_local_iplt_info *); |
| 3628 | |
| 3629 | elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data; |
| 3630 | data += num_syms * sizeof (bfd_vma); |
| 3631 | |
| 3632 | elf32_arm_local_got_tls_type (abfd) = data; |
| 3633 | } |
| 3634 | return TRUE; |
| 3635 | } |
| 3636 | |
| 3637 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs |
| 3638 | to input bfd ABFD. Create the information if it doesn't already exist. |
| 3639 | Return null if an allocation fails. */ |
| 3640 | |
| 3641 | static struct arm_local_iplt_info * |
| 3642 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) |
| 3643 | { |
| 3644 | struct arm_local_iplt_info **ptr; |
| 3645 | |
| 3646 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
| 3647 | return NULL; |
| 3648 | |
| 3649 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); |
| 3650 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; |
| 3651 | if (*ptr == NULL) |
| 3652 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); |
| 3653 | return *ptr; |
| 3654 | } |
| 3655 | |
| 3656 | /* Try to obtain PLT information for the symbol with index R_SYMNDX |
| 3657 | in ABFD's symbol table. If the symbol is global, H points to its |
| 3658 | hash table entry, otherwise H is null. |
| 3659 | |
| 3660 | Return true if the symbol does have PLT information. When returning |
| 3661 | true, point *ROOT_PLT at the target-independent reference count/offset |
| 3662 | union and *ARM_PLT at the ARM-specific information. */ |
| 3663 | |
| 3664 | static bfd_boolean |
| 3665 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals, |
| 3666 | struct elf32_arm_link_hash_entry *h, |
| 3667 | unsigned long r_symndx, union gotplt_union **root_plt, |
| 3668 | struct arm_plt_info **arm_plt) |
| 3669 | { |
| 3670 | struct arm_local_iplt_info *local_iplt; |
| 3671 | |
| 3672 | if (globals->root.splt == NULL && globals->root.iplt == NULL) |
| 3673 | return FALSE; |
| 3674 | |
| 3675 | if (h != NULL) |
| 3676 | { |
| 3677 | *root_plt = &h->root.plt; |
| 3678 | *arm_plt = &h->plt; |
| 3679 | return TRUE; |
| 3680 | } |
| 3681 | |
| 3682 | if (elf32_arm_local_iplt (abfd) == NULL) |
| 3683 | return FALSE; |
| 3684 | |
| 3685 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; |
| 3686 | if (local_iplt == NULL) |
| 3687 | return FALSE; |
| 3688 | |
| 3689 | *root_plt = &local_iplt->root; |
| 3690 | *arm_plt = &local_iplt->arm; |
| 3691 | return TRUE; |
| 3692 | } |
| 3693 | |
| 3694 | static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals); |
| 3695 | |
| 3696 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub |
| 3697 | before it. */ |
| 3698 | |
| 3699 | static bfd_boolean |
| 3700 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, |
| 3701 | struct arm_plt_info *arm_plt) |
| 3702 | { |
| 3703 | struct elf32_arm_link_hash_table *htab; |
| 3704 | |
| 3705 | htab = elf32_arm_hash_table (info); |
| 3706 | |
| 3707 | return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0 |
| 3708 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0))); |
| 3709 | } |
| 3710 | |
| 3711 | /* Return a pointer to the head of the dynamic reloc list that should |
| 3712 | be used for local symbol ISYM, which is symbol number R_SYMNDX in |
| 3713 | ABFD's symbol table. Return null if an error occurs. */ |
| 3714 | |
| 3715 | static struct elf_dyn_relocs ** |
| 3716 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, |
| 3717 | Elf_Internal_Sym *isym) |
| 3718 | { |
| 3719 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) |
| 3720 | { |
| 3721 | struct arm_local_iplt_info *local_iplt; |
| 3722 | |
| 3723 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); |
| 3724 | if (local_iplt == NULL) |
| 3725 | return NULL; |
| 3726 | return &local_iplt->dyn_relocs; |
| 3727 | } |
| 3728 | else |
| 3729 | { |
| 3730 | /* Track dynamic relocs needed for local syms too. |
| 3731 | We really need local syms available to do this |
| 3732 | easily. Oh well. */ |
| 3733 | asection *s; |
| 3734 | void *vpp; |
| 3735 | |
| 3736 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); |
| 3737 | if (s == NULL) |
| 3738 | abort (); |
| 3739 | |
| 3740 | vpp = &elf_section_data (s)->local_dynrel; |
| 3741 | return (struct elf_dyn_relocs **) vpp; |
| 3742 | } |
| 3743 | } |
| 3744 | |
| 3745 | /* Initialize an entry in the stub hash table. */ |
| 3746 | |
| 3747 | static struct bfd_hash_entry * |
| 3748 | stub_hash_newfunc (struct bfd_hash_entry *entry, |
| 3749 | struct bfd_hash_table *table, |
| 3750 | const char *string) |
| 3751 | { |
| 3752 | /* Allocate the structure if it has not already been allocated by a |
| 3753 | subclass. */ |
| 3754 | if (entry == NULL) |
| 3755 | { |
| 3756 | entry = (struct bfd_hash_entry *) |
| 3757 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); |
| 3758 | if (entry == NULL) |
| 3759 | return entry; |
| 3760 | } |
| 3761 | |
| 3762 | /* Call the allocation method of the superclass. */ |
| 3763 | entry = bfd_hash_newfunc (entry, table, string); |
| 3764 | if (entry != NULL) |
| 3765 | { |
| 3766 | struct elf32_arm_stub_hash_entry *eh; |
| 3767 | |
| 3768 | /* Initialize the local fields. */ |
| 3769 | eh = (struct elf32_arm_stub_hash_entry *) entry; |
| 3770 | eh->stub_sec = NULL; |
| 3771 | eh->stub_offset = (bfd_vma) -1; |
| 3772 | eh->source_value = 0; |
| 3773 | eh->target_value = 0; |
| 3774 | eh->target_section = NULL; |
| 3775 | eh->orig_insn = 0; |
| 3776 | eh->stub_type = arm_stub_none; |
| 3777 | eh->stub_size = 0; |
| 3778 | eh->stub_template = NULL; |
| 3779 | eh->stub_template_size = -1; |
| 3780 | eh->h = NULL; |
| 3781 | eh->id_sec = NULL; |
| 3782 | eh->output_name = NULL; |
| 3783 | } |
| 3784 | |
| 3785 | return entry; |
| 3786 | } |
| 3787 | |
| 3788 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
| 3789 | shortcuts to them in our hash table. */ |
| 3790 | |
| 3791 | static bfd_boolean |
| 3792 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
| 3793 | { |
| 3794 | struct elf32_arm_link_hash_table *htab; |
| 3795 | |
| 3796 | htab = elf32_arm_hash_table (info); |
| 3797 | if (htab == NULL) |
| 3798 | return FALSE; |
| 3799 | |
| 3800 | /* BPABI objects never have a GOT, or associated sections. */ |
| 3801 | if (htab->symbian_p) |
| 3802 | return TRUE; |
| 3803 | |
| 3804 | if (! _bfd_elf_create_got_section (dynobj, info)) |
| 3805 | return FALSE; |
| 3806 | |
| 3807 | /* Also create .rofixup. */ |
| 3808 | if (htab->fdpic_p) |
| 3809 | { |
| 3810 | htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup", |
| 3811 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS |
| 3812 | | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY)); |
| 3813 | if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2)) |
| 3814 | return FALSE; |
| 3815 | } |
| 3816 | |
| 3817 | return TRUE; |
| 3818 | } |
| 3819 | |
| 3820 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
| 3821 | |
| 3822 | static bfd_boolean |
| 3823 | create_ifunc_sections (struct bfd_link_info *info) |
| 3824 | { |
| 3825 | struct elf32_arm_link_hash_table *htab; |
| 3826 | const struct elf_backend_data *bed; |
| 3827 | bfd *dynobj; |
| 3828 | asection *s; |
| 3829 | flagword flags; |
| 3830 | |
| 3831 | htab = elf32_arm_hash_table (info); |
| 3832 | dynobj = htab->root.dynobj; |
| 3833 | bed = get_elf_backend_data (dynobj); |
| 3834 | flags = bed->dynamic_sec_flags; |
| 3835 | |
| 3836 | if (htab->root.iplt == NULL) |
| 3837 | { |
| 3838 | s = bfd_make_section_anyway_with_flags (dynobj, ".iplt", |
| 3839 | flags | SEC_READONLY | SEC_CODE); |
| 3840 | if (s == NULL |
| 3841 | || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment)) |
| 3842 | return FALSE; |
| 3843 | htab->root.iplt = s; |
| 3844 | } |
| 3845 | |
| 3846 | if (htab->root.irelplt == NULL) |
| 3847 | { |
| 3848 | s = bfd_make_section_anyway_with_flags (dynobj, |
| 3849 | RELOC_SECTION (htab, ".iplt"), |
| 3850 | flags | SEC_READONLY); |
| 3851 | if (s == NULL |
| 3852 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) |
| 3853 | return FALSE; |
| 3854 | htab->root.irelplt = s; |
| 3855 | } |
| 3856 | |
| 3857 | if (htab->root.igotplt == NULL) |
| 3858 | { |
| 3859 | s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags); |
| 3860 | if (s == NULL |
| 3861 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) |
| 3862 | return FALSE; |
| 3863 | htab->root.igotplt = s; |
| 3864 | } |
| 3865 | return TRUE; |
| 3866 | } |
| 3867 | |
| 3868 | /* Determine if we're dealing with a Thumb only architecture. */ |
| 3869 | |
| 3870 | static bfd_boolean |
| 3871 | using_thumb_only (struct elf32_arm_link_hash_table *globals) |
| 3872 | { |
| 3873 | int arch; |
| 3874 | int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
| 3875 | Tag_CPU_arch_profile); |
| 3876 | |
| 3877 | if (profile) |
| 3878 | return profile == 'M'; |
| 3879 | |
| 3880 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
| 3881 | |
| 3882 | /* Force return logic to be reviewed for each new architecture. */ |
| 3883 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN); |
| 3884 | |
| 3885 | if (arch == TAG_CPU_ARCH_V6_M |
| 3886 | || arch == TAG_CPU_ARCH_V6S_M |
| 3887 | || arch == TAG_CPU_ARCH_V7E_M |
| 3888 | || arch == TAG_CPU_ARCH_V8M_BASE |
| 3889 | || arch == TAG_CPU_ARCH_V8M_MAIN |
| 3890 | || arch == TAG_CPU_ARCH_V8_1M_MAIN) |
| 3891 | return TRUE; |
| 3892 | |
| 3893 | return FALSE; |
| 3894 | } |
| 3895 | |
| 3896 | /* Determine if we're dealing with a Thumb-2 object. */ |
| 3897 | |
| 3898 | static bfd_boolean |
| 3899 | using_thumb2 (struct elf32_arm_link_hash_table *globals) |
| 3900 | { |
| 3901 | int arch; |
| 3902 | int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
| 3903 | Tag_THUMB_ISA_use); |
| 3904 | |
| 3905 | if (thumb_isa) |
| 3906 | return thumb_isa == 2; |
| 3907 | |
| 3908 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
| 3909 | |
| 3910 | /* Force return logic to be reviewed for each new architecture. */ |
| 3911 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN); |
| 3912 | |
| 3913 | return (arch == TAG_CPU_ARCH_V6T2 |
| 3914 | || arch == TAG_CPU_ARCH_V7 |
| 3915 | || arch == TAG_CPU_ARCH_V7E_M |
| 3916 | || arch == TAG_CPU_ARCH_V8 |
| 3917 | || arch == TAG_CPU_ARCH_V8R |
| 3918 | || arch == TAG_CPU_ARCH_V8M_MAIN |
| 3919 | || arch == TAG_CPU_ARCH_V8_1M_MAIN); |
| 3920 | } |
| 3921 | |
| 3922 | /* Determine whether Thumb-2 BL instruction is available. */ |
| 3923 | |
| 3924 | static bfd_boolean |
| 3925 | using_thumb2_bl (struct elf32_arm_link_hash_table *globals) |
| 3926 | { |
| 3927 | int arch = |
| 3928 | bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
| 3929 | |
| 3930 | /* Force return logic to be reviewed for each new architecture. */ |
| 3931 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN); |
| 3932 | |
| 3933 | /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */ |
| 3934 | return (arch == TAG_CPU_ARCH_V6T2 |
| 3935 | || arch >= TAG_CPU_ARCH_V7); |
| 3936 | } |
| 3937 | |
| 3938 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
| 3939 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our |
| 3940 | hash table. */ |
| 3941 | |
| 3942 | static bfd_boolean |
| 3943 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
| 3944 | { |
| 3945 | struct elf32_arm_link_hash_table *htab; |
| 3946 | |
| 3947 | htab = elf32_arm_hash_table (info); |
| 3948 | if (htab == NULL) |
| 3949 | return FALSE; |
| 3950 | |
| 3951 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
| 3952 | return FALSE; |
| 3953 | |
| 3954 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) |
| 3955 | return FALSE; |
| 3956 | |
| 3957 | if (htab->vxworks_p) |
| 3958 | { |
| 3959 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) |
| 3960 | return FALSE; |
| 3961 | |
| 3962 | if (bfd_link_pic (info)) |
| 3963 | { |
| 3964 | htab->plt_header_size = 0; |
| 3965 | htab->plt_entry_size |
| 3966 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); |
| 3967 | } |
| 3968 | else |
| 3969 | { |
| 3970 | htab->plt_header_size |
| 3971 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); |
| 3972 | htab->plt_entry_size |
| 3973 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); |
| 3974 | } |
| 3975 | |
| 3976 | if (elf_elfheader (dynobj)) |
| 3977 | elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32; |
| 3978 | } |
| 3979 | else |
| 3980 | { |
| 3981 | /* PR ld/16017 |
| 3982 | Test for thumb only architectures. Note - we cannot just call |
| 3983 | using_thumb_only() as the attributes in the output bfd have not been |
| 3984 | initialised at this point, so instead we use the input bfd. */ |
| 3985 | bfd * saved_obfd = htab->obfd; |
| 3986 | |
| 3987 | htab->obfd = dynobj; |
| 3988 | if (using_thumb_only (htab)) |
| 3989 | { |
| 3990 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); |
| 3991 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); |
| 3992 | } |
| 3993 | htab->obfd = saved_obfd; |
| 3994 | } |
| 3995 | |
| 3996 | if (htab->fdpic_p) { |
| 3997 | htab->plt_header_size = 0; |
| 3998 | if (info->flags & DF_BIND_NOW) |
| 3999 | htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5); |
| 4000 | else |
| 4001 | htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry); |
| 4002 | } |
| 4003 | |
| 4004 | if (!htab->root.splt |
| 4005 | || !htab->root.srelplt |
| 4006 | || !htab->root.sdynbss |
| 4007 | || (!bfd_link_pic (info) && !htab->root.srelbss)) |
| 4008 | abort (); |
| 4009 | |
| 4010 | return TRUE; |
| 4011 | } |
| 4012 | |
| 4013 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
| 4014 | |
| 4015 | static void |
| 4016 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, |
| 4017 | struct elf_link_hash_entry *dir, |
| 4018 | struct elf_link_hash_entry *ind) |
| 4019 | { |
| 4020 | struct elf32_arm_link_hash_entry *edir, *eind; |
| 4021 | |
| 4022 | edir = (struct elf32_arm_link_hash_entry *) dir; |
| 4023 | eind = (struct elf32_arm_link_hash_entry *) ind; |
| 4024 | |
| 4025 | if (eind->dyn_relocs != NULL) |
| 4026 | { |
| 4027 | if (edir->dyn_relocs != NULL) |
| 4028 | { |
| 4029 | struct elf_dyn_relocs **pp; |
| 4030 | struct elf_dyn_relocs *p; |
| 4031 | |
| 4032 | /* Add reloc counts against the indirect sym to the direct sym |
| 4033 | list. Merge any entries against the same section. */ |
| 4034 | for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) |
| 4035 | { |
| 4036 | struct elf_dyn_relocs *q; |
| 4037 | |
| 4038 | for (q = edir->dyn_relocs; q != NULL; q = q->next) |
| 4039 | if (q->sec == p->sec) |
| 4040 | { |
| 4041 | q->pc_count += p->pc_count; |
| 4042 | q->count += p->count; |
| 4043 | *pp = p->next; |
| 4044 | break; |
| 4045 | } |
| 4046 | if (q == NULL) |
| 4047 | pp = &p->next; |
| 4048 | } |
| 4049 | *pp = edir->dyn_relocs; |
| 4050 | } |
| 4051 | |
| 4052 | edir->dyn_relocs = eind->dyn_relocs; |
| 4053 | eind->dyn_relocs = NULL; |
| 4054 | } |
| 4055 | |
| 4056 | if (ind->root.type == bfd_link_hash_indirect) |
| 4057 | { |
| 4058 | /* Copy over PLT info. */ |
| 4059 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
| 4060 | eind->plt.thumb_refcount = 0; |
| 4061 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; |
| 4062 | eind->plt.maybe_thumb_refcount = 0; |
| 4063 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; |
| 4064 | eind->plt.noncall_refcount = 0; |
| 4065 | |
| 4066 | /* Copy FDPIC counters. */ |
| 4067 | edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt; |
| 4068 | edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt; |
| 4069 | edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt; |
| 4070 | |
| 4071 | /* We should only allocate a function to .iplt once the final |
| 4072 | symbol information is known. */ |
| 4073 | BFD_ASSERT (!eind->is_iplt); |
| 4074 | |
| 4075 | if (dir->got.refcount <= 0) |
| 4076 | { |
| 4077 | edir->tls_type = eind->tls_type; |
| 4078 | eind->tls_type = GOT_UNKNOWN; |
| 4079 | } |
| 4080 | } |
| 4081 | |
| 4082 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); |
| 4083 | } |
| 4084 | |
| 4085 | /* Destroy an ARM elf linker hash table. */ |
| 4086 | |
| 4087 | static void |
| 4088 | elf32_arm_link_hash_table_free (bfd *obfd) |
| 4089 | { |
| 4090 | struct elf32_arm_link_hash_table *ret |
| 4091 | = (struct elf32_arm_link_hash_table *) obfd->link.hash; |
| 4092 | |
| 4093 | bfd_hash_table_free (&ret->stub_hash_table); |
| 4094 | _bfd_elf_link_hash_table_free (obfd); |
| 4095 | } |
| 4096 | |
| 4097 | /* Create an ARM elf linker hash table. */ |
| 4098 | |
| 4099 | static struct bfd_link_hash_table * |
| 4100 | elf32_arm_link_hash_table_create (bfd *abfd) |
| 4101 | { |
| 4102 | struct elf32_arm_link_hash_table *ret; |
| 4103 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); |
| 4104 | |
| 4105 | ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt); |
| 4106 | if (ret == NULL) |
| 4107 | return NULL; |
| 4108 | |
| 4109 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, |
| 4110 | elf32_arm_link_hash_newfunc, |
| 4111 | sizeof (struct elf32_arm_link_hash_entry), |
| 4112 | ARM_ELF_DATA)) |
| 4113 | { |
| 4114 | free (ret); |
| 4115 | return NULL; |
| 4116 | } |
| 4117 | |
| 4118 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
| 4119 | ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE; |
| 4120 | #ifdef FOUR_WORD_PLT |
| 4121 | ret->plt_header_size = 16; |
| 4122 | ret->plt_entry_size = 16; |
| 4123 | #else |
| 4124 | ret->plt_header_size = 20; |
| 4125 | ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12; |
| 4126 | #endif |
| 4127 | ret->use_rel = TRUE; |
| 4128 | ret->obfd = abfd; |
| 4129 | ret->fdpic_p = 0; |
| 4130 | |
| 4131 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, |
| 4132 | sizeof (struct elf32_arm_stub_hash_entry))) |
| 4133 | { |
| 4134 | _bfd_elf_link_hash_table_free (abfd); |
| 4135 | return NULL; |
| 4136 | } |
| 4137 | ret->root.root.hash_table_free = elf32_arm_link_hash_table_free; |
| 4138 | |
| 4139 | return &ret->root.root; |
| 4140 | } |
| 4141 | |
| 4142 | /* Determine what kind of NOPs are available. */ |
| 4143 | |
| 4144 | static bfd_boolean |
| 4145 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) |
| 4146 | { |
| 4147 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
| 4148 | Tag_CPU_arch); |
| 4149 | |
| 4150 | /* Force return logic to be reviewed for each new architecture. */ |
| 4151 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN); |
| 4152 | |
| 4153 | return (arch == TAG_CPU_ARCH_V6T2 |
| 4154 | || arch == TAG_CPU_ARCH_V6K |
| 4155 | || arch == TAG_CPU_ARCH_V7 |
| 4156 | || arch == TAG_CPU_ARCH_V8 |
| 4157 | || arch == TAG_CPU_ARCH_V8R); |
| 4158 | } |
| 4159 | |
| 4160 | static bfd_boolean |
| 4161 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) |
| 4162 | { |
| 4163 | switch (stub_type) |
| 4164 | { |
| 4165 | case arm_stub_long_branch_thumb_only: |
| 4166 | case arm_stub_long_branch_thumb2_only: |
| 4167 | case arm_stub_long_branch_thumb2_only_pure: |
| 4168 | case arm_stub_long_branch_v4t_thumb_arm: |
| 4169 | case arm_stub_short_branch_v4t_thumb_arm: |
| 4170 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
| 4171 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
| 4172 | case arm_stub_long_branch_thumb_only_pic: |
| 4173 | case arm_stub_cmse_branch_thumb_only: |
| 4174 | return TRUE; |
| 4175 | case arm_stub_none: |
| 4176 | BFD_FAIL (); |
| 4177 | return FALSE; |
| 4178 | break; |
| 4179 | default: |
| 4180 | return FALSE; |
| 4181 | } |
| 4182 | } |
| 4183 | |
| 4184 | /* Determine the type of stub needed, if any, for a call. */ |
| 4185 | |
| 4186 | static enum elf32_arm_stub_type |
| 4187 | arm_type_of_stub (struct bfd_link_info *info, |
| 4188 | asection *input_sec, |
| 4189 | const Elf_Internal_Rela *rel, |
| 4190 | unsigned char st_type, |
| 4191 | enum arm_st_branch_type *actual_branch_type, |
| 4192 | struct elf32_arm_link_hash_entry *hash, |
| 4193 | bfd_vma destination, |
| 4194 | asection *sym_sec, |
| 4195 | bfd *input_bfd, |
| 4196 | const char *name) |
| 4197 | { |
| 4198 | bfd_vma location; |
| 4199 | bfd_signed_vma branch_offset; |
| 4200 | unsigned int r_type; |
| 4201 | struct elf32_arm_link_hash_table * globals; |
| 4202 | bfd_boolean thumb2, thumb2_bl, thumb_only; |
| 4203 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
| 4204 | int use_plt = 0; |
| 4205 | enum arm_st_branch_type branch_type = *actual_branch_type; |
| 4206 | union gotplt_union *root_plt; |
| 4207 | struct arm_plt_info *arm_plt; |
| 4208 | int arch; |
| 4209 | int thumb2_movw; |
| 4210 | |
| 4211 | if (branch_type == ST_BRANCH_LONG) |
| 4212 | return stub_type; |
| 4213 | |
| 4214 | globals = elf32_arm_hash_table (info); |
| 4215 | if (globals == NULL) |
| 4216 | return stub_type; |
| 4217 | |
| 4218 | thumb_only = using_thumb_only (globals); |
| 4219 | thumb2 = using_thumb2 (globals); |
| 4220 | thumb2_bl = using_thumb2_bl (globals); |
| 4221 | |
| 4222 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
| 4223 | |
| 4224 | /* True for architectures that implement the thumb2 movw instruction. */ |
| 4225 | thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE); |
| 4226 | |
| 4227 | /* Determine where the call point is. */ |
| 4228 | location = (input_sec->output_offset |
| 4229 | + input_sec->output_section->vma |
| 4230 | + rel->r_offset); |
| 4231 | |
| 4232 | r_type = ELF32_R_TYPE (rel->r_info); |
| 4233 | |
| 4234 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
| 4235 | are considering a function call relocation. */ |
| 4236 | if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
| 4237 | || r_type == R_ARM_THM_JUMP19) |
| 4238 | && branch_type == ST_BRANCH_TO_ARM) |
| 4239 | branch_type = ST_BRANCH_TO_THUMB; |
| 4240 | |
| 4241 | /* For TLS call relocs, it is the caller's responsibility to provide |
| 4242 | the address of the appropriate trampoline. */ |
| 4243 | if (r_type != R_ARM_TLS_CALL |
| 4244 | && r_type != R_ARM_THM_TLS_CALL |
| 4245 | && elf32_arm_get_plt_info (input_bfd, globals, hash, |
| 4246 | ELF32_R_SYM (rel->r_info), &root_plt, |
| 4247 | &arm_plt) |
| 4248 | && root_plt->offset != (bfd_vma) -1) |
| 4249 | { |
| 4250 | asection *splt; |
| 4251 | |
| 4252 | if (hash == NULL || hash->is_iplt) |
| 4253 | splt = globals->root.iplt; |
| 4254 | else |
| 4255 | splt = globals->root.splt; |
| 4256 | if (splt != NULL) |
| 4257 | { |
| 4258 | use_plt = 1; |
| 4259 | |
| 4260 | /* Note when dealing with PLT entries: the main PLT stub is in |
| 4261 | ARM mode, so if the branch is in Thumb mode, another |
| 4262 | Thumb->ARM stub will be inserted later just before the ARM |
| 4263 | PLT stub. If a long branch stub is needed, we'll add a |
| 4264 | Thumb->Arm one and branch directly to the ARM PLT entry. |
| 4265 | Here, we have to check if a pre-PLT Thumb->ARM stub |
| 4266 | is needed and if it will be close enough. */ |
| 4267 | |
| 4268 | destination = (splt->output_section->vma |
| 4269 | + splt->output_offset |
| 4270 | + root_plt->offset); |
| 4271 | st_type = STT_FUNC; |
| 4272 | |
| 4273 | /* Thumb branch/call to PLT: it can become a branch to ARM |
| 4274 | or to Thumb. We must perform the same checks and |
| 4275 | corrections as in elf32_arm_final_link_relocate. */ |
| 4276 | if ((r_type == R_ARM_THM_CALL) |
| 4277 | || (r_type == R_ARM_THM_JUMP24)) |
| 4278 | { |
| 4279 | if (globals->use_blx |
| 4280 | && r_type == R_ARM_THM_CALL |
| 4281 | && !thumb_only) |
| 4282 | { |
| 4283 | /* If the Thumb BLX instruction is available, convert |
| 4284 | the BL to a BLX instruction to call the ARM-mode |
| 4285 | PLT entry. */ |
| 4286 | branch_type = ST_BRANCH_TO_ARM; |
| 4287 | } |
| 4288 | else |
| 4289 | { |
| 4290 | if (!thumb_only) |
| 4291 | /* Target the Thumb stub before the ARM PLT entry. */ |
| 4292 | destination -= PLT_THUMB_STUB_SIZE; |
| 4293 | branch_type = ST_BRANCH_TO_THUMB; |
| 4294 | } |
| 4295 | } |
| 4296 | else |
| 4297 | { |
| 4298 | branch_type = ST_BRANCH_TO_ARM; |
| 4299 | } |
| 4300 | } |
| 4301 | } |
| 4302 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
| 4303 | BFD_ASSERT (st_type != STT_GNU_IFUNC); |
| 4304 | |
| 4305 | branch_offset = (bfd_signed_vma)(destination - location); |
| 4306 | |
| 4307 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
| 4308 | || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19) |
| 4309 | { |
| 4310 | /* Handle cases where: |
| 4311 | - this call goes too far (different Thumb/Thumb2 max |
| 4312 | distance) |
| 4313 | - it's a Thumb->Arm call and blx is not available, or it's a |
| 4314 | Thumb->Arm branch (not bl). A stub is needed in this case, |
| 4315 | but only if this call is not through a PLT entry. Indeed, |
| 4316 | PLT stubs handle mode switching already. */ |
| 4317 | if ((!thumb2_bl |
| 4318 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET |
| 4319 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) |
| 4320 | || (thumb2_bl |
| 4321 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET |
| 4322 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) |
| 4323 | || (thumb2 |
| 4324 | && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET |
| 4325 | || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET)) |
| 4326 | && (r_type == R_ARM_THM_JUMP19)) |
| 4327 | || (branch_type == ST_BRANCH_TO_ARM |
| 4328 | && (((r_type == R_ARM_THM_CALL |
| 4329 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) |
| 4330 | || (r_type == R_ARM_THM_JUMP24) |
| 4331 | || (r_type == R_ARM_THM_JUMP19)) |
| 4332 | && !use_plt)) |
| 4333 | { |
| 4334 | /* If we need to insert a Thumb-Thumb long branch stub to a |
| 4335 | PLT, use one that branches directly to the ARM PLT |
| 4336 | stub. If we pretended we'd use the pre-PLT Thumb->ARM |
| 4337 | stub, undo this now. */ |
| 4338 | if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) |
| 4339 | { |
| 4340 | branch_type = ST_BRANCH_TO_ARM; |
| 4341 | branch_offset += PLT_THUMB_STUB_SIZE; |
| 4342 | } |
| 4343 | |
| 4344 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 4345 | { |
| 4346 | /* Thumb to thumb. */ |
| 4347 | if (!thumb_only) |
| 4348 | { |
| 4349 | if (input_sec->flags & SEC_ELF_PURECODE) |
| 4350 | _bfd_error_handler |
| 4351 | (_("%pB(%pA): warning: long branch veneers used in" |
| 4352 | " section with SHF_ARM_PURECODE section" |
| 4353 | " attribute is only supported for M-profile" |
| 4354 | " targets that implement the movw instruction"), |
| 4355 | input_bfd, input_sec); |
| 4356 | |
| 4357 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
| 4358 | /* PIC stubs. */ |
| 4359 | ? ((globals->use_blx |
| 4360 | && (r_type == R_ARM_THM_CALL)) |
| 4361 | /* V5T and above. Stub starts with ARM code, so |
| 4362 | we must be able to switch mode before |
| 4363 | reaching it, which is only possible for 'bl' |
| 4364 | (ie R_ARM_THM_CALL relocation). */ |
| 4365 | ? arm_stub_long_branch_any_thumb_pic |
| 4366 | /* On V4T, use Thumb code only. */ |
| 4367 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
| 4368 | |
| 4369 | /* non-PIC stubs. */ |
| 4370 | : ((globals->use_blx |
| 4371 | && (r_type == R_ARM_THM_CALL)) |
| 4372 | /* V5T and above. */ |
| 4373 | ? arm_stub_long_branch_any_any |
| 4374 | /* V4T. */ |
| 4375 | : arm_stub_long_branch_v4t_thumb_thumb); |
| 4376 | } |
| 4377 | else |
| 4378 | { |
| 4379 | if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE)) |
| 4380 | stub_type = arm_stub_long_branch_thumb2_only_pure; |
| 4381 | else |
| 4382 | { |
| 4383 | if (input_sec->flags & SEC_ELF_PURECODE) |
| 4384 | _bfd_error_handler |
| 4385 | (_("%pB(%pA): warning: long branch veneers used in" |
| 4386 | " section with SHF_ARM_PURECODE section" |
| 4387 | " attribute is only supported for M-profile" |
| 4388 | " targets that implement the movw instruction"), |
| 4389 | input_bfd, input_sec); |
| 4390 | |
| 4391 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
| 4392 | /* PIC stub. */ |
| 4393 | ? arm_stub_long_branch_thumb_only_pic |
| 4394 | /* non-PIC stub. */ |
| 4395 | : (thumb2 ? arm_stub_long_branch_thumb2_only |
| 4396 | : arm_stub_long_branch_thumb_only); |
| 4397 | } |
| 4398 | } |
| 4399 | } |
| 4400 | else |
| 4401 | { |
| 4402 | if (input_sec->flags & SEC_ELF_PURECODE) |
| 4403 | _bfd_error_handler |
| 4404 | (_("%pB(%pA): warning: long branch veneers used in" |
| 4405 | " section with SHF_ARM_PURECODE section" |
| 4406 | " attribute is only supported" " for M-profile" |
| 4407 | " targets that implement the movw instruction"), |
| 4408 | input_bfd, input_sec); |
| 4409 | |
| 4410 | /* Thumb to arm. */ |
| 4411 | if (sym_sec != NULL |
| 4412 | && sym_sec->owner != NULL |
| 4413 | && !INTERWORK_FLAG (sym_sec->owner)) |
| 4414 | { |
| 4415 | _bfd_error_handler |
| 4416 | (_("%pB(%s): warning: interworking not enabled;" |
| 4417 | " first occurrence: %pB: %s call to %s"), |
| 4418 | sym_sec->owner, name, input_bfd, "Thumb", "ARM"); |
| 4419 | } |
| 4420 | |
| 4421 | stub_type = |
| 4422 | (bfd_link_pic (info) | globals->pic_veneer) |
| 4423 | /* PIC stubs. */ |
| 4424 | ? (r_type == R_ARM_THM_TLS_CALL |
| 4425 | /* TLS PIC stubs. */ |
| 4426 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic |
| 4427 | : arm_stub_long_branch_v4t_thumb_tls_pic) |
| 4428 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
| 4429 | /* V5T PIC and above. */ |
| 4430 | ? arm_stub_long_branch_any_arm_pic |
| 4431 | /* V4T PIC stub. */ |
| 4432 | : arm_stub_long_branch_v4t_thumb_arm_pic)) |
| 4433 | |
| 4434 | /* non-PIC stubs. */ |
| 4435 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
| 4436 | /* V5T and above. */ |
| 4437 | ? arm_stub_long_branch_any_any |
| 4438 | /* V4T. */ |
| 4439 | : arm_stub_long_branch_v4t_thumb_arm); |
| 4440 | |
| 4441 | /* Handle v4t short branches. */ |
| 4442 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
| 4443 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
| 4444 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) |
| 4445 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
| 4446 | } |
| 4447 | } |
| 4448 | } |
| 4449 | else if (r_type == R_ARM_CALL |
| 4450 | || r_type == R_ARM_JUMP24 |
| 4451 | || r_type == R_ARM_PLT32 |
| 4452 | || r_type == R_ARM_TLS_CALL) |
| 4453 | { |
| 4454 | if (input_sec->flags & SEC_ELF_PURECODE) |
| 4455 | _bfd_error_handler |
| 4456 | (_("%pB(%pA): warning: long branch veneers used in" |
| 4457 | " section with SHF_ARM_PURECODE section" |
| 4458 | " attribute is only supported for M-profile" |
| 4459 | " targets that implement the movw instruction"), |
| 4460 | input_bfd, input_sec); |
| 4461 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 4462 | { |
| 4463 | /* Arm to thumb. */ |
| 4464 | |
| 4465 | if (sym_sec != NULL |
| 4466 | && sym_sec->owner != NULL |
| 4467 | && !INTERWORK_FLAG (sym_sec->owner)) |
| 4468 | { |
| 4469 | _bfd_error_handler |
| 4470 | (_("%pB(%s): warning: interworking not enabled;" |
| 4471 | " first occurrence: %pB: %s call to %s"), |
| 4472 | sym_sec->owner, name, input_bfd, "ARM", "Thumb"); |
| 4473 | } |
| 4474 | |
| 4475 | /* We have an extra 2-bytes reach because of |
| 4476 | the mode change (bit 24 (H) of BLX encoding). */ |
| 4477 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
| 4478 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) |
| 4479 | || (r_type == R_ARM_CALL && !globals->use_blx) |
| 4480 | || (r_type == R_ARM_JUMP24) |
| 4481 | || (r_type == R_ARM_PLT32)) |
| 4482 | { |
| 4483 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
| 4484 | /* PIC stubs. */ |
| 4485 | ? ((globals->use_blx) |
| 4486 | /* V5T and above. */ |
| 4487 | ? arm_stub_long_branch_any_thumb_pic |
| 4488 | /* V4T stub. */ |
| 4489 | : arm_stub_long_branch_v4t_arm_thumb_pic) |
| 4490 | |
| 4491 | /* non-PIC stubs. */ |
| 4492 | : ((globals->use_blx) |
| 4493 | /* V5T and above. */ |
| 4494 | ? arm_stub_long_branch_any_any |
| 4495 | /* V4T. */ |
| 4496 | : arm_stub_long_branch_v4t_arm_thumb); |
| 4497 | } |
| 4498 | } |
| 4499 | else |
| 4500 | { |
| 4501 | /* Arm to arm. */ |
| 4502 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET |
| 4503 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) |
| 4504 | { |
| 4505 | stub_type = |
| 4506 | (bfd_link_pic (info) | globals->pic_veneer) |
| 4507 | /* PIC stubs. */ |
| 4508 | ? (r_type == R_ARM_TLS_CALL |
| 4509 | /* TLS PIC Stub. */ |
| 4510 | ? arm_stub_long_branch_any_tls_pic |
| 4511 | : (globals->nacl_p |
| 4512 | ? arm_stub_long_branch_arm_nacl_pic |
| 4513 | : arm_stub_long_branch_any_arm_pic)) |
| 4514 | /* non-PIC stubs. */ |
| 4515 | : (globals->nacl_p |
| 4516 | ? arm_stub_long_branch_arm_nacl |
| 4517 | : arm_stub_long_branch_any_any); |
| 4518 | } |
| 4519 | } |
| 4520 | } |
| 4521 | |
| 4522 | /* If a stub is needed, record the actual destination type. */ |
| 4523 | if (stub_type != arm_stub_none) |
| 4524 | *actual_branch_type = branch_type; |
| 4525 | |
| 4526 | return stub_type; |
| 4527 | } |
| 4528 | |
| 4529 | /* Build a name for an entry in the stub hash table. */ |
| 4530 | |
| 4531 | static char * |
| 4532 | elf32_arm_stub_name (const asection *input_section, |
| 4533 | const asection *sym_sec, |
| 4534 | const struct elf32_arm_link_hash_entry *hash, |
| 4535 | const Elf_Internal_Rela *rel, |
| 4536 | enum elf32_arm_stub_type stub_type) |
| 4537 | { |
| 4538 | char *stub_name; |
| 4539 | bfd_size_type len; |
| 4540 | |
| 4541 | if (hash) |
| 4542 | { |
| 4543 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
| 4544 | stub_name = (char *) bfd_malloc (len); |
| 4545 | if (stub_name != NULL) |
| 4546 | sprintf (stub_name, "%08x_%s+%x_%d", |
| 4547 | input_section->id & 0xffffffff, |
| 4548 | hash->root.root.root.string, |
| 4549 | (int) rel->r_addend & 0xffffffff, |
| 4550 | (int) stub_type); |
| 4551 | } |
| 4552 | else |
| 4553 | { |
| 4554 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
| 4555 | stub_name = (char *) bfd_malloc (len); |
| 4556 | if (stub_name != NULL) |
| 4557 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
| 4558 | input_section->id & 0xffffffff, |
| 4559 | sym_sec->id & 0xffffffff, |
| 4560 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
| 4561 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL |
| 4562 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, |
| 4563 | (int) rel->r_addend & 0xffffffff, |
| 4564 | (int) stub_type); |
| 4565 | } |
| 4566 | |
| 4567 | return stub_name; |
| 4568 | } |
| 4569 | |
| 4570 | /* Look up an entry in the stub hash. Stub entries are cached because |
| 4571 | creating the stub name takes a bit of time. */ |
| 4572 | |
| 4573 | static struct elf32_arm_stub_hash_entry * |
| 4574 | elf32_arm_get_stub_entry (const asection *input_section, |
| 4575 | const asection *sym_sec, |
| 4576 | struct elf_link_hash_entry *hash, |
| 4577 | const Elf_Internal_Rela *rel, |
| 4578 | struct elf32_arm_link_hash_table *htab, |
| 4579 | enum elf32_arm_stub_type stub_type) |
| 4580 | { |
| 4581 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 4582 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; |
| 4583 | const asection *id_sec; |
| 4584 | |
| 4585 | if ((input_section->flags & SEC_CODE) == 0) |
| 4586 | return NULL; |
| 4587 | |
| 4588 | /* If the input section is the CMSE stubs one and it needs a long |
| 4589 | branch stub to reach it's final destination, give up with an |
| 4590 | error message: this is not supported. See PR ld/24709. */ |
| 4591 | if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME))) |
| 4592 | { |
| 4593 | bfd *output_bfd = htab->obfd; |
| 4594 | asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME); |
| 4595 | |
| 4596 | _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far " |
| 4597 | "(%#" PRIx64 ") from destination (%#" PRIx64 ")"), |
| 4598 | CMSE_STUB_NAME, |
| 4599 | (uint64_t)out_sec->output_section->vma |
| 4600 | + out_sec->output_offset, |
| 4601 | (uint64_t)sym_sec->output_section->vma |
| 4602 | + sym_sec->output_offset |
| 4603 | + h->root.root.u.def.value); |
| 4604 | /* Exit, rather than leave incompletely processed |
| 4605 | relocations. */ |
| 4606 | xexit(1); |
| 4607 | } |
| 4608 | |
| 4609 | /* If this input section is part of a group of sections sharing one |
| 4610 | stub section, then use the id of the first section in the group. |
| 4611 | Stub names need to include a section id, as there may well be |
| 4612 | more than one stub used to reach say, printf, and we need to |
| 4613 | distinguish between them. */ |
| 4614 | BFD_ASSERT (input_section->id <= htab->top_id); |
| 4615 | id_sec = htab->stub_group[input_section->id].link_sec; |
| 4616 | |
| 4617 | if (h != NULL && h->stub_cache != NULL |
| 4618 | && h->stub_cache->h == h |
| 4619 | && h->stub_cache->id_sec == id_sec |
| 4620 | && h->stub_cache->stub_type == stub_type) |
| 4621 | { |
| 4622 | stub_entry = h->stub_cache; |
| 4623 | } |
| 4624 | else |
| 4625 | { |
| 4626 | char *stub_name; |
| 4627 | |
| 4628 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
| 4629 | if (stub_name == NULL) |
| 4630 | return NULL; |
| 4631 | |
| 4632 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, |
| 4633 | stub_name, FALSE, FALSE); |
| 4634 | if (h != NULL) |
| 4635 | h->stub_cache = stub_entry; |
| 4636 | |
| 4637 | free (stub_name); |
| 4638 | } |
| 4639 | |
| 4640 | return stub_entry; |
| 4641 | } |
| 4642 | |
| 4643 | /* Whether veneers of type STUB_TYPE require to be in a dedicated output |
| 4644 | section. */ |
| 4645 | |
| 4646 | static bfd_boolean |
| 4647 | arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type) |
| 4648 | { |
| 4649 | if (stub_type >= max_stub_type) |
| 4650 | abort (); /* Should be unreachable. */ |
| 4651 | |
| 4652 | switch (stub_type) |
| 4653 | { |
| 4654 | case arm_stub_cmse_branch_thumb_only: |
| 4655 | return TRUE; |
| 4656 | |
| 4657 | default: |
| 4658 | return FALSE; |
| 4659 | } |
| 4660 | |
| 4661 | abort (); /* Should be unreachable. */ |
| 4662 | } |
| 4663 | |
| 4664 | /* Required alignment (as a power of 2) for the dedicated section holding |
| 4665 | veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed |
| 4666 | with input sections. */ |
| 4667 | |
| 4668 | static int |
| 4669 | arm_dedicated_stub_output_section_required_alignment |
| 4670 | (enum elf32_arm_stub_type stub_type) |
| 4671 | { |
| 4672 | if (stub_type >= max_stub_type) |
| 4673 | abort (); /* Should be unreachable. */ |
| 4674 | |
| 4675 | switch (stub_type) |
| 4676 | { |
| 4677 | /* Vectors of Secure Gateway veneers must be aligned on 32byte |
| 4678 | boundary. */ |
| 4679 | case arm_stub_cmse_branch_thumb_only: |
| 4680 | return 5; |
| 4681 | |
| 4682 | default: |
| 4683 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); |
| 4684 | return 0; |
| 4685 | } |
| 4686 | |
| 4687 | abort (); /* Should be unreachable. */ |
| 4688 | } |
| 4689 | |
| 4690 | /* Name of the dedicated output section to put veneers of type STUB_TYPE, or |
| 4691 | NULL if veneers of this type are interspersed with input sections. */ |
| 4692 | |
| 4693 | static const char * |
| 4694 | arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type) |
| 4695 | { |
| 4696 | if (stub_type >= max_stub_type) |
| 4697 | abort (); /* Should be unreachable. */ |
| 4698 | |
| 4699 | switch (stub_type) |
| 4700 | { |
| 4701 | case arm_stub_cmse_branch_thumb_only: |
| 4702 | return CMSE_STUB_NAME; |
| 4703 | |
| 4704 | default: |
| 4705 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); |
| 4706 | return NULL; |
| 4707 | } |
| 4708 | |
| 4709 | abort (); /* Should be unreachable. */ |
| 4710 | } |
| 4711 | |
| 4712 | /* If veneers of type STUB_TYPE should go in a dedicated output section, |
| 4713 | returns the address of the hash table field in HTAB holding a pointer to the |
| 4714 | corresponding input section. Otherwise, returns NULL. */ |
| 4715 | |
| 4716 | static asection ** |
| 4717 | arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab, |
| 4718 | enum elf32_arm_stub_type stub_type) |
| 4719 | { |
| 4720 | if (stub_type >= max_stub_type) |
| 4721 | abort (); /* Should be unreachable. */ |
| 4722 | |
| 4723 | switch (stub_type) |
| 4724 | { |
| 4725 | case arm_stub_cmse_branch_thumb_only: |
| 4726 | return &htab->cmse_stub_sec; |
| 4727 | |
| 4728 | default: |
| 4729 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); |
| 4730 | return NULL; |
| 4731 | } |
| 4732 | |
| 4733 | abort (); /* Should be unreachable. */ |
| 4734 | } |
| 4735 | |
| 4736 | /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION |
| 4737 | is the section that branch into veneer and can be NULL if stub should go in |
| 4738 | a dedicated output section. Returns a pointer to the stub section, and the |
| 4739 | section to which the stub section will be attached (in *LINK_SEC_P). |
| 4740 | LINK_SEC_P may be NULL. */ |
| 4741 | |
| 4742 | static asection * |
| 4743 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, |
| 4744 | struct elf32_arm_link_hash_table *htab, |
| 4745 | enum elf32_arm_stub_type stub_type) |
| 4746 | { |
| 4747 | asection *link_sec, *out_sec, **stub_sec_p; |
| 4748 | const char *stub_sec_prefix; |
| 4749 | bfd_boolean dedicated_output_section = |
| 4750 | arm_dedicated_stub_output_section_required (stub_type); |
| 4751 | int align; |
| 4752 | |
| 4753 | if (dedicated_output_section) |
| 4754 | { |
| 4755 | bfd *output_bfd = htab->obfd; |
| 4756 | const char *out_sec_name = |
| 4757 | arm_dedicated_stub_output_section_name (stub_type); |
| 4758 | link_sec = NULL; |
| 4759 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); |
| 4760 | stub_sec_prefix = out_sec_name; |
| 4761 | align = arm_dedicated_stub_output_section_required_alignment (stub_type); |
| 4762 | out_sec = bfd_get_section_by_name (output_bfd, out_sec_name); |
| 4763 | if (out_sec == NULL) |
| 4764 | { |
| 4765 | _bfd_error_handler (_("no address assigned to the veneers output " |
| 4766 | "section %s"), out_sec_name); |
| 4767 | return NULL; |
| 4768 | } |
| 4769 | } |
| 4770 | else |
| 4771 | { |
| 4772 | BFD_ASSERT (section->id <= htab->top_id); |
| 4773 | link_sec = htab->stub_group[section->id].link_sec; |
| 4774 | BFD_ASSERT (link_sec != NULL); |
| 4775 | stub_sec_p = &htab->stub_group[section->id].stub_sec; |
| 4776 | if (*stub_sec_p == NULL) |
| 4777 | stub_sec_p = &htab->stub_group[link_sec->id].stub_sec; |
| 4778 | stub_sec_prefix = link_sec->name; |
| 4779 | out_sec = link_sec->output_section; |
| 4780 | align = htab->nacl_p ? 4 : 3; |
| 4781 | } |
| 4782 | |
| 4783 | if (*stub_sec_p == NULL) |
| 4784 | { |
| 4785 | size_t namelen; |
| 4786 | bfd_size_type len; |
| 4787 | char *s_name; |
| 4788 | |
| 4789 | namelen = strlen (stub_sec_prefix); |
| 4790 | len = namelen + sizeof (STUB_SUFFIX); |
| 4791 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); |
| 4792 | if (s_name == NULL) |
| 4793 | return NULL; |
| 4794 | |
| 4795 | memcpy (s_name, stub_sec_prefix, namelen); |
| 4796 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); |
| 4797 | *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec, |
| 4798 | align); |
| 4799 | if (*stub_sec_p == NULL) |
| 4800 | return NULL; |
| 4801 | |
| 4802 | out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE |
| 4803 | | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY |
| 4804 | | SEC_KEEP; |
| 4805 | } |
| 4806 | |
| 4807 | if (!dedicated_output_section) |
| 4808 | htab->stub_group[section->id].stub_sec = *stub_sec_p; |
| 4809 | |
| 4810 | if (link_sec_p) |
| 4811 | *link_sec_p = link_sec; |
| 4812 | |
| 4813 | return *stub_sec_p; |
| 4814 | } |
| 4815 | |
| 4816 | /* Add a new stub entry to the stub hash. Not all fields of the new |
| 4817 | stub entry are initialised. */ |
| 4818 | |
| 4819 | static struct elf32_arm_stub_hash_entry * |
| 4820 | elf32_arm_add_stub (const char *stub_name, asection *section, |
| 4821 | struct elf32_arm_link_hash_table *htab, |
| 4822 | enum elf32_arm_stub_type stub_type) |
| 4823 | { |
| 4824 | asection *link_sec; |
| 4825 | asection *stub_sec; |
| 4826 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 4827 | |
| 4828 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab, |
| 4829 | stub_type); |
| 4830 | if (stub_sec == NULL) |
| 4831 | return NULL; |
| 4832 | |
| 4833 | /* Enter this entry into the linker stub hash table. */ |
| 4834 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, |
| 4835 | TRUE, FALSE); |
| 4836 | if (stub_entry == NULL) |
| 4837 | { |
| 4838 | if (section == NULL) |
| 4839 | section = stub_sec; |
| 4840 | _bfd_error_handler (_("%pB: cannot create stub entry %s"), |
| 4841 | section->owner, stub_name); |
| 4842 | return NULL; |
| 4843 | } |
| 4844 | |
| 4845 | stub_entry->stub_sec = stub_sec; |
| 4846 | stub_entry->stub_offset = (bfd_vma) -1; |
| 4847 | stub_entry->id_sec = link_sec; |
| 4848 | |
| 4849 | return stub_entry; |
| 4850 | } |
| 4851 | |
| 4852 | /* Store an Arm insn into an output section not processed by |
| 4853 | elf32_arm_write_section. */ |
| 4854 | |
| 4855 | static void |
| 4856 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
| 4857 | bfd * output_bfd, bfd_vma val, void * ptr) |
| 4858 | { |
| 4859 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) |
| 4860 | bfd_putl32 (val, ptr); |
| 4861 | else |
| 4862 | bfd_putb32 (val, ptr); |
| 4863 | } |
| 4864 | |
| 4865 | /* Store a 16-bit Thumb insn into an output section not processed by |
| 4866 | elf32_arm_write_section. */ |
| 4867 | |
| 4868 | static void |
| 4869 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
| 4870 | bfd * output_bfd, bfd_vma val, void * ptr) |
| 4871 | { |
| 4872 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) |
| 4873 | bfd_putl16 (val, ptr); |
| 4874 | else |
| 4875 | bfd_putb16 (val, ptr); |
| 4876 | } |
| 4877 | |
| 4878 | /* Store a Thumb2 insn into an output section not processed by |
| 4879 | elf32_arm_write_section. */ |
| 4880 | |
| 4881 | static void |
| 4882 | put_thumb2_insn (struct elf32_arm_link_hash_table * htab, |
| 4883 | bfd * output_bfd, bfd_vma val, bfd_byte * ptr) |
| 4884 | { |
| 4885 | /* T2 instructions are 16-bit streamed. */ |
| 4886 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) |
| 4887 | { |
| 4888 | bfd_putl16 ((val >> 16) & 0xffff, ptr); |
| 4889 | bfd_putl16 ((val & 0xffff), ptr + 2); |
| 4890 | } |
| 4891 | else |
| 4892 | { |
| 4893 | bfd_putb16 ((val >> 16) & 0xffff, ptr); |
| 4894 | bfd_putb16 ((val & 0xffff), ptr + 2); |
| 4895 | } |
| 4896 | } |
| 4897 | |
| 4898 | /* If it's possible to change R_TYPE to a more efficient access |
| 4899 | model, return the new reloc type. */ |
| 4900 | |
| 4901 | static unsigned |
| 4902 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, |
| 4903 | struct elf_link_hash_entry *h) |
| 4904 | { |
| 4905 | int is_local = (h == NULL); |
| 4906 | |
| 4907 | if (bfd_link_pic (info) |
| 4908 | || (h && h->root.type == bfd_link_hash_undefweak)) |
| 4909 | return r_type; |
| 4910 | |
| 4911 | /* We do not support relaxations for Old TLS models. */ |
| 4912 | switch (r_type) |
| 4913 | { |
| 4914 | case R_ARM_TLS_GOTDESC: |
| 4915 | case R_ARM_TLS_CALL: |
| 4916 | case R_ARM_THM_TLS_CALL: |
| 4917 | case R_ARM_TLS_DESCSEQ: |
| 4918 | case R_ARM_THM_TLS_DESCSEQ: |
| 4919 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; |
| 4920 | } |
| 4921 | |
| 4922 | return r_type; |
| 4923 | } |
| 4924 | |
| 4925 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
| 4926 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, |
| 4927 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, |
| 4928 | const char *, unsigned char, enum arm_st_branch_type, |
| 4929 | struct elf_link_hash_entry *, bfd_boolean *, char **); |
| 4930 | |
| 4931 | static unsigned int |
| 4932 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) |
| 4933 | { |
| 4934 | switch (stub_type) |
| 4935 | { |
| 4936 | case arm_stub_a8_veneer_b_cond: |
| 4937 | case arm_stub_a8_veneer_b: |
| 4938 | case arm_stub_a8_veneer_bl: |
| 4939 | return 2; |
| 4940 | |
| 4941 | case arm_stub_long_branch_any_any: |
| 4942 | case arm_stub_long_branch_v4t_arm_thumb: |
| 4943 | case arm_stub_long_branch_thumb_only: |
| 4944 | case arm_stub_long_branch_thumb2_only: |
| 4945 | case arm_stub_long_branch_thumb2_only_pure: |
| 4946 | case arm_stub_long_branch_v4t_thumb_thumb: |
| 4947 | case arm_stub_long_branch_v4t_thumb_arm: |
| 4948 | case arm_stub_short_branch_v4t_thumb_arm: |
| 4949 | case arm_stub_long_branch_any_arm_pic: |
| 4950 | case arm_stub_long_branch_any_thumb_pic: |
| 4951 | case arm_stub_long_branch_v4t_thumb_thumb_pic: |
| 4952 | case arm_stub_long_branch_v4t_arm_thumb_pic: |
| 4953 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
| 4954 | case arm_stub_long_branch_thumb_only_pic: |
| 4955 | case arm_stub_long_branch_any_tls_pic: |
| 4956 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
| 4957 | case arm_stub_cmse_branch_thumb_only: |
| 4958 | case arm_stub_a8_veneer_blx: |
| 4959 | return 4; |
| 4960 | |
| 4961 | case arm_stub_long_branch_arm_nacl: |
| 4962 | case arm_stub_long_branch_arm_nacl_pic: |
| 4963 | return 16; |
| 4964 | |
| 4965 | default: |
| 4966 | abort (); /* Should be unreachable. */ |
| 4967 | } |
| 4968 | } |
| 4969 | |
| 4970 | /* Returns whether stubs of type STUB_TYPE take over the symbol they are |
| 4971 | veneering (TRUE) or have their own symbol (FALSE). */ |
| 4972 | |
| 4973 | static bfd_boolean |
| 4974 | arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type) |
| 4975 | { |
| 4976 | if (stub_type >= max_stub_type) |
| 4977 | abort (); /* Should be unreachable. */ |
| 4978 | |
| 4979 | switch (stub_type) |
| 4980 | { |
| 4981 | case arm_stub_cmse_branch_thumb_only: |
| 4982 | return TRUE; |
| 4983 | |
| 4984 | default: |
| 4985 | return FALSE; |
| 4986 | } |
| 4987 | |
| 4988 | abort (); /* Should be unreachable. */ |
| 4989 | } |
| 4990 | |
| 4991 | /* Returns the padding needed for the dedicated section used stubs of type |
| 4992 | STUB_TYPE. */ |
| 4993 | |
| 4994 | static int |
| 4995 | arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type) |
| 4996 | { |
| 4997 | if (stub_type >= max_stub_type) |
| 4998 | abort (); /* Should be unreachable. */ |
| 4999 | |
| 5000 | switch (stub_type) |
| 5001 | { |
| 5002 | case arm_stub_cmse_branch_thumb_only: |
| 5003 | return 32; |
| 5004 | |
| 5005 | default: |
| 5006 | return 0; |
| 5007 | } |
| 5008 | |
| 5009 | abort (); /* Should be unreachable. */ |
| 5010 | } |
| 5011 | |
| 5012 | /* If veneers of type STUB_TYPE should go in a dedicated output section, |
| 5013 | returns the address of the hash table field in HTAB holding the offset at |
| 5014 | which new veneers should be layed out in the stub section. */ |
| 5015 | |
| 5016 | static bfd_vma* |
| 5017 | arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab, |
| 5018 | enum elf32_arm_stub_type stub_type) |
| 5019 | { |
| 5020 | switch (stub_type) |
| 5021 | { |
| 5022 | case arm_stub_cmse_branch_thumb_only: |
| 5023 | return &htab->new_cmse_stub_offset; |
| 5024 | |
| 5025 | default: |
| 5026 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); |
| 5027 | return NULL; |
| 5028 | } |
| 5029 | } |
| 5030 | |
| 5031 | static bfd_boolean |
| 5032 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, |
| 5033 | void * in_arg) |
| 5034 | { |
| 5035 | #define MAXRELOCS 3 |
| 5036 | bfd_boolean removed_sg_veneer; |
| 5037 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 5038 | struct elf32_arm_link_hash_table *globals; |
| 5039 | struct bfd_link_info *info; |
| 5040 | asection *stub_sec; |
| 5041 | bfd *stub_bfd; |
| 5042 | bfd_byte *loc; |
| 5043 | bfd_vma sym_value; |
| 5044 | int template_size; |
| 5045 | int size; |
| 5046 | const insn_sequence *template_sequence; |
| 5047 | int i; |
| 5048 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
| 5049 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; |
| 5050 | int nrelocs = 0; |
| 5051 | int just_allocated = 0; |
| 5052 | |
| 5053 | /* Massage our args to the form they really have. */ |
| 5054 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; |
| 5055 | info = (struct bfd_link_info *) in_arg; |
| 5056 | |
| 5057 | globals = elf32_arm_hash_table (info); |
| 5058 | if (globals == NULL) |
| 5059 | return FALSE; |
| 5060 | |
| 5061 | stub_sec = stub_entry->stub_sec; |
| 5062 | |
| 5063 | if ((globals->fix_cortex_a8 < 0) |
| 5064 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
| 5065 | /* We have to do less-strictly-aligned fixes last. */ |
| 5066 | return TRUE; |
| 5067 | |
| 5068 | /* Assign a slot at the end of section if none assigned yet. */ |
| 5069 | if (stub_entry->stub_offset == (bfd_vma) -1) |
| 5070 | { |
| 5071 | stub_entry->stub_offset = stub_sec->size; |
| 5072 | just_allocated = 1; |
| 5073 | } |
| 5074 | loc = stub_sec->contents + stub_entry->stub_offset; |
| 5075 | |
| 5076 | stub_bfd = stub_sec->owner; |
| 5077 | |
| 5078 | /* This is the address of the stub destination. */ |
| 5079 | sym_value = (stub_entry->target_value |
| 5080 | + stub_entry->target_section->output_offset |
| 5081 | + stub_entry->target_section->output_section->vma); |
| 5082 | |
| 5083 | template_sequence = stub_entry->stub_template; |
| 5084 | template_size = stub_entry->stub_template_size; |
| 5085 | |
| 5086 | size = 0; |
| 5087 | for (i = 0; i < template_size; i++) |
| 5088 | { |
| 5089 | switch (template_sequence[i].type) |
| 5090 | { |
| 5091 | case THUMB16_TYPE: |
| 5092 | { |
| 5093 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
| 5094 | if (template_sequence[i].reloc_addend != 0) |
| 5095 | { |
| 5096 | /* We've borrowed the reloc_addend field to mean we should |
| 5097 | insert a condition code into this (Thumb-1 branch) |
| 5098 | instruction. See THUMB16_BCOND_INSN. */ |
| 5099 | BFD_ASSERT ((data & 0xff00) == 0xd000); |
| 5100 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; |
| 5101 | } |
| 5102 | bfd_put_16 (stub_bfd, data, loc + size); |
| 5103 | size += 2; |
| 5104 | } |
| 5105 | break; |
| 5106 | |
| 5107 | case THUMB32_TYPE: |
| 5108 | bfd_put_16 (stub_bfd, |
| 5109 | (template_sequence[i].data >> 16) & 0xffff, |
| 5110 | loc + size); |
| 5111 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, |
| 5112 | loc + size + 2); |
| 5113 | if (template_sequence[i].r_type != R_ARM_NONE) |
| 5114 | { |
| 5115 | stub_reloc_idx[nrelocs] = i; |
| 5116 | stub_reloc_offset[nrelocs++] = size; |
| 5117 | } |
| 5118 | size += 4; |
| 5119 | break; |
| 5120 | |
| 5121 | case ARM_TYPE: |
| 5122 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
| 5123 | loc + size); |
| 5124 | /* Handle cases where the target is encoded within the |
| 5125 | instruction. */ |
| 5126 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
| 5127 | { |
| 5128 | stub_reloc_idx[nrelocs] = i; |
| 5129 | stub_reloc_offset[nrelocs++] = size; |
| 5130 | } |
| 5131 | size += 4; |
| 5132 | break; |
| 5133 | |
| 5134 | case DATA_TYPE: |
| 5135 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
| 5136 | stub_reloc_idx[nrelocs] = i; |
| 5137 | stub_reloc_offset[nrelocs++] = size; |
| 5138 | size += 4; |
| 5139 | break; |
| 5140 | |
| 5141 | default: |
| 5142 | BFD_FAIL (); |
| 5143 | return FALSE; |
| 5144 | } |
| 5145 | } |
| 5146 | |
| 5147 | if (just_allocated) |
| 5148 | stub_sec->size += size; |
| 5149 | |
| 5150 | /* Stub size has already been computed in arm_size_one_stub. Check |
| 5151 | consistency. */ |
| 5152 | BFD_ASSERT (size == stub_entry->stub_size); |
| 5153 | |
| 5154 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
| 5155 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
| 5156 | sym_value |= 1; |
| 5157 | |
| 5158 | /* Assume non empty slots have at least one and at most MAXRELOCS entries |
| 5159 | to relocate in each stub. */ |
| 5160 | removed_sg_veneer = |
| 5161 | (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only); |
| 5162 | BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS)); |
| 5163 | |
| 5164 | for (i = 0; i < nrelocs; i++) |
| 5165 | { |
| 5166 | Elf_Internal_Rela rel; |
| 5167 | bfd_boolean unresolved_reloc; |
| 5168 | char *error_message; |
| 5169 | bfd_vma points_to = |
| 5170 | sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend; |
| 5171 | |
| 5172 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; |
| 5173 | rel.r_info = ELF32_R_INFO (0, |
| 5174 | template_sequence[stub_reloc_idx[i]].r_type); |
| 5175 | rel.r_addend = 0; |
| 5176 | |
| 5177 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) |
| 5178 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] |
| 5179 | template should refer back to the instruction after the original |
| 5180 | branch. We use target_section as Cortex-A8 erratum workaround stubs |
| 5181 | are only generated when both source and target are in the same |
| 5182 | section. */ |
| 5183 | points_to = stub_entry->target_section->output_section->vma |
| 5184 | + stub_entry->target_section->output_offset |
| 5185 | + stub_entry->source_value; |
| 5186 | |
| 5187 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type |
| 5188 | (template_sequence[stub_reloc_idx[i]].r_type), |
| 5189 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, |
| 5190 | points_to, info, stub_entry->target_section, "", STT_FUNC, |
| 5191 | stub_entry->branch_type, |
| 5192 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, |
| 5193 | &error_message); |
| 5194 | } |
| 5195 | |
| 5196 | return TRUE; |
| 5197 | #undef MAXRELOCS |
| 5198 | } |
| 5199 | |
| 5200 | /* Calculate the template, template size and instruction size for a stub. |
| 5201 | Return value is the instruction size. */ |
| 5202 | |
| 5203 | static unsigned int |
| 5204 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, |
| 5205 | const insn_sequence **stub_template, |
| 5206 | int *stub_template_size) |
| 5207 | { |
| 5208 | const insn_sequence *template_sequence = NULL; |
| 5209 | int template_size = 0, i; |
| 5210 | unsigned int size; |
| 5211 | |
| 5212 | template_sequence = stub_definitions[stub_type].template_sequence; |
| 5213 | if (stub_template) |
| 5214 | *stub_template = template_sequence; |
| 5215 | |
| 5216 | template_size = stub_definitions[stub_type].template_size; |
| 5217 | if (stub_template_size) |
| 5218 | *stub_template_size = template_size; |
| 5219 | |
| 5220 | size = 0; |
| 5221 | for (i = 0; i < template_size; i++) |
| 5222 | { |
| 5223 | switch (template_sequence[i].type) |
| 5224 | { |
| 5225 | case THUMB16_TYPE: |
| 5226 | size += 2; |
| 5227 | break; |
| 5228 | |
| 5229 | case ARM_TYPE: |
| 5230 | case THUMB32_TYPE: |
| 5231 | case DATA_TYPE: |
| 5232 | size += 4; |
| 5233 | break; |
| 5234 | |
| 5235 | default: |
| 5236 | BFD_FAIL (); |
| 5237 | return 0; |
| 5238 | } |
| 5239 | } |
| 5240 | |
| 5241 | return size; |
| 5242 | } |
| 5243 | |
| 5244 | /* As above, but don't actually build the stub. Just bump offset so |
| 5245 | we know stub section sizes. */ |
| 5246 | |
| 5247 | static bfd_boolean |
| 5248 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, |
| 5249 | void *in_arg ATTRIBUTE_UNUSED) |
| 5250 | { |
| 5251 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 5252 | const insn_sequence *template_sequence; |
| 5253 | int template_size, size; |
| 5254 | |
| 5255 | /* Massage our args to the form they really have. */ |
| 5256 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; |
| 5257 | |
| 5258 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) |
| 5259 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); |
| 5260 | |
| 5261 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
| 5262 | &template_size); |
| 5263 | |
| 5264 | /* Initialized to -1. Null size indicates an empty slot full of zeros. */ |
| 5265 | if (stub_entry->stub_template_size) |
| 5266 | { |
| 5267 | stub_entry->stub_size = size; |
| 5268 | stub_entry->stub_template = template_sequence; |
| 5269 | stub_entry->stub_template_size = template_size; |
| 5270 | } |
| 5271 | |
| 5272 | /* Already accounted for. */ |
| 5273 | if (stub_entry->stub_offset != (bfd_vma) -1) |
| 5274 | return TRUE; |
| 5275 | |
| 5276 | size = (size + 7) & ~7; |
| 5277 | stub_entry->stub_sec->size += size; |
| 5278 | |
| 5279 | return TRUE; |
| 5280 | } |
| 5281 | |
| 5282 | /* External entry points for sizing and building linker stubs. */ |
| 5283 | |
| 5284 | /* Set up various things so that we can make a list of input sections |
| 5285 | for each output section included in the link. Returns -1 on error, |
| 5286 | 0 when no stubs will be needed, and 1 on success. */ |
| 5287 | |
| 5288 | int |
| 5289 | elf32_arm_setup_section_lists (bfd *output_bfd, |
| 5290 | struct bfd_link_info *info) |
| 5291 | { |
| 5292 | bfd *input_bfd; |
| 5293 | unsigned int bfd_count; |
| 5294 | unsigned int top_id, top_index; |
| 5295 | asection *section; |
| 5296 | asection **input_list, **list; |
| 5297 | bfd_size_type amt; |
| 5298 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
| 5299 | |
| 5300 | if (htab == NULL) |
| 5301 | return 0; |
| 5302 | if (! is_elf_hash_table (htab)) |
| 5303 | return 0; |
| 5304 | |
| 5305 | /* Count the number of input BFDs and find the top input section id. */ |
| 5306 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; |
| 5307 | input_bfd != NULL; |
| 5308 | input_bfd = input_bfd->link.next) |
| 5309 | { |
| 5310 | bfd_count += 1; |
| 5311 | for (section = input_bfd->sections; |
| 5312 | section != NULL; |
| 5313 | section = section->next) |
| 5314 | { |
| 5315 | if (top_id < section->id) |
| 5316 | top_id = section->id; |
| 5317 | } |
| 5318 | } |
| 5319 | htab->bfd_count = bfd_count; |
| 5320 | |
| 5321 | amt = sizeof (struct map_stub) * (top_id + 1); |
| 5322 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
| 5323 | if (htab->stub_group == NULL) |
| 5324 | return -1; |
| 5325 | htab->top_id = top_id; |
| 5326 | |
| 5327 | /* We can't use output_bfd->section_count here to find the top output |
| 5328 | section index as some sections may have been removed, and |
| 5329 | _bfd_strip_section_from_output doesn't renumber the indices. */ |
| 5330 | for (section = output_bfd->sections, top_index = 0; |
| 5331 | section != NULL; |
| 5332 | section = section->next) |
| 5333 | { |
| 5334 | if (top_index < section->index) |
| 5335 | top_index = section->index; |
| 5336 | } |
| 5337 | |
| 5338 | htab->top_index = top_index; |
| 5339 | amt = sizeof (asection *) * (top_index + 1); |
| 5340 | input_list = (asection **) bfd_malloc (amt); |
| 5341 | htab->input_list = input_list; |
| 5342 | if (input_list == NULL) |
| 5343 | return -1; |
| 5344 | |
| 5345 | /* For sections we aren't interested in, mark their entries with a |
| 5346 | value we can check later. */ |
| 5347 | list = input_list + top_index; |
| 5348 | do |
| 5349 | *list = bfd_abs_section_ptr; |
| 5350 | while (list-- != input_list); |
| 5351 | |
| 5352 | for (section = output_bfd->sections; |
| 5353 | section != NULL; |
| 5354 | section = section->next) |
| 5355 | { |
| 5356 | if ((section->flags & SEC_CODE) != 0) |
| 5357 | input_list[section->index] = NULL; |
| 5358 | } |
| 5359 | |
| 5360 | return 1; |
| 5361 | } |
| 5362 | |
| 5363 | /* The linker repeatedly calls this function for each input section, |
| 5364 | in the order that input sections are linked into output sections. |
| 5365 | Build lists of input sections to determine groupings between which |
| 5366 | we may insert linker stubs. */ |
| 5367 | |
| 5368 | void |
| 5369 | elf32_arm_next_input_section (struct bfd_link_info *info, |
| 5370 | asection *isec) |
| 5371 | { |
| 5372 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
| 5373 | |
| 5374 | if (htab == NULL) |
| 5375 | return; |
| 5376 | |
| 5377 | if (isec->output_section->index <= htab->top_index) |
| 5378 | { |
| 5379 | asection **list = htab->input_list + isec->output_section->index; |
| 5380 | |
| 5381 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
| 5382 | { |
| 5383 | /* Steal the link_sec pointer for our list. */ |
| 5384 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) |
| 5385 | /* This happens to make the list in reverse order, |
| 5386 | which we reverse later. */ |
| 5387 | PREV_SEC (isec) = *list; |
| 5388 | *list = isec; |
| 5389 | } |
| 5390 | } |
| 5391 | } |
| 5392 | |
| 5393 | /* See whether we can group stub sections together. Grouping stub |
| 5394 | sections may result in fewer stubs. More importantly, we need to |
| 5395 | put all .init* and .fini* stubs at the end of the .init or |
| 5396 | .fini output sections respectively, because glibc splits the |
| 5397 | _init and _fini functions into multiple parts. Putting a stub in |
| 5398 | the middle of a function is not a good idea. */ |
| 5399 | |
| 5400 | static void |
| 5401 | group_sections (struct elf32_arm_link_hash_table *htab, |
| 5402 | bfd_size_type stub_group_size, |
| 5403 | bfd_boolean stubs_always_after_branch) |
| 5404 | { |
| 5405 | asection **list = htab->input_list; |
| 5406 | |
| 5407 | do |
| 5408 | { |
| 5409 | asection *tail = *list; |
| 5410 | asection *head; |
| 5411 | |
| 5412 | if (tail == bfd_abs_section_ptr) |
| 5413 | continue; |
| 5414 | |
| 5415 | /* Reverse the list: we must avoid placing stubs at the |
| 5416 | beginning of the section because the beginning of the text |
| 5417 | section may be required for an interrupt vector in bare metal |
| 5418 | code. */ |
| 5419 | #define NEXT_SEC PREV_SEC |
| 5420 | head = NULL; |
| 5421 | while (tail != NULL) |
| 5422 | { |
| 5423 | /* Pop from tail. */ |
| 5424 | asection *item = tail; |
| 5425 | tail = PREV_SEC (item); |
| 5426 | |
| 5427 | /* Push on head. */ |
| 5428 | NEXT_SEC (item) = head; |
| 5429 | head = item; |
| 5430 | } |
| 5431 | |
| 5432 | while (head != NULL) |
| 5433 | { |
| 5434 | asection *curr; |
| 5435 | asection *next; |
| 5436 | bfd_vma stub_group_start = head->output_offset; |
| 5437 | bfd_vma end_of_next; |
| 5438 | |
| 5439 | curr = head; |
| 5440 | while (NEXT_SEC (curr) != NULL) |
| 5441 | { |
| 5442 | next = NEXT_SEC (curr); |
| 5443 | end_of_next = next->output_offset + next->size; |
| 5444 | if (end_of_next - stub_group_start >= stub_group_size) |
| 5445 | /* End of NEXT is too far from start, so stop. */ |
| 5446 | break; |
| 5447 | /* Add NEXT to the group. */ |
| 5448 | curr = next; |
| 5449 | } |
| 5450 | |
| 5451 | /* OK, the size from the start to the start of CURR is less |
| 5452 | than stub_group_size and thus can be handled by one stub |
| 5453 | section. (Or the head section is itself larger than |
| 5454 | stub_group_size, in which case we may be toast.) |
| 5455 | We should really be keeping track of the total size of |
| 5456 | stubs added here, as stubs contribute to the final output |
| 5457 | section size. */ |
| 5458 | do |
| 5459 | { |
| 5460 | next = NEXT_SEC (head); |
| 5461 | /* Set up this stub group. */ |
| 5462 | htab->stub_group[head->id].link_sec = curr; |
| 5463 | } |
| 5464 | while (head != curr && (head = next) != NULL); |
| 5465 | |
| 5466 | /* But wait, there's more! Input sections up to stub_group_size |
| 5467 | bytes after the stub section can be handled by it too. */ |
| 5468 | if (!stubs_always_after_branch) |
| 5469 | { |
| 5470 | stub_group_start = curr->output_offset + curr->size; |
| 5471 | |
| 5472 | while (next != NULL) |
| 5473 | { |
| 5474 | end_of_next = next->output_offset + next->size; |
| 5475 | if (end_of_next - stub_group_start >= stub_group_size) |
| 5476 | /* End of NEXT is too far from stubs, so stop. */ |
| 5477 | break; |
| 5478 | /* Add NEXT to the stub group. */ |
| 5479 | head = next; |
| 5480 | next = NEXT_SEC (head); |
| 5481 | htab->stub_group[head->id].link_sec = curr; |
| 5482 | } |
| 5483 | } |
| 5484 | head = next; |
| 5485 | } |
| 5486 | } |
| 5487 | while (list++ != htab->input_list + htab->top_index); |
| 5488 | |
| 5489 | free (htab->input_list); |
| 5490 | #undef PREV_SEC |
| 5491 | #undef NEXT_SEC |
| 5492 | } |
| 5493 | |
| 5494 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
| 5495 | erratum fix. */ |
| 5496 | |
| 5497 | static int |
| 5498 | a8_reloc_compare (const void *a, const void *b) |
| 5499 | { |
| 5500 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
| 5501 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; |
| 5502 | |
| 5503 | if (ra->from < rb->from) |
| 5504 | return -1; |
| 5505 | else if (ra->from > rb->from) |
| 5506 | return 1; |
| 5507 | else |
| 5508 | return 0; |
| 5509 | } |
| 5510 | |
| 5511 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, |
| 5512 | const char *, char **); |
| 5513 | |
| 5514 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 |
| 5515 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, |
| 5516 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
| 5517 | otherwise. */ |
| 5518 | |
| 5519 | static bfd_boolean |
| 5520 | cortex_a8_erratum_scan (bfd *input_bfd, |
| 5521 | struct bfd_link_info *info, |
| 5522 | struct a8_erratum_fix **a8_fixes_p, |
| 5523 | unsigned int *num_a8_fixes_p, |
| 5524 | unsigned int *a8_fix_table_size_p, |
| 5525 | struct a8_erratum_reloc *a8_relocs, |
| 5526 | unsigned int num_a8_relocs, |
| 5527 | unsigned prev_num_a8_fixes, |
| 5528 | bfd_boolean *stub_changed_p) |
| 5529 | { |
| 5530 | asection *section; |
| 5531 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
| 5532 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; |
| 5533 | unsigned int num_a8_fixes = *num_a8_fixes_p; |
| 5534 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; |
| 5535 | |
| 5536 | if (htab == NULL) |
| 5537 | return FALSE; |
| 5538 | |
| 5539 | for (section = input_bfd->sections; |
| 5540 | section != NULL; |
| 5541 | section = section->next) |
| 5542 | { |
| 5543 | bfd_byte *contents = NULL; |
| 5544 | struct _arm_elf_section_data *sec_data; |
| 5545 | unsigned int span; |
| 5546 | bfd_vma base_vma; |
| 5547 | |
| 5548 | if (elf_section_type (section) != SHT_PROGBITS |
| 5549 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 |
| 5550 | || (section->flags & SEC_EXCLUDE) != 0 |
| 5551 | || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS) |
| 5552 | || (section->output_section == bfd_abs_section_ptr)) |
| 5553 | continue; |
| 5554 | |
| 5555 | base_vma = section->output_section->vma + section->output_offset; |
| 5556 | |
| 5557 | if (elf_section_data (section)->this_hdr.contents != NULL) |
| 5558 | contents = elf_section_data (section)->this_hdr.contents; |
| 5559 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) |
| 5560 | return TRUE; |
| 5561 | |
| 5562 | sec_data = elf32_arm_section_data (section); |
| 5563 | |
| 5564 | for (span = 0; span < sec_data->mapcount; span++) |
| 5565 | { |
| 5566 | unsigned int span_start = sec_data->map[span].vma; |
| 5567 | unsigned int span_end = (span == sec_data->mapcount - 1) |
| 5568 | ? section->size : sec_data->map[span + 1].vma; |
| 5569 | unsigned int i; |
| 5570 | char span_type = sec_data->map[span].type; |
| 5571 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; |
| 5572 | |
| 5573 | if (span_type != 't') |
| 5574 | continue; |
| 5575 | |
| 5576 | /* Span is entirely within a single 4KB region: skip scanning. */ |
| 5577 | if (((base_vma + span_start) & ~0xfff) |
| 5578 | == ((base_vma + span_end) & ~0xfff)) |
| 5579 | continue; |
| 5580 | |
| 5581 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: |
| 5582 | |
| 5583 | * The opcode is BLX.W, BL.W, B.W, Bcc.W |
| 5584 | * The branch target is in the same 4KB region as the |
| 5585 | first half of the branch. |
| 5586 | * The instruction before the branch is a 32-bit |
| 5587 | length non-branch instruction. */ |
| 5588 | for (i = span_start; i < span_end;) |
| 5589 | { |
| 5590 | unsigned int insn = bfd_getl16 (&contents[i]); |
| 5591 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; |
| 5592 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; |
| 5593 | |
| 5594 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) |
| 5595 | insn_32bit = TRUE; |
| 5596 | |
| 5597 | if (insn_32bit) |
| 5598 | { |
| 5599 | /* Load the rest of the insn (in manual-friendly order). */ |
| 5600 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); |
| 5601 | |
| 5602 | /* Encoding T4: B<c>.W. */ |
| 5603 | is_b = (insn & 0xf800d000) == 0xf0009000; |
| 5604 | /* Encoding T1: BL<c>.W. */ |
| 5605 | is_bl = (insn & 0xf800d000) == 0xf000d000; |
| 5606 | /* Encoding T2: BLX<c>.W. */ |
| 5607 | is_blx = (insn & 0xf800d000) == 0xf000c000; |
| 5608 | /* Encoding T3: B<c>.W (not permitted in IT block). */ |
| 5609 | is_bcc = (insn & 0xf800d000) == 0xf0008000 |
| 5610 | && (insn & 0x07f00000) != 0x03800000; |
| 5611 | } |
| 5612 | |
| 5613 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; |
| 5614 | |
| 5615 | if (((base_vma + i) & 0xfff) == 0xffe |
| 5616 | && insn_32bit |
| 5617 | && is_32bit_branch |
| 5618 | && last_was_32bit |
| 5619 | && ! last_was_branch) |
| 5620 | { |
| 5621 | bfd_signed_vma offset = 0; |
| 5622 | bfd_boolean force_target_arm = FALSE; |
| 5623 | bfd_boolean force_target_thumb = FALSE; |
| 5624 | bfd_vma target; |
| 5625 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
| 5626 | struct a8_erratum_reloc key, *found; |
| 5627 | bfd_boolean use_plt = FALSE; |
| 5628 | |
| 5629 | key.from = base_vma + i; |
| 5630 | found = (struct a8_erratum_reloc *) |
| 5631 | bsearch (&key, a8_relocs, num_a8_relocs, |
| 5632 | sizeof (struct a8_erratum_reloc), |
| 5633 | &a8_reloc_compare); |
| 5634 | |
| 5635 | if (found) |
| 5636 | { |
| 5637 | char *error_message = NULL; |
| 5638 | struct elf_link_hash_entry *entry; |
| 5639 | |
| 5640 | /* We don't care about the error returned from this |
| 5641 | function, only if there is glue or not. */ |
| 5642 | entry = find_thumb_glue (info, found->sym_name, |
| 5643 | &error_message); |
| 5644 | |
| 5645 | if (entry) |
| 5646 | found->non_a8_stub = TRUE; |
| 5647 | |
| 5648 | /* Keep a simpler condition, for the sake of clarity. */ |
| 5649 | if (htab->root.splt != NULL && found->hash != NULL |
| 5650 | && found->hash->root.plt.offset != (bfd_vma) -1) |
| 5651 | use_plt = TRUE; |
| 5652 | |
| 5653 | if (found->r_type == R_ARM_THM_CALL) |
| 5654 | { |
| 5655 | if (found->branch_type == ST_BRANCH_TO_ARM |
| 5656 | || use_plt) |
| 5657 | force_target_arm = TRUE; |
| 5658 | else |
| 5659 | force_target_thumb = TRUE; |
| 5660 | } |
| 5661 | } |
| 5662 | |
| 5663 | /* Check if we have an offending branch instruction. */ |
| 5664 | |
| 5665 | if (found && found->non_a8_stub) |
| 5666 | /* We've already made a stub for this instruction, e.g. |
| 5667 | it's a long branch or a Thumb->ARM stub. Assume that |
| 5668 | stub will suffice to work around the A8 erratum (see |
| 5669 | setting of always_after_branch above). */ |
| 5670 | ; |
| 5671 | else if (is_bcc) |
| 5672 | { |
| 5673 | offset = (insn & 0x7ff) << 1; |
| 5674 | offset |= (insn & 0x3f0000) >> 4; |
| 5675 | offset |= (insn & 0x2000) ? 0x40000 : 0; |
| 5676 | offset |= (insn & 0x800) ? 0x80000 : 0; |
| 5677 | offset |= (insn & 0x4000000) ? 0x100000 : 0; |
| 5678 | if (offset & 0x100000) |
| 5679 | offset |= ~ ((bfd_signed_vma) 0xfffff); |
| 5680 | stub_type = arm_stub_a8_veneer_b_cond; |
| 5681 | } |
| 5682 | else if (is_b || is_bl || is_blx) |
| 5683 | { |
| 5684 | int s = (insn & 0x4000000) != 0; |
| 5685 | int j1 = (insn & 0x2000) != 0; |
| 5686 | int j2 = (insn & 0x800) != 0; |
| 5687 | int i1 = !(j1 ^ s); |
| 5688 | int i2 = !(j2 ^ s); |
| 5689 | |
| 5690 | offset = (insn & 0x7ff) << 1; |
| 5691 | offset |= (insn & 0x3ff0000) >> 4; |
| 5692 | offset |= i2 << 22; |
| 5693 | offset |= i1 << 23; |
| 5694 | offset |= s << 24; |
| 5695 | if (offset & 0x1000000) |
| 5696 | offset |= ~ ((bfd_signed_vma) 0xffffff); |
| 5697 | |
| 5698 | if (is_blx) |
| 5699 | offset &= ~ ((bfd_signed_vma) 3); |
| 5700 | |
| 5701 | stub_type = is_blx ? arm_stub_a8_veneer_blx : |
| 5702 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; |
| 5703 | } |
| 5704 | |
| 5705 | if (stub_type != arm_stub_none) |
| 5706 | { |
| 5707 | bfd_vma pc_for_insn = base_vma + i + 4; |
| 5708 | |
| 5709 | /* The original instruction is a BL, but the target is |
| 5710 | an ARM instruction. If we were not making a stub, |
| 5711 | the BL would have been converted to a BLX. Use the |
| 5712 | BLX stub instead in that case. */ |
| 5713 | if (htab->use_blx && force_target_arm |
| 5714 | && stub_type == arm_stub_a8_veneer_bl) |
| 5715 | { |
| 5716 | stub_type = arm_stub_a8_veneer_blx; |
| 5717 | is_blx = TRUE; |
| 5718 | is_bl = FALSE; |
| 5719 | } |
| 5720 | /* Conversely, if the original instruction was |
| 5721 | BLX but the target is Thumb mode, use the BL |
| 5722 | stub. */ |
| 5723 | else if (force_target_thumb |
| 5724 | && stub_type == arm_stub_a8_veneer_blx) |
| 5725 | { |
| 5726 | stub_type = arm_stub_a8_veneer_bl; |
| 5727 | is_blx = FALSE; |
| 5728 | is_bl = TRUE; |
| 5729 | } |
| 5730 | |
| 5731 | if (is_blx) |
| 5732 | pc_for_insn &= ~ ((bfd_vma) 3); |
| 5733 | |
| 5734 | /* If we found a relocation, use the proper destination, |
| 5735 | not the offset in the (unrelocated) instruction. |
| 5736 | Note this is always done if we switched the stub type |
| 5737 | above. */ |
| 5738 | if (found) |
| 5739 | offset = |
| 5740 | (bfd_signed_vma) (found->destination - pc_for_insn); |
| 5741 | |
| 5742 | /* If the stub will use a Thumb-mode branch to a |
| 5743 | PLT target, redirect it to the preceding Thumb |
| 5744 | entry point. */ |
| 5745 | if (stub_type != arm_stub_a8_veneer_blx && use_plt) |
| 5746 | offset -= PLT_THUMB_STUB_SIZE; |
| 5747 | |
| 5748 | target = pc_for_insn + offset; |
| 5749 | |
| 5750 | /* The BLX stub is ARM-mode code. Adjust the offset to |
| 5751 | take the different PC value (+8 instead of +4) into |
| 5752 | account. */ |
| 5753 | if (stub_type == arm_stub_a8_veneer_blx) |
| 5754 | offset += 4; |
| 5755 | |
| 5756 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) |
| 5757 | { |
| 5758 | char *stub_name = NULL; |
| 5759 | |
| 5760 | if (num_a8_fixes == a8_fix_table_size) |
| 5761 | { |
| 5762 | a8_fix_table_size *= 2; |
| 5763 | a8_fixes = (struct a8_erratum_fix *) |
| 5764 | bfd_realloc (a8_fixes, |
| 5765 | sizeof (struct a8_erratum_fix) |
| 5766 | * a8_fix_table_size); |
| 5767 | } |
| 5768 | |
| 5769 | if (num_a8_fixes < prev_num_a8_fixes) |
| 5770 | { |
| 5771 | /* If we're doing a subsequent scan, |
| 5772 | check if we've found the same fix as |
| 5773 | before, and try and reuse the stub |
| 5774 | name. */ |
| 5775 | stub_name = a8_fixes[num_a8_fixes].stub_name; |
| 5776 | if ((a8_fixes[num_a8_fixes].section != section) |
| 5777 | || (a8_fixes[num_a8_fixes].offset != i)) |
| 5778 | { |
| 5779 | free (stub_name); |
| 5780 | stub_name = NULL; |
| 5781 | *stub_changed_p = TRUE; |
| 5782 | } |
| 5783 | } |
| 5784 | |
| 5785 | if (!stub_name) |
| 5786 | { |
| 5787 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
| 5788 | if (stub_name != NULL) |
| 5789 | sprintf (stub_name, "%x:%x", section->id, i); |
| 5790 | } |
| 5791 | |
| 5792 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; |
| 5793 | a8_fixes[num_a8_fixes].section = section; |
| 5794 | a8_fixes[num_a8_fixes].offset = i; |
| 5795 | a8_fixes[num_a8_fixes].target_offset = |
| 5796 | target - base_vma; |
| 5797 | a8_fixes[num_a8_fixes].orig_insn = insn; |
| 5798 | a8_fixes[num_a8_fixes].stub_name = stub_name; |
| 5799 | a8_fixes[num_a8_fixes].stub_type = stub_type; |
| 5800 | a8_fixes[num_a8_fixes].branch_type = |
| 5801 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; |
| 5802 | |
| 5803 | num_a8_fixes++; |
| 5804 | } |
| 5805 | } |
| 5806 | } |
| 5807 | |
| 5808 | i += insn_32bit ? 4 : 2; |
| 5809 | last_was_32bit = insn_32bit; |
| 5810 | last_was_branch = is_32bit_branch; |
| 5811 | } |
| 5812 | } |
| 5813 | |
| 5814 | if (elf_section_data (section)->this_hdr.contents == NULL) |
| 5815 | free (contents); |
| 5816 | } |
| 5817 | |
| 5818 | *a8_fixes_p = a8_fixes; |
| 5819 | *num_a8_fixes_p = num_a8_fixes; |
| 5820 | *a8_fix_table_size_p = a8_fix_table_size; |
| 5821 | |
| 5822 | return FALSE; |
| 5823 | } |
| 5824 | |
| 5825 | /* Create or update a stub entry depending on whether the stub can already be |
| 5826 | found in HTAB. The stub is identified by: |
| 5827 | - its type STUB_TYPE |
| 5828 | - its source branch (note that several can share the same stub) whose |
| 5829 | section and relocation (if any) are given by SECTION and IRELA |
| 5830 | respectively |
| 5831 | - its target symbol whose input section, hash, name, value and branch type |
| 5832 | are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE |
| 5833 | respectively |
| 5834 | |
| 5835 | If found, the value of the stub's target symbol is updated from SYM_VALUE |
| 5836 | and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to |
| 5837 | TRUE and the stub entry is initialized. |
| 5838 | |
| 5839 | Returns the stub that was created or updated, or NULL if an error |
| 5840 | occurred. */ |
| 5841 | |
| 5842 | static struct elf32_arm_stub_hash_entry * |
| 5843 | elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab, |
| 5844 | enum elf32_arm_stub_type stub_type, asection *section, |
| 5845 | Elf_Internal_Rela *irela, asection *sym_sec, |
| 5846 | struct elf32_arm_link_hash_entry *hash, char *sym_name, |
| 5847 | bfd_vma sym_value, enum arm_st_branch_type branch_type, |
| 5848 | bfd_boolean *new_stub) |
| 5849 | { |
| 5850 | const asection *id_sec; |
| 5851 | char *stub_name; |
| 5852 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 5853 | unsigned int r_type; |
| 5854 | bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type); |
| 5855 | |
| 5856 | BFD_ASSERT (stub_type != arm_stub_none); |
| 5857 | *new_stub = FALSE; |
| 5858 | |
| 5859 | if (sym_claimed) |
| 5860 | stub_name = sym_name; |
| 5861 | else |
| 5862 | { |
| 5863 | BFD_ASSERT (irela); |
| 5864 | BFD_ASSERT (section); |
| 5865 | BFD_ASSERT (section->id <= htab->top_id); |
| 5866 | |
| 5867 | /* Support for grouping stub sections. */ |
| 5868 | id_sec = htab->stub_group[section->id].link_sec; |
| 5869 | |
| 5870 | /* Get the name of this stub. */ |
| 5871 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, |
| 5872 | stub_type); |
| 5873 | if (!stub_name) |
| 5874 | return NULL; |
| 5875 | } |
| 5876 | |
| 5877 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE, |
| 5878 | FALSE); |
| 5879 | /* The proper stub has already been created, just update its value. */ |
| 5880 | if (stub_entry != NULL) |
| 5881 | { |
| 5882 | if (!sym_claimed) |
| 5883 | free (stub_name); |
| 5884 | stub_entry->target_value = sym_value; |
| 5885 | return stub_entry; |
| 5886 | } |
| 5887 | |
| 5888 | stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type); |
| 5889 | if (stub_entry == NULL) |
| 5890 | { |
| 5891 | if (!sym_claimed) |
| 5892 | free (stub_name); |
| 5893 | return NULL; |
| 5894 | } |
| 5895 | |
| 5896 | stub_entry->target_value = sym_value; |
| 5897 | stub_entry->target_section = sym_sec; |
| 5898 | stub_entry->stub_type = stub_type; |
| 5899 | stub_entry->h = hash; |
| 5900 | stub_entry->branch_type = branch_type; |
| 5901 | |
| 5902 | if (sym_claimed) |
| 5903 | stub_entry->output_name = sym_name; |
| 5904 | else |
| 5905 | { |
| 5906 | if (sym_name == NULL) |
| 5907 | sym_name = "unnamed"; |
| 5908 | stub_entry->output_name = (char *) |
| 5909 | bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME) |
| 5910 | + strlen (sym_name)); |
| 5911 | if (stub_entry->output_name == NULL) |
| 5912 | { |
| 5913 | free (stub_name); |
| 5914 | return NULL; |
| 5915 | } |
| 5916 | |
| 5917 | /* For historical reasons, use the existing names for ARM-to-Thumb and |
| 5918 | Thumb-to-ARM stubs. */ |
| 5919 | r_type = ELF32_R_TYPE (irela->r_info); |
| 5920 | if ((r_type == (unsigned int) R_ARM_THM_CALL |
| 5921 | || r_type == (unsigned int) R_ARM_THM_JUMP24 |
| 5922 | || r_type == (unsigned int) R_ARM_THM_JUMP19) |
| 5923 | && branch_type == ST_BRANCH_TO_ARM) |
| 5924 | sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name); |
| 5925 | else if ((r_type == (unsigned int) R_ARM_CALL |
| 5926 | || r_type == (unsigned int) R_ARM_JUMP24) |
| 5927 | && branch_type == ST_BRANCH_TO_THUMB) |
| 5928 | sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name); |
| 5929 | else |
| 5930 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name); |
| 5931 | } |
| 5932 | |
| 5933 | *new_stub = TRUE; |
| 5934 | return stub_entry; |
| 5935 | } |
| 5936 | |
| 5937 | /* Scan symbols in INPUT_BFD to identify secure entry functions needing a |
| 5938 | gateway veneer to transition from non secure to secure state and create them |
| 5939 | accordingly. |
| 5940 | |
| 5941 | "ARMv8-M Security Extensions: Requirements on Development Tools" document |
| 5942 | defines the conditions that govern Secure Gateway veneer creation for a |
| 5943 | given symbol <SYM> as follows: |
| 5944 | - it has function type |
| 5945 | - it has non local binding |
| 5946 | - a symbol named __acle_se_<SYM> (called special symbol) exists with the |
| 5947 | same type, binding and value as <SYM> (called normal symbol). |
| 5948 | An entry function can handle secure state transition itself in which case |
| 5949 | its special symbol would have a different value from the normal symbol. |
| 5950 | |
| 5951 | OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash |
| 5952 | entry mapping while HTAB gives the name to hash entry mapping. |
| 5953 | *CMSE_STUB_CREATED is increased by the number of secure gateway veneer |
| 5954 | created. |
| 5955 | |
| 5956 | The return value gives whether a stub failed to be allocated. */ |
| 5957 | |
| 5958 | static bfd_boolean |
| 5959 | cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab, |
| 5960 | obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes, |
| 5961 | int *cmse_stub_created) |
| 5962 | { |
| 5963 | const struct elf_backend_data *bed; |
| 5964 | Elf_Internal_Shdr *symtab_hdr; |
| 5965 | unsigned i, j, sym_count, ext_start; |
| 5966 | Elf_Internal_Sym *cmse_sym, *local_syms; |
| 5967 | struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL; |
| 5968 | enum arm_st_branch_type branch_type; |
| 5969 | char *sym_name, *lsym_name; |
| 5970 | bfd_vma sym_value; |
| 5971 | asection *section; |
| 5972 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 5973 | bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE; |
| 5974 | |
| 5975 | bed = get_elf_backend_data (input_bfd); |
| 5976 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
| 5977 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; |
| 5978 | ext_start = symtab_hdr->sh_info; |
| 5979 | is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE |
| 5980 | && out_attr[Tag_CPU_arch_profile].i == 'M'); |
| 5981 | |
| 5982 | local_syms = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 5983 | if (local_syms == NULL) |
| 5984 | local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, |
| 5985 | symtab_hdr->sh_info, 0, NULL, NULL, |
| 5986 | NULL); |
| 5987 | if (symtab_hdr->sh_info && local_syms == NULL) |
| 5988 | return FALSE; |
| 5989 | |
| 5990 | /* Scan symbols. */ |
| 5991 | for (i = 0; i < sym_count; i++) |
| 5992 | { |
| 5993 | cmse_invalid = FALSE; |
| 5994 | |
| 5995 | if (i < ext_start) |
| 5996 | { |
| 5997 | cmse_sym = &local_syms[i]; |
| 5998 | /* Not a special symbol. */ |
| 5999 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal)) |
| 6000 | continue; |
| 6001 | sym_name = bfd_elf_string_from_elf_section (input_bfd, |
| 6002 | symtab_hdr->sh_link, |
| 6003 | cmse_sym->st_name); |
| 6004 | /* Special symbol with local binding. */ |
| 6005 | cmse_invalid = TRUE; |
| 6006 | } |
| 6007 | else |
| 6008 | { |
| 6009 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); |
| 6010 | sym_name = (char *) cmse_hash->root.root.root.string; |
| 6011 | |
| 6012 | /* Not a special symbol. */ |
| 6013 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) |
| 6014 | continue; |
| 6015 | |
| 6016 | /* Special symbol has incorrect binding or type. */ |
| 6017 | if ((cmse_hash->root.root.type != bfd_link_hash_defined |
| 6018 | && cmse_hash->root.root.type != bfd_link_hash_defweak) |
| 6019 | || cmse_hash->root.type != STT_FUNC) |
| 6020 | cmse_invalid = TRUE; |
| 6021 | } |
| 6022 | |
| 6023 | if (!is_v8m) |
| 6024 | { |
| 6025 | _bfd_error_handler (_("%pB: special symbol `%s' only allowed for " |
| 6026 | "ARMv8-M architecture or later"), |
| 6027 | input_bfd, sym_name); |
| 6028 | is_v8m = TRUE; /* Avoid multiple warning. */ |
| 6029 | ret = FALSE; |
| 6030 | } |
| 6031 | |
| 6032 | if (cmse_invalid) |
| 6033 | { |
| 6034 | _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be" |
| 6035 | " a global or weak function symbol"), |
| 6036 | input_bfd, sym_name); |
| 6037 | ret = FALSE; |
| 6038 | if (i < ext_start) |
| 6039 | continue; |
| 6040 | } |
| 6041 | |
| 6042 | sym_name += strlen (CMSE_PREFIX); |
| 6043 | hash = (struct elf32_arm_link_hash_entry *) |
| 6044 | elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE); |
| 6045 | |
| 6046 | /* No associated normal symbol or it is neither global nor weak. */ |
| 6047 | if (!hash |
| 6048 | || (hash->root.root.type != bfd_link_hash_defined |
| 6049 | && hash->root.root.type != bfd_link_hash_defweak) |
| 6050 | || hash->root.type != STT_FUNC) |
| 6051 | { |
| 6052 | /* Initialize here to avoid warning about use of possibly |
| 6053 | uninitialized variable. */ |
| 6054 | j = 0; |
| 6055 | |
| 6056 | if (!hash) |
| 6057 | { |
| 6058 | /* Searching for a normal symbol with local binding. */ |
| 6059 | for (; j < ext_start; j++) |
| 6060 | { |
| 6061 | lsym_name = |
| 6062 | bfd_elf_string_from_elf_section (input_bfd, |
| 6063 | symtab_hdr->sh_link, |
| 6064 | local_syms[j].st_name); |
| 6065 | if (!strcmp (sym_name, lsym_name)) |
| 6066 | break; |
| 6067 | } |
| 6068 | } |
| 6069 | |
| 6070 | if (hash || j < ext_start) |
| 6071 | { |
| 6072 | _bfd_error_handler |
| 6073 | (_("%pB: invalid standard symbol `%s'; it must be " |
| 6074 | "a global or weak function symbol"), |
| 6075 | input_bfd, sym_name); |
| 6076 | } |
| 6077 | else |
| 6078 | _bfd_error_handler |
| 6079 | (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name); |
| 6080 | ret = FALSE; |
| 6081 | if (!hash) |
| 6082 | continue; |
| 6083 | } |
| 6084 | |
| 6085 | sym_value = hash->root.root.u.def.value; |
| 6086 | section = hash->root.root.u.def.section; |
| 6087 | |
| 6088 | if (cmse_hash->root.root.u.def.section != section) |
| 6089 | { |
| 6090 | _bfd_error_handler |
| 6091 | (_("%pB: `%s' and its special symbol are in different sections"), |
| 6092 | input_bfd, sym_name); |
| 6093 | ret = FALSE; |
| 6094 | } |
| 6095 | if (cmse_hash->root.root.u.def.value != sym_value) |
| 6096 | continue; /* Ignore: could be an entry function starting with SG. */ |
| 6097 | |
| 6098 | /* If this section is a link-once section that will be discarded, then |
| 6099 | don't create any stubs. */ |
| 6100 | if (section->output_section == NULL) |
| 6101 | { |
| 6102 | _bfd_error_handler |
| 6103 | (_("%pB: entry function `%s' not output"), input_bfd, sym_name); |
| 6104 | continue; |
| 6105 | } |
| 6106 | |
| 6107 | if (hash->root.size == 0) |
| 6108 | { |
| 6109 | _bfd_error_handler |
| 6110 | (_("%pB: entry function `%s' is empty"), input_bfd, sym_name); |
| 6111 | ret = FALSE; |
| 6112 | } |
| 6113 | |
| 6114 | if (!ret) |
| 6115 | continue; |
| 6116 | branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); |
| 6117 | stub_entry |
| 6118 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, |
| 6119 | NULL, NULL, section, hash, sym_name, |
| 6120 | sym_value, branch_type, &new_stub); |
| 6121 | |
| 6122 | if (stub_entry == NULL) |
| 6123 | ret = FALSE; |
| 6124 | else |
| 6125 | { |
| 6126 | BFD_ASSERT (new_stub); |
| 6127 | (*cmse_stub_created)++; |
| 6128 | } |
| 6129 | } |
| 6130 | |
| 6131 | if (!symtab_hdr->contents) |
| 6132 | free (local_syms); |
| 6133 | return ret; |
| 6134 | } |
| 6135 | |
| 6136 | /* Return TRUE iff a symbol identified by its linker HASH entry is a secure |
| 6137 | code entry function, ie can be called from non secure code without using a |
| 6138 | veneer. */ |
| 6139 | |
| 6140 | static bfd_boolean |
| 6141 | cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash) |
| 6142 | { |
| 6143 | bfd_byte contents[4]; |
| 6144 | uint32_t first_insn; |
| 6145 | asection *section; |
| 6146 | file_ptr offset; |
| 6147 | bfd *abfd; |
| 6148 | |
| 6149 | /* Defined symbol of function type. */ |
| 6150 | if (hash->root.root.type != bfd_link_hash_defined |
| 6151 | && hash->root.root.type != bfd_link_hash_defweak) |
| 6152 | return FALSE; |
| 6153 | if (hash->root.type != STT_FUNC) |
| 6154 | return FALSE; |
| 6155 | |
| 6156 | /* Read first instruction. */ |
| 6157 | section = hash->root.root.u.def.section; |
| 6158 | abfd = section->owner; |
| 6159 | offset = hash->root.root.u.def.value - section->vma; |
| 6160 | if (!bfd_get_section_contents (abfd, section, contents, offset, |
| 6161 | sizeof (contents))) |
| 6162 | return FALSE; |
| 6163 | |
| 6164 | first_insn = bfd_get_32 (abfd, contents); |
| 6165 | |
| 6166 | /* Starts by SG instruction. */ |
| 6167 | return first_insn == 0xe97fe97f; |
| 6168 | } |
| 6169 | |
| 6170 | /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new |
| 6171 | secure gateway veneers (ie. the veneers was not in the input import library) |
| 6172 | and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */ |
| 6173 | |
| 6174 | static bfd_boolean |
| 6175 | arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info) |
| 6176 | { |
| 6177 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 6178 | struct bfd_link_info *info; |
| 6179 | |
| 6180 | /* Massage our args to the form they really have. */ |
| 6181 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; |
| 6182 | info = (struct bfd_link_info *) gen_info; |
| 6183 | |
| 6184 | if (info->out_implib_bfd) |
| 6185 | return TRUE; |
| 6186 | |
| 6187 | if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only) |
| 6188 | return TRUE; |
| 6189 | |
| 6190 | if (stub_entry->stub_offset == (bfd_vma) -1) |
| 6191 | _bfd_error_handler (" %s", stub_entry->output_name); |
| 6192 | |
| 6193 | return TRUE; |
| 6194 | } |
| 6195 | |
| 6196 | /* Set offset of each secure gateway veneers so that its address remain |
| 6197 | identical to the one in the input import library referred by |
| 6198 | HTAB->in_implib_bfd. A warning is issued for veneers that disappeared |
| 6199 | (present in input import library but absent from the executable being |
| 6200 | linked) or if new veneers appeared and there is no output import library |
| 6201 | (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the |
| 6202 | number of secure gateway veneers found in the input import library. |
| 6203 | |
| 6204 | The function returns whether an error occurred. If no error occurred, |
| 6205 | *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan |
| 6206 | and this function and HTAB->new_cmse_stub_offset is set to the biggest |
| 6207 | veneer observed set for new veneers to be layed out after. */ |
| 6208 | |
| 6209 | static bfd_boolean |
| 6210 | set_cmse_veneer_addr_from_implib (struct bfd_link_info *info, |
| 6211 | struct elf32_arm_link_hash_table *htab, |
| 6212 | int *cmse_stub_created) |
| 6213 | { |
| 6214 | long symsize; |
| 6215 | char *sym_name; |
| 6216 | flagword flags; |
| 6217 | long i, symcount; |
| 6218 | bfd *in_implib_bfd; |
| 6219 | asection *stub_out_sec; |
| 6220 | bfd_boolean ret = TRUE; |
| 6221 | Elf_Internal_Sym *intsym; |
| 6222 | const char *out_sec_name; |
| 6223 | bfd_size_type cmse_stub_size; |
| 6224 | asymbol **sympp = NULL, *sym; |
| 6225 | struct elf32_arm_link_hash_entry *hash; |
| 6226 | const insn_sequence *cmse_stub_template; |
| 6227 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 6228 | int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created; |
| 6229 | bfd_vma veneer_value, stub_offset, next_cmse_stub_offset; |
| 6230 | bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0; |
| 6231 | |
| 6232 | /* No input secure gateway import library. */ |
| 6233 | if (!htab->in_implib_bfd) |
| 6234 | return TRUE; |
| 6235 | |
| 6236 | in_implib_bfd = htab->in_implib_bfd; |
| 6237 | if (!htab->cmse_implib) |
| 6238 | { |
| 6239 | _bfd_error_handler (_("%pB: --in-implib only supported for Secure " |
| 6240 | "Gateway import libraries"), in_implib_bfd); |
| 6241 | return FALSE; |
| 6242 | } |
| 6243 | |
| 6244 | /* Get symbol table size. */ |
| 6245 | symsize = bfd_get_symtab_upper_bound (in_implib_bfd); |
| 6246 | if (symsize < 0) |
| 6247 | return FALSE; |
| 6248 | |
| 6249 | /* Read in the input secure gateway import library's symbol table. */ |
| 6250 | sympp = (asymbol **) xmalloc (symsize); |
| 6251 | symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp); |
| 6252 | if (symcount < 0) |
| 6253 | { |
| 6254 | ret = FALSE; |
| 6255 | goto free_sym_buf; |
| 6256 | } |
| 6257 | |
| 6258 | htab->new_cmse_stub_offset = 0; |
| 6259 | cmse_stub_size = |
| 6260 | find_stub_size_and_template (arm_stub_cmse_branch_thumb_only, |
| 6261 | &cmse_stub_template, |
| 6262 | &cmse_stub_template_size); |
| 6263 | out_sec_name = |
| 6264 | arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only); |
| 6265 | stub_out_sec = |
| 6266 | bfd_get_section_by_name (htab->obfd, out_sec_name); |
| 6267 | if (stub_out_sec != NULL) |
| 6268 | cmse_stub_sec_vma = stub_out_sec->vma; |
| 6269 | |
| 6270 | /* Set addresses of veneers mentionned in input secure gateway import |
| 6271 | library's symbol table. */ |
| 6272 | for (i = 0; i < symcount; i++) |
| 6273 | { |
| 6274 | sym = sympp[i]; |
| 6275 | flags = sym->flags; |
| 6276 | sym_name = (char *) bfd_asymbol_name (sym); |
| 6277 | intsym = &((elf_symbol_type *) sym)->internal_elf_sym; |
| 6278 | |
| 6279 | if (sym->section != bfd_abs_section_ptr |
| 6280 | || !(flags & (BSF_GLOBAL | BSF_WEAK)) |
| 6281 | || (flags & BSF_FUNCTION) != BSF_FUNCTION |
| 6282 | || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal) |
| 6283 | != ST_BRANCH_TO_THUMB)) |
| 6284 | { |
| 6285 | _bfd_error_handler (_("%pB: invalid import library entry: `%s'; " |
| 6286 | "symbol should be absolute, global and " |
| 6287 | "refer to Thumb functions"), |
| 6288 | in_implib_bfd, sym_name); |
| 6289 | ret = FALSE; |
| 6290 | continue; |
| 6291 | } |
| 6292 | |
| 6293 | veneer_value = bfd_asymbol_value (sym); |
| 6294 | stub_offset = veneer_value - cmse_stub_sec_vma; |
| 6295 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name, |
| 6296 | FALSE, FALSE); |
| 6297 | hash = (struct elf32_arm_link_hash_entry *) |
| 6298 | elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE); |
| 6299 | |
| 6300 | /* Stub entry should have been created by cmse_scan or the symbol be of |
| 6301 | a secure function callable from non secure code. */ |
| 6302 | if (!stub_entry && !hash) |
| 6303 | { |
| 6304 | bfd_boolean new_stub; |
| 6305 | |
| 6306 | _bfd_error_handler |
| 6307 | (_("entry function `%s' disappeared from secure code"), sym_name); |
| 6308 | hash = (struct elf32_arm_link_hash_entry *) |
| 6309 | elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE); |
| 6310 | stub_entry |
| 6311 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, |
| 6312 | NULL, NULL, bfd_abs_section_ptr, hash, |
| 6313 | sym_name, veneer_value, |
| 6314 | ST_BRANCH_TO_THUMB, &new_stub); |
| 6315 | if (stub_entry == NULL) |
| 6316 | ret = FALSE; |
| 6317 | else |
| 6318 | { |
| 6319 | BFD_ASSERT (new_stub); |
| 6320 | new_cmse_stubs_created++; |
| 6321 | (*cmse_stub_created)++; |
| 6322 | } |
| 6323 | stub_entry->stub_template_size = stub_entry->stub_size = 0; |
| 6324 | stub_entry->stub_offset = stub_offset; |
| 6325 | } |
| 6326 | /* Symbol found is not callable from non secure code. */ |
| 6327 | else if (!stub_entry) |
| 6328 | { |
| 6329 | if (!cmse_entry_fct_p (hash)) |
| 6330 | { |
| 6331 | _bfd_error_handler (_("`%s' refers to a non entry function"), |
| 6332 | sym_name); |
| 6333 | ret = FALSE; |
| 6334 | } |
| 6335 | continue; |
| 6336 | } |
| 6337 | else |
| 6338 | { |
| 6339 | /* Only stubs for SG veneers should have been created. */ |
| 6340 | BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only); |
| 6341 | |
| 6342 | /* Check visibility hasn't changed. */ |
| 6343 | if (!!(flags & BSF_GLOBAL) |
| 6344 | != (hash->root.root.type == bfd_link_hash_defined)) |
| 6345 | _bfd_error_handler |
| 6346 | (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd, |
| 6347 | sym_name); |
| 6348 | |
| 6349 | stub_entry->stub_offset = stub_offset; |
| 6350 | } |
| 6351 | |
| 6352 | /* Size should match that of a SG veneer. */ |
| 6353 | if (intsym->st_size != cmse_stub_size) |
| 6354 | { |
| 6355 | _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"), |
| 6356 | in_implib_bfd, sym_name); |
| 6357 | ret = FALSE; |
| 6358 | } |
| 6359 | |
| 6360 | /* Previous veneer address is before current SG veneer section. */ |
| 6361 | if (veneer_value < cmse_stub_sec_vma) |
| 6362 | { |
| 6363 | /* Avoid offset underflow. */ |
| 6364 | if (stub_entry) |
| 6365 | stub_entry->stub_offset = 0; |
| 6366 | stub_offset = 0; |
| 6367 | ret = FALSE; |
| 6368 | } |
| 6369 | |
| 6370 | /* Complain if stub offset not a multiple of stub size. */ |
| 6371 | if (stub_offset % cmse_stub_size) |
| 6372 | { |
| 6373 | _bfd_error_handler |
| 6374 | (_("offset of veneer for entry function `%s' not a multiple of " |
| 6375 | "its size"), sym_name); |
| 6376 | ret = FALSE; |
| 6377 | } |
| 6378 | |
| 6379 | if (!ret) |
| 6380 | continue; |
| 6381 | |
| 6382 | new_cmse_stubs_created--; |
| 6383 | if (veneer_value < cmse_stub_array_start) |
| 6384 | cmse_stub_array_start = veneer_value; |
| 6385 | next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7); |
| 6386 | if (next_cmse_stub_offset > htab->new_cmse_stub_offset) |
| 6387 | htab->new_cmse_stub_offset = next_cmse_stub_offset; |
| 6388 | } |
| 6389 | |
| 6390 | if (!info->out_implib_bfd && new_cmse_stubs_created != 0) |
| 6391 | { |
| 6392 | BFD_ASSERT (new_cmse_stubs_created > 0); |
| 6393 | _bfd_error_handler |
| 6394 | (_("new entry function(s) introduced but no output import library " |
| 6395 | "specified:")); |
| 6396 | bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info); |
| 6397 | } |
| 6398 | |
| 6399 | if (cmse_stub_array_start != cmse_stub_sec_vma) |
| 6400 | { |
| 6401 | _bfd_error_handler |
| 6402 | (_("start address of `%s' is different from previous link"), |
| 6403 | out_sec_name); |
| 6404 | ret = FALSE; |
| 6405 | } |
| 6406 | |
| 6407 | free_sym_buf: |
| 6408 | free (sympp); |
| 6409 | return ret; |
| 6410 | } |
| 6411 | |
| 6412 | /* Determine and set the size of the stub section for a final link. |
| 6413 | |
| 6414 | The basic idea here is to examine all the relocations looking for |
| 6415 | PC-relative calls to a target that is unreachable with a "bl" |
| 6416 | instruction. */ |
| 6417 | |
| 6418 | bfd_boolean |
| 6419 | elf32_arm_size_stubs (bfd *output_bfd, |
| 6420 | bfd *stub_bfd, |
| 6421 | struct bfd_link_info *info, |
| 6422 | bfd_signed_vma group_size, |
| 6423 | asection * (*add_stub_section) (const char *, asection *, |
| 6424 | asection *, |
| 6425 | unsigned int), |
| 6426 | void (*layout_sections_again) (void)) |
| 6427 | { |
| 6428 | bfd_boolean ret = TRUE; |
| 6429 | obj_attribute *out_attr; |
| 6430 | int cmse_stub_created = 0; |
| 6431 | bfd_size_type stub_group_size; |
| 6432 | bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE; |
| 6433 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
| 6434 | struct a8_erratum_fix *a8_fixes = NULL; |
| 6435 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
| 6436 | struct a8_erratum_reloc *a8_relocs = NULL; |
| 6437 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; |
| 6438 | |
| 6439 | if (htab == NULL) |
| 6440 | return FALSE; |
| 6441 | |
| 6442 | if (htab->fix_cortex_a8) |
| 6443 | { |
| 6444 | a8_fixes = (struct a8_erratum_fix *) |
| 6445 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); |
| 6446 | a8_relocs = (struct a8_erratum_reloc *) |
| 6447 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); |
| 6448 | } |
| 6449 | |
| 6450 | /* Propagate mach to stub bfd, because it may not have been |
| 6451 | finalized when we created stub_bfd. */ |
| 6452 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), |
| 6453 | bfd_get_mach (output_bfd)); |
| 6454 | |
| 6455 | /* Stash our params away. */ |
| 6456 | htab->stub_bfd = stub_bfd; |
| 6457 | htab->add_stub_section = add_stub_section; |
| 6458 | htab->layout_sections_again = layout_sections_again; |
| 6459 | stubs_always_after_branch = group_size < 0; |
| 6460 | |
| 6461 | out_attr = elf_known_obj_attributes_proc (output_bfd); |
| 6462 | m_profile = out_attr[Tag_CPU_arch_profile].i == 'M'; |
| 6463 | |
| 6464 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page |
| 6465 | as the first half of a 32-bit branch straddling two 4K pages. This is a |
| 6466 | crude way of enforcing that. */ |
| 6467 | if (htab->fix_cortex_a8) |
| 6468 | stubs_always_after_branch = 1; |
| 6469 | |
| 6470 | if (group_size < 0) |
| 6471 | stub_group_size = -group_size; |
| 6472 | else |
| 6473 | stub_group_size = group_size; |
| 6474 | |
| 6475 | if (stub_group_size == 1) |
| 6476 | { |
| 6477 | /* Default values. */ |
| 6478 | /* Thumb branch range is +-4MB has to be used as the default |
| 6479 | maximum size (a given section can contain both ARM and Thumb |
| 6480 | code, so the worst case has to be taken into account). |
| 6481 | |
| 6482 | This value is 24K less than that, which allows for 2025 |
| 6483 | 12-byte stubs. If we exceed that, then we will fail to link. |
| 6484 | The user will have to relink with an explicit group size |
| 6485 | option. */ |
| 6486 | stub_group_size = 4170000; |
| 6487 | } |
| 6488 | |
| 6489 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
| 6490 | |
| 6491 | /* If we're applying the cortex A8 fix, we need to determine the |
| 6492 | program header size now, because we cannot change it later -- |
| 6493 | that could alter section placements. Notice the A8 erratum fix |
| 6494 | ends up requiring the section addresses to remain unchanged |
| 6495 | modulo the page size. That's something we cannot represent |
| 6496 | inside BFD, and we don't want to force the section alignment to |
| 6497 | be the page size. */ |
| 6498 | if (htab->fix_cortex_a8) |
| 6499 | (*htab->layout_sections_again) (); |
| 6500 | |
| 6501 | while (1) |
| 6502 | { |
| 6503 | bfd *input_bfd; |
| 6504 | unsigned int bfd_indx; |
| 6505 | asection *stub_sec; |
| 6506 | enum elf32_arm_stub_type stub_type; |
| 6507 | bfd_boolean stub_changed = FALSE; |
| 6508 | unsigned prev_num_a8_fixes = num_a8_fixes; |
| 6509 | |
| 6510 | num_a8_fixes = 0; |
| 6511 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
| 6512 | input_bfd != NULL; |
| 6513 | input_bfd = input_bfd->link.next, bfd_indx++) |
| 6514 | { |
| 6515 | Elf_Internal_Shdr *symtab_hdr; |
| 6516 | asection *section; |
| 6517 | Elf_Internal_Sym *local_syms = NULL; |
| 6518 | |
| 6519 | if (!is_arm_elf (input_bfd) |
| 6520 | || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0) |
| 6521 | continue; |
| 6522 | |
| 6523 | num_a8_relocs = 0; |
| 6524 | |
| 6525 | /* We'll need the symbol table in a second. */ |
| 6526 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
| 6527 | if (symtab_hdr->sh_info == 0) |
| 6528 | continue; |
| 6529 | |
| 6530 | /* Limit scan of symbols to object file whose profile is |
| 6531 | Microcontroller to not hinder performance in the general case. */ |
| 6532 | if (m_profile && first_veneer_scan) |
| 6533 | { |
| 6534 | struct elf_link_hash_entry **sym_hashes; |
| 6535 | |
| 6536 | sym_hashes = elf_sym_hashes (input_bfd); |
| 6537 | if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes, |
| 6538 | &cmse_stub_created)) |
| 6539 | goto error_ret_free_local; |
| 6540 | |
| 6541 | if (cmse_stub_created != 0) |
| 6542 | stub_changed = TRUE; |
| 6543 | } |
| 6544 | |
| 6545 | /* Walk over each section attached to the input bfd. */ |
| 6546 | for (section = input_bfd->sections; |
| 6547 | section != NULL; |
| 6548 | section = section->next) |
| 6549 | { |
| 6550 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; |
| 6551 | |
| 6552 | /* If there aren't any relocs, then there's nothing more |
| 6553 | to do. */ |
| 6554 | if ((section->flags & SEC_RELOC) == 0 |
| 6555 | || section->reloc_count == 0 |
| 6556 | || (section->flags & SEC_CODE) == 0) |
| 6557 | continue; |
| 6558 | |
| 6559 | /* If this section is a link-once section that will be |
| 6560 | discarded, then don't create any stubs. */ |
| 6561 | if (section->output_section == NULL |
| 6562 | || section->output_section->owner != output_bfd) |
| 6563 | continue; |
| 6564 | |
| 6565 | /* Get the relocs. */ |
| 6566 | internal_relocs |
| 6567 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, |
| 6568 | NULL, info->keep_memory); |
| 6569 | if (internal_relocs == NULL) |
| 6570 | goto error_ret_free_local; |
| 6571 | |
| 6572 | /* Now examine each relocation. */ |
| 6573 | irela = internal_relocs; |
| 6574 | irelaend = irela + section->reloc_count; |
| 6575 | for (; irela < irelaend; irela++) |
| 6576 | { |
| 6577 | unsigned int r_type, r_indx; |
| 6578 | asection *sym_sec; |
| 6579 | bfd_vma sym_value; |
| 6580 | bfd_vma destination; |
| 6581 | struct elf32_arm_link_hash_entry *hash; |
| 6582 | const char *sym_name; |
| 6583 | unsigned char st_type; |
| 6584 | enum arm_st_branch_type branch_type; |
| 6585 | bfd_boolean created_stub = FALSE; |
| 6586 | |
| 6587 | r_type = ELF32_R_TYPE (irela->r_info); |
| 6588 | r_indx = ELF32_R_SYM (irela->r_info); |
| 6589 | |
| 6590 | if (r_type >= (unsigned int) R_ARM_max) |
| 6591 | { |
| 6592 | bfd_set_error (bfd_error_bad_value); |
| 6593 | error_ret_free_internal: |
| 6594 | if (elf_section_data (section)->relocs == NULL) |
| 6595 | free (internal_relocs); |
| 6596 | /* Fall through. */ |
| 6597 | error_ret_free_local: |
| 6598 | if (local_syms != NULL |
| 6599 | && (symtab_hdr->contents |
| 6600 | != (unsigned char *) local_syms)) |
| 6601 | free (local_syms); |
| 6602 | return FALSE; |
| 6603 | } |
| 6604 | |
| 6605 | hash = NULL; |
| 6606 | if (r_indx >= symtab_hdr->sh_info) |
| 6607 | hash = elf32_arm_hash_entry |
| 6608 | (elf_sym_hashes (input_bfd) |
| 6609 | [r_indx - symtab_hdr->sh_info]); |
| 6610 | |
| 6611 | /* Only look for stubs on branch instructions, or |
| 6612 | non-relaxed TLSCALL */ |
| 6613 | if ((r_type != (unsigned int) R_ARM_CALL) |
| 6614 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
| 6615 | && (r_type != (unsigned int) R_ARM_JUMP24) |
| 6616 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
| 6617 | && (r_type != (unsigned int) R_ARM_THM_XPC22) |
| 6618 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
| 6619 | && (r_type != (unsigned int) R_ARM_PLT32) |
| 6620 | && !((r_type == (unsigned int) R_ARM_TLS_CALL |
| 6621 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) |
| 6622 | && r_type == elf32_arm_tls_transition |
| 6623 | (info, r_type, &hash->root) |
| 6624 | && ((hash ? hash->tls_type |
| 6625 | : (elf32_arm_local_got_tls_type |
| 6626 | (input_bfd)[r_indx])) |
| 6627 | & GOT_TLS_GDESC) != 0)) |
| 6628 | continue; |
| 6629 | |
| 6630 | /* Now determine the call target, its name, value, |
| 6631 | section. */ |
| 6632 | sym_sec = NULL; |
| 6633 | sym_value = 0; |
| 6634 | destination = 0; |
| 6635 | sym_name = NULL; |
| 6636 | |
| 6637 | if (r_type == (unsigned int) R_ARM_TLS_CALL |
| 6638 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) |
| 6639 | { |
| 6640 | /* A non-relaxed TLS call. The target is the |
| 6641 | plt-resident trampoline and nothing to do |
| 6642 | with the symbol. */ |
| 6643 | BFD_ASSERT (htab->tls_trampoline > 0); |
| 6644 | sym_sec = htab->root.splt; |
| 6645 | sym_value = htab->tls_trampoline; |
| 6646 | hash = 0; |
| 6647 | st_type = STT_FUNC; |
| 6648 | branch_type = ST_BRANCH_TO_ARM; |
| 6649 | } |
| 6650 | else if (!hash) |
| 6651 | { |
| 6652 | /* It's a local symbol. */ |
| 6653 | Elf_Internal_Sym *sym; |
| 6654 | |
| 6655 | if (local_syms == NULL) |
| 6656 | { |
| 6657 | local_syms |
| 6658 | = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 6659 | if (local_syms == NULL) |
| 6660 | local_syms |
| 6661 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, |
| 6662 | symtab_hdr->sh_info, 0, |
| 6663 | NULL, NULL, NULL); |
| 6664 | if (local_syms == NULL) |
| 6665 | goto error_ret_free_internal; |
| 6666 | } |
| 6667 | |
| 6668 | sym = local_syms + r_indx; |
| 6669 | if (sym->st_shndx == SHN_UNDEF) |
| 6670 | sym_sec = bfd_und_section_ptr; |
| 6671 | else if (sym->st_shndx == SHN_ABS) |
| 6672 | sym_sec = bfd_abs_section_ptr; |
| 6673 | else if (sym->st_shndx == SHN_COMMON) |
| 6674 | sym_sec = bfd_com_section_ptr; |
| 6675 | else |
| 6676 | sym_sec = |
| 6677 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); |
| 6678 | |
| 6679 | if (!sym_sec) |
| 6680 | /* This is an undefined symbol. It can never |
| 6681 | be resolved. */ |
| 6682 | continue; |
| 6683 | |
| 6684 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
| 6685 | sym_value = sym->st_value; |
| 6686 | destination = (sym_value + irela->r_addend |
| 6687 | + sym_sec->output_offset |
| 6688 | + sym_sec->output_section->vma); |
| 6689 | st_type = ELF_ST_TYPE (sym->st_info); |
| 6690 | branch_type = |
| 6691 | ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); |
| 6692 | sym_name |
| 6693 | = bfd_elf_string_from_elf_section (input_bfd, |
| 6694 | symtab_hdr->sh_link, |
| 6695 | sym->st_name); |
| 6696 | } |
| 6697 | else |
| 6698 | { |
| 6699 | /* It's an external symbol. */ |
| 6700 | while (hash->root.root.type == bfd_link_hash_indirect |
| 6701 | || hash->root.root.type == bfd_link_hash_warning) |
| 6702 | hash = ((struct elf32_arm_link_hash_entry *) |
| 6703 | hash->root.root.u.i.link); |
| 6704 | |
| 6705 | if (hash->root.root.type == bfd_link_hash_defined |
| 6706 | || hash->root.root.type == bfd_link_hash_defweak) |
| 6707 | { |
| 6708 | sym_sec = hash->root.root.u.def.section; |
| 6709 | sym_value = hash->root.root.u.def.value; |
| 6710 | |
| 6711 | struct elf32_arm_link_hash_table *globals = |
| 6712 | elf32_arm_hash_table (info); |
| 6713 | |
| 6714 | /* For a destination in a shared library, |
| 6715 | use the PLT stub as target address to |
| 6716 | decide whether a branch stub is |
| 6717 | needed. */ |
| 6718 | if (globals != NULL |
| 6719 | && globals->root.splt != NULL |
| 6720 | && hash != NULL |
| 6721 | && hash->root.plt.offset != (bfd_vma) -1) |
| 6722 | { |
| 6723 | sym_sec = globals->root.splt; |
| 6724 | sym_value = hash->root.plt.offset; |
| 6725 | if (sym_sec->output_section != NULL) |
| 6726 | destination = (sym_value |
| 6727 | + sym_sec->output_offset |
| 6728 | + sym_sec->output_section->vma); |
| 6729 | } |
| 6730 | else if (sym_sec->output_section != NULL) |
| 6731 | destination = (sym_value + irela->r_addend |
| 6732 | + sym_sec->output_offset |
| 6733 | + sym_sec->output_section->vma); |
| 6734 | } |
| 6735 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
| 6736 | || (hash->root.root.type == bfd_link_hash_undefweak)) |
| 6737 | { |
| 6738 | /* For a shared library, use the PLT stub as |
| 6739 | target address to decide whether a long |
| 6740 | branch stub is needed. |
| 6741 | For absolute code, they cannot be handled. */ |
| 6742 | struct elf32_arm_link_hash_table *globals = |
| 6743 | elf32_arm_hash_table (info); |
| 6744 | |
| 6745 | if (globals != NULL |
| 6746 | && globals->root.splt != NULL |
| 6747 | && hash != NULL |
| 6748 | && hash->root.plt.offset != (bfd_vma) -1) |
| 6749 | { |
| 6750 | sym_sec = globals->root.splt; |
| 6751 | sym_value = hash->root.plt.offset; |
| 6752 | if (sym_sec->output_section != NULL) |
| 6753 | destination = (sym_value |
| 6754 | + sym_sec->output_offset |
| 6755 | + sym_sec->output_section->vma); |
| 6756 | } |
| 6757 | else |
| 6758 | continue; |
| 6759 | } |
| 6760 | else |
| 6761 | { |
| 6762 | bfd_set_error (bfd_error_bad_value); |
| 6763 | goto error_ret_free_internal; |
| 6764 | } |
| 6765 | st_type = hash->root.type; |
| 6766 | branch_type = |
| 6767 | ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); |
| 6768 | sym_name = hash->root.root.root.string; |
| 6769 | } |
| 6770 | |
| 6771 | do |
| 6772 | { |
| 6773 | bfd_boolean new_stub; |
| 6774 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 6775 | |
| 6776 | /* Determine what (if any) linker stub is needed. */ |
| 6777 | stub_type = arm_type_of_stub (info, section, irela, |
| 6778 | st_type, &branch_type, |
| 6779 | hash, destination, sym_sec, |
| 6780 | input_bfd, sym_name); |
| 6781 | if (stub_type == arm_stub_none) |
| 6782 | break; |
| 6783 | |
| 6784 | /* We've either created a stub for this reloc already, |
| 6785 | or we are about to. */ |
| 6786 | stub_entry = |
| 6787 | elf32_arm_create_stub (htab, stub_type, section, irela, |
| 6788 | sym_sec, hash, |
| 6789 | (char *) sym_name, sym_value, |
| 6790 | branch_type, &new_stub); |
| 6791 | |
| 6792 | created_stub = stub_entry != NULL; |
| 6793 | if (!created_stub) |
| 6794 | goto error_ret_free_internal; |
| 6795 | else if (!new_stub) |
| 6796 | break; |
| 6797 | else |
| 6798 | stub_changed = TRUE; |
| 6799 | } |
| 6800 | while (0); |
| 6801 | |
| 6802 | /* Look for relocations which might trigger Cortex-A8 |
| 6803 | erratum. */ |
| 6804 | if (htab->fix_cortex_a8 |
| 6805 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 |
| 6806 | || r_type == (unsigned int) R_ARM_THM_JUMP19 |
| 6807 | || r_type == (unsigned int) R_ARM_THM_CALL |
| 6808 | || r_type == (unsigned int) R_ARM_THM_XPC22)) |
| 6809 | { |
| 6810 | bfd_vma from = section->output_section->vma |
| 6811 | + section->output_offset |
| 6812 | + irela->r_offset; |
| 6813 | |
| 6814 | if ((from & 0xfff) == 0xffe) |
| 6815 | { |
| 6816 | /* Found a candidate. Note we haven't checked the |
| 6817 | destination is within 4K here: if we do so (and |
| 6818 | don't create an entry in a8_relocs) we can't tell |
| 6819 | that a branch should have been relocated when |
| 6820 | scanning later. */ |
| 6821 | if (num_a8_relocs == a8_reloc_table_size) |
| 6822 | { |
| 6823 | a8_reloc_table_size *= 2; |
| 6824 | a8_relocs = (struct a8_erratum_reloc *) |
| 6825 | bfd_realloc (a8_relocs, |
| 6826 | sizeof (struct a8_erratum_reloc) |
| 6827 | * a8_reloc_table_size); |
| 6828 | } |
| 6829 | |
| 6830 | a8_relocs[num_a8_relocs].from = from; |
| 6831 | a8_relocs[num_a8_relocs].destination = destination; |
| 6832 | a8_relocs[num_a8_relocs].r_type = r_type; |
| 6833 | a8_relocs[num_a8_relocs].branch_type = branch_type; |
| 6834 | a8_relocs[num_a8_relocs].sym_name = sym_name; |
| 6835 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; |
| 6836 | a8_relocs[num_a8_relocs].hash = hash; |
| 6837 | |
| 6838 | num_a8_relocs++; |
| 6839 | } |
| 6840 | } |
| 6841 | } |
| 6842 | |
| 6843 | /* We're done with the internal relocs, free them. */ |
| 6844 | if (elf_section_data (section)->relocs == NULL) |
| 6845 | free (internal_relocs); |
| 6846 | } |
| 6847 | |
| 6848 | if (htab->fix_cortex_a8) |
| 6849 | { |
| 6850 | /* Sort relocs which might apply to Cortex-A8 erratum. */ |
| 6851 | qsort (a8_relocs, num_a8_relocs, |
| 6852 | sizeof (struct a8_erratum_reloc), |
| 6853 | &a8_reloc_compare); |
| 6854 | |
| 6855 | /* Scan for branches which might trigger Cortex-A8 erratum. */ |
| 6856 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, |
| 6857 | &num_a8_fixes, &a8_fix_table_size, |
| 6858 | a8_relocs, num_a8_relocs, |
| 6859 | prev_num_a8_fixes, &stub_changed) |
| 6860 | != 0) |
| 6861 | goto error_ret_free_local; |
| 6862 | } |
| 6863 | |
| 6864 | if (local_syms != NULL |
| 6865 | && symtab_hdr->contents != (unsigned char *) local_syms) |
| 6866 | { |
| 6867 | if (!info->keep_memory) |
| 6868 | free (local_syms); |
| 6869 | else |
| 6870 | symtab_hdr->contents = (unsigned char *) local_syms; |
| 6871 | } |
| 6872 | } |
| 6873 | |
| 6874 | if (first_veneer_scan |
| 6875 | && !set_cmse_veneer_addr_from_implib (info, htab, |
| 6876 | &cmse_stub_created)) |
| 6877 | ret = FALSE; |
| 6878 | |
| 6879 | if (prev_num_a8_fixes != num_a8_fixes) |
| 6880 | stub_changed = TRUE; |
| 6881 | |
| 6882 | if (!stub_changed) |
| 6883 | break; |
| 6884 | |
| 6885 | /* OK, we've added some stubs. Find out the new size of the |
| 6886 | stub sections. */ |
| 6887 | for (stub_sec = htab->stub_bfd->sections; |
| 6888 | stub_sec != NULL; |
| 6889 | stub_sec = stub_sec->next) |
| 6890 | { |
| 6891 | /* Ignore non-stub sections. */ |
| 6892 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
| 6893 | continue; |
| 6894 | |
| 6895 | stub_sec->size = 0; |
| 6896 | } |
| 6897 | |
| 6898 | /* Add new SG veneers after those already in the input import |
| 6899 | library. */ |
| 6900 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; |
| 6901 | stub_type++) |
| 6902 | { |
| 6903 | bfd_vma *start_offset_p; |
| 6904 | asection **stub_sec_p; |
| 6905 | |
| 6906 | start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type); |
| 6907 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); |
| 6908 | if (start_offset_p == NULL) |
| 6909 | continue; |
| 6910 | |
| 6911 | BFD_ASSERT (stub_sec_p != NULL); |
| 6912 | if (*stub_sec_p != NULL) |
| 6913 | (*stub_sec_p)->size = *start_offset_p; |
| 6914 | } |
| 6915 | |
| 6916 | /* Compute stub section size, considering padding. */ |
| 6917 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
| 6918 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; |
| 6919 | stub_type++) |
| 6920 | { |
| 6921 | int size, padding; |
| 6922 | asection **stub_sec_p; |
| 6923 | |
| 6924 | padding = arm_dedicated_stub_section_padding (stub_type); |
| 6925 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); |
| 6926 | /* Skip if no stub input section or no stub section padding |
| 6927 | required. */ |
| 6928 | if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0) |
| 6929 | continue; |
| 6930 | /* Stub section padding required but no dedicated section. */ |
| 6931 | BFD_ASSERT (stub_sec_p); |
| 6932 | |
| 6933 | size = (*stub_sec_p)->size; |
| 6934 | size = (size + padding - 1) & ~(padding - 1); |
| 6935 | (*stub_sec_p)->size = size; |
| 6936 | } |
| 6937 | |
| 6938 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
| 6939 | if (htab->fix_cortex_a8) |
| 6940 | for (i = 0; i < num_a8_fixes; i++) |
| 6941 | { |
| 6942 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, |
| 6943 | a8_fixes[i].section, htab, a8_fixes[i].stub_type); |
| 6944 | |
| 6945 | if (stub_sec == NULL) |
| 6946 | return FALSE; |
| 6947 | |
| 6948 | stub_sec->size |
| 6949 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, |
| 6950 | NULL); |
| 6951 | } |
| 6952 | |
| 6953 | |
| 6954 | /* Ask the linker to do its stuff. */ |
| 6955 | (*htab->layout_sections_again) (); |
| 6956 | first_veneer_scan = FALSE; |
| 6957 | } |
| 6958 | |
| 6959 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
| 6960 | if (htab->fix_cortex_a8) |
| 6961 | { |
| 6962 | for (i = 0; i < num_a8_fixes; i++) |
| 6963 | { |
| 6964 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 6965 | char *stub_name = a8_fixes[i].stub_name; |
| 6966 | asection *section = a8_fixes[i].section; |
| 6967 | unsigned int section_id = a8_fixes[i].section->id; |
| 6968 | asection *link_sec = htab->stub_group[section_id].link_sec; |
| 6969 | asection *stub_sec = htab->stub_group[section_id].stub_sec; |
| 6970 | const insn_sequence *template_sequence; |
| 6971 | int template_size, size = 0; |
| 6972 | |
| 6973 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, |
| 6974 | TRUE, FALSE); |
| 6975 | if (stub_entry == NULL) |
| 6976 | { |
| 6977 | _bfd_error_handler (_("%pB: cannot create stub entry %s"), |
| 6978 | section->owner, stub_name); |
| 6979 | return FALSE; |
| 6980 | } |
| 6981 | |
| 6982 | stub_entry->stub_sec = stub_sec; |
| 6983 | stub_entry->stub_offset = (bfd_vma) -1; |
| 6984 | stub_entry->id_sec = link_sec; |
| 6985 | stub_entry->stub_type = a8_fixes[i].stub_type; |
| 6986 | stub_entry->source_value = a8_fixes[i].offset; |
| 6987 | stub_entry->target_section = a8_fixes[i].section; |
| 6988 | stub_entry->target_value = a8_fixes[i].target_offset; |
| 6989 | stub_entry->orig_insn = a8_fixes[i].orig_insn; |
| 6990 | stub_entry->branch_type = a8_fixes[i].branch_type; |
| 6991 | |
| 6992 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
| 6993 | &template_sequence, |
| 6994 | &template_size); |
| 6995 | |
| 6996 | stub_entry->stub_size = size; |
| 6997 | stub_entry->stub_template = template_sequence; |
| 6998 | stub_entry->stub_template_size = template_size; |
| 6999 | } |
| 7000 | |
| 7001 | /* Stash the Cortex-A8 erratum fix array for use later in |
| 7002 | elf32_arm_write_section(). */ |
| 7003 | htab->a8_erratum_fixes = a8_fixes; |
| 7004 | htab->num_a8_erratum_fixes = num_a8_fixes; |
| 7005 | } |
| 7006 | else |
| 7007 | { |
| 7008 | htab->a8_erratum_fixes = NULL; |
| 7009 | htab->num_a8_erratum_fixes = 0; |
| 7010 | } |
| 7011 | return ret; |
| 7012 | } |
| 7013 | |
| 7014 | /* Build all the stubs associated with the current output file. The |
| 7015 | stubs are kept in a hash table attached to the main linker hash |
| 7016 | table. We also set up the .plt entries for statically linked PIC |
| 7017 | functions here. This function is called via arm_elf_finish in the |
| 7018 | linker. */ |
| 7019 | |
| 7020 | bfd_boolean |
| 7021 | elf32_arm_build_stubs (struct bfd_link_info *info) |
| 7022 | { |
| 7023 | asection *stub_sec; |
| 7024 | struct bfd_hash_table *table; |
| 7025 | enum elf32_arm_stub_type stub_type; |
| 7026 | struct elf32_arm_link_hash_table *htab; |
| 7027 | |
| 7028 | htab = elf32_arm_hash_table (info); |
| 7029 | if (htab == NULL) |
| 7030 | return FALSE; |
| 7031 | |
| 7032 | for (stub_sec = htab->stub_bfd->sections; |
| 7033 | stub_sec != NULL; |
| 7034 | stub_sec = stub_sec->next) |
| 7035 | { |
| 7036 | bfd_size_type size; |
| 7037 | |
| 7038 | /* Ignore non-stub sections. */ |
| 7039 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
| 7040 | continue; |
| 7041 | |
| 7042 | /* Allocate memory to hold the linker stubs. Zeroing the stub sections |
| 7043 | must at least be done for stub section requiring padding and for SG |
| 7044 | veneers to ensure that a non secure code branching to a removed SG |
| 7045 | veneer causes an error. */ |
| 7046 | size = stub_sec->size; |
| 7047 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
| 7048 | if (stub_sec->contents == NULL && size != 0) |
| 7049 | return FALSE; |
| 7050 | |
| 7051 | stub_sec->size = 0; |
| 7052 | } |
| 7053 | |
| 7054 | /* Add new SG veneers after those already in the input import library. */ |
| 7055 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) |
| 7056 | { |
| 7057 | bfd_vma *start_offset_p; |
| 7058 | asection **stub_sec_p; |
| 7059 | |
| 7060 | start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type); |
| 7061 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); |
| 7062 | if (start_offset_p == NULL) |
| 7063 | continue; |
| 7064 | |
| 7065 | BFD_ASSERT (stub_sec_p != NULL); |
| 7066 | if (*stub_sec_p != NULL) |
| 7067 | (*stub_sec_p)->size = *start_offset_p; |
| 7068 | } |
| 7069 | |
| 7070 | /* Build the stubs as directed by the stub hash table. */ |
| 7071 | table = &htab->stub_hash_table; |
| 7072 | bfd_hash_traverse (table, arm_build_one_stub, info); |
| 7073 | if (htab->fix_cortex_a8) |
| 7074 | { |
| 7075 | /* Place the cortex a8 stubs last. */ |
| 7076 | htab->fix_cortex_a8 = -1; |
| 7077 | bfd_hash_traverse (table, arm_build_one_stub, info); |
| 7078 | } |
| 7079 | |
| 7080 | return TRUE; |
| 7081 | } |
| 7082 | |
| 7083 | /* Locate the Thumb encoded calling stub for NAME. */ |
| 7084 | |
| 7085 | static struct elf_link_hash_entry * |
| 7086 | find_thumb_glue (struct bfd_link_info *link_info, |
| 7087 | const char *name, |
| 7088 | char **error_message) |
| 7089 | { |
| 7090 | char *tmp_name; |
| 7091 | struct elf_link_hash_entry *hash; |
| 7092 | struct elf32_arm_link_hash_table *hash_table; |
| 7093 | |
| 7094 | /* We need a pointer to the armelf specific hash table. */ |
| 7095 | hash_table = elf32_arm_hash_table (link_info); |
| 7096 | if (hash_table == NULL) |
| 7097 | return NULL; |
| 7098 | |
| 7099 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
| 7100 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); |
| 7101 | |
| 7102 | BFD_ASSERT (tmp_name); |
| 7103 | |
| 7104 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); |
| 7105 | |
| 7106 | hash = elf_link_hash_lookup |
| 7107 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
| 7108 | |
| 7109 | if (hash == NULL |
| 7110 | && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"), |
| 7111 | "Thumb", tmp_name, name) == -1) |
| 7112 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); |
| 7113 | |
| 7114 | free (tmp_name); |
| 7115 | |
| 7116 | return hash; |
| 7117 | } |
| 7118 | |
| 7119 | /* Locate the ARM encoded calling stub for NAME. */ |
| 7120 | |
| 7121 | static struct elf_link_hash_entry * |
| 7122 | find_arm_glue (struct bfd_link_info *link_info, |
| 7123 | const char *name, |
| 7124 | char **error_message) |
| 7125 | { |
| 7126 | char *tmp_name; |
| 7127 | struct elf_link_hash_entry *myh; |
| 7128 | struct elf32_arm_link_hash_table *hash_table; |
| 7129 | |
| 7130 | /* We need a pointer to the elfarm specific hash table. */ |
| 7131 | hash_table = elf32_arm_hash_table (link_info); |
| 7132 | if (hash_table == NULL) |
| 7133 | return NULL; |
| 7134 | |
| 7135 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
| 7136 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
| 7137 | |
| 7138 | BFD_ASSERT (tmp_name); |
| 7139 | |
| 7140 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); |
| 7141 | |
| 7142 | myh = elf_link_hash_lookup |
| 7143 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
| 7144 | |
| 7145 | if (myh == NULL |
| 7146 | && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"), |
| 7147 | "ARM", tmp_name, name) == -1) |
| 7148 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); |
| 7149 | |
| 7150 | free (tmp_name); |
| 7151 | |
| 7152 | return myh; |
| 7153 | } |
| 7154 | |
| 7155 | /* ARM->Thumb glue (static images): |
| 7156 | |
| 7157 | .arm |
| 7158 | __func_from_arm: |
| 7159 | ldr r12, __func_addr |
| 7160 | bx r12 |
| 7161 | __func_addr: |
| 7162 | .word func @ behave as if you saw a ARM_32 reloc. |
| 7163 | |
| 7164 | (v5t static images) |
| 7165 | .arm |
| 7166 | __func_from_arm: |
| 7167 | ldr pc, __func_addr |
| 7168 | __func_addr: |
| 7169 | .word func @ behave as if you saw a ARM_32 reloc. |
| 7170 | |
| 7171 | (relocatable images) |
| 7172 | .arm |
| 7173 | __func_from_arm: |
| 7174 | ldr r12, __func_offset |
| 7175 | add r12, r12, pc |
| 7176 | bx r12 |
| 7177 | __func_offset: |
| 7178 | .word func - . */ |
| 7179 | |
| 7180 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 |
| 7181 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
| 7182 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; |
| 7183 | static const insn32 a2t3_func_addr_insn = 0x00000001; |
| 7184 | |
| 7185 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
| 7186 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; |
| 7187 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; |
| 7188 | |
| 7189 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
| 7190 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; |
| 7191 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; |
| 7192 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; |
| 7193 | |
| 7194 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
| 7195 | |
| 7196 | .thumb .thumb |
| 7197 | .align 2 .align 2 |
| 7198 | __func_from_thumb: __func_from_thumb: |
| 7199 | bx pc push {r6, lr} |
| 7200 | nop ldr r6, __func_addr |
| 7201 | .arm mov lr, pc |
| 7202 | b func bx r6 |
| 7203 | .arm |
| 7204 | ;; back_to_thumb |
| 7205 | ldmia r13! {r6, lr} |
| 7206 | bx lr |
| 7207 | __func_addr: |
| 7208 | .word func */ |
| 7209 | |
| 7210 | #define THUMB2ARM_GLUE_SIZE 8 |
| 7211 | static const insn16 t2a1_bx_pc_insn = 0x4778; |
| 7212 | static const insn16 t2a2_noop_insn = 0x46c0; |
| 7213 | static const insn32 t2a3_b_insn = 0xea000000; |
| 7214 | |
| 7215 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
| 7216 | #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16 |
| 7217 | #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24 |
| 7218 | |
| 7219 | #define ARM_BX_VENEER_SIZE 12 |
| 7220 | static const insn32 armbx1_tst_insn = 0xe3100001; |
| 7221 | static const insn32 armbx2_moveq_insn = 0x01a0f000; |
| 7222 | static const insn32 armbx3_bx_insn = 0xe12fff10; |
| 7223 | |
| 7224 | #ifndef ELFARM_NABI_C_INCLUDED |
| 7225 | static void |
| 7226 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) |
| 7227 | { |
| 7228 | asection * s; |
| 7229 | bfd_byte * contents; |
| 7230 | |
| 7231 | if (size == 0) |
| 7232 | { |
| 7233 | /* Do not include empty glue sections in the output. */ |
| 7234 | if (abfd != NULL) |
| 7235 | { |
| 7236 | s = bfd_get_linker_section (abfd, name); |
| 7237 | if (s != NULL) |
| 7238 | s->flags |= SEC_EXCLUDE; |
| 7239 | } |
| 7240 | return; |
| 7241 | } |
| 7242 | |
| 7243 | BFD_ASSERT (abfd != NULL); |
| 7244 | |
| 7245 | s = bfd_get_linker_section (abfd, name); |
| 7246 | BFD_ASSERT (s != NULL); |
| 7247 | |
| 7248 | contents = (bfd_byte *) bfd_zalloc (abfd, size); |
| 7249 | |
| 7250 | BFD_ASSERT (s->size == size); |
| 7251 | s->contents = contents; |
| 7252 | } |
| 7253 | |
| 7254 | bfd_boolean |
| 7255 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) |
| 7256 | { |
| 7257 | struct elf32_arm_link_hash_table * globals; |
| 7258 | |
| 7259 | globals = elf32_arm_hash_table (info); |
| 7260 | BFD_ASSERT (globals != NULL); |
| 7261 | |
| 7262 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
| 7263 | globals->arm_glue_size, |
| 7264 | ARM2THUMB_GLUE_SECTION_NAME); |
| 7265 | |
| 7266 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
| 7267 | globals->thumb_glue_size, |
| 7268 | THUMB2ARM_GLUE_SECTION_NAME); |
| 7269 | |
| 7270 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
| 7271 | globals->vfp11_erratum_glue_size, |
| 7272 | VFP11_ERRATUM_VENEER_SECTION_NAME); |
| 7273 | |
| 7274 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
| 7275 | globals->stm32l4xx_erratum_glue_size, |
| 7276 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME); |
| 7277 | |
| 7278 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
| 7279 | globals->bx_glue_size, |
| 7280 | ARM_BX_GLUE_SECTION_NAME); |
| 7281 | |
| 7282 | return TRUE; |
| 7283 | } |
| 7284 | |
| 7285 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
| 7286 | returns the symbol identifying the stub. */ |
| 7287 | |
| 7288 | static struct elf_link_hash_entry * |
| 7289 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
| 7290 | struct elf_link_hash_entry * h) |
| 7291 | { |
| 7292 | const char * name = h->root.root.string; |
| 7293 | asection * s; |
| 7294 | char * tmp_name; |
| 7295 | struct elf_link_hash_entry * myh; |
| 7296 | struct bfd_link_hash_entry * bh; |
| 7297 | struct elf32_arm_link_hash_table * globals; |
| 7298 | bfd_vma val; |
| 7299 | bfd_size_type size; |
| 7300 | |
| 7301 | globals = elf32_arm_hash_table (link_info); |
| 7302 | BFD_ASSERT (globals != NULL); |
| 7303 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 7304 | |
| 7305 | s = bfd_get_linker_section |
| 7306 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); |
| 7307 | |
| 7308 | BFD_ASSERT (s != NULL); |
| 7309 | |
| 7310 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
| 7311 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
| 7312 | |
| 7313 | BFD_ASSERT (tmp_name); |
| 7314 | |
| 7315 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); |
| 7316 | |
| 7317 | myh = elf_link_hash_lookup |
| 7318 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
| 7319 | |
| 7320 | if (myh != NULL) |
| 7321 | { |
| 7322 | /* We've already seen this guy. */ |
| 7323 | free (tmp_name); |
| 7324 | return myh; |
| 7325 | } |
| 7326 | |
| 7327 | /* The only trick here is using hash_table->arm_glue_size as the value. |
| 7328 | Even though the section isn't allocated yet, this is where we will be |
| 7329 | putting it. The +1 on the value marks that the stub has not been |
| 7330 | output yet - not that it is a Thumb function. */ |
| 7331 | bh = NULL; |
| 7332 | val = globals->arm_glue_size + 1; |
| 7333 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, |
| 7334 | tmp_name, BSF_GLOBAL, s, val, |
| 7335 | NULL, TRUE, FALSE, &bh); |
| 7336 | |
| 7337 | myh = (struct elf_link_hash_entry *) bh; |
| 7338 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 7339 | myh->forced_local = 1; |
| 7340 | |
| 7341 | free (tmp_name); |
| 7342 | |
| 7343 | if (bfd_link_pic (link_info) |
| 7344 | || globals->root.is_relocatable_executable |
| 7345 | || globals->pic_veneer) |
| 7346 | size = ARM2THUMB_PIC_GLUE_SIZE; |
| 7347 | else if (globals->use_blx) |
| 7348 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; |
| 7349 | else |
| 7350 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
| 7351 | |
| 7352 | s->size += size; |
| 7353 | globals->arm_glue_size += size; |
| 7354 | |
| 7355 | return myh; |
| 7356 | } |
| 7357 | |
| 7358 | /* Allocate space for ARMv4 BX veneers. */ |
| 7359 | |
| 7360 | static void |
| 7361 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) |
| 7362 | { |
| 7363 | asection * s; |
| 7364 | struct elf32_arm_link_hash_table *globals; |
| 7365 | char *tmp_name; |
| 7366 | struct elf_link_hash_entry *myh; |
| 7367 | struct bfd_link_hash_entry *bh; |
| 7368 | bfd_vma val; |
| 7369 | |
| 7370 | /* BX PC does not need a veneer. */ |
| 7371 | if (reg == 15) |
| 7372 | return; |
| 7373 | |
| 7374 | globals = elf32_arm_hash_table (link_info); |
| 7375 | BFD_ASSERT (globals != NULL); |
| 7376 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 7377 | |
| 7378 | /* Check if this veneer has already been allocated. */ |
| 7379 | if (globals->bx_glue_offset[reg]) |
| 7380 | return; |
| 7381 | |
| 7382 | s = bfd_get_linker_section |
| 7383 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); |
| 7384 | |
| 7385 | BFD_ASSERT (s != NULL); |
| 7386 | |
| 7387 | /* Add symbol for veneer. */ |
| 7388 | tmp_name = (char *) |
| 7389 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); |
| 7390 | |
| 7391 | BFD_ASSERT (tmp_name); |
| 7392 | |
| 7393 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
| 7394 | |
| 7395 | myh = elf_link_hash_lookup |
| 7396 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); |
| 7397 | |
| 7398 | BFD_ASSERT (myh == NULL); |
| 7399 | |
| 7400 | bh = NULL; |
| 7401 | val = globals->bx_glue_size; |
| 7402 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, |
| 7403 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
| 7404 | NULL, TRUE, FALSE, &bh); |
| 7405 | |
| 7406 | myh = (struct elf_link_hash_entry *) bh; |
| 7407 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 7408 | myh->forced_local = 1; |
| 7409 | |
| 7410 | s->size += ARM_BX_VENEER_SIZE; |
| 7411 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; |
| 7412 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; |
| 7413 | } |
| 7414 | |
| 7415 | |
| 7416 | /* Add an entry to the code/data map for section SEC. */ |
| 7417 | |
| 7418 | static void |
| 7419 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) |
| 7420 | { |
| 7421 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); |
| 7422 | unsigned int newidx; |
| 7423 | |
| 7424 | if (sec_data->map == NULL) |
| 7425 | { |
| 7426 | sec_data->map = (elf32_arm_section_map *) |
| 7427 | bfd_malloc (sizeof (elf32_arm_section_map)); |
| 7428 | sec_data->mapcount = 0; |
| 7429 | sec_data->mapsize = 1; |
| 7430 | } |
| 7431 | |
| 7432 | newidx = sec_data->mapcount++; |
| 7433 | |
| 7434 | if (sec_data->mapcount > sec_data->mapsize) |
| 7435 | { |
| 7436 | sec_data->mapsize *= 2; |
| 7437 | sec_data->map = (elf32_arm_section_map *) |
| 7438 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize |
| 7439 | * sizeof (elf32_arm_section_map)); |
| 7440 | } |
| 7441 | |
| 7442 | if (sec_data->map) |
| 7443 | { |
| 7444 | sec_data->map[newidx].vma = vma; |
| 7445 | sec_data->map[newidx].type = type; |
| 7446 | } |
| 7447 | } |
| 7448 | |
| 7449 | |
| 7450 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode |
| 7451 | veneers are handled for now. */ |
| 7452 | |
| 7453 | static bfd_vma |
| 7454 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, |
| 7455 | elf32_vfp11_erratum_list *branch, |
| 7456 | bfd *branch_bfd, |
| 7457 | asection *branch_sec, |
| 7458 | unsigned int offset) |
| 7459 | { |
| 7460 | asection *s; |
| 7461 | struct elf32_arm_link_hash_table *hash_table; |
| 7462 | char *tmp_name; |
| 7463 | struct elf_link_hash_entry *myh; |
| 7464 | struct bfd_link_hash_entry *bh; |
| 7465 | bfd_vma val; |
| 7466 | struct _arm_elf_section_data *sec_data; |
| 7467 | elf32_vfp11_erratum_list *newerr; |
| 7468 | |
| 7469 | hash_table = elf32_arm_hash_table (link_info); |
| 7470 | BFD_ASSERT (hash_table != NULL); |
| 7471 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); |
| 7472 | |
| 7473 | s = bfd_get_linker_section |
| 7474 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); |
| 7475 | |
| 7476 | sec_data = elf32_arm_section_data (s); |
| 7477 | |
| 7478 | BFD_ASSERT (s != NULL); |
| 7479 | |
| 7480 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
| 7481 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
| 7482 | |
| 7483 | BFD_ASSERT (tmp_name); |
| 7484 | |
| 7485 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
| 7486 | hash_table->num_vfp11_fixes); |
| 7487 | |
| 7488 | myh = elf_link_hash_lookup |
| 7489 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); |
| 7490 | |
| 7491 | BFD_ASSERT (myh == NULL); |
| 7492 | |
| 7493 | bh = NULL; |
| 7494 | val = hash_table->vfp11_erratum_glue_size; |
| 7495 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, |
| 7496 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
| 7497 | NULL, TRUE, FALSE, &bh); |
| 7498 | |
| 7499 | myh = (struct elf_link_hash_entry *) bh; |
| 7500 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 7501 | myh->forced_local = 1; |
| 7502 | |
| 7503 | /* Link veneer back to calling location. */ |
| 7504 | sec_data->erratumcount += 1; |
| 7505 | newerr = (elf32_vfp11_erratum_list *) |
| 7506 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); |
| 7507 | |
| 7508 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
| 7509 | newerr->vma = -1; |
| 7510 | newerr->u.v.branch = branch; |
| 7511 | newerr->u.v.id = hash_table->num_vfp11_fixes; |
| 7512 | branch->u.b.veneer = newerr; |
| 7513 | |
| 7514 | newerr->next = sec_data->erratumlist; |
| 7515 | sec_data->erratumlist = newerr; |
| 7516 | |
| 7517 | /* A symbol for the return from the veneer. */ |
| 7518 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", |
| 7519 | hash_table->num_vfp11_fixes); |
| 7520 | |
| 7521 | myh = elf_link_hash_lookup |
| 7522 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); |
| 7523 | |
| 7524 | if (myh != NULL) |
| 7525 | abort (); |
| 7526 | |
| 7527 | bh = NULL; |
| 7528 | val = offset + 4; |
| 7529 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, |
| 7530 | branch_sec, val, NULL, TRUE, FALSE, &bh); |
| 7531 | |
| 7532 | myh = (struct elf_link_hash_entry *) bh; |
| 7533 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 7534 | myh->forced_local = 1; |
| 7535 | |
| 7536 | free (tmp_name); |
| 7537 | |
| 7538 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
| 7539 | entry for that symbol to the code/data map for the section. */ |
| 7540 | if (hash_table->vfp11_erratum_glue_size == 0) |
| 7541 | { |
| 7542 | bh = NULL; |
| 7543 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it |
| 7544 | ever requires this erratum fix. */ |
| 7545 | _bfd_generic_link_add_one_symbol (link_info, |
| 7546 | hash_table->bfd_of_glue_owner, "$a", |
| 7547 | BSF_LOCAL, s, 0, NULL, |
| 7548 | TRUE, FALSE, &bh); |
| 7549 | |
| 7550 | myh = (struct elf_link_hash_entry *) bh; |
| 7551 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); |
| 7552 | myh->forced_local = 1; |
| 7553 | |
| 7554 | /* The elf32_arm_init_maps function only cares about symbols from input |
| 7555 | BFDs. We must make a note of this generated mapping symbol |
| 7556 | ourselves so that code byteswapping works properly in |
| 7557 | elf32_arm_write_section. */ |
| 7558 | elf32_arm_section_map_add (s, 'a', 0); |
| 7559 | } |
| 7560 | |
| 7561 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
| 7562 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; |
| 7563 | hash_table->num_vfp11_fixes++; |
| 7564 | |
| 7565 | /* The offset of the veneer. */ |
| 7566 | return val; |
| 7567 | } |
| 7568 | |
| 7569 | /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode |
| 7570 | veneers need to be handled because used only in Cortex-M. */ |
| 7571 | |
| 7572 | static bfd_vma |
| 7573 | record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info, |
| 7574 | elf32_stm32l4xx_erratum_list *branch, |
| 7575 | bfd *branch_bfd, |
| 7576 | asection *branch_sec, |
| 7577 | unsigned int offset, |
| 7578 | bfd_size_type veneer_size) |
| 7579 | { |
| 7580 | asection *s; |
| 7581 | struct elf32_arm_link_hash_table *hash_table; |
| 7582 | char *tmp_name; |
| 7583 | struct elf_link_hash_entry *myh; |
| 7584 | struct bfd_link_hash_entry *bh; |
| 7585 | bfd_vma val; |
| 7586 | struct _arm_elf_section_data *sec_data; |
| 7587 | elf32_stm32l4xx_erratum_list *newerr; |
| 7588 | |
| 7589 | hash_table = elf32_arm_hash_table (link_info); |
| 7590 | BFD_ASSERT (hash_table != NULL); |
| 7591 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); |
| 7592 | |
| 7593 | s = bfd_get_linker_section |
| 7594 | (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); |
| 7595 | |
| 7596 | BFD_ASSERT (s != NULL); |
| 7597 | |
| 7598 | sec_data = elf32_arm_section_data (s); |
| 7599 | |
| 7600 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
| 7601 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); |
| 7602 | |
| 7603 | BFD_ASSERT (tmp_name); |
| 7604 | |
| 7605 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, |
| 7606 | hash_table->num_stm32l4xx_fixes); |
| 7607 | |
| 7608 | myh = elf_link_hash_lookup |
| 7609 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); |
| 7610 | |
| 7611 | BFD_ASSERT (myh == NULL); |
| 7612 | |
| 7613 | bh = NULL; |
| 7614 | val = hash_table->stm32l4xx_erratum_glue_size; |
| 7615 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, |
| 7616 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
| 7617 | NULL, TRUE, FALSE, &bh); |
| 7618 | |
| 7619 | myh = (struct elf_link_hash_entry *) bh; |
| 7620 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 7621 | myh->forced_local = 1; |
| 7622 | |
| 7623 | /* Link veneer back to calling location. */ |
| 7624 | sec_data->stm32l4xx_erratumcount += 1; |
| 7625 | newerr = (elf32_stm32l4xx_erratum_list *) |
| 7626 | bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list)); |
| 7627 | |
| 7628 | newerr->type = STM32L4XX_ERRATUM_VENEER; |
| 7629 | newerr->vma = -1; |
| 7630 | newerr->u.v.branch = branch; |
| 7631 | newerr->u.v.id = hash_table->num_stm32l4xx_fixes; |
| 7632 | branch->u.b.veneer = newerr; |
| 7633 | |
| 7634 | newerr->next = sec_data->stm32l4xx_erratumlist; |
| 7635 | sec_data->stm32l4xx_erratumlist = newerr; |
| 7636 | |
| 7637 | /* A symbol for the return from the veneer. */ |
| 7638 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", |
| 7639 | hash_table->num_stm32l4xx_fixes); |
| 7640 | |
| 7641 | myh = elf_link_hash_lookup |
| 7642 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); |
| 7643 | |
| 7644 | if (myh != NULL) |
| 7645 | abort (); |
| 7646 | |
| 7647 | bh = NULL; |
| 7648 | val = offset + 4; |
| 7649 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, |
| 7650 | branch_sec, val, NULL, TRUE, FALSE, &bh); |
| 7651 | |
| 7652 | myh = (struct elf_link_hash_entry *) bh; |
| 7653 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 7654 | myh->forced_local = 1; |
| 7655 | |
| 7656 | free (tmp_name); |
| 7657 | |
| 7658 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
| 7659 | entry for that symbol to the code/data map for the section. */ |
| 7660 | if (hash_table->stm32l4xx_erratum_glue_size == 0) |
| 7661 | { |
| 7662 | bh = NULL; |
| 7663 | /* Creates a THUMB symbol since there is no other choice. */ |
| 7664 | _bfd_generic_link_add_one_symbol (link_info, |
| 7665 | hash_table->bfd_of_glue_owner, "$t", |
| 7666 | BSF_LOCAL, s, 0, NULL, |
| 7667 | TRUE, FALSE, &bh); |
| 7668 | |
| 7669 | myh = (struct elf_link_hash_entry *) bh; |
| 7670 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); |
| 7671 | myh->forced_local = 1; |
| 7672 | |
| 7673 | /* The elf32_arm_init_maps function only cares about symbols from input |
| 7674 | BFDs. We must make a note of this generated mapping symbol |
| 7675 | ourselves so that code byteswapping works properly in |
| 7676 | elf32_arm_write_section. */ |
| 7677 | elf32_arm_section_map_add (s, 't', 0); |
| 7678 | } |
| 7679 | |
| 7680 | s->size += veneer_size; |
| 7681 | hash_table->stm32l4xx_erratum_glue_size += veneer_size; |
| 7682 | hash_table->num_stm32l4xx_fixes++; |
| 7683 | |
| 7684 | /* The offset of the veneer. */ |
| 7685 | return val; |
| 7686 | } |
| 7687 | |
| 7688 | #define ARM_GLUE_SECTION_FLAGS \ |
| 7689 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
| 7690 | | SEC_READONLY | SEC_LINKER_CREATED) |
| 7691 | |
| 7692 | /* Create a fake section for use by the ARM backend of the linker. */ |
| 7693 | |
| 7694 | static bfd_boolean |
| 7695 | arm_make_glue_section (bfd * abfd, const char * name) |
| 7696 | { |
| 7697 | asection * sec; |
| 7698 | |
| 7699 | sec = bfd_get_linker_section (abfd, name); |
| 7700 | if (sec != NULL) |
| 7701 | /* Already made. */ |
| 7702 | return TRUE; |
| 7703 | |
| 7704 | sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); |
| 7705 | |
| 7706 | if (sec == NULL |
| 7707 | || !bfd_set_section_alignment (abfd, sec, 2)) |
| 7708 | return FALSE; |
| 7709 | |
| 7710 | /* Set the gc mark to prevent the section from being removed by garbage |
| 7711 | collection, despite the fact that no relocs refer to this section. */ |
| 7712 | sec->gc_mark = 1; |
| 7713 | |
| 7714 | return TRUE; |
| 7715 | } |
| 7716 | |
| 7717 | /* Set size of .plt entries. This function is called from the |
| 7718 | linker scripts in ld/emultempl/{armelf}.em. */ |
| 7719 | |
| 7720 | void |
| 7721 | bfd_elf32_arm_use_long_plt (void) |
| 7722 | { |
| 7723 | elf32_arm_use_long_plt_entry = TRUE; |
| 7724 | } |
| 7725 | |
| 7726 | /* Add the glue sections to ABFD. This function is called from the |
| 7727 | linker scripts in ld/emultempl/{armelf}.em. */ |
| 7728 | |
| 7729 | bfd_boolean |
| 7730 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
| 7731 | struct bfd_link_info *info) |
| 7732 | { |
| 7733 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
| 7734 | bfd_boolean dostm32l4xx = globals |
| 7735 | && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE; |
| 7736 | bfd_boolean addglue; |
| 7737 | |
| 7738 | /* If we are only performing a partial |
| 7739 | link do not bother adding the glue. */ |
| 7740 | if (bfd_link_relocatable (info)) |
| 7741 | return TRUE; |
| 7742 | |
| 7743 | addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
| 7744 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) |
| 7745 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) |
| 7746 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); |
| 7747 | |
| 7748 | if (!dostm32l4xx) |
| 7749 | return addglue; |
| 7750 | |
| 7751 | return addglue |
| 7752 | && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); |
| 7753 | } |
| 7754 | |
| 7755 | /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This |
| 7756 | ensures they are not marked for deletion by |
| 7757 | strip_excluded_output_sections () when veneers are going to be created |
| 7758 | later. Not doing so would trigger assert on empty section size in |
| 7759 | lang_size_sections_1 (). */ |
| 7760 | |
| 7761 | void |
| 7762 | bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info) |
| 7763 | { |
| 7764 | enum elf32_arm_stub_type stub_type; |
| 7765 | |
| 7766 | /* If we are only performing a partial |
| 7767 | link do not bother adding the glue. */ |
| 7768 | if (bfd_link_relocatable (info)) |
| 7769 | return; |
| 7770 | |
| 7771 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) |
| 7772 | { |
| 7773 | asection *out_sec; |
| 7774 | const char *out_sec_name; |
| 7775 | |
| 7776 | if (!arm_dedicated_stub_output_section_required (stub_type)) |
| 7777 | continue; |
| 7778 | |
| 7779 | out_sec_name = arm_dedicated_stub_output_section_name (stub_type); |
| 7780 | out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name); |
| 7781 | if (out_sec != NULL) |
| 7782 | out_sec->flags |= SEC_KEEP; |
| 7783 | } |
| 7784 | } |
| 7785 | |
| 7786 | /* Select a BFD to be used to hold the sections used by the glue code. |
| 7787 | This function is called from the linker scripts in ld/emultempl/ |
| 7788 | {armelf/pe}.em. */ |
| 7789 | |
| 7790 | bfd_boolean |
| 7791 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
| 7792 | { |
| 7793 | struct elf32_arm_link_hash_table *globals; |
| 7794 | |
| 7795 | /* If we are only performing a partial link |
| 7796 | do not bother getting a bfd to hold the glue. */ |
| 7797 | if (bfd_link_relocatable (info)) |
| 7798 | return TRUE; |
| 7799 | |
| 7800 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
| 7801 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); |
| 7802 | |
| 7803 | globals = elf32_arm_hash_table (info); |
| 7804 | BFD_ASSERT (globals != NULL); |
| 7805 | |
| 7806 | if (globals->bfd_of_glue_owner != NULL) |
| 7807 | return TRUE; |
| 7808 | |
| 7809 | /* Save the bfd for later use. */ |
| 7810 | globals->bfd_of_glue_owner = abfd; |
| 7811 | |
| 7812 | return TRUE; |
| 7813 | } |
| 7814 | |
| 7815 | static void |
| 7816 | check_use_blx (struct elf32_arm_link_hash_table *globals) |
| 7817 | { |
| 7818 | int cpu_arch; |
| 7819 | |
| 7820 | cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
| 7821 | Tag_CPU_arch); |
| 7822 | |
| 7823 | if (globals->fix_arm1176) |
| 7824 | { |
| 7825 | if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) |
| 7826 | globals->use_blx = 1; |
| 7827 | } |
| 7828 | else |
| 7829 | { |
| 7830 | if (cpu_arch > TAG_CPU_ARCH_V4T) |
| 7831 | globals->use_blx = 1; |
| 7832 | } |
| 7833 | } |
| 7834 | |
| 7835 | bfd_boolean |
| 7836 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
| 7837 | struct bfd_link_info *link_info) |
| 7838 | { |
| 7839 | Elf_Internal_Shdr *symtab_hdr; |
| 7840 | Elf_Internal_Rela *internal_relocs = NULL; |
| 7841 | Elf_Internal_Rela *irel, *irelend; |
| 7842 | bfd_byte *contents = NULL; |
| 7843 | |
| 7844 | asection *sec; |
| 7845 | struct elf32_arm_link_hash_table *globals; |
| 7846 | |
| 7847 | /* If we are only performing a partial link do not bother |
| 7848 | to construct any glue. */ |
| 7849 | if (bfd_link_relocatable (link_info)) |
| 7850 | return TRUE; |
| 7851 | |
| 7852 | /* Here we have a bfd that is to be included on the link. We have a |
| 7853 | hook to do reloc rummaging, before section sizes are nailed down. */ |
| 7854 | globals = elf32_arm_hash_table (link_info); |
| 7855 | BFD_ASSERT (globals != NULL); |
| 7856 | |
| 7857 | check_use_blx (globals); |
| 7858 | |
| 7859 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
| 7860 | { |
| 7861 | _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"), |
| 7862 | abfd); |
| 7863 | return FALSE; |
| 7864 | } |
| 7865 | |
| 7866 | /* PR 5398: If we have not decided to include any loadable sections in |
| 7867 | the output then we will not have a glue owner bfd. This is OK, it |
| 7868 | just means that there is nothing else for us to do here. */ |
| 7869 | if (globals->bfd_of_glue_owner == NULL) |
| 7870 | return TRUE; |
| 7871 | |
| 7872 | /* Rummage around all the relocs and map the glue vectors. */ |
| 7873 | sec = abfd->sections; |
| 7874 | |
| 7875 | if (sec == NULL) |
| 7876 | return TRUE; |
| 7877 | |
| 7878 | for (; sec != NULL; sec = sec->next) |
| 7879 | { |
| 7880 | if (sec->reloc_count == 0) |
| 7881 | continue; |
| 7882 | |
| 7883 | if ((sec->flags & SEC_EXCLUDE) != 0) |
| 7884 | continue; |
| 7885 | |
| 7886 | symtab_hdr = & elf_symtab_hdr (abfd); |
| 7887 | |
| 7888 | /* Load the relocs. */ |
| 7889 | internal_relocs |
| 7890 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
| 7891 | |
| 7892 | if (internal_relocs == NULL) |
| 7893 | goto error_return; |
| 7894 | |
| 7895 | irelend = internal_relocs + sec->reloc_count; |
| 7896 | for (irel = internal_relocs; irel < irelend; irel++) |
| 7897 | { |
| 7898 | long r_type; |
| 7899 | unsigned long r_index; |
| 7900 | |
| 7901 | struct elf_link_hash_entry *h; |
| 7902 | |
| 7903 | r_type = ELF32_R_TYPE (irel->r_info); |
| 7904 | r_index = ELF32_R_SYM (irel->r_info); |
| 7905 | |
| 7906 | /* These are the only relocation types we care about. */ |
| 7907 | if ( r_type != R_ARM_PC24 |
| 7908 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
| 7909 | continue; |
| 7910 | |
| 7911 | /* Get the section contents if we haven't done so already. */ |
| 7912 | if (contents == NULL) |
| 7913 | { |
| 7914 | /* Get cached copy if it exists. */ |
| 7915 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
| 7916 | contents = elf_section_data (sec)->this_hdr.contents; |
| 7917 | else |
| 7918 | { |
| 7919 | /* Go get them off disk. */ |
| 7920 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
| 7921 | goto error_return; |
| 7922 | } |
| 7923 | } |
| 7924 | |
| 7925 | if (r_type == R_ARM_V4BX) |
| 7926 | { |
| 7927 | int reg; |
| 7928 | |
| 7929 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; |
| 7930 | record_arm_bx_glue (link_info, reg); |
| 7931 | continue; |
| 7932 | } |
| 7933 | |
| 7934 | /* If the relocation is not against a symbol it cannot concern us. */ |
| 7935 | h = NULL; |
| 7936 | |
| 7937 | /* We don't care about local symbols. */ |
| 7938 | if (r_index < symtab_hdr->sh_info) |
| 7939 | continue; |
| 7940 | |
| 7941 | /* This is an external symbol. */ |
| 7942 | r_index -= symtab_hdr->sh_info; |
| 7943 | h = (struct elf_link_hash_entry *) |
| 7944 | elf_sym_hashes (abfd)[r_index]; |
| 7945 | |
| 7946 | /* If the relocation is against a static symbol it must be within |
| 7947 | the current section and so cannot be a cross ARM/Thumb relocation. */ |
| 7948 | if (h == NULL) |
| 7949 | continue; |
| 7950 | |
| 7951 | /* If the call will go through a PLT entry then we do not need |
| 7952 | glue. */ |
| 7953 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
| 7954 | continue; |
| 7955 | |
| 7956 | switch (r_type) |
| 7957 | { |
| 7958 | case R_ARM_PC24: |
| 7959 | /* This one is a call from arm code. We need to look up |
| 7960 | the target of the call. If it is a thumb target, we |
| 7961 | insert glue. */ |
| 7962 | if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal) |
| 7963 | == ST_BRANCH_TO_THUMB) |
| 7964 | record_arm_to_thumb_glue (link_info, h); |
| 7965 | break; |
| 7966 | |
| 7967 | default: |
| 7968 | abort (); |
| 7969 | } |
| 7970 | } |
| 7971 | |
| 7972 | if (contents != NULL |
| 7973 | && elf_section_data (sec)->this_hdr.contents != contents) |
| 7974 | free (contents); |
| 7975 | contents = NULL; |
| 7976 | |
| 7977 | if (internal_relocs != NULL |
| 7978 | && elf_section_data (sec)->relocs != internal_relocs) |
| 7979 | free (internal_relocs); |
| 7980 | internal_relocs = NULL; |
| 7981 | } |
| 7982 | |
| 7983 | return TRUE; |
| 7984 | |
| 7985 | error_return: |
| 7986 | if (contents != NULL |
| 7987 | && elf_section_data (sec)->this_hdr.contents != contents) |
| 7988 | free (contents); |
| 7989 | if (internal_relocs != NULL |
| 7990 | && elf_section_data (sec)->relocs != internal_relocs) |
| 7991 | free (internal_relocs); |
| 7992 | |
| 7993 | return FALSE; |
| 7994 | } |
| 7995 | #endif |
| 7996 | |
| 7997 | |
| 7998 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
| 7999 | |
| 8000 | void |
| 8001 | bfd_elf32_arm_init_maps (bfd *abfd) |
| 8002 | { |
| 8003 | Elf_Internal_Sym *isymbuf; |
| 8004 | Elf_Internal_Shdr *hdr; |
| 8005 | unsigned int i, localsyms; |
| 8006 | |
| 8007 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
| 8008 | if (! is_arm_elf (abfd)) |
| 8009 | return; |
| 8010 | |
| 8011 | if ((abfd->flags & DYNAMIC) != 0) |
| 8012 | return; |
| 8013 | |
| 8014 | hdr = & elf_symtab_hdr (abfd); |
| 8015 | localsyms = hdr->sh_info; |
| 8016 | |
| 8017 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field |
| 8018 | should contain the number of local symbols, which should come before any |
| 8019 | global symbols. Mapping symbols are always local. */ |
| 8020 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, |
| 8021 | NULL); |
| 8022 | |
| 8023 | /* No internal symbols read? Skip this BFD. */ |
| 8024 | if (isymbuf == NULL) |
| 8025 | return; |
| 8026 | |
| 8027 | for (i = 0; i < localsyms; i++) |
| 8028 | { |
| 8029 | Elf_Internal_Sym *isym = &isymbuf[i]; |
| 8030 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
| 8031 | const char *name; |
| 8032 | |
| 8033 | if (sec != NULL |
| 8034 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) |
| 8035 | { |
| 8036 | name = bfd_elf_string_from_elf_section (abfd, |
| 8037 | hdr->sh_link, isym->st_name); |
| 8038 | |
| 8039 | if (bfd_is_arm_special_symbol_name (name, |
| 8040 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) |
| 8041 | elf32_arm_section_map_add (sec, name[1], isym->st_value); |
| 8042 | } |
| 8043 | } |
| 8044 | } |
| 8045 | |
| 8046 | |
| 8047 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
| 8048 | say what they wanted. */ |
| 8049 | |
| 8050 | void |
| 8051 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) |
| 8052 | { |
| 8053 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
| 8054 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
| 8055 | |
| 8056 | if (globals == NULL) |
| 8057 | return; |
| 8058 | |
| 8059 | if (globals->fix_cortex_a8 == -1) |
| 8060 | { |
| 8061 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ |
| 8062 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 |
| 8063 | && (out_attr[Tag_CPU_arch_profile].i == 'A' |
| 8064 | || out_attr[Tag_CPU_arch_profile].i == 0)) |
| 8065 | globals->fix_cortex_a8 = 1; |
| 8066 | else |
| 8067 | globals->fix_cortex_a8 = 0; |
| 8068 | } |
| 8069 | } |
| 8070 | |
| 8071 | |
| 8072 | void |
| 8073 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) |
| 8074 | { |
| 8075 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
| 8076 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
| 8077 | |
| 8078 | if (globals == NULL) |
| 8079 | return; |
| 8080 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
| 8081 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) |
| 8082 | { |
| 8083 | switch (globals->vfp11_fix) |
| 8084 | { |
| 8085 | case BFD_ARM_VFP11_FIX_DEFAULT: |
| 8086 | case BFD_ARM_VFP11_FIX_NONE: |
| 8087 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
| 8088 | break; |
| 8089 | |
| 8090 | default: |
| 8091 | /* Give a warning, but do as the user requests anyway. */ |
| 8092 | _bfd_error_handler (_("%pB: warning: selected VFP11 erratum " |
| 8093 | "workaround is not necessary for target architecture"), obfd); |
| 8094 | } |
| 8095 | } |
| 8096 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) |
| 8097 | /* For earlier architectures, we might need the workaround, but do not |
| 8098 | enable it by default. If users is running with broken hardware, they |
| 8099 | must enable the erratum fix explicitly. */ |
| 8100 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
| 8101 | } |
| 8102 | |
| 8103 | void |
| 8104 | bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info) |
| 8105 | { |
| 8106 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
| 8107 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
| 8108 | |
| 8109 | if (globals == NULL) |
| 8110 | return; |
| 8111 | |
| 8112 | /* We assume only Cortex-M4 may require the fix. */ |
| 8113 | if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M |
| 8114 | || out_attr[Tag_CPU_arch_profile].i != 'M') |
| 8115 | { |
| 8116 | if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE) |
| 8117 | /* Give a warning, but do as the user requests anyway. */ |
| 8118 | _bfd_error_handler |
| 8119 | (_("%pB: warning: selected STM32L4XX erratum " |
| 8120 | "workaround is not necessary for target architecture"), obfd); |
| 8121 | } |
| 8122 | } |
| 8123 | |
| 8124 | enum bfd_arm_vfp11_pipe |
| 8125 | { |
| 8126 | VFP11_FMAC, |
| 8127 | VFP11_LS, |
| 8128 | VFP11_DS, |
| 8129 | VFP11_BAD |
| 8130 | }; |
| 8131 | |
| 8132 | /* Return a VFP register number. This is encoded as RX:X for single-precision |
| 8133 | registers, or X:RX for double-precision registers, where RX is the group of |
| 8134 | four bits in the instruction encoding and X is the single extension bit. |
| 8135 | RX and X fields are specified using their lowest (starting) bit. The return |
| 8136 | value is: |
| 8137 | |
| 8138 | 0...31: single-precision registers s0...s31 |
| 8139 | 32...63: double-precision registers d0...d31. |
| 8140 | |
| 8141 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
| 8142 | encounter VFP3 instructions, so we allow the full range for DP registers. */ |
| 8143 | |
| 8144 | static unsigned int |
| 8145 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, |
| 8146 | unsigned int x) |
| 8147 | { |
| 8148 | if (is_double) |
| 8149 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; |
| 8150 | else |
| 8151 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); |
| 8152 | } |
| 8153 | |
| 8154 | /* Set bits in *WMASK according to a register number REG as encoded by |
| 8155 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ |
| 8156 | |
| 8157 | static void |
| 8158 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) |
| 8159 | { |
| 8160 | if (reg < 32) |
| 8161 | *wmask |= 1 << reg; |
| 8162 | else if (reg < 48) |
| 8163 | *wmask |= 3 << ((reg - 32) * 2); |
| 8164 | } |
| 8165 | |
| 8166 | /* Return TRUE if WMASK overwrites anything in REGS. */ |
| 8167 | |
| 8168 | static bfd_boolean |
| 8169 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) |
| 8170 | { |
| 8171 | int i; |
| 8172 | |
| 8173 | for (i = 0; i < numregs; i++) |
| 8174 | { |
| 8175 | unsigned int reg = regs[i]; |
| 8176 | |
| 8177 | if (reg < 32 && (wmask & (1 << reg)) != 0) |
| 8178 | return TRUE; |
| 8179 | |
| 8180 | reg -= 32; |
| 8181 | |
| 8182 | if (reg >= 16) |
| 8183 | continue; |
| 8184 | |
| 8185 | if ((wmask & (3 << (reg * 2))) != 0) |
| 8186 | return TRUE; |
| 8187 | } |
| 8188 | |
| 8189 | return FALSE; |
| 8190 | } |
| 8191 | |
| 8192 | /* In this function, we're interested in two things: finding input registers |
| 8193 | for VFP data-processing instructions, and finding the set of registers which |
| 8194 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to |
| 8195 | hold the written set, so FLDM etc. are easy to deal with (we're only |
| 8196 | interested in 32 SP registers or 16 dp registers, due to the VFP version |
| 8197 | implemented by the chip in question). DP registers are marked by setting |
| 8198 | both SP registers in the write mask). */ |
| 8199 | |
| 8200 | static enum bfd_arm_vfp11_pipe |
| 8201 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, |
| 8202 | int *numregs) |
| 8203 | { |
| 8204 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
| 8205 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
| 8206 | |
| 8207 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ |
| 8208 | { |
| 8209 | unsigned int pqrs; |
| 8210 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); |
| 8211 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); |
| 8212 | |
| 8213 | pqrs = ((insn & 0x00800000) >> 20) |
| 8214 | | ((insn & 0x00300000) >> 19) |
| 8215 | | ((insn & 0x00000040) >> 6); |
| 8216 | |
| 8217 | switch (pqrs) |
| 8218 | { |
| 8219 | case 0: /* fmac[sd]. */ |
| 8220 | case 1: /* fnmac[sd]. */ |
| 8221 | case 2: /* fmsc[sd]. */ |
| 8222 | case 3: /* fnmsc[sd]. */ |
| 8223 | vpipe = VFP11_FMAC; |
| 8224 | bfd_arm_vfp11_write_mask (destmask, fd); |
| 8225 | regs[0] = fd; |
| 8226 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ |
| 8227 | regs[2] = fm; |
| 8228 | *numregs = 3; |
| 8229 | break; |
| 8230 | |
| 8231 | case 4: /* fmul[sd]. */ |
| 8232 | case 5: /* fnmul[sd]. */ |
| 8233 | case 6: /* fadd[sd]. */ |
| 8234 | case 7: /* fsub[sd]. */ |
| 8235 | vpipe = VFP11_FMAC; |
| 8236 | goto vfp_binop; |
| 8237 | |
| 8238 | case 8: /* fdiv[sd]. */ |
| 8239 | vpipe = VFP11_DS; |
| 8240 | vfp_binop: |
| 8241 | bfd_arm_vfp11_write_mask (destmask, fd); |
| 8242 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ |
| 8243 | regs[1] = fm; |
| 8244 | *numregs = 2; |
| 8245 | break; |
| 8246 | |
| 8247 | case 15: /* extended opcode. */ |
| 8248 | { |
| 8249 | unsigned int extn = ((insn >> 15) & 0x1e) |
| 8250 | | ((insn >> 7) & 1); |
| 8251 | |
| 8252 | switch (extn) |
| 8253 | { |
| 8254 | case 0: /* fcpy[sd]. */ |
| 8255 | case 1: /* fabs[sd]. */ |
| 8256 | case 2: /* fneg[sd]. */ |
| 8257 | case 8: /* fcmp[sd]. */ |
| 8258 | case 9: /* fcmpe[sd]. */ |
| 8259 | case 10: /* fcmpz[sd]. */ |
| 8260 | case 11: /* fcmpez[sd]. */ |
| 8261 | case 16: /* fuito[sd]. */ |
| 8262 | case 17: /* fsito[sd]. */ |
| 8263 | case 24: /* ftoui[sd]. */ |
| 8264 | case 25: /* ftouiz[sd]. */ |
| 8265 | case 26: /* ftosi[sd]. */ |
| 8266 | case 27: /* ftosiz[sd]. */ |
| 8267 | /* These instructions will not bounce due to underflow. */ |
| 8268 | *numregs = 0; |
| 8269 | vpipe = VFP11_FMAC; |
| 8270 | break; |
| 8271 | |
| 8272 | case 3: /* fsqrt[sd]. */ |
| 8273 | /* fsqrt cannot underflow, but it can (perhaps) overwrite |
| 8274 | registers to cause the erratum in previous instructions. */ |
| 8275 | bfd_arm_vfp11_write_mask (destmask, fd); |
| 8276 | vpipe = VFP11_DS; |
| 8277 | break; |
| 8278 | |
| 8279 | case 15: /* fcvt{ds,sd}. */ |
| 8280 | { |
| 8281 | int rnum = 0; |
| 8282 | |
| 8283 | bfd_arm_vfp11_write_mask (destmask, fd); |
| 8284 | |
| 8285 | /* Only FCVTSD can underflow. */ |
| 8286 | if ((insn & 0x100) != 0) |
| 8287 | regs[rnum++] = fm; |
| 8288 | |
| 8289 | *numregs = rnum; |
| 8290 | |
| 8291 | vpipe = VFP11_FMAC; |
| 8292 | } |
| 8293 | break; |
| 8294 | |
| 8295 | default: |
| 8296 | return VFP11_BAD; |
| 8297 | } |
| 8298 | } |
| 8299 | break; |
| 8300 | |
| 8301 | default: |
| 8302 | return VFP11_BAD; |
| 8303 | } |
| 8304 | } |
| 8305 | /* Two-register transfer. */ |
| 8306 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) |
| 8307 | { |
| 8308 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); |
| 8309 | |
| 8310 | if ((insn & 0x100000) == 0) |
| 8311 | { |
| 8312 | if (is_double) |
| 8313 | bfd_arm_vfp11_write_mask (destmask, fm); |
| 8314 | else |
| 8315 | { |
| 8316 | bfd_arm_vfp11_write_mask (destmask, fm); |
| 8317 | bfd_arm_vfp11_write_mask (destmask, fm + 1); |
| 8318 | } |
| 8319 | } |
| 8320 | |
| 8321 | vpipe = VFP11_LS; |
| 8322 | } |
| 8323 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ |
| 8324 | { |
| 8325 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); |
| 8326 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); |
| 8327 | |
| 8328 | switch (puw) |
| 8329 | { |
| 8330 | case 0: /* Two-reg transfer. We should catch these above. */ |
| 8331 | abort (); |
| 8332 | |
| 8333 | case 2: /* fldm[sdx]. */ |
| 8334 | case 3: |
| 8335 | case 5: |
| 8336 | { |
| 8337 | unsigned int i, offset = insn & 0xff; |
| 8338 | |
| 8339 | if (is_double) |
| 8340 | offset >>= 1; |
| 8341 | |
| 8342 | for (i = fd; i < fd + offset; i++) |
| 8343 | bfd_arm_vfp11_write_mask (destmask, i); |
| 8344 | } |
| 8345 | break; |
| 8346 | |
| 8347 | case 4: /* fld[sd]. */ |
| 8348 | case 6: |
| 8349 | bfd_arm_vfp11_write_mask (destmask, fd); |
| 8350 | break; |
| 8351 | |
| 8352 | default: |
| 8353 | return VFP11_BAD; |
| 8354 | } |
| 8355 | |
| 8356 | vpipe = VFP11_LS; |
| 8357 | } |
| 8358 | /* Single-register transfer. Note L==0. */ |
| 8359 | else if ((insn & 0x0f100e10) == 0x0e000a10) |
| 8360 | { |
| 8361 | unsigned int opcode = (insn >> 21) & 7; |
| 8362 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); |
| 8363 | |
| 8364 | switch (opcode) |
| 8365 | { |
| 8366 | case 0: /* fmsr/fmdlr. */ |
| 8367 | case 1: /* fmdhr. */ |
| 8368 | /* Mark fmdhr and fmdlr as writing to the whole of the DP |
| 8369 | destination register. I don't know if this is exactly right, |
| 8370 | but it is the conservative choice. */ |
| 8371 | bfd_arm_vfp11_write_mask (destmask, fn); |
| 8372 | break; |
| 8373 | |
| 8374 | case 7: /* fmxr. */ |
| 8375 | break; |
| 8376 | } |
| 8377 | |
| 8378 | vpipe = VFP11_LS; |
| 8379 | } |
| 8380 | |
| 8381 | return vpipe; |
| 8382 | } |
| 8383 | |
| 8384 | |
| 8385 | static int elf32_arm_compare_mapping (const void * a, const void * b); |
| 8386 | |
| 8387 | |
| 8388 | /* Look for potentially-troublesome code sequences which might trigger the |
| 8389 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet |
| 8390 | (available from ARM) for details of the erratum. A short version is |
| 8391 | described in ld.texinfo. */ |
| 8392 | |
| 8393 | bfd_boolean |
| 8394 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) |
| 8395 | { |
| 8396 | asection *sec; |
| 8397 | bfd_byte *contents = NULL; |
| 8398 | int state = 0; |
| 8399 | int regs[3], numregs = 0; |
| 8400 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
| 8401 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); |
| 8402 | |
| 8403 | if (globals == NULL) |
| 8404 | return FALSE; |
| 8405 | |
| 8406 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
| 8407 | The states transition as follows: |
| 8408 | |
| 8409 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
| 8410 | A VFP FMAC-pipeline instruction has been seen. Fill |
| 8411 | regs[0]..regs[numregs-1] with its input operands. Remember this |
| 8412 | instruction in 'first_fmac'. |
| 8413 | |
| 8414 | 1 -> 2 |
| 8415 | Any instruction, except for a VFP instruction which overwrites |
| 8416 | regs[*]. |
| 8417 | |
| 8418 | 1 -> 3 [ -> 0 ] or |
| 8419 | 2 -> 3 [ -> 0 ] |
| 8420 | A VFP instruction has been seen which overwrites any of regs[*]. |
| 8421 | We must make a veneer! Reset state to 0 before examining next |
| 8422 | instruction. |
| 8423 | |
| 8424 | 2 -> 0 |
| 8425 | If we fail to match anything in state 2, reset to state 0 and reset |
| 8426 | the instruction pointer to the instruction after 'first_fmac'. |
| 8427 | |
| 8428 | If the VFP11 vector mode is in use, there must be at least two unrelated |
| 8429 | instructions between anti-dependent VFP11 instructions to properly avoid |
| 8430 | triggering the erratum, hence the use of the extra state 1. */ |
| 8431 | |
| 8432 | /* If we are only performing a partial link do not bother |
| 8433 | to construct any glue. */ |
| 8434 | if (bfd_link_relocatable (link_info)) |
| 8435 | return TRUE; |
| 8436 | |
| 8437 | /* Skip if this bfd does not correspond to an ELF image. */ |
| 8438 | if (! is_arm_elf (abfd)) |
| 8439 | return TRUE; |
| 8440 | |
| 8441 | /* We should have chosen a fix type by the time we get here. */ |
| 8442 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); |
| 8443 | |
| 8444 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) |
| 8445 | return TRUE; |
| 8446 | |
| 8447 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
| 8448 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) |
| 8449 | return TRUE; |
| 8450 | |
| 8451 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
| 8452 | { |
| 8453 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; |
| 8454 | struct _arm_elf_section_data *sec_data; |
| 8455 | |
| 8456 | /* If we don't have executable progbits, we're not interested in this |
| 8457 | section. Also skip if section is to be excluded. */ |
| 8458 | if (elf_section_type (sec) != SHT_PROGBITS |
| 8459 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 |
| 8460 | || (sec->flags & SEC_EXCLUDE) != 0 |
| 8461 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
| 8462 | || sec->output_section == bfd_abs_section_ptr |
| 8463 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
| 8464 | continue; |
| 8465 | |
| 8466 | sec_data = elf32_arm_section_data (sec); |
| 8467 | |
| 8468 | if (sec_data->mapcount == 0) |
| 8469 | continue; |
| 8470 | |
| 8471 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
| 8472 | contents = elf_section_data (sec)->this_hdr.contents; |
| 8473 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
| 8474 | goto error_return; |
| 8475 | |
| 8476 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), |
| 8477 | elf32_arm_compare_mapping); |
| 8478 | |
| 8479 | for (span = 0; span < sec_data->mapcount; span++) |
| 8480 | { |
| 8481 | unsigned int span_start = sec_data->map[span].vma; |
| 8482 | unsigned int span_end = (span == sec_data->mapcount - 1) |
| 8483 | ? sec->size : sec_data->map[span + 1].vma; |
| 8484 | char span_type = sec_data->map[span].type; |
| 8485 | |
| 8486 | /* FIXME: Only ARM mode is supported at present. We may need to |
| 8487 | support Thumb-2 mode also at some point. */ |
| 8488 | if (span_type != 'a') |
| 8489 | continue; |
| 8490 | |
| 8491 | for (i = span_start; i < span_end;) |
| 8492 | { |
| 8493 | unsigned int next_i = i + 4; |
| 8494 | unsigned int insn = bfd_big_endian (abfd) |
| 8495 | ? (contents[i] << 24) |
| 8496 | | (contents[i + 1] << 16) |
| 8497 | | (contents[i + 2] << 8) |
| 8498 | | contents[i + 3] |
| 8499 | : (contents[i + 3] << 24) |
| 8500 | | (contents[i + 2] << 16) |
| 8501 | | (contents[i + 1] << 8) |
| 8502 | | contents[i]; |
| 8503 | unsigned int writemask = 0; |
| 8504 | enum bfd_arm_vfp11_pipe vpipe; |
| 8505 | |
| 8506 | switch (state) |
| 8507 | { |
| 8508 | case 0: |
| 8509 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, |
| 8510 | &numregs); |
| 8511 | /* I'm assuming the VFP11 erratum can trigger with denorm |
| 8512 | operands on either the FMAC or the DS pipeline. This might |
| 8513 | lead to slightly overenthusiastic veneer insertion. */ |
| 8514 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) |
| 8515 | { |
| 8516 | state = use_vector ? 1 : 2; |
| 8517 | first_fmac = i; |
| 8518 | veneer_of_insn = insn; |
| 8519 | } |
| 8520 | break; |
| 8521 | |
| 8522 | case 1: |
| 8523 | { |
| 8524 | int other_regs[3], other_numregs; |
| 8525 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
| 8526 | other_regs, |
| 8527 | &other_numregs); |
| 8528 | if (vpipe != VFP11_BAD |
| 8529 | && bfd_arm_vfp11_antidependency (writemask, regs, |
| 8530 | numregs)) |
| 8531 | state = 3; |
| 8532 | else |
| 8533 | state = 2; |
| 8534 | } |
| 8535 | break; |
| 8536 | |
| 8537 | case 2: |
| 8538 | { |
| 8539 | int other_regs[3], other_numregs; |
| 8540 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
| 8541 | other_regs, |
| 8542 | &other_numregs); |
| 8543 | if (vpipe != VFP11_BAD |
| 8544 | && bfd_arm_vfp11_antidependency (writemask, regs, |
| 8545 | numregs)) |
| 8546 | state = 3; |
| 8547 | else |
| 8548 | { |
| 8549 | state = 0; |
| 8550 | next_i = first_fmac + 4; |
| 8551 | } |
| 8552 | } |
| 8553 | break; |
| 8554 | |
| 8555 | case 3: |
| 8556 | abort (); /* Should be unreachable. */ |
| 8557 | } |
| 8558 | |
| 8559 | if (state == 3) |
| 8560 | { |
| 8561 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) |
| 8562 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); |
| 8563 | |
| 8564 | elf32_arm_section_data (sec)->erratumcount += 1; |
| 8565 | |
| 8566 | newerr->u.b.vfp_insn = veneer_of_insn; |
| 8567 | |
| 8568 | switch (span_type) |
| 8569 | { |
| 8570 | case 'a': |
| 8571 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; |
| 8572 | break; |
| 8573 | |
| 8574 | default: |
| 8575 | abort (); |
| 8576 | } |
| 8577 | |
| 8578 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, |
| 8579 | first_fmac); |
| 8580 | |
| 8581 | newerr->vma = -1; |
| 8582 | |
| 8583 | newerr->next = sec_data->erratumlist; |
| 8584 | sec_data->erratumlist = newerr; |
| 8585 | |
| 8586 | state = 0; |
| 8587 | } |
| 8588 | |
| 8589 | i = next_i; |
| 8590 | } |
| 8591 | } |
| 8592 | |
| 8593 | if (contents != NULL |
| 8594 | && elf_section_data (sec)->this_hdr.contents != contents) |
| 8595 | free (contents); |
| 8596 | contents = NULL; |
| 8597 | } |
| 8598 | |
| 8599 | return TRUE; |
| 8600 | |
| 8601 | error_return: |
| 8602 | if (contents != NULL |
| 8603 | && elf_section_data (sec)->this_hdr.contents != contents) |
| 8604 | free (contents); |
| 8605 | |
| 8606 | return FALSE; |
| 8607 | } |
| 8608 | |
| 8609 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations |
| 8610 | after sections have been laid out, using specially-named symbols. */ |
| 8611 | |
| 8612 | void |
| 8613 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, |
| 8614 | struct bfd_link_info *link_info) |
| 8615 | { |
| 8616 | asection *sec; |
| 8617 | struct elf32_arm_link_hash_table *globals; |
| 8618 | char *tmp_name; |
| 8619 | |
| 8620 | if (bfd_link_relocatable (link_info)) |
| 8621 | return; |
| 8622 | |
| 8623 | /* Skip if this bfd does not correspond to an ELF image. */ |
| 8624 | if (! is_arm_elf (abfd)) |
| 8625 | return; |
| 8626 | |
| 8627 | globals = elf32_arm_hash_table (link_info); |
| 8628 | if (globals == NULL) |
| 8629 | return; |
| 8630 | |
| 8631 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
| 8632 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
| 8633 | |
| 8634 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
| 8635 | { |
| 8636 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); |
| 8637 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; |
| 8638 | |
| 8639 | for (; errnode != NULL; errnode = errnode->next) |
| 8640 | { |
| 8641 | struct elf_link_hash_entry *myh; |
| 8642 | bfd_vma vma; |
| 8643 | |
| 8644 | switch (errnode->type) |
| 8645 | { |
| 8646 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: |
| 8647 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: |
| 8648 | /* Find veneer symbol. */ |
| 8649 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
| 8650 | errnode->u.b.veneer->u.v.id); |
| 8651 | |
| 8652 | myh = elf_link_hash_lookup |
| 8653 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
| 8654 | |
| 8655 | if (myh == NULL) |
| 8656 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
| 8657 | abfd, "VFP11", tmp_name); |
| 8658 | |
| 8659 | vma = myh->root.u.def.section->output_section->vma |
| 8660 | + myh->root.u.def.section->output_offset |
| 8661 | + myh->root.u.def.value; |
| 8662 | |
| 8663 | errnode->u.b.veneer->vma = vma; |
| 8664 | break; |
| 8665 | |
| 8666 | case VFP11_ERRATUM_ARM_VENEER: |
| 8667 | case VFP11_ERRATUM_THUMB_VENEER: |
| 8668 | /* Find return location. */ |
| 8669 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", |
| 8670 | errnode->u.v.id); |
| 8671 | |
| 8672 | myh = elf_link_hash_lookup |
| 8673 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
| 8674 | |
| 8675 | if (myh == NULL) |
| 8676 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
| 8677 | abfd, "VFP11", tmp_name); |
| 8678 | |
| 8679 | vma = myh->root.u.def.section->output_section->vma |
| 8680 | + myh->root.u.def.section->output_offset |
| 8681 | + myh->root.u.def.value; |
| 8682 | |
| 8683 | errnode->u.v.branch->vma = vma; |
| 8684 | break; |
| 8685 | |
| 8686 | default: |
| 8687 | abort (); |
| 8688 | } |
| 8689 | } |
| 8690 | } |
| 8691 | |
| 8692 | free (tmp_name); |
| 8693 | } |
| 8694 | |
| 8695 | /* Find virtual-memory addresses for STM32L4XX erratum veneers and |
| 8696 | return locations after sections have been laid out, using |
| 8697 | specially-named symbols. */ |
| 8698 | |
| 8699 | void |
| 8700 | bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd, |
| 8701 | struct bfd_link_info *link_info) |
| 8702 | { |
| 8703 | asection *sec; |
| 8704 | struct elf32_arm_link_hash_table *globals; |
| 8705 | char *tmp_name; |
| 8706 | |
| 8707 | if (bfd_link_relocatable (link_info)) |
| 8708 | return; |
| 8709 | |
| 8710 | /* Skip if this bfd does not correspond to an ELF image. */ |
| 8711 | if (! is_arm_elf (abfd)) |
| 8712 | return; |
| 8713 | |
| 8714 | globals = elf32_arm_hash_table (link_info); |
| 8715 | if (globals == NULL) |
| 8716 | return; |
| 8717 | |
| 8718 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
| 8719 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); |
| 8720 | |
| 8721 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
| 8722 | { |
| 8723 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); |
| 8724 | elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist; |
| 8725 | |
| 8726 | for (; errnode != NULL; errnode = errnode->next) |
| 8727 | { |
| 8728 | struct elf_link_hash_entry *myh; |
| 8729 | bfd_vma vma; |
| 8730 | |
| 8731 | switch (errnode->type) |
| 8732 | { |
| 8733 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: |
| 8734 | /* Find veneer symbol. */ |
| 8735 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, |
| 8736 | errnode->u.b.veneer->u.v.id); |
| 8737 | |
| 8738 | myh = elf_link_hash_lookup |
| 8739 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
| 8740 | |
| 8741 | if (myh == NULL) |
| 8742 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
| 8743 | abfd, "STM32L4XX", tmp_name); |
| 8744 | |
| 8745 | vma = myh->root.u.def.section->output_section->vma |
| 8746 | + myh->root.u.def.section->output_offset |
| 8747 | + myh->root.u.def.value; |
| 8748 | |
| 8749 | errnode->u.b.veneer->vma = vma; |
| 8750 | break; |
| 8751 | |
| 8752 | case STM32L4XX_ERRATUM_VENEER: |
| 8753 | /* Find return location. */ |
| 8754 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", |
| 8755 | errnode->u.v.id); |
| 8756 | |
| 8757 | myh = elf_link_hash_lookup |
| 8758 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
| 8759 | |
| 8760 | if (myh == NULL) |
| 8761 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
| 8762 | abfd, "STM32L4XX", tmp_name); |
| 8763 | |
| 8764 | vma = myh->root.u.def.section->output_section->vma |
| 8765 | + myh->root.u.def.section->output_offset |
| 8766 | + myh->root.u.def.value; |
| 8767 | |
| 8768 | errnode->u.v.branch->vma = vma; |
| 8769 | break; |
| 8770 | |
| 8771 | default: |
| 8772 | abort (); |
| 8773 | } |
| 8774 | } |
| 8775 | } |
| 8776 | |
| 8777 | free (tmp_name); |
| 8778 | } |
| 8779 | |
| 8780 | static inline bfd_boolean |
| 8781 | is_thumb2_ldmia (const insn32 insn) |
| 8782 | { |
| 8783 | /* Encoding T2: LDM<c>.W <Rn>{!},<registers> |
| 8784 | 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */ |
| 8785 | return (insn & 0xffd02000) == 0xe8900000; |
| 8786 | } |
| 8787 | |
| 8788 | static inline bfd_boolean |
| 8789 | is_thumb2_ldmdb (const insn32 insn) |
| 8790 | { |
| 8791 | /* Encoding T1: LDMDB<c> <Rn>{!},<registers> |
| 8792 | 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */ |
| 8793 | return (insn & 0xffd02000) == 0xe9100000; |
| 8794 | } |
| 8795 | |
| 8796 | static inline bfd_boolean |
| 8797 | is_thumb2_vldm (const insn32 insn) |
| 8798 | { |
| 8799 | /* A6.5 Extension register load or store instruction |
| 8800 | A7.7.229 |
| 8801 | We look for SP 32-bit and DP 64-bit registers. |
| 8802 | Encoding T1 VLDM{mode}<c> <Rn>{!}, <list> |
| 8803 | <list> is consecutive 64-bit registers |
| 8804 | 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii |
| 8805 | Encoding T2 VLDM{mode}<c> <Rn>{!}, <list> |
| 8806 | <list> is consecutive 32-bit registers |
| 8807 | 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii |
| 8808 | if P==0 && U==1 && W==1 && Rn=1101 VPOP |
| 8809 | if PUW=010 || PUW=011 || PUW=101 VLDM. */ |
| 8810 | return |
| 8811 | (((insn & 0xfe100f00) == 0xec100b00) || |
| 8812 | ((insn & 0xfe100f00) == 0xec100a00)) |
| 8813 | && /* (IA without !). */ |
| 8814 | (((((insn << 7) >> 28) & 0xd) == 0x4) |
| 8815 | /* (IA with !), includes VPOP (when reg number is SP). */ |
| 8816 | || ((((insn << 7) >> 28) & 0xd) == 0x5) |
| 8817 | /* (DB with !). */ |
| 8818 | || ((((insn << 7) >> 28) & 0xd) == 0x9)); |
| 8819 | } |
| 8820 | |
| 8821 | /* STM STM32L4XX erratum : This function assumes that it receives an LDM or |
| 8822 | VLDM opcode and: |
| 8823 | - computes the number and the mode of memory accesses |
| 8824 | - decides if the replacement should be done: |
| 8825 | . replaces only if > 8-word accesses |
| 8826 | . or (testing purposes only) replaces all accesses. */ |
| 8827 | |
| 8828 | static bfd_boolean |
| 8829 | stm32l4xx_need_create_replacing_stub (const insn32 insn, |
| 8830 | bfd_arm_stm32l4xx_fix stm32l4xx_fix) |
| 8831 | { |
| 8832 | int nb_words = 0; |
| 8833 | |
| 8834 | /* The field encoding the register list is the same for both LDMIA |
| 8835 | and LDMDB encodings. */ |
| 8836 | if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn)) |
| 8837 | nb_words = elf32_arm_popcount (insn & 0x0000ffff); |
| 8838 | else if (is_thumb2_vldm (insn)) |
| 8839 | nb_words = (insn & 0xff); |
| 8840 | |
| 8841 | /* DEFAULT mode accounts for the real bug condition situation, |
| 8842 | ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ |
| 8843 | return |
| 8844 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 : |
| 8845 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE; |
| 8846 | } |
| 8847 | |
| 8848 | /* Look for potentially-troublesome code sequences which might trigger |
| 8849 | the STM STM32L4XX erratum. */ |
| 8850 | |
| 8851 | bfd_boolean |
| 8852 | bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd, |
| 8853 | struct bfd_link_info *link_info) |
| 8854 | { |
| 8855 | asection *sec; |
| 8856 | bfd_byte *contents = NULL; |
| 8857 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
| 8858 | |
| 8859 | if (globals == NULL) |
| 8860 | return FALSE; |
| 8861 | |
| 8862 | /* If we are only performing a partial link do not bother |
| 8863 | to construct any glue. */ |
| 8864 | if (bfd_link_relocatable (link_info)) |
| 8865 | return TRUE; |
| 8866 | |
| 8867 | /* Skip if this bfd does not correspond to an ELF image. */ |
| 8868 | if (! is_arm_elf (abfd)) |
| 8869 | return TRUE; |
| 8870 | |
| 8871 | if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE) |
| 8872 | return TRUE; |
| 8873 | |
| 8874 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
| 8875 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) |
| 8876 | return TRUE; |
| 8877 | |
| 8878 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
| 8879 | { |
| 8880 | unsigned int i, span; |
| 8881 | struct _arm_elf_section_data *sec_data; |
| 8882 | |
| 8883 | /* If we don't have executable progbits, we're not interested in this |
| 8884 | section. Also skip if section is to be excluded. */ |
| 8885 | if (elf_section_type (sec) != SHT_PROGBITS |
| 8886 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 |
| 8887 | || (sec->flags & SEC_EXCLUDE) != 0 |
| 8888 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
| 8889 | || sec->output_section == bfd_abs_section_ptr |
| 8890 | || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0) |
| 8891 | continue; |
| 8892 | |
| 8893 | sec_data = elf32_arm_section_data (sec); |
| 8894 | |
| 8895 | if (sec_data->mapcount == 0) |
| 8896 | continue; |
| 8897 | |
| 8898 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
| 8899 | contents = elf_section_data (sec)->this_hdr.contents; |
| 8900 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
| 8901 | goto error_return; |
| 8902 | |
| 8903 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), |
| 8904 | elf32_arm_compare_mapping); |
| 8905 | |
| 8906 | for (span = 0; span < sec_data->mapcount; span++) |
| 8907 | { |
| 8908 | unsigned int span_start = sec_data->map[span].vma; |
| 8909 | unsigned int span_end = (span == sec_data->mapcount - 1) |
| 8910 | ? sec->size : sec_data->map[span + 1].vma; |
| 8911 | char span_type = sec_data->map[span].type; |
| 8912 | int itblock_current_pos = 0; |
| 8913 | |
| 8914 | /* Only Thumb2 mode need be supported with this CM4 specific |
| 8915 | code, we should not encounter any arm mode eg span_type |
| 8916 | != 'a'. */ |
| 8917 | if (span_type != 't') |
| 8918 | continue; |
| 8919 | |
| 8920 | for (i = span_start; i < span_end;) |
| 8921 | { |
| 8922 | unsigned int insn = bfd_get_16 (abfd, &contents[i]); |
| 8923 | bfd_boolean insn_32bit = FALSE; |
| 8924 | bfd_boolean is_ldm = FALSE; |
| 8925 | bfd_boolean is_vldm = FALSE; |
| 8926 | bfd_boolean is_not_last_in_it_block = FALSE; |
| 8927 | |
| 8928 | /* The first 16-bits of all 32-bit thumb2 instructions start |
| 8929 | with opcode[15..13]=0b111 and the encoded op1 can be anything |
| 8930 | except opcode[12..11]!=0b00. |
| 8931 | See 32-bit Thumb instruction encoding. */ |
| 8932 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) |
| 8933 | insn_32bit = TRUE; |
| 8934 | |
| 8935 | /* Compute the predicate that tells if the instruction |
| 8936 | is concerned by the IT block |
| 8937 | - Creates an error if there is a ldm that is not |
| 8938 | last in the IT block thus cannot be replaced |
| 8939 | - Otherwise we can create a branch at the end of the |
| 8940 | IT block, it will be controlled naturally by IT |
| 8941 | with the proper pseudo-predicate |
| 8942 | - So the only interesting predicate is the one that |
| 8943 | tells that we are not on the last item of an IT |
| 8944 | block. */ |
| 8945 | if (itblock_current_pos != 0) |
| 8946 | is_not_last_in_it_block = !!--itblock_current_pos; |
| 8947 | |
| 8948 | if (insn_32bit) |
| 8949 | { |
| 8950 | /* Load the rest of the insn (in manual-friendly order). */ |
| 8951 | insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]); |
| 8952 | is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn); |
| 8953 | is_vldm = is_thumb2_vldm (insn); |
| 8954 | |
| 8955 | /* Veneers are created for (v)ldm depending on |
| 8956 | option flags and memory accesses conditions; but |
| 8957 | if the instruction is not the last instruction of |
| 8958 | an IT block, we cannot create a jump there, so we |
| 8959 | bail out. */ |
| 8960 | if ((is_ldm || is_vldm) |
| 8961 | && stm32l4xx_need_create_replacing_stub |
| 8962 | (insn, globals->stm32l4xx_fix)) |
| 8963 | { |
| 8964 | if (is_not_last_in_it_block) |
| 8965 | { |
| 8966 | _bfd_error_handler |
| 8967 | /* xgettext:c-format */ |
| 8968 | (_("%pB(%pA+%#x): error: multiple load detected" |
| 8969 | " in non-last IT block instruction:" |
| 8970 | " STM32L4XX veneer cannot be generated; " |
| 8971 | "use gcc option -mrestrict-it to generate" |
| 8972 | " only one instruction per IT block"), |
| 8973 | abfd, sec, i); |
| 8974 | } |
| 8975 | else |
| 8976 | { |
| 8977 | elf32_stm32l4xx_erratum_list *newerr = |
| 8978 | (elf32_stm32l4xx_erratum_list *) |
| 8979 | bfd_zmalloc |
| 8980 | (sizeof (elf32_stm32l4xx_erratum_list)); |
| 8981 | |
| 8982 | elf32_arm_section_data (sec) |
| 8983 | ->stm32l4xx_erratumcount += 1; |
| 8984 | newerr->u.b.insn = insn; |
| 8985 | /* We create only thumb branches. */ |
| 8986 | newerr->type = |
| 8987 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER; |
| 8988 | record_stm32l4xx_erratum_veneer |
| 8989 | (link_info, newerr, abfd, sec, |
| 8990 | i, |
| 8991 | is_ldm ? |
| 8992 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE: |
| 8993 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); |
| 8994 | newerr->vma = -1; |
| 8995 | newerr->next = sec_data->stm32l4xx_erratumlist; |
| 8996 | sec_data->stm32l4xx_erratumlist = newerr; |
| 8997 | } |
| 8998 | } |
| 8999 | } |
| 9000 | else |
| 9001 | { |
| 9002 | /* A7.7.37 IT p208 |
| 9003 | IT blocks are only encoded in T1 |
| 9004 | Encoding T1: IT{x{y{z}}} <firstcond> |
| 9005 | 1 0 1 1 - 1 1 1 1 - firstcond - mask |
| 9006 | if mask = '0000' then see 'related encodings' |
| 9007 | We don't deal with UNPREDICTABLE, just ignore these. |
| 9008 | There can be no nested IT blocks so an IT block |
| 9009 | is naturally a new one for which it is worth |
| 9010 | computing its size. */ |
| 9011 | bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) |
| 9012 | && ((insn & 0x000f) != 0x0000); |
| 9013 | /* If we have a new IT block we compute its size. */ |
| 9014 | if (is_newitblock) |
| 9015 | { |
| 9016 | /* Compute the number of instructions controlled |
| 9017 | by the IT block, it will be used to decide |
| 9018 | whether we are inside an IT block or not. */ |
| 9019 | unsigned int mask = insn & 0x000f; |
| 9020 | itblock_current_pos = 4 - ctz (mask); |
| 9021 | } |
| 9022 | } |
| 9023 | |
| 9024 | i += insn_32bit ? 4 : 2; |
| 9025 | } |
| 9026 | } |
| 9027 | |
| 9028 | if (contents != NULL |
| 9029 | && elf_section_data (sec)->this_hdr.contents != contents) |
| 9030 | free (contents); |
| 9031 | contents = NULL; |
| 9032 | } |
| 9033 | |
| 9034 | return TRUE; |
| 9035 | |
| 9036 | error_return: |
| 9037 | if (contents != NULL |
| 9038 | && elf_section_data (sec)->this_hdr.contents != contents) |
| 9039 | free (contents); |
| 9040 | |
| 9041 | return FALSE; |
| 9042 | } |
| 9043 | |
| 9044 | /* Set target relocation values needed during linking. */ |
| 9045 | |
| 9046 | void |
| 9047 | bfd_elf32_arm_set_target_params (struct bfd *output_bfd, |
| 9048 | struct bfd_link_info *link_info, |
| 9049 | struct elf32_arm_params *params) |
| 9050 | { |
| 9051 | struct elf32_arm_link_hash_table *globals; |
| 9052 | |
| 9053 | globals = elf32_arm_hash_table (link_info); |
| 9054 | if (globals == NULL) |
| 9055 | return; |
| 9056 | |
| 9057 | globals->target1_is_rel = params->target1_is_rel; |
| 9058 | if (globals->fdpic_p) |
| 9059 | globals->target2_reloc = R_ARM_GOT32; |
| 9060 | else if (strcmp (params->target2_type, "rel") == 0) |
| 9061 | globals->target2_reloc = R_ARM_REL32; |
| 9062 | else if (strcmp (params->target2_type, "abs") == 0) |
| 9063 | globals->target2_reloc = R_ARM_ABS32; |
| 9064 | else if (strcmp (params->target2_type, "got-rel") == 0) |
| 9065 | globals->target2_reloc = R_ARM_GOT_PREL; |
| 9066 | else |
| 9067 | { |
| 9068 | _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"), |
| 9069 | params->target2_type); |
| 9070 | } |
| 9071 | globals->fix_v4bx = params->fix_v4bx; |
| 9072 | globals->use_blx |= params->use_blx; |
| 9073 | globals->vfp11_fix = params->vfp11_denorm_fix; |
| 9074 | globals->stm32l4xx_fix = params->stm32l4xx_fix; |
| 9075 | if (globals->fdpic_p) |
| 9076 | globals->pic_veneer = 1; |
| 9077 | else |
| 9078 | globals->pic_veneer = params->pic_veneer; |
| 9079 | globals->fix_cortex_a8 = params->fix_cortex_a8; |
| 9080 | globals->fix_arm1176 = params->fix_arm1176; |
| 9081 | globals->cmse_implib = params->cmse_implib; |
| 9082 | globals->in_implib_bfd = params->in_implib_bfd; |
| 9083 | |
| 9084 | BFD_ASSERT (is_arm_elf (output_bfd)); |
| 9085 | elf_arm_tdata (output_bfd)->no_enum_size_warning |
| 9086 | = params->no_enum_size_warning; |
| 9087 | elf_arm_tdata (output_bfd)->no_wchar_size_warning |
| 9088 | = params->no_wchar_size_warning; |
| 9089 | } |
| 9090 | |
| 9091 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
| 9092 | |
| 9093 | static void |
| 9094 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) |
| 9095 | { |
| 9096 | bfd_vma upper; |
| 9097 | bfd_vma lower; |
| 9098 | int reloc_sign; |
| 9099 | |
| 9100 | BFD_ASSERT ((offset & 1) == 0); |
| 9101 | |
| 9102 | upper = bfd_get_16 (abfd, insn); |
| 9103 | lower = bfd_get_16 (abfd, insn + 2); |
| 9104 | reloc_sign = (offset < 0) ? 1 : 0; |
| 9105 | upper = (upper & ~(bfd_vma) 0x7ff) |
| 9106 | | ((offset >> 12) & 0x3ff) |
| 9107 | | (reloc_sign << 10); |
| 9108 | lower = (lower & ~(bfd_vma) 0x2fff) |
| 9109 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
| 9110 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) |
| 9111 | | ((offset >> 1) & 0x7ff); |
| 9112 | bfd_put_16 (abfd, upper, insn); |
| 9113 | bfd_put_16 (abfd, lower, insn + 2); |
| 9114 | } |
| 9115 | |
| 9116 | /* Thumb code calling an ARM function. */ |
| 9117 | |
| 9118 | static int |
| 9119 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
| 9120 | const char * name, |
| 9121 | bfd * input_bfd, |
| 9122 | bfd * output_bfd, |
| 9123 | asection * input_section, |
| 9124 | bfd_byte * hit_data, |
| 9125 | asection * sym_sec, |
| 9126 | bfd_vma offset, |
| 9127 | bfd_signed_vma addend, |
| 9128 | bfd_vma val, |
| 9129 | char **error_message) |
| 9130 | { |
| 9131 | asection * s = 0; |
| 9132 | bfd_vma my_offset; |
| 9133 | long int ret_offset; |
| 9134 | struct elf_link_hash_entry * myh; |
| 9135 | struct elf32_arm_link_hash_table * globals; |
| 9136 | |
| 9137 | myh = find_thumb_glue (info, name, error_message); |
| 9138 | if (myh == NULL) |
| 9139 | return FALSE; |
| 9140 | |
| 9141 | globals = elf32_arm_hash_table (info); |
| 9142 | BFD_ASSERT (globals != NULL); |
| 9143 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 9144 | |
| 9145 | my_offset = myh->root.u.def.value; |
| 9146 | |
| 9147 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
| 9148 | THUMB2ARM_GLUE_SECTION_NAME); |
| 9149 | |
| 9150 | BFD_ASSERT (s != NULL); |
| 9151 | BFD_ASSERT (s->contents != NULL); |
| 9152 | BFD_ASSERT (s->output_section != NULL); |
| 9153 | |
| 9154 | if ((my_offset & 0x01) == 0x01) |
| 9155 | { |
| 9156 | if (sym_sec != NULL |
| 9157 | && sym_sec->owner != NULL |
| 9158 | && !INTERWORK_FLAG (sym_sec->owner)) |
| 9159 | { |
| 9160 | _bfd_error_handler |
| 9161 | (_("%pB(%s): warning: interworking not enabled;" |
| 9162 | " first occurrence: %pB: %s call to %s"), |
| 9163 | sym_sec->owner, name, input_bfd, "Thumb", "ARM"); |
| 9164 | |
| 9165 | return FALSE; |
| 9166 | } |
| 9167 | |
| 9168 | --my_offset; |
| 9169 | myh->root.u.def.value = my_offset; |
| 9170 | |
| 9171 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
| 9172 | s->contents + my_offset); |
| 9173 | |
| 9174 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
| 9175 | s->contents + my_offset + 2); |
| 9176 | |
| 9177 | ret_offset = |
| 9178 | /* Address of destination of the stub. */ |
| 9179 | ((bfd_signed_vma) val) |
| 9180 | - ((bfd_signed_vma) |
| 9181 | /* Offset from the start of the current section |
| 9182 | to the start of the stubs. */ |
| 9183 | (s->output_offset |
| 9184 | /* Offset of the start of this stub from the start of the stubs. */ |
| 9185 | + my_offset |
| 9186 | /* Address of the start of the current section. */ |
| 9187 | + s->output_section->vma) |
| 9188 | /* The branch instruction is 4 bytes into the stub. */ |
| 9189 | + 4 |
| 9190 | /* ARM branches work from the pc of the instruction + 8. */ |
| 9191 | + 8); |
| 9192 | |
| 9193 | put_arm_insn (globals, output_bfd, |
| 9194 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), |
| 9195 | s->contents + my_offset + 4); |
| 9196 | } |
| 9197 | |
| 9198 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); |
| 9199 | |
| 9200 | /* Now go back and fix up the original BL insn to point to here. */ |
| 9201 | ret_offset = |
| 9202 | /* Address of where the stub is located. */ |
| 9203 | (s->output_section->vma + s->output_offset + my_offset) |
| 9204 | /* Address of where the BL is located. */ |
| 9205 | - (input_section->output_section->vma + input_section->output_offset |
| 9206 | + offset) |
| 9207 | /* Addend in the relocation. */ |
| 9208 | - addend |
| 9209 | /* Biassing for PC-relative addressing. */ |
| 9210 | - 8; |
| 9211 | |
| 9212 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
| 9213 | |
| 9214 | return TRUE; |
| 9215 | } |
| 9216 | |
| 9217 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
| 9218 | |
| 9219 | static struct elf_link_hash_entry * |
| 9220 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, |
| 9221 | const char * name, |
| 9222 | bfd * input_bfd, |
| 9223 | bfd * output_bfd, |
| 9224 | asection * sym_sec, |
| 9225 | bfd_vma val, |
| 9226 | asection * s, |
| 9227 | char ** error_message) |
| 9228 | { |
| 9229 | bfd_vma my_offset; |
| 9230 | long int ret_offset; |
| 9231 | struct elf_link_hash_entry * myh; |
| 9232 | struct elf32_arm_link_hash_table * globals; |
| 9233 | |
| 9234 | myh = find_arm_glue (info, name, error_message); |
| 9235 | if (myh == NULL) |
| 9236 | return NULL; |
| 9237 | |
| 9238 | globals = elf32_arm_hash_table (info); |
| 9239 | BFD_ASSERT (globals != NULL); |
| 9240 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 9241 | |
| 9242 | my_offset = myh->root.u.def.value; |
| 9243 | |
| 9244 | if ((my_offset & 0x01) == 0x01) |
| 9245 | { |
| 9246 | if (sym_sec != NULL |
| 9247 | && sym_sec->owner != NULL |
| 9248 | && !INTERWORK_FLAG (sym_sec->owner)) |
| 9249 | { |
| 9250 | _bfd_error_handler |
| 9251 | (_("%pB(%s): warning: interworking not enabled;" |
| 9252 | " first occurrence: %pB: %s call to %s"), |
| 9253 | sym_sec->owner, name, input_bfd, "ARM", "Thumb"); |
| 9254 | } |
| 9255 | |
| 9256 | --my_offset; |
| 9257 | myh->root.u.def.value = my_offset; |
| 9258 | |
| 9259 | if (bfd_link_pic (info) |
| 9260 | || globals->root.is_relocatable_executable |
| 9261 | || globals->pic_veneer) |
| 9262 | { |
| 9263 | /* For relocatable objects we can't use absolute addresses, |
| 9264 | so construct the address from a relative offset. */ |
| 9265 | /* TODO: If the offset is small it's probably worth |
| 9266 | constructing the address with adds. */ |
| 9267 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
| 9268 | s->contents + my_offset); |
| 9269 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, |
| 9270 | s->contents + my_offset + 4); |
| 9271 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, |
| 9272 | s->contents + my_offset + 8); |
| 9273 | /* Adjust the offset by 4 for the position of the add, |
| 9274 | and 8 for the pipeline offset. */ |
| 9275 | ret_offset = (val - (s->output_offset |
| 9276 | + s->output_section->vma |
| 9277 | + my_offset + 12)) |
| 9278 | | 1; |
| 9279 | bfd_put_32 (output_bfd, ret_offset, |
| 9280 | s->contents + my_offset + 12); |
| 9281 | } |
| 9282 | else if (globals->use_blx) |
| 9283 | { |
| 9284 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, |
| 9285 | s->contents + my_offset); |
| 9286 | |
| 9287 | /* It's a thumb address. Add the low order bit. */ |
| 9288 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, |
| 9289 | s->contents + my_offset + 4); |
| 9290 | } |
| 9291 | else |
| 9292 | { |
| 9293 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
| 9294 | s->contents + my_offset); |
| 9295 | |
| 9296 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
| 9297 | s->contents + my_offset + 4); |
| 9298 | |
| 9299 | /* It's a thumb address. Add the low order bit. */ |
| 9300 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, |
| 9301 | s->contents + my_offset + 8); |
| 9302 | |
| 9303 | my_offset += 12; |
| 9304 | } |
| 9305 | } |
| 9306 | |
| 9307 | BFD_ASSERT (my_offset <= globals->arm_glue_size); |
| 9308 | |
| 9309 | return myh; |
| 9310 | } |
| 9311 | |
| 9312 | /* Arm code calling a Thumb function. */ |
| 9313 | |
| 9314 | static int |
| 9315 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, |
| 9316 | const char * name, |
| 9317 | bfd * input_bfd, |
| 9318 | bfd * output_bfd, |
| 9319 | asection * input_section, |
| 9320 | bfd_byte * hit_data, |
| 9321 | asection * sym_sec, |
| 9322 | bfd_vma offset, |
| 9323 | bfd_signed_vma addend, |
| 9324 | bfd_vma val, |
| 9325 | char **error_message) |
| 9326 | { |
| 9327 | unsigned long int tmp; |
| 9328 | bfd_vma my_offset; |
| 9329 | asection * s; |
| 9330 | long int ret_offset; |
| 9331 | struct elf_link_hash_entry * myh; |
| 9332 | struct elf32_arm_link_hash_table * globals; |
| 9333 | |
| 9334 | globals = elf32_arm_hash_table (info); |
| 9335 | BFD_ASSERT (globals != NULL); |
| 9336 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 9337 | |
| 9338 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
| 9339 | ARM2THUMB_GLUE_SECTION_NAME); |
| 9340 | BFD_ASSERT (s != NULL); |
| 9341 | BFD_ASSERT (s->contents != NULL); |
| 9342 | BFD_ASSERT (s->output_section != NULL); |
| 9343 | |
| 9344 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, |
| 9345 | sym_sec, val, s, error_message); |
| 9346 | if (!myh) |
| 9347 | return FALSE; |
| 9348 | |
| 9349 | my_offset = myh->root.u.def.value; |
| 9350 | tmp = bfd_get_32 (input_bfd, hit_data); |
| 9351 | tmp = tmp & 0xFF000000; |
| 9352 | |
| 9353 | /* Somehow these are both 4 too far, so subtract 8. */ |
| 9354 | ret_offset = (s->output_offset |
| 9355 | + my_offset |
| 9356 | + s->output_section->vma |
| 9357 | - (input_section->output_offset |
| 9358 | + input_section->output_section->vma |
| 9359 | + offset + addend) |
| 9360 | - 8); |
| 9361 | |
| 9362 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
| 9363 | |
| 9364 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
| 9365 | |
| 9366 | return TRUE; |
| 9367 | } |
| 9368 | |
| 9369 | /* Populate Arm stub for an exported Thumb function. */ |
| 9370 | |
| 9371 | static bfd_boolean |
| 9372 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) |
| 9373 | { |
| 9374 | struct bfd_link_info * info = (struct bfd_link_info *) inf; |
| 9375 | asection * s; |
| 9376 | struct elf_link_hash_entry * myh; |
| 9377 | struct elf32_arm_link_hash_entry *eh; |
| 9378 | struct elf32_arm_link_hash_table * globals; |
| 9379 | asection *sec; |
| 9380 | bfd_vma val; |
| 9381 | char *error_message; |
| 9382 | |
| 9383 | eh = elf32_arm_hash_entry (h); |
| 9384 | /* Allocate stubs for exported Thumb functions on v4t. */ |
| 9385 | if (eh->export_glue == NULL) |
| 9386 | return TRUE; |
| 9387 | |
| 9388 | globals = elf32_arm_hash_table (info); |
| 9389 | BFD_ASSERT (globals != NULL); |
| 9390 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 9391 | |
| 9392 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
| 9393 | ARM2THUMB_GLUE_SECTION_NAME); |
| 9394 | BFD_ASSERT (s != NULL); |
| 9395 | BFD_ASSERT (s->contents != NULL); |
| 9396 | BFD_ASSERT (s->output_section != NULL); |
| 9397 | |
| 9398 | sec = eh->export_glue->root.u.def.section; |
| 9399 | |
| 9400 | BFD_ASSERT (sec->output_section != NULL); |
| 9401 | |
| 9402 | val = eh->export_glue->root.u.def.value + sec->output_offset |
| 9403 | + sec->output_section->vma; |
| 9404 | |
| 9405 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
| 9406 | h->root.u.def.section->owner, |
| 9407 | globals->obfd, sec, val, s, |
| 9408 | &error_message); |
| 9409 | BFD_ASSERT (myh); |
| 9410 | return TRUE; |
| 9411 | } |
| 9412 | |
| 9413 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
| 9414 | |
| 9415 | static bfd_vma |
| 9416 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) |
| 9417 | { |
| 9418 | bfd_byte *p; |
| 9419 | bfd_vma glue_addr; |
| 9420 | asection *s; |
| 9421 | struct elf32_arm_link_hash_table *globals; |
| 9422 | |
| 9423 | globals = elf32_arm_hash_table (info); |
| 9424 | BFD_ASSERT (globals != NULL); |
| 9425 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); |
| 9426 | |
| 9427 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
| 9428 | ARM_BX_GLUE_SECTION_NAME); |
| 9429 | BFD_ASSERT (s != NULL); |
| 9430 | BFD_ASSERT (s->contents != NULL); |
| 9431 | BFD_ASSERT (s->output_section != NULL); |
| 9432 | |
| 9433 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); |
| 9434 | |
| 9435 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; |
| 9436 | |
| 9437 | if ((globals->bx_glue_offset[reg] & 1) == 0) |
| 9438 | { |
| 9439 | p = s->contents + glue_addr; |
| 9440 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); |
| 9441 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); |
| 9442 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); |
| 9443 | globals->bx_glue_offset[reg] |= 1; |
| 9444 | } |
| 9445 | |
| 9446 | return glue_addr + s->output_section->vma + s->output_offset; |
| 9447 | } |
| 9448 | |
| 9449 | /* Generate Arm stubs for exported Thumb symbols. */ |
| 9450 | static void |
| 9451 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
| 9452 | struct bfd_link_info *link_info) |
| 9453 | { |
| 9454 | struct elf32_arm_link_hash_table * globals; |
| 9455 | |
| 9456 | if (link_info == NULL) |
| 9457 | /* Ignore this if we are not called by the ELF backend linker. */ |
| 9458 | return; |
| 9459 | |
| 9460 | globals = elf32_arm_hash_table (link_info); |
| 9461 | if (globals == NULL) |
| 9462 | return; |
| 9463 | |
| 9464 | /* If blx is available then exported Thumb symbols are OK and there is |
| 9465 | nothing to do. */ |
| 9466 | if (globals->use_blx) |
| 9467 | return; |
| 9468 | |
| 9469 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, |
| 9470 | link_info); |
| 9471 | } |
| 9472 | |
| 9473 | /* Reserve space for COUNT dynamic relocations in relocation selection |
| 9474 | SRELOC. */ |
| 9475 | |
| 9476 | static void |
| 9477 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, |
| 9478 | bfd_size_type count) |
| 9479 | { |
| 9480 | struct elf32_arm_link_hash_table *htab; |
| 9481 | |
| 9482 | htab = elf32_arm_hash_table (info); |
| 9483 | BFD_ASSERT (htab->root.dynamic_sections_created); |
| 9484 | if (sreloc == NULL) |
| 9485 | abort (); |
| 9486 | sreloc->size += RELOC_SIZE (htab) * count; |
| 9487 | } |
| 9488 | |
| 9489 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
| 9490 | dynamic, the relocations should go in SRELOC, otherwise they should |
| 9491 | go in the special .rel.iplt section. */ |
| 9492 | |
| 9493 | static void |
| 9494 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, |
| 9495 | bfd_size_type count) |
| 9496 | { |
| 9497 | struct elf32_arm_link_hash_table *htab; |
| 9498 | |
| 9499 | htab = elf32_arm_hash_table (info); |
| 9500 | if (!htab->root.dynamic_sections_created) |
| 9501 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; |
| 9502 | else |
| 9503 | { |
| 9504 | BFD_ASSERT (sreloc != NULL); |
| 9505 | sreloc->size += RELOC_SIZE (htab) * count; |
| 9506 | } |
| 9507 | } |
| 9508 | |
| 9509 | /* Add relocation REL to the end of relocation section SRELOC. */ |
| 9510 | |
| 9511 | static void |
| 9512 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, |
| 9513 | asection *sreloc, Elf_Internal_Rela *rel) |
| 9514 | { |
| 9515 | bfd_byte *loc; |
| 9516 | struct elf32_arm_link_hash_table *htab; |
| 9517 | |
| 9518 | htab = elf32_arm_hash_table (info); |
| 9519 | if (!htab->root.dynamic_sections_created |
| 9520 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) |
| 9521 | sreloc = htab->root.irelplt; |
| 9522 | if (sreloc == NULL) |
| 9523 | abort (); |
| 9524 | loc = sreloc->contents; |
| 9525 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); |
| 9526 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) |
| 9527 | abort (); |
| 9528 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); |
| 9529 | } |
| 9530 | |
| 9531 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
| 9532 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than |
| 9533 | to .plt. */ |
| 9534 | |
| 9535 | static void |
| 9536 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, |
| 9537 | bfd_boolean is_iplt_entry, |
| 9538 | union gotplt_union *root_plt, |
| 9539 | struct arm_plt_info *arm_plt) |
| 9540 | { |
| 9541 | struct elf32_arm_link_hash_table *htab; |
| 9542 | asection *splt; |
| 9543 | asection *sgotplt; |
| 9544 | |
| 9545 | htab = elf32_arm_hash_table (info); |
| 9546 | |
| 9547 | if (is_iplt_entry) |
| 9548 | { |
| 9549 | splt = htab->root.iplt; |
| 9550 | sgotplt = htab->root.igotplt; |
| 9551 | |
| 9552 | /* NaCl uses a special first entry in .iplt too. */ |
| 9553 | if (htab->nacl_p && splt->size == 0) |
| 9554 | splt->size += htab->plt_header_size; |
| 9555 | |
| 9556 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ |
| 9557 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); |
| 9558 | } |
| 9559 | else |
| 9560 | { |
| 9561 | splt = htab->root.splt; |
| 9562 | sgotplt = htab->root.sgotplt; |
| 9563 | |
| 9564 | if (htab->fdpic_p) |
| 9565 | { |
| 9566 | /* Allocate room for R_ARM_FUNCDESC_VALUE. */ |
| 9567 | /* For lazy binding, relocations will be put into .rel.plt, in |
| 9568 | .rel.got otherwise. */ |
| 9569 | /* FIXME: today we don't support lazy binding so put it in .rel.got */ |
| 9570 | if (info->flags & DF_BIND_NOW) |
| 9571 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 9572 | else |
| 9573 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
| 9574 | } |
| 9575 | else |
| 9576 | { |
| 9577 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ |
| 9578 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
| 9579 | } |
| 9580 | |
| 9581 | /* If this is the first .plt entry, make room for the special |
| 9582 | first entry. */ |
| 9583 | if (splt->size == 0) |
| 9584 | splt->size += htab->plt_header_size; |
| 9585 | |
| 9586 | htab->next_tls_desc_index++; |
| 9587 | } |
| 9588 | |
| 9589 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ |
| 9590 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
| 9591 | splt->size += PLT_THUMB_STUB_SIZE; |
| 9592 | root_plt->offset = splt->size; |
| 9593 | splt->size += htab->plt_entry_size; |
| 9594 | |
| 9595 | if (!htab->symbian_p) |
| 9596 | { |
| 9597 | /* We also need to make an entry in the .got.plt section, which |
| 9598 | will be placed in the .got section by the linker script. */ |
| 9599 | if (is_iplt_entry) |
| 9600 | arm_plt->got_offset = sgotplt->size; |
| 9601 | else |
| 9602 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; |
| 9603 | if (htab->fdpic_p) |
| 9604 | /* Function descriptor takes 64 bits in GOT. */ |
| 9605 | sgotplt->size += 8; |
| 9606 | else |
| 9607 | sgotplt->size += 4; |
| 9608 | } |
| 9609 | } |
| 9610 | |
| 9611 | static bfd_vma |
| 9612 | arm_movw_immediate (bfd_vma value) |
| 9613 | { |
| 9614 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); |
| 9615 | } |
| 9616 | |
| 9617 | static bfd_vma |
| 9618 | arm_movt_immediate (bfd_vma value) |
| 9619 | { |
| 9620 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); |
| 9621 | } |
| 9622 | |
| 9623 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, |
| 9624 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). |
| 9625 | Otherwise, DYNINDX is the index of the symbol in the dynamic |
| 9626 | symbol table and SYM_VALUE is undefined. |
| 9627 | |
| 9628 | ROOT_PLT points to the offset of the PLT entry from the start of its |
| 9629 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific |
| 9630 | bookkeeping information. |
| 9631 | |
| 9632 | Returns FALSE if there was a problem. */ |
| 9633 | |
| 9634 | static bfd_boolean |
| 9635 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, |
| 9636 | union gotplt_union *root_plt, |
| 9637 | struct arm_plt_info *arm_plt, |
| 9638 | int dynindx, bfd_vma sym_value) |
| 9639 | { |
| 9640 | struct elf32_arm_link_hash_table *htab; |
| 9641 | asection *sgot; |
| 9642 | asection *splt; |
| 9643 | asection *srel; |
| 9644 | bfd_byte *loc; |
| 9645 | bfd_vma plt_index; |
| 9646 | Elf_Internal_Rela rel; |
| 9647 | bfd_vma plt_header_size; |
| 9648 | bfd_vma got_header_size; |
| 9649 | |
| 9650 | htab = elf32_arm_hash_table (info); |
| 9651 | |
| 9652 | /* Pick the appropriate sections and sizes. */ |
| 9653 | if (dynindx == -1) |
| 9654 | { |
| 9655 | splt = htab->root.iplt; |
| 9656 | sgot = htab->root.igotplt; |
| 9657 | srel = htab->root.irelplt; |
| 9658 | |
| 9659 | /* There are no reserved entries in .igot.plt, and no special |
| 9660 | first entry in .iplt. */ |
| 9661 | got_header_size = 0; |
| 9662 | plt_header_size = 0; |
| 9663 | } |
| 9664 | else |
| 9665 | { |
| 9666 | splt = htab->root.splt; |
| 9667 | sgot = htab->root.sgotplt; |
| 9668 | srel = htab->root.srelplt; |
| 9669 | |
| 9670 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; |
| 9671 | plt_header_size = htab->plt_header_size; |
| 9672 | } |
| 9673 | BFD_ASSERT (splt != NULL && srel != NULL); |
| 9674 | |
| 9675 | /* Fill in the entry in the procedure linkage table. */ |
| 9676 | if (htab->symbian_p) |
| 9677 | { |
| 9678 | BFD_ASSERT (dynindx >= 0); |
| 9679 | put_arm_insn (htab, output_bfd, |
| 9680 | elf32_arm_symbian_plt_entry[0], |
| 9681 | splt->contents + root_plt->offset); |
| 9682 | bfd_put_32 (output_bfd, |
| 9683 | elf32_arm_symbian_plt_entry[1], |
| 9684 | splt->contents + root_plt->offset + 4); |
| 9685 | |
| 9686 | /* Fill in the entry in the .rel.plt section. */ |
| 9687 | rel.r_offset = (splt->output_section->vma |
| 9688 | + splt->output_offset |
| 9689 | + root_plt->offset + 4); |
| 9690 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT); |
| 9691 | |
| 9692 | /* Get the index in the procedure linkage table which |
| 9693 | corresponds to this symbol. This is the index of this symbol |
| 9694 | in all the symbols for which we are making plt entries. The |
| 9695 | first entry in the procedure linkage table is reserved. */ |
| 9696 | plt_index = ((root_plt->offset - plt_header_size) |
| 9697 | / htab->plt_entry_size); |
| 9698 | } |
| 9699 | else |
| 9700 | { |
| 9701 | bfd_vma got_offset, got_address, plt_address; |
| 9702 | bfd_vma got_displacement, initial_got_entry; |
| 9703 | bfd_byte * ptr; |
| 9704 | |
| 9705 | BFD_ASSERT (sgot != NULL); |
| 9706 | |
| 9707 | /* Get the offset into the .(i)got.plt table of the entry that |
| 9708 | corresponds to this function. */ |
| 9709 | got_offset = (arm_plt->got_offset & -2); |
| 9710 | |
| 9711 | /* Get the index in the procedure linkage table which |
| 9712 | corresponds to this symbol. This is the index of this symbol |
| 9713 | in all the symbols for which we are making plt entries. |
| 9714 | After the reserved .got.plt entries, all symbols appear in |
| 9715 | the same order as in .plt. */ |
| 9716 | if (htab->fdpic_p) |
| 9717 | /* Function descriptor takes 8 bytes. */ |
| 9718 | plt_index = (got_offset - got_header_size) / 8; |
| 9719 | else |
| 9720 | plt_index = (got_offset - got_header_size) / 4; |
| 9721 | |
| 9722 | /* Calculate the address of the GOT entry. */ |
| 9723 | got_address = (sgot->output_section->vma |
| 9724 | + sgot->output_offset |
| 9725 | + got_offset); |
| 9726 | |
| 9727 | /* ...and the address of the PLT entry. */ |
| 9728 | plt_address = (splt->output_section->vma |
| 9729 | + splt->output_offset |
| 9730 | + root_plt->offset); |
| 9731 | |
| 9732 | ptr = splt->contents + root_plt->offset; |
| 9733 | if (htab->vxworks_p && bfd_link_pic (info)) |
| 9734 | { |
| 9735 | unsigned int i; |
| 9736 | bfd_vma val; |
| 9737 | |
| 9738 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) |
| 9739 | { |
| 9740 | val = elf32_arm_vxworks_shared_plt_entry[i]; |
| 9741 | if (i == 2) |
| 9742 | val |= got_address - sgot->output_section->vma; |
| 9743 | if (i == 5) |
| 9744 | val |= plt_index * RELOC_SIZE (htab); |
| 9745 | if (i == 2 || i == 5) |
| 9746 | bfd_put_32 (output_bfd, val, ptr); |
| 9747 | else |
| 9748 | put_arm_insn (htab, output_bfd, val, ptr); |
| 9749 | } |
| 9750 | } |
| 9751 | else if (htab->vxworks_p) |
| 9752 | { |
| 9753 | unsigned int i; |
| 9754 | bfd_vma val; |
| 9755 | |
| 9756 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) |
| 9757 | { |
| 9758 | val = elf32_arm_vxworks_exec_plt_entry[i]; |
| 9759 | if (i == 2) |
| 9760 | val |= got_address; |
| 9761 | if (i == 4) |
| 9762 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); |
| 9763 | if (i == 5) |
| 9764 | val |= plt_index * RELOC_SIZE (htab); |
| 9765 | if (i == 2 || i == 5) |
| 9766 | bfd_put_32 (output_bfd, val, ptr); |
| 9767 | else |
| 9768 | put_arm_insn (htab, output_bfd, val, ptr); |
| 9769 | } |
| 9770 | |
| 9771 | loc = (htab->srelplt2->contents |
| 9772 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); |
| 9773 | |
| 9774 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation |
| 9775 | referencing the GOT for this PLT entry. */ |
| 9776 | rel.r_offset = plt_address + 8; |
| 9777 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); |
| 9778 | rel.r_addend = got_offset; |
| 9779 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); |
| 9780 | loc += RELOC_SIZE (htab); |
| 9781 | |
| 9782 | /* Create the R_ARM_ABS32 relocation referencing the |
| 9783 | beginning of the PLT for this GOT entry. */ |
| 9784 | rel.r_offset = got_address; |
| 9785 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); |
| 9786 | rel.r_addend = 0; |
| 9787 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); |
| 9788 | } |
| 9789 | else if (htab->nacl_p) |
| 9790 | { |
| 9791 | /* Calculate the displacement between the PLT slot and the |
| 9792 | common tail that's part of the special initial PLT slot. */ |
| 9793 | int32_t tail_displacement |
| 9794 | = ((splt->output_section->vma + splt->output_offset |
| 9795 | + ARM_NACL_PLT_TAIL_OFFSET) |
| 9796 | - (plt_address + htab->plt_entry_size + 4)); |
| 9797 | BFD_ASSERT ((tail_displacement & 3) == 0); |
| 9798 | tail_displacement >>= 2; |
| 9799 | |
| 9800 | BFD_ASSERT ((tail_displacement & 0xff000000) == 0 |
| 9801 | || (-tail_displacement & 0xff000000) == 0); |
| 9802 | |
| 9803 | /* Calculate the displacement between the PLT slot and the entry |
| 9804 | in the GOT. The offset accounts for the value produced by |
| 9805 | adding to pc in the penultimate instruction of the PLT stub. */ |
| 9806 | got_displacement = (got_address |
| 9807 | - (plt_address + htab->plt_entry_size)); |
| 9808 | |
| 9809 | /* NaCl does not support interworking at all. */ |
| 9810 | BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)); |
| 9811 | |
| 9812 | put_arm_insn (htab, output_bfd, |
| 9813 | elf32_arm_nacl_plt_entry[0] |
| 9814 | | arm_movw_immediate (got_displacement), |
| 9815 | ptr + 0); |
| 9816 | put_arm_insn (htab, output_bfd, |
| 9817 | elf32_arm_nacl_plt_entry[1] |
| 9818 | | arm_movt_immediate (got_displacement), |
| 9819 | ptr + 4); |
| 9820 | put_arm_insn (htab, output_bfd, |
| 9821 | elf32_arm_nacl_plt_entry[2], |
| 9822 | ptr + 8); |
| 9823 | put_arm_insn (htab, output_bfd, |
| 9824 | elf32_arm_nacl_plt_entry[3] |
| 9825 | | (tail_displacement & 0x00ffffff), |
| 9826 | ptr + 12); |
| 9827 | } |
| 9828 | else if (htab->fdpic_p) |
| 9829 | { |
| 9830 | const bfd_vma *plt_entry = using_thumb_only(htab) |
| 9831 | ? elf32_arm_fdpic_thumb_plt_entry |
| 9832 | : elf32_arm_fdpic_plt_entry; |
| 9833 | |
| 9834 | /* Fill-up Thumb stub if needed. */ |
| 9835 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
| 9836 | { |
| 9837 | put_thumb_insn (htab, output_bfd, |
| 9838 | elf32_arm_plt_thumb_stub[0], ptr - 4); |
| 9839 | put_thumb_insn (htab, output_bfd, |
| 9840 | elf32_arm_plt_thumb_stub[1], ptr - 2); |
| 9841 | } |
| 9842 | /* As we are using 32 bit instructions even for the Thumb |
| 9843 | version, we have to use 'put_arm_insn' instead of |
| 9844 | 'put_thumb_insn'. */ |
| 9845 | put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0); |
| 9846 | put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4); |
| 9847 | put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8); |
| 9848 | put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12); |
| 9849 | bfd_put_32 (output_bfd, got_offset, ptr + 16); |
| 9850 | |
| 9851 | if (!(info->flags & DF_BIND_NOW)) |
| 9852 | { |
| 9853 | /* funcdesc_value_reloc_offset. */ |
| 9854 | bfd_put_32 (output_bfd, |
| 9855 | htab->root.srelplt->reloc_count * RELOC_SIZE (htab), |
| 9856 | ptr + 20); |
| 9857 | put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24); |
| 9858 | put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28); |
| 9859 | put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32); |
| 9860 | put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36); |
| 9861 | } |
| 9862 | } |
| 9863 | else if (using_thumb_only (htab)) |
| 9864 | { |
| 9865 | /* PR ld/16017: Generate thumb only PLT entries. */ |
| 9866 | if (!using_thumb2 (htab)) |
| 9867 | { |
| 9868 | /* FIXME: We ought to be able to generate thumb-1 PLT |
| 9869 | instructions... */ |
| 9870 | _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"), |
| 9871 | output_bfd); |
| 9872 | return FALSE; |
| 9873 | } |
| 9874 | |
| 9875 | /* Calculate the displacement between the PLT slot and the entry in |
| 9876 | the GOT. The 12-byte offset accounts for the value produced by |
| 9877 | adding to pc in the 3rd instruction of the PLT stub. */ |
| 9878 | got_displacement = got_address - (plt_address + 12); |
| 9879 | |
| 9880 | /* As we are using 32 bit instructions we have to use 'put_arm_insn' |
| 9881 | instead of 'put_thumb_insn'. */ |
| 9882 | put_arm_insn (htab, output_bfd, |
| 9883 | elf32_thumb2_plt_entry[0] |
| 9884 | | ((got_displacement & 0x000000ff) << 16) |
| 9885 | | ((got_displacement & 0x00000700) << 20) |
| 9886 | | ((got_displacement & 0x00000800) >> 1) |
| 9887 | | ((got_displacement & 0x0000f000) >> 12), |
| 9888 | ptr + 0); |
| 9889 | put_arm_insn (htab, output_bfd, |
| 9890 | elf32_thumb2_plt_entry[1] |
| 9891 | | ((got_displacement & 0x00ff0000) ) |
| 9892 | | ((got_displacement & 0x07000000) << 4) |
| 9893 | | ((got_displacement & 0x08000000) >> 17) |
| 9894 | | ((got_displacement & 0xf0000000) >> 28), |
| 9895 | ptr + 4); |
| 9896 | put_arm_insn (htab, output_bfd, |
| 9897 | elf32_thumb2_plt_entry[2], |
| 9898 | ptr + 8); |
| 9899 | put_arm_insn (htab, output_bfd, |
| 9900 | elf32_thumb2_plt_entry[3], |
| 9901 | ptr + 12); |
| 9902 | } |
| 9903 | else |
| 9904 | { |
| 9905 | /* Calculate the displacement between the PLT slot and the |
| 9906 | entry in the GOT. The eight-byte offset accounts for the |
| 9907 | value produced by adding to pc in the first instruction |
| 9908 | of the PLT stub. */ |
| 9909 | got_displacement = got_address - (plt_address + 8); |
| 9910 | |
| 9911 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
| 9912 | { |
| 9913 | put_thumb_insn (htab, output_bfd, |
| 9914 | elf32_arm_plt_thumb_stub[0], ptr - 4); |
| 9915 | put_thumb_insn (htab, output_bfd, |
| 9916 | elf32_arm_plt_thumb_stub[1], ptr - 2); |
| 9917 | } |
| 9918 | |
| 9919 | if (!elf32_arm_use_long_plt_entry) |
| 9920 | { |
| 9921 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); |
| 9922 | |
| 9923 | put_arm_insn (htab, output_bfd, |
| 9924 | elf32_arm_plt_entry_short[0] |
| 9925 | | ((got_displacement & 0x0ff00000) >> 20), |
| 9926 | ptr + 0); |
| 9927 | put_arm_insn (htab, output_bfd, |
| 9928 | elf32_arm_plt_entry_short[1] |
| 9929 | | ((got_displacement & 0x000ff000) >> 12), |
| 9930 | ptr+ 4); |
| 9931 | put_arm_insn (htab, output_bfd, |
| 9932 | elf32_arm_plt_entry_short[2] |
| 9933 | | (got_displacement & 0x00000fff), |
| 9934 | ptr + 8); |
| 9935 | #ifdef FOUR_WORD_PLT |
| 9936 | bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12); |
| 9937 | #endif |
| 9938 | } |
| 9939 | else |
| 9940 | { |
| 9941 | put_arm_insn (htab, output_bfd, |
| 9942 | elf32_arm_plt_entry_long[0] |
| 9943 | | ((got_displacement & 0xf0000000) >> 28), |
| 9944 | ptr + 0); |
| 9945 | put_arm_insn (htab, output_bfd, |
| 9946 | elf32_arm_plt_entry_long[1] |
| 9947 | | ((got_displacement & 0x0ff00000) >> 20), |
| 9948 | ptr + 4); |
| 9949 | put_arm_insn (htab, output_bfd, |
| 9950 | elf32_arm_plt_entry_long[2] |
| 9951 | | ((got_displacement & 0x000ff000) >> 12), |
| 9952 | ptr+ 8); |
| 9953 | put_arm_insn (htab, output_bfd, |
| 9954 | elf32_arm_plt_entry_long[3] |
| 9955 | | (got_displacement & 0x00000fff), |
| 9956 | ptr + 12); |
| 9957 | } |
| 9958 | } |
| 9959 | |
| 9960 | /* Fill in the entry in the .rel(a).(i)plt section. */ |
| 9961 | rel.r_offset = got_address; |
| 9962 | rel.r_addend = 0; |
| 9963 | if (dynindx == -1) |
| 9964 | { |
| 9965 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. |
| 9966 | The dynamic linker or static executable then calls SYM_VALUE |
| 9967 | to determine the correct run-time value of the .igot.plt entry. */ |
| 9968 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
| 9969 | initial_got_entry = sym_value; |
| 9970 | } |
| 9971 | else |
| 9972 | { |
| 9973 | /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE |
| 9974 | used by PLT entry. */ |
| 9975 | if (htab->fdpic_p) |
| 9976 | { |
| 9977 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE); |
| 9978 | initial_got_entry = 0; |
| 9979 | } |
| 9980 | else |
| 9981 | { |
| 9982 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); |
| 9983 | initial_got_entry = (splt->output_section->vma |
| 9984 | + splt->output_offset); |
| 9985 | } |
| 9986 | } |
| 9987 | |
| 9988 | /* Fill in the entry in the global offset table. */ |
| 9989 | bfd_put_32 (output_bfd, initial_got_entry, |
| 9990 | sgot->contents + got_offset); |
| 9991 | |
| 9992 | if (htab->fdpic_p && !(info->flags & DF_BIND_NOW)) |
| 9993 | { |
| 9994 | /* Setup initial funcdesc value. */ |
| 9995 | /* FIXME: we don't support lazy binding because there is a |
| 9996 | race condition between both words getting written and |
| 9997 | some other thread attempting to read them. The ARM |
| 9998 | architecture does not have an atomic 64 bit load/store |
| 9999 | instruction that could be used to prevent it; it is |
| 10000 | recommended that threaded FDPIC applications run with the |
| 10001 | LD_BIND_NOW environment variable set. */ |
| 10002 | bfd_put_32(output_bfd, plt_address + 0x18, |
| 10003 | sgot->contents + got_offset); |
| 10004 | bfd_put_32(output_bfd, -1 /*TODO*/, |
| 10005 | sgot->contents + got_offset + 4); |
| 10006 | } |
| 10007 | } |
| 10008 | |
| 10009 | if (dynindx == -1) |
| 10010 | elf32_arm_add_dynreloc (output_bfd, info, srel, &rel); |
| 10011 | else |
| 10012 | { |
| 10013 | if (htab->fdpic_p) |
| 10014 | { |
| 10015 | /* For FDPIC we put PLT relocationss into .rel.got when not |
| 10016 | lazy binding otherwise we put them in .rel.plt. For now, |
| 10017 | we don't support lazy binding so put it in .rel.got. */ |
| 10018 | if (info->flags & DF_BIND_NOW) |
| 10019 | elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel); |
| 10020 | else |
| 10021 | elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel); |
| 10022 | } |
| 10023 | else |
| 10024 | { |
| 10025 | loc = srel->contents + plt_index * RELOC_SIZE (htab); |
| 10026 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); |
| 10027 | } |
| 10028 | } |
| 10029 | |
| 10030 | return TRUE; |
| 10031 | } |
| 10032 | |
| 10033 | /* Some relocations map to different relocations depending on the |
| 10034 | target. Return the real relocation. */ |
| 10035 | |
| 10036 | static int |
| 10037 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, |
| 10038 | int r_type) |
| 10039 | { |
| 10040 | switch (r_type) |
| 10041 | { |
| 10042 | case R_ARM_TARGET1: |
| 10043 | if (globals->target1_is_rel) |
| 10044 | return R_ARM_REL32; |
| 10045 | else |
| 10046 | return R_ARM_ABS32; |
| 10047 | |
| 10048 | case R_ARM_TARGET2: |
| 10049 | return globals->target2_reloc; |
| 10050 | |
| 10051 | default: |
| 10052 | return r_type; |
| 10053 | } |
| 10054 | } |
| 10055 | |
| 10056 | /* Return the base VMA address which should be subtracted from real addresses |
| 10057 | when resolving @dtpoff relocation. |
| 10058 | This is PT_TLS segment p_vaddr. */ |
| 10059 | |
| 10060 | static bfd_vma |
| 10061 | dtpoff_base (struct bfd_link_info *info) |
| 10062 | { |
| 10063 | /* If tls_sec is NULL, we should have signalled an error already. */ |
| 10064 | if (elf_hash_table (info)->tls_sec == NULL) |
| 10065 | return 0; |
| 10066 | return elf_hash_table (info)->tls_sec->vma; |
| 10067 | } |
| 10068 | |
| 10069 | /* Return the relocation value for @tpoff relocation |
| 10070 | if STT_TLS virtual address is ADDRESS. */ |
| 10071 | |
| 10072 | static bfd_vma |
| 10073 | tpoff (struct bfd_link_info *info, bfd_vma address) |
| 10074 | { |
| 10075 | struct elf_link_hash_table *htab = elf_hash_table (info); |
| 10076 | bfd_vma base; |
| 10077 | |
| 10078 | /* If tls_sec is NULL, we should have signalled an error already. */ |
| 10079 | if (htab->tls_sec == NULL) |
| 10080 | return 0; |
| 10081 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); |
| 10082 | return address - htab->tls_sec->vma + base; |
| 10083 | } |
| 10084 | |
| 10085 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
| 10086 | VALUE is the relocation value. */ |
| 10087 | |
| 10088 | static bfd_reloc_status_type |
| 10089 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) |
| 10090 | { |
| 10091 | if (value > 0xfff) |
| 10092 | return bfd_reloc_overflow; |
| 10093 | |
| 10094 | value |= bfd_get_32 (abfd, data) & 0xfffff000; |
| 10095 | bfd_put_32 (abfd, value, data); |
| 10096 | return bfd_reloc_ok; |
| 10097 | } |
| 10098 | |
| 10099 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
| 10100 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or |
| 10101 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. |
| 10102 | |
| 10103 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller |
| 10104 | is to then call final_link_relocate. Return other values in the |
| 10105 | case of error. |
| 10106 | |
| 10107 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing |
| 10108 | the pre-relaxed code. It would be nice if the relocs were updated |
| 10109 | to match the optimization. */ |
| 10110 | |
| 10111 | static bfd_reloc_status_type |
| 10112 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, |
| 10113 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, |
| 10114 | Elf_Internal_Rela *rel, unsigned long is_local) |
| 10115 | { |
| 10116 | unsigned long insn; |
| 10117 | |
| 10118 | switch (ELF32_R_TYPE (rel->r_info)) |
| 10119 | { |
| 10120 | default: |
| 10121 | return bfd_reloc_notsupported; |
| 10122 | |
| 10123 | case R_ARM_TLS_GOTDESC: |
| 10124 | if (is_local) |
| 10125 | insn = 0; |
| 10126 | else |
| 10127 | { |
| 10128 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); |
| 10129 | if (insn & 1) |
| 10130 | insn -= 5; /* THUMB */ |
| 10131 | else |
| 10132 | insn -= 8; /* ARM */ |
| 10133 | } |
| 10134 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); |
| 10135 | return bfd_reloc_continue; |
| 10136 | |
| 10137 | case R_ARM_THM_TLS_DESCSEQ: |
| 10138 | /* Thumb insn. */ |
| 10139 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); |
| 10140 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ |
| 10141 | { |
| 10142 | if (is_local) |
| 10143 | /* nop */ |
| 10144 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); |
| 10145 | } |
| 10146 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ |
| 10147 | { |
| 10148 | if (is_local) |
| 10149 | /* nop */ |
| 10150 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); |
| 10151 | else |
| 10152 | /* ldr rx,[ry] */ |
| 10153 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); |
| 10154 | } |
| 10155 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ |
| 10156 | { |
| 10157 | if (is_local) |
| 10158 | /* nop */ |
| 10159 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); |
| 10160 | else |
| 10161 | /* mov r0, rx */ |
| 10162 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), |
| 10163 | contents + rel->r_offset); |
| 10164 | } |
| 10165 | else |
| 10166 | { |
| 10167 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) |
| 10168 | /* It's a 32 bit instruction, fetch the rest of it for |
| 10169 | error generation. */ |
| 10170 | insn = (insn << 16) |
| 10171 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); |
| 10172 | _bfd_error_handler |
| 10173 | /* xgettext:c-format */ |
| 10174 | (_("%pB(%pA+%#" PRIx64 "): " |
| 10175 | "unexpected %s instruction '%#lx' in TLS trampoline"), |
| 10176 | input_bfd, input_sec, (uint64_t) rel->r_offset, |
| 10177 | "Thumb", insn); |
| 10178 | return bfd_reloc_notsupported; |
| 10179 | } |
| 10180 | break; |
| 10181 | |
| 10182 | case R_ARM_TLS_DESCSEQ: |
| 10183 | /* arm insn. */ |
| 10184 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); |
| 10185 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ |
| 10186 | { |
| 10187 | if (is_local) |
| 10188 | /* mov rx, ry */ |
| 10189 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), |
| 10190 | contents + rel->r_offset); |
| 10191 | } |
| 10192 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ |
| 10193 | { |
| 10194 | if (is_local) |
| 10195 | /* nop */ |
| 10196 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); |
| 10197 | else |
| 10198 | /* ldr rx,[ry] */ |
| 10199 | bfd_put_32 (input_bfd, insn & 0xfffff000, |
| 10200 | contents + rel->r_offset); |
| 10201 | } |
| 10202 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ |
| 10203 | { |
| 10204 | if (is_local) |
| 10205 | /* nop */ |
| 10206 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); |
| 10207 | else |
| 10208 | /* mov r0, rx */ |
| 10209 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), |
| 10210 | contents + rel->r_offset); |
| 10211 | } |
| 10212 | else |
| 10213 | { |
| 10214 | _bfd_error_handler |
| 10215 | /* xgettext:c-format */ |
| 10216 | (_("%pB(%pA+%#" PRIx64 "): " |
| 10217 | "unexpected %s instruction '%#lx' in TLS trampoline"), |
| 10218 | input_bfd, input_sec, (uint64_t) rel->r_offset, |
| 10219 | "ARM", insn); |
| 10220 | return bfd_reloc_notsupported; |
| 10221 | } |
| 10222 | break; |
| 10223 | |
| 10224 | case R_ARM_TLS_CALL: |
| 10225 | /* GD->IE relaxation, turn the instruction into 'nop' or |
| 10226 | 'ldr r0, [pc,r0]' */ |
| 10227 | insn = is_local ? 0xe1a00000 : 0xe79f0000; |
| 10228 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); |
| 10229 | break; |
| 10230 | |
| 10231 | case R_ARM_THM_TLS_CALL: |
| 10232 | /* GD->IE relaxation. */ |
| 10233 | if (!is_local) |
| 10234 | /* add r0,pc; ldr r0, [r0] */ |
| 10235 | insn = 0x44786800; |
| 10236 | else if (using_thumb2 (globals)) |
| 10237 | /* nop.w */ |
| 10238 | insn = 0xf3af8000; |
| 10239 | else |
| 10240 | /* nop; nop */ |
| 10241 | insn = 0xbf00bf00; |
| 10242 | |
| 10243 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); |
| 10244 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); |
| 10245 | break; |
| 10246 | } |
| 10247 | return bfd_reloc_ok; |
| 10248 | } |
| 10249 | |
| 10250 | /* For a given value of n, calculate the value of G_n as required to |
| 10251 | deal with group relocations. We return it in the form of an |
| 10252 | encoded constant-and-rotation, together with the final residual. If n is |
| 10253 | specified as less than zero, then final_residual is filled with the |
| 10254 | input value and no further action is performed. */ |
| 10255 | |
| 10256 | static bfd_vma |
| 10257 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) |
| 10258 | { |
| 10259 | int current_n; |
| 10260 | bfd_vma g_n; |
| 10261 | bfd_vma encoded_g_n = 0; |
| 10262 | bfd_vma residual = value; /* Also known as Y_n. */ |
| 10263 | |
| 10264 | for (current_n = 0; current_n <= n; current_n++) |
| 10265 | { |
| 10266 | int shift; |
| 10267 | |
| 10268 | /* Calculate which part of the value to mask. */ |
| 10269 | if (residual == 0) |
| 10270 | shift = 0; |
| 10271 | else |
| 10272 | { |
| 10273 | int msb; |
| 10274 | |
| 10275 | /* Determine the most significant bit in the residual and |
| 10276 | align the resulting value to a 2-bit boundary. */ |
| 10277 | for (msb = 30; msb >= 0; msb -= 2) |
| 10278 | if (residual & (3 << msb)) |
| 10279 | break; |
| 10280 | |
| 10281 | /* The desired shift is now (msb - 6), or zero, whichever |
| 10282 | is the greater. */ |
| 10283 | shift = msb - 6; |
| 10284 | if (shift < 0) |
| 10285 | shift = 0; |
| 10286 | } |
| 10287 | |
| 10288 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ |
| 10289 | g_n = residual & (0xff << shift); |
| 10290 | encoded_g_n = (g_n >> shift) |
| 10291 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); |
| 10292 | |
| 10293 | /* Calculate the residual for the next time around. */ |
| 10294 | residual &= ~g_n; |
| 10295 | } |
| 10296 | |
| 10297 | *final_residual = residual; |
| 10298 | |
| 10299 | return encoded_g_n; |
| 10300 | } |
| 10301 | |
| 10302 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. |
| 10303 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ |
| 10304 | |
| 10305 | static int |
| 10306 | identify_add_or_sub (bfd_vma insn) |
| 10307 | { |
| 10308 | int opcode = insn & 0x1e00000; |
| 10309 | |
| 10310 | if (opcode == 1 << 23) /* ADD */ |
| 10311 | return 1; |
| 10312 | |
| 10313 | if (opcode == 1 << 22) /* SUB */ |
| 10314 | return -1; |
| 10315 | |
| 10316 | return 0; |
| 10317 | } |
| 10318 | |
| 10319 | /* Perform a relocation as part of a final link. */ |
| 10320 | |
| 10321 | static bfd_reloc_status_type |
| 10322 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
| 10323 | bfd * input_bfd, |
| 10324 | bfd * output_bfd, |
| 10325 | asection * input_section, |
| 10326 | bfd_byte * contents, |
| 10327 | Elf_Internal_Rela * rel, |
| 10328 | bfd_vma value, |
| 10329 | struct bfd_link_info * info, |
| 10330 | asection * sym_sec, |
| 10331 | const char * sym_name, |
| 10332 | unsigned char st_type, |
| 10333 | enum arm_st_branch_type branch_type, |
| 10334 | struct elf_link_hash_entry * h, |
| 10335 | bfd_boolean * unresolved_reloc_p, |
| 10336 | char ** error_message) |
| 10337 | { |
| 10338 | unsigned long r_type = howto->type; |
| 10339 | unsigned long r_symndx; |
| 10340 | bfd_byte * hit_data = contents + rel->r_offset; |
| 10341 | bfd_vma * local_got_offsets; |
| 10342 | bfd_vma * local_tlsdesc_gotents; |
| 10343 | asection * sgot; |
| 10344 | asection * splt; |
| 10345 | asection * sreloc = NULL; |
| 10346 | asection * srelgot; |
| 10347 | bfd_vma addend; |
| 10348 | bfd_signed_vma signed_addend; |
| 10349 | unsigned char dynreloc_st_type; |
| 10350 | bfd_vma dynreloc_value; |
| 10351 | struct elf32_arm_link_hash_table * globals; |
| 10352 | struct elf32_arm_link_hash_entry *eh; |
| 10353 | union gotplt_union *root_plt; |
| 10354 | struct arm_plt_info *arm_plt; |
| 10355 | bfd_vma plt_offset; |
| 10356 | bfd_vma gotplt_offset; |
| 10357 | bfd_boolean has_iplt_entry; |
| 10358 | bfd_boolean resolved_to_zero; |
| 10359 | |
| 10360 | globals = elf32_arm_hash_table (info); |
| 10361 | if (globals == NULL) |
| 10362 | return bfd_reloc_notsupported; |
| 10363 | |
| 10364 | BFD_ASSERT (is_arm_elf (input_bfd)); |
| 10365 | BFD_ASSERT (howto != NULL); |
| 10366 | |
| 10367 | /* Some relocation types map to different relocations depending on the |
| 10368 | target. We pick the right one here. */ |
| 10369 | r_type = arm_real_reloc_type (globals, r_type); |
| 10370 | |
| 10371 | /* It is possible to have linker relaxations on some TLS access |
| 10372 | models. Update our information here. */ |
| 10373 | r_type = elf32_arm_tls_transition (info, r_type, h); |
| 10374 | |
| 10375 | if (r_type != howto->type) |
| 10376 | howto = elf32_arm_howto_from_type (r_type); |
| 10377 | |
| 10378 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 10379 | sgot = globals->root.sgot; |
| 10380 | local_got_offsets = elf_local_got_offsets (input_bfd); |
| 10381 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
| 10382 | |
| 10383 | if (globals->root.dynamic_sections_created) |
| 10384 | srelgot = globals->root.srelgot; |
| 10385 | else |
| 10386 | srelgot = NULL; |
| 10387 | |
| 10388 | r_symndx = ELF32_R_SYM (rel->r_info); |
| 10389 | |
| 10390 | if (globals->use_rel) |
| 10391 | { |
| 10392 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
| 10393 | |
| 10394 | if (addend & ((howto->src_mask + 1) >> 1)) |
| 10395 | { |
| 10396 | signed_addend = -1; |
| 10397 | signed_addend &= ~ howto->src_mask; |
| 10398 | signed_addend |= addend; |
| 10399 | } |
| 10400 | else |
| 10401 | signed_addend = addend; |
| 10402 | } |
| 10403 | else |
| 10404 | addend = signed_addend = rel->r_addend; |
| 10405 | |
| 10406 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
| 10407 | are resolving a function call relocation. */ |
| 10408 | if (using_thumb_only (globals) |
| 10409 | && (r_type == R_ARM_THM_CALL |
| 10410 | || r_type == R_ARM_THM_JUMP24) |
| 10411 | && branch_type == ST_BRANCH_TO_ARM) |
| 10412 | branch_type = ST_BRANCH_TO_THUMB; |
| 10413 | |
| 10414 | /* Record the symbol information that should be used in dynamic |
| 10415 | relocations. */ |
| 10416 | dynreloc_st_type = st_type; |
| 10417 | dynreloc_value = value; |
| 10418 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10419 | dynreloc_value |= 1; |
| 10420 | |
| 10421 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and |
| 10422 | VALUE appropriately for relocations that we resolve at link time. */ |
| 10423 | has_iplt_entry = FALSE; |
| 10424 | if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt, |
| 10425 | &arm_plt) |
| 10426 | && root_plt->offset != (bfd_vma) -1) |
| 10427 | { |
| 10428 | plt_offset = root_plt->offset; |
| 10429 | gotplt_offset = arm_plt->got_offset; |
| 10430 | |
| 10431 | if (h == NULL || eh->is_iplt) |
| 10432 | { |
| 10433 | has_iplt_entry = TRUE; |
| 10434 | splt = globals->root.iplt; |
| 10435 | |
| 10436 | /* Populate .iplt entries here, because not all of them will |
| 10437 | be seen by finish_dynamic_symbol. The lower bit is set if |
| 10438 | we have already populated the entry. */ |
| 10439 | if (plt_offset & 1) |
| 10440 | plt_offset--; |
| 10441 | else |
| 10442 | { |
| 10443 | if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, |
| 10444 | -1, dynreloc_value)) |
| 10445 | root_plt->offset |= 1; |
| 10446 | else |
| 10447 | return bfd_reloc_notsupported; |
| 10448 | } |
| 10449 | |
| 10450 | /* Static relocations always resolve to the .iplt entry. */ |
| 10451 | st_type = STT_FUNC; |
| 10452 | value = (splt->output_section->vma |
| 10453 | + splt->output_offset |
| 10454 | + plt_offset); |
| 10455 | branch_type = ST_BRANCH_TO_ARM; |
| 10456 | |
| 10457 | /* If there are non-call relocations that resolve to the .iplt |
| 10458 | entry, then all dynamic ones must too. */ |
| 10459 | if (arm_plt->noncall_refcount != 0) |
| 10460 | { |
| 10461 | dynreloc_st_type = st_type; |
| 10462 | dynreloc_value = value; |
| 10463 | } |
| 10464 | } |
| 10465 | else |
| 10466 | /* We populate the .plt entry in finish_dynamic_symbol. */ |
| 10467 | splt = globals->root.splt; |
| 10468 | } |
| 10469 | else |
| 10470 | { |
| 10471 | splt = NULL; |
| 10472 | plt_offset = (bfd_vma) -1; |
| 10473 | gotplt_offset = (bfd_vma) -1; |
| 10474 | } |
| 10475 | |
| 10476 | resolved_to_zero = (h != NULL |
| 10477 | && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)); |
| 10478 | |
| 10479 | switch (r_type) |
| 10480 | { |
| 10481 | case R_ARM_NONE: |
| 10482 | /* We don't need to find a value for this symbol. It's just a |
| 10483 | marker. */ |
| 10484 | *unresolved_reloc_p = FALSE; |
| 10485 | return bfd_reloc_ok; |
| 10486 | |
| 10487 | case R_ARM_ABS12: |
| 10488 | if (!globals->vxworks_p) |
| 10489 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); |
| 10490 | /* Fall through. */ |
| 10491 | |
| 10492 | case R_ARM_PC24: |
| 10493 | case R_ARM_ABS32: |
| 10494 | case R_ARM_ABS32_NOI: |
| 10495 | case R_ARM_REL32: |
| 10496 | case R_ARM_REL32_NOI: |
| 10497 | case R_ARM_CALL: |
| 10498 | case R_ARM_JUMP24: |
| 10499 | case R_ARM_XPC25: |
| 10500 | case R_ARM_PREL31: |
| 10501 | case R_ARM_PLT32: |
| 10502 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
| 10503 | will use the symbol's value, which may point to a PLT entry, but we |
| 10504 | don't need to handle that here. If we created a PLT entry, all |
| 10505 | branches in this object should go to it, except if the PLT is too |
| 10506 | far away, in which case a long branch stub should be inserted. */ |
| 10507 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
| 10508 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
| 10509 | && r_type != R_ARM_CALL |
| 10510 | && r_type != R_ARM_JUMP24 |
| 10511 | && r_type != R_ARM_PLT32) |
| 10512 | && plt_offset != (bfd_vma) -1) |
| 10513 | { |
| 10514 | /* If we've created a .plt section, and assigned a PLT entry |
| 10515 | to this function, it must either be a STT_GNU_IFUNC reference |
| 10516 | or not be known to bind locally. In other cases, we should |
| 10517 | have cleared the PLT entry by now. */ |
| 10518 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); |
| 10519 | |
| 10520 | value = (splt->output_section->vma |
| 10521 | + splt->output_offset |
| 10522 | + plt_offset); |
| 10523 | *unresolved_reloc_p = FALSE; |
| 10524 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 10525 | contents, rel->r_offset, value, |
| 10526 | rel->r_addend); |
| 10527 | } |
| 10528 | |
| 10529 | /* When generating a shared object or relocatable executable, these |
| 10530 | relocations are copied into the output file to be resolved at |
| 10531 | run time. */ |
| 10532 | if ((bfd_link_pic (info) |
| 10533 | || globals->root.is_relocatable_executable |
| 10534 | || globals->fdpic_p) |
| 10535 | && (input_section->flags & SEC_ALLOC) |
| 10536 | && !(globals->vxworks_p |
| 10537 | && strcmp (input_section->output_section->name, |
| 10538 | ".tls_vars") == 0) |
| 10539 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
| 10540 | || !SYMBOL_CALLS_LOCAL (info, h)) |
| 10541 | && !(input_bfd == globals->stub_bfd |
| 10542 | && strstr (input_section->name, STUB_SUFFIX)) |
| 10543 | && (h == NULL |
| 10544 | || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
| 10545 | && !resolved_to_zero) |
| 10546 | || h->root.type != bfd_link_hash_undefweak) |
| 10547 | && r_type != R_ARM_PC24 |
| 10548 | && r_type != R_ARM_CALL |
| 10549 | && r_type != R_ARM_JUMP24 |
| 10550 | && r_type != R_ARM_PREL31 |
| 10551 | && r_type != R_ARM_PLT32) |
| 10552 | { |
| 10553 | Elf_Internal_Rela outrel; |
| 10554 | bfd_boolean skip, relocate; |
| 10555 | int isrofixup = 0; |
| 10556 | |
| 10557 | if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) |
| 10558 | && !h->def_regular) |
| 10559 | { |
| 10560 | char *v = _("shared object"); |
| 10561 | |
| 10562 | if (bfd_link_executable (info)) |
| 10563 | v = _("PIE executable"); |
| 10564 | |
| 10565 | _bfd_error_handler |
| 10566 | (_("%pB: relocation %s against external or undefined symbol `%s'" |
| 10567 | " can not be used when making a %s; recompile with -fPIC"), input_bfd, |
| 10568 | elf32_arm_howto_table_1[r_type].name, h->root.root.string, v); |
| 10569 | return bfd_reloc_notsupported; |
| 10570 | } |
| 10571 | |
| 10572 | *unresolved_reloc_p = FALSE; |
| 10573 | |
| 10574 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
| 10575 | { |
| 10576 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
| 10577 | ! globals->use_rel); |
| 10578 | |
| 10579 | if (sreloc == NULL) |
| 10580 | return bfd_reloc_notsupported; |
| 10581 | } |
| 10582 | |
| 10583 | skip = FALSE; |
| 10584 | relocate = FALSE; |
| 10585 | |
| 10586 | outrel.r_addend = addend; |
| 10587 | outrel.r_offset = |
| 10588 | _bfd_elf_section_offset (output_bfd, info, input_section, |
| 10589 | rel->r_offset); |
| 10590 | if (outrel.r_offset == (bfd_vma) -1) |
| 10591 | skip = TRUE; |
| 10592 | else if (outrel.r_offset == (bfd_vma) -2) |
| 10593 | skip = TRUE, relocate = TRUE; |
| 10594 | outrel.r_offset += (input_section->output_section->vma |
| 10595 | + input_section->output_offset); |
| 10596 | |
| 10597 | if (skip) |
| 10598 | memset (&outrel, 0, sizeof outrel); |
| 10599 | else if (h != NULL |
| 10600 | && h->dynindx != -1 |
| 10601 | && (!bfd_link_pic (info) |
| 10602 | || !(bfd_link_pie (info) |
| 10603 | || SYMBOLIC_BIND (info, h)) |
| 10604 | || !h->def_regular)) |
| 10605 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
| 10606 | else |
| 10607 | { |
| 10608 | int symbol; |
| 10609 | |
| 10610 | /* This symbol is local, or marked to become local. */ |
| 10611 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI |
| 10612 | || (globals->fdpic_p && !bfd_link_pic(info))); |
| 10613 | if (globals->symbian_p) |
| 10614 | { |
| 10615 | asection *osec; |
| 10616 | |
| 10617 | /* On Symbian OS, the data segment and text segement |
| 10618 | can be relocated independently. Therefore, we |
| 10619 | must indicate the segment to which this |
| 10620 | relocation is relative. The BPABI allows us to |
| 10621 | use any symbol in the right segment; we just use |
| 10622 | the section symbol as it is convenient. (We |
| 10623 | cannot use the symbol given by "h" directly as it |
| 10624 | will not appear in the dynamic symbol table.) |
| 10625 | |
| 10626 | Note that the dynamic linker ignores the section |
| 10627 | symbol value, so we don't subtract osec->vma |
| 10628 | from the emitted reloc addend. */ |
| 10629 | if (sym_sec) |
| 10630 | osec = sym_sec->output_section; |
| 10631 | else |
| 10632 | osec = input_section->output_section; |
| 10633 | symbol = elf_section_data (osec)->dynindx; |
| 10634 | if (symbol == 0) |
| 10635 | { |
| 10636 | struct elf_link_hash_table *htab = elf_hash_table (info); |
| 10637 | |
| 10638 | if ((osec->flags & SEC_READONLY) == 0 |
| 10639 | && htab->data_index_section != NULL) |
| 10640 | osec = htab->data_index_section; |
| 10641 | else |
| 10642 | osec = htab->text_index_section; |
| 10643 | symbol = elf_section_data (osec)->dynindx; |
| 10644 | } |
| 10645 | BFD_ASSERT (symbol != 0); |
| 10646 | } |
| 10647 | else |
| 10648 | /* On SVR4-ish systems, the dynamic loader cannot |
| 10649 | relocate the text and data segments independently, |
| 10650 | so the symbol does not matter. */ |
| 10651 | symbol = 0; |
| 10652 | if (dynreloc_st_type == STT_GNU_IFUNC) |
| 10653 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve |
| 10654 | to the .iplt entry. Instead, every non-call reference |
| 10655 | must use an R_ARM_IRELATIVE relocation to obtain the |
| 10656 | correct run-time address. */ |
| 10657 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); |
| 10658 | else if (globals->fdpic_p && !bfd_link_pic(info)) |
| 10659 | isrofixup = 1; |
| 10660 | else |
| 10661 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); |
| 10662 | if (globals->use_rel) |
| 10663 | relocate = TRUE; |
| 10664 | else |
| 10665 | outrel.r_addend += dynreloc_value; |
| 10666 | } |
| 10667 | |
| 10668 | if (isrofixup) |
| 10669 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); |
| 10670 | else |
| 10671 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); |
| 10672 | |
| 10673 | /* If this reloc is against an external symbol, we do not want to |
| 10674 | fiddle with the addend. Otherwise, we need to include the symbol |
| 10675 | value so that it becomes an addend for the dynamic reloc. */ |
| 10676 | if (! relocate) |
| 10677 | return bfd_reloc_ok; |
| 10678 | |
| 10679 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 10680 | contents, rel->r_offset, |
| 10681 | dynreloc_value, (bfd_vma) 0); |
| 10682 | } |
| 10683 | else switch (r_type) |
| 10684 | { |
| 10685 | case R_ARM_ABS12: |
| 10686 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); |
| 10687 | |
| 10688 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
| 10689 | case R_ARM_CALL: |
| 10690 | case R_ARM_JUMP24: |
| 10691 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
| 10692 | case R_ARM_PLT32: |
| 10693 | { |
| 10694 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
| 10695 | |
| 10696 | if (r_type == R_ARM_XPC25) |
| 10697 | { |
| 10698 | /* Check for Arm calling Arm function. */ |
| 10699 | /* FIXME: Should we translate the instruction into a BL |
| 10700 | instruction instead ? */ |
| 10701 | if (branch_type != ST_BRANCH_TO_THUMB) |
| 10702 | _bfd_error_handler |
| 10703 | (_("\%pB: warning: %s BLX instruction targets" |
| 10704 | " %s function '%s'"), |
| 10705 | input_bfd, "ARM", |
| 10706 | "ARM", h ? h->root.root.string : "(local)"); |
| 10707 | } |
| 10708 | else if (r_type == R_ARM_PC24) |
| 10709 | { |
| 10710 | /* Check for Arm calling Thumb function. */ |
| 10711 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10712 | { |
| 10713 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
| 10714 | output_bfd, input_section, |
| 10715 | hit_data, sym_sec, rel->r_offset, |
| 10716 | signed_addend, value, |
| 10717 | error_message)) |
| 10718 | return bfd_reloc_ok; |
| 10719 | else |
| 10720 | return bfd_reloc_dangerous; |
| 10721 | } |
| 10722 | } |
| 10723 | |
| 10724 | /* Check if a stub has to be inserted because the |
| 10725 | destination is too far or we are changing mode. */ |
| 10726 | if ( r_type == R_ARM_CALL |
| 10727 | || r_type == R_ARM_JUMP24 |
| 10728 | || r_type == R_ARM_PLT32) |
| 10729 | { |
| 10730 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
| 10731 | struct elf32_arm_link_hash_entry *hash; |
| 10732 | |
| 10733 | hash = (struct elf32_arm_link_hash_entry *) h; |
| 10734 | stub_type = arm_type_of_stub (info, input_section, rel, |
| 10735 | st_type, &branch_type, |
| 10736 | hash, value, sym_sec, |
| 10737 | input_bfd, sym_name); |
| 10738 | |
| 10739 | if (stub_type != arm_stub_none) |
| 10740 | { |
| 10741 | /* The target is out of reach, so redirect the |
| 10742 | branch to the local stub for this function. */ |
| 10743 | stub_entry = elf32_arm_get_stub_entry (input_section, |
| 10744 | sym_sec, h, |
| 10745 | rel, globals, |
| 10746 | stub_type); |
| 10747 | { |
| 10748 | if (stub_entry != NULL) |
| 10749 | value = (stub_entry->stub_offset |
| 10750 | + stub_entry->stub_sec->output_offset |
| 10751 | + stub_entry->stub_sec->output_section->vma); |
| 10752 | |
| 10753 | if (plt_offset != (bfd_vma) -1) |
| 10754 | *unresolved_reloc_p = FALSE; |
| 10755 | } |
| 10756 | } |
| 10757 | else |
| 10758 | { |
| 10759 | /* If the call goes through a PLT entry, make sure to |
| 10760 | check distance to the right destination address. */ |
| 10761 | if (plt_offset != (bfd_vma) -1) |
| 10762 | { |
| 10763 | value = (splt->output_section->vma |
| 10764 | + splt->output_offset |
| 10765 | + plt_offset); |
| 10766 | *unresolved_reloc_p = FALSE; |
| 10767 | /* The PLT entry is in ARM mode, regardless of the |
| 10768 | target function. */ |
| 10769 | branch_type = ST_BRANCH_TO_ARM; |
| 10770 | } |
| 10771 | } |
| 10772 | } |
| 10773 | |
| 10774 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
| 10775 | where: |
| 10776 | S is the address of the symbol in the relocation. |
| 10777 | P is address of the instruction being relocated. |
| 10778 | A is the addend (extracted from the instruction) in bytes. |
| 10779 | |
| 10780 | S is held in 'value'. |
| 10781 | P is the base address of the section containing the |
| 10782 | instruction plus the offset of the reloc into that |
| 10783 | section, ie: |
| 10784 | (input_section->output_section->vma + |
| 10785 | input_section->output_offset + |
| 10786 | rel->r_offset). |
| 10787 | A is the addend, converted into bytes, ie: |
| 10788 | (signed_addend * 4) |
| 10789 | |
| 10790 | Note: None of these operations have knowledge of the pipeline |
| 10791 | size of the processor, thus it is up to the assembler to |
| 10792 | encode this information into the addend. */ |
| 10793 | value -= (input_section->output_section->vma |
| 10794 | + input_section->output_offset); |
| 10795 | value -= rel->r_offset; |
| 10796 | if (globals->use_rel) |
| 10797 | value += (signed_addend << howto->size); |
| 10798 | else |
| 10799 | /* RELA addends do not have to be adjusted by howto->size. */ |
| 10800 | value += signed_addend; |
| 10801 | |
| 10802 | signed_addend = value; |
| 10803 | signed_addend >>= howto->rightshift; |
| 10804 | |
| 10805 | /* A branch to an undefined weak symbol is turned into a jump to |
| 10806 | the next instruction unless a PLT entry will be created. |
| 10807 | Do the same for local undefined symbols (but not for STN_UNDEF). |
| 10808 | The jump to the next instruction is optimized as a NOP depending |
| 10809 | on the architecture. */ |
| 10810 | if (h ? (h->root.type == bfd_link_hash_undefweak |
| 10811 | && plt_offset == (bfd_vma) -1) |
| 10812 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
| 10813 | { |
| 10814 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
| 10815 | |
| 10816 | if (arch_has_arm_nop (globals)) |
| 10817 | value |= 0x0320f000; |
| 10818 | else |
| 10819 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ |
| 10820 | } |
| 10821 | else |
| 10822 | { |
| 10823 | /* Perform a signed range check. */ |
| 10824 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
| 10825 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
| 10826 | return bfd_reloc_overflow; |
| 10827 | |
| 10828 | addend = (value & 2); |
| 10829 | |
| 10830 | value = (signed_addend & howto->dst_mask) |
| 10831 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); |
| 10832 | |
| 10833 | if (r_type == R_ARM_CALL) |
| 10834 | { |
| 10835 | /* Set the H bit in the BLX instruction. */ |
| 10836 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10837 | { |
| 10838 | if (addend) |
| 10839 | value |= (1 << 24); |
| 10840 | else |
| 10841 | value &= ~(bfd_vma)(1 << 24); |
| 10842 | } |
| 10843 | |
| 10844 | /* Select the correct instruction (BL or BLX). */ |
| 10845 | /* Only if we are not handling a BL to a stub. In this |
| 10846 | case, mode switching is performed by the stub. */ |
| 10847 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
| 10848 | value |= (1 << 28); |
| 10849 | else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) |
| 10850 | { |
| 10851 | value &= ~(bfd_vma)(1 << 28); |
| 10852 | value |= (1 << 24); |
| 10853 | } |
| 10854 | } |
| 10855 | } |
| 10856 | } |
| 10857 | break; |
| 10858 | |
| 10859 | case R_ARM_ABS32: |
| 10860 | value += addend; |
| 10861 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10862 | value |= 1; |
| 10863 | break; |
| 10864 | |
| 10865 | case R_ARM_ABS32_NOI: |
| 10866 | value += addend; |
| 10867 | break; |
| 10868 | |
| 10869 | case R_ARM_REL32: |
| 10870 | value += addend; |
| 10871 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10872 | value |= 1; |
| 10873 | value -= (input_section->output_section->vma |
| 10874 | + input_section->output_offset + rel->r_offset); |
| 10875 | break; |
| 10876 | |
| 10877 | case R_ARM_REL32_NOI: |
| 10878 | value += addend; |
| 10879 | value -= (input_section->output_section->vma |
| 10880 | + input_section->output_offset + rel->r_offset); |
| 10881 | break; |
| 10882 | |
| 10883 | case R_ARM_PREL31: |
| 10884 | value -= (input_section->output_section->vma |
| 10885 | + input_section->output_offset + rel->r_offset); |
| 10886 | value += signed_addend; |
| 10887 | if (! h || h->root.type != bfd_link_hash_undefweak) |
| 10888 | { |
| 10889 | /* Check for overflow. */ |
| 10890 | if ((value ^ (value >> 1)) & (1 << 30)) |
| 10891 | return bfd_reloc_overflow; |
| 10892 | } |
| 10893 | value &= 0x7fffffff; |
| 10894 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); |
| 10895 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10896 | value |= 1; |
| 10897 | break; |
| 10898 | } |
| 10899 | |
| 10900 | bfd_put_32 (input_bfd, value, hit_data); |
| 10901 | return bfd_reloc_ok; |
| 10902 | |
| 10903 | case R_ARM_ABS8: |
| 10904 | /* PR 16202: Refectch the addend using the correct size. */ |
| 10905 | if (globals->use_rel) |
| 10906 | addend = bfd_get_8 (input_bfd, hit_data); |
| 10907 | value += addend; |
| 10908 | |
| 10909 | /* There is no way to tell whether the user intended to use a signed or |
| 10910 | unsigned addend. When checking for overflow we accept either, |
| 10911 | as specified by the AAELF. */ |
| 10912 | if ((long) value > 0xff || (long) value < -0x80) |
| 10913 | return bfd_reloc_overflow; |
| 10914 | |
| 10915 | bfd_put_8 (input_bfd, value, hit_data); |
| 10916 | return bfd_reloc_ok; |
| 10917 | |
| 10918 | case R_ARM_ABS16: |
| 10919 | /* PR 16202: Refectch the addend using the correct size. */ |
| 10920 | if (globals->use_rel) |
| 10921 | addend = bfd_get_16 (input_bfd, hit_data); |
| 10922 | value += addend; |
| 10923 | |
| 10924 | /* See comment for R_ARM_ABS8. */ |
| 10925 | if ((long) value > 0xffff || (long) value < -0x8000) |
| 10926 | return bfd_reloc_overflow; |
| 10927 | |
| 10928 | bfd_put_16 (input_bfd, value, hit_data); |
| 10929 | return bfd_reloc_ok; |
| 10930 | |
| 10931 | case R_ARM_THM_ABS5: |
| 10932 | /* Support ldr and str instructions for the thumb. */ |
| 10933 | if (globals->use_rel) |
| 10934 | { |
| 10935 | /* Need to refetch addend. */ |
| 10936 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; |
| 10937 | /* ??? Need to determine shift amount from operand size. */ |
| 10938 | addend >>= howto->rightshift; |
| 10939 | } |
| 10940 | value += addend; |
| 10941 | |
| 10942 | /* ??? Isn't value unsigned? */ |
| 10943 | if ((long) value > 0x1f || (long) value < -0x10) |
| 10944 | return bfd_reloc_overflow; |
| 10945 | |
| 10946 | /* ??? Value needs to be properly shifted into place first. */ |
| 10947 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; |
| 10948 | bfd_put_16 (input_bfd, value, hit_data); |
| 10949 | return bfd_reloc_ok; |
| 10950 | |
| 10951 | case R_ARM_THM_ALU_PREL_11_0: |
| 10952 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ |
| 10953 | { |
| 10954 | bfd_vma insn; |
| 10955 | bfd_signed_vma relocation; |
| 10956 | |
| 10957 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) |
| 10958 | | bfd_get_16 (input_bfd, hit_data + 2); |
| 10959 | |
| 10960 | if (globals->use_rel) |
| 10961 | { |
| 10962 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) |
| 10963 | | ((insn & (1 << 26)) >> 15); |
| 10964 | if (insn & 0xf00000) |
| 10965 | signed_addend = -signed_addend; |
| 10966 | } |
| 10967 | |
| 10968 | relocation = value + signed_addend; |
| 10969 | relocation -= Pa (input_section->output_section->vma |
| 10970 | + input_section->output_offset |
| 10971 | + rel->r_offset); |
| 10972 | |
| 10973 | /* PR 21523: Use an absolute value. The user of this reloc will |
| 10974 | have already selected an ADD or SUB insn appropriately. */ |
| 10975 | value = llabs (relocation); |
| 10976 | |
| 10977 | if (value >= 0x1000) |
| 10978 | return bfd_reloc_overflow; |
| 10979 | |
| 10980 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
| 10981 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 10982 | value |= 1; |
| 10983 | |
| 10984 | insn = (insn & 0xfb0f8f00) | (value & 0xff) |
| 10985 | | ((value & 0x700) << 4) |
| 10986 | | ((value & 0x800) << 15); |
| 10987 | if (relocation < 0) |
| 10988 | insn |= 0xa00000; |
| 10989 | |
| 10990 | bfd_put_16 (input_bfd, insn >> 16, hit_data); |
| 10991 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); |
| 10992 | |
| 10993 | return bfd_reloc_ok; |
| 10994 | } |
| 10995 | |
| 10996 | case R_ARM_THM_PC8: |
| 10997 | /* PR 10073: This reloc is not generated by the GNU toolchain, |
| 10998 | but it is supported for compatibility with third party libraries |
| 10999 | generated by other compilers, specifically the ARM/IAR. */ |
| 11000 | { |
| 11001 | bfd_vma insn; |
| 11002 | bfd_signed_vma relocation; |
| 11003 | |
| 11004 | insn = bfd_get_16 (input_bfd, hit_data); |
| 11005 | |
| 11006 | if (globals->use_rel) |
| 11007 | addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4; |
| 11008 | |
| 11009 | relocation = value + addend; |
| 11010 | relocation -= Pa (input_section->output_section->vma |
| 11011 | + input_section->output_offset |
| 11012 | + rel->r_offset); |
| 11013 | |
| 11014 | value = relocation; |
| 11015 | |
| 11016 | /* We do not check for overflow of this reloc. Although strictly |
| 11017 | speaking this is incorrect, it appears to be necessary in order |
| 11018 | to work with IAR generated relocs. Since GCC and GAS do not |
| 11019 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be |
| 11020 | a problem for them. */ |
| 11021 | value &= 0x3fc; |
| 11022 | |
| 11023 | insn = (insn & 0xff00) | (value >> 2); |
| 11024 | |
| 11025 | bfd_put_16 (input_bfd, insn, hit_data); |
| 11026 | |
| 11027 | return bfd_reloc_ok; |
| 11028 | } |
| 11029 | |
| 11030 | case R_ARM_THM_PC12: |
| 11031 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ |
| 11032 | { |
| 11033 | bfd_vma insn; |
| 11034 | bfd_signed_vma relocation; |
| 11035 | |
| 11036 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) |
| 11037 | | bfd_get_16 (input_bfd, hit_data + 2); |
| 11038 | |
| 11039 | if (globals->use_rel) |
| 11040 | { |
| 11041 | signed_addend = insn & 0xfff; |
| 11042 | if (!(insn & (1 << 23))) |
| 11043 | signed_addend = -signed_addend; |
| 11044 | } |
| 11045 | |
| 11046 | relocation = value + signed_addend; |
| 11047 | relocation -= Pa (input_section->output_section->vma |
| 11048 | + input_section->output_offset |
| 11049 | + rel->r_offset); |
| 11050 | |
| 11051 | value = relocation; |
| 11052 | |
| 11053 | if (value >= 0x1000) |
| 11054 | return bfd_reloc_overflow; |
| 11055 | |
| 11056 | insn = (insn & 0xff7ff000) | value; |
| 11057 | if (relocation >= 0) |
| 11058 | insn |= (1 << 23); |
| 11059 | |
| 11060 | bfd_put_16 (input_bfd, insn >> 16, hit_data); |
| 11061 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); |
| 11062 | |
| 11063 | return bfd_reloc_ok; |
| 11064 | } |
| 11065 | |
| 11066 | case R_ARM_THM_XPC22: |
| 11067 | case R_ARM_THM_CALL: |
| 11068 | case R_ARM_THM_JUMP24: |
| 11069 | /* Thumb BL (branch long instruction). */ |
| 11070 | { |
| 11071 | bfd_vma relocation; |
| 11072 | bfd_vma reloc_sign; |
| 11073 | bfd_boolean overflow = FALSE; |
| 11074 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
| 11075 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); |
| 11076 | bfd_signed_vma reloc_signed_max; |
| 11077 | bfd_signed_vma reloc_signed_min; |
| 11078 | bfd_vma check; |
| 11079 | bfd_signed_vma signed_check; |
| 11080 | int bitsize; |
| 11081 | const int thumb2 = using_thumb2 (globals); |
| 11082 | const int thumb2_bl = using_thumb2_bl (globals); |
| 11083 | |
| 11084 | /* A branch to an undefined weak symbol is turned into a jump to |
| 11085 | the next instruction unless a PLT entry will be created. |
| 11086 | The jump to the next instruction is optimized as a NOP.W for |
| 11087 | Thumb-2 enabled architectures. */ |
| 11088 | if (h && h->root.type == bfd_link_hash_undefweak |
| 11089 | && plt_offset == (bfd_vma) -1) |
| 11090 | { |
| 11091 | if (thumb2) |
| 11092 | { |
| 11093 | bfd_put_16 (input_bfd, 0xf3af, hit_data); |
| 11094 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); |
| 11095 | } |
| 11096 | else |
| 11097 | { |
| 11098 | bfd_put_16 (input_bfd, 0xe000, hit_data); |
| 11099 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); |
| 11100 | } |
| 11101 | return bfd_reloc_ok; |
| 11102 | } |
| 11103 | |
| 11104 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
| 11105 | with Thumb-1) involving the J1 and J2 bits. */ |
| 11106 | if (globals->use_rel) |
| 11107 | { |
| 11108 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
| 11109 | bfd_vma upper = upper_insn & 0x3ff; |
| 11110 | bfd_vma lower = lower_insn & 0x7ff; |
| 11111 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; |
| 11112 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; |
| 11113 | bfd_vma i1 = j1 ^ s ? 0 : 1; |
| 11114 | bfd_vma i2 = j2 ^ s ? 0 : 1; |
| 11115 | |
| 11116 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); |
| 11117 | /* Sign extend. */ |
| 11118 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); |
| 11119 | |
| 11120 | signed_addend = addend; |
| 11121 | } |
| 11122 | |
| 11123 | if (r_type == R_ARM_THM_XPC22) |
| 11124 | { |
| 11125 | /* Check for Thumb to Thumb call. */ |
| 11126 | /* FIXME: Should we translate the instruction into a BL |
| 11127 | instruction instead ? */ |
| 11128 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 11129 | _bfd_error_handler |
| 11130 | (_("%pB: warning: %s BLX instruction targets" |
| 11131 | " %s function '%s'"), |
| 11132 | input_bfd, "Thumb", |
| 11133 | "Thumb", h ? h->root.root.string : "(local)"); |
| 11134 | } |
| 11135 | else |
| 11136 | { |
| 11137 | /* If it is not a call to Thumb, assume call to Arm. |
| 11138 | If it is a call relative to a section name, then it is not a |
| 11139 | function call at all, but rather a long jump. Calls through |
| 11140 | the PLT do not require stubs. */ |
| 11141 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
| 11142 | { |
| 11143 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
| 11144 | { |
| 11145 | /* Convert BL to BLX. */ |
| 11146 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
| 11147 | } |
| 11148 | else if (( r_type != R_ARM_THM_CALL) |
| 11149 | && (r_type != R_ARM_THM_JUMP24)) |
| 11150 | { |
| 11151 | if (elf32_thumb_to_arm_stub |
| 11152 | (info, sym_name, input_bfd, output_bfd, input_section, |
| 11153 | hit_data, sym_sec, rel->r_offset, signed_addend, value, |
| 11154 | error_message)) |
| 11155 | return bfd_reloc_ok; |
| 11156 | else |
| 11157 | return bfd_reloc_dangerous; |
| 11158 | } |
| 11159 | } |
| 11160 | else if (branch_type == ST_BRANCH_TO_THUMB |
| 11161 | && globals->use_blx |
| 11162 | && r_type == R_ARM_THM_CALL) |
| 11163 | { |
| 11164 | /* Make sure this is a BL. */ |
| 11165 | lower_insn |= 0x1800; |
| 11166 | } |
| 11167 | } |
| 11168 | |
| 11169 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
| 11170 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
| 11171 | { |
| 11172 | /* Check if a stub has to be inserted because the destination |
| 11173 | is too far. */ |
| 11174 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 11175 | struct elf32_arm_link_hash_entry *hash; |
| 11176 | |
| 11177 | hash = (struct elf32_arm_link_hash_entry *) h; |
| 11178 | |
| 11179 | stub_type = arm_type_of_stub (info, input_section, rel, |
| 11180 | st_type, &branch_type, |
| 11181 | hash, value, sym_sec, |
| 11182 | input_bfd, sym_name); |
| 11183 | |
| 11184 | if (stub_type != arm_stub_none) |
| 11185 | { |
| 11186 | /* The target is out of reach or we are changing modes, so |
| 11187 | redirect the branch to the local stub for this |
| 11188 | function. */ |
| 11189 | stub_entry = elf32_arm_get_stub_entry (input_section, |
| 11190 | sym_sec, h, |
| 11191 | rel, globals, |
| 11192 | stub_type); |
| 11193 | if (stub_entry != NULL) |
| 11194 | { |
| 11195 | value = (stub_entry->stub_offset |
| 11196 | + stub_entry->stub_sec->output_offset |
| 11197 | + stub_entry->stub_sec->output_section->vma); |
| 11198 | |
| 11199 | if (plt_offset != (bfd_vma) -1) |
| 11200 | *unresolved_reloc_p = FALSE; |
| 11201 | } |
| 11202 | |
| 11203 | /* If this call becomes a call to Arm, force BLX. */ |
| 11204 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
| 11205 | { |
| 11206 | if ((stub_entry |
| 11207 | && !arm_stub_is_thumb (stub_entry->stub_type)) |
| 11208 | || branch_type != ST_BRANCH_TO_THUMB) |
| 11209 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
| 11210 | } |
| 11211 | } |
| 11212 | } |
| 11213 | |
| 11214 | /* Handle calls via the PLT. */ |
| 11215 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
| 11216 | { |
| 11217 | value = (splt->output_section->vma |
| 11218 | + splt->output_offset |
| 11219 | + plt_offset); |
| 11220 | |
| 11221 | if (globals->use_blx |
| 11222 | && r_type == R_ARM_THM_CALL |
| 11223 | && ! using_thumb_only (globals)) |
| 11224 | { |
| 11225 | /* If the Thumb BLX instruction is available, convert |
| 11226 | the BL to a BLX instruction to call the ARM-mode |
| 11227 | PLT entry. */ |
| 11228 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
| 11229 | branch_type = ST_BRANCH_TO_ARM; |
| 11230 | } |
| 11231 | else |
| 11232 | { |
| 11233 | if (! using_thumb_only (globals)) |
| 11234 | /* Target the Thumb stub before the ARM PLT entry. */ |
| 11235 | value -= PLT_THUMB_STUB_SIZE; |
| 11236 | branch_type = ST_BRANCH_TO_THUMB; |
| 11237 | } |
| 11238 | *unresolved_reloc_p = FALSE; |
| 11239 | } |
| 11240 | |
| 11241 | relocation = value + signed_addend; |
| 11242 | |
| 11243 | relocation -= (input_section->output_section->vma |
| 11244 | + input_section->output_offset |
| 11245 | + rel->r_offset); |
| 11246 | |
| 11247 | check = relocation >> howto->rightshift; |
| 11248 | |
| 11249 | /* If this is a signed value, the rightshift just dropped |
| 11250 | leading 1 bits (assuming twos complement). */ |
| 11251 | if ((bfd_signed_vma) relocation >= 0) |
| 11252 | signed_check = check; |
| 11253 | else |
| 11254 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); |
| 11255 | |
| 11256 | /* Calculate the permissable maximum and minimum values for |
| 11257 | this relocation according to whether we're relocating for |
| 11258 | Thumb-2 or not. */ |
| 11259 | bitsize = howto->bitsize; |
| 11260 | if (!thumb2_bl) |
| 11261 | bitsize -= 2; |
| 11262 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
| 11263 | reloc_signed_min = ~reloc_signed_max; |
| 11264 | |
| 11265 | /* Assumes two's complement. */ |
| 11266 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
| 11267 | overflow = TRUE; |
| 11268 | |
| 11269 | if ((lower_insn & 0x5000) == 0x4000) |
| 11270 | /* For a BLX instruction, make sure that the relocation is rounded up |
| 11271 | to a word boundary. This follows the semantics of the instruction |
| 11272 | which specifies that bit 1 of the target address will come from bit |
| 11273 | 1 of the base address. */ |
| 11274 | relocation = (relocation + 2) & ~ 3; |
| 11275 | |
| 11276 | /* Put RELOCATION back into the insn. Assumes two's complement. |
| 11277 | We use the Thumb-2 encoding, which is safe even if dealing with |
| 11278 | a Thumb-1 instruction by virtue of our overflow check above. */ |
| 11279 | reloc_sign = (signed_check < 0) ? 1 : 0; |
| 11280 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) |
| 11281 | | ((relocation >> 12) & 0x3ff) |
| 11282 | | (reloc_sign << 10); |
| 11283 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
| 11284 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
| 11285 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) |
| 11286 | | ((relocation >> 1) & 0x7ff); |
| 11287 | |
| 11288 | /* Put the relocated value back in the object file: */ |
| 11289 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
| 11290 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); |
| 11291 | |
| 11292 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); |
| 11293 | } |
| 11294 | break; |
| 11295 | |
| 11296 | case R_ARM_THM_JUMP19: |
| 11297 | /* Thumb32 conditional branch instruction. */ |
| 11298 | { |
| 11299 | bfd_vma relocation; |
| 11300 | bfd_boolean overflow = FALSE; |
| 11301 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
| 11302 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); |
| 11303 | bfd_signed_vma reloc_signed_max = 0xffffe; |
| 11304 | bfd_signed_vma reloc_signed_min = -0x100000; |
| 11305 | bfd_signed_vma signed_check; |
| 11306 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
| 11307 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 11308 | struct elf32_arm_link_hash_entry *hash; |
| 11309 | |
| 11310 | /* Need to refetch the addend, reconstruct the top three bits, |
| 11311 | and squish the two 11 bit pieces together. */ |
| 11312 | if (globals->use_rel) |
| 11313 | { |
| 11314 | bfd_vma S = (upper_insn & 0x0400) >> 10; |
| 11315 | bfd_vma upper = (upper_insn & 0x003f); |
| 11316 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
| 11317 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; |
| 11318 | bfd_vma lower = (lower_insn & 0x07ff); |
| 11319 | |
| 11320 | upper |= J1 << 6; |
| 11321 | upper |= J2 << 7; |
| 11322 | upper |= (!S) << 8; |
| 11323 | upper -= 0x0100; /* Sign extend. */ |
| 11324 | |
| 11325 | addend = (upper << 12) | (lower << 1); |
| 11326 | signed_addend = addend; |
| 11327 | } |
| 11328 | |
| 11329 | /* Handle calls via the PLT. */ |
| 11330 | if (plt_offset != (bfd_vma) -1) |
| 11331 | { |
| 11332 | value = (splt->output_section->vma |
| 11333 | + splt->output_offset |
| 11334 | + plt_offset); |
| 11335 | /* Target the Thumb stub before the ARM PLT entry. */ |
| 11336 | value -= PLT_THUMB_STUB_SIZE; |
| 11337 | *unresolved_reloc_p = FALSE; |
| 11338 | } |
| 11339 | |
| 11340 | hash = (struct elf32_arm_link_hash_entry *)h; |
| 11341 | |
| 11342 | stub_type = arm_type_of_stub (info, input_section, rel, |
| 11343 | st_type, &branch_type, |
| 11344 | hash, value, sym_sec, |
| 11345 | input_bfd, sym_name); |
| 11346 | if (stub_type != arm_stub_none) |
| 11347 | { |
| 11348 | stub_entry = elf32_arm_get_stub_entry (input_section, |
| 11349 | sym_sec, h, |
| 11350 | rel, globals, |
| 11351 | stub_type); |
| 11352 | if (stub_entry != NULL) |
| 11353 | { |
| 11354 | value = (stub_entry->stub_offset |
| 11355 | + stub_entry->stub_sec->output_offset |
| 11356 | + stub_entry->stub_sec->output_section->vma); |
| 11357 | } |
| 11358 | } |
| 11359 | |
| 11360 | relocation = value + signed_addend; |
| 11361 | relocation -= (input_section->output_section->vma |
| 11362 | + input_section->output_offset |
| 11363 | + rel->r_offset); |
| 11364 | signed_check = (bfd_signed_vma) relocation; |
| 11365 | |
| 11366 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
| 11367 | overflow = TRUE; |
| 11368 | |
| 11369 | /* Put RELOCATION back into the insn. */ |
| 11370 | { |
| 11371 | bfd_vma S = (relocation & 0x00100000) >> 20; |
| 11372 | bfd_vma J2 = (relocation & 0x00080000) >> 19; |
| 11373 | bfd_vma J1 = (relocation & 0x00040000) >> 18; |
| 11374 | bfd_vma hi = (relocation & 0x0003f000) >> 12; |
| 11375 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; |
| 11376 | |
| 11377 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
| 11378 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
| 11379 | } |
| 11380 | |
| 11381 | /* Put the relocated value back in the object file: */ |
| 11382 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
| 11383 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); |
| 11384 | |
| 11385 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); |
| 11386 | } |
| 11387 | |
| 11388 | case R_ARM_THM_JUMP11: |
| 11389 | case R_ARM_THM_JUMP8: |
| 11390 | case R_ARM_THM_JUMP6: |
| 11391 | /* Thumb B (branch) instruction). */ |
| 11392 | { |
| 11393 | bfd_signed_vma relocation; |
| 11394 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
| 11395 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; |
| 11396 | bfd_signed_vma signed_check; |
| 11397 | |
| 11398 | /* CZB cannot jump backward. */ |
| 11399 | if (r_type == R_ARM_THM_JUMP6) |
| 11400 | reloc_signed_min = 0; |
| 11401 | |
| 11402 | if (globals->use_rel) |
| 11403 | { |
| 11404 | /* Need to refetch addend. */ |
| 11405 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; |
| 11406 | if (addend & ((howto->src_mask + 1) >> 1)) |
| 11407 | { |
| 11408 | signed_addend = -1; |
| 11409 | signed_addend &= ~ howto->src_mask; |
| 11410 | signed_addend |= addend; |
| 11411 | } |
| 11412 | else |
| 11413 | signed_addend = addend; |
| 11414 | /* The value in the insn has been right shifted. We need to |
| 11415 | undo this, so that we can perform the address calculation |
| 11416 | in terms of bytes. */ |
| 11417 | signed_addend <<= howto->rightshift; |
| 11418 | } |
| 11419 | relocation = value + signed_addend; |
| 11420 | |
| 11421 | relocation -= (input_section->output_section->vma |
| 11422 | + input_section->output_offset |
| 11423 | + rel->r_offset); |
| 11424 | |
| 11425 | relocation >>= howto->rightshift; |
| 11426 | signed_check = relocation; |
| 11427 | |
| 11428 | if (r_type == R_ARM_THM_JUMP6) |
| 11429 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); |
| 11430 | else |
| 11431 | relocation &= howto->dst_mask; |
| 11432 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
| 11433 | |
| 11434 | bfd_put_16 (input_bfd, relocation, hit_data); |
| 11435 | |
| 11436 | /* Assumes two's complement. */ |
| 11437 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
| 11438 | return bfd_reloc_overflow; |
| 11439 | |
| 11440 | return bfd_reloc_ok; |
| 11441 | } |
| 11442 | |
| 11443 | case R_ARM_ALU_PCREL7_0: |
| 11444 | case R_ARM_ALU_PCREL15_8: |
| 11445 | case R_ARM_ALU_PCREL23_15: |
| 11446 | { |
| 11447 | bfd_vma insn; |
| 11448 | bfd_vma relocation; |
| 11449 | |
| 11450 | insn = bfd_get_32 (input_bfd, hit_data); |
| 11451 | if (globals->use_rel) |
| 11452 | { |
| 11453 | /* Extract the addend. */ |
| 11454 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); |
| 11455 | signed_addend = addend; |
| 11456 | } |
| 11457 | relocation = value + signed_addend; |
| 11458 | |
| 11459 | relocation -= (input_section->output_section->vma |
| 11460 | + input_section->output_offset |
| 11461 | + rel->r_offset); |
| 11462 | insn = (insn & ~0xfff) |
| 11463 | | ((howto->bitpos << 7) & 0xf00) |
| 11464 | | ((relocation >> howto->bitpos) & 0xff); |
| 11465 | bfd_put_32 (input_bfd, value, hit_data); |
| 11466 | } |
| 11467 | return bfd_reloc_ok; |
| 11468 | |
| 11469 | case R_ARM_GNU_VTINHERIT: |
| 11470 | case R_ARM_GNU_VTENTRY: |
| 11471 | return bfd_reloc_ok; |
| 11472 | |
| 11473 | case R_ARM_GOTOFF32: |
| 11474 | /* Relocation is relative to the start of the |
| 11475 | global offset table. */ |
| 11476 | |
| 11477 | BFD_ASSERT (sgot != NULL); |
| 11478 | if (sgot == NULL) |
| 11479 | return bfd_reloc_notsupported; |
| 11480 | |
| 11481 | /* If we are addressing a Thumb function, we need to adjust the |
| 11482 | address by one, so that attempts to call the function pointer will |
| 11483 | correctly interpret it as Thumb code. */ |
| 11484 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 11485 | value += 1; |
| 11486 | |
| 11487 | /* Note that sgot->output_offset is not involved in this |
| 11488 | calculation. We always want the start of .got. If we |
| 11489 | define _GLOBAL_OFFSET_TABLE in a different way, as is |
| 11490 | permitted by the ABI, we might have to change this |
| 11491 | calculation. */ |
| 11492 | value -= sgot->output_section->vma; |
| 11493 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 11494 | contents, rel->r_offset, value, |
| 11495 | rel->r_addend); |
| 11496 | |
| 11497 | case R_ARM_GOTPC: |
| 11498 | /* Use global offset table as symbol value. */ |
| 11499 | BFD_ASSERT (sgot != NULL); |
| 11500 | |
| 11501 | if (sgot == NULL) |
| 11502 | return bfd_reloc_notsupported; |
| 11503 | |
| 11504 | *unresolved_reloc_p = FALSE; |
| 11505 | value = sgot->output_section->vma; |
| 11506 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 11507 | contents, rel->r_offset, value, |
| 11508 | rel->r_addend); |
| 11509 | |
| 11510 | case R_ARM_GOT32: |
| 11511 | case R_ARM_GOT_PREL: |
| 11512 | /* Relocation is to the entry for this symbol in the |
| 11513 | global offset table. */ |
| 11514 | if (sgot == NULL) |
| 11515 | return bfd_reloc_notsupported; |
| 11516 | |
| 11517 | if (dynreloc_st_type == STT_GNU_IFUNC |
| 11518 | && plt_offset != (bfd_vma) -1 |
| 11519 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) |
| 11520 | { |
| 11521 | /* We have a relocation against a locally-binding STT_GNU_IFUNC |
| 11522 | symbol, and the relocation resolves directly to the runtime |
| 11523 | target rather than to the .iplt entry. This means that any |
| 11524 | .got entry would be the same value as the .igot.plt entry, |
| 11525 | so there's no point creating both. */ |
| 11526 | sgot = globals->root.igotplt; |
| 11527 | value = sgot->output_offset + gotplt_offset; |
| 11528 | } |
| 11529 | else if (h != NULL) |
| 11530 | { |
| 11531 | bfd_vma off; |
| 11532 | |
| 11533 | off = h->got.offset; |
| 11534 | BFD_ASSERT (off != (bfd_vma) -1); |
| 11535 | if ((off & 1) != 0) |
| 11536 | { |
| 11537 | /* We have already processsed one GOT relocation against |
| 11538 | this symbol. */ |
| 11539 | off &= ~1; |
| 11540 | if (globals->root.dynamic_sections_created |
| 11541 | && !SYMBOL_REFERENCES_LOCAL (info, h)) |
| 11542 | *unresolved_reloc_p = FALSE; |
| 11543 | } |
| 11544 | else |
| 11545 | { |
| 11546 | Elf_Internal_Rela outrel; |
| 11547 | int isrofixup = 0; |
| 11548 | |
| 11549 | if (((h->dynindx != -1) || globals->fdpic_p) |
| 11550 | && !SYMBOL_REFERENCES_LOCAL (info, h)) |
| 11551 | { |
| 11552 | /* If the symbol doesn't resolve locally in a static |
| 11553 | object, we have an undefined reference. If the |
| 11554 | symbol doesn't resolve locally in a dynamic object, |
| 11555 | it should be resolved by the dynamic linker. */ |
| 11556 | if (globals->root.dynamic_sections_created) |
| 11557 | { |
| 11558 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); |
| 11559 | *unresolved_reloc_p = FALSE; |
| 11560 | } |
| 11561 | else |
| 11562 | outrel.r_info = 0; |
| 11563 | outrel.r_addend = 0; |
| 11564 | } |
| 11565 | else |
| 11566 | { |
| 11567 | if (dynreloc_st_type == STT_GNU_IFUNC) |
| 11568 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
| 11569 | else if (bfd_link_pic (info) |
| 11570 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
| 11571 | || h->root.type != bfd_link_hash_undefweak)) |
| 11572 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
| 11573 | else |
| 11574 | { |
| 11575 | outrel.r_info = 0; |
| 11576 | if (globals->fdpic_p) |
| 11577 | isrofixup = 1; |
| 11578 | } |
| 11579 | outrel.r_addend = dynreloc_value; |
| 11580 | } |
| 11581 | |
| 11582 | /* The GOT entry is initialized to zero by default. |
| 11583 | See if we should install a different value. */ |
| 11584 | if (outrel.r_addend != 0 |
| 11585 | && (globals->use_rel || outrel.r_info == 0)) |
| 11586 | { |
| 11587 | bfd_put_32 (output_bfd, outrel.r_addend, |
| 11588 | sgot->contents + off); |
| 11589 | outrel.r_addend = 0; |
| 11590 | } |
| 11591 | |
| 11592 | if (isrofixup) |
| 11593 | arm_elf_add_rofixup (output_bfd, |
| 11594 | elf32_arm_hash_table(info)->srofixup, |
| 11595 | sgot->output_section->vma |
| 11596 | + sgot->output_offset + off); |
| 11597 | |
| 11598 | else if (outrel.r_info != 0) |
| 11599 | { |
| 11600 | outrel.r_offset = (sgot->output_section->vma |
| 11601 | + sgot->output_offset |
| 11602 | + off); |
| 11603 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 11604 | } |
| 11605 | |
| 11606 | h->got.offset |= 1; |
| 11607 | } |
| 11608 | value = sgot->output_offset + off; |
| 11609 | } |
| 11610 | else |
| 11611 | { |
| 11612 | bfd_vma off; |
| 11613 | |
| 11614 | BFD_ASSERT (local_got_offsets != NULL |
| 11615 | && local_got_offsets[r_symndx] != (bfd_vma) -1); |
| 11616 | |
| 11617 | off = local_got_offsets[r_symndx]; |
| 11618 | |
| 11619 | /* The offset must always be a multiple of 4. We use the |
| 11620 | least significant bit to record whether we have already |
| 11621 | generated the necessary reloc. */ |
| 11622 | if ((off & 1) != 0) |
| 11623 | off &= ~1; |
| 11624 | else |
| 11625 | { |
| 11626 | Elf_Internal_Rela outrel; |
| 11627 | int isrofixup = 0; |
| 11628 | |
| 11629 | if (dynreloc_st_type == STT_GNU_IFUNC) |
| 11630 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
| 11631 | else if (bfd_link_pic (info)) |
| 11632 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
| 11633 | else |
| 11634 | { |
| 11635 | outrel.r_info = 0; |
| 11636 | if (globals->fdpic_p) |
| 11637 | isrofixup = 1; |
| 11638 | } |
| 11639 | |
| 11640 | /* The GOT entry is initialized to zero by default. |
| 11641 | See if we should install a different value. */ |
| 11642 | if (globals->use_rel || outrel.r_info == 0) |
| 11643 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); |
| 11644 | |
| 11645 | if (isrofixup) |
| 11646 | arm_elf_add_rofixup (output_bfd, |
| 11647 | globals->srofixup, |
| 11648 | sgot->output_section->vma |
| 11649 | + sgot->output_offset + off); |
| 11650 | |
| 11651 | else if (outrel.r_info != 0) |
| 11652 | { |
| 11653 | outrel.r_addend = addend + dynreloc_value; |
| 11654 | outrel.r_offset = (sgot->output_section->vma |
| 11655 | + sgot->output_offset |
| 11656 | + off); |
| 11657 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 11658 | } |
| 11659 | |
| 11660 | local_got_offsets[r_symndx] |= 1; |
| 11661 | } |
| 11662 | |
| 11663 | value = sgot->output_offset + off; |
| 11664 | } |
| 11665 | if (r_type != R_ARM_GOT32) |
| 11666 | value += sgot->output_section->vma; |
| 11667 | |
| 11668 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 11669 | contents, rel->r_offset, value, |
| 11670 | rel->r_addend); |
| 11671 | |
| 11672 | case R_ARM_TLS_LDO32: |
| 11673 | value = value - dtpoff_base (info); |
| 11674 | |
| 11675 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 11676 | contents, rel->r_offset, value, |
| 11677 | rel->r_addend); |
| 11678 | |
| 11679 | case R_ARM_TLS_LDM32: |
| 11680 | case R_ARM_TLS_LDM32_FDPIC: |
| 11681 | { |
| 11682 | bfd_vma off; |
| 11683 | |
| 11684 | if (sgot == NULL) |
| 11685 | abort (); |
| 11686 | |
| 11687 | off = globals->tls_ldm_got.offset; |
| 11688 | |
| 11689 | if ((off & 1) != 0) |
| 11690 | off &= ~1; |
| 11691 | else |
| 11692 | { |
| 11693 | /* If we don't know the module number, create a relocation |
| 11694 | for it. */ |
| 11695 | if (bfd_link_pic (info)) |
| 11696 | { |
| 11697 | Elf_Internal_Rela outrel; |
| 11698 | |
| 11699 | if (srelgot == NULL) |
| 11700 | abort (); |
| 11701 | |
| 11702 | outrel.r_addend = 0; |
| 11703 | outrel.r_offset = (sgot->output_section->vma |
| 11704 | + sgot->output_offset + off); |
| 11705 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
| 11706 | |
| 11707 | if (globals->use_rel) |
| 11708 | bfd_put_32 (output_bfd, outrel.r_addend, |
| 11709 | sgot->contents + off); |
| 11710 | |
| 11711 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 11712 | } |
| 11713 | else |
| 11714 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
| 11715 | |
| 11716 | globals->tls_ldm_got.offset |= 1; |
| 11717 | } |
| 11718 | |
| 11719 | if (r_type == R_ARM_TLS_LDM32_FDPIC) |
| 11720 | { |
| 11721 | bfd_put_32(output_bfd, |
| 11722 | globals->root.sgot->output_offset + off, |
| 11723 | contents + rel->r_offset); |
| 11724 | |
| 11725 | return bfd_reloc_ok; |
| 11726 | } |
| 11727 | else |
| 11728 | { |
| 11729 | value = sgot->output_section->vma + sgot->output_offset + off |
| 11730 | - (input_section->output_section->vma |
| 11731 | + input_section->output_offset + rel->r_offset); |
| 11732 | |
| 11733 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 11734 | contents, rel->r_offset, value, |
| 11735 | rel->r_addend); |
| 11736 | } |
| 11737 | } |
| 11738 | |
| 11739 | case R_ARM_TLS_CALL: |
| 11740 | case R_ARM_THM_TLS_CALL: |
| 11741 | case R_ARM_TLS_GD32: |
| 11742 | case R_ARM_TLS_GD32_FDPIC: |
| 11743 | case R_ARM_TLS_IE32: |
| 11744 | case R_ARM_TLS_IE32_FDPIC: |
| 11745 | case R_ARM_TLS_GOTDESC: |
| 11746 | case R_ARM_TLS_DESCSEQ: |
| 11747 | case R_ARM_THM_TLS_DESCSEQ: |
| 11748 | { |
| 11749 | bfd_vma off, offplt; |
| 11750 | int indx = 0; |
| 11751 | char tls_type; |
| 11752 | |
| 11753 | BFD_ASSERT (sgot != NULL); |
| 11754 | |
| 11755 | if (h != NULL) |
| 11756 | { |
| 11757 | bfd_boolean dyn; |
| 11758 | dyn = globals->root.dynamic_sections_created; |
| 11759 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
| 11760 | bfd_link_pic (info), |
| 11761 | h) |
| 11762 | && (!bfd_link_pic (info) |
| 11763 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
| 11764 | { |
| 11765 | *unresolved_reloc_p = FALSE; |
| 11766 | indx = h->dynindx; |
| 11767 | } |
| 11768 | off = h->got.offset; |
| 11769 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
| 11770 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
| 11771 | } |
| 11772 | else |
| 11773 | { |
| 11774 | BFD_ASSERT (local_got_offsets != NULL); |
| 11775 | off = local_got_offsets[r_symndx]; |
| 11776 | offplt = local_tlsdesc_gotents[r_symndx]; |
| 11777 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
| 11778 | } |
| 11779 | |
| 11780 | /* Linker relaxations happens from one of the |
| 11781 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ |
| 11782 | if (ELF32_R_TYPE(rel->r_info) != r_type) |
| 11783 | tls_type = GOT_TLS_IE; |
| 11784 | |
| 11785 | BFD_ASSERT (tls_type != GOT_UNKNOWN); |
| 11786 | |
| 11787 | if ((off & 1) != 0) |
| 11788 | off &= ~1; |
| 11789 | else |
| 11790 | { |
| 11791 | bfd_boolean need_relocs = FALSE; |
| 11792 | Elf_Internal_Rela outrel; |
| 11793 | int cur_off = off; |
| 11794 | |
| 11795 | /* The GOT entries have not been initialized yet. Do it |
| 11796 | now, and emit any relocations. If both an IE GOT and a |
| 11797 | GD GOT are necessary, we emit the GD first. */ |
| 11798 | |
| 11799 | if ((bfd_link_pic (info) || indx != 0) |
| 11800 | && (h == NULL |
| 11801 | || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
| 11802 | && !resolved_to_zero) |
| 11803 | || h->root.type != bfd_link_hash_undefweak)) |
| 11804 | { |
| 11805 | need_relocs = TRUE; |
| 11806 | BFD_ASSERT (srelgot != NULL); |
| 11807 | } |
| 11808 | |
| 11809 | if (tls_type & GOT_TLS_GDESC) |
| 11810 | { |
| 11811 | bfd_byte *loc; |
| 11812 | |
| 11813 | /* We should have relaxed, unless this is an undefined |
| 11814 | weak symbol. */ |
| 11815 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) |
| 11816 | || bfd_link_pic (info)); |
| 11817 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 |
| 11818 | <= globals->root.sgotplt->size); |
| 11819 | |
| 11820 | outrel.r_addend = 0; |
| 11821 | outrel.r_offset = (globals->root.sgotplt->output_section->vma |
| 11822 | + globals->root.sgotplt->output_offset |
| 11823 | + offplt |
| 11824 | + globals->sgotplt_jump_table_size); |
| 11825 | |
| 11826 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); |
| 11827 | sreloc = globals->root.srelplt; |
| 11828 | loc = sreloc->contents; |
| 11829 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); |
| 11830 | BFD_ASSERT (loc + RELOC_SIZE (globals) |
| 11831 | <= sreloc->contents + sreloc->size); |
| 11832 | |
| 11833 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); |
| 11834 | |
| 11835 | /* For globals, the first word in the relocation gets |
| 11836 | the relocation index and the top bit set, or zero, |
| 11837 | if we're binding now. For locals, it gets the |
| 11838 | symbol's offset in the tls section. */ |
| 11839 | bfd_put_32 (output_bfd, |
| 11840 | !h ? value - elf_hash_table (info)->tls_sec->vma |
| 11841 | : info->flags & DF_BIND_NOW ? 0 |
| 11842 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), |
| 11843 | globals->root.sgotplt->contents + offplt |
| 11844 | + globals->sgotplt_jump_table_size); |
| 11845 | |
| 11846 | /* Second word in the relocation is always zero. */ |
| 11847 | bfd_put_32 (output_bfd, 0, |
| 11848 | globals->root.sgotplt->contents + offplt |
| 11849 | + globals->sgotplt_jump_table_size + 4); |
| 11850 | } |
| 11851 | if (tls_type & GOT_TLS_GD) |
| 11852 | { |
| 11853 | if (need_relocs) |
| 11854 | { |
| 11855 | outrel.r_addend = 0; |
| 11856 | outrel.r_offset = (sgot->output_section->vma |
| 11857 | + sgot->output_offset |
| 11858 | + cur_off); |
| 11859 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
| 11860 | |
| 11861 | if (globals->use_rel) |
| 11862 | bfd_put_32 (output_bfd, outrel.r_addend, |
| 11863 | sgot->contents + cur_off); |
| 11864 | |
| 11865 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 11866 | |
| 11867 | if (indx == 0) |
| 11868 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
| 11869 | sgot->contents + cur_off + 4); |
| 11870 | else |
| 11871 | { |
| 11872 | outrel.r_addend = 0; |
| 11873 | outrel.r_info = ELF32_R_INFO (indx, |
| 11874 | R_ARM_TLS_DTPOFF32); |
| 11875 | outrel.r_offset += 4; |
| 11876 | |
| 11877 | if (globals->use_rel) |
| 11878 | bfd_put_32 (output_bfd, outrel.r_addend, |
| 11879 | sgot->contents + cur_off + 4); |
| 11880 | |
| 11881 | elf32_arm_add_dynreloc (output_bfd, info, |
| 11882 | srelgot, &outrel); |
| 11883 | } |
| 11884 | } |
| 11885 | else |
| 11886 | { |
| 11887 | /* If we are not emitting relocations for a |
| 11888 | general dynamic reference, then we must be in a |
| 11889 | static link or an executable link with the |
| 11890 | symbol binding locally. Mark it as belonging |
| 11891 | to module 1, the executable. */ |
| 11892 | bfd_put_32 (output_bfd, 1, |
| 11893 | sgot->contents + cur_off); |
| 11894 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
| 11895 | sgot->contents + cur_off + 4); |
| 11896 | } |
| 11897 | |
| 11898 | cur_off += 8; |
| 11899 | } |
| 11900 | |
| 11901 | if (tls_type & GOT_TLS_IE) |
| 11902 | { |
| 11903 | if (need_relocs) |
| 11904 | { |
| 11905 | if (indx == 0) |
| 11906 | outrel.r_addend = value - dtpoff_base (info); |
| 11907 | else |
| 11908 | outrel.r_addend = 0; |
| 11909 | outrel.r_offset = (sgot->output_section->vma |
| 11910 | + sgot->output_offset |
| 11911 | + cur_off); |
| 11912 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); |
| 11913 | |
| 11914 | if (globals->use_rel) |
| 11915 | bfd_put_32 (output_bfd, outrel.r_addend, |
| 11916 | sgot->contents + cur_off); |
| 11917 | |
| 11918 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 11919 | } |
| 11920 | else |
| 11921 | bfd_put_32 (output_bfd, tpoff (info, value), |
| 11922 | sgot->contents + cur_off); |
| 11923 | cur_off += 4; |
| 11924 | } |
| 11925 | |
| 11926 | if (h != NULL) |
| 11927 | h->got.offset |= 1; |
| 11928 | else |
| 11929 | local_got_offsets[r_symndx] |= 1; |
| 11930 | } |
| 11931 | |
| 11932 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC) |
| 11933 | off += 8; |
| 11934 | else if (tls_type & GOT_TLS_GDESC) |
| 11935 | off = offplt; |
| 11936 | |
| 11937 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL |
| 11938 | || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) |
| 11939 | { |
| 11940 | bfd_signed_vma offset; |
| 11941 | /* TLS stubs are arm mode. The original symbol is a |
| 11942 | data object, so branch_type is bogus. */ |
| 11943 | branch_type = ST_BRANCH_TO_ARM; |
| 11944 | enum elf32_arm_stub_type stub_type |
| 11945 | = arm_type_of_stub (info, input_section, rel, |
| 11946 | st_type, &branch_type, |
| 11947 | (struct elf32_arm_link_hash_entry *)h, |
| 11948 | globals->tls_trampoline, globals->root.splt, |
| 11949 | input_bfd, sym_name); |
| 11950 | |
| 11951 | if (stub_type != arm_stub_none) |
| 11952 | { |
| 11953 | struct elf32_arm_stub_hash_entry *stub_entry |
| 11954 | = elf32_arm_get_stub_entry |
| 11955 | (input_section, globals->root.splt, 0, rel, |
| 11956 | globals, stub_type); |
| 11957 | offset = (stub_entry->stub_offset |
| 11958 | + stub_entry->stub_sec->output_offset |
| 11959 | + stub_entry->stub_sec->output_section->vma); |
| 11960 | } |
| 11961 | else |
| 11962 | offset = (globals->root.splt->output_section->vma |
| 11963 | + globals->root.splt->output_offset |
| 11964 | + globals->tls_trampoline); |
| 11965 | |
| 11966 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL) |
| 11967 | { |
| 11968 | unsigned long inst; |
| 11969 | |
| 11970 | offset -= (input_section->output_section->vma |
| 11971 | + input_section->output_offset |
| 11972 | + rel->r_offset + 8); |
| 11973 | |
| 11974 | inst = offset >> 2; |
| 11975 | inst &= 0x00ffffff; |
| 11976 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); |
| 11977 | } |
| 11978 | else |
| 11979 | { |
| 11980 | /* Thumb blx encodes the offset in a complicated |
| 11981 | fashion. */ |
| 11982 | unsigned upper_insn, lower_insn; |
| 11983 | unsigned neg; |
| 11984 | |
| 11985 | offset -= (input_section->output_section->vma |
| 11986 | + input_section->output_offset |
| 11987 | + rel->r_offset + 4); |
| 11988 | |
| 11989 | if (stub_type != arm_stub_none |
| 11990 | && arm_stub_is_thumb (stub_type)) |
| 11991 | { |
| 11992 | lower_insn = 0xd000; |
| 11993 | } |
| 11994 | else |
| 11995 | { |
| 11996 | lower_insn = 0xc000; |
| 11997 | /* Round up the offset to a word boundary. */ |
| 11998 | offset = (offset + 2) & ~2; |
| 11999 | } |
| 12000 | |
| 12001 | neg = offset < 0; |
| 12002 | upper_insn = (0xf000 |
| 12003 | | ((offset >> 12) & 0x3ff) |
| 12004 | | (neg << 10)); |
| 12005 | lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) |
| 12006 | | (((!((offset >> 22) & 1)) ^ neg) << 11) |
| 12007 | | ((offset >> 1) & 0x7ff); |
| 12008 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
| 12009 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); |
| 12010 | return bfd_reloc_ok; |
| 12011 | } |
| 12012 | } |
| 12013 | /* These relocations needs special care, as besides the fact |
| 12014 | they point somewhere in .gotplt, the addend must be |
| 12015 | adjusted accordingly depending on the type of instruction |
| 12016 | we refer to. */ |
| 12017 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) |
| 12018 | { |
| 12019 | unsigned long data, insn; |
| 12020 | unsigned thumb; |
| 12021 | |
| 12022 | data = bfd_get_32 (input_bfd, hit_data); |
| 12023 | thumb = data & 1; |
| 12024 | data &= ~1u; |
| 12025 | |
| 12026 | if (thumb) |
| 12027 | { |
| 12028 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); |
| 12029 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) |
| 12030 | insn = (insn << 16) |
| 12031 | | bfd_get_16 (input_bfd, |
| 12032 | contents + rel->r_offset - data + 2); |
| 12033 | if ((insn & 0xf800c000) == 0xf000c000) |
| 12034 | /* bl/blx */ |
| 12035 | value = -6; |
| 12036 | else if ((insn & 0xffffff00) == 0x4400) |
| 12037 | /* add */ |
| 12038 | value = -5; |
| 12039 | else |
| 12040 | { |
| 12041 | _bfd_error_handler |
| 12042 | /* xgettext:c-format */ |
| 12043 | (_("%pB(%pA+%#" PRIx64 "): " |
| 12044 | "unexpected %s instruction '%#lx' " |
| 12045 | "referenced by TLS_GOTDESC"), |
| 12046 | input_bfd, input_section, (uint64_t) rel->r_offset, |
| 12047 | "Thumb", insn); |
| 12048 | return bfd_reloc_notsupported; |
| 12049 | } |
| 12050 | } |
| 12051 | else |
| 12052 | { |
| 12053 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); |
| 12054 | |
| 12055 | switch (insn >> 24) |
| 12056 | { |
| 12057 | case 0xeb: /* bl */ |
| 12058 | case 0xfa: /* blx */ |
| 12059 | value = -4; |
| 12060 | break; |
| 12061 | |
| 12062 | case 0xe0: /* add */ |
| 12063 | value = -8; |
| 12064 | break; |
| 12065 | |
| 12066 | default: |
| 12067 | _bfd_error_handler |
| 12068 | /* xgettext:c-format */ |
| 12069 | (_("%pB(%pA+%#" PRIx64 "): " |
| 12070 | "unexpected %s instruction '%#lx' " |
| 12071 | "referenced by TLS_GOTDESC"), |
| 12072 | input_bfd, input_section, (uint64_t) rel->r_offset, |
| 12073 | "ARM", insn); |
| 12074 | return bfd_reloc_notsupported; |
| 12075 | } |
| 12076 | } |
| 12077 | |
| 12078 | value += ((globals->root.sgotplt->output_section->vma |
| 12079 | + globals->root.sgotplt->output_offset + off) |
| 12080 | - (input_section->output_section->vma |
| 12081 | + input_section->output_offset |
| 12082 | + rel->r_offset) |
| 12083 | + globals->sgotplt_jump_table_size); |
| 12084 | } |
| 12085 | else |
| 12086 | value = ((globals->root.sgot->output_section->vma |
| 12087 | + globals->root.sgot->output_offset + off) |
| 12088 | - (input_section->output_section->vma |
| 12089 | + input_section->output_offset + rel->r_offset)); |
| 12090 | |
| 12091 | if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC || |
| 12092 | r_type == R_ARM_TLS_IE32_FDPIC)) |
| 12093 | { |
| 12094 | /* For FDPIC relocations, resolve to the offset of the GOT |
| 12095 | entry from the start of GOT. */ |
| 12096 | bfd_put_32(output_bfd, |
| 12097 | globals->root.sgot->output_offset + off, |
| 12098 | contents + rel->r_offset); |
| 12099 | |
| 12100 | return bfd_reloc_ok; |
| 12101 | } |
| 12102 | else |
| 12103 | { |
| 12104 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 12105 | contents, rel->r_offset, value, |
| 12106 | rel->r_addend); |
| 12107 | } |
| 12108 | } |
| 12109 | |
| 12110 | case R_ARM_TLS_LE32: |
| 12111 | if (bfd_link_dll (info)) |
| 12112 | { |
| 12113 | _bfd_error_handler |
| 12114 | /* xgettext:c-format */ |
| 12115 | (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted " |
| 12116 | "in shared object"), |
| 12117 | input_bfd, input_section, (uint64_t) rel->r_offset, howto->name); |
| 12118 | return bfd_reloc_notsupported; |
| 12119 | } |
| 12120 | else |
| 12121 | value = tpoff (info, value); |
| 12122 | |
| 12123 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
| 12124 | contents, rel->r_offset, value, |
| 12125 | rel->r_addend); |
| 12126 | |
| 12127 | case R_ARM_V4BX: |
| 12128 | if (globals->fix_v4bx) |
| 12129 | { |
| 12130 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); |
| 12131 | |
| 12132 | /* Ensure that we have a BX instruction. */ |
| 12133 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); |
| 12134 | |
| 12135 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
| 12136 | { |
| 12137 | /* Branch to veneer. */ |
| 12138 | bfd_vma glue_addr; |
| 12139 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); |
| 12140 | glue_addr -= input_section->output_section->vma |
| 12141 | + input_section->output_offset |
| 12142 | + rel->r_offset + 8; |
| 12143 | insn = (insn & 0xf0000000) | 0x0a000000 |
| 12144 | | ((glue_addr >> 2) & 0x00ffffff); |
| 12145 | } |
| 12146 | else |
| 12147 | { |
| 12148 | /* Preserve Rm (lowest four bits) and the condition code |
| 12149 | (highest four bits). Other bits encode MOV PC,Rm. */ |
| 12150 | insn = (insn & 0xf000000f) | 0x01a0f000; |
| 12151 | } |
| 12152 | |
| 12153 | bfd_put_32 (input_bfd, insn, hit_data); |
| 12154 | } |
| 12155 | return bfd_reloc_ok; |
| 12156 | |
| 12157 | case R_ARM_MOVW_ABS_NC: |
| 12158 | case R_ARM_MOVT_ABS: |
| 12159 | case R_ARM_MOVW_PREL_NC: |
| 12160 | case R_ARM_MOVT_PREL: |
| 12161 | /* Until we properly support segment-base-relative addressing then |
| 12162 | we assume the segment base to be zero, as for the group relocations. |
| 12163 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC |
| 12164 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ |
| 12165 | case R_ARM_MOVW_BREL_NC: |
| 12166 | case R_ARM_MOVW_BREL: |
| 12167 | case R_ARM_MOVT_BREL: |
| 12168 | { |
| 12169 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); |
| 12170 | |
| 12171 | if (globals->use_rel) |
| 12172 | { |
| 12173 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); |
| 12174 | signed_addend = (addend ^ 0x8000) - 0x8000; |
| 12175 | } |
| 12176 | |
| 12177 | value += signed_addend; |
| 12178 | |
| 12179 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) |
| 12180 | value -= (input_section->output_section->vma |
| 12181 | + input_section->output_offset + rel->r_offset); |
| 12182 | |
| 12183 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
| 12184 | return bfd_reloc_overflow; |
| 12185 | |
| 12186 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 12187 | value |= 1; |
| 12188 | |
| 12189 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL |
| 12190 | || r_type == R_ARM_MOVT_BREL) |
| 12191 | value >>= 16; |
| 12192 | |
| 12193 | insn &= 0xfff0f000; |
| 12194 | insn |= value & 0xfff; |
| 12195 | insn |= (value & 0xf000) << 4; |
| 12196 | bfd_put_32 (input_bfd, insn, hit_data); |
| 12197 | } |
| 12198 | return bfd_reloc_ok; |
| 12199 | |
| 12200 | case R_ARM_THM_MOVW_ABS_NC: |
| 12201 | case R_ARM_THM_MOVT_ABS: |
| 12202 | case R_ARM_THM_MOVW_PREL_NC: |
| 12203 | case R_ARM_THM_MOVT_PREL: |
| 12204 | /* Until we properly support segment-base-relative addressing then |
| 12205 | we assume the segment base to be zero, as for the above relocations. |
| 12206 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as |
| 12207 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics |
| 12208 | as R_ARM_THM_MOVT_ABS. */ |
| 12209 | case R_ARM_THM_MOVW_BREL_NC: |
| 12210 | case R_ARM_THM_MOVW_BREL: |
| 12211 | case R_ARM_THM_MOVT_BREL: |
| 12212 | { |
| 12213 | bfd_vma insn; |
| 12214 | |
| 12215 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
| 12216 | insn |= bfd_get_16 (input_bfd, hit_data + 2); |
| 12217 | |
| 12218 | if (globals->use_rel) |
| 12219 | { |
| 12220 | addend = ((insn >> 4) & 0xf000) |
| 12221 | | ((insn >> 15) & 0x0800) |
| 12222 | | ((insn >> 4) & 0x0700) |
| 12223 | | (insn & 0x00ff); |
| 12224 | signed_addend = (addend ^ 0x8000) - 0x8000; |
| 12225 | } |
| 12226 | |
| 12227 | value += signed_addend; |
| 12228 | |
| 12229 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) |
| 12230 | value -= (input_section->output_section->vma |
| 12231 | + input_section->output_offset + rel->r_offset); |
| 12232 | |
| 12233 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
| 12234 | return bfd_reloc_overflow; |
| 12235 | |
| 12236 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 12237 | value |= 1; |
| 12238 | |
| 12239 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL |
| 12240 | || r_type == R_ARM_THM_MOVT_BREL) |
| 12241 | value >>= 16; |
| 12242 | |
| 12243 | insn &= 0xfbf08f00; |
| 12244 | insn |= (value & 0xf000) << 4; |
| 12245 | insn |= (value & 0x0800) << 15; |
| 12246 | insn |= (value & 0x0700) << 4; |
| 12247 | insn |= (value & 0x00ff); |
| 12248 | |
| 12249 | bfd_put_16 (input_bfd, insn >> 16, hit_data); |
| 12250 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); |
| 12251 | } |
| 12252 | return bfd_reloc_ok; |
| 12253 | |
| 12254 | case R_ARM_ALU_PC_G0_NC: |
| 12255 | case R_ARM_ALU_PC_G1_NC: |
| 12256 | case R_ARM_ALU_PC_G0: |
| 12257 | case R_ARM_ALU_PC_G1: |
| 12258 | case R_ARM_ALU_PC_G2: |
| 12259 | case R_ARM_ALU_SB_G0_NC: |
| 12260 | case R_ARM_ALU_SB_G1_NC: |
| 12261 | case R_ARM_ALU_SB_G0: |
| 12262 | case R_ARM_ALU_SB_G1: |
| 12263 | case R_ARM_ALU_SB_G2: |
| 12264 | { |
| 12265 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); |
| 12266 | bfd_vma pc = input_section->output_section->vma |
| 12267 | + input_section->output_offset + rel->r_offset; |
| 12268 | /* sb is the origin of the *segment* containing the symbol. */ |
| 12269 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
| 12270 | bfd_vma residual; |
| 12271 | bfd_vma g_n; |
| 12272 | bfd_signed_vma signed_value; |
| 12273 | int group = 0; |
| 12274 | |
| 12275 | /* Determine which group of bits to select. */ |
| 12276 | switch (r_type) |
| 12277 | { |
| 12278 | case R_ARM_ALU_PC_G0_NC: |
| 12279 | case R_ARM_ALU_PC_G0: |
| 12280 | case R_ARM_ALU_SB_G0_NC: |
| 12281 | case R_ARM_ALU_SB_G0: |
| 12282 | group = 0; |
| 12283 | break; |
| 12284 | |
| 12285 | case R_ARM_ALU_PC_G1_NC: |
| 12286 | case R_ARM_ALU_PC_G1: |
| 12287 | case R_ARM_ALU_SB_G1_NC: |
| 12288 | case R_ARM_ALU_SB_G1: |
| 12289 | group = 1; |
| 12290 | break; |
| 12291 | |
| 12292 | case R_ARM_ALU_PC_G2: |
| 12293 | case R_ARM_ALU_SB_G2: |
| 12294 | group = 2; |
| 12295 | break; |
| 12296 | |
| 12297 | default: |
| 12298 | abort (); |
| 12299 | } |
| 12300 | |
| 12301 | /* If REL, extract the addend from the insn. If RELA, it will |
| 12302 | have already been fetched for us. */ |
| 12303 | if (globals->use_rel) |
| 12304 | { |
| 12305 | int negative; |
| 12306 | bfd_vma constant = insn & 0xff; |
| 12307 | bfd_vma rotation = (insn & 0xf00) >> 8; |
| 12308 | |
| 12309 | if (rotation == 0) |
| 12310 | signed_addend = constant; |
| 12311 | else |
| 12312 | { |
| 12313 | /* Compensate for the fact that in the instruction, the |
| 12314 | rotation is stored in multiples of 2 bits. */ |
| 12315 | rotation *= 2; |
| 12316 | |
| 12317 | /* Rotate "constant" right by "rotation" bits. */ |
| 12318 | signed_addend = (constant >> rotation) | |
| 12319 | (constant << (8 * sizeof (bfd_vma) - rotation)); |
| 12320 | } |
| 12321 | |
| 12322 | /* Determine if the instruction is an ADD or a SUB. |
| 12323 | (For REL, this determines the sign of the addend.) */ |
| 12324 | negative = identify_add_or_sub (insn); |
| 12325 | if (negative == 0) |
| 12326 | { |
| 12327 | _bfd_error_handler |
| 12328 | /* xgettext:c-format */ |
| 12329 | (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions " |
| 12330 | "are allowed for ALU group relocations"), |
| 12331 | input_bfd, input_section, (uint64_t) rel->r_offset); |
| 12332 | return bfd_reloc_overflow; |
| 12333 | } |
| 12334 | |
| 12335 | signed_addend *= negative; |
| 12336 | } |
| 12337 | |
| 12338 | /* Compute the value (X) to go in the place. */ |
| 12339 | if (r_type == R_ARM_ALU_PC_G0_NC |
| 12340 | || r_type == R_ARM_ALU_PC_G1_NC |
| 12341 | || r_type == R_ARM_ALU_PC_G0 |
| 12342 | || r_type == R_ARM_ALU_PC_G1 |
| 12343 | || r_type == R_ARM_ALU_PC_G2) |
| 12344 | /* PC relative. */ |
| 12345 | signed_value = value - pc + signed_addend; |
| 12346 | else |
| 12347 | /* Section base relative. */ |
| 12348 | signed_value = value - sb + signed_addend; |
| 12349 | |
| 12350 | /* If the target symbol is a Thumb function, then set the |
| 12351 | Thumb bit in the address. */ |
| 12352 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 12353 | signed_value |= 1; |
| 12354 | |
| 12355 | /* Calculate the value of the relevant G_n, in encoded |
| 12356 | constant-with-rotation format. */ |
| 12357 | g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
| 12358 | group, &residual); |
| 12359 | |
| 12360 | /* Check for overflow if required. */ |
| 12361 | if ((r_type == R_ARM_ALU_PC_G0 |
| 12362 | || r_type == R_ARM_ALU_PC_G1 |
| 12363 | || r_type == R_ARM_ALU_PC_G2 |
| 12364 | || r_type == R_ARM_ALU_SB_G0 |
| 12365 | || r_type == R_ARM_ALU_SB_G1 |
| 12366 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) |
| 12367 | { |
| 12368 | _bfd_error_handler |
| 12369 | /* xgettext:c-format */ |
| 12370 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
| 12371 | "splitting %#" PRIx64 " for group relocation %s"), |
| 12372 | input_bfd, input_section, (uint64_t) rel->r_offset, |
| 12373 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), |
| 12374 | howto->name); |
| 12375 | return bfd_reloc_overflow; |
| 12376 | } |
| 12377 | |
| 12378 | /* Mask out the value and the ADD/SUB part of the opcode; take care |
| 12379 | not to destroy the S bit. */ |
| 12380 | insn &= 0xff1ff000; |
| 12381 | |
| 12382 | /* Set the opcode according to whether the value to go in the |
| 12383 | place is negative. */ |
| 12384 | if (signed_value < 0) |
| 12385 | insn |= 1 << 22; |
| 12386 | else |
| 12387 | insn |= 1 << 23; |
| 12388 | |
| 12389 | /* Encode the offset. */ |
| 12390 | insn |= g_n; |
| 12391 | |
| 12392 | bfd_put_32 (input_bfd, insn, hit_data); |
| 12393 | } |
| 12394 | return bfd_reloc_ok; |
| 12395 | |
| 12396 | case R_ARM_LDR_PC_G0: |
| 12397 | case R_ARM_LDR_PC_G1: |
| 12398 | case R_ARM_LDR_PC_G2: |
| 12399 | case R_ARM_LDR_SB_G0: |
| 12400 | case R_ARM_LDR_SB_G1: |
| 12401 | case R_ARM_LDR_SB_G2: |
| 12402 | { |
| 12403 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); |
| 12404 | bfd_vma pc = input_section->output_section->vma |
| 12405 | + input_section->output_offset + rel->r_offset; |
| 12406 | /* sb is the origin of the *segment* containing the symbol. */ |
| 12407 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
| 12408 | bfd_vma residual; |
| 12409 | bfd_signed_vma signed_value; |
| 12410 | int group = 0; |
| 12411 | |
| 12412 | /* Determine which groups of bits to calculate. */ |
| 12413 | switch (r_type) |
| 12414 | { |
| 12415 | case R_ARM_LDR_PC_G0: |
| 12416 | case R_ARM_LDR_SB_G0: |
| 12417 | group = 0; |
| 12418 | break; |
| 12419 | |
| 12420 | case R_ARM_LDR_PC_G1: |
| 12421 | case R_ARM_LDR_SB_G1: |
| 12422 | group = 1; |
| 12423 | break; |
| 12424 | |
| 12425 | case R_ARM_LDR_PC_G2: |
| 12426 | case R_ARM_LDR_SB_G2: |
| 12427 | group = 2; |
| 12428 | break; |
| 12429 | |
| 12430 | default: |
| 12431 | abort (); |
| 12432 | } |
| 12433 | |
| 12434 | /* If REL, extract the addend from the insn. If RELA, it will |
| 12435 | have already been fetched for us. */ |
| 12436 | if (globals->use_rel) |
| 12437 | { |
| 12438 | int negative = (insn & (1 << 23)) ? 1 : -1; |
| 12439 | signed_addend = negative * (insn & 0xfff); |
| 12440 | } |
| 12441 | |
| 12442 | /* Compute the value (X) to go in the place. */ |
| 12443 | if (r_type == R_ARM_LDR_PC_G0 |
| 12444 | || r_type == R_ARM_LDR_PC_G1 |
| 12445 | || r_type == R_ARM_LDR_PC_G2) |
| 12446 | /* PC relative. */ |
| 12447 | signed_value = value - pc + signed_addend; |
| 12448 | else |
| 12449 | /* Section base relative. */ |
| 12450 | signed_value = value - sb + signed_addend; |
| 12451 | |
| 12452 | /* Calculate the value of the relevant G_{n-1} to obtain |
| 12453 | the residual at that stage. */ |
| 12454 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
| 12455 | group - 1, &residual); |
| 12456 | |
| 12457 | /* Check for overflow. */ |
| 12458 | if (residual >= 0x1000) |
| 12459 | { |
| 12460 | _bfd_error_handler |
| 12461 | /* xgettext:c-format */ |
| 12462 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
| 12463 | "splitting %#" PRIx64 " for group relocation %s"), |
| 12464 | input_bfd, input_section, (uint64_t) rel->r_offset, |
| 12465 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), |
| 12466 | howto->name); |
| 12467 | return bfd_reloc_overflow; |
| 12468 | } |
| 12469 | |
| 12470 | /* Mask out the value and U bit. */ |
| 12471 | insn &= 0xff7ff000; |
| 12472 | |
| 12473 | /* Set the U bit if the value to go in the place is non-negative. */ |
| 12474 | if (signed_value >= 0) |
| 12475 | insn |= 1 << 23; |
| 12476 | |
| 12477 | /* Encode the offset. */ |
| 12478 | insn |= residual; |
| 12479 | |
| 12480 | bfd_put_32 (input_bfd, insn, hit_data); |
| 12481 | } |
| 12482 | return bfd_reloc_ok; |
| 12483 | |
| 12484 | case R_ARM_LDRS_PC_G0: |
| 12485 | case R_ARM_LDRS_PC_G1: |
| 12486 | case R_ARM_LDRS_PC_G2: |
| 12487 | case R_ARM_LDRS_SB_G0: |
| 12488 | case R_ARM_LDRS_SB_G1: |
| 12489 | case R_ARM_LDRS_SB_G2: |
| 12490 | { |
| 12491 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); |
| 12492 | bfd_vma pc = input_section->output_section->vma |
| 12493 | + input_section->output_offset + rel->r_offset; |
| 12494 | /* sb is the origin of the *segment* containing the symbol. */ |
| 12495 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
| 12496 | bfd_vma residual; |
| 12497 | bfd_signed_vma signed_value; |
| 12498 | int group = 0; |
| 12499 | |
| 12500 | /* Determine which groups of bits to calculate. */ |
| 12501 | switch (r_type) |
| 12502 | { |
| 12503 | case R_ARM_LDRS_PC_G0: |
| 12504 | case R_ARM_LDRS_SB_G0: |
| 12505 | group = 0; |
| 12506 | break; |
| 12507 | |
| 12508 | case R_ARM_LDRS_PC_G1: |
| 12509 | case R_ARM_LDRS_SB_G1: |
| 12510 | group = 1; |
| 12511 | break; |
| 12512 | |
| 12513 | case R_ARM_LDRS_PC_G2: |
| 12514 | case R_ARM_LDRS_SB_G2: |
| 12515 | group = 2; |
| 12516 | break; |
| 12517 | |
| 12518 | default: |
| 12519 | abort (); |
| 12520 | } |
| 12521 | |
| 12522 | /* If REL, extract the addend from the insn. If RELA, it will |
| 12523 | have already been fetched for us. */ |
| 12524 | if (globals->use_rel) |
| 12525 | { |
| 12526 | int negative = (insn & (1 << 23)) ? 1 : -1; |
| 12527 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); |
| 12528 | } |
| 12529 | |
| 12530 | /* Compute the value (X) to go in the place. */ |
| 12531 | if (r_type == R_ARM_LDRS_PC_G0 |
| 12532 | || r_type == R_ARM_LDRS_PC_G1 |
| 12533 | || r_type == R_ARM_LDRS_PC_G2) |
| 12534 | /* PC relative. */ |
| 12535 | signed_value = value - pc + signed_addend; |
| 12536 | else |
| 12537 | /* Section base relative. */ |
| 12538 | signed_value = value - sb + signed_addend; |
| 12539 | |
| 12540 | /* Calculate the value of the relevant G_{n-1} to obtain |
| 12541 | the residual at that stage. */ |
| 12542 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
| 12543 | group - 1, &residual); |
| 12544 | |
| 12545 | /* Check for overflow. */ |
| 12546 | if (residual >= 0x100) |
| 12547 | { |
| 12548 | _bfd_error_handler |
| 12549 | /* xgettext:c-format */ |
| 12550 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
| 12551 | "splitting %#" PRIx64 " for group relocation %s"), |
| 12552 | input_bfd, input_section, (uint64_t) rel->r_offset, |
| 12553 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), |
| 12554 | howto->name); |
| 12555 | return bfd_reloc_overflow; |
| 12556 | } |
| 12557 | |
| 12558 | /* Mask out the value and U bit. */ |
| 12559 | insn &= 0xff7ff0f0; |
| 12560 | |
| 12561 | /* Set the U bit if the value to go in the place is non-negative. */ |
| 12562 | if (signed_value >= 0) |
| 12563 | insn |= 1 << 23; |
| 12564 | |
| 12565 | /* Encode the offset. */ |
| 12566 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); |
| 12567 | |
| 12568 | bfd_put_32 (input_bfd, insn, hit_data); |
| 12569 | } |
| 12570 | return bfd_reloc_ok; |
| 12571 | |
| 12572 | case R_ARM_LDC_PC_G0: |
| 12573 | case R_ARM_LDC_PC_G1: |
| 12574 | case R_ARM_LDC_PC_G2: |
| 12575 | case R_ARM_LDC_SB_G0: |
| 12576 | case R_ARM_LDC_SB_G1: |
| 12577 | case R_ARM_LDC_SB_G2: |
| 12578 | { |
| 12579 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); |
| 12580 | bfd_vma pc = input_section->output_section->vma |
| 12581 | + input_section->output_offset + rel->r_offset; |
| 12582 | /* sb is the origin of the *segment* containing the symbol. */ |
| 12583 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
| 12584 | bfd_vma residual; |
| 12585 | bfd_signed_vma signed_value; |
| 12586 | int group = 0; |
| 12587 | |
| 12588 | /* Determine which groups of bits to calculate. */ |
| 12589 | switch (r_type) |
| 12590 | { |
| 12591 | case R_ARM_LDC_PC_G0: |
| 12592 | case R_ARM_LDC_SB_G0: |
| 12593 | group = 0; |
| 12594 | break; |
| 12595 | |
| 12596 | case R_ARM_LDC_PC_G1: |
| 12597 | case R_ARM_LDC_SB_G1: |
| 12598 | group = 1; |
| 12599 | break; |
| 12600 | |
| 12601 | case R_ARM_LDC_PC_G2: |
| 12602 | case R_ARM_LDC_SB_G2: |
| 12603 | group = 2; |
| 12604 | break; |
| 12605 | |
| 12606 | default: |
| 12607 | abort (); |
| 12608 | } |
| 12609 | |
| 12610 | /* If REL, extract the addend from the insn. If RELA, it will |
| 12611 | have already been fetched for us. */ |
| 12612 | if (globals->use_rel) |
| 12613 | { |
| 12614 | int negative = (insn & (1 << 23)) ? 1 : -1; |
| 12615 | signed_addend = negative * ((insn & 0xff) << 2); |
| 12616 | } |
| 12617 | |
| 12618 | /* Compute the value (X) to go in the place. */ |
| 12619 | if (r_type == R_ARM_LDC_PC_G0 |
| 12620 | || r_type == R_ARM_LDC_PC_G1 |
| 12621 | || r_type == R_ARM_LDC_PC_G2) |
| 12622 | /* PC relative. */ |
| 12623 | signed_value = value - pc + signed_addend; |
| 12624 | else |
| 12625 | /* Section base relative. */ |
| 12626 | signed_value = value - sb + signed_addend; |
| 12627 | |
| 12628 | /* Calculate the value of the relevant G_{n-1} to obtain |
| 12629 | the residual at that stage. */ |
| 12630 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
| 12631 | group - 1, &residual); |
| 12632 | |
| 12633 | /* Check for overflow. (The absolute value to go in the place must be |
| 12634 | divisible by four and, after having been divided by four, must |
| 12635 | fit in eight bits.) */ |
| 12636 | if ((residual & 0x3) != 0 || residual >= 0x400) |
| 12637 | { |
| 12638 | _bfd_error_handler |
| 12639 | /* xgettext:c-format */ |
| 12640 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
| 12641 | "splitting %#" PRIx64 " for group relocation %s"), |
| 12642 | input_bfd, input_section, (uint64_t) rel->r_offset, |
| 12643 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), |
| 12644 | howto->name); |
| 12645 | return bfd_reloc_overflow; |
| 12646 | } |
| 12647 | |
| 12648 | /* Mask out the value and U bit. */ |
| 12649 | insn &= 0xff7fff00; |
| 12650 | |
| 12651 | /* Set the U bit if the value to go in the place is non-negative. */ |
| 12652 | if (signed_value >= 0) |
| 12653 | insn |= 1 << 23; |
| 12654 | |
| 12655 | /* Encode the offset. */ |
| 12656 | insn |= residual >> 2; |
| 12657 | |
| 12658 | bfd_put_32 (input_bfd, insn, hit_data); |
| 12659 | } |
| 12660 | return bfd_reloc_ok; |
| 12661 | |
| 12662 | case R_ARM_THM_ALU_ABS_G0_NC: |
| 12663 | case R_ARM_THM_ALU_ABS_G1_NC: |
| 12664 | case R_ARM_THM_ALU_ABS_G2_NC: |
| 12665 | case R_ARM_THM_ALU_ABS_G3_NC: |
| 12666 | { |
| 12667 | const int shift_array[4] = {0, 8, 16, 24}; |
| 12668 | bfd_vma insn = bfd_get_16 (input_bfd, hit_data); |
| 12669 | bfd_vma addr = value; |
| 12670 | int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC]; |
| 12671 | |
| 12672 | /* Compute address. */ |
| 12673 | if (globals->use_rel) |
| 12674 | signed_addend = insn & 0xff; |
| 12675 | addr += signed_addend; |
| 12676 | if (branch_type == ST_BRANCH_TO_THUMB) |
| 12677 | addr |= 1; |
| 12678 | /* Clean imm8 insn. */ |
| 12679 | insn &= 0xff00; |
| 12680 | /* And update with correct part of address. */ |
| 12681 | insn |= (addr >> shift) & 0xff; |
| 12682 | /* Update insn. */ |
| 12683 | bfd_put_16 (input_bfd, insn, hit_data); |
| 12684 | } |
| 12685 | |
| 12686 | *unresolved_reloc_p = FALSE; |
| 12687 | return bfd_reloc_ok; |
| 12688 | |
| 12689 | case R_ARM_GOTOFFFUNCDESC: |
| 12690 | { |
| 12691 | if (h == NULL) |
| 12692 | { |
| 12693 | struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd); |
| 12694 | int dynindx = elf_section_data (sym_sec->output_section)->dynindx; |
| 12695 | int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1; |
| 12696 | bfd_vma addr = dynreloc_value - sym_sec->output_section->vma; |
| 12697 | bfd_vma seg = -1; |
| 12698 | |
| 12699 | if (bfd_link_pic(info) && dynindx == 0) |
| 12700 | abort(); |
| 12701 | |
| 12702 | /* Resolve relocation. */ |
| 12703 | bfd_put_32(output_bfd, (offset + sgot->output_offset) |
| 12704 | , contents + rel->r_offset); |
| 12705 | /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if |
| 12706 | not done yet. */ |
| 12707 | arm_elf_fill_funcdesc(output_bfd, info, |
| 12708 | &local_fdpic_cnts[r_symndx].funcdesc_offset, |
| 12709 | dynindx, offset, addr, dynreloc_value, seg); |
| 12710 | } |
| 12711 | else |
| 12712 | { |
| 12713 | int dynindx; |
| 12714 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; |
| 12715 | bfd_vma addr; |
| 12716 | bfd_vma seg = -1; |
| 12717 | |
| 12718 | /* For static binaries, sym_sec can be null. */ |
| 12719 | if (sym_sec) |
| 12720 | { |
| 12721 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; |
| 12722 | addr = dynreloc_value - sym_sec->output_section->vma; |
| 12723 | } |
| 12724 | else |
| 12725 | { |
| 12726 | dynindx = 0; |
| 12727 | addr = 0; |
| 12728 | } |
| 12729 | |
| 12730 | if (bfd_link_pic(info) && dynindx == 0) |
| 12731 | abort(); |
| 12732 | |
| 12733 | /* This case cannot occur since funcdesc is allocated by |
| 12734 | the dynamic loader so we cannot resolve the relocation. */ |
| 12735 | if (h->dynindx != -1) |
| 12736 | abort(); |
| 12737 | |
| 12738 | /* Resolve relocation. */ |
| 12739 | bfd_put_32(output_bfd, (offset + sgot->output_offset), |
| 12740 | contents + rel->r_offset); |
| 12741 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ |
| 12742 | arm_elf_fill_funcdesc(output_bfd, info, |
| 12743 | &eh->fdpic_cnts.funcdesc_offset, |
| 12744 | dynindx, offset, addr, dynreloc_value, seg); |
| 12745 | } |
| 12746 | } |
| 12747 | *unresolved_reloc_p = FALSE; |
| 12748 | return bfd_reloc_ok; |
| 12749 | |
| 12750 | case R_ARM_GOTFUNCDESC: |
| 12751 | { |
| 12752 | if (h != NULL) |
| 12753 | { |
| 12754 | Elf_Internal_Rela outrel; |
| 12755 | |
| 12756 | /* Resolve relocation. */ |
| 12757 | bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1) |
| 12758 | + sgot->output_offset), |
| 12759 | contents + rel->r_offset); |
| 12760 | /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */ |
| 12761 | if(h->dynindx == -1) |
| 12762 | { |
| 12763 | int dynindx; |
| 12764 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; |
| 12765 | bfd_vma addr; |
| 12766 | bfd_vma seg = -1; |
| 12767 | |
| 12768 | /* For static binaries sym_sec can be null. */ |
| 12769 | if (sym_sec) |
| 12770 | { |
| 12771 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; |
| 12772 | addr = dynreloc_value - sym_sec->output_section->vma; |
| 12773 | } |
| 12774 | else |
| 12775 | { |
| 12776 | dynindx = 0; |
| 12777 | addr = 0; |
| 12778 | } |
| 12779 | |
| 12780 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ |
| 12781 | arm_elf_fill_funcdesc(output_bfd, info, |
| 12782 | &eh->fdpic_cnts.funcdesc_offset, |
| 12783 | dynindx, offset, addr, dynreloc_value, seg); |
| 12784 | } |
| 12785 | |
| 12786 | /* Add a dynamic relocation on GOT entry if not already done. */ |
| 12787 | if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0) |
| 12788 | { |
| 12789 | if (h->dynindx == -1) |
| 12790 | { |
| 12791 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
| 12792 | if (h->root.type == bfd_link_hash_undefweak) |
| 12793 | bfd_put_32(output_bfd, 0, sgot->contents |
| 12794 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1)); |
| 12795 | else |
| 12796 | bfd_put_32(output_bfd, sgot->output_section->vma |
| 12797 | + sgot->output_offset |
| 12798 | + (eh->fdpic_cnts.funcdesc_offset & ~1), |
| 12799 | sgot->contents |
| 12800 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1)); |
| 12801 | } |
| 12802 | else |
| 12803 | { |
| 12804 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC); |
| 12805 | } |
| 12806 | outrel.r_offset = sgot->output_section->vma |
| 12807 | + sgot->output_offset |
| 12808 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1); |
| 12809 | outrel.r_addend = 0; |
| 12810 | if (h->dynindx == -1 && !bfd_link_pic(info)) |
| 12811 | if (h->root.type == bfd_link_hash_undefweak) |
| 12812 | arm_elf_add_rofixup(output_bfd, globals->srofixup, -1); |
| 12813 | else |
| 12814 | arm_elf_add_rofixup(output_bfd, globals->srofixup, |
| 12815 | outrel.r_offset); |
| 12816 | else |
| 12817 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 12818 | eh->fdpic_cnts.gotfuncdesc_offset |= 1; |
| 12819 | } |
| 12820 | } |
| 12821 | else |
| 12822 | { |
| 12823 | /* Such relocation on static function should not have been |
| 12824 | emitted by the compiler. */ |
| 12825 | abort(); |
| 12826 | } |
| 12827 | } |
| 12828 | *unresolved_reloc_p = FALSE; |
| 12829 | return bfd_reloc_ok; |
| 12830 | |
| 12831 | case R_ARM_FUNCDESC: |
| 12832 | { |
| 12833 | if (h == NULL) |
| 12834 | { |
| 12835 | struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd); |
| 12836 | Elf_Internal_Rela outrel; |
| 12837 | int dynindx = elf_section_data (sym_sec->output_section)->dynindx; |
| 12838 | int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1; |
| 12839 | bfd_vma addr = dynreloc_value - sym_sec->output_section->vma; |
| 12840 | bfd_vma seg = -1; |
| 12841 | |
| 12842 | if (bfd_link_pic(info) && dynindx == 0) |
| 12843 | abort(); |
| 12844 | |
| 12845 | /* Replace static FUNCDESC relocation with a |
| 12846 | R_ARM_RELATIVE dynamic relocation or with a rofixup for |
| 12847 | executable. */ |
| 12848 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
| 12849 | outrel.r_offset = input_section->output_section->vma |
| 12850 | + input_section->output_offset + rel->r_offset; |
| 12851 | outrel.r_addend = 0; |
| 12852 | if (bfd_link_pic(info)) |
| 12853 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 12854 | else |
| 12855 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); |
| 12856 | |
| 12857 | bfd_put_32 (input_bfd, sgot->output_section->vma |
| 12858 | + sgot->output_offset + offset, hit_data); |
| 12859 | |
| 12860 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ |
| 12861 | arm_elf_fill_funcdesc(output_bfd, info, |
| 12862 | &local_fdpic_cnts[r_symndx].funcdesc_offset, |
| 12863 | dynindx, offset, addr, dynreloc_value, seg); |
| 12864 | } |
| 12865 | else |
| 12866 | { |
| 12867 | if (h->dynindx == -1) |
| 12868 | { |
| 12869 | int dynindx; |
| 12870 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; |
| 12871 | bfd_vma addr; |
| 12872 | bfd_vma seg = -1; |
| 12873 | Elf_Internal_Rela outrel; |
| 12874 | |
| 12875 | /* For static binaries sym_sec can be null. */ |
| 12876 | if (sym_sec) |
| 12877 | { |
| 12878 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; |
| 12879 | addr = dynreloc_value - sym_sec->output_section->vma; |
| 12880 | } |
| 12881 | else |
| 12882 | { |
| 12883 | dynindx = 0; |
| 12884 | addr = 0; |
| 12885 | } |
| 12886 | |
| 12887 | if (bfd_link_pic(info) && dynindx == 0) |
| 12888 | abort(); |
| 12889 | |
| 12890 | /* Replace static FUNCDESC relocation with a |
| 12891 | R_ARM_RELATIVE dynamic relocation. */ |
| 12892 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
| 12893 | outrel.r_offset = input_section->output_section->vma |
| 12894 | + input_section->output_offset + rel->r_offset; |
| 12895 | outrel.r_addend = 0; |
| 12896 | if (bfd_link_pic(info)) |
| 12897 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 12898 | else |
| 12899 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); |
| 12900 | |
| 12901 | bfd_put_32 (input_bfd, sgot->output_section->vma |
| 12902 | + sgot->output_offset + offset, hit_data); |
| 12903 | |
| 12904 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ |
| 12905 | arm_elf_fill_funcdesc(output_bfd, info, |
| 12906 | &eh->fdpic_cnts.funcdesc_offset, |
| 12907 | dynindx, offset, addr, dynreloc_value, seg); |
| 12908 | } |
| 12909 | else |
| 12910 | { |
| 12911 | Elf_Internal_Rela outrel; |
| 12912 | |
| 12913 | /* Add a dynamic relocation. */ |
| 12914 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC); |
| 12915 | outrel.r_offset = input_section->output_section->vma |
| 12916 | + input_section->output_offset + rel->r_offset; |
| 12917 | outrel.r_addend = 0; |
| 12918 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
| 12919 | } |
| 12920 | } |
| 12921 | } |
| 12922 | *unresolved_reloc_p = FALSE; |
| 12923 | return bfd_reloc_ok; |
| 12924 | |
| 12925 | case R_ARM_THM_BF16: |
| 12926 | { |
| 12927 | bfd_vma relocation; |
| 12928 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
| 12929 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); |
| 12930 | |
| 12931 | if (globals->use_rel) |
| 12932 | { |
| 12933 | bfd_vma immA = (upper_insn & 0x001f); |
| 12934 | bfd_vma immB = (lower_insn & 0x07fe) >> 1; |
| 12935 | bfd_vma immC = (lower_insn & 0x0800) >> 11; |
| 12936 | addend = (immA << 12); |
| 12937 | addend |= (immB << 2); |
| 12938 | addend |= (immC << 1); |
| 12939 | addend |= 1; |
| 12940 | /* Sign extend. */ |
| 12941 | signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend; |
| 12942 | } |
| 12943 | |
| 12944 | relocation = value + signed_addend; |
| 12945 | relocation -= (input_section->output_section->vma |
| 12946 | + input_section->output_offset |
| 12947 | + rel->r_offset); |
| 12948 | |
| 12949 | /* Put RELOCATION back into the insn. */ |
| 12950 | { |
| 12951 | bfd_vma immA = (relocation & 0x0001f000) >> 12; |
| 12952 | bfd_vma immB = (relocation & 0x00000ffc) >> 2; |
| 12953 | bfd_vma immC = (relocation & 0x00000002) >> 1; |
| 12954 | |
| 12955 | upper_insn = (upper_insn & 0xffe0) | immA; |
| 12956 | lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1); |
| 12957 | } |
| 12958 | |
| 12959 | /* Put the relocated value back in the object file: */ |
| 12960 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
| 12961 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); |
| 12962 | |
| 12963 | return bfd_reloc_ok; |
| 12964 | } |
| 12965 | |
| 12966 | case R_ARM_THM_BF12: |
| 12967 | { |
| 12968 | bfd_vma relocation; |
| 12969 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
| 12970 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); |
| 12971 | |
| 12972 | if (globals->use_rel) |
| 12973 | { |
| 12974 | bfd_vma immA = (upper_insn & 0x0001); |
| 12975 | bfd_vma immB = (lower_insn & 0x07fe) >> 1; |
| 12976 | bfd_vma immC = (lower_insn & 0x0800) >> 11; |
| 12977 | addend = (immA << 12); |
| 12978 | addend |= (immB << 2); |
| 12979 | addend |= (immC << 1); |
| 12980 | addend |= 1; |
| 12981 | /* Sign extend. */ |
| 12982 | addend = (addend & 0x1000) ? addend - (1 << 13) : addend; |
| 12983 | signed_addend = addend; |
| 12984 | } |
| 12985 | |
| 12986 | relocation = value + signed_addend; |
| 12987 | relocation -= (input_section->output_section->vma |
| 12988 | + input_section->output_offset |
| 12989 | + rel->r_offset); |
| 12990 | |
| 12991 | /* Put RELOCATION back into the insn. */ |
| 12992 | { |
| 12993 | bfd_vma immA = (relocation & 0x00001000) >> 12; |
| 12994 | bfd_vma immB = (relocation & 0x00000ffc) >> 2; |
| 12995 | bfd_vma immC = (relocation & 0x00000002) >> 1; |
| 12996 | |
| 12997 | upper_insn = (upper_insn & 0xfffe) | immA; |
| 12998 | lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1); |
| 12999 | } |
| 13000 | |
| 13001 | /* Put the relocated value back in the object file: */ |
| 13002 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
| 13003 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); |
| 13004 | |
| 13005 | return bfd_reloc_ok; |
| 13006 | } |
| 13007 | |
| 13008 | case R_ARM_THM_BF18: |
| 13009 | { |
| 13010 | bfd_vma relocation; |
| 13011 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); |
| 13012 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); |
| 13013 | |
| 13014 | if (globals->use_rel) |
| 13015 | { |
| 13016 | bfd_vma immA = (upper_insn & 0x007f); |
| 13017 | bfd_vma immB = (lower_insn & 0x07fe) >> 1; |
| 13018 | bfd_vma immC = (lower_insn & 0x0800) >> 11; |
| 13019 | addend = (immA << 12); |
| 13020 | addend |= (immB << 2); |
| 13021 | addend |= (immC << 1); |
| 13022 | addend |= 1; |
| 13023 | /* Sign extend. */ |
| 13024 | addend = (addend & 0x40000) ? addend - (1 << 19) : addend; |
| 13025 | signed_addend = addend; |
| 13026 | } |
| 13027 | |
| 13028 | relocation = value + signed_addend; |
| 13029 | relocation -= (input_section->output_section->vma |
| 13030 | + input_section->output_offset |
| 13031 | + rel->r_offset); |
| 13032 | |
| 13033 | /* Put RELOCATION back into the insn. */ |
| 13034 | { |
| 13035 | bfd_vma immA = (relocation & 0x0007f000) >> 12; |
| 13036 | bfd_vma immB = (relocation & 0x00000ffc) >> 2; |
| 13037 | bfd_vma immC = (relocation & 0x00000002) >> 1; |
| 13038 | |
| 13039 | upper_insn = (upper_insn & 0xff80) | immA; |
| 13040 | lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1); |
| 13041 | } |
| 13042 | |
| 13043 | /* Put the relocated value back in the object file: */ |
| 13044 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
| 13045 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); |
| 13046 | |
| 13047 | return bfd_reloc_ok; |
| 13048 | } |
| 13049 | |
| 13050 | default: |
| 13051 | return bfd_reloc_notsupported; |
| 13052 | } |
| 13053 | } |
| 13054 | |
| 13055 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
| 13056 | static void |
| 13057 | arm_add_to_rel (bfd * abfd, |
| 13058 | bfd_byte * address, |
| 13059 | reloc_howto_type * howto, |
| 13060 | bfd_signed_vma increment) |
| 13061 | { |
| 13062 | bfd_signed_vma addend; |
| 13063 | |
| 13064 | if (howto->type == R_ARM_THM_CALL |
| 13065 | || howto->type == R_ARM_THM_JUMP24) |
| 13066 | { |
| 13067 | int upper_insn, lower_insn; |
| 13068 | int upper, lower; |
| 13069 | |
| 13070 | upper_insn = bfd_get_16 (abfd, address); |
| 13071 | lower_insn = bfd_get_16 (abfd, address + 2); |
| 13072 | upper = upper_insn & 0x7ff; |
| 13073 | lower = lower_insn & 0x7ff; |
| 13074 | |
| 13075 | addend = (upper << 12) | (lower << 1); |
| 13076 | addend += increment; |
| 13077 | addend >>= 1; |
| 13078 | |
| 13079 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
| 13080 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); |
| 13081 | |
| 13082 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
| 13083 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); |
| 13084 | } |
| 13085 | else |
| 13086 | { |
| 13087 | bfd_vma contents; |
| 13088 | |
| 13089 | contents = bfd_get_32 (abfd, address); |
| 13090 | |
| 13091 | /* Get the (signed) value from the instruction. */ |
| 13092 | addend = contents & howto->src_mask; |
| 13093 | if (addend & ((howto->src_mask + 1) >> 1)) |
| 13094 | { |
| 13095 | bfd_signed_vma mask; |
| 13096 | |
| 13097 | mask = -1; |
| 13098 | mask &= ~ howto->src_mask; |
| 13099 | addend |= mask; |
| 13100 | } |
| 13101 | |
| 13102 | /* Add in the increment, (which is a byte value). */ |
| 13103 | switch (howto->type) |
| 13104 | { |
| 13105 | default: |
| 13106 | addend += increment; |
| 13107 | break; |
| 13108 | |
| 13109 | case R_ARM_PC24: |
| 13110 | case R_ARM_PLT32: |
| 13111 | case R_ARM_CALL: |
| 13112 | case R_ARM_JUMP24: |
| 13113 | addend <<= howto->size; |
| 13114 | addend += increment; |
| 13115 | |
| 13116 | /* Should we check for overflow here ? */ |
| 13117 | |
| 13118 | /* Drop any undesired bits. */ |
| 13119 | addend >>= howto->rightshift; |
| 13120 | break; |
| 13121 | } |
| 13122 | |
| 13123 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); |
| 13124 | |
| 13125 | bfd_put_32 (abfd, contents, address); |
| 13126 | } |
| 13127 | } |
| 13128 | |
| 13129 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
| 13130 | ((R_TYPE) == R_ARM_TLS_GD32 \ |
| 13131 | || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \ |
| 13132 | || (R_TYPE) == R_ARM_TLS_LDO32 \ |
| 13133 | || (R_TYPE) == R_ARM_TLS_LDM32 \ |
| 13134 | || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \ |
| 13135 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ |
| 13136 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ |
| 13137 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ |
| 13138 | || (R_TYPE) == R_ARM_TLS_LE32 \ |
| 13139 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
| 13140 | || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \ |
| 13141 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) |
| 13142 | |
| 13143 | /* Specific set of relocations for the gnu tls dialect. */ |
| 13144 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ |
| 13145 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ |
| 13146 | || (R_TYPE) == R_ARM_TLS_CALL \ |
| 13147 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ |
| 13148 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ |
| 13149 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) |
| 13150 | |
| 13151 | /* Relocate an ARM ELF section. */ |
| 13152 | |
| 13153 | static bfd_boolean |
| 13154 | elf32_arm_relocate_section (bfd * output_bfd, |
| 13155 | struct bfd_link_info * info, |
| 13156 | bfd * input_bfd, |
| 13157 | asection * input_section, |
| 13158 | bfd_byte * contents, |
| 13159 | Elf_Internal_Rela * relocs, |
| 13160 | Elf_Internal_Sym * local_syms, |
| 13161 | asection ** local_sections) |
| 13162 | { |
| 13163 | Elf_Internal_Shdr *symtab_hdr; |
| 13164 | struct elf_link_hash_entry **sym_hashes; |
| 13165 | Elf_Internal_Rela *rel; |
| 13166 | Elf_Internal_Rela *relend; |
| 13167 | const char *name; |
| 13168 | struct elf32_arm_link_hash_table * globals; |
| 13169 | |
| 13170 | globals = elf32_arm_hash_table (info); |
| 13171 | if (globals == NULL) |
| 13172 | return FALSE; |
| 13173 | |
| 13174 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
| 13175 | sym_hashes = elf_sym_hashes (input_bfd); |
| 13176 | |
| 13177 | rel = relocs; |
| 13178 | relend = relocs + input_section->reloc_count; |
| 13179 | for (; rel < relend; rel++) |
| 13180 | { |
| 13181 | int r_type; |
| 13182 | reloc_howto_type * howto; |
| 13183 | unsigned long r_symndx; |
| 13184 | Elf_Internal_Sym * sym; |
| 13185 | asection * sec; |
| 13186 | struct elf_link_hash_entry * h; |
| 13187 | bfd_vma relocation; |
| 13188 | bfd_reloc_status_type r; |
| 13189 | arelent bfd_reloc; |
| 13190 | char sym_type; |
| 13191 | bfd_boolean unresolved_reloc = FALSE; |
| 13192 | char *error_message = NULL; |
| 13193 | |
| 13194 | r_symndx = ELF32_R_SYM (rel->r_info); |
| 13195 | r_type = ELF32_R_TYPE (rel->r_info); |
| 13196 | r_type = arm_real_reloc_type (globals, r_type); |
| 13197 | |
| 13198 | if ( r_type == R_ARM_GNU_VTENTRY |
| 13199 | || r_type == R_ARM_GNU_VTINHERIT) |
| 13200 | continue; |
| 13201 | |
| 13202 | howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
| 13203 | |
| 13204 | if (howto == NULL) |
| 13205 | return _bfd_unrecognized_reloc (input_bfd, input_section, r_type); |
| 13206 | |
| 13207 | h = NULL; |
| 13208 | sym = NULL; |
| 13209 | sec = NULL; |
| 13210 | |
| 13211 | if (r_symndx < symtab_hdr->sh_info) |
| 13212 | { |
| 13213 | sym = local_syms + r_symndx; |
| 13214 | sym_type = ELF32_ST_TYPE (sym->st_info); |
| 13215 | sec = local_sections[r_symndx]; |
| 13216 | |
| 13217 | /* An object file might have a reference to a local |
| 13218 | undefined symbol. This is a daft object file, but we |
| 13219 | should at least do something about it. V4BX & NONE |
| 13220 | relocations do not use the symbol and are explicitly |
| 13221 | allowed to use the undefined symbol, so allow those. |
| 13222 | Likewise for relocations against STN_UNDEF. */ |
| 13223 | if (r_type != R_ARM_V4BX |
| 13224 | && r_type != R_ARM_NONE |
| 13225 | && r_symndx != STN_UNDEF |
| 13226 | && bfd_is_und_section (sec) |
| 13227 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) |
| 13228 | (*info->callbacks->undefined_symbol) |
| 13229 | (info, bfd_elf_string_from_elf_section |
| 13230 | (input_bfd, symtab_hdr->sh_link, sym->st_name), |
| 13231 | input_bfd, input_section, |
| 13232 | rel->r_offset, TRUE); |
| 13233 | |
| 13234 | if (globals->use_rel) |
| 13235 | { |
| 13236 | relocation = (sec->output_section->vma |
| 13237 | + sec->output_offset |
| 13238 | + sym->st_value); |
| 13239 | if (!bfd_link_relocatable (info) |
| 13240 | && (sec->flags & SEC_MERGE) |
| 13241 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) |
| 13242 | { |
| 13243 | asection *msec; |
| 13244 | bfd_vma addend, value; |
| 13245 | |
| 13246 | switch (r_type) |
| 13247 | { |
| 13248 | case R_ARM_MOVW_ABS_NC: |
| 13249 | case R_ARM_MOVT_ABS: |
| 13250 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); |
| 13251 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); |
| 13252 | addend = (addend ^ 0x8000) - 0x8000; |
| 13253 | break; |
| 13254 | |
| 13255 | case R_ARM_THM_MOVW_ABS_NC: |
| 13256 | case R_ARM_THM_MOVT_ABS: |
| 13257 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) |
| 13258 | << 16; |
| 13259 | value |= bfd_get_16 (input_bfd, |
| 13260 | contents + rel->r_offset + 2); |
| 13261 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) |
| 13262 | | ((value & 0x04000000) >> 15); |
| 13263 | addend = (addend ^ 0x8000) - 0x8000; |
| 13264 | break; |
| 13265 | |
| 13266 | default: |
| 13267 | if (howto->rightshift |
| 13268 | || (howto->src_mask & (howto->src_mask + 1))) |
| 13269 | { |
| 13270 | _bfd_error_handler |
| 13271 | /* xgettext:c-format */ |
| 13272 | (_("%pB(%pA+%#" PRIx64 "): " |
| 13273 | "%s relocation against SEC_MERGE section"), |
| 13274 | input_bfd, input_section, |
| 13275 | (uint64_t) rel->r_offset, howto->name); |
| 13276 | return FALSE; |
| 13277 | } |
| 13278 | |
| 13279 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); |
| 13280 | |
| 13281 | /* Get the (signed) value from the instruction. */ |
| 13282 | addend = value & howto->src_mask; |
| 13283 | if (addend & ((howto->src_mask + 1) >> 1)) |
| 13284 | { |
| 13285 | bfd_signed_vma mask; |
| 13286 | |
| 13287 | mask = -1; |
| 13288 | mask &= ~ howto->src_mask; |
| 13289 | addend |= mask; |
| 13290 | } |
| 13291 | break; |
| 13292 | } |
| 13293 | |
| 13294 | msec = sec; |
| 13295 | addend = |
| 13296 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) |
| 13297 | - relocation; |
| 13298 | addend += msec->output_section->vma + msec->output_offset; |
| 13299 | |
| 13300 | /* Cases here must match those in the preceding |
| 13301 | switch statement. */ |
| 13302 | switch (r_type) |
| 13303 | { |
| 13304 | case R_ARM_MOVW_ABS_NC: |
| 13305 | case R_ARM_MOVT_ABS: |
| 13306 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) |
| 13307 | | (addend & 0xfff); |
| 13308 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); |
| 13309 | break; |
| 13310 | |
| 13311 | case R_ARM_THM_MOVW_ABS_NC: |
| 13312 | case R_ARM_THM_MOVT_ABS: |
| 13313 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) |
| 13314 | | (addend & 0xff) | ((addend & 0x0800) << 15); |
| 13315 | bfd_put_16 (input_bfd, value >> 16, |
| 13316 | contents + rel->r_offset); |
| 13317 | bfd_put_16 (input_bfd, value, |
| 13318 | contents + rel->r_offset + 2); |
| 13319 | break; |
| 13320 | |
| 13321 | default: |
| 13322 | value = (value & ~ howto->dst_mask) |
| 13323 | | (addend & howto->dst_mask); |
| 13324 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); |
| 13325 | break; |
| 13326 | } |
| 13327 | } |
| 13328 | } |
| 13329 | else |
| 13330 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
| 13331 | } |
| 13332 | else |
| 13333 | { |
| 13334 | bfd_boolean warned, ignored; |
| 13335 | |
| 13336 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
| 13337 | r_symndx, symtab_hdr, sym_hashes, |
| 13338 | h, sec, relocation, |
| 13339 | unresolved_reloc, warned, ignored); |
| 13340 | |
| 13341 | sym_type = h->type; |
| 13342 | } |
| 13343 | |
| 13344 | if (sec != NULL && discarded_section (sec)) |
| 13345 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
| 13346 | rel, 1, relend, howto, 0, contents); |
| 13347 | |
| 13348 | if (bfd_link_relocatable (info)) |
| 13349 | { |
| 13350 | /* This is a relocatable link. We don't have to change |
| 13351 | anything, unless the reloc is against a section symbol, |
| 13352 | in which case we have to adjust according to where the |
| 13353 | section symbol winds up in the output section. */ |
| 13354 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) |
| 13355 | { |
| 13356 | if (globals->use_rel) |
| 13357 | arm_add_to_rel (input_bfd, contents + rel->r_offset, |
| 13358 | howto, (bfd_signed_vma) sec->output_offset); |
| 13359 | else |
| 13360 | rel->r_addend += sec->output_offset; |
| 13361 | } |
| 13362 | continue; |
| 13363 | } |
| 13364 | |
| 13365 | if (h != NULL) |
| 13366 | name = h->root.root.string; |
| 13367 | else |
| 13368 | { |
| 13369 | name = (bfd_elf_string_from_elf_section |
| 13370 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); |
| 13371 | if (name == NULL || *name == '\0') |
| 13372 | name = bfd_section_name (input_bfd, sec); |
| 13373 | } |
| 13374 | |
| 13375 | if (r_symndx != STN_UNDEF |
| 13376 | && r_type != R_ARM_NONE |
| 13377 | && (h == NULL |
| 13378 | || h->root.type == bfd_link_hash_defined |
| 13379 | || h->root.type == bfd_link_hash_defweak) |
| 13380 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) |
| 13381 | { |
| 13382 | _bfd_error_handler |
| 13383 | ((sym_type == STT_TLS |
| 13384 | /* xgettext:c-format */ |
| 13385 | ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s") |
| 13386 | /* xgettext:c-format */ |
| 13387 | : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")), |
| 13388 | input_bfd, |
| 13389 | input_section, |
| 13390 | (uint64_t) rel->r_offset, |
| 13391 | howto->name, |
| 13392 | name); |
| 13393 | } |
| 13394 | |
| 13395 | /* We call elf32_arm_final_link_relocate unless we're completely |
| 13396 | done, i.e., the relaxation produced the final output we want, |
| 13397 | and we won't let anybody mess with it. Also, we have to do |
| 13398 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation |
| 13399 | both in relaxed and non-relaxed cases. */ |
| 13400 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) |
| 13401 | || (IS_ARM_TLS_GNU_RELOC (r_type) |
| 13402 | && !((h ? elf32_arm_hash_entry (h)->tls_type : |
| 13403 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) |
| 13404 | & GOT_TLS_GDESC))) |
| 13405 | { |
| 13406 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, |
| 13407 | contents, rel, h == NULL); |
| 13408 | /* This may have been marked unresolved because it came from |
| 13409 | a shared library. But we've just dealt with that. */ |
| 13410 | unresolved_reloc = 0; |
| 13411 | } |
| 13412 | else |
| 13413 | r = bfd_reloc_continue; |
| 13414 | |
| 13415 | if (r == bfd_reloc_continue) |
| 13416 | { |
| 13417 | unsigned char branch_type = |
| 13418 | h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal) |
| 13419 | : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); |
| 13420 | |
| 13421 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, |
| 13422 | input_section, contents, rel, |
| 13423 | relocation, info, sec, name, |
| 13424 | sym_type, branch_type, h, |
| 13425 | &unresolved_reloc, |
| 13426 | &error_message); |
| 13427 | } |
| 13428 | |
| 13429 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections |
| 13430 | because such sections are not SEC_ALLOC and thus ld.so will |
| 13431 | not process them. */ |
| 13432 | if (unresolved_reloc |
| 13433 | && !((input_section->flags & SEC_DEBUGGING) != 0 |
| 13434 | && h->def_dynamic) |
| 13435 | && _bfd_elf_section_offset (output_bfd, info, input_section, |
| 13436 | rel->r_offset) != (bfd_vma) -1) |
| 13437 | { |
| 13438 | _bfd_error_handler |
| 13439 | /* xgettext:c-format */ |
| 13440 | (_("%pB(%pA+%#" PRIx64 "): " |
| 13441 | "unresolvable %s relocation against symbol `%s'"), |
| 13442 | input_bfd, |
| 13443 | input_section, |
| 13444 | (uint64_t) rel->r_offset, |
| 13445 | howto->name, |
| 13446 | h->root.root.string); |
| 13447 | return FALSE; |
| 13448 | } |
| 13449 | |
| 13450 | if (r != bfd_reloc_ok) |
| 13451 | { |
| 13452 | switch (r) |
| 13453 | { |
| 13454 | case bfd_reloc_overflow: |
| 13455 | /* If the overflowing reloc was to an undefined symbol, |
| 13456 | we have already printed one error message and there |
| 13457 | is no point complaining again. */ |
| 13458 | if (!h || h->root.type != bfd_link_hash_undefined) |
| 13459 | (*info->callbacks->reloc_overflow) |
| 13460 | (info, (h ? &h->root : NULL), name, howto->name, |
| 13461 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); |
| 13462 | break; |
| 13463 | |
| 13464 | case bfd_reloc_undefined: |
| 13465 | (*info->callbacks->undefined_symbol) |
| 13466 | (info, name, input_bfd, input_section, rel->r_offset, TRUE); |
| 13467 | break; |
| 13468 | |
| 13469 | case bfd_reloc_outofrange: |
| 13470 | error_message = _("out of range"); |
| 13471 | goto common_error; |
| 13472 | |
| 13473 | case bfd_reloc_notsupported: |
| 13474 | error_message = _("unsupported relocation"); |
| 13475 | goto common_error; |
| 13476 | |
| 13477 | case bfd_reloc_dangerous: |
| 13478 | /* error_message should already be set. */ |
| 13479 | goto common_error; |
| 13480 | |
| 13481 | default: |
| 13482 | error_message = _("unknown error"); |
| 13483 | /* Fall through. */ |
| 13484 | |
| 13485 | common_error: |
| 13486 | BFD_ASSERT (error_message != NULL); |
| 13487 | (*info->callbacks->reloc_dangerous) |
| 13488 | (info, error_message, input_bfd, input_section, rel->r_offset); |
| 13489 | break; |
| 13490 | } |
| 13491 | } |
| 13492 | } |
| 13493 | |
| 13494 | return TRUE; |
| 13495 | } |
| 13496 | |
| 13497 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
| 13498 | adds the edit to the start of the list. (The list must be built in order of |
| 13499 | ascending TINDEX: the function's callers are primarily responsible for |
| 13500 | maintaining that condition). */ |
| 13501 | |
| 13502 | static void |
| 13503 | add_unwind_table_edit (arm_unwind_table_edit **head, |
| 13504 | arm_unwind_table_edit **tail, |
| 13505 | arm_unwind_edit_type type, |
| 13506 | asection *linked_section, |
| 13507 | unsigned int tindex) |
| 13508 | { |
| 13509 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
| 13510 | xmalloc (sizeof (arm_unwind_table_edit)); |
| 13511 | |
| 13512 | new_edit->type = type; |
| 13513 | new_edit->linked_section = linked_section; |
| 13514 | new_edit->index = tindex; |
| 13515 | |
| 13516 | if (tindex > 0) |
| 13517 | { |
| 13518 | new_edit->next = NULL; |
| 13519 | |
| 13520 | if (*tail) |
| 13521 | (*tail)->next = new_edit; |
| 13522 | |
| 13523 | (*tail) = new_edit; |
| 13524 | |
| 13525 | if (!*head) |
| 13526 | (*head) = new_edit; |
| 13527 | } |
| 13528 | else |
| 13529 | { |
| 13530 | new_edit->next = *head; |
| 13531 | |
| 13532 | if (!*tail) |
| 13533 | *tail = new_edit; |
| 13534 | |
| 13535 | *head = new_edit; |
| 13536 | } |
| 13537 | } |
| 13538 | |
| 13539 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); |
| 13540 | |
| 13541 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ |
| 13542 | static void |
| 13543 | adjust_exidx_size(asection *exidx_sec, int adjust) |
| 13544 | { |
| 13545 | asection *out_sec; |
| 13546 | |
| 13547 | if (!exidx_sec->rawsize) |
| 13548 | exidx_sec->rawsize = exidx_sec->size; |
| 13549 | |
| 13550 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); |
| 13551 | out_sec = exidx_sec->output_section; |
| 13552 | /* Adjust size of output section. */ |
| 13553 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); |
| 13554 | } |
| 13555 | |
| 13556 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ |
| 13557 | static void |
| 13558 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) |
| 13559 | { |
| 13560 | struct _arm_elf_section_data *exidx_arm_data; |
| 13561 | |
| 13562 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
| 13563 | add_unwind_table_edit ( |
| 13564 | &exidx_arm_data->u.exidx.unwind_edit_list, |
| 13565 | &exidx_arm_data->u.exidx.unwind_edit_tail, |
| 13566 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); |
| 13567 | |
| 13568 | exidx_arm_data->additional_reloc_count++; |
| 13569 | |
| 13570 | adjust_exidx_size(exidx_sec, 8); |
| 13571 | } |
| 13572 | |
| 13573 | /* Scan .ARM.exidx tables, and create a list describing edits which should be |
| 13574 | made to those tables, such that: |
| 13575 | |
| 13576 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. |
| 13577 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind |
| 13578 | codes which have been inlined into the index). |
| 13579 | |
| 13580 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
| 13581 | |
| 13582 | The edits are applied when the tables are written |
| 13583 | (in elf32_arm_write_section). */ |
| 13584 | |
| 13585 | bfd_boolean |
| 13586 | elf32_arm_fix_exidx_coverage (asection **text_section_order, |
| 13587 | unsigned int num_text_sections, |
| 13588 | struct bfd_link_info *info, |
| 13589 | bfd_boolean merge_exidx_entries) |
| 13590 | { |
| 13591 | bfd *inp; |
| 13592 | unsigned int last_second_word = 0, i; |
| 13593 | asection *last_exidx_sec = NULL; |
| 13594 | asection *last_text_sec = NULL; |
| 13595 | int last_unwind_type = -1; |
| 13596 | |
| 13597 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding |
| 13598 | text sections. */ |
| 13599 | for (inp = info->input_bfds; inp != NULL; inp = inp->link.next) |
| 13600 | { |
| 13601 | asection *sec; |
| 13602 | |
| 13603 | for (sec = inp->sections; sec != NULL; sec = sec->next) |
| 13604 | { |
| 13605 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); |
| 13606 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; |
| 13607 | |
| 13608 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
| 13609 | continue; |
| 13610 | |
| 13611 | if (elf_sec->linked_to) |
| 13612 | { |
| 13613 | Elf_Internal_Shdr *linked_hdr |
| 13614 | = &elf_section_data (elf_sec->linked_to)->this_hdr; |
| 13615 | struct _arm_elf_section_data *linked_sec_arm_data |
| 13616 | = get_arm_elf_section_data (linked_hdr->bfd_section); |
| 13617 | |
| 13618 | if (linked_sec_arm_data == NULL) |
| 13619 | continue; |
| 13620 | |
| 13621 | /* Link this .ARM.exidx section back from the text section it |
| 13622 | describes. */ |
| 13623 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; |
| 13624 | } |
| 13625 | } |
| 13626 | } |
| 13627 | |
| 13628 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate |
| 13629 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), |
| 13630 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
| 13631 | |
| 13632 | for (i = 0; i < num_text_sections; i++) |
| 13633 | { |
| 13634 | asection *sec = text_section_order[i]; |
| 13635 | asection *exidx_sec; |
| 13636 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); |
| 13637 | struct _arm_elf_section_data *exidx_arm_data; |
| 13638 | bfd_byte *contents = NULL; |
| 13639 | int deleted_exidx_bytes = 0; |
| 13640 | bfd_vma j; |
| 13641 | arm_unwind_table_edit *unwind_edit_head = NULL; |
| 13642 | arm_unwind_table_edit *unwind_edit_tail = NULL; |
| 13643 | Elf_Internal_Shdr *hdr; |
| 13644 | bfd *ibfd; |
| 13645 | |
| 13646 | if (arm_data == NULL) |
| 13647 | continue; |
| 13648 | |
| 13649 | exidx_sec = arm_data->u.text.arm_exidx_sec; |
| 13650 | if (exidx_sec == NULL) |
| 13651 | { |
| 13652 | /* Section has no unwind data. */ |
| 13653 | if (last_unwind_type == 0 || !last_exidx_sec) |
| 13654 | continue; |
| 13655 | |
| 13656 | /* Ignore zero sized sections. */ |
| 13657 | if (sec->size == 0) |
| 13658 | continue; |
| 13659 | |
| 13660 | insert_cantunwind_after(last_text_sec, last_exidx_sec); |
| 13661 | last_unwind_type = 0; |
| 13662 | continue; |
| 13663 | } |
| 13664 | |
| 13665 | /* Skip /DISCARD/ sections. */ |
| 13666 | if (bfd_is_abs_section (exidx_sec->output_section)) |
| 13667 | continue; |
| 13668 | |
| 13669 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
| 13670 | if (hdr->sh_type != SHT_ARM_EXIDX) |
| 13671 | continue; |
| 13672 | |
| 13673 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
| 13674 | if (exidx_arm_data == NULL) |
| 13675 | continue; |
| 13676 | |
| 13677 | ibfd = exidx_sec->owner; |
| 13678 | |
| 13679 | if (hdr->contents != NULL) |
| 13680 | contents = hdr->contents; |
| 13681 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) |
| 13682 | /* An error? */ |
| 13683 | continue; |
| 13684 | |
| 13685 | if (last_unwind_type > 0) |
| 13686 | { |
| 13687 | unsigned int first_word = bfd_get_32 (ibfd, contents); |
| 13688 | /* Add cantunwind if first unwind item does not match section |
| 13689 | start. */ |
| 13690 | if (first_word != sec->vma) |
| 13691 | { |
| 13692 | insert_cantunwind_after (last_text_sec, last_exidx_sec); |
| 13693 | last_unwind_type = 0; |
| 13694 | } |
| 13695 | } |
| 13696 | |
| 13697 | for (j = 0; j < hdr->sh_size; j += 8) |
| 13698 | { |
| 13699 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); |
| 13700 | int unwind_type; |
| 13701 | int elide = 0; |
| 13702 | |
| 13703 | /* An EXIDX_CANTUNWIND entry. */ |
| 13704 | if (second_word == 1) |
| 13705 | { |
| 13706 | if (last_unwind_type == 0) |
| 13707 | elide = 1; |
| 13708 | unwind_type = 0; |
| 13709 | } |
| 13710 | /* Inlined unwinding data. Merge if equal to previous. */ |
| 13711 | else if ((second_word & 0x80000000) != 0) |
| 13712 | { |
| 13713 | if (merge_exidx_entries |
| 13714 | && last_second_word == second_word && last_unwind_type == 1) |
| 13715 | elide = 1; |
| 13716 | unwind_type = 1; |
| 13717 | last_second_word = second_word; |
| 13718 | } |
| 13719 | /* Normal table entry. In theory we could merge these too, |
| 13720 | but duplicate entries are likely to be much less common. */ |
| 13721 | else |
| 13722 | unwind_type = 2; |
| 13723 | |
| 13724 | if (elide && !bfd_link_relocatable (info)) |
| 13725 | { |
| 13726 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, |
| 13727 | DELETE_EXIDX_ENTRY, NULL, j / 8); |
| 13728 | |
| 13729 | deleted_exidx_bytes += 8; |
| 13730 | } |
| 13731 | |
| 13732 | last_unwind_type = unwind_type; |
| 13733 | } |
| 13734 | |
| 13735 | /* Free contents if we allocated it ourselves. */ |
| 13736 | if (contents != hdr->contents) |
| 13737 | free (contents); |
| 13738 | |
| 13739 | /* Record edits to be applied later (in elf32_arm_write_section). */ |
| 13740 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; |
| 13741 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; |
| 13742 | |
| 13743 | if (deleted_exidx_bytes > 0) |
| 13744 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); |
| 13745 | |
| 13746 | last_exidx_sec = exidx_sec; |
| 13747 | last_text_sec = sec; |
| 13748 | } |
| 13749 | |
| 13750 | /* Add terminating CANTUNWIND entry. */ |
| 13751 | if (!bfd_link_relocatable (info) && last_exidx_sec |
| 13752 | && last_unwind_type != 0) |
| 13753 | insert_cantunwind_after(last_text_sec, last_exidx_sec); |
| 13754 | |
| 13755 | return TRUE; |
| 13756 | } |
| 13757 | |
| 13758 | static bfd_boolean |
| 13759 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, |
| 13760 | bfd *ibfd, const char *name) |
| 13761 | { |
| 13762 | asection *sec, *osec; |
| 13763 | |
| 13764 | sec = bfd_get_linker_section (ibfd, name); |
| 13765 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) |
| 13766 | return TRUE; |
| 13767 | |
| 13768 | osec = sec->output_section; |
| 13769 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) |
| 13770 | return TRUE; |
| 13771 | |
| 13772 | if (! bfd_set_section_contents (obfd, osec, sec->contents, |
| 13773 | sec->output_offset, sec->size)) |
| 13774 | return FALSE; |
| 13775 | |
| 13776 | return TRUE; |
| 13777 | } |
| 13778 | |
| 13779 | static bfd_boolean |
| 13780 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) |
| 13781 | { |
| 13782 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
| 13783 | asection *sec, *osec; |
| 13784 | |
| 13785 | if (globals == NULL) |
| 13786 | return FALSE; |
| 13787 | |
| 13788 | /* Invoke the regular ELF backend linker to do all the work. */ |
| 13789 | if (!bfd_elf_final_link (abfd, info)) |
| 13790 | return FALSE; |
| 13791 | |
| 13792 | /* Process stub sections (eg BE8 encoding, ...). */ |
| 13793 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
| 13794 | unsigned int i; |
| 13795 | for (i=0; i<htab->top_id; i++) |
| 13796 | { |
| 13797 | sec = htab->stub_group[i].stub_sec; |
| 13798 | /* Only process it once, in its link_sec slot. */ |
| 13799 | if (sec && i == htab->stub_group[i].link_sec->id) |
| 13800 | { |
| 13801 | osec = sec->output_section; |
| 13802 | elf32_arm_write_section (abfd, info, sec, sec->contents); |
| 13803 | if (! bfd_set_section_contents (abfd, osec, sec->contents, |
| 13804 | sec->output_offset, sec->size)) |
| 13805 | return FALSE; |
| 13806 | } |
| 13807 | } |
| 13808 | |
| 13809 | /* Write out any glue sections now that we have created all the |
| 13810 | stubs. */ |
| 13811 | if (globals->bfd_of_glue_owner != NULL) |
| 13812 | { |
| 13813 | if (! elf32_arm_output_glue_section (info, abfd, |
| 13814 | globals->bfd_of_glue_owner, |
| 13815 | ARM2THUMB_GLUE_SECTION_NAME)) |
| 13816 | return FALSE; |
| 13817 | |
| 13818 | if (! elf32_arm_output_glue_section (info, abfd, |
| 13819 | globals->bfd_of_glue_owner, |
| 13820 | THUMB2ARM_GLUE_SECTION_NAME)) |
| 13821 | return FALSE; |
| 13822 | |
| 13823 | if (! elf32_arm_output_glue_section (info, abfd, |
| 13824 | globals->bfd_of_glue_owner, |
| 13825 | VFP11_ERRATUM_VENEER_SECTION_NAME)) |
| 13826 | return FALSE; |
| 13827 | |
| 13828 | if (! elf32_arm_output_glue_section (info, abfd, |
| 13829 | globals->bfd_of_glue_owner, |
| 13830 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME)) |
| 13831 | return FALSE; |
| 13832 | |
| 13833 | if (! elf32_arm_output_glue_section (info, abfd, |
| 13834 | globals->bfd_of_glue_owner, |
| 13835 | ARM_BX_GLUE_SECTION_NAME)) |
| 13836 | return FALSE; |
| 13837 | } |
| 13838 | |
| 13839 | return TRUE; |
| 13840 | } |
| 13841 | |
| 13842 | /* Return a best guess for the machine number based on the attributes. */ |
| 13843 | |
| 13844 | static unsigned int |
| 13845 | bfd_arm_get_mach_from_attributes (bfd * abfd) |
| 13846 | { |
| 13847 | int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
| 13848 | |
| 13849 | switch (arch) |
| 13850 | { |
| 13851 | case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M; |
| 13852 | case TAG_CPU_ARCH_V4: return bfd_mach_arm_4; |
| 13853 | case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T; |
| 13854 | case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T; |
| 13855 | |
| 13856 | case TAG_CPU_ARCH_V5TE: |
| 13857 | { |
| 13858 | char * name; |
| 13859 | |
| 13860 | BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES); |
| 13861 | name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s; |
| 13862 | |
| 13863 | if (name) |
| 13864 | { |
| 13865 | if (strcmp (name, "IWMMXT2") == 0) |
| 13866 | return bfd_mach_arm_iWMMXt2; |
| 13867 | |
| 13868 | if (strcmp (name, "IWMMXT") == 0) |
| 13869 | return bfd_mach_arm_iWMMXt; |
| 13870 | |
| 13871 | if (strcmp (name, "XSCALE") == 0) |
| 13872 | { |
| 13873 | int wmmx; |
| 13874 | |
| 13875 | BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES); |
| 13876 | wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i; |
| 13877 | switch (wmmx) |
| 13878 | { |
| 13879 | case 1: return bfd_mach_arm_iWMMXt; |
| 13880 | case 2: return bfd_mach_arm_iWMMXt2; |
| 13881 | default: return bfd_mach_arm_XScale; |
| 13882 | } |
| 13883 | } |
| 13884 | } |
| 13885 | |
| 13886 | return bfd_mach_arm_5TE; |
| 13887 | } |
| 13888 | |
| 13889 | case TAG_CPU_ARCH_V5TEJ: |
| 13890 | return bfd_mach_arm_5TEJ; |
| 13891 | case TAG_CPU_ARCH_V6: |
| 13892 | return bfd_mach_arm_6; |
| 13893 | case TAG_CPU_ARCH_V6KZ: |
| 13894 | return bfd_mach_arm_6KZ; |
| 13895 | case TAG_CPU_ARCH_V6T2: |
| 13896 | return bfd_mach_arm_6T2; |
| 13897 | case TAG_CPU_ARCH_V6K: |
| 13898 | return bfd_mach_arm_6K; |
| 13899 | case TAG_CPU_ARCH_V7: |
| 13900 | return bfd_mach_arm_7; |
| 13901 | case TAG_CPU_ARCH_V6_M: |
| 13902 | return bfd_mach_arm_6M; |
| 13903 | case TAG_CPU_ARCH_V6S_M: |
| 13904 | return bfd_mach_arm_6SM; |
| 13905 | case TAG_CPU_ARCH_V7E_M: |
| 13906 | return bfd_mach_arm_7EM; |
| 13907 | case TAG_CPU_ARCH_V8: |
| 13908 | return bfd_mach_arm_8; |
| 13909 | case TAG_CPU_ARCH_V8R: |
| 13910 | return bfd_mach_arm_8R; |
| 13911 | case TAG_CPU_ARCH_V8M_BASE: |
| 13912 | return bfd_mach_arm_8M_BASE; |
| 13913 | case TAG_CPU_ARCH_V8M_MAIN: |
| 13914 | return bfd_mach_arm_8M_MAIN; |
| 13915 | case TAG_CPU_ARCH_V8_1M_MAIN: |
| 13916 | return bfd_mach_arm_8_1M_MAIN; |
| 13917 | |
| 13918 | default: |
| 13919 | /* Force entry to be added for any new known Tag_CPU_arch value. */ |
| 13920 | BFD_ASSERT (arch > MAX_TAG_CPU_ARCH); |
| 13921 | |
| 13922 | /* Unknown Tag_CPU_arch value. */ |
| 13923 | return bfd_mach_arm_unknown; |
| 13924 | } |
| 13925 | } |
| 13926 | |
| 13927 | /* Set the right machine number. */ |
| 13928 | |
| 13929 | static bfd_boolean |
| 13930 | elf32_arm_object_p (bfd *abfd) |
| 13931 | { |
| 13932 | unsigned int mach; |
| 13933 | |
| 13934 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
| 13935 | |
| 13936 | if (mach == bfd_mach_arm_unknown) |
| 13937 | { |
| 13938 | if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) |
| 13939 | mach = bfd_mach_arm_ep9312; |
| 13940 | else |
| 13941 | mach = bfd_arm_get_mach_from_attributes (abfd); |
| 13942 | } |
| 13943 | |
| 13944 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
| 13945 | return TRUE; |
| 13946 | } |
| 13947 | |
| 13948 | /* Function to keep ARM specific flags in the ELF header. */ |
| 13949 | |
| 13950 | static bfd_boolean |
| 13951 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
| 13952 | { |
| 13953 | if (elf_flags_init (abfd) |
| 13954 | && elf_elfheader (abfd)->e_flags != flags) |
| 13955 | { |
| 13956 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
| 13957 | { |
| 13958 | if (flags & EF_ARM_INTERWORK) |
| 13959 | _bfd_error_handler |
| 13960 | (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"), |
| 13961 | abfd); |
| 13962 | else |
| 13963 | _bfd_error_handler |
| 13964 | (_("warning: clearing the interworking flag of %pB due to outside request"), |
| 13965 | abfd); |
| 13966 | } |
| 13967 | } |
| 13968 | else |
| 13969 | { |
| 13970 | elf_elfheader (abfd)->e_flags = flags; |
| 13971 | elf_flags_init (abfd) = TRUE; |
| 13972 | } |
| 13973 | |
| 13974 | return TRUE; |
| 13975 | } |
| 13976 | |
| 13977 | /* Copy backend specific data from one object module to another. */ |
| 13978 | |
| 13979 | static bfd_boolean |
| 13980 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
| 13981 | { |
| 13982 | flagword in_flags; |
| 13983 | flagword out_flags; |
| 13984 | |
| 13985 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
| 13986 | return TRUE; |
| 13987 | |
| 13988 | in_flags = elf_elfheader (ibfd)->e_flags; |
| 13989 | out_flags = elf_elfheader (obfd)->e_flags; |
| 13990 | |
| 13991 | if (elf_flags_init (obfd) |
| 13992 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN |
| 13993 | && in_flags != out_flags) |
| 13994 | { |
| 13995 | /* Cannot mix APCS26 and APCS32 code. */ |
| 13996 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
| 13997 | return FALSE; |
| 13998 | |
| 13999 | /* Cannot mix float APCS and non-float APCS code. */ |
| 14000 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
| 14001 | return FALSE; |
| 14002 | |
| 14003 | /* If the src and dest have different interworking flags |
| 14004 | then turn off the interworking bit. */ |
| 14005 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
| 14006 | { |
| 14007 | if (out_flags & EF_ARM_INTERWORK) |
| 14008 | _bfd_error_handler |
| 14009 | (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"), |
| 14010 | obfd, ibfd); |
| 14011 | |
| 14012 | in_flags &= ~EF_ARM_INTERWORK; |
| 14013 | } |
| 14014 | |
| 14015 | /* Likewise for PIC, though don't warn for this case. */ |
| 14016 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
| 14017 | in_flags &= ~EF_ARM_PIC; |
| 14018 | } |
| 14019 | |
| 14020 | elf_elfheader (obfd)->e_flags = in_flags; |
| 14021 | elf_flags_init (obfd) = TRUE; |
| 14022 | |
| 14023 | return _bfd_elf_copy_private_bfd_data (ibfd, obfd); |
| 14024 | } |
| 14025 | |
| 14026 | /* Values for Tag_ABI_PCS_R9_use. */ |
| 14027 | enum |
| 14028 | { |
| 14029 | AEABI_R9_V6, |
| 14030 | AEABI_R9_SB, |
| 14031 | AEABI_R9_TLS, |
| 14032 | AEABI_R9_unused |
| 14033 | }; |
| 14034 | |
| 14035 | /* Values for Tag_ABI_PCS_RW_data. */ |
| 14036 | enum |
| 14037 | { |
| 14038 | AEABI_PCS_RW_data_absolute, |
| 14039 | AEABI_PCS_RW_data_PCrel, |
| 14040 | AEABI_PCS_RW_data_SBrel, |
| 14041 | AEABI_PCS_RW_data_unused |
| 14042 | }; |
| 14043 | |
| 14044 | /* Values for Tag_ABI_enum_size. */ |
| 14045 | enum |
| 14046 | { |
| 14047 | AEABI_enum_unused, |
| 14048 | AEABI_enum_short, |
| 14049 | AEABI_enum_wide, |
| 14050 | AEABI_enum_forced_wide |
| 14051 | }; |
| 14052 | |
| 14053 | /* Determine whether an object attribute tag takes an integer, a |
| 14054 | string or both. */ |
| 14055 | |
| 14056 | static int |
| 14057 | elf32_arm_obj_attrs_arg_type (int tag) |
| 14058 | { |
| 14059 | if (tag == Tag_compatibility) |
| 14060 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
| 14061 | else if (tag == Tag_nodefaults) |
| 14062 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
| 14063 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) |
| 14064 | return ATTR_TYPE_FLAG_STR_VAL; |
| 14065 | else if (tag < 32) |
| 14066 | return ATTR_TYPE_FLAG_INT_VAL; |
| 14067 | else |
| 14068 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
| 14069 | } |
| 14070 | |
| 14071 | /* The ABI defines that Tag_conformance should be emitted first, and that |
| 14072 | Tag_nodefaults should be second (if either is defined). This sets those |
| 14073 | two positions, and bumps up the position of all the remaining tags to |
| 14074 | compensate. */ |
| 14075 | static int |
| 14076 | elf32_arm_obj_attrs_order (int num) |
| 14077 | { |
| 14078 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
| 14079 | return Tag_conformance; |
| 14080 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
| 14081 | return Tag_nodefaults; |
| 14082 | if ((num - 2) < Tag_nodefaults) |
| 14083 | return num - 2; |
| 14084 | if ((num - 1) < Tag_conformance) |
| 14085 | return num - 1; |
| 14086 | return num; |
| 14087 | } |
| 14088 | |
| 14089 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
| 14090 | static bfd_boolean |
| 14091 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) |
| 14092 | { |
| 14093 | if ((tag & 127) < 64) |
| 14094 | { |
| 14095 | _bfd_error_handler |
| 14096 | (_("%pB: unknown mandatory EABI object attribute %d"), |
| 14097 | abfd, tag); |
| 14098 | bfd_set_error (bfd_error_bad_value); |
| 14099 | return FALSE; |
| 14100 | } |
| 14101 | else |
| 14102 | { |
| 14103 | _bfd_error_handler |
| 14104 | (_("warning: %pB: unknown EABI object attribute %d"), |
| 14105 | abfd, tag); |
| 14106 | return TRUE; |
| 14107 | } |
| 14108 | } |
| 14109 | |
| 14110 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
| 14111 | Returns -1 if no architecture could be read. */ |
| 14112 | |
| 14113 | static int |
| 14114 | get_secondary_compatible_arch (bfd *abfd) |
| 14115 | { |
| 14116 | obj_attribute *attr = |
| 14117 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; |
| 14118 | |
| 14119 | /* Note: the tag and its argument below are uleb128 values, though |
| 14120 | currently-defined values fit in one byte for each. */ |
| 14121 | if (attr->s |
| 14122 | && attr->s[0] == Tag_CPU_arch |
| 14123 | && (attr->s[1] & 128) != 128 |
| 14124 | && attr->s[2] == 0) |
| 14125 | return attr->s[1]; |
| 14126 | |
| 14127 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ |
| 14128 | return -1; |
| 14129 | } |
| 14130 | |
| 14131 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. |
| 14132 | The tag is removed if ARCH is -1. */ |
| 14133 | |
| 14134 | static void |
| 14135 | set_secondary_compatible_arch (bfd *abfd, int arch) |
| 14136 | { |
| 14137 | obj_attribute *attr = |
| 14138 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; |
| 14139 | |
| 14140 | if (arch == -1) |
| 14141 | { |
| 14142 | attr->s = NULL; |
| 14143 | return; |
| 14144 | } |
| 14145 | |
| 14146 | /* Note: the tag and its argument below are uleb128 values, though |
| 14147 | currently-defined values fit in one byte for each. */ |
| 14148 | if (!attr->s) |
| 14149 | attr->s = (char *) bfd_alloc (abfd, 3); |
| 14150 | attr->s[0] = Tag_CPU_arch; |
| 14151 | attr->s[1] = arch; |
| 14152 | attr->s[2] = '\0'; |
| 14153 | } |
| 14154 | |
| 14155 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
| 14156 | into account. */ |
| 14157 | |
| 14158 | static int |
| 14159 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, |
| 14160 | int newtag, int secondary_compat) |
| 14161 | { |
| 14162 | #define T(X) TAG_CPU_ARCH_##X |
| 14163 | int tagl, tagh, result; |
| 14164 | const int v6t2[] = |
| 14165 | { |
| 14166 | T(V6T2), /* PRE_V4. */ |
| 14167 | T(V6T2), /* V4. */ |
| 14168 | T(V6T2), /* V4T. */ |
| 14169 | T(V6T2), /* V5T. */ |
| 14170 | T(V6T2), /* V5TE. */ |
| 14171 | T(V6T2), /* V5TEJ. */ |
| 14172 | T(V6T2), /* V6. */ |
| 14173 | T(V7), /* V6KZ. */ |
| 14174 | T(V6T2) /* V6T2. */ |
| 14175 | }; |
| 14176 | const int v6k[] = |
| 14177 | { |
| 14178 | T(V6K), /* PRE_V4. */ |
| 14179 | T(V6K), /* V4. */ |
| 14180 | T(V6K), /* V4T. */ |
| 14181 | T(V6K), /* V5T. */ |
| 14182 | T(V6K), /* V5TE. */ |
| 14183 | T(V6K), /* V5TEJ. */ |
| 14184 | T(V6K), /* V6. */ |
| 14185 | T(V6KZ), /* V6KZ. */ |
| 14186 | T(V7), /* V6T2. */ |
| 14187 | T(V6K) /* V6K. */ |
| 14188 | }; |
| 14189 | const int v7[] = |
| 14190 | { |
| 14191 | T(V7), /* PRE_V4. */ |
| 14192 | T(V7), /* V4. */ |
| 14193 | T(V7), /* V4T. */ |
| 14194 | T(V7), /* V5T. */ |
| 14195 | T(V7), /* V5TE. */ |
| 14196 | T(V7), /* V5TEJ. */ |
| 14197 | T(V7), /* V6. */ |
| 14198 | T(V7), /* V6KZ. */ |
| 14199 | T(V7), /* V6T2. */ |
| 14200 | T(V7), /* V6K. */ |
| 14201 | T(V7) /* V7. */ |
| 14202 | }; |
| 14203 | const int v6_m[] = |
| 14204 | { |
| 14205 | -1, /* PRE_V4. */ |
| 14206 | -1, /* V4. */ |
| 14207 | T(V6K), /* V4T. */ |
| 14208 | T(V6K), /* V5T. */ |
| 14209 | T(V6K), /* V5TE. */ |
| 14210 | T(V6K), /* V5TEJ. */ |
| 14211 | T(V6K), /* V6. */ |
| 14212 | T(V6KZ), /* V6KZ. */ |
| 14213 | T(V7), /* V6T2. */ |
| 14214 | T(V6K), /* V6K. */ |
| 14215 | T(V7), /* V7. */ |
| 14216 | T(V6_M) /* V6_M. */ |
| 14217 | }; |
| 14218 | const int v6s_m[] = |
| 14219 | { |
| 14220 | -1, /* PRE_V4. */ |
| 14221 | -1, /* V4. */ |
| 14222 | T(V6K), /* V4T. */ |
| 14223 | T(V6K), /* V5T. */ |
| 14224 | T(V6K), /* V5TE. */ |
| 14225 | T(V6K), /* V5TEJ. */ |
| 14226 | T(V6K), /* V6. */ |
| 14227 | T(V6KZ), /* V6KZ. */ |
| 14228 | T(V7), /* V6T2. */ |
| 14229 | T(V6K), /* V6K. */ |
| 14230 | T(V7), /* V7. */ |
| 14231 | T(V6S_M), /* V6_M. */ |
| 14232 | T(V6S_M) /* V6S_M. */ |
| 14233 | }; |
| 14234 | const int v7e_m[] = |
| 14235 | { |
| 14236 | -1, /* PRE_V4. */ |
| 14237 | -1, /* V4. */ |
| 14238 | T(V7E_M), /* V4T. */ |
| 14239 | T(V7E_M), /* V5T. */ |
| 14240 | T(V7E_M), /* V5TE. */ |
| 14241 | T(V7E_M), /* V5TEJ. */ |
| 14242 | T(V7E_M), /* V6. */ |
| 14243 | T(V7E_M), /* V6KZ. */ |
| 14244 | T(V7E_M), /* V6T2. */ |
| 14245 | T(V7E_M), /* V6K. */ |
| 14246 | T(V7E_M), /* V7. */ |
| 14247 | T(V7E_M), /* V6_M. */ |
| 14248 | T(V7E_M), /* V6S_M. */ |
| 14249 | T(V7E_M) /* V7E_M. */ |
| 14250 | }; |
| 14251 | const int v8[] = |
| 14252 | { |
| 14253 | T(V8), /* PRE_V4. */ |
| 14254 | T(V8), /* V4. */ |
| 14255 | T(V8), /* V4T. */ |
| 14256 | T(V8), /* V5T. */ |
| 14257 | T(V8), /* V5TE. */ |
| 14258 | T(V8), /* V5TEJ. */ |
| 14259 | T(V8), /* V6. */ |
| 14260 | T(V8), /* V6KZ. */ |
| 14261 | T(V8), /* V6T2. */ |
| 14262 | T(V8), /* V6K. */ |
| 14263 | T(V8), /* V7. */ |
| 14264 | T(V8), /* V6_M. */ |
| 14265 | T(V8), /* V6S_M. */ |
| 14266 | T(V8), /* V7E_M. */ |
| 14267 | T(V8) /* V8. */ |
| 14268 | }; |
| 14269 | const int v8r[] = |
| 14270 | { |
| 14271 | T(V8R), /* PRE_V4. */ |
| 14272 | T(V8R), /* V4. */ |
| 14273 | T(V8R), /* V4T. */ |
| 14274 | T(V8R), /* V5T. */ |
| 14275 | T(V8R), /* V5TE. */ |
| 14276 | T(V8R), /* V5TEJ. */ |
| 14277 | T(V8R), /* V6. */ |
| 14278 | T(V8R), /* V6KZ. */ |
| 14279 | T(V8R), /* V6T2. */ |
| 14280 | T(V8R), /* V6K. */ |
| 14281 | T(V8R), /* V7. */ |
| 14282 | T(V8R), /* V6_M. */ |
| 14283 | T(V8R), /* V6S_M. */ |
| 14284 | T(V8R), /* V7E_M. */ |
| 14285 | T(V8), /* V8. */ |
| 14286 | T(V8R), /* V8R. */ |
| 14287 | }; |
| 14288 | const int v8m_baseline[] = |
| 14289 | { |
| 14290 | -1, /* PRE_V4. */ |
| 14291 | -1, /* V4. */ |
| 14292 | -1, /* V4T. */ |
| 14293 | -1, /* V5T. */ |
| 14294 | -1, /* V5TE. */ |
| 14295 | -1, /* V5TEJ. */ |
| 14296 | -1, /* V6. */ |
| 14297 | -1, /* V6KZ. */ |
| 14298 | -1, /* V6T2. */ |
| 14299 | -1, /* V6K. */ |
| 14300 | -1, /* V7. */ |
| 14301 | T(V8M_BASE), /* V6_M. */ |
| 14302 | T(V8M_BASE), /* V6S_M. */ |
| 14303 | -1, /* V7E_M. */ |
| 14304 | -1, /* V8. */ |
| 14305 | -1, /* V8R. */ |
| 14306 | T(V8M_BASE) /* V8-M BASELINE. */ |
| 14307 | }; |
| 14308 | const int v8m_mainline[] = |
| 14309 | { |
| 14310 | -1, /* PRE_V4. */ |
| 14311 | -1, /* V4. */ |
| 14312 | -1, /* V4T. */ |
| 14313 | -1, /* V5T. */ |
| 14314 | -1, /* V5TE. */ |
| 14315 | -1, /* V5TEJ. */ |
| 14316 | -1, /* V6. */ |
| 14317 | -1, /* V6KZ. */ |
| 14318 | -1, /* V6T2. */ |
| 14319 | -1, /* V6K. */ |
| 14320 | T(V8M_MAIN), /* V7. */ |
| 14321 | T(V8M_MAIN), /* V6_M. */ |
| 14322 | T(V8M_MAIN), /* V6S_M. */ |
| 14323 | T(V8M_MAIN), /* V7E_M. */ |
| 14324 | -1, /* V8. */ |
| 14325 | -1, /* V8R. */ |
| 14326 | T(V8M_MAIN), /* V8-M BASELINE. */ |
| 14327 | T(V8M_MAIN) /* V8-M MAINLINE. */ |
| 14328 | }; |
| 14329 | const int v8_1m_mainline[] = |
| 14330 | { |
| 14331 | -1, /* PRE_V4. */ |
| 14332 | -1, /* V4. */ |
| 14333 | -1, /* V4T. */ |
| 14334 | -1, /* V5T. */ |
| 14335 | -1, /* V5TE. */ |
| 14336 | -1, /* V5TEJ. */ |
| 14337 | -1, /* V6. */ |
| 14338 | -1, /* V6KZ. */ |
| 14339 | -1, /* V6T2. */ |
| 14340 | -1, /* V6K. */ |
| 14341 | T(V8_1M_MAIN), /* V7. */ |
| 14342 | T(V8_1M_MAIN), /* V6_M. */ |
| 14343 | T(V8_1M_MAIN), /* V6S_M. */ |
| 14344 | T(V8_1M_MAIN), /* V7E_M. */ |
| 14345 | -1, /* V8. */ |
| 14346 | -1, /* V8R. */ |
| 14347 | T(V8_1M_MAIN), /* V8-M BASELINE. */ |
| 14348 | T(V8_1M_MAIN), /* V8-M MAINLINE. */ |
| 14349 | -1, /* Unused (18). */ |
| 14350 | -1, /* Unused (19). */ |
| 14351 | -1, /* Unused (20). */ |
| 14352 | T(V8_1M_MAIN) /* V8.1-M MAINLINE. */ |
| 14353 | }; |
| 14354 | const int v4t_plus_v6_m[] = |
| 14355 | { |
| 14356 | -1, /* PRE_V4. */ |
| 14357 | -1, /* V4. */ |
| 14358 | T(V4T), /* V4T. */ |
| 14359 | T(V5T), /* V5T. */ |
| 14360 | T(V5TE), /* V5TE. */ |
| 14361 | T(V5TEJ), /* V5TEJ. */ |
| 14362 | T(V6), /* V6. */ |
| 14363 | T(V6KZ), /* V6KZ. */ |
| 14364 | T(V6T2), /* V6T2. */ |
| 14365 | T(V6K), /* V6K. */ |
| 14366 | T(V7), /* V7. */ |
| 14367 | T(V6_M), /* V6_M. */ |
| 14368 | T(V6S_M), /* V6S_M. */ |
| 14369 | T(V7E_M), /* V7E_M. */ |
| 14370 | T(V8), /* V8. */ |
| 14371 | -1, /* V8R. */ |
| 14372 | T(V8M_BASE), /* V8-M BASELINE. */ |
| 14373 | T(V8M_MAIN), /* V8-M MAINLINE. */ |
| 14374 | -1, /* Unused (18). */ |
| 14375 | -1, /* Unused (19). */ |
| 14376 | -1, /* Unused (20). */ |
| 14377 | T(V8_1M_MAIN), /* V8.1-M MAINLINE. */ |
| 14378 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
| 14379 | }; |
| 14380 | const int *comb[] = |
| 14381 | { |
| 14382 | v6t2, |
| 14383 | v6k, |
| 14384 | v7, |
| 14385 | v6_m, |
| 14386 | v6s_m, |
| 14387 | v7e_m, |
| 14388 | v8, |
| 14389 | v8r, |
| 14390 | v8m_baseline, |
| 14391 | v8m_mainline, |
| 14392 | NULL, |
| 14393 | NULL, |
| 14394 | NULL, |
| 14395 | v8_1m_mainline, |
| 14396 | /* Pseudo-architecture. */ |
| 14397 | v4t_plus_v6_m |
| 14398 | }; |
| 14399 | |
| 14400 | /* Check we've not got a higher architecture than we know about. */ |
| 14401 | |
| 14402 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
| 14403 | { |
| 14404 | _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd); |
| 14405 | return -1; |
| 14406 | } |
| 14407 | |
| 14408 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ |
| 14409 | |
| 14410 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) |
| 14411 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) |
| 14412 | oldtag = T(V4T_PLUS_V6_M); |
| 14413 | |
| 14414 | /* And override the new tag if we have a Tag_also_compatible_with on the |
| 14415 | input. */ |
| 14416 | |
| 14417 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) |
| 14418 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) |
| 14419 | newtag = T(V4T_PLUS_V6_M); |
| 14420 | |
| 14421 | tagl = (oldtag < newtag) ? oldtag : newtag; |
| 14422 | result = tagh = (oldtag > newtag) ? oldtag : newtag; |
| 14423 | |
| 14424 | /* Architectures before V6KZ add features monotonically. */ |
| 14425 | if (tagh <= TAG_CPU_ARCH_V6KZ) |
| 14426 | return result; |
| 14427 | |
| 14428 | result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1; |
| 14429 | |
| 14430 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) |
| 14431 | as the canonical version. */ |
| 14432 | if (result == T(V4T_PLUS_V6_M)) |
| 14433 | { |
| 14434 | result = T(V4T); |
| 14435 | *secondary_compat_out = T(V6_M); |
| 14436 | } |
| 14437 | else |
| 14438 | *secondary_compat_out = -1; |
| 14439 | |
| 14440 | if (result == -1) |
| 14441 | { |
| 14442 | _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"), |
| 14443 | ibfd, oldtag, newtag); |
| 14444 | return -1; |
| 14445 | } |
| 14446 | |
| 14447 | return result; |
| 14448 | #undef T |
| 14449 | } |
| 14450 | |
| 14451 | /* Query attributes object to see if integer divide instructions may be |
| 14452 | present in an object. */ |
| 14453 | static bfd_boolean |
| 14454 | elf32_arm_attributes_accept_div (const obj_attribute *attr) |
| 14455 | { |
| 14456 | int arch = attr[Tag_CPU_arch].i; |
| 14457 | int profile = attr[Tag_CPU_arch_profile].i; |
| 14458 | |
| 14459 | switch (attr[Tag_DIV_use].i) |
| 14460 | { |
| 14461 | case 0: |
| 14462 | /* Integer divide allowed if instruction contained in archetecture. */ |
| 14463 | if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) |
| 14464 | return TRUE; |
| 14465 | else if (arch >= TAG_CPU_ARCH_V7E_M) |
| 14466 | return TRUE; |
| 14467 | else |
| 14468 | return FALSE; |
| 14469 | |
| 14470 | case 1: |
| 14471 | /* Integer divide explicitly prohibited. */ |
| 14472 | return FALSE; |
| 14473 | |
| 14474 | default: |
| 14475 | /* Unrecognised case - treat as allowing divide everywhere. */ |
| 14476 | case 2: |
| 14477 | /* Integer divide allowed in ARM state. */ |
| 14478 | return TRUE; |
| 14479 | } |
| 14480 | } |
| 14481 | |
| 14482 | /* Query attributes object to see if integer divide instructions are |
| 14483 | forbidden to be in the object. This is not the inverse of |
| 14484 | elf32_arm_attributes_accept_div. */ |
| 14485 | static bfd_boolean |
| 14486 | elf32_arm_attributes_forbid_div (const obj_attribute *attr) |
| 14487 | { |
| 14488 | return attr[Tag_DIV_use].i == 1; |
| 14489 | } |
| 14490 | |
| 14491 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
| 14492 | are conflicting attributes. */ |
| 14493 | |
| 14494 | static bfd_boolean |
| 14495 | elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info) |
| 14496 | { |
| 14497 | bfd *obfd = info->output_bfd; |
| 14498 | obj_attribute *in_attr; |
| 14499 | obj_attribute *out_attr; |
| 14500 | /* Some tags have 0 = don't care, 1 = strong requirement, |
| 14501 | 2 = weak requirement. */ |
| 14502 | static const int order_021[3] = {0, 2, 1}; |
| 14503 | int i; |
| 14504 | bfd_boolean result = TRUE; |
| 14505 | const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section; |
| 14506 | |
| 14507 | /* Skip the linker stubs file. This preserves previous behavior |
| 14508 | of accepting unknown attributes in the first input file - but |
| 14509 | is that a bug? */ |
| 14510 | if (ibfd->flags & BFD_LINKER_CREATED) |
| 14511 | return TRUE; |
| 14512 | |
| 14513 | /* Skip any input that hasn't attribute section. |
| 14514 | This enables to link object files without attribute section with |
| 14515 | any others. */ |
| 14516 | if (bfd_get_section_by_name (ibfd, sec_name) == NULL) |
| 14517 | return TRUE; |
| 14518 | |
| 14519 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
| 14520 | { |
| 14521 | /* This is the first object. Copy the attributes. */ |
| 14522 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
| 14523 | |
| 14524 | out_attr = elf_known_obj_attributes_proc (obfd); |
| 14525 | |
| 14526 | /* Use the Tag_null value to indicate the attributes have been |
| 14527 | initialized. */ |
| 14528 | out_attr[0].i = 1; |
| 14529 | |
| 14530 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
| 14531 | the attribute's value to Tag_MPextension_use. */ |
| 14532 | if (out_attr[Tag_MPextension_use_legacy].i != 0) |
| 14533 | { |
| 14534 | if (out_attr[Tag_MPextension_use].i != 0 |
| 14535 | && out_attr[Tag_MPextension_use_legacy].i |
| 14536 | != out_attr[Tag_MPextension_use].i) |
| 14537 | { |
| 14538 | _bfd_error_handler |
| 14539 | (_("Error: %pB has both the current and legacy " |
| 14540 | "Tag_MPextension_use attributes"), ibfd); |
| 14541 | result = FALSE; |
| 14542 | } |
| 14543 | |
| 14544 | out_attr[Tag_MPextension_use] = |
| 14545 | out_attr[Tag_MPextension_use_legacy]; |
| 14546 | out_attr[Tag_MPextension_use_legacy].type = 0; |
| 14547 | out_attr[Tag_MPextension_use_legacy].i = 0; |
| 14548 | } |
| 14549 | |
| 14550 | return result; |
| 14551 | } |
| 14552 | |
| 14553 | in_attr = elf_known_obj_attributes_proc (ibfd); |
| 14554 | out_attr = elf_known_obj_attributes_proc (obfd); |
| 14555 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
| 14556 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) |
| 14557 | { |
| 14558 | /* Ignore mismatches if the object doesn't use floating point or is |
| 14559 | floating point ABI independent. */ |
| 14560 | if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none |
| 14561 | || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none |
| 14562 | && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible)) |
| 14563 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; |
| 14564 | else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none |
| 14565 | && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible) |
| 14566 | { |
| 14567 | _bfd_error_handler |
| 14568 | (_("error: %pB uses VFP register arguments, %pB does not"), |
| 14569 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
| 14570 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); |
| 14571 | result = FALSE; |
| 14572 | } |
| 14573 | } |
| 14574 | |
| 14575 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
| 14576 | { |
| 14577 | /* Merge this attribute with existing attributes. */ |
| 14578 | switch (i) |
| 14579 | { |
| 14580 | case Tag_CPU_raw_name: |
| 14581 | case Tag_CPU_name: |
| 14582 | /* These are merged after Tag_CPU_arch. */ |
| 14583 | break; |
| 14584 | |
| 14585 | case Tag_ABI_optimization_goals: |
| 14586 | case Tag_ABI_FP_optimization_goals: |
| 14587 | /* Use the first value seen. */ |
| 14588 | break; |
| 14589 | |
| 14590 | case Tag_CPU_arch: |
| 14591 | { |
| 14592 | int secondary_compat = -1, secondary_compat_out = -1; |
| 14593 | unsigned int saved_out_attr = out_attr[i].i; |
| 14594 | int arch_attr; |
| 14595 | static const char *name_table[] = |
| 14596 | { |
| 14597 | /* These aren't real CPU names, but we can't guess |
| 14598 | that from the architecture version alone. */ |
| 14599 | "Pre v4", |
| 14600 | "ARM v4", |
| 14601 | "ARM v4T", |
| 14602 | "ARM v5T", |
| 14603 | "ARM v5TE", |
| 14604 | "ARM v5TEJ", |
| 14605 | "ARM v6", |
| 14606 | "ARM v6KZ", |
| 14607 | "ARM v6T2", |
| 14608 | "ARM v6K", |
| 14609 | "ARM v7", |
| 14610 | "ARM v6-M", |
| 14611 | "ARM v6S-M", |
| 14612 | "ARM v8", |
| 14613 | "", |
| 14614 | "ARM v8-M.baseline", |
| 14615 | "ARM v8-M.mainline", |
| 14616 | }; |
| 14617 | |
| 14618 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ |
| 14619 | secondary_compat = get_secondary_compatible_arch (ibfd); |
| 14620 | secondary_compat_out = get_secondary_compatible_arch (obfd); |
| 14621 | arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i, |
| 14622 | &secondary_compat_out, |
| 14623 | in_attr[i].i, |
| 14624 | secondary_compat); |
| 14625 | |
| 14626 | /* Return with error if failed to merge. */ |
| 14627 | if (arch_attr == -1) |
| 14628 | return FALSE; |
| 14629 | |
| 14630 | out_attr[i].i = arch_attr; |
| 14631 | |
| 14632 | set_secondary_compatible_arch (obfd, secondary_compat_out); |
| 14633 | |
| 14634 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ |
| 14635 | if (out_attr[i].i == saved_out_attr) |
| 14636 | ; /* Leave the names alone. */ |
| 14637 | else if (out_attr[i].i == in_attr[i].i) |
| 14638 | { |
| 14639 | /* The output architecture has been changed to match the |
| 14640 | input architecture. Use the input names. */ |
| 14641 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s |
| 14642 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) |
| 14643 | : NULL; |
| 14644 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s |
| 14645 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) |
| 14646 | : NULL; |
| 14647 | } |
| 14648 | else |
| 14649 | { |
| 14650 | out_attr[Tag_CPU_name].s = NULL; |
| 14651 | out_attr[Tag_CPU_raw_name].s = NULL; |
| 14652 | } |
| 14653 | |
| 14654 | /* If we still don't have a value for Tag_CPU_name, |
| 14655 | make one up now. Tag_CPU_raw_name remains blank. */ |
| 14656 | if (out_attr[Tag_CPU_name].s == NULL |
| 14657 | && out_attr[i].i < ARRAY_SIZE (name_table)) |
| 14658 | out_attr[Tag_CPU_name].s = |
| 14659 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); |
| 14660 | } |
| 14661 | break; |
| 14662 | |
| 14663 | case Tag_ARM_ISA_use: |
| 14664 | case Tag_THUMB_ISA_use: |
| 14665 | case Tag_WMMX_arch: |
| 14666 | case Tag_Advanced_SIMD_arch: |
| 14667 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ |
| 14668 | case Tag_ABI_FP_rounding: |
| 14669 | case Tag_ABI_FP_exceptions: |
| 14670 | case Tag_ABI_FP_user_exceptions: |
| 14671 | case Tag_ABI_FP_number_model: |
| 14672 | case Tag_FP_HP_extension: |
| 14673 | case Tag_CPU_unaligned_access: |
| 14674 | case Tag_T2EE_use: |
| 14675 | case Tag_MPextension_use: |
| 14676 | case Tag_MVE_arch: |
| 14677 | /* Use the largest value specified. */ |
| 14678 | if (in_attr[i].i > out_attr[i].i) |
| 14679 | out_attr[i].i = in_attr[i].i; |
| 14680 | break; |
| 14681 | |
| 14682 | case Tag_ABI_align_preserved: |
| 14683 | case Tag_ABI_PCS_RO_data: |
| 14684 | /* Use the smallest value specified. */ |
| 14685 | if (in_attr[i].i < out_attr[i].i) |
| 14686 | out_attr[i].i = in_attr[i].i; |
| 14687 | break; |
| 14688 | |
| 14689 | case Tag_ABI_align_needed: |
| 14690 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
| 14691 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
| 14692 | || out_attr[Tag_ABI_align_preserved].i == 0)) |
| 14693 | { |
| 14694 | /* This error message should be enabled once all non-conformant |
| 14695 | binaries in the toolchain have had the attributes set |
| 14696 | properly. |
| 14697 | _bfd_error_handler |
| 14698 | (_("error: %pB: 8-byte data alignment conflicts with %pB"), |
| 14699 | obfd, ibfd); |
| 14700 | result = FALSE; */ |
| 14701 | } |
| 14702 | /* Fall through. */ |
| 14703 | case Tag_ABI_FP_denormal: |
| 14704 | case Tag_ABI_PCS_GOT_use: |
| 14705 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest |
| 14706 | value if greater than 2 (for future-proofing). */ |
| 14707 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) |
| 14708 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 |
| 14709 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) |
| 14710 | out_attr[i].i = in_attr[i].i; |
| 14711 | break; |
| 14712 | |
| 14713 | case Tag_Virtualization_use: |
| 14714 | /* The virtualization tag effectively stores two bits of |
| 14715 | information: the intended use of TrustZone (in bit 0), and the |
| 14716 | intended use of Virtualization (in bit 1). */ |
| 14717 | if (out_attr[i].i == 0) |
| 14718 | out_attr[i].i = in_attr[i].i; |
| 14719 | else if (in_attr[i].i != 0 |
| 14720 | && in_attr[i].i != out_attr[i].i) |
| 14721 | { |
| 14722 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) |
| 14723 | out_attr[i].i = 3; |
| 14724 | else |
| 14725 | { |
| 14726 | _bfd_error_handler |
| 14727 | (_("error: %pB: unable to merge virtualization attributes " |
| 14728 | "with %pB"), |
| 14729 | obfd, ibfd); |
| 14730 | result = FALSE; |
| 14731 | } |
| 14732 | } |
| 14733 | break; |
| 14734 | |
| 14735 | case Tag_CPU_arch_profile: |
| 14736 | if (out_attr[i].i != in_attr[i].i) |
| 14737 | { |
| 14738 | /* 0 will merge with anything. |
| 14739 | 'A' and 'S' merge to 'A'. |
| 14740 | 'R' and 'S' merge to 'R'. |
| 14741 | 'M' and 'A|R|S' is an error. */ |
| 14742 | if (out_attr[i].i == 0 |
| 14743 | || (out_attr[i].i == 'S' |
| 14744 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) |
| 14745 | out_attr[i].i = in_attr[i].i; |
| 14746 | else if (in_attr[i].i == 0 |
| 14747 | || (in_attr[i].i == 'S' |
| 14748 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) |
| 14749 | ; /* Do nothing. */ |
| 14750 | else |
| 14751 | { |
| 14752 | _bfd_error_handler |
| 14753 | (_("error: %pB: conflicting architecture profiles %c/%c"), |
| 14754 | ibfd, |
| 14755 | in_attr[i].i ? in_attr[i].i : '0', |
| 14756 | out_attr[i].i ? out_attr[i].i : '0'); |
| 14757 | result = FALSE; |
| 14758 | } |
| 14759 | } |
| 14760 | break; |
| 14761 | |
| 14762 | case Tag_DSP_extension: |
| 14763 | /* No need to change output value if any of: |
| 14764 | - pre (<=) ARMv5T input architecture (do not have DSP) |
| 14765 | - M input profile not ARMv7E-M and do not have DSP. */ |
| 14766 | if (in_attr[Tag_CPU_arch].i <= 3 |
| 14767 | || (in_attr[Tag_CPU_arch_profile].i == 'M' |
| 14768 | && in_attr[Tag_CPU_arch].i != 13 |
| 14769 | && in_attr[i].i == 0)) |
| 14770 | ; /* Do nothing. */ |
| 14771 | /* Output value should be 0 if DSP part of architecture, ie. |
| 14772 | - post (>=) ARMv5te architecture output |
| 14773 | - A, R or S profile output or ARMv7E-M output architecture. */ |
| 14774 | else if (out_attr[Tag_CPU_arch].i >= 4 |
| 14775 | && (out_attr[Tag_CPU_arch_profile].i == 'A' |
| 14776 | || out_attr[Tag_CPU_arch_profile].i == 'R' |
| 14777 | || out_attr[Tag_CPU_arch_profile].i == 'S' |
| 14778 | || out_attr[Tag_CPU_arch].i == 13)) |
| 14779 | out_attr[i].i = 0; |
| 14780 | /* Otherwise, DSP instructions are added and not part of output |
| 14781 | architecture. */ |
| 14782 | else |
| 14783 | out_attr[i].i = 1; |
| 14784 | break; |
| 14785 | |
| 14786 | case Tag_FP_arch: |
| 14787 | { |
| 14788 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
| 14789 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch |
| 14790 | when it's 0. It might mean absence of FP hardware if |
| 14791 | Tag_FP_arch is zero. */ |
| 14792 | |
| 14793 | #define VFP_VERSION_COUNT 9 |
| 14794 | static const struct |
| 14795 | { |
| 14796 | int ver; |
| 14797 | int regs; |
| 14798 | } vfp_versions[VFP_VERSION_COUNT] = |
| 14799 | { |
| 14800 | {0, 0}, |
| 14801 | {1, 16}, |
| 14802 | {2, 16}, |
| 14803 | {3, 32}, |
| 14804 | {3, 16}, |
| 14805 | {4, 32}, |
| 14806 | {4, 16}, |
| 14807 | {8, 32}, |
| 14808 | {8, 16} |
| 14809 | }; |
| 14810 | int ver; |
| 14811 | int regs; |
| 14812 | int newval; |
| 14813 | |
| 14814 | /* If the output has no requirement about FP hardware, |
| 14815 | follow the requirement of the input. */ |
| 14816 | if (out_attr[i].i == 0) |
| 14817 | { |
| 14818 | /* This assert is still reasonable, we shouldn't |
| 14819 | produce the suspicious build attribute |
| 14820 | combination (See below for in_attr). */ |
| 14821 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); |
| 14822 | out_attr[i].i = in_attr[i].i; |
| 14823 | out_attr[Tag_ABI_HardFP_use].i |
| 14824 | = in_attr[Tag_ABI_HardFP_use].i; |
| 14825 | break; |
| 14826 | } |
| 14827 | /* If the input has no requirement about FP hardware, do |
| 14828 | nothing. */ |
| 14829 | else if (in_attr[i].i == 0) |
| 14830 | { |
| 14831 | /* We used to assert that Tag_ABI_HardFP_use was |
| 14832 | zero here, but we should never assert when |
| 14833 | consuming an object file that has suspicious |
| 14834 | build attributes. The single precision variant |
| 14835 | of 'no FP architecture' is still 'no FP |
| 14836 | architecture', so we just ignore the tag in this |
| 14837 | case. */ |
| 14838 | break; |
| 14839 | } |
| 14840 | |
| 14841 | /* Both the input and the output have nonzero Tag_FP_arch. |
| 14842 | So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */ |
| 14843 | |
| 14844 | /* If both the input and the output have zero Tag_ABI_HardFP_use, |
| 14845 | do nothing. */ |
| 14846 | if (in_attr[Tag_ABI_HardFP_use].i == 0 |
| 14847 | && out_attr[Tag_ABI_HardFP_use].i == 0) |
| 14848 | ; |
| 14849 | /* If the input and the output have different Tag_ABI_HardFP_use, |
| 14850 | the combination of them is 0 (implied by Tag_FP_arch). */ |
| 14851 | else if (in_attr[Tag_ABI_HardFP_use].i |
| 14852 | != out_attr[Tag_ABI_HardFP_use].i) |
| 14853 | out_attr[Tag_ABI_HardFP_use].i = 0; |
| 14854 | |
| 14855 | /* Now we can handle Tag_FP_arch. */ |
| 14856 | |
| 14857 | /* Values of VFP_VERSION_COUNT or more aren't defined, so just |
| 14858 | pick the biggest. */ |
| 14859 | if (in_attr[i].i >= VFP_VERSION_COUNT |
| 14860 | && in_attr[i].i > out_attr[i].i) |
| 14861 | { |
| 14862 | out_attr[i] = in_attr[i]; |
| 14863 | break; |
| 14864 | } |
| 14865 | /* The output uses the superset of input features |
| 14866 | (ISA version) and registers. */ |
| 14867 | ver = vfp_versions[in_attr[i].i].ver; |
| 14868 | if (ver < vfp_versions[out_attr[i].i].ver) |
| 14869 | ver = vfp_versions[out_attr[i].i].ver; |
| 14870 | regs = vfp_versions[in_attr[i].i].regs; |
| 14871 | if (regs < vfp_versions[out_attr[i].i].regs) |
| 14872 | regs = vfp_versions[out_attr[i].i].regs; |
| 14873 | /* This assumes all possible supersets are also a valid |
| 14874 | options. */ |
| 14875 | for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--) |
| 14876 | { |
| 14877 | if (regs == vfp_versions[newval].regs |
| 14878 | && ver == vfp_versions[newval].ver) |
| 14879 | break; |
| 14880 | } |
| 14881 | out_attr[i].i = newval; |
| 14882 | } |
| 14883 | break; |
| 14884 | case Tag_PCS_config: |
| 14885 | if (out_attr[i].i == 0) |
| 14886 | out_attr[i].i = in_attr[i].i; |
| 14887 | else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i) |
| 14888 | { |
| 14889 | /* It's sometimes ok to mix different configs, so this is only |
| 14890 | a warning. */ |
| 14891 | _bfd_error_handler |
| 14892 | (_("warning: %pB: conflicting platform configuration"), ibfd); |
| 14893 | } |
| 14894 | break; |
| 14895 | case Tag_ABI_PCS_R9_use: |
| 14896 | if (in_attr[i].i != out_attr[i].i |
| 14897 | && out_attr[i].i != AEABI_R9_unused |
| 14898 | && in_attr[i].i != AEABI_R9_unused) |
| 14899 | { |
| 14900 | _bfd_error_handler |
| 14901 | (_("error: %pB: conflicting use of R9"), ibfd); |
| 14902 | result = FALSE; |
| 14903 | } |
| 14904 | if (out_attr[i].i == AEABI_R9_unused) |
| 14905 | out_attr[i].i = in_attr[i].i; |
| 14906 | break; |
| 14907 | case Tag_ABI_PCS_RW_data: |
| 14908 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel |
| 14909 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB |
| 14910 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) |
| 14911 | { |
| 14912 | _bfd_error_handler |
| 14913 | (_("error: %pB: SB relative addressing conflicts with use of R9"), |
| 14914 | ibfd); |
| 14915 | result = FALSE; |
| 14916 | } |
| 14917 | /* Use the smallest value specified. */ |
| 14918 | if (in_attr[i].i < out_attr[i].i) |
| 14919 | out_attr[i].i = in_attr[i].i; |
| 14920 | break; |
| 14921 | case Tag_ABI_PCS_wchar_t: |
| 14922 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
| 14923 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) |
| 14924 | { |
| 14925 | _bfd_error_handler |
| 14926 | (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
| 14927 | ibfd, in_attr[i].i, out_attr[i].i); |
| 14928 | } |
| 14929 | else if (in_attr[i].i && !out_attr[i].i) |
| 14930 | out_attr[i].i = in_attr[i].i; |
| 14931 | break; |
| 14932 | case Tag_ABI_enum_size: |
| 14933 | if (in_attr[i].i != AEABI_enum_unused) |
| 14934 | { |
| 14935 | if (out_attr[i].i == AEABI_enum_unused |
| 14936 | || out_attr[i].i == AEABI_enum_forced_wide) |
| 14937 | { |
| 14938 | /* The existing object is compatible with anything. |
| 14939 | Use whatever requirements the new object has. */ |
| 14940 | out_attr[i].i = in_attr[i].i; |
| 14941 | } |
| 14942 | else if (in_attr[i].i != AEABI_enum_forced_wide |
| 14943 | && out_attr[i].i != in_attr[i].i |
| 14944 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
| 14945 | { |
| 14946 | static const char *aeabi_enum_names[] = |
| 14947 | { "", "variable-size", "32-bit", "" }; |
| 14948 | const char *in_name = |
| 14949 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) |
| 14950 | ? aeabi_enum_names[in_attr[i].i] |
| 14951 | : "<unknown>"; |
| 14952 | const char *out_name = |
| 14953 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) |
| 14954 | ? aeabi_enum_names[out_attr[i].i] |
| 14955 | : "<unknown>"; |
| 14956 | _bfd_error_handler |
| 14957 | (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
| 14958 | ibfd, in_name, out_name); |
| 14959 | } |
| 14960 | } |
| 14961 | break; |
| 14962 | case Tag_ABI_VFP_args: |
| 14963 | /* Aready done. */ |
| 14964 | break; |
| 14965 | case Tag_ABI_WMMX_args: |
| 14966 | if (in_attr[i].i != out_attr[i].i) |
| 14967 | { |
| 14968 | _bfd_error_handler |
| 14969 | (_("error: %pB uses iWMMXt register arguments, %pB does not"), |
| 14970 | ibfd, obfd); |
| 14971 | result = FALSE; |
| 14972 | } |
| 14973 | break; |
| 14974 | case Tag_compatibility: |
| 14975 | /* Merged in target-independent code. */ |
| 14976 | break; |
| 14977 | case Tag_ABI_HardFP_use: |
| 14978 | /* This is handled along with Tag_FP_arch. */ |
| 14979 | break; |
| 14980 | case Tag_ABI_FP_16bit_format: |
| 14981 | if (in_attr[i].i != 0 && out_attr[i].i != 0) |
| 14982 | { |
| 14983 | if (in_attr[i].i != out_attr[i].i) |
| 14984 | { |
| 14985 | _bfd_error_handler |
| 14986 | (_("error: fp16 format mismatch between %pB and %pB"), |
| 14987 | ibfd, obfd); |
| 14988 | result = FALSE; |
| 14989 | } |
| 14990 | } |
| 14991 | if (in_attr[i].i != 0) |
| 14992 | out_attr[i].i = in_attr[i].i; |
| 14993 | break; |
| 14994 | |
| 14995 | case Tag_DIV_use: |
| 14996 | /* A value of zero on input means that the divide instruction may |
| 14997 | be used if available in the base architecture as specified via |
| 14998 | Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that |
| 14999 | the user did not want divide instructions. A value of 2 |
| 15000 | explicitly means that divide instructions were allowed in ARM |
| 15001 | and Thumb state. */ |
| 15002 | if (in_attr[i].i == out_attr[i].i) |
| 15003 | /* Do nothing. */ ; |
| 15004 | else if (elf32_arm_attributes_forbid_div (in_attr) |
| 15005 | && !elf32_arm_attributes_accept_div (out_attr)) |
| 15006 | out_attr[i].i = 1; |
| 15007 | else if (elf32_arm_attributes_forbid_div (out_attr) |
| 15008 | && elf32_arm_attributes_accept_div (in_attr)) |
| 15009 | out_attr[i].i = in_attr[i].i; |
| 15010 | else if (in_attr[i].i == 2) |
| 15011 | out_attr[i].i = in_attr[i].i; |
| 15012 | break; |
| 15013 | |
| 15014 | case Tag_MPextension_use_legacy: |
| 15015 | /* We don't output objects with Tag_MPextension_use_legacy - we |
| 15016 | move the value to Tag_MPextension_use. */ |
| 15017 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) |
| 15018 | { |
| 15019 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) |
| 15020 | { |
| 15021 | _bfd_error_handler |
| 15022 | (_("%pB has both the current and legacy " |
| 15023 | "Tag_MPextension_use attributes"), |
| 15024 | ibfd); |
| 15025 | result = FALSE; |
| 15026 | } |
| 15027 | } |
| 15028 | |
| 15029 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) |
| 15030 | out_attr[Tag_MPextension_use] = in_attr[i]; |
| 15031 | |
| 15032 | break; |
| 15033 | |
| 15034 | case Tag_nodefaults: |
| 15035 | /* This tag is set if it exists, but the value is unused (and is |
| 15036 | typically zero). We don't actually need to do anything here - |
| 15037 | the merge happens automatically when the type flags are merged |
| 15038 | below. */ |
| 15039 | break; |
| 15040 | case Tag_also_compatible_with: |
| 15041 | /* Already done in Tag_CPU_arch. */ |
| 15042 | break; |
| 15043 | case Tag_conformance: |
| 15044 | /* Keep the attribute if it matches. Throw it away otherwise. |
| 15045 | No attribute means no claim to conform. */ |
| 15046 | if (!in_attr[i].s || !out_attr[i].s |
| 15047 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) |
| 15048 | out_attr[i].s = NULL; |
| 15049 | break; |
| 15050 | |
| 15051 | default: |
| 15052 | result |
| 15053 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); |
| 15054 | } |
| 15055 | |
| 15056 | /* If out_attr was copied from in_attr then it won't have a type yet. */ |
| 15057 | if (in_attr[i].type && !out_attr[i].type) |
| 15058 | out_attr[i].type = in_attr[i].type; |
| 15059 | } |
| 15060 | |
| 15061 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
| 15062 | if (!_bfd_elf_merge_object_attributes (ibfd, info)) |
| 15063 | return FALSE; |
| 15064 | |
| 15065 | /* Check for any attributes not known on ARM. */ |
| 15066 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
| 15067 | |
| 15068 | return result; |
| 15069 | } |
| 15070 | |
| 15071 | |
| 15072 | /* Return TRUE if the two EABI versions are incompatible. */ |
| 15073 | |
| 15074 | static bfd_boolean |
| 15075 | elf32_arm_versions_compatible (unsigned iver, unsigned over) |
| 15076 | { |
| 15077 | /* v4 and v5 are the same spec before and after it was released, |
| 15078 | so allow mixing them. */ |
| 15079 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) |
| 15080 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) |
| 15081 | return TRUE; |
| 15082 | |
| 15083 | return (iver == over); |
| 15084 | } |
| 15085 | |
| 15086 | /* Merge backend specific data from an object file to the output |
| 15087 | object file when linking. */ |
| 15088 | |
| 15089 | static bfd_boolean |
| 15090 | elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *); |
| 15091 | |
| 15092 | /* Display the flags field. */ |
| 15093 | |
| 15094 | static bfd_boolean |
| 15095 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
| 15096 | { |
| 15097 | FILE * file = (FILE *) ptr; |
| 15098 | unsigned long flags; |
| 15099 | |
| 15100 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
| 15101 | |
| 15102 | /* Print normal ELF private data. */ |
| 15103 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
| 15104 | |
| 15105 | flags = elf_elfheader (abfd)->e_flags; |
| 15106 | /* Ignore init flag - it may not be set, despite the flags field |
| 15107 | containing valid data. */ |
| 15108 | |
| 15109 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
| 15110 | |
| 15111 | switch (EF_ARM_EABI_VERSION (flags)) |
| 15112 | { |
| 15113 | case EF_ARM_EABI_UNKNOWN: |
| 15114 | /* The following flag bits are GNU extensions and not part of the |
| 15115 | official ARM ELF extended ABI. Hence they are only decoded if |
| 15116 | the EABI version is not set. */ |
| 15117 | if (flags & EF_ARM_INTERWORK) |
| 15118 | fprintf (file, _(" [interworking enabled]")); |
| 15119 | |
| 15120 | if (flags & EF_ARM_APCS_26) |
| 15121 | fprintf (file, " [APCS-26]"); |
| 15122 | else |
| 15123 | fprintf (file, " [APCS-32]"); |
| 15124 | |
| 15125 | if (flags & EF_ARM_VFP_FLOAT) |
| 15126 | fprintf (file, _(" [VFP float format]")); |
| 15127 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
| 15128 | fprintf (file, _(" [Maverick float format]")); |
| 15129 | else |
| 15130 | fprintf (file, _(" [FPA float format]")); |
| 15131 | |
| 15132 | if (flags & EF_ARM_APCS_FLOAT) |
| 15133 | fprintf (file, _(" [floats passed in float registers]")); |
| 15134 | |
| 15135 | if (flags & EF_ARM_PIC) |
| 15136 | fprintf (file, _(" [position independent]")); |
| 15137 | |
| 15138 | if (flags & EF_ARM_NEW_ABI) |
| 15139 | fprintf (file, _(" [new ABI]")); |
| 15140 | |
| 15141 | if (flags & EF_ARM_OLD_ABI) |
| 15142 | fprintf (file, _(" [old ABI]")); |
| 15143 | |
| 15144 | if (flags & EF_ARM_SOFT_FLOAT) |
| 15145 | fprintf (file, _(" [software FP]")); |
| 15146 | |
| 15147 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
| 15148 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI |
| 15149 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
| 15150 | | EF_ARM_MAVERICK_FLOAT); |
| 15151 | break; |
| 15152 | |
| 15153 | case EF_ARM_EABI_VER1: |
| 15154 | fprintf (file, _(" [Version1 EABI]")); |
| 15155 | |
| 15156 | if (flags & EF_ARM_SYMSARESORTED) |
| 15157 | fprintf (file, _(" [sorted symbol table]")); |
| 15158 | else |
| 15159 | fprintf (file, _(" [unsorted symbol table]")); |
| 15160 | |
| 15161 | flags &= ~ EF_ARM_SYMSARESORTED; |
| 15162 | break; |
| 15163 | |
| 15164 | case EF_ARM_EABI_VER2: |
| 15165 | fprintf (file, _(" [Version2 EABI]")); |
| 15166 | |
| 15167 | if (flags & EF_ARM_SYMSARESORTED) |
| 15168 | fprintf (file, _(" [sorted symbol table]")); |
| 15169 | else |
| 15170 | fprintf (file, _(" [unsorted symbol table]")); |
| 15171 | |
| 15172 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) |
| 15173 | fprintf (file, _(" [dynamic symbols use segment index]")); |
| 15174 | |
| 15175 | if (flags & EF_ARM_MAPSYMSFIRST) |
| 15176 | fprintf (file, _(" [mapping symbols precede others]")); |
| 15177 | |
| 15178 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
| 15179 | | EF_ARM_MAPSYMSFIRST); |
| 15180 | break; |
| 15181 | |
| 15182 | case EF_ARM_EABI_VER3: |
| 15183 | fprintf (file, _(" [Version3 EABI]")); |
| 15184 | break; |
| 15185 | |
| 15186 | case EF_ARM_EABI_VER4: |
| 15187 | fprintf (file, _(" [Version4 EABI]")); |
| 15188 | goto eabi; |
| 15189 | |
| 15190 | case EF_ARM_EABI_VER5: |
| 15191 | fprintf (file, _(" [Version5 EABI]")); |
| 15192 | |
| 15193 | if (flags & EF_ARM_ABI_FLOAT_SOFT) |
| 15194 | fprintf (file, _(" [soft-float ABI]")); |
| 15195 | |
| 15196 | if (flags & EF_ARM_ABI_FLOAT_HARD) |
| 15197 | fprintf (file, _(" [hard-float ABI]")); |
| 15198 | |
| 15199 | flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD); |
| 15200 | |
| 15201 | eabi: |
| 15202 | if (flags & EF_ARM_BE8) |
| 15203 | fprintf (file, _(" [BE8]")); |
| 15204 | |
| 15205 | if (flags & EF_ARM_LE8) |
| 15206 | fprintf (file, _(" [LE8]")); |
| 15207 | |
| 15208 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); |
| 15209 | break; |
| 15210 | |
| 15211 | default: |
| 15212 | fprintf (file, _(" <EABI version unrecognised>")); |
| 15213 | break; |
| 15214 | } |
| 15215 | |
| 15216 | flags &= ~ EF_ARM_EABIMASK; |
| 15217 | |
| 15218 | if (flags & EF_ARM_RELEXEC) |
| 15219 | fprintf (file, _(" [relocatable executable]")); |
| 15220 | |
| 15221 | if (flags & EF_ARM_PIC) |
| 15222 | fprintf (file, _(" [position independent]")); |
| 15223 | |
| 15224 | if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC) |
| 15225 | fprintf (file, _(" [FDPIC ABI supplement]")); |
| 15226 | |
| 15227 | flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC); |
| 15228 | |
| 15229 | if (flags) |
| 15230 | fprintf (file, _("<Unrecognised flag bits set>")); |
| 15231 | |
| 15232 | fputc ('\n', file); |
| 15233 | |
| 15234 | return TRUE; |
| 15235 | } |
| 15236 | |
| 15237 | static int |
| 15238 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
| 15239 | { |
| 15240 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
| 15241 | { |
| 15242 | case STT_ARM_TFUNC: |
| 15243 | return ELF_ST_TYPE (elf_sym->st_info); |
| 15244 | |
| 15245 | case STT_ARM_16BIT: |
| 15246 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. |
| 15247 | This allows us to distinguish between data used by Thumb instructions |
| 15248 | and non-data (which is probably code) inside Thumb regions of an |
| 15249 | executable. */ |
| 15250 | if (type != STT_OBJECT && type != STT_TLS) |
| 15251 | return ELF_ST_TYPE (elf_sym->st_info); |
| 15252 | break; |
| 15253 | |
| 15254 | default: |
| 15255 | break; |
| 15256 | } |
| 15257 | |
| 15258 | return type; |
| 15259 | } |
| 15260 | |
| 15261 | static asection * |
| 15262 | elf32_arm_gc_mark_hook (asection *sec, |
| 15263 | struct bfd_link_info *info, |
| 15264 | Elf_Internal_Rela *rel, |
| 15265 | struct elf_link_hash_entry *h, |
| 15266 | Elf_Internal_Sym *sym) |
| 15267 | { |
| 15268 | if (h != NULL) |
| 15269 | switch (ELF32_R_TYPE (rel->r_info)) |
| 15270 | { |
| 15271 | case R_ARM_GNU_VTINHERIT: |
| 15272 | case R_ARM_GNU_VTENTRY: |
| 15273 | return NULL; |
| 15274 | } |
| 15275 | |
| 15276 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
| 15277 | } |
| 15278 | |
| 15279 | /* Look through the relocs for a section during the first phase. */ |
| 15280 | |
| 15281 | static bfd_boolean |
| 15282 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
| 15283 | asection *sec, const Elf_Internal_Rela *relocs) |
| 15284 | { |
| 15285 | Elf_Internal_Shdr *symtab_hdr; |
| 15286 | struct elf_link_hash_entry **sym_hashes; |
| 15287 | const Elf_Internal_Rela *rel; |
| 15288 | const Elf_Internal_Rela *rel_end; |
| 15289 | bfd *dynobj; |
| 15290 | asection *sreloc; |
| 15291 | struct elf32_arm_link_hash_table *htab; |
| 15292 | bfd_boolean call_reloc_p; |
| 15293 | bfd_boolean may_become_dynamic_p; |
| 15294 | bfd_boolean may_need_local_target_p; |
| 15295 | unsigned long nsyms; |
| 15296 | |
| 15297 | if (bfd_link_relocatable (info)) |
| 15298 | return TRUE; |
| 15299 | |
| 15300 | BFD_ASSERT (is_arm_elf (abfd)); |
| 15301 | |
| 15302 | htab = elf32_arm_hash_table (info); |
| 15303 | if (htab == NULL) |
| 15304 | return FALSE; |
| 15305 | |
| 15306 | sreloc = NULL; |
| 15307 | |
| 15308 | /* Create dynamic sections for relocatable executables so that we can |
| 15309 | copy relocations. */ |
| 15310 | if (htab->root.is_relocatable_executable |
| 15311 | && ! htab->root.dynamic_sections_created) |
| 15312 | { |
| 15313 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) |
| 15314 | return FALSE; |
| 15315 | } |
| 15316 | |
| 15317 | if (htab->root.dynobj == NULL) |
| 15318 | htab->root.dynobj = abfd; |
| 15319 | if (!create_ifunc_sections (info)) |
| 15320 | return FALSE; |
| 15321 | |
| 15322 | dynobj = htab->root.dynobj; |
| 15323 | |
| 15324 | symtab_hdr = & elf_symtab_hdr (abfd); |
| 15325 | sym_hashes = elf_sym_hashes (abfd); |
| 15326 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
| 15327 | |
| 15328 | rel_end = relocs + sec->reloc_count; |
| 15329 | for (rel = relocs; rel < rel_end; rel++) |
| 15330 | { |
| 15331 | Elf_Internal_Sym *isym; |
| 15332 | struct elf_link_hash_entry *h; |
| 15333 | struct elf32_arm_link_hash_entry *eh; |
| 15334 | unsigned int r_symndx; |
| 15335 | int r_type; |
| 15336 | |
| 15337 | r_symndx = ELF32_R_SYM (rel->r_info); |
| 15338 | r_type = ELF32_R_TYPE (rel->r_info); |
| 15339 | r_type = arm_real_reloc_type (htab, r_type); |
| 15340 | |
| 15341 | if (r_symndx >= nsyms |
| 15342 | /* PR 9934: It is possible to have relocations that do not |
| 15343 | refer to symbols, thus it is also possible to have an |
| 15344 | object file containing relocations but no symbol table. */ |
| 15345 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
| 15346 | { |
| 15347 | _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, |
| 15348 | r_symndx); |
| 15349 | return FALSE; |
| 15350 | } |
| 15351 | |
| 15352 | h = NULL; |
| 15353 | isym = NULL; |
| 15354 | if (nsyms > 0) |
| 15355 | { |
| 15356 | if (r_symndx < symtab_hdr->sh_info) |
| 15357 | { |
| 15358 | /* A local symbol. */ |
| 15359 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, |
| 15360 | abfd, r_symndx); |
| 15361 | if (isym == NULL) |
| 15362 | return FALSE; |
| 15363 | } |
| 15364 | else |
| 15365 | { |
| 15366 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; |
| 15367 | while (h->root.type == bfd_link_hash_indirect |
| 15368 | || h->root.type == bfd_link_hash_warning) |
| 15369 | h = (struct elf_link_hash_entry *) h->root.u.i.link; |
| 15370 | } |
| 15371 | } |
| 15372 | |
| 15373 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 15374 | |
| 15375 | call_reloc_p = FALSE; |
| 15376 | may_become_dynamic_p = FALSE; |
| 15377 | may_need_local_target_p = FALSE; |
| 15378 | |
| 15379 | /* Could be done earlier, if h were already available. */ |
| 15380 | r_type = elf32_arm_tls_transition (info, r_type, h); |
| 15381 | switch (r_type) |
| 15382 | { |
| 15383 | case R_ARM_GOTOFFFUNCDESC: |
| 15384 | { |
| 15385 | if (h == NULL) |
| 15386 | { |
| 15387 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
| 15388 | return FALSE; |
| 15389 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1; |
| 15390 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1; |
| 15391 | } |
| 15392 | else |
| 15393 | { |
| 15394 | eh->fdpic_cnts.gotofffuncdesc_cnt++; |
| 15395 | } |
| 15396 | } |
| 15397 | break; |
| 15398 | |
| 15399 | case R_ARM_GOTFUNCDESC: |
| 15400 | { |
| 15401 | if (h == NULL) |
| 15402 | { |
| 15403 | /* Such a relocation is not supposed to be generated |
| 15404 | by gcc on a static function. */ |
| 15405 | /* Anyway if needed it could be handled. */ |
| 15406 | abort(); |
| 15407 | } |
| 15408 | else |
| 15409 | { |
| 15410 | eh->fdpic_cnts.gotfuncdesc_cnt++; |
| 15411 | } |
| 15412 | } |
| 15413 | break; |
| 15414 | |
| 15415 | case R_ARM_FUNCDESC: |
| 15416 | { |
| 15417 | if (h == NULL) |
| 15418 | { |
| 15419 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
| 15420 | return FALSE; |
| 15421 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1; |
| 15422 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1; |
| 15423 | } |
| 15424 | else |
| 15425 | { |
| 15426 | eh->fdpic_cnts.funcdesc_cnt++; |
| 15427 | } |
| 15428 | } |
| 15429 | break; |
| 15430 | |
| 15431 | case R_ARM_GOT32: |
| 15432 | case R_ARM_GOT_PREL: |
| 15433 | case R_ARM_TLS_GD32: |
| 15434 | case R_ARM_TLS_GD32_FDPIC: |
| 15435 | case R_ARM_TLS_IE32: |
| 15436 | case R_ARM_TLS_IE32_FDPIC: |
| 15437 | case R_ARM_TLS_GOTDESC: |
| 15438 | case R_ARM_TLS_DESCSEQ: |
| 15439 | case R_ARM_THM_TLS_DESCSEQ: |
| 15440 | case R_ARM_TLS_CALL: |
| 15441 | case R_ARM_THM_TLS_CALL: |
| 15442 | /* This symbol requires a global offset table entry. */ |
| 15443 | { |
| 15444 | int tls_type, old_tls_type; |
| 15445 | |
| 15446 | switch (r_type) |
| 15447 | { |
| 15448 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; |
| 15449 | case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break; |
| 15450 | |
| 15451 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
| 15452 | case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break; |
| 15453 | |
| 15454 | case R_ARM_TLS_GOTDESC: |
| 15455 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: |
| 15456 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: |
| 15457 | tls_type = GOT_TLS_GDESC; break; |
| 15458 | |
| 15459 | default: tls_type = GOT_NORMAL; break; |
| 15460 | } |
| 15461 | |
| 15462 | if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE)) |
| 15463 | info->flags |= DF_STATIC_TLS; |
| 15464 | |
| 15465 | if (h != NULL) |
| 15466 | { |
| 15467 | h->got.refcount++; |
| 15468 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; |
| 15469 | } |
| 15470 | else |
| 15471 | { |
| 15472 | /* This is a global offset table entry for a local symbol. */ |
| 15473 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
| 15474 | return FALSE; |
| 15475 | elf_local_got_refcounts (abfd)[r_symndx] += 1; |
| 15476 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
| 15477 | } |
| 15478 | |
| 15479 | /* If a variable is accessed with both tls methods, two |
| 15480 | slots may be created. */ |
| 15481 | if (GOT_TLS_GD_ANY_P (old_tls_type) |
| 15482 | && GOT_TLS_GD_ANY_P (tls_type)) |
| 15483 | tls_type |= old_tls_type; |
| 15484 | |
| 15485 | /* We will already have issued an error message if there |
| 15486 | is a TLS/non-TLS mismatch, based on the symbol |
| 15487 | type. So just combine any TLS types needed. */ |
| 15488 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
| 15489 | && tls_type != GOT_NORMAL) |
| 15490 | tls_type |= old_tls_type; |
| 15491 | |
| 15492 | /* If the symbol is accessed in both IE and GDESC |
| 15493 | method, we're able to relax. Turn off the GDESC flag, |
| 15494 | without messing up with any other kind of tls types |
| 15495 | that may be involved. */ |
| 15496 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) |
| 15497 | tls_type &= ~GOT_TLS_GDESC; |
| 15498 | |
| 15499 | if (old_tls_type != tls_type) |
| 15500 | { |
| 15501 | if (h != NULL) |
| 15502 | elf32_arm_hash_entry (h)->tls_type = tls_type; |
| 15503 | else |
| 15504 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; |
| 15505 | } |
| 15506 | } |
| 15507 | /* Fall through. */ |
| 15508 | |
| 15509 | case R_ARM_TLS_LDM32: |
| 15510 | case R_ARM_TLS_LDM32_FDPIC: |
| 15511 | if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC) |
| 15512 | htab->tls_ldm_got.refcount++; |
| 15513 | /* Fall through. */ |
| 15514 | |
| 15515 | case R_ARM_GOTOFF32: |
| 15516 | case R_ARM_GOTPC: |
| 15517 | if (htab->root.sgot == NULL |
| 15518 | && !create_got_section (htab->root.dynobj, info)) |
| 15519 | return FALSE; |
| 15520 | break; |
| 15521 | |
| 15522 | case R_ARM_PC24: |
| 15523 | case R_ARM_PLT32: |
| 15524 | case R_ARM_CALL: |
| 15525 | case R_ARM_JUMP24: |
| 15526 | case R_ARM_PREL31: |
| 15527 | case R_ARM_THM_CALL: |
| 15528 | case R_ARM_THM_JUMP24: |
| 15529 | case R_ARM_THM_JUMP19: |
| 15530 | call_reloc_p = TRUE; |
| 15531 | may_need_local_target_p = TRUE; |
| 15532 | break; |
| 15533 | |
| 15534 | case R_ARM_ABS12: |
| 15535 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for |
| 15536 | ldr __GOTT_INDEX__ offsets. */ |
| 15537 | if (!htab->vxworks_p) |
| 15538 | { |
| 15539 | may_need_local_target_p = TRUE; |
| 15540 | break; |
| 15541 | } |
| 15542 | else goto jump_over; |
| 15543 | |
| 15544 | /* Fall through. */ |
| 15545 | |
| 15546 | case R_ARM_MOVW_ABS_NC: |
| 15547 | case R_ARM_MOVT_ABS: |
| 15548 | case R_ARM_THM_MOVW_ABS_NC: |
| 15549 | case R_ARM_THM_MOVT_ABS: |
| 15550 | if (bfd_link_pic (info)) |
| 15551 | { |
| 15552 | _bfd_error_handler |
| 15553 | (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), |
| 15554 | abfd, elf32_arm_howto_table_1[r_type].name, |
| 15555 | (h) ? h->root.root.string : "a local symbol"); |
| 15556 | bfd_set_error (bfd_error_bad_value); |
| 15557 | return FALSE; |
| 15558 | } |
| 15559 | |
| 15560 | /* Fall through. */ |
| 15561 | case R_ARM_ABS32: |
| 15562 | case R_ARM_ABS32_NOI: |
| 15563 | jump_over: |
| 15564 | if (h != NULL && bfd_link_executable (info)) |
| 15565 | { |
| 15566 | h->pointer_equality_needed = 1; |
| 15567 | } |
| 15568 | /* Fall through. */ |
| 15569 | case R_ARM_REL32: |
| 15570 | case R_ARM_REL32_NOI: |
| 15571 | case R_ARM_MOVW_PREL_NC: |
| 15572 | case R_ARM_MOVT_PREL: |
| 15573 | case R_ARM_THM_MOVW_PREL_NC: |
| 15574 | case R_ARM_THM_MOVT_PREL: |
| 15575 | |
| 15576 | /* Should the interworking branches be listed here? */ |
| 15577 | if ((bfd_link_pic (info) || htab->root.is_relocatable_executable |
| 15578 | || htab->fdpic_p) |
| 15579 | && (sec->flags & SEC_ALLOC) != 0) |
| 15580 | { |
| 15581 | if (h == NULL |
| 15582 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
| 15583 | { |
| 15584 | /* In shared libraries and relocatable executables, |
| 15585 | we treat local relative references as calls; |
| 15586 | see the related SYMBOL_CALLS_LOCAL code in |
| 15587 | allocate_dynrelocs. */ |
| 15588 | call_reloc_p = TRUE; |
| 15589 | may_need_local_target_p = TRUE; |
| 15590 | } |
| 15591 | else |
| 15592 | /* We are creating a shared library or relocatable |
| 15593 | executable, and this is a reloc against a global symbol, |
| 15594 | or a non-PC-relative reloc against a local symbol. |
| 15595 | We may need to copy the reloc into the output. */ |
| 15596 | may_become_dynamic_p = TRUE; |
| 15597 | } |
| 15598 | else |
| 15599 | may_need_local_target_p = TRUE; |
| 15600 | break; |
| 15601 | |
| 15602 | /* This relocation describes the C++ object vtable hierarchy. |
| 15603 | Reconstruct it for later use during GC. */ |
| 15604 | case R_ARM_GNU_VTINHERIT: |
| 15605 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) |
| 15606 | return FALSE; |
| 15607 | break; |
| 15608 | |
| 15609 | /* This relocation describes which C++ vtable entries are actually |
| 15610 | used. Record for later use during GC. */ |
| 15611 | case R_ARM_GNU_VTENTRY: |
| 15612 | if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) |
| 15613 | return FALSE; |
| 15614 | break; |
| 15615 | } |
| 15616 | |
| 15617 | if (h != NULL) |
| 15618 | { |
| 15619 | if (call_reloc_p) |
| 15620 | /* We may need a .plt entry if the function this reloc |
| 15621 | refers to is in a different object, regardless of the |
| 15622 | symbol's type. We can't tell for sure yet, because |
| 15623 | something later might force the symbol local. */ |
| 15624 | h->needs_plt = 1; |
| 15625 | else if (may_need_local_target_p) |
| 15626 | /* If this reloc is in a read-only section, we might |
| 15627 | need a copy reloc. We can't check reliably at this |
| 15628 | stage whether the section is read-only, as input |
| 15629 | sections have not yet been mapped to output sections. |
| 15630 | Tentatively set the flag for now, and correct in |
| 15631 | adjust_dynamic_symbol. */ |
| 15632 | h->non_got_ref = 1; |
| 15633 | } |
| 15634 | |
| 15635 | if (may_need_local_target_p |
| 15636 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) |
| 15637 | { |
| 15638 | union gotplt_union *root_plt; |
| 15639 | struct arm_plt_info *arm_plt; |
| 15640 | struct arm_local_iplt_info *local_iplt; |
| 15641 | |
| 15642 | if (h != NULL) |
| 15643 | { |
| 15644 | root_plt = &h->plt; |
| 15645 | arm_plt = &eh->plt; |
| 15646 | } |
| 15647 | else |
| 15648 | { |
| 15649 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); |
| 15650 | if (local_iplt == NULL) |
| 15651 | return FALSE; |
| 15652 | root_plt = &local_iplt->root; |
| 15653 | arm_plt = &local_iplt->arm; |
| 15654 | } |
| 15655 | |
| 15656 | /* If the symbol is a function that doesn't bind locally, |
| 15657 | this relocation will need a PLT entry. */ |
| 15658 | if (root_plt->refcount != -1) |
| 15659 | root_plt->refcount += 1; |
| 15660 | |
| 15661 | if (!call_reloc_p) |
| 15662 | arm_plt->noncall_refcount++; |
| 15663 | |
| 15664 | /* It's too early to use htab->use_blx here, so we have to |
| 15665 | record possible blx references separately from |
| 15666 | relocs that definitely need a thumb stub. */ |
| 15667 | |
| 15668 | if (r_type == R_ARM_THM_CALL) |
| 15669 | arm_plt->maybe_thumb_refcount += 1; |
| 15670 | |
| 15671 | if (r_type == R_ARM_THM_JUMP24 |
| 15672 | || r_type == R_ARM_THM_JUMP19) |
| 15673 | arm_plt->thumb_refcount += 1; |
| 15674 | } |
| 15675 | |
| 15676 | if (may_become_dynamic_p) |
| 15677 | { |
| 15678 | struct elf_dyn_relocs *p, **head; |
| 15679 | |
| 15680 | /* Create a reloc section in dynobj. */ |
| 15681 | if (sreloc == NULL) |
| 15682 | { |
| 15683 | sreloc = _bfd_elf_make_dynamic_reloc_section |
| 15684 | (sec, dynobj, 2, abfd, ! htab->use_rel); |
| 15685 | |
| 15686 | if (sreloc == NULL) |
| 15687 | return FALSE; |
| 15688 | |
| 15689 | /* BPABI objects never have dynamic relocations mapped. */ |
| 15690 | if (htab->symbian_p) |
| 15691 | { |
| 15692 | flagword flags; |
| 15693 | |
| 15694 | flags = bfd_get_section_flags (dynobj, sreloc); |
| 15695 | flags &= ~(SEC_LOAD | SEC_ALLOC); |
| 15696 | bfd_set_section_flags (dynobj, sreloc, flags); |
| 15697 | } |
| 15698 | } |
| 15699 | |
| 15700 | /* If this is a global symbol, count the number of |
| 15701 | relocations we need for this symbol. */ |
| 15702 | if (h != NULL) |
| 15703 | head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; |
| 15704 | else |
| 15705 | { |
| 15706 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
| 15707 | if (head == NULL) |
| 15708 | return FALSE; |
| 15709 | } |
| 15710 | |
| 15711 | p = *head; |
| 15712 | if (p == NULL || p->sec != sec) |
| 15713 | { |
| 15714 | bfd_size_type amt = sizeof *p; |
| 15715 | |
| 15716 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); |
| 15717 | if (p == NULL) |
| 15718 | return FALSE; |
| 15719 | p->next = *head; |
| 15720 | *head = p; |
| 15721 | p->sec = sec; |
| 15722 | p->count = 0; |
| 15723 | p->pc_count = 0; |
| 15724 | } |
| 15725 | |
| 15726 | if (elf32_arm_howto_from_type (r_type)->pc_relative) |
| 15727 | p->pc_count += 1; |
| 15728 | p->count += 1; |
| 15729 | if (h == NULL && htab->fdpic_p && !bfd_link_pic(info) |
| 15730 | && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) { |
| 15731 | /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI |
| 15732 | that will become rofixup. */ |
| 15733 | /* This is due to the fact that we suppose all will become rofixup. */ |
| 15734 | fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type); |
| 15735 | _bfd_error_handler |
| 15736 | (_("FDPIC does not yet support %s relocation" |
| 15737 | " to become dynamic for executable"), |
| 15738 | elf32_arm_howto_table_1[r_type].name); |
| 15739 | abort(); |
| 15740 | } |
| 15741 | } |
| 15742 | } |
| 15743 | |
| 15744 | return TRUE; |
| 15745 | } |
| 15746 | |
| 15747 | static void |
| 15748 | elf32_arm_update_relocs (asection *o, |
| 15749 | struct bfd_elf_section_reloc_data *reldata) |
| 15750 | { |
| 15751 | void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *); |
| 15752 | void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *); |
| 15753 | const struct elf_backend_data *bed; |
| 15754 | _arm_elf_section_data *eado; |
| 15755 | struct bfd_link_order *p; |
| 15756 | bfd_byte *erela_head, *erela; |
| 15757 | Elf_Internal_Rela *irela_head, *irela; |
| 15758 | Elf_Internal_Shdr *rel_hdr; |
| 15759 | bfd *abfd; |
| 15760 | unsigned int count; |
| 15761 | |
| 15762 | eado = get_arm_elf_section_data (o); |
| 15763 | |
| 15764 | if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX) |
| 15765 | return; |
| 15766 | |
| 15767 | abfd = o->owner; |
| 15768 | bed = get_elf_backend_data (abfd); |
| 15769 | rel_hdr = reldata->hdr; |
| 15770 | |
| 15771 | if (rel_hdr->sh_entsize == bed->s->sizeof_rel) |
| 15772 | { |
| 15773 | swap_in = bed->s->swap_reloc_in; |
| 15774 | swap_out = bed->s->swap_reloc_out; |
| 15775 | } |
| 15776 | else if (rel_hdr->sh_entsize == bed->s->sizeof_rela) |
| 15777 | { |
| 15778 | swap_in = bed->s->swap_reloca_in; |
| 15779 | swap_out = bed->s->swap_reloca_out; |
| 15780 | } |
| 15781 | else |
| 15782 | abort (); |
| 15783 | |
| 15784 | erela_head = rel_hdr->contents; |
| 15785 | irela_head = (Elf_Internal_Rela *) bfd_zmalloc |
| 15786 | ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head)); |
| 15787 | |
| 15788 | erela = erela_head; |
| 15789 | irela = irela_head; |
| 15790 | count = 0; |
| 15791 | |
| 15792 | for (p = o->map_head.link_order; p; p = p->next) |
| 15793 | { |
| 15794 | if (p->type == bfd_section_reloc_link_order |
| 15795 | || p->type == bfd_symbol_reloc_link_order) |
| 15796 | { |
| 15797 | (*swap_in) (abfd, erela, irela); |
| 15798 | erela += rel_hdr->sh_entsize; |
| 15799 | irela++; |
| 15800 | count++; |
| 15801 | } |
| 15802 | else if (p->type == bfd_indirect_link_order) |
| 15803 | { |
| 15804 | struct bfd_elf_section_reloc_data *input_reldata; |
| 15805 | arm_unwind_table_edit *edit_list, *edit_tail; |
| 15806 | _arm_elf_section_data *eadi; |
| 15807 | bfd_size_type j; |
| 15808 | bfd_vma offset; |
| 15809 | asection *i; |
| 15810 | |
| 15811 | i = p->u.indirect.section; |
| 15812 | |
| 15813 | eadi = get_arm_elf_section_data (i); |
| 15814 | edit_list = eadi->u.exidx.unwind_edit_list; |
| 15815 | edit_tail = eadi->u.exidx.unwind_edit_tail; |
| 15816 | offset = i->output_offset; |
| 15817 | |
| 15818 | if (eadi->elf.rel.hdr && |
| 15819 | eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize) |
| 15820 | input_reldata = &eadi->elf.rel; |
| 15821 | else if (eadi->elf.rela.hdr && |
| 15822 | eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize) |
| 15823 | input_reldata = &eadi->elf.rela; |
| 15824 | else |
| 15825 | abort (); |
| 15826 | |
| 15827 | if (edit_list) |
| 15828 | { |
| 15829 | for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++) |
| 15830 | { |
| 15831 | arm_unwind_table_edit *edit_node, *edit_next; |
| 15832 | bfd_vma bias; |
| 15833 | bfd_vma reloc_index; |
| 15834 | |
| 15835 | (*swap_in) (abfd, erela, irela); |
| 15836 | reloc_index = (irela->r_offset - offset) / 8; |
| 15837 | |
| 15838 | bias = 0; |
| 15839 | edit_node = edit_list; |
| 15840 | for (edit_next = edit_list; |
| 15841 | edit_next && edit_next->index <= reloc_index; |
| 15842 | edit_next = edit_node->next) |
| 15843 | { |
| 15844 | bias++; |
| 15845 | edit_node = edit_next; |
| 15846 | } |
| 15847 | |
| 15848 | if (edit_node->type != DELETE_EXIDX_ENTRY |
| 15849 | || edit_node->index != reloc_index) |
| 15850 | { |
| 15851 | irela->r_offset -= bias * 8; |
| 15852 | irela++; |
| 15853 | count++; |
| 15854 | } |
| 15855 | |
| 15856 | erela += rel_hdr->sh_entsize; |
| 15857 | } |
| 15858 | |
| 15859 | if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END) |
| 15860 | { |
| 15861 | /* New relocation entity. */ |
| 15862 | asection *text_sec = edit_tail->linked_section; |
| 15863 | asection *text_out = text_sec->output_section; |
| 15864 | bfd_vma exidx_offset = offset + i->size - 8; |
| 15865 | |
| 15866 | irela->r_addend = 0; |
| 15867 | irela->r_offset = exidx_offset; |
| 15868 | irela->r_info = ELF32_R_INFO |
| 15869 | (text_out->target_index, R_ARM_PREL31); |
| 15870 | irela++; |
| 15871 | count++; |
| 15872 | } |
| 15873 | } |
| 15874 | else |
| 15875 | { |
| 15876 | for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++) |
| 15877 | { |
| 15878 | (*swap_in) (abfd, erela, irela); |
| 15879 | erela += rel_hdr->sh_entsize; |
| 15880 | irela++; |
| 15881 | } |
| 15882 | |
| 15883 | count += NUM_SHDR_ENTRIES (input_reldata->hdr); |
| 15884 | } |
| 15885 | } |
| 15886 | } |
| 15887 | |
| 15888 | reldata->count = count; |
| 15889 | rel_hdr->sh_size = count * rel_hdr->sh_entsize; |
| 15890 | |
| 15891 | erela = erela_head; |
| 15892 | irela = irela_head; |
| 15893 | while (count > 0) |
| 15894 | { |
| 15895 | (*swap_out) (abfd, irela, erela); |
| 15896 | erela += rel_hdr->sh_entsize; |
| 15897 | irela++; |
| 15898 | count--; |
| 15899 | } |
| 15900 | |
| 15901 | free (irela_head); |
| 15902 | |
| 15903 | /* Hashes are no longer valid. */ |
| 15904 | free (reldata->hashes); |
| 15905 | reldata->hashes = NULL; |
| 15906 | } |
| 15907 | |
| 15908 | /* Unwinding tables are not referenced directly. This pass marks them as |
| 15909 | required if the corresponding code section is marked. Similarly, ARMv8-M |
| 15910 | secure entry functions can only be referenced by SG veneers which are |
| 15911 | created after the GC process. They need to be marked in case they reside in |
| 15912 | their own section (as would be the case if code was compiled with |
| 15913 | -ffunction-sections). */ |
| 15914 | |
| 15915 | static bfd_boolean |
| 15916 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
| 15917 | elf_gc_mark_hook_fn gc_mark_hook) |
| 15918 | { |
| 15919 | bfd *sub; |
| 15920 | Elf_Internal_Shdr **elf_shdrp; |
| 15921 | asection *cmse_sec; |
| 15922 | obj_attribute *out_attr; |
| 15923 | Elf_Internal_Shdr *symtab_hdr; |
| 15924 | unsigned i, sym_count, ext_start; |
| 15925 | const struct elf_backend_data *bed; |
| 15926 | struct elf_link_hash_entry **sym_hashes; |
| 15927 | struct elf32_arm_link_hash_entry *cmse_hash; |
| 15928 | bfd_boolean again, is_v8m, first_bfd_browse = TRUE; |
| 15929 | bfd_boolean debug_sec_need_to_be_marked = FALSE; |
| 15930 | asection *isec; |
| 15931 | |
| 15932 | _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); |
| 15933 | |
| 15934 | out_attr = elf_known_obj_attributes_proc (info->output_bfd); |
| 15935 | is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE |
| 15936 | && out_attr[Tag_CPU_arch_profile].i == 'M'; |
| 15937 | |
| 15938 | /* Marking EH data may cause additional code sections to be marked, |
| 15939 | requiring multiple passes. */ |
| 15940 | again = TRUE; |
| 15941 | while (again) |
| 15942 | { |
| 15943 | again = FALSE; |
| 15944 | for (sub = info->input_bfds; sub != NULL; sub = sub->link.next) |
| 15945 | { |
| 15946 | asection *o; |
| 15947 | |
| 15948 | if (! is_arm_elf (sub)) |
| 15949 | continue; |
| 15950 | |
| 15951 | elf_shdrp = elf_elfsections (sub); |
| 15952 | for (o = sub->sections; o != NULL; o = o->next) |
| 15953 | { |
| 15954 | Elf_Internal_Shdr *hdr; |
| 15955 | |
| 15956 | hdr = &elf_section_data (o)->this_hdr; |
| 15957 | if (hdr->sh_type == SHT_ARM_EXIDX |
| 15958 | && hdr->sh_link |
| 15959 | && hdr->sh_link < elf_numsections (sub) |
| 15960 | && !o->gc_mark |
| 15961 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) |
| 15962 | { |
| 15963 | again = TRUE; |
| 15964 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) |
| 15965 | return FALSE; |
| 15966 | } |
| 15967 | } |
| 15968 | |
| 15969 | /* Mark section holding ARMv8-M secure entry functions. We mark all |
| 15970 | of them so no need for a second browsing. */ |
| 15971 | if (is_v8m && first_bfd_browse) |
| 15972 | { |
| 15973 | sym_hashes = elf_sym_hashes (sub); |
| 15974 | bed = get_elf_backend_data (sub); |
| 15975 | symtab_hdr = &elf_tdata (sub)->symtab_hdr; |
| 15976 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; |
| 15977 | ext_start = symtab_hdr->sh_info; |
| 15978 | |
| 15979 | /* Scan symbols. */ |
| 15980 | for (i = ext_start; i < sym_count; i++) |
| 15981 | { |
| 15982 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); |
| 15983 | |
| 15984 | /* Assume it is a special symbol. If not, cmse_scan will |
| 15985 | warn about it and user can do something about it. */ |
| 15986 | if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) |
| 15987 | { |
| 15988 | cmse_sec = cmse_hash->root.root.u.def.section; |
| 15989 | if (!cmse_sec->gc_mark |
| 15990 | && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook)) |
| 15991 | return FALSE; |
| 15992 | /* The debug sections related to these secure entry |
| 15993 | functions are marked on enabling below flag. */ |
| 15994 | debug_sec_need_to_be_marked = TRUE; |
| 15995 | } |
| 15996 | } |
| 15997 | |
| 15998 | if (debug_sec_need_to_be_marked) |
| 15999 | { |
| 16000 | /* Looping over all the sections of the object file containing |
| 16001 | Armv8-M secure entry functions and marking all the debug |
| 16002 | sections. */ |
| 16003 | for (isec = sub->sections; isec != NULL; isec = isec->next) |
| 16004 | { |
| 16005 | /* If not a debug sections, skip it. */ |
| 16006 | if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING)) |
| 16007 | isec->gc_mark = 1 ; |
| 16008 | } |
| 16009 | debug_sec_need_to_be_marked = FALSE; |
| 16010 | } |
| 16011 | } |
| 16012 | } |
| 16013 | first_bfd_browse = FALSE; |
| 16014 | } |
| 16015 | |
| 16016 | return TRUE; |
| 16017 | } |
| 16018 | |
| 16019 | /* Treat mapping symbols as special target symbols. */ |
| 16020 | |
| 16021 | static bfd_boolean |
| 16022 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) |
| 16023 | { |
| 16024 | return bfd_is_arm_special_symbol_name (sym->name, |
| 16025 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); |
| 16026 | } |
| 16027 | |
| 16028 | /* This is a version of _bfd_elf_find_function() from dwarf2.c except that |
| 16029 | ARM mapping symbols are ignored when looking for function names |
| 16030 | and STT_ARM_TFUNC is considered to a function type. */ |
| 16031 | |
| 16032 | static bfd_boolean |
| 16033 | arm_elf_find_function (bfd * abfd, |
| 16034 | asymbol ** symbols, |
| 16035 | asection * section, |
| 16036 | bfd_vma offset, |
| 16037 | const char ** filename_ptr, |
| 16038 | const char ** functionname_ptr) |
| 16039 | { |
| 16040 | const char * filename = NULL; |
| 16041 | asymbol * func = NULL; |
| 16042 | bfd_vma low_func = 0; |
| 16043 | asymbol ** p; |
| 16044 | |
| 16045 | if (symbols == NULL) |
| 16046 | return FALSE; |
| 16047 | |
| 16048 | if (bfd_get_flavour (abfd) != bfd_target_elf_flavour) |
| 16049 | return FALSE; |
| 16050 | |
| 16051 | for (p = symbols; *p != NULL; p++) |
| 16052 | { |
| 16053 | elf_symbol_type *q; |
| 16054 | |
| 16055 | q = (elf_symbol_type *) *p; |
| 16056 | |
| 16057 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
| 16058 | { |
| 16059 | default: |
| 16060 | break; |
| 16061 | case STT_FILE: |
| 16062 | filename = bfd_asymbol_name (&q->symbol); |
| 16063 | break; |
| 16064 | case STT_FUNC: |
| 16065 | case STT_ARM_TFUNC: |
| 16066 | case STT_NOTYPE: |
| 16067 | /* Skip mapping symbols. */ |
| 16068 | if ((q->symbol.flags & BSF_LOCAL) |
| 16069 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
| 16070 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) |
| 16071 | continue; |
| 16072 | /* Fall through. */ |
| 16073 | if (bfd_get_section (&q->symbol) == section |
| 16074 | && q->symbol.value >= low_func |
| 16075 | && q->symbol.value <= offset) |
| 16076 | { |
| 16077 | func = (asymbol *) q; |
| 16078 | low_func = q->symbol.value; |
| 16079 | } |
| 16080 | break; |
| 16081 | } |
| 16082 | } |
| 16083 | |
| 16084 | if (func == NULL) |
| 16085 | return FALSE; |
| 16086 | |
| 16087 | if (filename_ptr) |
| 16088 | *filename_ptr = filename; |
| 16089 | if (functionname_ptr) |
| 16090 | *functionname_ptr = bfd_asymbol_name (func); |
| 16091 | |
| 16092 | return TRUE; |
| 16093 | } |
| 16094 | |
| 16095 | |
| 16096 | /* Find the nearest line to a particular section and offset, for error |
| 16097 | reporting. This code is a duplicate of the code in elf.c, except |
| 16098 | that it uses arm_elf_find_function. */ |
| 16099 | |
| 16100 | static bfd_boolean |
| 16101 | elf32_arm_find_nearest_line (bfd * abfd, |
| 16102 | asymbol ** symbols, |
| 16103 | asection * section, |
| 16104 | bfd_vma offset, |
| 16105 | const char ** filename_ptr, |
| 16106 | const char ** functionname_ptr, |
| 16107 | unsigned int * line_ptr, |
| 16108 | unsigned int * discriminator_ptr) |
| 16109 | { |
| 16110 | bfd_boolean found = FALSE; |
| 16111 | |
| 16112 | if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset, |
| 16113 | filename_ptr, functionname_ptr, |
| 16114 | line_ptr, discriminator_ptr, |
| 16115 | dwarf_debug_sections, 0, |
| 16116 | & elf_tdata (abfd)->dwarf2_find_line_info)) |
| 16117 | { |
| 16118 | if (!*functionname_ptr) |
| 16119 | arm_elf_find_function (abfd, symbols, section, offset, |
| 16120 | *filename_ptr ? NULL : filename_ptr, |
| 16121 | functionname_ptr); |
| 16122 | |
| 16123 | return TRUE; |
| 16124 | } |
| 16125 | |
| 16126 | /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain |
| 16127 | uses DWARF1. */ |
| 16128 | |
| 16129 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, |
| 16130 | & found, filename_ptr, |
| 16131 | functionname_ptr, line_ptr, |
| 16132 | & elf_tdata (abfd)->line_info)) |
| 16133 | return FALSE; |
| 16134 | |
| 16135 | if (found && (*functionname_ptr || *line_ptr)) |
| 16136 | return TRUE; |
| 16137 | |
| 16138 | if (symbols == NULL) |
| 16139 | return FALSE; |
| 16140 | |
| 16141 | if (! arm_elf_find_function (abfd, symbols, section, offset, |
| 16142 | filename_ptr, functionname_ptr)) |
| 16143 | return FALSE; |
| 16144 | |
| 16145 | *line_ptr = 0; |
| 16146 | return TRUE; |
| 16147 | } |
| 16148 | |
| 16149 | static bfd_boolean |
| 16150 | elf32_arm_find_inliner_info (bfd * abfd, |
| 16151 | const char ** filename_ptr, |
| 16152 | const char ** functionname_ptr, |
| 16153 | unsigned int * line_ptr) |
| 16154 | { |
| 16155 | bfd_boolean found; |
| 16156 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, |
| 16157 | functionname_ptr, line_ptr, |
| 16158 | & elf_tdata (abfd)->dwarf2_find_line_info); |
| 16159 | return found; |
| 16160 | } |
| 16161 | |
| 16162 | /* Find dynamic relocs for H that apply to read-only sections. */ |
| 16163 | |
| 16164 | static asection * |
| 16165 | readonly_dynrelocs (struct elf_link_hash_entry *h) |
| 16166 | { |
| 16167 | struct elf_dyn_relocs *p; |
| 16168 | |
| 16169 | for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next) |
| 16170 | { |
| 16171 | asection *s = p->sec->output_section; |
| 16172 | |
| 16173 | if (s != NULL && (s->flags & SEC_READONLY) != 0) |
| 16174 | return p->sec; |
| 16175 | } |
| 16176 | return NULL; |
| 16177 | } |
| 16178 | |
| 16179 | /* Adjust a symbol defined by a dynamic object and referenced by a |
| 16180 | regular object. The current definition is in some section of the |
| 16181 | dynamic object, but we're not including those sections. We have to |
| 16182 | change the definition to something the rest of the link can |
| 16183 | understand. */ |
| 16184 | |
| 16185 | static bfd_boolean |
| 16186 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
| 16187 | struct elf_link_hash_entry * h) |
| 16188 | { |
| 16189 | bfd * dynobj; |
| 16190 | asection *s, *srel; |
| 16191 | struct elf32_arm_link_hash_entry * eh; |
| 16192 | struct elf32_arm_link_hash_table *globals; |
| 16193 | |
| 16194 | globals = elf32_arm_hash_table (info); |
| 16195 | if (globals == NULL) |
| 16196 | return FALSE; |
| 16197 | |
| 16198 | dynobj = elf_hash_table (info)->dynobj; |
| 16199 | |
| 16200 | /* Make sure we know what is going on here. */ |
| 16201 | BFD_ASSERT (dynobj != NULL |
| 16202 | && (h->needs_plt |
| 16203 | || h->type == STT_GNU_IFUNC |
| 16204 | || h->is_weakalias |
| 16205 | || (h->def_dynamic |
| 16206 | && h->ref_regular |
| 16207 | && !h->def_regular))); |
| 16208 | |
| 16209 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 16210 | |
| 16211 | /* If this is a function, put it in the procedure linkage table. We |
| 16212 | will fill in the contents of the procedure linkage table later, |
| 16213 | when we know the address of the .got section. */ |
| 16214 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
| 16215 | { |
| 16216 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
| 16217 | symbol binds locally. */ |
| 16218 | if (h->plt.refcount <= 0 |
| 16219 | || (h->type != STT_GNU_IFUNC |
| 16220 | && (SYMBOL_CALLS_LOCAL (info, h) |
| 16221 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT |
| 16222 | && h->root.type == bfd_link_hash_undefweak)))) |
| 16223 | { |
| 16224 | /* This case can occur if we saw a PLT32 reloc in an input |
| 16225 | file, but the symbol was never referred to by a dynamic |
| 16226 | object, or if all references were garbage collected. In |
| 16227 | such a case, we don't actually need to build a procedure |
| 16228 | linkage table, and we can just do a PC24 reloc instead. */ |
| 16229 | h->plt.offset = (bfd_vma) -1; |
| 16230 | eh->plt.thumb_refcount = 0; |
| 16231 | eh->plt.maybe_thumb_refcount = 0; |
| 16232 | eh->plt.noncall_refcount = 0; |
| 16233 | h->needs_plt = 0; |
| 16234 | } |
| 16235 | |
| 16236 | return TRUE; |
| 16237 | } |
| 16238 | else |
| 16239 | { |
| 16240 | /* It's possible that we incorrectly decided a .plt reloc was |
| 16241 | needed for an R_ARM_PC24 or similar reloc to a non-function sym |
| 16242 | in check_relocs. We can't decide accurately between function |
| 16243 | and non-function syms in check-relocs; Objects loaded later in |
| 16244 | the link may change h->type. So fix it now. */ |
| 16245 | h->plt.offset = (bfd_vma) -1; |
| 16246 | eh->plt.thumb_refcount = 0; |
| 16247 | eh->plt.maybe_thumb_refcount = 0; |
| 16248 | eh->plt.noncall_refcount = 0; |
| 16249 | } |
| 16250 | |
| 16251 | /* If this is a weak symbol, and there is a real definition, the |
| 16252 | processor independent code will have arranged for us to see the |
| 16253 | real definition first, and we can just use the same value. */ |
| 16254 | if (h->is_weakalias) |
| 16255 | { |
| 16256 | struct elf_link_hash_entry *def = weakdef (h); |
| 16257 | BFD_ASSERT (def->root.type == bfd_link_hash_defined); |
| 16258 | h->root.u.def.section = def->root.u.def.section; |
| 16259 | h->root.u.def.value = def->root.u.def.value; |
| 16260 | return TRUE; |
| 16261 | } |
| 16262 | |
| 16263 | /* If there are no non-GOT references, we do not need a copy |
| 16264 | relocation. */ |
| 16265 | if (!h->non_got_ref) |
| 16266 | return TRUE; |
| 16267 | |
| 16268 | /* This is a reference to a symbol defined by a dynamic object which |
| 16269 | is not a function. */ |
| 16270 | |
| 16271 | /* If we are creating a shared library, we must presume that the |
| 16272 | only references to the symbol are via the global offset table. |
| 16273 | For such cases we need not do anything here; the relocations will |
| 16274 | be handled correctly by relocate_section. Relocatable executables |
| 16275 | can reference data in shared objects directly, so we don't need to |
| 16276 | do anything here. */ |
| 16277 | if (bfd_link_pic (info) || globals->root.is_relocatable_executable) |
| 16278 | return TRUE; |
| 16279 | |
| 16280 | /* We must allocate the symbol in our .dynbss section, which will |
| 16281 | become part of the .bss section of the executable. There will be |
| 16282 | an entry for this symbol in the .dynsym section. The dynamic |
| 16283 | object will contain position independent code, so all references |
| 16284 | from the dynamic object to this symbol will go through the global |
| 16285 | offset table. The dynamic linker will use the .dynsym entry to |
| 16286 | determine the address it must put in the global offset table, so |
| 16287 | both the dynamic object and the regular object will refer to the |
| 16288 | same memory location for the variable. */ |
| 16289 | /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic |
| 16290 | linker to copy the initial value out of the dynamic object and into |
| 16291 | the runtime process image. We need to remember the offset into the |
| 16292 | .rel(a).bss section we are going to use. */ |
| 16293 | if ((h->root.u.def.section->flags & SEC_READONLY) != 0) |
| 16294 | { |
| 16295 | s = globals->root.sdynrelro; |
| 16296 | srel = globals->root.sreldynrelro; |
| 16297 | } |
| 16298 | else |
| 16299 | { |
| 16300 | s = globals->root.sdynbss; |
| 16301 | srel = globals->root.srelbss; |
| 16302 | } |
| 16303 | if (info->nocopyreloc == 0 |
| 16304 | && (h->root.u.def.section->flags & SEC_ALLOC) != 0 |
| 16305 | && h->size != 0) |
| 16306 | { |
| 16307 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
| 16308 | h->needs_copy = 1; |
| 16309 | } |
| 16310 | |
| 16311 | return _bfd_elf_adjust_dynamic_copy (info, h, s); |
| 16312 | } |
| 16313 | |
| 16314 | /* Allocate space in .plt, .got and associated reloc sections for |
| 16315 | dynamic relocs. */ |
| 16316 | |
| 16317 | static bfd_boolean |
| 16318 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
| 16319 | { |
| 16320 | struct bfd_link_info *info; |
| 16321 | struct elf32_arm_link_hash_table *htab; |
| 16322 | struct elf32_arm_link_hash_entry *eh; |
| 16323 | struct elf_dyn_relocs *p; |
| 16324 | |
| 16325 | if (h->root.type == bfd_link_hash_indirect) |
| 16326 | return TRUE; |
| 16327 | |
| 16328 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 16329 | |
| 16330 | info = (struct bfd_link_info *) inf; |
| 16331 | htab = elf32_arm_hash_table (info); |
| 16332 | if (htab == NULL) |
| 16333 | return FALSE; |
| 16334 | |
| 16335 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
| 16336 | && h->plt.refcount > 0) |
| 16337 | { |
| 16338 | /* Make sure this symbol is output as a dynamic symbol. |
| 16339 | Undefined weak syms won't yet be marked as dynamic. */ |
| 16340 | if (h->dynindx == -1 && !h->forced_local |
| 16341 | && h->root.type == bfd_link_hash_undefweak) |
| 16342 | { |
| 16343 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16344 | return FALSE; |
| 16345 | } |
| 16346 | |
| 16347 | /* If the call in the PLT entry binds locally, the associated |
| 16348 | GOT entry should use an R_ARM_IRELATIVE relocation instead of |
| 16349 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather |
| 16350 | than the .plt section. */ |
| 16351 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) |
| 16352 | { |
| 16353 | eh->is_iplt = 1; |
| 16354 | if (eh->plt.noncall_refcount == 0 |
| 16355 | && SYMBOL_REFERENCES_LOCAL (info, h)) |
| 16356 | /* All non-call references can be resolved directly. |
| 16357 | This means that they can (and in some cases, must) |
| 16358 | resolve directly to the run-time target, rather than |
| 16359 | to the PLT. That in turns means that any .got entry |
| 16360 | would be equal to the .igot.plt entry, so there's |
| 16361 | no point having both. */ |
| 16362 | h->got.refcount = 0; |
| 16363 | } |
| 16364 | |
| 16365 | if (bfd_link_pic (info) |
| 16366 | || eh->is_iplt |
| 16367 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
| 16368 | { |
| 16369 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
| 16370 | |
| 16371 | /* If this symbol is not defined in a regular file, and we are |
| 16372 | not generating a shared library, then set the symbol to this |
| 16373 | location in the .plt. This is required to make function |
| 16374 | pointers compare as equal between the normal executable and |
| 16375 | the shared library. */ |
| 16376 | if (! bfd_link_pic (info) |
| 16377 | && !h->def_regular) |
| 16378 | { |
| 16379 | h->root.u.def.section = htab->root.splt; |
| 16380 | h->root.u.def.value = h->plt.offset; |
| 16381 | |
| 16382 | /* Make sure the function is not marked as Thumb, in case |
| 16383 | it is the target of an ABS32 relocation, which will |
| 16384 | point to the PLT entry. */ |
| 16385 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
| 16386 | } |
| 16387 | |
| 16388 | /* VxWorks executables have a second set of relocations for |
| 16389 | each PLT entry. They go in a separate relocation section, |
| 16390 | which is processed by the kernel loader. */ |
| 16391 | if (htab->vxworks_p && !bfd_link_pic (info)) |
| 16392 | { |
| 16393 | /* There is a relocation for the initial PLT entry: |
| 16394 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ |
| 16395 | if (h->plt.offset == htab->plt_header_size) |
| 16396 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
| 16397 | |
| 16398 | /* There are two extra relocations for each subsequent |
| 16399 | PLT entry: an R_ARM_32 relocation for the GOT entry, |
| 16400 | and an R_ARM_32 relocation for the PLT entry. */ |
| 16401 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
| 16402 | } |
| 16403 | } |
| 16404 | else |
| 16405 | { |
| 16406 | h->plt.offset = (bfd_vma) -1; |
| 16407 | h->needs_plt = 0; |
| 16408 | } |
| 16409 | } |
| 16410 | else |
| 16411 | { |
| 16412 | h->plt.offset = (bfd_vma) -1; |
| 16413 | h->needs_plt = 0; |
| 16414 | } |
| 16415 | |
| 16416 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 16417 | eh->tlsdesc_got = (bfd_vma) -1; |
| 16418 | |
| 16419 | if (h->got.refcount > 0) |
| 16420 | { |
| 16421 | asection *s; |
| 16422 | bfd_boolean dyn; |
| 16423 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
| 16424 | int indx; |
| 16425 | |
| 16426 | /* Make sure this symbol is output as a dynamic symbol. |
| 16427 | Undefined weak syms won't yet be marked as dynamic. */ |
| 16428 | if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local |
| 16429 | && h->root.type == bfd_link_hash_undefweak) |
| 16430 | { |
| 16431 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16432 | return FALSE; |
| 16433 | } |
| 16434 | |
| 16435 | if (!htab->symbian_p) |
| 16436 | { |
| 16437 | s = htab->root.sgot; |
| 16438 | h->got.offset = s->size; |
| 16439 | |
| 16440 | if (tls_type == GOT_UNKNOWN) |
| 16441 | abort (); |
| 16442 | |
| 16443 | if (tls_type == GOT_NORMAL) |
| 16444 | /* Non-TLS symbols need one GOT slot. */ |
| 16445 | s->size += 4; |
| 16446 | else |
| 16447 | { |
| 16448 | if (tls_type & GOT_TLS_GDESC) |
| 16449 | { |
| 16450 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ |
| 16451 | eh->tlsdesc_got |
| 16452 | = (htab->root.sgotplt->size |
| 16453 | - elf32_arm_compute_jump_table_size (htab)); |
| 16454 | htab->root.sgotplt->size += 8; |
| 16455 | h->got.offset = (bfd_vma) -2; |
| 16456 | /* plt.got_offset needs to know there's a TLS_DESC |
| 16457 | reloc in the middle of .got.plt. */ |
| 16458 | htab->num_tls_desc++; |
| 16459 | } |
| 16460 | |
| 16461 | if (tls_type & GOT_TLS_GD) |
| 16462 | { |
| 16463 | /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two |
| 16464 | consecutive GOT slots. If the symbol is both GD |
| 16465 | and GDESC, got.offset may have been |
| 16466 | overwritten. */ |
| 16467 | h->got.offset = s->size; |
| 16468 | s->size += 8; |
| 16469 | } |
| 16470 | |
| 16471 | if (tls_type & GOT_TLS_IE) |
| 16472 | /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT |
| 16473 | slot. */ |
| 16474 | s->size += 4; |
| 16475 | } |
| 16476 | |
| 16477 | dyn = htab->root.dynamic_sections_created; |
| 16478 | |
| 16479 | indx = 0; |
| 16480 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
| 16481 | bfd_link_pic (info), |
| 16482 | h) |
| 16483 | && (!bfd_link_pic (info) |
| 16484 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
| 16485 | indx = h->dynindx; |
| 16486 | |
| 16487 | if (tls_type != GOT_NORMAL |
| 16488 | && (bfd_link_pic (info) || indx != 0) |
| 16489 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
| 16490 | || h->root.type != bfd_link_hash_undefweak)) |
| 16491 | { |
| 16492 | if (tls_type & GOT_TLS_IE) |
| 16493 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16494 | |
| 16495 | if (tls_type & GOT_TLS_GD) |
| 16496 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16497 | |
| 16498 | if (tls_type & GOT_TLS_GDESC) |
| 16499 | { |
| 16500 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
| 16501 | /* GDESC needs a trampoline to jump to. */ |
| 16502 | htab->tls_trampoline = -1; |
| 16503 | } |
| 16504 | |
| 16505 | /* Only GD needs it. GDESC just emits one relocation per |
| 16506 | 2 entries. */ |
| 16507 | if ((tls_type & GOT_TLS_GD) && indx != 0) |
| 16508 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16509 | } |
| 16510 | else if (((indx != -1) || htab->fdpic_p) |
| 16511 | && !SYMBOL_REFERENCES_LOCAL (info, h)) |
| 16512 | { |
| 16513 | if (htab->root.dynamic_sections_created) |
| 16514 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ |
| 16515 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16516 | } |
| 16517 | else if (h->type == STT_GNU_IFUNC |
| 16518 | && eh->plt.noncall_refcount == 0) |
| 16519 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; |
| 16520 | they all resolve dynamically instead. Reserve room for the |
| 16521 | GOT entry's R_ARM_IRELATIVE relocation. */ |
| 16522 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); |
| 16523 | else if (bfd_link_pic (info) |
| 16524 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
| 16525 | || h->root.type != bfd_link_hash_undefweak)) |
| 16526 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ |
| 16527 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16528 | else if (htab->fdpic_p && tls_type == GOT_NORMAL) |
| 16529 | /* Reserve room for rofixup for FDPIC executable. */ |
| 16530 | /* TLS relocs do not need space since they are completely |
| 16531 | resolved. */ |
| 16532 | htab->srofixup->size += 4; |
| 16533 | } |
| 16534 | } |
| 16535 | else |
| 16536 | h->got.offset = (bfd_vma) -1; |
| 16537 | |
| 16538 | /* FDPIC support. */ |
| 16539 | if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0) |
| 16540 | { |
| 16541 | /* Symbol musn't be exported. */ |
| 16542 | if (h->dynindx != -1) |
| 16543 | abort(); |
| 16544 | |
| 16545 | /* We only allocate one function descriptor with its associated relocation. */ |
| 16546 | if (eh->fdpic_cnts.funcdesc_offset == -1) |
| 16547 | { |
| 16548 | asection *s = htab->root.sgot; |
| 16549 | |
| 16550 | eh->fdpic_cnts.funcdesc_offset = s->size; |
| 16551 | s->size += 8; |
| 16552 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ |
| 16553 | if (bfd_link_pic(info)) |
| 16554 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16555 | else |
| 16556 | htab->srofixup->size += 8; |
| 16557 | } |
| 16558 | } |
| 16559 | |
| 16560 | if (eh->fdpic_cnts.gotfuncdesc_cnt > 0) |
| 16561 | { |
| 16562 | asection *s = htab->root.sgot; |
| 16563 | |
| 16564 | if (htab->root.dynamic_sections_created && h->dynindx == -1 |
| 16565 | && !h->forced_local) |
| 16566 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16567 | return FALSE; |
| 16568 | |
| 16569 | if (h->dynindx == -1) |
| 16570 | { |
| 16571 | /* We only allocate one function descriptor with its associated relocation. q */ |
| 16572 | if (eh->fdpic_cnts.funcdesc_offset == -1) |
| 16573 | { |
| 16574 | |
| 16575 | eh->fdpic_cnts.funcdesc_offset = s->size; |
| 16576 | s->size += 8; |
| 16577 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ |
| 16578 | if (bfd_link_pic(info)) |
| 16579 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16580 | else |
| 16581 | htab->srofixup->size += 8; |
| 16582 | } |
| 16583 | } |
| 16584 | |
| 16585 | /* Add one entry into the GOT and a R_ARM_FUNCDESC or |
| 16586 | R_ARM_RELATIVE/rofixup relocation on it. */ |
| 16587 | eh->fdpic_cnts.gotfuncdesc_offset = s->size; |
| 16588 | s->size += 4; |
| 16589 | if (h->dynindx == -1 && !bfd_link_pic(info)) |
| 16590 | htab->srofixup->size += 4; |
| 16591 | else |
| 16592 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16593 | } |
| 16594 | |
| 16595 | if (eh->fdpic_cnts.funcdesc_cnt > 0) |
| 16596 | { |
| 16597 | if (htab->root.dynamic_sections_created && h->dynindx == -1 |
| 16598 | && !h->forced_local) |
| 16599 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16600 | return FALSE; |
| 16601 | |
| 16602 | if (h->dynindx == -1) |
| 16603 | { |
| 16604 | /* We only allocate one function descriptor with its associated relocation. */ |
| 16605 | if (eh->fdpic_cnts.funcdesc_offset == -1) |
| 16606 | { |
| 16607 | asection *s = htab->root.sgot; |
| 16608 | |
| 16609 | eh->fdpic_cnts.funcdesc_offset = s->size; |
| 16610 | s->size += 8; |
| 16611 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ |
| 16612 | if (bfd_link_pic(info)) |
| 16613 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 16614 | else |
| 16615 | htab->srofixup->size += 8; |
| 16616 | } |
| 16617 | } |
| 16618 | if (h->dynindx == -1 && !bfd_link_pic(info)) |
| 16619 | { |
| 16620 | /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */ |
| 16621 | htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt; |
| 16622 | } |
| 16623 | else |
| 16624 | { |
| 16625 | /* Will need one dynamic reloc per reference. will be either |
| 16626 | R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */ |
| 16627 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, |
| 16628 | eh->fdpic_cnts.funcdesc_cnt); |
| 16629 | } |
| 16630 | } |
| 16631 | |
| 16632 | /* Allocate stubs for exported Thumb functions on v4t. */ |
| 16633 | if (!htab->use_blx && h->dynindx != -1 |
| 16634 | && h->def_regular |
| 16635 | && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB |
| 16636 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
| 16637 | { |
| 16638 | struct elf_link_hash_entry * th; |
| 16639 | struct bfd_link_hash_entry * bh; |
| 16640 | struct elf_link_hash_entry * myh; |
| 16641 | char name[1024]; |
| 16642 | asection *s; |
| 16643 | bh = NULL; |
| 16644 | /* Create a new symbol to regist the real location of the function. */ |
| 16645 | s = h->root.u.def.section; |
| 16646 | sprintf (name, "__real_%s", h->root.root.string); |
| 16647 | _bfd_generic_link_add_one_symbol (info, s->owner, |
| 16648 | name, BSF_GLOBAL, s, |
| 16649 | h->root.u.def.value, |
| 16650 | NULL, TRUE, FALSE, &bh); |
| 16651 | |
| 16652 | myh = (struct elf_link_hash_entry *) bh; |
| 16653 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 16654 | myh->forced_local = 1; |
| 16655 | ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB); |
| 16656 | eh->export_glue = myh; |
| 16657 | th = record_arm_to_thumb_glue (info, h); |
| 16658 | /* Point the symbol at the stub. */ |
| 16659 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); |
| 16660 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
| 16661 | h->root.u.def.section = th->root.u.def.section; |
| 16662 | h->root.u.def.value = th->root.u.def.value & ~1; |
| 16663 | } |
| 16664 | |
| 16665 | if (eh->dyn_relocs == NULL) |
| 16666 | return TRUE; |
| 16667 | |
| 16668 | /* In the shared -Bsymbolic case, discard space allocated for |
| 16669 | dynamic pc-relative relocs against symbols which turn out to be |
| 16670 | defined in regular objects. For the normal shared case, discard |
| 16671 | space for pc-relative relocs that have become local due to symbol |
| 16672 | visibility changes. */ |
| 16673 | |
| 16674 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p) |
| 16675 | { |
| 16676 | /* Relocs that use pc_count are PC-relative forms, which will appear |
| 16677 | on something like ".long foo - ." or "movw REG, foo - .". We want |
| 16678 | calls to protected symbols to resolve directly to the function |
| 16679 | rather than going via the plt. If people want function pointer |
| 16680 | comparisons to work as expected then they should avoid writing |
| 16681 | assembly like ".long foo - .". */ |
| 16682 | if (SYMBOL_CALLS_LOCAL (info, h)) |
| 16683 | { |
| 16684 | struct elf_dyn_relocs **pp; |
| 16685 | |
| 16686 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
| 16687 | { |
| 16688 | p->count -= p->pc_count; |
| 16689 | p->pc_count = 0; |
| 16690 | if (p->count == 0) |
| 16691 | *pp = p->next; |
| 16692 | else |
| 16693 | pp = &p->next; |
| 16694 | } |
| 16695 | } |
| 16696 | |
| 16697 | if (htab->vxworks_p) |
| 16698 | { |
| 16699 | struct elf_dyn_relocs **pp; |
| 16700 | |
| 16701 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
| 16702 | { |
| 16703 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
| 16704 | *pp = p->next; |
| 16705 | else |
| 16706 | pp = &p->next; |
| 16707 | } |
| 16708 | } |
| 16709 | |
| 16710 | /* Also discard relocs on undefined weak syms with non-default |
| 16711 | visibility. */ |
| 16712 | if (eh->dyn_relocs != NULL |
| 16713 | && h->root.type == bfd_link_hash_undefweak) |
| 16714 | { |
| 16715 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT |
| 16716 | || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) |
| 16717 | eh->dyn_relocs = NULL; |
| 16718 | |
| 16719 | /* Make sure undefined weak symbols are output as a dynamic |
| 16720 | symbol in PIEs. */ |
| 16721 | else if (htab->root.dynamic_sections_created && h->dynindx == -1 |
| 16722 | && !h->forced_local) |
| 16723 | { |
| 16724 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16725 | return FALSE; |
| 16726 | } |
| 16727 | } |
| 16728 | |
| 16729 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
| 16730 | && h->root.type == bfd_link_hash_new) |
| 16731 | { |
| 16732 | /* Output absolute symbols so that we can create relocations |
| 16733 | against them. For normal symbols we output a relocation |
| 16734 | against the section that contains them. */ |
| 16735 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16736 | return FALSE; |
| 16737 | } |
| 16738 | |
| 16739 | } |
| 16740 | else |
| 16741 | { |
| 16742 | /* For the non-shared case, discard space for relocs against |
| 16743 | symbols which turn out to need copy relocs or are not |
| 16744 | dynamic. */ |
| 16745 | |
| 16746 | if (!h->non_got_ref |
| 16747 | && ((h->def_dynamic |
| 16748 | && !h->def_regular) |
| 16749 | || (htab->root.dynamic_sections_created |
| 16750 | && (h->root.type == bfd_link_hash_undefweak |
| 16751 | || h->root.type == bfd_link_hash_undefined)))) |
| 16752 | { |
| 16753 | /* Make sure this symbol is output as a dynamic symbol. |
| 16754 | Undefined weak syms won't yet be marked as dynamic. */ |
| 16755 | if (h->dynindx == -1 && !h->forced_local |
| 16756 | && h->root.type == bfd_link_hash_undefweak) |
| 16757 | { |
| 16758 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
| 16759 | return FALSE; |
| 16760 | } |
| 16761 | |
| 16762 | /* If that succeeded, we know we'll be keeping all the |
| 16763 | relocs. */ |
| 16764 | if (h->dynindx != -1) |
| 16765 | goto keep; |
| 16766 | } |
| 16767 | |
| 16768 | eh->dyn_relocs = NULL; |
| 16769 | |
| 16770 | keep: ; |
| 16771 | } |
| 16772 | |
| 16773 | /* Finally, allocate space. */ |
| 16774 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
| 16775 | { |
| 16776 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
| 16777 | |
| 16778 | if (h->type == STT_GNU_IFUNC |
| 16779 | && eh->plt.noncall_refcount == 0 |
| 16780 | && SYMBOL_REFERENCES_LOCAL (info, h)) |
| 16781 | elf32_arm_allocate_irelocs (info, sreloc, p->count); |
| 16782 | else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular)) |
| 16783 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); |
| 16784 | else if (htab->fdpic_p && !bfd_link_pic(info)) |
| 16785 | htab->srofixup->size += 4 * p->count; |
| 16786 | else |
| 16787 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); |
| 16788 | } |
| 16789 | |
| 16790 | return TRUE; |
| 16791 | } |
| 16792 | |
| 16793 | /* Set DF_TEXTREL if we find any dynamic relocs that apply to |
| 16794 | read-only sections. */ |
| 16795 | |
| 16796 | static bfd_boolean |
| 16797 | maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p) |
| 16798 | { |
| 16799 | asection *sec; |
| 16800 | |
| 16801 | if (h->root.type == bfd_link_hash_indirect) |
| 16802 | return TRUE; |
| 16803 | |
| 16804 | sec = readonly_dynrelocs (h); |
| 16805 | if (sec != NULL) |
| 16806 | { |
| 16807 | struct bfd_link_info *info = (struct bfd_link_info *) info_p; |
| 16808 | |
| 16809 | info->flags |= DF_TEXTREL; |
| 16810 | info->callbacks->minfo |
| 16811 | (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"), |
| 16812 | sec->owner, h->root.root.string, sec); |
| 16813 | |
| 16814 | /* Not an error, just cut short the traversal. */ |
| 16815 | return FALSE; |
| 16816 | } |
| 16817 | |
| 16818 | return TRUE; |
| 16819 | } |
| 16820 | |
| 16821 | void |
| 16822 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, |
| 16823 | int byteswap_code) |
| 16824 | { |
| 16825 | struct elf32_arm_link_hash_table *globals; |
| 16826 | |
| 16827 | globals = elf32_arm_hash_table (info); |
| 16828 | if (globals == NULL) |
| 16829 | return; |
| 16830 | |
| 16831 | globals->byteswap_code = byteswap_code; |
| 16832 | } |
| 16833 | |
| 16834 | /* Set the sizes of the dynamic sections. */ |
| 16835 | |
| 16836 | static bfd_boolean |
| 16837 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
| 16838 | struct bfd_link_info * info) |
| 16839 | { |
| 16840 | bfd * dynobj; |
| 16841 | asection * s; |
| 16842 | bfd_boolean plt; |
| 16843 | bfd_boolean relocs; |
| 16844 | bfd *ibfd; |
| 16845 | struct elf32_arm_link_hash_table *htab; |
| 16846 | |
| 16847 | htab = elf32_arm_hash_table (info); |
| 16848 | if (htab == NULL) |
| 16849 | return FALSE; |
| 16850 | |
| 16851 | dynobj = elf_hash_table (info)->dynobj; |
| 16852 | BFD_ASSERT (dynobj != NULL); |
| 16853 | check_use_blx (htab); |
| 16854 | |
| 16855 | if (elf_hash_table (info)->dynamic_sections_created) |
| 16856 | { |
| 16857 | /* Set the contents of the .interp section to the interpreter. */ |
| 16858 | if (bfd_link_executable (info) && !info->nointerp) |
| 16859 | { |
| 16860 | s = bfd_get_linker_section (dynobj, ".interp"); |
| 16861 | BFD_ASSERT (s != NULL); |
| 16862 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
| 16863 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
| 16864 | } |
| 16865 | } |
| 16866 | |
| 16867 | /* Set up .got offsets for local syms, and space for local dynamic |
| 16868 | relocs. */ |
| 16869 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
| 16870 | { |
| 16871 | bfd_signed_vma *local_got; |
| 16872 | bfd_signed_vma *end_local_got; |
| 16873 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
| 16874 | char *local_tls_type; |
| 16875 | bfd_vma *local_tlsdesc_gotent; |
| 16876 | bfd_size_type locsymcount; |
| 16877 | Elf_Internal_Shdr *symtab_hdr; |
| 16878 | asection *srel; |
| 16879 | bfd_boolean is_vxworks = htab->vxworks_p; |
| 16880 | unsigned int symndx; |
| 16881 | struct fdpic_local *local_fdpic_cnts; |
| 16882 | |
| 16883 | if (! is_arm_elf (ibfd)) |
| 16884 | continue; |
| 16885 | |
| 16886 | for (s = ibfd->sections; s != NULL; s = s->next) |
| 16887 | { |
| 16888 | struct elf_dyn_relocs *p; |
| 16889 | |
| 16890 | for (p = (struct elf_dyn_relocs *) |
| 16891 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
| 16892 | { |
| 16893 | if (!bfd_is_abs_section (p->sec) |
| 16894 | && bfd_is_abs_section (p->sec->output_section)) |
| 16895 | { |
| 16896 | /* Input section has been discarded, either because |
| 16897 | it is a copy of a linkonce section or due to |
| 16898 | linker script /DISCARD/, so we'll be discarding |
| 16899 | the relocs too. */ |
| 16900 | } |
| 16901 | else if (is_vxworks |
| 16902 | && strcmp (p->sec->output_section->name, |
| 16903 | ".tls_vars") == 0) |
| 16904 | { |
| 16905 | /* Relocations in vxworks .tls_vars sections are |
| 16906 | handled specially by the loader. */ |
| 16907 | } |
| 16908 | else if (p->count != 0) |
| 16909 | { |
| 16910 | srel = elf_section_data (p->sec)->sreloc; |
| 16911 | if (htab->fdpic_p && !bfd_link_pic(info)) |
| 16912 | htab->srofixup->size += 4 * p->count; |
| 16913 | else |
| 16914 | elf32_arm_allocate_dynrelocs (info, srel, p->count); |
| 16915 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
| 16916 | info->flags |= DF_TEXTREL; |
| 16917 | } |
| 16918 | } |
| 16919 | } |
| 16920 | |
| 16921 | local_got = elf_local_got_refcounts (ibfd); |
| 16922 | if (!local_got) |
| 16923 | continue; |
| 16924 | |
| 16925 | symtab_hdr = & elf_symtab_hdr (ibfd); |
| 16926 | locsymcount = symtab_hdr->sh_info; |
| 16927 | end_local_got = local_got + locsymcount; |
| 16928 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
| 16929 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
| 16930 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
| 16931 | local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd); |
| 16932 | symndx = 0; |
| 16933 | s = htab->root.sgot; |
| 16934 | srel = htab->root.srelgot; |
| 16935 | for (; local_got < end_local_got; |
| 16936 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
| 16937 | ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts) |
| 16938 | { |
| 16939 | *local_tlsdesc_gotent = (bfd_vma) -1; |
| 16940 | local_iplt = *local_iplt_ptr; |
| 16941 | |
| 16942 | /* FDPIC support. */ |
| 16943 | if (local_fdpic_cnts->gotofffuncdesc_cnt > 0) |
| 16944 | { |
| 16945 | if (local_fdpic_cnts->funcdesc_offset == -1) |
| 16946 | { |
| 16947 | local_fdpic_cnts->funcdesc_offset = s->size; |
| 16948 | s->size += 8; |
| 16949 | |
| 16950 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ |
| 16951 | if (bfd_link_pic(info)) |
| 16952 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
| 16953 | else |
| 16954 | htab->srofixup->size += 8; |
| 16955 | } |
| 16956 | } |
| 16957 | |
| 16958 | if (local_fdpic_cnts->funcdesc_cnt > 0) |
| 16959 | { |
| 16960 | if (local_fdpic_cnts->funcdesc_offset == -1) |
| 16961 | { |
| 16962 | local_fdpic_cnts->funcdesc_offset = s->size; |
| 16963 | s->size += 8; |
| 16964 | |
| 16965 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ |
| 16966 | if (bfd_link_pic(info)) |
| 16967 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
| 16968 | else |
| 16969 | htab->srofixup->size += 8; |
| 16970 | } |
| 16971 | |
| 16972 | /* We will add n R_ARM_RELATIVE relocations or n rofixups. */ |
| 16973 | if (bfd_link_pic(info)) |
| 16974 | elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt); |
| 16975 | else |
| 16976 | htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt; |
| 16977 | } |
| 16978 | |
| 16979 | if (local_iplt != NULL) |
| 16980 | { |
| 16981 | struct elf_dyn_relocs *p; |
| 16982 | |
| 16983 | if (local_iplt->root.refcount > 0) |
| 16984 | { |
| 16985 | elf32_arm_allocate_plt_entry (info, TRUE, |
| 16986 | &local_iplt->root, |
| 16987 | &local_iplt->arm); |
| 16988 | if (local_iplt->arm.noncall_refcount == 0) |
| 16989 | /* All references to the PLT are calls, so all |
| 16990 | non-call references can resolve directly to the |
| 16991 | run-time target. This means that the .got entry |
| 16992 | would be the same as the .igot.plt entry, so there's |
| 16993 | no point creating both. */ |
| 16994 | *local_got = 0; |
| 16995 | } |
| 16996 | else |
| 16997 | { |
| 16998 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); |
| 16999 | local_iplt->root.offset = (bfd_vma) -1; |
| 17000 | } |
| 17001 | |
| 17002 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) |
| 17003 | { |
| 17004 | asection *psrel; |
| 17005 | |
| 17006 | psrel = elf_section_data (p->sec)->sreloc; |
| 17007 | if (local_iplt->arm.noncall_refcount == 0) |
| 17008 | elf32_arm_allocate_irelocs (info, psrel, p->count); |
| 17009 | else |
| 17010 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); |
| 17011 | } |
| 17012 | } |
| 17013 | if (*local_got > 0) |
| 17014 | { |
| 17015 | Elf_Internal_Sym *isym; |
| 17016 | |
| 17017 | *local_got = s->size; |
| 17018 | if (*local_tls_type & GOT_TLS_GD) |
| 17019 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ |
| 17020 | s->size += 8; |
| 17021 | if (*local_tls_type & GOT_TLS_GDESC) |
| 17022 | { |
| 17023 | *local_tlsdesc_gotent = htab->root.sgotplt->size |
| 17024 | - elf32_arm_compute_jump_table_size (htab); |
| 17025 | htab->root.sgotplt->size += 8; |
| 17026 | *local_got = (bfd_vma) -2; |
| 17027 | /* plt.got_offset needs to know there's a TLS_DESC |
| 17028 | reloc in the middle of .got.plt. */ |
| 17029 | htab->num_tls_desc++; |
| 17030 | } |
| 17031 | if (*local_tls_type & GOT_TLS_IE) |
| 17032 | s->size += 4; |
| 17033 | |
| 17034 | if (*local_tls_type & GOT_NORMAL) |
| 17035 | { |
| 17036 | /* If the symbol is both GD and GDESC, *local_got |
| 17037 | may have been overwritten. */ |
| 17038 | *local_got = s->size; |
| 17039 | s->size += 4; |
| 17040 | } |
| 17041 | |
| 17042 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); |
| 17043 | if (isym == NULL) |
| 17044 | return FALSE; |
| 17045 | |
| 17046 | /* If all references to an STT_GNU_IFUNC PLT are calls, |
| 17047 | then all non-call references, including this GOT entry, |
| 17048 | resolve directly to the run-time target. */ |
| 17049 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC |
| 17050 | && (local_iplt == NULL |
| 17051 | || local_iplt->arm.noncall_refcount == 0)) |
| 17052 | elf32_arm_allocate_irelocs (info, srel, 1); |
| 17053 | else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p) |
| 17054 | { |
| 17055 | if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))) |
| 17056 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
| 17057 | else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL) |
| 17058 | htab->srofixup->size += 4; |
| 17059 | |
| 17060 | if ((bfd_link_pic (info) || htab->fdpic_p) |
| 17061 | && *local_tls_type & GOT_TLS_GDESC) |
| 17062 | { |
| 17063 | elf32_arm_allocate_dynrelocs (info, |
| 17064 | htab->root.srelplt, 1); |
| 17065 | htab->tls_trampoline = -1; |
| 17066 | } |
| 17067 | } |
| 17068 | } |
| 17069 | else |
| 17070 | *local_got = (bfd_vma) -1; |
| 17071 | } |
| 17072 | } |
| 17073 | |
| 17074 | if (htab->tls_ldm_got.refcount > 0) |
| 17075 | { |
| 17076 | /* Allocate two GOT entries and one dynamic relocation (if necessary) |
| 17077 | for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */ |
| 17078 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
| 17079 | htab->root.sgot->size += 8; |
| 17080 | if (bfd_link_pic (info)) |
| 17081 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
| 17082 | } |
| 17083 | else |
| 17084 | htab->tls_ldm_got.offset = -1; |
| 17085 | |
| 17086 | /* At the very end of the .rofixup section is a pointer to the GOT, |
| 17087 | reserve space for it. */ |
| 17088 | if (htab->fdpic_p && htab->srofixup != NULL) |
| 17089 | htab->srofixup->size += 4; |
| 17090 | |
| 17091 | /* Allocate global sym .plt and .got entries, and space for global |
| 17092 | sym dynamic relocs. */ |
| 17093 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
| 17094 | |
| 17095 | /* Here we rummage through the found bfds to collect glue information. */ |
| 17096 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
| 17097 | { |
| 17098 | if (! is_arm_elf (ibfd)) |
| 17099 | continue; |
| 17100 | |
| 17101 | /* Initialise mapping tables for code/data. */ |
| 17102 | bfd_elf32_arm_init_maps (ibfd); |
| 17103 | |
| 17104 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
| 17105 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info) |
| 17106 | || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info)) |
| 17107 | _bfd_error_handler (_("errors encountered processing file %pB"), ibfd); |
| 17108 | } |
| 17109 | |
| 17110 | /* Allocate space for the glue sections now that we've sized them. */ |
| 17111 | bfd_elf32_arm_allocate_interworking_sections (info); |
| 17112 | |
| 17113 | /* For every jump slot reserved in the sgotplt, reloc_count is |
| 17114 | incremented. However, when we reserve space for TLS descriptors, |
| 17115 | it's not incremented, so in order to compute the space reserved |
| 17116 | for them, it suffices to multiply the reloc count by the jump |
| 17117 | slot size. */ |
| 17118 | if (htab->root.srelplt) |
| 17119 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab); |
| 17120 | |
| 17121 | if (htab->tls_trampoline) |
| 17122 | { |
| 17123 | if (htab->root.splt->size == 0) |
| 17124 | htab->root.splt->size += htab->plt_header_size; |
| 17125 | |
| 17126 | htab->tls_trampoline = htab->root.splt->size; |
| 17127 | htab->root.splt->size += htab->plt_entry_size; |
| 17128 | |
| 17129 | /* If we're not using lazy TLS relocations, don't generate the |
| 17130 | PLT and GOT entries they require. */ |
| 17131 | if (!(info->flags & DF_BIND_NOW)) |
| 17132 | { |
| 17133 | htab->dt_tlsdesc_got = htab->root.sgot->size; |
| 17134 | htab->root.sgot->size += 4; |
| 17135 | |
| 17136 | htab->dt_tlsdesc_plt = htab->root.splt->size; |
| 17137 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); |
| 17138 | } |
| 17139 | } |
| 17140 | |
| 17141 | /* The check_relocs and adjust_dynamic_symbol entry points have |
| 17142 | determined the sizes of the various dynamic sections. Allocate |
| 17143 | memory for them. */ |
| 17144 | plt = FALSE; |
| 17145 | relocs = FALSE; |
| 17146 | for (s = dynobj->sections; s != NULL; s = s->next) |
| 17147 | { |
| 17148 | const char * name; |
| 17149 | |
| 17150 | if ((s->flags & SEC_LINKER_CREATED) == 0) |
| 17151 | continue; |
| 17152 | |
| 17153 | /* It's OK to base decisions on the section name, because none |
| 17154 | of the dynobj section names depend upon the input files. */ |
| 17155 | name = bfd_get_section_name (dynobj, s); |
| 17156 | |
| 17157 | if (s == htab->root.splt) |
| 17158 | { |
| 17159 | /* Remember whether there is a PLT. */ |
| 17160 | plt = s->size != 0; |
| 17161 | } |
| 17162 | else if (CONST_STRNEQ (name, ".rel")) |
| 17163 | { |
| 17164 | if (s->size != 0) |
| 17165 | { |
| 17166 | /* Remember whether there are any reloc sections other |
| 17167 | than .rel(a).plt and .rela.plt.unloaded. */ |
| 17168 | if (s != htab->root.srelplt && s != htab->srelplt2) |
| 17169 | relocs = TRUE; |
| 17170 | |
| 17171 | /* We use the reloc_count field as a counter if we need |
| 17172 | to copy relocs into the output file. */ |
| 17173 | s->reloc_count = 0; |
| 17174 | } |
| 17175 | } |
| 17176 | else if (s != htab->root.sgot |
| 17177 | && s != htab->root.sgotplt |
| 17178 | && s != htab->root.iplt |
| 17179 | && s != htab->root.igotplt |
| 17180 | && s != htab->root.sdynbss |
| 17181 | && s != htab->root.sdynrelro |
| 17182 | && s != htab->srofixup) |
| 17183 | { |
| 17184 | /* It's not one of our sections, so don't allocate space. */ |
| 17185 | continue; |
| 17186 | } |
| 17187 | |
| 17188 | if (s->size == 0) |
| 17189 | { |
| 17190 | /* If we don't need this section, strip it from the |
| 17191 | output file. This is mostly to handle .rel(a).bss and |
| 17192 | .rel(a).plt. We must create both sections in |
| 17193 | create_dynamic_sections, because they must be created |
| 17194 | before the linker maps input sections to output |
| 17195 | sections. The linker does that before |
| 17196 | adjust_dynamic_symbol is called, and it is that |
| 17197 | function which decides whether anything needs to go |
| 17198 | into these sections. */ |
| 17199 | s->flags |= SEC_EXCLUDE; |
| 17200 | continue; |
| 17201 | } |
| 17202 | |
| 17203 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
| 17204 | continue; |
| 17205 | |
| 17206 | /* Allocate memory for the section contents. */ |
| 17207 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
| 17208 | if (s->contents == NULL) |
| 17209 | return FALSE; |
| 17210 | } |
| 17211 | |
| 17212 | if (elf_hash_table (info)->dynamic_sections_created) |
| 17213 | { |
| 17214 | /* Add some entries to the .dynamic section. We fill in the |
| 17215 | values later, in elf32_arm_finish_dynamic_sections, but we |
| 17216 | must add the entries now so that we get the correct size for |
| 17217 | the .dynamic section. The DT_DEBUG entry is filled in by the |
| 17218 | dynamic linker and used by the debugger. */ |
| 17219 | #define add_dynamic_entry(TAG, VAL) \ |
| 17220 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
| 17221 | |
| 17222 | if (bfd_link_executable (info)) |
| 17223 | { |
| 17224 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
| 17225 | return FALSE; |
| 17226 | } |
| 17227 | |
| 17228 | if (plt) |
| 17229 | { |
| 17230 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
| 17231 | || !add_dynamic_entry (DT_PLTRELSZ, 0) |
| 17232 | || !add_dynamic_entry (DT_PLTREL, |
| 17233 | htab->use_rel ? DT_REL : DT_RELA) |
| 17234 | || !add_dynamic_entry (DT_JMPREL, 0)) |
| 17235 | return FALSE; |
| 17236 | |
| 17237 | if (htab->dt_tlsdesc_plt |
| 17238 | && (!add_dynamic_entry (DT_TLSDESC_PLT,0) |
| 17239 | || !add_dynamic_entry (DT_TLSDESC_GOT,0))) |
| 17240 | return FALSE; |
| 17241 | } |
| 17242 | |
| 17243 | if (relocs) |
| 17244 | { |
| 17245 | if (htab->use_rel) |
| 17246 | { |
| 17247 | if (!add_dynamic_entry (DT_REL, 0) |
| 17248 | || !add_dynamic_entry (DT_RELSZ, 0) |
| 17249 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) |
| 17250 | return FALSE; |
| 17251 | } |
| 17252 | else |
| 17253 | { |
| 17254 | if (!add_dynamic_entry (DT_RELA, 0) |
| 17255 | || !add_dynamic_entry (DT_RELASZ, 0) |
| 17256 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) |
| 17257 | return FALSE; |
| 17258 | } |
| 17259 | } |
| 17260 | |
| 17261 | /* If any dynamic relocs apply to a read-only section, |
| 17262 | then we need a DT_TEXTREL entry. */ |
| 17263 | if ((info->flags & DF_TEXTREL) == 0) |
| 17264 | elf_link_hash_traverse (&htab->root, maybe_set_textrel, info); |
| 17265 | |
| 17266 | if ((info->flags & DF_TEXTREL) != 0) |
| 17267 | { |
| 17268 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
| 17269 | return FALSE; |
| 17270 | } |
| 17271 | if (htab->vxworks_p |
| 17272 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) |
| 17273 | return FALSE; |
| 17274 | } |
| 17275 | #undef add_dynamic_entry |
| 17276 | |
| 17277 | return TRUE; |
| 17278 | } |
| 17279 | |
| 17280 | /* Size sections even though they're not dynamic. We use it to setup |
| 17281 | _TLS_MODULE_BASE_, if needed. */ |
| 17282 | |
| 17283 | static bfd_boolean |
| 17284 | elf32_arm_always_size_sections (bfd *output_bfd, |
| 17285 | struct bfd_link_info *info) |
| 17286 | { |
| 17287 | asection *tls_sec; |
| 17288 | struct elf32_arm_link_hash_table *htab; |
| 17289 | |
| 17290 | htab = elf32_arm_hash_table (info); |
| 17291 | |
| 17292 | if (bfd_link_relocatable (info)) |
| 17293 | return TRUE; |
| 17294 | |
| 17295 | tls_sec = elf_hash_table (info)->tls_sec; |
| 17296 | |
| 17297 | if (tls_sec) |
| 17298 | { |
| 17299 | struct elf_link_hash_entry *tlsbase; |
| 17300 | |
| 17301 | tlsbase = elf_link_hash_lookup |
| 17302 | (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE); |
| 17303 | |
| 17304 | if (tlsbase) |
| 17305 | { |
| 17306 | struct bfd_link_hash_entry *bh = NULL; |
| 17307 | const struct elf_backend_data *bed |
| 17308 | = get_elf_backend_data (output_bfd); |
| 17309 | |
| 17310 | if (!(_bfd_generic_link_add_one_symbol |
| 17311 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, |
| 17312 | tls_sec, 0, NULL, FALSE, |
| 17313 | bed->collect, &bh))) |
| 17314 | return FALSE; |
| 17315 | |
| 17316 | tlsbase->type = STT_TLS; |
| 17317 | tlsbase = (struct elf_link_hash_entry *)bh; |
| 17318 | tlsbase->def_regular = 1; |
| 17319 | tlsbase->other = STV_HIDDEN; |
| 17320 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); |
| 17321 | } |
| 17322 | } |
| 17323 | |
| 17324 | if (htab->fdpic_p && !bfd_link_relocatable (info) |
| 17325 | && !bfd_elf_stack_segment_size (output_bfd, info, |
| 17326 | "__stacksize", DEFAULT_STACK_SIZE)) |
| 17327 | return FALSE; |
| 17328 | |
| 17329 | return TRUE; |
| 17330 | } |
| 17331 | |
| 17332 | /* Finish up dynamic symbol handling. We set the contents of various |
| 17333 | dynamic sections here. */ |
| 17334 | |
| 17335 | static bfd_boolean |
| 17336 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
| 17337 | struct bfd_link_info * info, |
| 17338 | struct elf_link_hash_entry * h, |
| 17339 | Elf_Internal_Sym * sym) |
| 17340 | { |
| 17341 | struct elf32_arm_link_hash_table *htab; |
| 17342 | struct elf32_arm_link_hash_entry *eh; |
| 17343 | |
| 17344 | htab = elf32_arm_hash_table (info); |
| 17345 | if (htab == NULL) |
| 17346 | return FALSE; |
| 17347 | |
| 17348 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 17349 | |
| 17350 | if (h->plt.offset != (bfd_vma) -1) |
| 17351 | { |
| 17352 | if (!eh->is_iplt) |
| 17353 | { |
| 17354 | BFD_ASSERT (h->dynindx != -1); |
| 17355 | if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, |
| 17356 | h->dynindx, 0)) |
| 17357 | return FALSE; |
| 17358 | } |
| 17359 | |
| 17360 | if (!h->def_regular) |
| 17361 | { |
| 17362 | /* Mark the symbol as undefined, rather than as defined in |
| 17363 | the .plt section. */ |
| 17364 | sym->st_shndx = SHN_UNDEF; |
| 17365 | /* If the symbol is weak we need to clear the value. |
| 17366 | Otherwise, the PLT entry would provide a definition for |
| 17367 | the symbol even if the symbol wasn't defined anywhere, |
| 17368 | and so the symbol would never be NULL. Leave the value if |
| 17369 | there were any relocations where pointer equality matters |
| 17370 | (this is a clue for the dynamic linker, to make function |
| 17371 | pointer comparisons work between an application and shared |
| 17372 | library). */ |
| 17373 | if (!h->ref_regular_nonweak || !h->pointer_equality_needed) |
| 17374 | sym->st_value = 0; |
| 17375 | } |
| 17376 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
| 17377 | { |
| 17378 | /* At least one non-call relocation references this .iplt entry, |
| 17379 | so the .iplt entry is the function's canonical address. */ |
| 17380 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); |
| 17381 | ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM); |
| 17382 | sym->st_shndx = (_bfd_elf_section_from_bfd_section |
| 17383 | (output_bfd, htab->root.iplt->output_section)); |
| 17384 | sym->st_value = (h->plt.offset |
| 17385 | + htab->root.iplt->output_section->vma |
| 17386 | + htab->root.iplt->output_offset); |
| 17387 | } |
| 17388 | } |
| 17389 | |
| 17390 | if (h->needs_copy) |
| 17391 | { |
| 17392 | asection * s; |
| 17393 | Elf_Internal_Rela rel; |
| 17394 | |
| 17395 | /* This symbol needs a copy reloc. Set it up. */ |
| 17396 | BFD_ASSERT (h->dynindx != -1 |
| 17397 | && (h->root.type == bfd_link_hash_defined |
| 17398 | || h->root.type == bfd_link_hash_defweak)); |
| 17399 | |
| 17400 | rel.r_addend = 0; |
| 17401 | rel.r_offset = (h->root.u.def.value |
| 17402 | + h->root.u.def.section->output_section->vma |
| 17403 | + h->root.u.def.section->output_offset); |
| 17404 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); |
| 17405 | if (h->root.u.def.section == htab->root.sdynrelro) |
| 17406 | s = htab->root.sreldynrelro; |
| 17407 | else |
| 17408 | s = htab->root.srelbss; |
| 17409 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
| 17410 | } |
| 17411 | |
| 17412 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
| 17413 | and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: |
| 17414 | it is relative to the ".got" section. */ |
| 17415 | if (h == htab->root.hdynamic |
| 17416 | || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot)) |
| 17417 | sym->st_shndx = SHN_ABS; |
| 17418 | |
| 17419 | return TRUE; |
| 17420 | } |
| 17421 | |
| 17422 | static void |
| 17423 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, |
| 17424 | void *contents, |
| 17425 | const unsigned long *template, unsigned count) |
| 17426 | { |
| 17427 | unsigned ix; |
| 17428 | |
| 17429 | for (ix = 0; ix != count; ix++) |
| 17430 | { |
| 17431 | unsigned long insn = template[ix]; |
| 17432 | |
| 17433 | /* Emit mov pc,rx if bx is not permitted. */ |
| 17434 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) |
| 17435 | insn = (insn & 0xf000000f) | 0x01a0f000; |
| 17436 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); |
| 17437 | } |
| 17438 | } |
| 17439 | |
| 17440 | /* Install the special first PLT entry for elf32-arm-nacl. Unlike |
| 17441 | other variants, NaCl needs this entry in a static executable's |
| 17442 | .iplt too. When we're handling that case, GOT_DISPLACEMENT is |
| 17443 | zero. For .iplt really only the last bundle is useful, and .iplt |
| 17444 | could have a shorter first entry, with each individual PLT entry's |
| 17445 | relative branch calculated differently so it targets the last |
| 17446 | bundle instead of the instruction before it (labelled .Lplt_tail |
| 17447 | above). But it's simpler to keep the size and layout of PLT0 |
| 17448 | consistent with the dynamic case, at the cost of some dead code at |
| 17449 | the start of .iplt and the one dead store to the stack at the start |
| 17450 | of .Lplt_tail. */ |
| 17451 | static void |
| 17452 | arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, |
| 17453 | asection *plt, bfd_vma got_displacement) |
| 17454 | { |
| 17455 | unsigned int i; |
| 17456 | |
| 17457 | put_arm_insn (htab, output_bfd, |
| 17458 | elf32_arm_nacl_plt0_entry[0] |
| 17459 | | arm_movw_immediate (got_displacement), |
| 17460 | plt->contents + 0); |
| 17461 | put_arm_insn (htab, output_bfd, |
| 17462 | elf32_arm_nacl_plt0_entry[1] |
| 17463 | | arm_movt_immediate (got_displacement), |
| 17464 | plt->contents + 4); |
| 17465 | |
| 17466 | for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i) |
| 17467 | put_arm_insn (htab, output_bfd, |
| 17468 | elf32_arm_nacl_plt0_entry[i], |
| 17469 | plt->contents + (i * 4)); |
| 17470 | } |
| 17471 | |
| 17472 | /* Finish up the dynamic sections. */ |
| 17473 | |
| 17474 | static bfd_boolean |
| 17475 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
| 17476 | { |
| 17477 | bfd * dynobj; |
| 17478 | asection * sgot; |
| 17479 | asection * sdyn; |
| 17480 | struct elf32_arm_link_hash_table *htab; |
| 17481 | |
| 17482 | htab = elf32_arm_hash_table (info); |
| 17483 | if (htab == NULL) |
| 17484 | return FALSE; |
| 17485 | |
| 17486 | dynobj = elf_hash_table (info)->dynobj; |
| 17487 | |
| 17488 | sgot = htab->root.sgotplt; |
| 17489 | /* A broken linker script might have discarded the dynamic sections. |
| 17490 | Catch this here so that we do not seg-fault later on. */ |
| 17491 | if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) |
| 17492 | return FALSE; |
| 17493 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
| 17494 | |
| 17495 | if (elf_hash_table (info)->dynamic_sections_created) |
| 17496 | { |
| 17497 | asection *splt; |
| 17498 | Elf32_External_Dyn *dyncon, *dynconend; |
| 17499 | |
| 17500 | splt = htab->root.splt; |
| 17501 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
| 17502 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
| 17503 | |
| 17504 | dyncon = (Elf32_External_Dyn *) sdyn->contents; |
| 17505 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
| 17506 | |
| 17507 | for (; dyncon < dynconend; dyncon++) |
| 17508 | { |
| 17509 | Elf_Internal_Dyn dyn; |
| 17510 | const char * name; |
| 17511 | asection * s; |
| 17512 | |
| 17513 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); |
| 17514 | |
| 17515 | switch (dyn.d_tag) |
| 17516 | { |
| 17517 | unsigned int type; |
| 17518 | |
| 17519 | default: |
| 17520 | if (htab->vxworks_p |
| 17521 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) |
| 17522 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17523 | break; |
| 17524 | |
| 17525 | case DT_HASH: |
| 17526 | name = ".hash"; |
| 17527 | goto get_vma_if_bpabi; |
| 17528 | case DT_STRTAB: |
| 17529 | name = ".dynstr"; |
| 17530 | goto get_vma_if_bpabi; |
| 17531 | case DT_SYMTAB: |
| 17532 | name = ".dynsym"; |
| 17533 | goto get_vma_if_bpabi; |
| 17534 | case DT_VERSYM: |
| 17535 | name = ".gnu.version"; |
| 17536 | goto get_vma_if_bpabi; |
| 17537 | case DT_VERDEF: |
| 17538 | name = ".gnu.version_d"; |
| 17539 | goto get_vma_if_bpabi; |
| 17540 | case DT_VERNEED: |
| 17541 | name = ".gnu.version_r"; |
| 17542 | goto get_vma_if_bpabi; |
| 17543 | |
| 17544 | case DT_PLTGOT: |
| 17545 | name = htab->symbian_p ? ".got" : ".got.plt"; |
| 17546 | goto get_vma; |
| 17547 | case DT_JMPREL: |
| 17548 | name = RELOC_SECTION (htab, ".plt"); |
| 17549 | get_vma: |
| 17550 | s = bfd_get_linker_section (dynobj, name); |
| 17551 | if (s == NULL) |
| 17552 | { |
| 17553 | _bfd_error_handler |
| 17554 | (_("could not find section %s"), name); |
| 17555 | bfd_set_error (bfd_error_invalid_operation); |
| 17556 | return FALSE; |
| 17557 | } |
| 17558 | if (!htab->symbian_p) |
| 17559 | dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; |
| 17560 | else |
| 17561 | /* In the BPABI, tags in the PT_DYNAMIC section point |
| 17562 | at the file offset, not the memory address, for the |
| 17563 | convenience of the post linker. */ |
| 17564 | dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset; |
| 17565 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17566 | break; |
| 17567 | |
| 17568 | get_vma_if_bpabi: |
| 17569 | if (htab->symbian_p) |
| 17570 | goto get_vma; |
| 17571 | break; |
| 17572 | |
| 17573 | case DT_PLTRELSZ: |
| 17574 | s = htab->root.srelplt; |
| 17575 | BFD_ASSERT (s != NULL); |
| 17576 | dyn.d_un.d_val = s->size; |
| 17577 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17578 | break; |
| 17579 | |
| 17580 | case DT_RELSZ: |
| 17581 | case DT_RELASZ: |
| 17582 | case DT_REL: |
| 17583 | case DT_RELA: |
| 17584 | /* In the BPABI, the DT_REL tag must point at the file |
| 17585 | offset, not the VMA, of the first relocation |
| 17586 | section. So, we use code similar to that in |
| 17587 | elflink.c, but do not check for SHF_ALLOC on the |
| 17588 | relocation section, since relocation sections are |
| 17589 | never allocated under the BPABI. PLT relocs are also |
| 17590 | included. */ |
| 17591 | if (htab->symbian_p) |
| 17592 | { |
| 17593 | unsigned int i; |
| 17594 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) |
| 17595 | ? SHT_REL : SHT_RELA); |
| 17596 | dyn.d_un.d_val = 0; |
| 17597 | for (i = 1; i < elf_numsections (output_bfd); i++) |
| 17598 | { |
| 17599 | Elf_Internal_Shdr *hdr |
| 17600 | = elf_elfsections (output_bfd)[i]; |
| 17601 | if (hdr->sh_type == type) |
| 17602 | { |
| 17603 | if (dyn.d_tag == DT_RELSZ |
| 17604 | || dyn.d_tag == DT_RELASZ) |
| 17605 | dyn.d_un.d_val += hdr->sh_size; |
| 17606 | else if ((ufile_ptr) hdr->sh_offset |
| 17607 | <= dyn.d_un.d_val - 1) |
| 17608 | dyn.d_un.d_val = hdr->sh_offset; |
| 17609 | } |
| 17610 | } |
| 17611 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17612 | } |
| 17613 | break; |
| 17614 | |
| 17615 | case DT_TLSDESC_PLT: |
| 17616 | s = htab->root.splt; |
| 17617 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
| 17618 | + htab->dt_tlsdesc_plt); |
| 17619 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17620 | break; |
| 17621 | |
| 17622 | case DT_TLSDESC_GOT: |
| 17623 | s = htab->root.sgot; |
| 17624 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
| 17625 | + htab->dt_tlsdesc_got); |
| 17626 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17627 | break; |
| 17628 | |
| 17629 | /* Set the bottom bit of DT_INIT/FINI if the |
| 17630 | corresponding function is Thumb. */ |
| 17631 | case DT_INIT: |
| 17632 | name = info->init_function; |
| 17633 | goto get_sym; |
| 17634 | case DT_FINI: |
| 17635 | name = info->fini_function; |
| 17636 | get_sym: |
| 17637 | /* If it wasn't set by elf_bfd_final_link |
| 17638 | then there is nothing to adjust. */ |
| 17639 | if (dyn.d_un.d_val != 0) |
| 17640 | { |
| 17641 | struct elf_link_hash_entry * eh; |
| 17642 | |
| 17643 | eh = elf_link_hash_lookup (elf_hash_table (info), name, |
| 17644 | FALSE, FALSE, TRUE); |
| 17645 | if (eh != NULL |
| 17646 | && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal) |
| 17647 | == ST_BRANCH_TO_THUMB) |
| 17648 | { |
| 17649 | dyn.d_un.d_val |= 1; |
| 17650 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
| 17651 | } |
| 17652 | } |
| 17653 | break; |
| 17654 | } |
| 17655 | } |
| 17656 | |
| 17657 | /* Fill in the first entry in the procedure linkage table. */ |
| 17658 | if (splt->size > 0 && htab->plt_header_size) |
| 17659 | { |
| 17660 | const bfd_vma *plt0_entry; |
| 17661 | bfd_vma got_address, plt_address, got_displacement; |
| 17662 | |
| 17663 | /* Calculate the addresses of the GOT and PLT. */ |
| 17664 | got_address = sgot->output_section->vma + sgot->output_offset; |
| 17665 | plt_address = splt->output_section->vma + splt->output_offset; |
| 17666 | |
| 17667 | if (htab->vxworks_p) |
| 17668 | { |
| 17669 | /* The VxWorks GOT is relocated by the dynamic linker. |
| 17670 | Therefore, we must emit relocations rather than simply |
| 17671 | computing the values now. */ |
| 17672 | Elf_Internal_Rela rel; |
| 17673 | |
| 17674 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; |
| 17675 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
| 17676 | splt->contents + 0); |
| 17677 | put_arm_insn (htab, output_bfd, plt0_entry[1], |
| 17678 | splt->contents + 4); |
| 17679 | put_arm_insn (htab, output_bfd, plt0_entry[2], |
| 17680 | splt->contents + 8); |
| 17681 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
| 17682 | |
| 17683 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
| 17684 | rel.r_offset = plt_address + 12; |
| 17685 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); |
| 17686 | rel.r_addend = 0; |
| 17687 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, |
| 17688 | htab->srelplt2->contents); |
| 17689 | } |
| 17690 | else if (htab->nacl_p) |
| 17691 | arm_nacl_put_plt0 (htab, output_bfd, splt, |
| 17692 | got_address + 8 - (plt_address + 16)); |
| 17693 | else if (using_thumb_only (htab)) |
| 17694 | { |
| 17695 | got_displacement = got_address - (plt_address + 12); |
| 17696 | |
| 17697 | plt0_entry = elf32_thumb2_plt0_entry; |
| 17698 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
| 17699 | splt->contents + 0); |
| 17700 | put_arm_insn (htab, output_bfd, plt0_entry[1], |
| 17701 | splt->contents + 4); |
| 17702 | put_arm_insn (htab, output_bfd, plt0_entry[2], |
| 17703 | splt->contents + 8); |
| 17704 | |
| 17705 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 12); |
| 17706 | } |
| 17707 | else |
| 17708 | { |
| 17709 | got_displacement = got_address - (plt_address + 16); |
| 17710 | |
| 17711 | plt0_entry = elf32_arm_plt0_entry; |
| 17712 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
| 17713 | splt->contents + 0); |
| 17714 | put_arm_insn (htab, output_bfd, plt0_entry[1], |
| 17715 | splt->contents + 4); |
| 17716 | put_arm_insn (htab, output_bfd, plt0_entry[2], |
| 17717 | splt->contents + 8); |
| 17718 | put_arm_insn (htab, output_bfd, plt0_entry[3], |
| 17719 | splt->contents + 12); |
| 17720 | |
| 17721 | #ifdef FOUR_WORD_PLT |
| 17722 | /* The displacement value goes in the otherwise-unused |
| 17723 | last word of the second entry. */ |
| 17724 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); |
| 17725 | #else |
| 17726 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
| 17727 | #endif |
| 17728 | } |
| 17729 | } |
| 17730 | |
| 17731 | /* UnixWare sets the entsize of .plt to 4, although that doesn't |
| 17732 | really seem like the right value. */ |
| 17733 | if (splt->output_section->owner == output_bfd) |
| 17734 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; |
| 17735 | |
| 17736 | if (htab->dt_tlsdesc_plt) |
| 17737 | { |
| 17738 | bfd_vma got_address |
| 17739 | = sgot->output_section->vma + sgot->output_offset; |
| 17740 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma |
| 17741 | + htab->root.sgot->output_offset); |
| 17742 | bfd_vma plt_address |
| 17743 | = splt->output_section->vma + splt->output_offset; |
| 17744 | |
| 17745 | arm_put_trampoline (htab, output_bfd, |
| 17746 | splt->contents + htab->dt_tlsdesc_plt, |
| 17747 | dl_tlsdesc_lazy_trampoline, 6); |
| 17748 | |
| 17749 | bfd_put_32 (output_bfd, |
| 17750 | gotplt_address + htab->dt_tlsdesc_got |
| 17751 | - (plt_address + htab->dt_tlsdesc_plt) |
| 17752 | - dl_tlsdesc_lazy_trampoline[6], |
| 17753 | splt->contents + htab->dt_tlsdesc_plt + 24); |
| 17754 | bfd_put_32 (output_bfd, |
| 17755 | got_address - (plt_address + htab->dt_tlsdesc_plt) |
| 17756 | - dl_tlsdesc_lazy_trampoline[7], |
| 17757 | splt->contents + htab->dt_tlsdesc_plt + 24 + 4); |
| 17758 | } |
| 17759 | |
| 17760 | if (htab->tls_trampoline) |
| 17761 | { |
| 17762 | arm_put_trampoline (htab, output_bfd, |
| 17763 | splt->contents + htab->tls_trampoline, |
| 17764 | tls_trampoline, 3); |
| 17765 | #ifdef FOUR_WORD_PLT |
| 17766 | bfd_put_32 (output_bfd, 0x00000000, |
| 17767 | splt->contents + htab->tls_trampoline + 12); |
| 17768 | #endif |
| 17769 | } |
| 17770 | |
| 17771 | if (htab->vxworks_p |
| 17772 | && !bfd_link_pic (info) |
| 17773 | && htab->root.splt->size > 0) |
| 17774 | { |
| 17775 | /* Correct the .rel(a).plt.unloaded relocations. They will have |
| 17776 | incorrect symbol indexes. */ |
| 17777 | int num_plts; |
| 17778 | unsigned char *p; |
| 17779 | |
| 17780 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
| 17781 | / htab->plt_entry_size); |
| 17782 | p = htab->srelplt2->contents + RELOC_SIZE (htab); |
| 17783 | |
| 17784 | for (; num_plts; num_plts--) |
| 17785 | { |
| 17786 | Elf_Internal_Rela rel; |
| 17787 | |
| 17788 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); |
| 17789 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); |
| 17790 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); |
| 17791 | p += RELOC_SIZE (htab); |
| 17792 | |
| 17793 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); |
| 17794 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); |
| 17795 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); |
| 17796 | p += RELOC_SIZE (htab); |
| 17797 | } |
| 17798 | } |
| 17799 | } |
| 17800 | |
| 17801 | if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0) |
| 17802 | /* NaCl uses a special first entry in .iplt too. */ |
| 17803 | arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0); |
| 17804 | |
| 17805 | /* Fill in the first three entries in the global offset table. */ |
| 17806 | if (sgot) |
| 17807 | { |
| 17808 | if (sgot->size > 0) |
| 17809 | { |
| 17810 | if (sdyn == NULL) |
| 17811 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); |
| 17812 | else |
| 17813 | bfd_put_32 (output_bfd, |
| 17814 | sdyn->output_section->vma + sdyn->output_offset, |
| 17815 | sgot->contents); |
| 17816 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); |
| 17817 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); |
| 17818 | } |
| 17819 | |
| 17820 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
| 17821 | } |
| 17822 | |
| 17823 | /* At the very end of the .rofixup section is a pointer to the GOT. */ |
| 17824 | if (htab->fdpic_p && htab->srofixup != NULL) |
| 17825 | { |
| 17826 | struct elf_link_hash_entry *hgot = htab->root.hgot; |
| 17827 | |
| 17828 | bfd_vma got_value = hgot->root.u.def.value |
| 17829 | + hgot->root.u.def.section->output_section->vma |
| 17830 | + hgot->root.u.def.section->output_offset; |
| 17831 | |
| 17832 | arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value); |
| 17833 | |
| 17834 | /* Make sure we allocated and generated the same number of fixups. */ |
| 17835 | BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size); |
| 17836 | } |
| 17837 | |
| 17838 | return TRUE; |
| 17839 | } |
| 17840 | |
| 17841 | static void |
| 17842 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
| 17843 | { |
| 17844 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
| 17845 | struct elf32_arm_link_hash_table *globals; |
| 17846 | struct elf_segment_map *m; |
| 17847 | |
| 17848 | i_ehdrp = elf_elfheader (abfd); |
| 17849 | |
| 17850 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
| 17851 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; |
| 17852 | else |
| 17853 | _bfd_elf_post_process_headers (abfd, link_info); |
| 17854 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
| 17855 | |
| 17856 | if (link_info) |
| 17857 | { |
| 17858 | globals = elf32_arm_hash_table (link_info); |
| 17859 | if (globals != NULL && globals->byteswap_code) |
| 17860 | i_ehdrp->e_flags |= EF_ARM_BE8; |
| 17861 | |
| 17862 | if (globals->fdpic_p) |
| 17863 | i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC; |
| 17864 | } |
| 17865 | |
| 17866 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5 |
| 17867 | && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) |
| 17868 | { |
| 17869 | int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); |
| 17870 | if (abi == AEABI_VFP_args_vfp) |
| 17871 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; |
| 17872 | else |
| 17873 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; |
| 17874 | } |
| 17875 | |
| 17876 | /* Scan segment to set p_flags attribute if it contains only sections with |
| 17877 | SHF_ARM_PURECODE flag. */ |
| 17878 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
| 17879 | { |
| 17880 | unsigned int j; |
| 17881 | |
| 17882 | if (m->count == 0) |
| 17883 | continue; |
| 17884 | for (j = 0; j < m->count; j++) |
| 17885 | { |
| 17886 | if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE)) |
| 17887 | break; |
| 17888 | } |
| 17889 | if (j == m->count) |
| 17890 | { |
| 17891 | m->p_flags = PF_X; |
| 17892 | m->p_flags_valid = 1; |
| 17893 | } |
| 17894 | } |
| 17895 | } |
| 17896 | |
| 17897 | static enum elf_reloc_type_class |
| 17898 | elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
| 17899 | const asection *rel_sec ATTRIBUTE_UNUSED, |
| 17900 | const Elf_Internal_Rela *rela) |
| 17901 | { |
| 17902 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
| 17903 | { |
| 17904 | case R_ARM_RELATIVE: |
| 17905 | return reloc_class_relative; |
| 17906 | case R_ARM_JUMP_SLOT: |
| 17907 | return reloc_class_plt; |
| 17908 | case R_ARM_COPY: |
| 17909 | return reloc_class_copy; |
| 17910 | case R_ARM_IRELATIVE: |
| 17911 | return reloc_class_ifunc; |
| 17912 | default: |
| 17913 | return reloc_class_normal; |
| 17914 | } |
| 17915 | } |
| 17916 | |
| 17917 | static void |
| 17918 | arm_final_write_processing (bfd *abfd) |
| 17919 | { |
| 17920 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
| 17921 | } |
| 17922 | |
| 17923 | static bfd_boolean |
| 17924 | elf32_arm_final_write_processing (bfd *abfd) |
| 17925 | { |
| 17926 | arm_final_write_processing (abfd); |
| 17927 | return _bfd_elf_final_write_processing (abfd); |
| 17928 | } |
| 17929 | |
| 17930 | /* Return TRUE if this is an unwinding table entry. */ |
| 17931 | |
| 17932 | static bfd_boolean |
| 17933 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) |
| 17934 | { |
| 17935 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
| 17936 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); |
| 17937 | } |
| 17938 | |
| 17939 | |
| 17940 | /* Set the type and flags for an ARM section. We do this by |
| 17941 | the section name, which is a hack, but ought to work. */ |
| 17942 | |
| 17943 | static bfd_boolean |
| 17944 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) |
| 17945 | { |
| 17946 | const char * name; |
| 17947 | |
| 17948 | name = bfd_get_section_name (abfd, sec); |
| 17949 | |
| 17950 | if (is_arm_elf_unwind_section_name (abfd, name)) |
| 17951 | { |
| 17952 | hdr->sh_type = SHT_ARM_EXIDX; |
| 17953 | hdr->sh_flags |= SHF_LINK_ORDER; |
| 17954 | } |
| 17955 | |
| 17956 | if (sec->flags & SEC_ELF_PURECODE) |
| 17957 | hdr->sh_flags |= SHF_ARM_PURECODE; |
| 17958 | |
| 17959 | return TRUE; |
| 17960 | } |
| 17961 | |
| 17962 | /* Handle an ARM specific section when reading an object file. This is |
| 17963 | called when bfd_section_from_shdr finds a section with an unknown |
| 17964 | type. */ |
| 17965 | |
| 17966 | static bfd_boolean |
| 17967 | elf32_arm_section_from_shdr (bfd *abfd, |
| 17968 | Elf_Internal_Shdr * hdr, |
| 17969 | const char *name, |
| 17970 | int shindex) |
| 17971 | { |
| 17972 | /* There ought to be a place to keep ELF backend specific flags, but |
| 17973 | at the moment there isn't one. We just keep track of the |
| 17974 | sections by their name, instead. Fortunately, the ABI gives |
| 17975 | names for all the ARM specific sections, so we will probably get |
| 17976 | away with this. */ |
| 17977 | switch (hdr->sh_type) |
| 17978 | { |
| 17979 | case SHT_ARM_EXIDX: |
| 17980 | case SHT_ARM_PREEMPTMAP: |
| 17981 | case SHT_ARM_ATTRIBUTES: |
| 17982 | break; |
| 17983 | |
| 17984 | default: |
| 17985 | return FALSE; |
| 17986 | } |
| 17987 | |
| 17988 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
| 17989 | return FALSE; |
| 17990 | |
| 17991 | return TRUE; |
| 17992 | } |
| 17993 | |
| 17994 | static _arm_elf_section_data * |
| 17995 | get_arm_elf_section_data (asection * sec) |
| 17996 | { |
| 17997 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
| 17998 | return elf32_arm_section_data (sec); |
| 17999 | else |
| 18000 | return NULL; |
| 18001 | } |
| 18002 | |
| 18003 | typedef struct |
| 18004 | { |
| 18005 | void *flaginfo; |
| 18006 | struct bfd_link_info *info; |
| 18007 | asection *sec; |
| 18008 | int sec_shndx; |
| 18009 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
| 18010 | asection *, struct elf_link_hash_entry *); |
| 18011 | } output_arch_syminfo; |
| 18012 | |
| 18013 | enum map_symbol_type |
| 18014 | { |
| 18015 | ARM_MAP_ARM, |
| 18016 | ARM_MAP_THUMB, |
| 18017 | ARM_MAP_DATA |
| 18018 | }; |
| 18019 | |
| 18020 | |
| 18021 | /* Output a single mapping symbol. */ |
| 18022 | |
| 18023 | static bfd_boolean |
| 18024 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
| 18025 | enum map_symbol_type type, |
| 18026 | bfd_vma offset) |
| 18027 | { |
| 18028 | static const char *names[3] = {"$a", "$t", "$d"}; |
| 18029 | Elf_Internal_Sym sym; |
| 18030 | |
| 18031 | sym.st_value = osi->sec->output_section->vma |
| 18032 | + osi->sec->output_offset |
| 18033 | + offset; |
| 18034 | sym.st_size = 0; |
| 18035 | sym.st_other = 0; |
| 18036 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); |
| 18037 | sym.st_shndx = osi->sec_shndx; |
| 18038 | sym.st_target_internal = 0; |
| 18039 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
| 18040 | return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1; |
| 18041 | } |
| 18042 | |
| 18043 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
| 18044 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ |
| 18045 | |
| 18046 | static bfd_boolean |
| 18047 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
| 18048 | bfd_boolean is_iplt_entry_p, |
| 18049 | union gotplt_union *root_plt, |
| 18050 | struct arm_plt_info *arm_plt) |
| 18051 | { |
| 18052 | struct elf32_arm_link_hash_table *htab; |
| 18053 | bfd_vma addr, plt_header_size; |
| 18054 | |
| 18055 | if (root_plt->offset == (bfd_vma) -1) |
| 18056 | return TRUE; |
| 18057 | |
| 18058 | htab = elf32_arm_hash_table (osi->info); |
| 18059 | if (htab == NULL) |
| 18060 | return FALSE; |
| 18061 | |
| 18062 | if (is_iplt_entry_p) |
| 18063 | { |
| 18064 | osi->sec = htab->root.iplt; |
| 18065 | plt_header_size = 0; |
| 18066 | } |
| 18067 | else |
| 18068 | { |
| 18069 | osi->sec = htab->root.splt; |
| 18070 | plt_header_size = htab->plt_header_size; |
| 18071 | } |
| 18072 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section |
| 18073 | (osi->info->output_bfd, osi->sec->output_section)); |
| 18074 | |
| 18075 | addr = root_plt->offset & -2; |
| 18076 | if (htab->symbian_p) |
| 18077 | { |
| 18078 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
| 18079 | return FALSE; |
| 18080 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
| 18081 | return FALSE; |
| 18082 | } |
| 18083 | else if (htab->vxworks_p) |
| 18084 | { |
| 18085 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
| 18086 | return FALSE; |
| 18087 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
| 18088 | return FALSE; |
| 18089 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
| 18090 | return FALSE; |
| 18091 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
| 18092 | return FALSE; |
| 18093 | } |
| 18094 | else if (htab->nacl_p) |
| 18095 | { |
| 18096 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
| 18097 | return FALSE; |
| 18098 | } |
| 18099 | else if (htab->fdpic_p) |
| 18100 | { |
| 18101 | enum map_symbol_type type = using_thumb_only(htab) |
| 18102 | ? ARM_MAP_THUMB |
| 18103 | : ARM_MAP_ARM; |
| 18104 | |
| 18105 | if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt)) |
| 18106 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
| 18107 | return FALSE; |
| 18108 | if (!elf32_arm_output_map_sym (osi, type, addr)) |
| 18109 | return FALSE; |
| 18110 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16)) |
| 18111 | return FALSE; |
| 18112 | if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry)) |
| 18113 | if (!elf32_arm_output_map_sym (osi, type, addr + 24)) |
| 18114 | return FALSE; |
| 18115 | } |
| 18116 | else if (using_thumb_only (htab)) |
| 18117 | { |
| 18118 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr)) |
| 18119 | return FALSE; |
| 18120 | } |
| 18121 | else |
| 18122 | { |
| 18123 | bfd_boolean thumb_stub_p; |
| 18124 | |
| 18125 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
| 18126 | if (thumb_stub_p) |
| 18127 | { |
| 18128 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
| 18129 | return FALSE; |
| 18130 | } |
| 18131 | #ifdef FOUR_WORD_PLT |
| 18132 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
| 18133 | return FALSE; |
| 18134 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
| 18135 | return FALSE; |
| 18136 | #else |
| 18137 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
| 18138 | so only need to output a mapping symbol for the first PLT entry and |
| 18139 | entries with thumb thunks. */ |
| 18140 | if (thumb_stub_p || addr == plt_header_size) |
| 18141 | { |
| 18142 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
| 18143 | return FALSE; |
| 18144 | } |
| 18145 | #endif |
| 18146 | } |
| 18147 | |
| 18148 | return TRUE; |
| 18149 | } |
| 18150 | |
| 18151 | /* Output mapping symbols for PLT entries associated with H. */ |
| 18152 | |
| 18153 | static bfd_boolean |
| 18154 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) |
| 18155 | { |
| 18156 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; |
| 18157 | struct elf32_arm_link_hash_entry *eh; |
| 18158 | |
| 18159 | if (h->root.type == bfd_link_hash_indirect) |
| 18160 | return TRUE; |
| 18161 | |
| 18162 | if (h->root.type == bfd_link_hash_warning) |
| 18163 | /* When warning symbols are created, they **replace** the "real" |
| 18164 | entry in the hash table, thus we never get to see the real |
| 18165 | symbol in a hash traversal. So look at it now. */ |
| 18166 | h = (struct elf_link_hash_entry *) h->root.u.i.link; |
| 18167 | |
| 18168 | eh = (struct elf32_arm_link_hash_entry *) h; |
| 18169 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), |
| 18170 | &h->plt, &eh->plt); |
| 18171 | } |
| 18172 | |
| 18173 | /* Bind a veneered symbol to its veneer identified by its hash entry |
| 18174 | STUB_ENTRY. The veneered location thus loose its symbol. */ |
| 18175 | |
| 18176 | static void |
| 18177 | arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry) |
| 18178 | { |
| 18179 | struct elf32_arm_link_hash_entry *hash = stub_entry->h; |
| 18180 | |
| 18181 | BFD_ASSERT (hash); |
| 18182 | hash->root.root.u.def.section = stub_entry->stub_sec; |
| 18183 | hash->root.root.u.def.value = stub_entry->stub_offset; |
| 18184 | hash->root.size = stub_entry->stub_size; |
| 18185 | } |
| 18186 | |
| 18187 | /* Output a single local symbol for a generated stub. */ |
| 18188 | |
| 18189 | static bfd_boolean |
| 18190 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, |
| 18191 | bfd_vma offset, bfd_vma size) |
| 18192 | { |
| 18193 | Elf_Internal_Sym sym; |
| 18194 | |
| 18195 | sym.st_value = osi->sec->output_section->vma |
| 18196 | + osi->sec->output_offset |
| 18197 | + offset; |
| 18198 | sym.st_size = size; |
| 18199 | sym.st_other = 0; |
| 18200 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
| 18201 | sym.st_shndx = osi->sec_shndx; |
| 18202 | sym.st_target_internal = 0; |
| 18203 | return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1; |
| 18204 | } |
| 18205 | |
| 18206 | static bfd_boolean |
| 18207 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
| 18208 | void * in_arg) |
| 18209 | { |
| 18210 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 18211 | asection *stub_sec; |
| 18212 | bfd_vma addr; |
| 18213 | char *stub_name; |
| 18214 | output_arch_syminfo *osi; |
| 18215 | const insn_sequence *template_sequence; |
| 18216 | enum stub_insn_type prev_type; |
| 18217 | int size; |
| 18218 | int i; |
| 18219 | enum map_symbol_type sym_type; |
| 18220 | |
| 18221 | /* Massage our args to the form they really have. */ |
| 18222 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; |
| 18223 | osi = (output_arch_syminfo *) in_arg; |
| 18224 | |
| 18225 | stub_sec = stub_entry->stub_sec; |
| 18226 | |
| 18227 | /* Ensure this stub is attached to the current section being |
| 18228 | processed. */ |
| 18229 | if (stub_sec != osi->sec) |
| 18230 | return TRUE; |
| 18231 | |
| 18232 | addr = (bfd_vma) stub_entry->stub_offset; |
| 18233 | template_sequence = stub_entry->stub_template; |
| 18234 | |
| 18235 | if (arm_stub_sym_claimed (stub_entry->stub_type)) |
| 18236 | arm_stub_claim_sym (stub_entry); |
| 18237 | else |
| 18238 | { |
| 18239 | stub_name = stub_entry->output_name; |
| 18240 | switch (template_sequence[0].type) |
| 18241 | { |
| 18242 | case ARM_TYPE: |
| 18243 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, |
| 18244 | stub_entry->stub_size)) |
| 18245 | return FALSE; |
| 18246 | break; |
| 18247 | case THUMB16_TYPE: |
| 18248 | case THUMB32_TYPE: |
| 18249 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, |
| 18250 | stub_entry->stub_size)) |
| 18251 | return FALSE; |
| 18252 | break; |
| 18253 | default: |
| 18254 | BFD_FAIL (); |
| 18255 | return 0; |
| 18256 | } |
| 18257 | } |
| 18258 | |
| 18259 | prev_type = DATA_TYPE; |
| 18260 | size = 0; |
| 18261 | for (i = 0; i < stub_entry->stub_template_size; i++) |
| 18262 | { |
| 18263 | switch (template_sequence[i].type) |
| 18264 | { |
| 18265 | case ARM_TYPE: |
| 18266 | sym_type = ARM_MAP_ARM; |
| 18267 | break; |
| 18268 | |
| 18269 | case THUMB16_TYPE: |
| 18270 | case THUMB32_TYPE: |
| 18271 | sym_type = ARM_MAP_THUMB; |
| 18272 | break; |
| 18273 | |
| 18274 | case DATA_TYPE: |
| 18275 | sym_type = ARM_MAP_DATA; |
| 18276 | break; |
| 18277 | |
| 18278 | default: |
| 18279 | BFD_FAIL (); |
| 18280 | return FALSE; |
| 18281 | } |
| 18282 | |
| 18283 | if (template_sequence[i].type != prev_type) |
| 18284 | { |
| 18285 | prev_type = template_sequence[i].type; |
| 18286 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
| 18287 | return FALSE; |
| 18288 | } |
| 18289 | |
| 18290 | switch (template_sequence[i].type) |
| 18291 | { |
| 18292 | case ARM_TYPE: |
| 18293 | case THUMB32_TYPE: |
| 18294 | size += 4; |
| 18295 | break; |
| 18296 | |
| 18297 | case THUMB16_TYPE: |
| 18298 | size += 2; |
| 18299 | break; |
| 18300 | |
| 18301 | case DATA_TYPE: |
| 18302 | size += 4; |
| 18303 | break; |
| 18304 | |
| 18305 | default: |
| 18306 | BFD_FAIL (); |
| 18307 | return FALSE; |
| 18308 | } |
| 18309 | } |
| 18310 | |
| 18311 | return TRUE; |
| 18312 | } |
| 18313 | |
| 18314 | /* Output mapping symbols for linker generated sections, |
| 18315 | and for those data-only sections that do not have a |
| 18316 | $d. */ |
| 18317 | |
| 18318 | static bfd_boolean |
| 18319 | elf32_arm_output_arch_local_syms (bfd *output_bfd, |
| 18320 | struct bfd_link_info *info, |
| 18321 | void *flaginfo, |
| 18322 | int (*func) (void *, const char *, |
| 18323 | Elf_Internal_Sym *, |
| 18324 | asection *, |
| 18325 | struct elf_link_hash_entry *)) |
| 18326 | { |
| 18327 | output_arch_syminfo osi; |
| 18328 | struct elf32_arm_link_hash_table *htab; |
| 18329 | bfd_vma offset; |
| 18330 | bfd_size_type size; |
| 18331 | bfd *input_bfd; |
| 18332 | |
| 18333 | htab = elf32_arm_hash_table (info); |
| 18334 | if (htab == NULL) |
| 18335 | return FALSE; |
| 18336 | |
| 18337 | check_use_blx (htab); |
| 18338 | |
| 18339 | osi.flaginfo = flaginfo; |
| 18340 | osi.info = info; |
| 18341 | osi.func = func; |
| 18342 | |
| 18343 | /* Add a $d mapping symbol to data-only sections that |
| 18344 | don't have any mapping symbol. This may result in (harmless) redundant |
| 18345 | mapping symbols. */ |
| 18346 | for (input_bfd = info->input_bfds; |
| 18347 | input_bfd != NULL; |
| 18348 | input_bfd = input_bfd->link.next) |
| 18349 | { |
| 18350 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) |
| 18351 | for (osi.sec = input_bfd->sections; |
| 18352 | osi.sec != NULL; |
| 18353 | osi.sec = osi.sec->next) |
| 18354 | { |
| 18355 | if (osi.sec->output_section != NULL |
| 18356 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
| 18357 | != 0) |
| 18358 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
| 18359 | == SEC_HAS_CONTENTS |
| 18360 | && get_arm_elf_section_data (osi.sec) != NULL |
| 18361 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
| 18362 | && osi.sec->size > 0 |
| 18363 | && (osi.sec->flags & SEC_EXCLUDE) == 0) |
| 18364 | { |
| 18365 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
| 18366 | (output_bfd, osi.sec->output_section); |
| 18367 | if (osi.sec_shndx != (int)SHN_BAD) |
| 18368 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); |
| 18369 | } |
| 18370 | } |
| 18371 | } |
| 18372 | |
| 18373 | /* ARM->Thumb glue. */ |
| 18374 | if (htab->arm_glue_size > 0) |
| 18375 | { |
| 18376 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
| 18377 | ARM2THUMB_GLUE_SECTION_NAME); |
| 18378 | |
| 18379 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
| 18380 | (output_bfd, osi.sec->output_section); |
| 18381 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable |
| 18382 | || htab->pic_veneer) |
| 18383 | size = ARM2THUMB_PIC_GLUE_SIZE; |
| 18384 | else if (htab->use_blx) |
| 18385 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; |
| 18386 | else |
| 18387 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
| 18388 | |
| 18389 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
| 18390 | { |
| 18391 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
| 18392 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); |
| 18393 | } |
| 18394 | } |
| 18395 | |
| 18396 | /* Thumb->ARM glue. */ |
| 18397 | if (htab->thumb_glue_size > 0) |
| 18398 | { |
| 18399 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
| 18400 | THUMB2ARM_GLUE_SECTION_NAME); |
| 18401 | |
| 18402 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
| 18403 | (output_bfd, osi.sec->output_section); |
| 18404 | size = THUMB2ARM_GLUE_SIZE; |
| 18405 | |
| 18406 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) |
| 18407 | { |
| 18408 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
| 18409 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); |
| 18410 | } |
| 18411 | } |
| 18412 | |
| 18413 | /* ARMv4 BX veneers. */ |
| 18414 | if (htab->bx_glue_size > 0) |
| 18415 | { |
| 18416 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
| 18417 | ARM_BX_GLUE_SECTION_NAME); |
| 18418 | |
| 18419 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
| 18420 | (output_bfd, osi.sec->output_section); |
| 18421 | |
| 18422 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
| 18423 | } |
| 18424 | |
| 18425 | /* Long calls stubs. */ |
| 18426 | if (htab->stub_bfd && htab->stub_bfd->sections) |
| 18427 | { |
| 18428 | asection* stub_sec; |
| 18429 | |
| 18430 | for (stub_sec = htab->stub_bfd->sections; |
| 18431 | stub_sec != NULL; |
| 18432 | stub_sec = stub_sec->next) |
| 18433 | { |
| 18434 | /* Ignore non-stub sections. */ |
| 18435 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
| 18436 | continue; |
| 18437 | |
| 18438 | osi.sec = stub_sec; |
| 18439 | |
| 18440 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
| 18441 | (output_bfd, osi.sec->output_section); |
| 18442 | |
| 18443 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
| 18444 | } |
| 18445 | } |
| 18446 | |
| 18447 | /* Finally, output mapping symbols for the PLT. */ |
| 18448 | if (htab->root.splt && htab->root.splt->size > 0) |
| 18449 | { |
| 18450 | osi.sec = htab->root.splt; |
| 18451 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section |
| 18452 | (output_bfd, osi.sec->output_section)); |
| 18453 | |
| 18454 | /* Output mapping symbols for the plt header. SymbianOS does not have a |
| 18455 | plt header. */ |
| 18456 | if (htab->vxworks_p) |
| 18457 | { |
| 18458 | /* VxWorks shared libraries have no PLT header. */ |
| 18459 | if (!bfd_link_pic (info)) |
| 18460 | { |
| 18461 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
| 18462 | return FALSE; |
| 18463 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) |
| 18464 | return FALSE; |
| 18465 | } |
| 18466 | } |
| 18467 | else if (htab->nacl_p) |
| 18468 | { |
| 18469 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
| 18470 | return FALSE; |
| 18471 | } |
| 18472 | else if (using_thumb_only (htab) && !htab->fdpic_p) |
| 18473 | { |
| 18474 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0)) |
| 18475 | return FALSE; |
| 18476 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) |
| 18477 | return FALSE; |
| 18478 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16)) |
| 18479 | return FALSE; |
| 18480 | } |
| 18481 | else if (!htab->symbian_p && !htab->fdpic_p) |
| 18482 | { |
| 18483 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
| 18484 | return FALSE; |
| 18485 | #ifndef FOUR_WORD_PLT |
| 18486 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) |
| 18487 | return FALSE; |
| 18488 | #endif |
| 18489 | } |
| 18490 | } |
| 18491 | if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0) |
| 18492 | { |
| 18493 | /* NaCl uses a special first entry in .iplt too. */ |
| 18494 | osi.sec = htab->root.iplt; |
| 18495 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section |
| 18496 | (output_bfd, osi.sec->output_section)); |
| 18497 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
| 18498 | return FALSE; |
| 18499 | } |
| 18500 | if ((htab->root.splt && htab->root.splt->size > 0) |
| 18501 | || (htab->root.iplt && htab->root.iplt->size > 0)) |
| 18502 | { |
| 18503 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
| 18504 | for (input_bfd = info->input_bfds; |
| 18505 | input_bfd != NULL; |
| 18506 | input_bfd = input_bfd->link.next) |
| 18507 | { |
| 18508 | struct arm_local_iplt_info **local_iplt; |
| 18509 | unsigned int i, num_syms; |
| 18510 | |
| 18511 | local_iplt = elf32_arm_local_iplt (input_bfd); |
| 18512 | if (local_iplt != NULL) |
| 18513 | { |
| 18514 | num_syms = elf_symtab_hdr (input_bfd).sh_info; |
| 18515 | for (i = 0; i < num_syms; i++) |
| 18516 | if (local_iplt[i] != NULL |
| 18517 | && !elf32_arm_output_plt_map_1 (&osi, TRUE, |
| 18518 | &local_iplt[i]->root, |
| 18519 | &local_iplt[i]->arm)) |
| 18520 | return FALSE; |
| 18521 | } |
| 18522 | } |
| 18523 | } |
| 18524 | if (htab->dt_tlsdesc_plt != 0) |
| 18525 | { |
| 18526 | /* Mapping symbols for the lazy tls trampoline. */ |
| 18527 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt)) |
| 18528 | return FALSE; |
| 18529 | |
| 18530 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
| 18531 | htab->dt_tlsdesc_plt + 24)) |
| 18532 | return FALSE; |
| 18533 | } |
| 18534 | if (htab->tls_trampoline != 0) |
| 18535 | { |
| 18536 | /* Mapping symbols for the tls trampoline. */ |
| 18537 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) |
| 18538 | return FALSE; |
| 18539 | #ifdef FOUR_WORD_PLT |
| 18540 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
| 18541 | htab->tls_trampoline + 12)) |
| 18542 | return FALSE; |
| 18543 | #endif |
| 18544 | } |
| 18545 | |
| 18546 | return TRUE; |
| 18547 | } |
| 18548 | |
| 18549 | /* Filter normal symbols of CMSE entry functions of ABFD to include in |
| 18550 | the import library. All SYMCOUNT symbols of ABFD can be examined |
| 18551 | from their pointers in SYMS. Pointers of symbols to keep should be |
| 18552 | stored continuously at the beginning of that array. |
| 18553 | |
| 18554 | Returns the number of symbols to keep. */ |
| 18555 | |
| 18556 | static unsigned int |
| 18557 | elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED, |
| 18558 | struct bfd_link_info *info, |
| 18559 | asymbol **syms, long symcount) |
| 18560 | { |
| 18561 | size_t maxnamelen; |
| 18562 | char *cmse_name; |
| 18563 | long src_count, dst_count = 0; |
| 18564 | struct elf32_arm_link_hash_table *htab; |
| 18565 | |
| 18566 | htab = elf32_arm_hash_table (info); |
| 18567 | if (!htab->stub_bfd || !htab->stub_bfd->sections) |
| 18568 | symcount = 0; |
| 18569 | |
| 18570 | maxnamelen = 128; |
| 18571 | cmse_name = (char *) bfd_malloc (maxnamelen); |
| 18572 | for (src_count = 0; src_count < symcount; src_count++) |
| 18573 | { |
| 18574 | struct elf32_arm_link_hash_entry *cmse_hash; |
| 18575 | asymbol *sym; |
| 18576 | flagword flags; |
| 18577 | char *name; |
| 18578 | size_t namelen; |
| 18579 | |
| 18580 | sym = syms[src_count]; |
| 18581 | flags = sym->flags; |
| 18582 | name = (char *) bfd_asymbol_name (sym); |
| 18583 | |
| 18584 | if ((flags & BSF_FUNCTION) != BSF_FUNCTION) |
| 18585 | continue; |
| 18586 | if (!(flags & (BSF_GLOBAL | BSF_WEAK))) |
| 18587 | continue; |
| 18588 | |
| 18589 | namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1; |
| 18590 | if (namelen > maxnamelen) |
| 18591 | { |
| 18592 | cmse_name = (char *) |
| 18593 | bfd_realloc (cmse_name, namelen); |
| 18594 | maxnamelen = namelen; |
| 18595 | } |
| 18596 | snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name); |
| 18597 | cmse_hash = (struct elf32_arm_link_hash_entry *) |
| 18598 | elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE); |
| 18599 | |
| 18600 | if (!cmse_hash |
| 18601 | || (cmse_hash->root.root.type != bfd_link_hash_defined |
| 18602 | && cmse_hash->root.root.type != bfd_link_hash_defweak) |
| 18603 | || cmse_hash->root.type != STT_FUNC) |
| 18604 | continue; |
| 18605 | |
| 18606 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) |
| 18607 | continue; |
| 18608 | |
| 18609 | syms[dst_count++] = sym; |
| 18610 | } |
| 18611 | free (cmse_name); |
| 18612 | |
| 18613 | syms[dst_count] = NULL; |
| 18614 | |
| 18615 | return dst_count; |
| 18616 | } |
| 18617 | |
| 18618 | /* Filter symbols of ABFD to include in the import library. All |
| 18619 | SYMCOUNT symbols of ABFD can be examined from their pointers in |
| 18620 | SYMS. Pointers of symbols to keep should be stored continuously at |
| 18621 | the beginning of that array. |
| 18622 | |
| 18623 | Returns the number of symbols to keep. */ |
| 18624 | |
| 18625 | static unsigned int |
| 18626 | elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED, |
| 18627 | struct bfd_link_info *info, |
| 18628 | asymbol **syms, long symcount) |
| 18629 | { |
| 18630 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
| 18631 | |
| 18632 | /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on |
| 18633 | Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import |
| 18634 | library to be a relocatable object file. */ |
| 18635 | BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P)); |
| 18636 | if (globals->cmse_implib) |
| 18637 | return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount); |
| 18638 | else |
| 18639 | return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount); |
| 18640 | } |
| 18641 | |
| 18642 | /* Allocate target specific section data. */ |
| 18643 | |
| 18644 | static bfd_boolean |
| 18645 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) |
| 18646 | { |
| 18647 | if (!sec->used_by_bfd) |
| 18648 | { |
| 18649 | _arm_elf_section_data *sdata; |
| 18650 | bfd_size_type amt = sizeof (*sdata); |
| 18651 | |
| 18652 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
| 18653 | if (sdata == NULL) |
| 18654 | return FALSE; |
| 18655 | sec->used_by_bfd = sdata; |
| 18656 | } |
| 18657 | |
| 18658 | return _bfd_elf_new_section_hook (abfd, sec); |
| 18659 | } |
| 18660 | |
| 18661 | |
| 18662 | /* Used to order a list of mapping symbols by address. */ |
| 18663 | |
| 18664 | static int |
| 18665 | elf32_arm_compare_mapping (const void * a, const void * b) |
| 18666 | { |
| 18667 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
| 18668 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; |
| 18669 | |
| 18670 | if (amap->vma > bmap->vma) |
| 18671 | return 1; |
| 18672 | else if (amap->vma < bmap->vma) |
| 18673 | return -1; |
| 18674 | else if (amap->type > bmap->type) |
| 18675 | /* Ensure results do not depend on the host qsort for objects with |
| 18676 | multiple mapping symbols at the same address by sorting on type |
| 18677 | after vma. */ |
| 18678 | return 1; |
| 18679 | else if (amap->type < bmap->type) |
| 18680 | return -1; |
| 18681 | else |
| 18682 | return 0; |
| 18683 | } |
| 18684 | |
| 18685 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
| 18686 | |
| 18687 | static unsigned long |
| 18688 | offset_prel31 (unsigned long addr, bfd_vma offset) |
| 18689 | { |
| 18690 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); |
| 18691 | } |
| 18692 | |
| 18693 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 |
| 18694 | relocations. */ |
| 18695 | |
| 18696 | static void |
| 18697 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) |
| 18698 | { |
| 18699 | unsigned long first_word = bfd_get_32 (output_bfd, from); |
| 18700 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); |
| 18701 | |
| 18702 | /* High bit of first word is supposed to be zero. */ |
| 18703 | if ((first_word & 0x80000000ul) == 0) |
| 18704 | first_word = offset_prel31 (first_word, offset); |
| 18705 | |
| 18706 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 |
| 18707 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ |
| 18708 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) |
| 18709 | second_word = offset_prel31 (second_word, offset); |
| 18710 | |
| 18711 | bfd_put_32 (output_bfd, first_word, to); |
| 18712 | bfd_put_32 (output_bfd, second_word, to + 4); |
| 18713 | } |
| 18714 | |
| 18715 | /* Data for make_branch_to_a8_stub(). */ |
| 18716 | |
| 18717 | struct a8_branch_to_stub_data |
| 18718 | { |
| 18719 | asection *writing_section; |
| 18720 | bfd_byte *contents; |
| 18721 | }; |
| 18722 | |
| 18723 | |
| 18724 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right |
| 18725 | places for a particular section. */ |
| 18726 | |
| 18727 | static bfd_boolean |
| 18728 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, |
| 18729 | void *in_arg) |
| 18730 | { |
| 18731 | struct elf32_arm_stub_hash_entry *stub_entry; |
| 18732 | struct a8_branch_to_stub_data *data; |
| 18733 | bfd_byte *contents; |
| 18734 | unsigned long branch_insn; |
| 18735 | bfd_vma veneered_insn_loc, veneer_entry_loc; |
| 18736 | bfd_signed_vma branch_offset; |
| 18737 | bfd *abfd; |
| 18738 | unsigned int loc; |
| 18739 | |
| 18740 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; |
| 18741 | data = (struct a8_branch_to_stub_data *) in_arg; |
| 18742 | |
| 18743 | if (stub_entry->target_section != data->writing_section |
| 18744 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
| 18745 | return TRUE; |
| 18746 | |
| 18747 | contents = data->contents; |
| 18748 | |
| 18749 | /* We use target_section as Cortex-A8 erratum workaround stubs are only |
| 18750 | generated when both source and target are in the same section. */ |
| 18751 | veneered_insn_loc = stub_entry->target_section->output_section->vma |
| 18752 | + stub_entry->target_section->output_offset |
| 18753 | + stub_entry->source_value; |
| 18754 | |
| 18755 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma |
| 18756 | + stub_entry->stub_sec->output_offset |
| 18757 | + stub_entry->stub_offset; |
| 18758 | |
| 18759 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) |
| 18760 | veneered_insn_loc &= ~3u; |
| 18761 | |
| 18762 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; |
| 18763 | |
| 18764 | abfd = stub_entry->target_section->owner; |
| 18765 | loc = stub_entry->source_value; |
| 18766 | |
| 18767 | /* We attempt to avoid this condition by setting stubs_always_after_branch |
| 18768 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. |
| 18769 | This check is just to be on the safe side... */ |
| 18770 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) |
| 18771 | { |
| 18772 | _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is " |
| 18773 | "allocated in unsafe location"), abfd); |
| 18774 | return FALSE; |
| 18775 | } |
| 18776 | |
| 18777 | switch (stub_entry->stub_type) |
| 18778 | { |
| 18779 | case arm_stub_a8_veneer_b: |
| 18780 | case arm_stub_a8_veneer_b_cond: |
| 18781 | branch_insn = 0xf0009000; |
| 18782 | goto jump24; |
| 18783 | |
| 18784 | case arm_stub_a8_veneer_blx: |
| 18785 | branch_insn = 0xf000e800; |
| 18786 | goto jump24; |
| 18787 | |
| 18788 | case arm_stub_a8_veneer_bl: |
| 18789 | { |
| 18790 | unsigned int i1, j1, i2, j2, s; |
| 18791 | |
| 18792 | branch_insn = 0xf000d000; |
| 18793 | |
| 18794 | jump24: |
| 18795 | if (branch_offset < -16777216 || branch_offset > 16777214) |
| 18796 | { |
| 18797 | /* There's not much we can do apart from complain if this |
| 18798 | happens. */ |
| 18799 | _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out " |
| 18800 | "of range (input file too large)"), abfd); |
| 18801 | return FALSE; |
| 18802 | } |
| 18803 | |
| 18804 | /* i1 = not(j1 eor s), so: |
| 18805 | not i1 = j1 eor s |
| 18806 | j1 = (not i1) eor s. */ |
| 18807 | |
| 18808 | branch_insn |= (branch_offset >> 1) & 0x7ff; |
| 18809 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; |
| 18810 | i2 = (branch_offset >> 22) & 1; |
| 18811 | i1 = (branch_offset >> 23) & 1; |
| 18812 | s = (branch_offset >> 24) & 1; |
| 18813 | j1 = (!i1) ^ s; |
| 18814 | j2 = (!i2) ^ s; |
| 18815 | branch_insn |= j2 << 11; |
| 18816 | branch_insn |= j1 << 13; |
| 18817 | branch_insn |= s << 26; |
| 18818 | } |
| 18819 | break; |
| 18820 | |
| 18821 | default: |
| 18822 | BFD_FAIL (); |
| 18823 | return FALSE; |
| 18824 | } |
| 18825 | |
| 18826 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]); |
| 18827 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]); |
| 18828 | |
| 18829 | return TRUE; |
| 18830 | } |
| 18831 | |
| 18832 | /* Beginning of stm32l4xx work-around. */ |
| 18833 | |
| 18834 | /* Functions encoding instructions necessary for the emission of the |
| 18835 | fix-stm32l4xx-629360. |
| 18836 | Encoding is extracted from the |
| 18837 | ARM (C) Architecture Reference Manual |
| 18838 | ARMv7-A and ARMv7-R edition |
| 18839 | ARM DDI 0406C.b (ID072512). */ |
| 18840 | |
| 18841 | static inline bfd_vma |
| 18842 | create_instruction_branch_absolute (int branch_offset) |
| 18843 | { |
| 18844 | /* A8.8.18 B (A8-334) |
| 18845 | B target_address (Encoding T4). */ |
| 18846 | /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */ |
| 18847 | /* jump offset is: S:I1:I2:imm10:imm11:0. */ |
| 18848 | /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */ |
| 18849 | |
| 18850 | int s = ((branch_offset & 0x1000000) >> 24); |
| 18851 | int j1 = s ^ !((branch_offset & 0x800000) >> 23); |
| 18852 | int j2 = s ^ !((branch_offset & 0x400000) >> 22); |
| 18853 | |
| 18854 | if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24)) |
| 18855 | BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch."); |
| 18856 | |
| 18857 | bfd_vma patched_inst = 0xf0009000 |
| 18858 | | s << 26 /* S. */ |
| 18859 | | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */ |
| 18860 | | j1 << 13 /* J1. */ |
| 18861 | | j2 << 11 /* J2. */ |
| 18862 | | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */ |
| 18863 | |
| 18864 | return patched_inst; |
| 18865 | } |
| 18866 | |
| 18867 | static inline bfd_vma |
| 18868 | create_instruction_ldmia (int base_reg, int wback, int reg_mask) |
| 18869 | { |
| 18870 | /* A8.8.57 LDM/LDMIA/LDMFD (A8-396) |
| 18871 | LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */ |
| 18872 | bfd_vma patched_inst = 0xe8900000 |
| 18873 | | (/*W=*/wback << 21) |
| 18874 | | (base_reg << 16) |
| 18875 | | (reg_mask & 0x0000ffff); |
| 18876 | |
| 18877 | return patched_inst; |
| 18878 | } |
| 18879 | |
| 18880 | static inline bfd_vma |
| 18881 | create_instruction_ldmdb (int base_reg, int wback, int reg_mask) |
| 18882 | { |
| 18883 | /* A8.8.60 LDMDB/LDMEA (A8-402) |
| 18884 | LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */ |
| 18885 | bfd_vma patched_inst = 0xe9100000 |
| 18886 | | (/*W=*/wback << 21) |
| 18887 | | (base_reg << 16) |
| 18888 | | (reg_mask & 0x0000ffff); |
| 18889 | |
| 18890 | return patched_inst; |
| 18891 | } |
| 18892 | |
| 18893 | static inline bfd_vma |
| 18894 | create_instruction_mov (int target_reg, int source_reg) |
| 18895 | { |
| 18896 | /* A8.8.103 MOV (register) (A8-486) |
| 18897 | MOV Rd, Rm (Encoding T1). */ |
| 18898 | bfd_vma patched_inst = 0x4600 |
| 18899 | | (target_reg & 0x7) |
| 18900 | | ((target_reg & 0x8) >> 3) << 7 |
| 18901 | | (source_reg << 3); |
| 18902 | |
| 18903 | return patched_inst; |
| 18904 | } |
| 18905 | |
| 18906 | static inline bfd_vma |
| 18907 | create_instruction_sub (int target_reg, int source_reg, int value) |
| 18908 | { |
| 18909 | /* A8.8.221 SUB (immediate) (A8-708) |
| 18910 | SUB Rd, Rn, #value (Encoding T3). */ |
| 18911 | bfd_vma patched_inst = 0xf1a00000 |
| 18912 | | (target_reg << 8) |
| 18913 | | (source_reg << 16) |
| 18914 | | (/*S=*/0 << 20) |
| 18915 | | ((value & 0x800) >> 11) << 26 |
| 18916 | | ((value & 0x700) >> 8) << 12 |
| 18917 | | (value & 0x0ff); |
| 18918 | |
| 18919 | return patched_inst; |
| 18920 | } |
| 18921 | |
| 18922 | static inline bfd_vma |
| 18923 | create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words, |
| 18924 | int first_reg) |
| 18925 | { |
| 18926 | /* A8.8.332 VLDM (A8-922) |
| 18927 | VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */ |
| 18928 | bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00) |
| 18929 | | (/*W=*/wback << 21) |
| 18930 | | (base_reg << 16) |
| 18931 | | (num_words & 0x000000ff) |
| 18932 | | (((unsigned)first_reg >> 1) & 0x0000000f) << 12 |
| 18933 | | (first_reg & 0x00000001) << 22; |
| 18934 | |
| 18935 | return patched_inst; |
| 18936 | } |
| 18937 | |
| 18938 | static inline bfd_vma |
| 18939 | create_instruction_vldmdb (int base_reg, int is_dp, int num_words, |
| 18940 | int first_reg) |
| 18941 | { |
| 18942 | /* A8.8.332 VLDM (A8-922) |
| 18943 | VLMD{MODE} Rn!, {} (Encoding T1 or T2). */ |
| 18944 | bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00) |
| 18945 | | (base_reg << 16) |
| 18946 | | (num_words & 0x000000ff) |
| 18947 | | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12 |
| 18948 | | (first_reg & 0x00000001) << 22; |
| 18949 | |
| 18950 | return patched_inst; |
| 18951 | } |
| 18952 | |
| 18953 | static inline bfd_vma |
| 18954 | create_instruction_udf_w (int value) |
| 18955 | { |
| 18956 | /* A8.8.247 UDF (A8-758) |
| 18957 | Undefined (Encoding T2). */ |
| 18958 | bfd_vma patched_inst = 0xf7f0a000 |
| 18959 | | (value & 0x00000fff) |
| 18960 | | (value & 0x000f0000) << 16; |
| 18961 | |
| 18962 | return patched_inst; |
| 18963 | } |
| 18964 | |
| 18965 | static inline bfd_vma |
| 18966 | create_instruction_udf (int value) |
| 18967 | { |
| 18968 | /* A8.8.247 UDF (A8-758) |
| 18969 | Undefined (Encoding T1). */ |
| 18970 | bfd_vma patched_inst = 0xde00 |
| 18971 | | (value & 0xff); |
| 18972 | |
| 18973 | return patched_inst; |
| 18974 | } |
| 18975 | |
| 18976 | /* Functions writing an instruction in memory, returning the next |
| 18977 | memory position to write to. */ |
| 18978 | |
| 18979 | static inline bfd_byte * |
| 18980 | push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab, |
| 18981 | bfd * output_bfd, bfd_byte *pt, insn32 insn) |
| 18982 | { |
| 18983 | put_thumb2_insn (htab, output_bfd, insn, pt); |
| 18984 | return pt + 4; |
| 18985 | } |
| 18986 | |
| 18987 | static inline bfd_byte * |
| 18988 | push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab, |
| 18989 | bfd * output_bfd, bfd_byte *pt, insn32 insn) |
| 18990 | { |
| 18991 | put_thumb_insn (htab, output_bfd, insn, pt); |
| 18992 | return pt + 2; |
| 18993 | } |
| 18994 | |
| 18995 | /* Function filling up a region in memory with T1 and T2 UDFs taking |
| 18996 | care of alignment. */ |
| 18997 | |
| 18998 | static bfd_byte * |
| 18999 | stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab, |
| 19000 | bfd * output_bfd, |
| 19001 | const bfd_byte * const base_stub_contents, |
| 19002 | bfd_byte * const from_stub_contents, |
| 19003 | const bfd_byte * const end_stub_contents) |
| 19004 | { |
| 19005 | bfd_byte *current_stub_contents = from_stub_contents; |
| 19006 | |
| 19007 | /* Fill the remaining of the stub with deterministic contents : UDF |
| 19008 | instructions. |
| 19009 | Check if realignment is needed on modulo 4 frontier using T1, to |
| 19010 | further use T2. */ |
| 19011 | if ((current_stub_contents < end_stub_contents) |
| 19012 | && !((current_stub_contents - base_stub_contents) % 2) |
| 19013 | && ((current_stub_contents - base_stub_contents) % 4)) |
| 19014 | current_stub_contents = |
| 19015 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, |
| 19016 | create_instruction_udf (0)); |
| 19017 | |
| 19018 | for (; current_stub_contents < end_stub_contents;) |
| 19019 | current_stub_contents = |
| 19020 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19021 | create_instruction_udf_w (0)); |
| 19022 | |
| 19023 | return current_stub_contents; |
| 19024 | } |
| 19025 | |
| 19026 | /* Functions writing the stream of instructions equivalent to the |
| 19027 | derived sequence for ldmia, ldmdb, vldm respectively. */ |
| 19028 | |
| 19029 | static void |
| 19030 | stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab, |
| 19031 | bfd * output_bfd, |
| 19032 | const insn32 initial_insn, |
| 19033 | const bfd_byte *const initial_insn_addr, |
| 19034 | bfd_byte *const base_stub_contents) |
| 19035 | { |
| 19036 | int wback = (initial_insn & 0x00200000) >> 21; |
| 19037 | int ri, rn = (initial_insn & 0x000F0000) >> 16; |
| 19038 | int insn_all_registers = initial_insn & 0x0000ffff; |
| 19039 | int insn_low_registers, insn_high_registers; |
| 19040 | int usable_register_mask; |
| 19041 | int nb_registers = elf32_arm_popcount (insn_all_registers); |
| 19042 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; |
| 19043 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; |
| 19044 | bfd_byte *current_stub_contents = base_stub_contents; |
| 19045 | |
| 19046 | BFD_ASSERT (is_thumb2_ldmia (initial_insn)); |
| 19047 | |
| 19048 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with |
| 19049 | smaller than 8 registers load sequences that do not cause the |
| 19050 | hardware issue. */ |
| 19051 | if (nb_registers <= 8) |
| 19052 | { |
| 19053 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ |
| 19054 | current_stub_contents = |
| 19055 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19056 | initial_insn); |
| 19057 | |
| 19058 | /* B initial_insn_addr+4. */ |
| 19059 | if (!restore_pc) |
| 19060 | current_stub_contents = |
| 19061 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19062 | create_instruction_branch_absolute |
| 19063 | (initial_insn_addr - current_stub_contents)); |
| 19064 | |
| 19065 | /* Fill the remaining of the stub with deterministic contents. */ |
| 19066 | current_stub_contents = |
| 19067 | stm32l4xx_fill_stub_udf (htab, output_bfd, |
| 19068 | base_stub_contents, current_stub_contents, |
| 19069 | base_stub_contents + |
| 19070 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); |
| 19071 | |
| 19072 | return; |
| 19073 | } |
| 19074 | |
| 19075 | /* - reg_list[13] == 0. */ |
| 19076 | BFD_ASSERT ((insn_all_registers & (1 << 13))==0); |
| 19077 | |
| 19078 | /* - reg_list[14] & reg_list[15] != 1. */ |
| 19079 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); |
| 19080 | |
| 19081 | /* - if (wback==1) reg_list[rn] == 0. */ |
| 19082 | BFD_ASSERT (!wback || !restore_rn); |
| 19083 | |
| 19084 | /* - nb_registers > 8. */ |
| 19085 | BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8); |
| 19086 | |
| 19087 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ |
| 19088 | |
| 19089 | /* In the following algorithm, we split this wide LDM using 2 LDM insns: |
| 19090 | - One with the 7 lowest registers (register mask 0x007F) |
| 19091 | This LDM will finally contain between 2 and 7 registers |
| 19092 | - One with the 7 highest registers (register mask 0xDF80) |
| 19093 | This ldm will finally contain between 2 and 7 registers. */ |
| 19094 | insn_low_registers = insn_all_registers & 0x007F; |
| 19095 | insn_high_registers = insn_all_registers & 0xDF80; |
| 19096 | |
| 19097 | /* A spare register may be needed during this veneer to temporarily |
| 19098 | handle the base register. This register will be restored with the |
| 19099 | last LDM operation. |
| 19100 | The usable register may be any general purpose register (that |
| 19101 | excludes PC, SP, LR : register mask is 0x1FFF). */ |
| 19102 | usable_register_mask = 0x1FFF; |
| 19103 | |
| 19104 | /* Generate the stub function. */ |
| 19105 | if (wback) |
| 19106 | { |
| 19107 | /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */ |
| 19108 | current_stub_contents = |
| 19109 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19110 | create_instruction_ldmia |
| 19111 | (rn, /*wback=*/1, insn_low_registers)); |
| 19112 | |
| 19113 | /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */ |
| 19114 | current_stub_contents = |
| 19115 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19116 | create_instruction_ldmia |
| 19117 | (rn, /*wback=*/1, insn_high_registers)); |
| 19118 | if (!restore_pc) |
| 19119 | { |
| 19120 | /* B initial_insn_addr+4. */ |
| 19121 | current_stub_contents = |
| 19122 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19123 | create_instruction_branch_absolute |
| 19124 | (initial_insn_addr - current_stub_contents)); |
| 19125 | } |
| 19126 | } |
| 19127 | else /* if (!wback). */ |
| 19128 | { |
| 19129 | ri = rn; |
| 19130 | |
| 19131 | /* If Rn is not part of the high-register-list, move it there. */ |
| 19132 | if (!(insn_high_registers & (1 << rn))) |
| 19133 | { |
| 19134 | /* Choose a Ri in the high-register-list that will be restored. */ |
| 19135 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); |
| 19136 | |
| 19137 | /* MOV Ri, Rn. */ |
| 19138 | current_stub_contents = |
| 19139 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, |
| 19140 | create_instruction_mov (ri, rn)); |
| 19141 | } |
| 19142 | |
| 19143 | /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */ |
| 19144 | current_stub_contents = |
| 19145 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19146 | create_instruction_ldmia |
| 19147 | (ri, /*wback=*/1, insn_low_registers)); |
| 19148 | |
| 19149 | /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */ |
| 19150 | current_stub_contents = |
| 19151 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19152 | create_instruction_ldmia |
| 19153 | (ri, /*wback=*/0, insn_high_registers)); |
| 19154 | |
| 19155 | if (!restore_pc) |
| 19156 | { |
| 19157 | /* B initial_insn_addr+4. */ |
| 19158 | current_stub_contents = |
| 19159 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19160 | create_instruction_branch_absolute |
| 19161 | (initial_insn_addr - current_stub_contents)); |
| 19162 | } |
| 19163 | } |
| 19164 | |
| 19165 | /* Fill the remaining of the stub with deterministic contents. */ |
| 19166 | current_stub_contents = |
| 19167 | stm32l4xx_fill_stub_udf (htab, output_bfd, |
| 19168 | base_stub_contents, current_stub_contents, |
| 19169 | base_stub_contents + |
| 19170 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); |
| 19171 | } |
| 19172 | |
| 19173 | static void |
| 19174 | stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab, |
| 19175 | bfd * output_bfd, |
| 19176 | const insn32 initial_insn, |
| 19177 | const bfd_byte *const initial_insn_addr, |
| 19178 | bfd_byte *const base_stub_contents) |
| 19179 | { |
| 19180 | int wback = (initial_insn & 0x00200000) >> 21; |
| 19181 | int ri, rn = (initial_insn & 0x000f0000) >> 16; |
| 19182 | int insn_all_registers = initial_insn & 0x0000ffff; |
| 19183 | int insn_low_registers, insn_high_registers; |
| 19184 | int usable_register_mask; |
| 19185 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; |
| 19186 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; |
| 19187 | int nb_registers = elf32_arm_popcount (insn_all_registers); |
| 19188 | bfd_byte *current_stub_contents = base_stub_contents; |
| 19189 | |
| 19190 | BFD_ASSERT (is_thumb2_ldmdb (initial_insn)); |
| 19191 | |
| 19192 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with |
| 19193 | smaller than 8 registers load sequences that do not cause the |
| 19194 | hardware issue. */ |
| 19195 | if (nb_registers <= 8) |
| 19196 | { |
| 19197 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ |
| 19198 | current_stub_contents = |
| 19199 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19200 | initial_insn); |
| 19201 | |
| 19202 | /* B initial_insn_addr+4. */ |
| 19203 | current_stub_contents = |
| 19204 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19205 | create_instruction_branch_absolute |
| 19206 | (initial_insn_addr - current_stub_contents)); |
| 19207 | |
| 19208 | /* Fill the remaining of the stub with deterministic contents. */ |
| 19209 | current_stub_contents = |
| 19210 | stm32l4xx_fill_stub_udf (htab, output_bfd, |
| 19211 | base_stub_contents, current_stub_contents, |
| 19212 | base_stub_contents + |
| 19213 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); |
| 19214 | |
| 19215 | return; |
| 19216 | } |
| 19217 | |
| 19218 | /* - reg_list[13] == 0. */ |
| 19219 | BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0); |
| 19220 | |
| 19221 | /* - reg_list[14] & reg_list[15] != 1. */ |
| 19222 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); |
| 19223 | |
| 19224 | /* - if (wback==1) reg_list[rn] == 0. */ |
| 19225 | BFD_ASSERT (!wback || !restore_rn); |
| 19226 | |
| 19227 | /* - nb_registers > 8. */ |
| 19228 | BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8); |
| 19229 | |
| 19230 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ |
| 19231 | |
| 19232 | /* In the following algorithm, we split this wide LDM using 2 LDM insn: |
| 19233 | - One with the 7 lowest registers (register mask 0x007F) |
| 19234 | This LDM will finally contain between 2 and 7 registers |
| 19235 | - One with the 7 highest registers (register mask 0xDF80) |
| 19236 | This ldm will finally contain between 2 and 7 registers. */ |
| 19237 | insn_low_registers = insn_all_registers & 0x007F; |
| 19238 | insn_high_registers = insn_all_registers & 0xDF80; |
| 19239 | |
| 19240 | /* A spare register may be needed during this veneer to temporarily |
| 19241 | handle the base register. This register will be restored with |
| 19242 | the last LDM operation. |
| 19243 | The usable register may be any general purpose register (that excludes |
| 19244 | PC, SP, LR : register mask is 0x1FFF). */ |
| 19245 | usable_register_mask = 0x1FFF; |
| 19246 | |
| 19247 | /* Generate the stub function. */ |
| 19248 | if (!wback && !restore_pc && !restore_rn) |
| 19249 | { |
| 19250 | /* Choose a Ri in the low-register-list that will be restored. */ |
| 19251 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); |
| 19252 | |
| 19253 | /* MOV Ri, Rn. */ |
| 19254 | current_stub_contents = |
| 19255 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, |
| 19256 | create_instruction_mov (ri, rn)); |
| 19257 | |
| 19258 | /* LDMDB Ri!, {R-high-register-list}. */ |
| 19259 | current_stub_contents = |
| 19260 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19261 | create_instruction_ldmdb |
| 19262 | (ri, /*wback=*/1, insn_high_registers)); |
| 19263 | |
| 19264 | /* LDMDB Ri, {R-low-register-list}. */ |
| 19265 | current_stub_contents = |
| 19266 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19267 | create_instruction_ldmdb |
| 19268 | (ri, /*wback=*/0, insn_low_registers)); |
| 19269 | |
| 19270 | /* B initial_insn_addr+4. */ |
| 19271 | current_stub_contents = |
| 19272 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19273 | create_instruction_branch_absolute |
| 19274 | (initial_insn_addr - current_stub_contents)); |
| 19275 | } |
| 19276 | else if (wback && !restore_pc && !restore_rn) |
| 19277 | { |
| 19278 | /* LDMDB Rn!, {R-high-register-list}. */ |
| 19279 | current_stub_contents = |
| 19280 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19281 | create_instruction_ldmdb |
| 19282 | (rn, /*wback=*/1, insn_high_registers)); |
| 19283 | |
| 19284 | /* LDMDB Rn!, {R-low-register-list}. */ |
| 19285 | current_stub_contents = |
| 19286 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19287 | create_instruction_ldmdb |
| 19288 | (rn, /*wback=*/1, insn_low_registers)); |
| 19289 | |
| 19290 | /* B initial_insn_addr+4. */ |
| 19291 | current_stub_contents = |
| 19292 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19293 | create_instruction_branch_absolute |
| 19294 | (initial_insn_addr - current_stub_contents)); |
| 19295 | } |
| 19296 | else if (!wback && restore_pc && !restore_rn) |
| 19297 | { |
| 19298 | /* Choose a Ri in the high-register-list that will be restored. */ |
| 19299 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); |
| 19300 | |
| 19301 | /* SUB Ri, Rn, #(4*nb_registers). */ |
| 19302 | current_stub_contents = |
| 19303 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19304 | create_instruction_sub (ri, rn, (4 * nb_registers))); |
| 19305 | |
| 19306 | /* LDMIA Ri!, {R-low-register-list}. */ |
| 19307 | current_stub_contents = |
| 19308 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19309 | create_instruction_ldmia |
| 19310 | (ri, /*wback=*/1, insn_low_registers)); |
| 19311 | |
| 19312 | /* LDMIA Ri, {R-high-register-list}. */ |
| 19313 | current_stub_contents = |
| 19314 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19315 | create_instruction_ldmia |
| 19316 | (ri, /*wback=*/0, insn_high_registers)); |
| 19317 | } |
| 19318 | else if (wback && restore_pc && !restore_rn) |
| 19319 | { |
| 19320 | /* Choose a Ri in the high-register-list that will be restored. */ |
| 19321 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); |
| 19322 | |
| 19323 | /* SUB Rn, Rn, #(4*nb_registers) */ |
| 19324 | current_stub_contents = |
| 19325 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19326 | create_instruction_sub (rn, rn, (4 * nb_registers))); |
| 19327 | |
| 19328 | /* MOV Ri, Rn. */ |
| 19329 | current_stub_contents = |
| 19330 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, |
| 19331 | create_instruction_mov (ri, rn)); |
| 19332 | |
| 19333 | /* LDMIA Ri!, {R-low-register-list}. */ |
| 19334 | current_stub_contents = |
| 19335 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19336 | create_instruction_ldmia |
| 19337 | (ri, /*wback=*/1, insn_low_registers)); |
| 19338 | |
| 19339 | /* LDMIA Ri, {R-high-register-list}. */ |
| 19340 | current_stub_contents = |
| 19341 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19342 | create_instruction_ldmia |
| 19343 | (ri, /*wback=*/0, insn_high_registers)); |
| 19344 | } |
| 19345 | else if (!wback && !restore_pc && restore_rn) |
| 19346 | { |
| 19347 | ri = rn; |
| 19348 | if (!(insn_low_registers & (1 << rn))) |
| 19349 | { |
| 19350 | /* Choose a Ri in the low-register-list that will be restored. */ |
| 19351 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); |
| 19352 | |
| 19353 | /* MOV Ri, Rn. */ |
| 19354 | current_stub_contents = |
| 19355 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, |
| 19356 | create_instruction_mov (ri, rn)); |
| 19357 | } |
| 19358 | |
| 19359 | /* LDMDB Ri!, {R-high-register-list}. */ |
| 19360 | current_stub_contents = |
| 19361 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19362 | create_instruction_ldmdb |
| 19363 | (ri, /*wback=*/1, insn_high_registers)); |
| 19364 | |
| 19365 | /* LDMDB Ri, {R-low-register-list}. */ |
| 19366 | current_stub_contents = |
| 19367 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19368 | create_instruction_ldmdb |
| 19369 | (ri, /*wback=*/0, insn_low_registers)); |
| 19370 | |
| 19371 | /* B initial_insn_addr+4. */ |
| 19372 | current_stub_contents = |
| 19373 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19374 | create_instruction_branch_absolute |
| 19375 | (initial_insn_addr - current_stub_contents)); |
| 19376 | } |
| 19377 | else if (!wback && restore_pc && restore_rn) |
| 19378 | { |
| 19379 | ri = rn; |
| 19380 | if (!(insn_high_registers & (1 << rn))) |
| 19381 | { |
| 19382 | /* Choose a Ri in the high-register-list that will be restored. */ |
| 19383 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); |
| 19384 | } |
| 19385 | |
| 19386 | /* SUB Ri, Rn, #(4*nb_registers). */ |
| 19387 | current_stub_contents = |
| 19388 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19389 | create_instruction_sub (ri, rn, (4 * nb_registers))); |
| 19390 | |
| 19391 | /* LDMIA Ri!, {R-low-register-list}. */ |
| 19392 | current_stub_contents = |
| 19393 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19394 | create_instruction_ldmia |
| 19395 | (ri, /*wback=*/1, insn_low_registers)); |
| 19396 | |
| 19397 | /* LDMIA Ri, {R-high-register-list}. */ |
| 19398 | current_stub_contents = |
| 19399 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19400 | create_instruction_ldmia |
| 19401 | (ri, /*wback=*/0, insn_high_registers)); |
| 19402 | } |
| 19403 | else if (wback && restore_rn) |
| 19404 | { |
| 19405 | /* The assembler should not have accepted to encode this. */ |
| 19406 | BFD_ASSERT (0 && "Cannot patch an instruction that has an " |
| 19407 | "undefined behavior.\n"); |
| 19408 | } |
| 19409 | |
| 19410 | /* Fill the remaining of the stub with deterministic contents. */ |
| 19411 | current_stub_contents = |
| 19412 | stm32l4xx_fill_stub_udf (htab, output_bfd, |
| 19413 | base_stub_contents, current_stub_contents, |
| 19414 | base_stub_contents + |
| 19415 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); |
| 19416 | |
| 19417 | } |
| 19418 | |
| 19419 | static void |
| 19420 | stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab, |
| 19421 | bfd * output_bfd, |
| 19422 | const insn32 initial_insn, |
| 19423 | const bfd_byte *const initial_insn_addr, |
| 19424 | bfd_byte *const base_stub_contents) |
| 19425 | { |
| 19426 | int num_words = ((unsigned int) initial_insn << 24) >> 24; |
| 19427 | bfd_byte *current_stub_contents = base_stub_contents; |
| 19428 | |
| 19429 | BFD_ASSERT (is_thumb2_vldm (initial_insn)); |
| 19430 | |
| 19431 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with |
| 19432 | smaller than 8 words load sequences that do not cause the |
| 19433 | hardware issue. */ |
| 19434 | if (num_words <= 8) |
| 19435 | { |
| 19436 | /* Untouched instruction. */ |
| 19437 | current_stub_contents = |
| 19438 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19439 | initial_insn); |
| 19440 | |
| 19441 | /* B initial_insn_addr+4. */ |
| 19442 | current_stub_contents = |
| 19443 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19444 | create_instruction_branch_absolute |
| 19445 | (initial_insn_addr - current_stub_contents)); |
| 19446 | } |
| 19447 | else |
| 19448 | { |
| 19449 | bfd_boolean is_dp = /* DP encoding. */ |
| 19450 | (initial_insn & 0xfe100f00) == 0xec100b00; |
| 19451 | bfd_boolean is_ia_nobang = /* (IA without !). */ |
| 19452 | (((initial_insn << 7) >> 28) & 0xd) == 0x4; |
| 19453 | bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */ |
| 19454 | (((initial_insn << 7) >> 28) & 0xd) == 0x5; |
| 19455 | bfd_boolean is_db_bang = /* (DB with !). */ |
| 19456 | (((initial_insn << 7) >> 28) & 0xd) == 0x9; |
| 19457 | int base_reg = ((unsigned int) initial_insn << 12) >> 28; |
| 19458 | /* d = UInt (Vd:D);. */ |
| 19459 | int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1) |
| 19460 | | (((unsigned int)initial_insn << 9) >> 31); |
| 19461 | |
| 19462 | /* Compute the number of 8-words chunks needed to split. */ |
| 19463 | int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8); |
| 19464 | int chunk; |
| 19465 | |
| 19466 | /* The test coverage has been done assuming the following |
| 19467 | hypothesis that exactly one of the previous is_ predicates is |
| 19468 | true. */ |
| 19469 | BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang) |
| 19470 | && !(is_ia_nobang & is_ia_bang & is_db_bang)); |
| 19471 | |
| 19472 | /* We treat the cutting of the words in one pass for all |
| 19473 | cases, then we emit the adjustments: |
| 19474 | |
| 19475 | vldm rx, {...} |
| 19476 | -> vldm rx!, {8_words_or_less} for each needed 8_word |
| 19477 | -> sub rx, rx, #size (list) |
| 19478 | |
| 19479 | vldm rx!, {...} |
| 19480 | -> vldm rx!, {8_words_or_less} for each needed 8_word |
| 19481 | This also handles vpop instruction (when rx is sp) |
| 19482 | |
| 19483 | vldmd rx!, {...} |
| 19484 | -> vldmb rx!, {8_words_or_less} for each needed 8_word. */ |
| 19485 | for (chunk = 0; chunk < chunks; ++chunk) |
| 19486 | { |
| 19487 | bfd_vma new_insn = 0; |
| 19488 | |
| 19489 | if (is_ia_nobang || is_ia_bang) |
| 19490 | { |
| 19491 | new_insn = create_instruction_vldmia |
| 19492 | (base_reg, |
| 19493 | is_dp, |
| 19494 | /*wback= . */1, |
| 19495 | chunks - (chunk + 1) ? |
| 19496 | 8 : num_words - chunk * 8, |
| 19497 | first_reg + chunk * 8); |
| 19498 | } |
| 19499 | else if (is_db_bang) |
| 19500 | { |
| 19501 | new_insn = create_instruction_vldmdb |
| 19502 | (base_reg, |
| 19503 | is_dp, |
| 19504 | chunks - (chunk + 1) ? |
| 19505 | 8 : num_words - chunk * 8, |
| 19506 | first_reg + chunk * 8); |
| 19507 | } |
| 19508 | |
| 19509 | if (new_insn) |
| 19510 | current_stub_contents = |
| 19511 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19512 | new_insn); |
| 19513 | } |
| 19514 | |
| 19515 | /* Only this case requires the base register compensation |
| 19516 | subtract. */ |
| 19517 | if (is_ia_nobang) |
| 19518 | { |
| 19519 | current_stub_contents = |
| 19520 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19521 | create_instruction_sub |
| 19522 | (base_reg, base_reg, 4*num_words)); |
| 19523 | } |
| 19524 | |
| 19525 | /* B initial_insn_addr+4. */ |
| 19526 | current_stub_contents = |
| 19527 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, |
| 19528 | create_instruction_branch_absolute |
| 19529 | (initial_insn_addr - current_stub_contents)); |
| 19530 | } |
| 19531 | |
| 19532 | /* Fill the remaining of the stub with deterministic contents. */ |
| 19533 | current_stub_contents = |
| 19534 | stm32l4xx_fill_stub_udf (htab, output_bfd, |
| 19535 | base_stub_contents, current_stub_contents, |
| 19536 | base_stub_contents + |
| 19537 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); |
| 19538 | } |
| 19539 | |
| 19540 | static void |
| 19541 | stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab, |
| 19542 | bfd * output_bfd, |
| 19543 | const insn32 wrong_insn, |
| 19544 | const bfd_byte *const wrong_insn_addr, |
| 19545 | bfd_byte *const stub_contents) |
| 19546 | { |
| 19547 | if (is_thumb2_ldmia (wrong_insn)) |
| 19548 | stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd, |
| 19549 | wrong_insn, wrong_insn_addr, |
| 19550 | stub_contents); |
| 19551 | else if (is_thumb2_ldmdb (wrong_insn)) |
| 19552 | stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd, |
| 19553 | wrong_insn, wrong_insn_addr, |
| 19554 | stub_contents); |
| 19555 | else if (is_thumb2_vldm (wrong_insn)) |
| 19556 | stm32l4xx_create_replacing_stub_vldm (htab, output_bfd, |
| 19557 | wrong_insn, wrong_insn_addr, |
| 19558 | stub_contents); |
| 19559 | } |
| 19560 | |
| 19561 | /* End of stm32l4xx work-around. */ |
| 19562 | |
| 19563 | |
| 19564 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
| 19565 | written out as normal. */ |
| 19566 | |
| 19567 | static bfd_boolean |
| 19568 | elf32_arm_write_section (bfd *output_bfd, |
| 19569 | struct bfd_link_info *link_info, |
| 19570 | asection *sec, |
| 19571 | bfd_byte *contents) |
| 19572 | { |
| 19573 | unsigned int mapcount, errcount; |
| 19574 | _arm_elf_section_data *arm_data; |
| 19575 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
| 19576 | elf32_arm_section_map *map; |
| 19577 | elf32_vfp11_erratum_list *errnode; |
| 19578 | elf32_stm32l4xx_erratum_list *stm32l4xx_errnode; |
| 19579 | bfd_vma ptr; |
| 19580 | bfd_vma end; |
| 19581 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
| 19582 | bfd_byte tmp; |
| 19583 | unsigned int i; |
| 19584 | |
| 19585 | if (globals == NULL) |
| 19586 | return FALSE; |
| 19587 | |
| 19588 | /* If this section has not been allocated an _arm_elf_section_data |
| 19589 | structure then we cannot record anything. */ |
| 19590 | arm_data = get_arm_elf_section_data (sec); |
| 19591 | if (arm_data == NULL) |
| 19592 | return FALSE; |
| 19593 | |
| 19594 | mapcount = arm_data->mapcount; |
| 19595 | map = arm_data->map; |
| 19596 | errcount = arm_data->erratumcount; |
| 19597 | |
| 19598 | if (errcount != 0) |
| 19599 | { |
| 19600 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; |
| 19601 | |
| 19602 | for (errnode = arm_data->erratumlist; errnode != 0; |
| 19603 | errnode = errnode->next) |
| 19604 | { |
| 19605 | bfd_vma target = errnode->vma - offset; |
| 19606 | |
| 19607 | switch (errnode->type) |
| 19608 | { |
| 19609 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: |
| 19610 | { |
| 19611 | bfd_vma branch_to_veneer; |
| 19612 | /* Original condition code of instruction, plus bit mask for |
| 19613 | ARM B instruction. */ |
| 19614 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) |
| 19615 | | 0x0a000000; |
| 19616 | |
| 19617 | /* The instruction is before the label. */ |
| 19618 | target -= 4; |
| 19619 | |
| 19620 | /* Above offset included in -4 below. */ |
| 19621 | branch_to_veneer = errnode->u.b.veneer->vma |
| 19622 | - errnode->vma - 4; |
| 19623 | |
| 19624 | if ((signed) branch_to_veneer < -(1 << 25) |
| 19625 | || (signed) branch_to_veneer >= (1 << 25)) |
| 19626 | _bfd_error_handler (_("%pB: error: VFP11 veneer out of " |
| 19627 | "range"), output_bfd); |
| 19628 | |
| 19629 | insn |= (branch_to_veneer >> 2) & 0xffffff; |
| 19630 | contents[endianflip ^ target] = insn & 0xff; |
| 19631 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; |
| 19632 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; |
| 19633 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; |
| 19634 | } |
| 19635 | break; |
| 19636 | |
| 19637 | case VFP11_ERRATUM_ARM_VENEER: |
| 19638 | { |
| 19639 | bfd_vma branch_from_veneer; |
| 19640 | unsigned int insn; |
| 19641 | |
| 19642 | /* Take size of veneer into account. */ |
| 19643 | branch_from_veneer = errnode->u.v.branch->vma |
| 19644 | - errnode->vma - 12; |
| 19645 | |
| 19646 | if ((signed) branch_from_veneer < -(1 << 25) |
| 19647 | || (signed) branch_from_veneer >= (1 << 25)) |
| 19648 | _bfd_error_handler (_("%pB: error: VFP11 veneer out of " |
| 19649 | "range"), output_bfd); |
| 19650 | |
| 19651 | /* Original instruction. */ |
| 19652 | insn = errnode->u.v.branch->u.b.vfp_insn; |
| 19653 | contents[endianflip ^ target] = insn & 0xff; |
| 19654 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; |
| 19655 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; |
| 19656 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; |
| 19657 | |
| 19658 | /* Branch back to insn after original insn. */ |
| 19659 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); |
| 19660 | contents[endianflip ^ (target + 4)] = insn & 0xff; |
| 19661 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; |
| 19662 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; |
| 19663 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; |
| 19664 | } |
| 19665 | break; |
| 19666 | |
| 19667 | default: |
| 19668 | abort (); |
| 19669 | } |
| 19670 | } |
| 19671 | } |
| 19672 | |
| 19673 | if (arm_data->stm32l4xx_erratumcount != 0) |
| 19674 | { |
| 19675 | for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist; |
| 19676 | stm32l4xx_errnode != 0; |
| 19677 | stm32l4xx_errnode = stm32l4xx_errnode->next) |
| 19678 | { |
| 19679 | bfd_vma target = stm32l4xx_errnode->vma - offset; |
| 19680 | |
| 19681 | switch (stm32l4xx_errnode->type) |
| 19682 | { |
| 19683 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: |
| 19684 | { |
| 19685 | unsigned int insn; |
| 19686 | bfd_vma branch_to_veneer = |
| 19687 | stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma; |
| 19688 | |
| 19689 | if ((signed) branch_to_veneer < -(1 << 24) |
| 19690 | || (signed) branch_to_veneer >= (1 << 24)) |
| 19691 | { |
| 19692 | bfd_vma out_of_range = |
| 19693 | ((signed) branch_to_veneer < -(1 << 24)) ? |
| 19694 | - branch_to_veneer - (1 << 24) : |
| 19695 | ((signed) branch_to_veneer >= (1 << 24)) ? |
| 19696 | branch_to_veneer - (1 << 24) : 0; |
| 19697 | |
| 19698 | _bfd_error_handler |
| 19699 | (_("%pB(%#" PRIx64 "): error: " |
| 19700 | "cannot create STM32L4XX veneer; " |
| 19701 | "jump out of range by %" PRId64 " bytes; " |
| 19702 | "cannot encode branch instruction"), |
| 19703 | output_bfd, |
| 19704 | (uint64_t) (stm32l4xx_errnode->vma - 4), |
| 19705 | (int64_t) out_of_range); |
| 19706 | continue; |
| 19707 | } |
| 19708 | |
| 19709 | insn = create_instruction_branch_absolute |
| 19710 | (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma); |
| 19711 | |
| 19712 | /* The instruction is before the label. */ |
| 19713 | target -= 4; |
| 19714 | |
| 19715 | put_thumb2_insn (globals, output_bfd, |
| 19716 | (bfd_vma) insn, contents + target); |
| 19717 | } |
| 19718 | break; |
| 19719 | |
| 19720 | case STM32L4XX_ERRATUM_VENEER: |
| 19721 | { |
| 19722 | bfd_byte * veneer; |
| 19723 | bfd_byte * veneer_r; |
| 19724 | unsigned int insn; |
| 19725 | |
| 19726 | veneer = contents + target; |
| 19727 | veneer_r = veneer |
| 19728 | + stm32l4xx_errnode->u.b.veneer->vma |
| 19729 | - stm32l4xx_errnode->vma - 4; |
| 19730 | |
| 19731 | if ((signed) (veneer_r - veneer - |
| 19732 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE > |
| 19733 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE ? |
| 19734 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE : |
| 19735 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24) |
| 19736 | || (signed) (veneer_r - veneer) >= (1 << 24)) |
| 19737 | { |
| 19738 | _bfd_error_handler (_("%pB: error: cannot create STM32L4XX " |
| 19739 | "veneer"), output_bfd); |
| 19740 | continue; |
| 19741 | } |
| 19742 | |
| 19743 | /* Original instruction. */ |
| 19744 | insn = stm32l4xx_errnode->u.v.branch->u.b.insn; |
| 19745 | |
| 19746 | stm32l4xx_create_replacing_stub |
| 19747 | (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer); |
| 19748 | } |
| 19749 | break; |
| 19750 | |
| 19751 | default: |
| 19752 | abort (); |
| 19753 | } |
| 19754 | } |
| 19755 | } |
| 19756 | |
| 19757 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
| 19758 | { |
| 19759 | arm_unwind_table_edit *edit_node |
| 19760 | = arm_data->u.exidx.unwind_edit_list; |
| 19761 | /* Now, sec->size is the size of the section we will write. The original |
| 19762 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND |
| 19763 | markers) was sec->rawsize. (This isn't the case if we perform no |
| 19764 | edits, then rawsize will be zero and we should use size). */ |
| 19765 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
| 19766 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
| 19767 | unsigned int in_index, out_index; |
| 19768 | bfd_vma add_to_offsets = 0; |
| 19769 | |
| 19770 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) |
| 19771 | { |
| 19772 | if (edit_node) |
| 19773 | { |
| 19774 | unsigned int edit_index = edit_node->index; |
| 19775 | |
| 19776 | if (in_index < edit_index && in_index * 8 < input_size) |
| 19777 | { |
| 19778 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, |
| 19779 | contents + in_index * 8, add_to_offsets); |
| 19780 | out_index++; |
| 19781 | in_index++; |
| 19782 | } |
| 19783 | else if (in_index == edit_index |
| 19784 | || (in_index * 8 >= input_size |
| 19785 | && edit_index == UINT_MAX)) |
| 19786 | { |
| 19787 | switch (edit_node->type) |
| 19788 | { |
| 19789 | case DELETE_EXIDX_ENTRY: |
| 19790 | in_index++; |
| 19791 | add_to_offsets += 8; |
| 19792 | break; |
| 19793 | |
| 19794 | case INSERT_EXIDX_CANTUNWIND_AT_END: |
| 19795 | { |
| 19796 | asection *text_sec = edit_node->linked_section; |
| 19797 | bfd_vma text_offset = text_sec->output_section->vma |
| 19798 | + text_sec->output_offset |
| 19799 | + text_sec->size; |
| 19800 | bfd_vma exidx_offset = offset + out_index * 8; |
| 19801 | unsigned long prel31_offset; |
| 19802 | |
| 19803 | /* Note: this is meant to be equivalent to an |
| 19804 | R_ARM_PREL31 relocation. These synthetic |
| 19805 | EXIDX_CANTUNWIND markers are not relocated by the |
| 19806 | usual BFD method. */ |
| 19807 | prel31_offset = (text_offset - exidx_offset) |
| 19808 | & 0x7ffffffful; |
| 19809 | if (bfd_link_relocatable (link_info)) |
| 19810 | { |
| 19811 | /* Here relocation for new EXIDX_CANTUNWIND is |
| 19812 | created, so there is no need to |
| 19813 | adjust offset by hand. */ |
| 19814 | prel31_offset = text_sec->output_offset |
| 19815 | + text_sec->size; |
| 19816 | } |
| 19817 | |
| 19818 | /* First address we can't unwind. */ |
| 19819 | bfd_put_32 (output_bfd, prel31_offset, |
| 19820 | &edited_contents[out_index * 8]); |
| 19821 | |
| 19822 | /* Code for EXIDX_CANTUNWIND. */ |
| 19823 | bfd_put_32 (output_bfd, 0x1, |
| 19824 | &edited_contents[out_index * 8 + 4]); |
| 19825 | |
| 19826 | out_index++; |
| 19827 | add_to_offsets -= 8; |
| 19828 | } |
| 19829 | break; |
| 19830 | } |
| 19831 | |
| 19832 | edit_node = edit_node->next; |
| 19833 | } |
| 19834 | } |
| 19835 | else |
| 19836 | { |
| 19837 | /* No more edits, copy remaining entries verbatim. */ |
| 19838 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, |
| 19839 | contents + in_index * 8, add_to_offsets); |
| 19840 | out_index++; |
| 19841 | in_index++; |
| 19842 | } |
| 19843 | } |
| 19844 | |
| 19845 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) |
| 19846 | bfd_set_section_contents (output_bfd, sec->output_section, |
| 19847 | edited_contents, |
| 19848 | (file_ptr) sec->output_offset, sec->size); |
| 19849 | |
| 19850 | return TRUE; |
| 19851 | } |
| 19852 | |
| 19853 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
| 19854 | if (globals->fix_cortex_a8) |
| 19855 | { |
| 19856 | struct a8_branch_to_stub_data data; |
| 19857 | |
| 19858 | data.writing_section = sec; |
| 19859 | data.contents = contents; |
| 19860 | |
| 19861 | bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub, |
| 19862 | & data); |
| 19863 | } |
| 19864 | |
| 19865 | if (mapcount == 0) |
| 19866 | return FALSE; |
| 19867 | |
| 19868 | if (globals->byteswap_code) |
| 19869 | { |
| 19870 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
| 19871 | |
| 19872 | ptr = map[0].vma; |
| 19873 | for (i = 0; i < mapcount; i++) |
| 19874 | { |
| 19875 | if (i == mapcount - 1) |
| 19876 | end = sec->size; |
| 19877 | else |
| 19878 | end = map[i + 1].vma; |
| 19879 | |
| 19880 | switch (map[i].type) |
| 19881 | { |
| 19882 | case 'a': |
| 19883 | /* Byte swap code words. */ |
| 19884 | while (ptr + 3 < end) |
| 19885 | { |
| 19886 | tmp = contents[ptr]; |
| 19887 | contents[ptr] = contents[ptr + 3]; |
| 19888 | contents[ptr + 3] = tmp; |
| 19889 | tmp = contents[ptr + 1]; |
| 19890 | contents[ptr + 1] = contents[ptr + 2]; |
| 19891 | contents[ptr + 2] = tmp; |
| 19892 | ptr += 4; |
| 19893 | } |
| 19894 | break; |
| 19895 | |
| 19896 | case 't': |
| 19897 | /* Byte swap code halfwords. */ |
| 19898 | while (ptr + 1 < end) |
| 19899 | { |
| 19900 | tmp = contents[ptr]; |
| 19901 | contents[ptr] = contents[ptr + 1]; |
| 19902 | contents[ptr + 1] = tmp; |
| 19903 | ptr += 2; |
| 19904 | } |
| 19905 | break; |
| 19906 | |
| 19907 | case 'd': |
| 19908 | /* Leave data alone. */ |
| 19909 | break; |
| 19910 | } |
| 19911 | ptr = end; |
| 19912 | } |
| 19913 | } |
| 19914 | |
| 19915 | free (map); |
| 19916 | arm_data->mapcount = -1; |
| 19917 | arm_data->mapsize = 0; |
| 19918 | arm_data->map = NULL; |
| 19919 | |
| 19920 | return FALSE; |
| 19921 | } |
| 19922 | |
| 19923 | /* Mangle thumb function symbols as we read them in. */ |
| 19924 | |
| 19925 | static bfd_boolean |
| 19926 | elf32_arm_swap_symbol_in (bfd * abfd, |
| 19927 | const void *psrc, |
| 19928 | const void *pshn, |
| 19929 | Elf_Internal_Sym *dst) |
| 19930 | { |
| 19931 | Elf_Internal_Shdr *symtab_hdr; |
| 19932 | const char *name = NULL; |
| 19933 | |
| 19934 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
| 19935 | return FALSE; |
| 19936 | dst->st_target_internal = 0; |
| 19937 | |
| 19938 | /* New EABI objects mark thumb function symbols by setting the low bit of |
| 19939 | the address. */ |
| 19940 | if (ELF_ST_TYPE (dst->st_info) == STT_FUNC |
| 19941 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) |
| 19942 | { |
| 19943 | if (dst->st_value & 1) |
| 19944 | { |
| 19945 | dst->st_value &= ~(bfd_vma) 1; |
| 19946 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, |
| 19947 | ST_BRANCH_TO_THUMB); |
| 19948 | } |
| 19949 | else |
| 19950 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM); |
| 19951 | } |
| 19952 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) |
| 19953 | { |
| 19954 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); |
| 19955 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB); |
| 19956 | } |
| 19957 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
| 19958 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG); |
| 19959 | else |
| 19960 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN); |
| 19961 | |
| 19962 | /* Mark CMSE special symbols. */ |
| 19963 | symtab_hdr = & elf_symtab_hdr (abfd); |
| 19964 | if (symtab_hdr->sh_size) |
| 19965 | name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL); |
| 19966 | if (name && CONST_STRNEQ (name, CMSE_PREFIX)) |
| 19967 | ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal); |
| 19968 | |
| 19969 | return TRUE; |
| 19970 | } |
| 19971 | |
| 19972 | |
| 19973 | /* Mangle thumb function symbols as we write them out. */ |
| 19974 | |
| 19975 | static void |
| 19976 | elf32_arm_swap_symbol_out (bfd *abfd, |
| 19977 | const Elf_Internal_Sym *src, |
| 19978 | void *cdst, |
| 19979 | void *shndx) |
| 19980 | { |
| 19981 | Elf_Internal_Sym newsym; |
| 19982 | |
| 19983 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit |
| 19984 | of the address set, as per the new EABI. We do this unconditionally |
| 19985 | because objcopy does not set the elf header flags until after |
| 19986 | it writes out the symbol table. */ |
| 19987 | if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB) |
| 19988 | { |
| 19989 | newsym = *src; |
| 19990 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
| 19991 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); |
| 19992 | if (newsym.st_shndx != SHN_UNDEF) |
| 19993 | { |
| 19994 | /* Do this only for defined symbols. At link type, the static |
| 19995 | linker will simulate the work of dynamic linker of resolving |
| 19996 | symbols and will carry over the thumbness of found symbols to |
| 19997 | the output symbol table. It's not clear how it happens, but |
| 19998 | the thumbness of undefined symbols can well be different at |
| 19999 | runtime, and writing '1' for them will be confusing for users |
| 20000 | and possibly for dynamic linker itself. |
| 20001 | */ |
| 20002 | newsym.st_value |= 1; |
| 20003 | } |
| 20004 | |
| 20005 | src = &newsym; |
| 20006 | } |
| 20007 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); |
| 20008 | } |
| 20009 | |
| 20010 | /* Add the PT_ARM_EXIDX program header. */ |
| 20011 | |
| 20012 | static bfd_boolean |
| 20013 | elf32_arm_modify_segment_map (bfd *abfd, |
| 20014 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
| 20015 | { |
| 20016 | struct elf_segment_map *m; |
| 20017 | asection *sec; |
| 20018 | |
| 20019 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); |
| 20020 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) |
| 20021 | { |
| 20022 | /* If there is already a PT_ARM_EXIDX header, then we do not |
| 20023 | want to add another one. This situation arises when running |
| 20024 | "strip"; the input binary already has the header. */ |
| 20025 | m = elf_seg_map (abfd); |
| 20026 | while (m && m->p_type != PT_ARM_EXIDX) |
| 20027 | m = m->next; |
| 20028 | if (!m) |
| 20029 | { |
| 20030 | m = (struct elf_segment_map *) |
| 20031 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); |
| 20032 | if (m == NULL) |
| 20033 | return FALSE; |
| 20034 | m->p_type = PT_ARM_EXIDX; |
| 20035 | m->count = 1; |
| 20036 | m->sections[0] = sec; |
| 20037 | |
| 20038 | m->next = elf_seg_map (abfd); |
| 20039 | elf_seg_map (abfd) = m; |
| 20040 | } |
| 20041 | } |
| 20042 | |
| 20043 | return TRUE; |
| 20044 | } |
| 20045 | |
| 20046 | /* We may add a PT_ARM_EXIDX program header. */ |
| 20047 | |
| 20048 | static int |
| 20049 | elf32_arm_additional_program_headers (bfd *abfd, |
| 20050 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
| 20051 | { |
| 20052 | asection *sec; |
| 20053 | |
| 20054 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); |
| 20055 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) |
| 20056 | return 1; |
| 20057 | else |
| 20058 | return 0; |
| 20059 | } |
| 20060 | |
| 20061 | /* Hook called by the linker routine which adds symbols from an object |
| 20062 | file. */ |
| 20063 | |
| 20064 | static bfd_boolean |
| 20065 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, |
| 20066 | Elf_Internal_Sym *sym, const char **namep, |
| 20067 | flagword *flagsp, asection **secp, bfd_vma *valp) |
| 20068 | { |
| 20069 | if (elf32_arm_hash_table (info) == NULL) |
| 20070 | return FALSE; |
| 20071 | |
| 20072 | if (elf32_arm_hash_table (info)->vxworks_p |
| 20073 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, |
| 20074 | flagsp, secp, valp)) |
| 20075 | return FALSE; |
| 20076 | |
| 20077 | return TRUE; |
| 20078 | } |
| 20079 | |
| 20080 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
| 20081 | const struct elf_size_info elf32_arm_size_info = |
| 20082 | { |
| 20083 | sizeof (Elf32_External_Ehdr), |
| 20084 | sizeof (Elf32_External_Phdr), |
| 20085 | sizeof (Elf32_External_Shdr), |
| 20086 | sizeof (Elf32_External_Rel), |
| 20087 | sizeof (Elf32_External_Rela), |
| 20088 | sizeof (Elf32_External_Sym), |
| 20089 | sizeof (Elf32_External_Dyn), |
| 20090 | sizeof (Elf_External_Note), |
| 20091 | 4, |
| 20092 | 1, |
| 20093 | 32, 2, |
| 20094 | ELFCLASS32, EV_CURRENT, |
| 20095 | bfd_elf32_write_out_phdrs, |
| 20096 | bfd_elf32_write_shdrs_and_ehdr, |
| 20097 | bfd_elf32_checksum_contents, |
| 20098 | bfd_elf32_write_relocs, |
| 20099 | elf32_arm_swap_symbol_in, |
| 20100 | elf32_arm_swap_symbol_out, |
| 20101 | bfd_elf32_slurp_reloc_table, |
| 20102 | bfd_elf32_slurp_symbol_table, |
| 20103 | bfd_elf32_swap_dyn_in, |
| 20104 | bfd_elf32_swap_dyn_out, |
| 20105 | bfd_elf32_swap_reloc_in, |
| 20106 | bfd_elf32_swap_reloc_out, |
| 20107 | bfd_elf32_swap_reloca_in, |
| 20108 | bfd_elf32_swap_reloca_out |
| 20109 | }; |
| 20110 | |
| 20111 | static bfd_vma |
| 20112 | read_code32 (const bfd *abfd, const bfd_byte *addr) |
| 20113 | { |
| 20114 | /* V7 BE8 code is always little endian. */ |
| 20115 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) |
| 20116 | return bfd_getl32 (addr); |
| 20117 | |
| 20118 | return bfd_get_32 (abfd, addr); |
| 20119 | } |
| 20120 | |
| 20121 | static bfd_vma |
| 20122 | read_code16 (const bfd *abfd, const bfd_byte *addr) |
| 20123 | { |
| 20124 | /* V7 BE8 code is always little endian. */ |
| 20125 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) |
| 20126 | return bfd_getl16 (addr); |
| 20127 | |
| 20128 | return bfd_get_16 (abfd, addr); |
| 20129 | } |
| 20130 | |
| 20131 | /* Return size of plt0 entry starting at ADDR |
| 20132 | or (bfd_vma) -1 if size can not be determined. */ |
| 20133 | |
| 20134 | static bfd_vma |
| 20135 | elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr) |
| 20136 | { |
| 20137 | bfd_vma first_word; |
| 20138 | bfd_vma plt0_size; |
| 20139 | |
| 20140 | first_word = read_code32 (abfd, addr); |
| 20141 | |
| 20142 | if (first_word == elf32_arm_plt0_entry[0]) |
| 20143 | plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry); |
| 20144 | else if (first_word == elf32_thumb2_plt0_entry[0]) |
| 20145 | plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); |
| 20146 | else |
| 20147 | /* We don't yet handle this PLT format. */ |
| 20148 | return (bfd_vma) -1; |
| 20149 | |
| 20150 | return plt0_size; |
| 20151 | } |
| 20152 | |
| 20153 | /* Return size of plt entry starting at offset OFFSET |
| 20154 | of plt section located at address START |
| 20155 | or (bfd_vma) -1 if size can not be determined. */ |
| 20156 | |
| 20157 | static bfd_vma |
| 20158 | elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset) |
| 20159 | { |
| 20160 | bfd_vma first_insn; |
| 20161 | bfd_vma plt_size = 0; |
| 20162 | const bfd_byte *addr = start + offset; |
| 20163 | |
| 20164 | /* PLT entry size if fixed on Thumb-only platforms. */ |
| 20165 | if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0]) |
| 20166 | return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); |
| 20167 | |
| 20168 | /* Respect Thumb stub if necessary. */ |
| 20169 | if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0]) |
| 20170 | { |
| 20171 | plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub); |
| 20172 | } |
| 20173 | |
| 20174 | /* Strip immediate from first add. */ |
| 20175 | first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00; |
| 20176 | |
| 20177 | #ifdef FOUR_WORD_PLT |
| 20178 | if (first_insn == elf32_arm_plt_entry[0]) |
| 20179 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry); |
| 20180 | #else |
| 20181 | if (first_insn == elf32_arm_plt_entry_long[0]) |
| 20182 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long); |
| 20183 | else if (first_insn == elf32_arm_plt_entry_short[0]) |
| 20184 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short); |
| 20185 | #endif |
| 20186 | else |
| 20187 | /* We don't yet handle this PLT format. */ |
| 20188 | return (bfd_vma) -1; |
| 20189 | |
| 20190 | return plt_size; |
| 20191 | } |
| 20192 | |
| 20193 | /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */ |
| 20194 | |
| 20195 | static long |
| 20196 | elf32_arm_get_synthetic_symtab (bfd *abfd, |
| 20197 | long symcount ATTRIBUTE_UNUSED, |
| 20198 | asymbol **syms ATTRIBUTE_UNUSED, |
| 20199 | long dynsymcount, |
| 20200 | asymbol **dynsyms, |
| 20201 | asymbol **ret) |
| 20202 | { |
| 20203 | asection *relplt; |
| 20204 | asymbol *s; |
| 20205 | arelent *p; |
| 20206 | long count, i, n; |
| 20207 | size_t size; |
| 20208 | Elf_Internal_Shdr *hdr; |
| 20209 | char *names; |
| 20210 | asection *plt; |
| 20211 | bfd_vma offset; |
| 20212 | bfd_byte *data; |
| 20213 | |
| 20214 | *ret = NULL; |
| 20215 | |
| 20216 | if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0) |
| 20217 | return 0; |
| 20218 | |
| 20219 | if (dynsymcount <= 0) |
| 20220 | return 0; |
| 20221 | |
| 20222 | relplt = bfd_get_section_by_name (abfd, ".rel.plt"); |
| 20223 | if (relplt == NULL) |
| 20224 | return 0; |
| 20225 | |
| 20226 | hdr = &elf_section_data (relplt)->this_hdr; |
| 20227 | if (hdr->sh_link != elf_dynsymtab (abfd) |
| 20228 | || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA)) |
| 20229 | return 0; |
| 20230 | |
| 20231 | plt = bfd_get_section_by_name (abfd, ".plt"); |
| 20232 | if (plt == NULL) |
| 20233 | return 0; |
| 20234 | |
| 20235 | if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE)) |
| 20236 | return -1; |
| 20237 | |
| 20238 | data = plt->contents; |
| 20239 | if (data == NULL) |
| 20240 | { |
| 20241 | if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL) |
| 20242 | return -1; |
| 20243 | bfd_cache_section_contents((asection *) plt, data); |
| 20244 | } |
| 20245 | |
| 20246 | count = relplt->size / hdr->sh_entsize; |
| 20247 | size = count * sizeof (asymbol); |
| 20248 | p = relplt->relocation; |
| 20249 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) |
| 20250 | { |
| 20251 | size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt"); |
| 20252 | if (p->addend != 0) |
| 20253 | size += sizeof ("+0x") - 1 + 8; |
| 20254 | } |
| 20255 | |
| 20256 | s = *ret = (asymbol *) bfd_malloc (size); |
| 20257 | if (s == NULL) |
| 20258 | return -1; |
| 20259 | |
| 20260 | offset = elf32_arm_plt0_size (abfd, data); |
| 20261 | if (offset == (bfd_vma) -1) |
| 20262 | return -1; |
| 20263 | |
| 20264 | names = (char *) (s + count); |
| 20265 | p = relplt->relocation; |
| 20266 | n = 0; |
| 20267 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) |
| 20268 | { |
| 20269 | size_t len; |
| 20270 | |
| 20271 | bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset); |
| 20272 | if (plt_size == (bfd_vma) -1) |
| 20273 | break; |
| 20274 | |
| 20275 | *s = **p->sym_ptr_ptr; |
| 20276 | /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since |
| 20277 | we are defining a symbol, ensure one of them is set. */ |
| 20278 | if ((s->flags & BSF_LOCAL) == 0) |
| 20279 | s->flags |= BSF_GLOBAL; |
| 20280 | s->flags |= BSF_SYNTHETIC; |
| 20281 | s->section = plt; |
| 20282 | s->value = offset; |
| 20283 | s->name = names; |
| 20284 | s->udata.p = NULL; |
| 20285 | len = strlen ((*p->sym_ptr_ptr)->name); |
| 20286 | memcpy (names, (*p->sym_ptr_ptr)->name, len); |
| 20287 | names += len; |
| 20288 | if (p->addend != 0) |
| 20289 | { |
| 20290 | char buf[30], *a; |
| 20291 | |
| 20292 | memcpy (names, "+0x", sizeof ("+0x") - 1); |
| 20293 | names += sizeof ("+0x") - 1; |
| 20294 | bfd_sprintf_vma (abfd, buf, p->addend); |
| 20295 | for (a = buf; *a == '0'; ++a) |
| 20296 | ; |
| 20297 | len = strlen (a); |
| 20298 | memcpy (names, a, len); |
| 20299 | names += len; |
| 20300 | } |
| 20301 | memcpy (names, "@plt", sizeof ("@plt")); |
| 20302 | names += sizeof ("@plt"); |
| 20303 | ++s, ++n; |
| 20304 | offset += plt_size; |
| 20305 | } |
| 20306 | |
| 20307 | return n; |
| 20308 | } |
| 20309 | |
| 20310 | static bfd_boolean |
| 20311 | elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr) |
| 20312 | { |
| 20313 | if (hdr->sh_flags & SHF_ARM_PURECODE) |
| 20314 | *flags |= SEC_ELF_PURECODE; |
| 20315 | return TRUE; |
| 20316 | } |
| 20317 | |
| 20318 | static flagword |
| 20319 | elf32_arm_lookup_section_flags (char *flag_name) |
| 20320 | { |
| 20321 | if (!strcmp (flag_name, "SHF_ARM_PURECODE")) |
| 20322 | return SHF_ARM_PURECODE; |
| 20323 | |
| 20324 | return SEC_NO_FLAGS; |
| 20325 | } |
| 20326 | |
| 20327 | static unsigned int |
| 20328 | elf32_arm_count_additional_relocs (asection *sec) |
| 20329 | { |
| 20330 | struct _arm_elf_section_data *arm_data; |
| 20331 | arm_data = get_arm_elf_section_data (sec); |
| 20332 | |
| 20333 | return arm_data == NULL ? 0 : arm_data->additional_reloc_count; |
| 20334 | } |
| 20335 | |
| 20336 | /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which |
| 20337 | has a type >= SHT_LOOS. Returns TRUE if these fields were initialised |
| 20338 | FALSE otherwise. ISECTION is the best guess matching section from the |
| 20339 | input bfd IBFD, but it might be NULL. */ |
| 20340 | |
| 20341 | static bfd_boolean |
| 20342 | elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED, |
| 20343 | bfd *obfd ATTRIBUTE_UNUSED, |
| 20344 | const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED, |
| 20345 | Elf_Internal_Shdr *osection) |
| 20346 | { |
| 20347 | switch (osection->sh_type) |
| 20348 | { |
| 20349 | case SHT_ARM_EXIDX: |
| 20350 | { |
| 20351 | Elf_Internal_Shdr **oheaders = elf_elfsections (obfd); |
| 20352 | Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd); |
| 20353 | unsigned i = 0; |
| 20354 | |
| 20355 | osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER; |
| 20356 | osection->sh_info = 0; |
| 20357 | |
| 20358 | /* The sh_link field must be set to the text section associated with |
| 20359 | this index section. Unfortunately the ARM EHABI does not specify |
| 20360 | exactly how to determine this association. Our caller does try |
| 20361 | to match up OSECTION with its corresponding input section however |
| 20362 | so that is a good first guess. */ |
| 20363 | if (isection != NULL |
| 20364 | && osection->bfd_section != NULL |
| 20365 | && isection->bfd_section != NULL |
| 20366 | && isection->bfd_section->output_section != NULL |
| 20367 | && isection->bfd_section->output_section == osection->bfd_section |
| 20368 | && iheaders != NULL |
| 20369 | && isection->sh_link > 0 |
| 20370 | && isection->sh_link < elf_numsections (ibfd) |
| 20371 | && iheaders[isection->sh_link]->bfd_section != NULL |
| 20372 | && iheaders[isection->sh_link]->bfd_section->output_section != NULL |
| 20373 | ) |
| 20374 | { |
| 20375 | for (i = elf_numsections (obfd); i-- > 0;) |
| 20376 | if (oheaders[i]->bfd_section |
| 20377 | == iheaders[isection->sh_link]->bfd_section->output_section) |
| 20378 | break; |
| 20379 | } |
| 20380 | |
| 20381 | if (i == 0) |
| 20382 | { |
| 20383 | /* Failing that we have to find a matching section ourselves. If |
| 20384 | we had the output section name available we could compare that |
| 20385 | with input section names. Unfortunately we don't. So instead |
| 20386 | we use a simple heuristic and look for the nearest executable |
| 20387 | section before this one. */ |
| 20388 | for (i = elf_numsections (obfd); i-- > 0;) |
| 20389 | if (oheaders[i] == osection) |
| 20390 | break; |
| 20391 | if (i == 0) |
| 20392 | break; |
| 20393 | |
| 20394 | while (i-- > 0) |
| 20395 | if (oheaders[i]->sh_type == SHT_PROGBITS |
| 20396 | && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR)) |
| 20397 | == (SHF_ALLOC | SHF_EXECINSTR)) |
| 20398 | break; |
| 20399 | } |
| 20400 | |
| 20401 | if (i) |
| 20402 | { |
| 20403 | osection->sh_link = i; |
| 20404 | /* If the text section was part of a group |
| 20405 | then the index section should be too. */ |
| 20406 | if (oheaders[i]->sh_flags & SHF_GROUP) |
| 20407 | osection->sh_flags |= SHF_GROUP; |
| 20408 | return TRUE; |
| 20409 | } |
| 20410 | } |
| 20411 | break; |
| 20412 | |
| 20413 | case SHT_ARM_PREEMPTMAP: |
| 20414 | osection->sh_flags = SHF_ALLOC; |
| 20415 | break; |
| 20416 | |
| 20417 | case SHT_ARM_ATTRIBUTES: |
| 20418 | case SHT_ARM_DEBUGOVERLAY: |
| 20419 | case SHT_ARM_OVERLAYSECTION: |
| 20420 | default: |
| 20421 | break; |
| 20422 | } |
| 20423 | |
| 20424 | return FALSE; |
| 20425 | } |
| 20426 | |
| 20427 | /* Returns TRUE if NAME is an ARM mapping symbol. |
| 20428 | Traditionally the symbols $a, $d and $t have been used. |
| 20429 | The ARM ELF standard also defines $x (for A64 code). It also allows a |
| 20430 | period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+". |
| 20431 | Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do |
| 20432 | not support them here. $t.x indicates the start of ThumbEE instructions. */ |
| 20433 | |
| 20434 | static bfd_boolean |
| 20435 | is_arm_mapping_symbol (const char * name) |
| 20436 | { |
| 20437 | return name != NULL /* Paranoia. */ |
| 20438 | && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then |
| 20439 | the mapping symbols could have acquired a prefix. |
| 20440 | We do not support this here, since such symbols no |
| 20441 | longer conform to the ARM ELF ABI. */ |
| 20442 | && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x') |
| 20443 | && (name[2] == 0 || name[2] == '.'); |
| 20444 | /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if |
| 20445 | any characters that follow the period are legal characters for the body |
| 20446 | of a symbol's name. For now we just assume that this is the case. */ |
| 20447 | } |
| 20448 | |
| 20449 | /* Make sure that mapping symbols in object files are not removed via the |
| 20450 | "strip --strip-unneeded" tool. These symbols are needed in order to |
| 20451 | correctly generate interworking veneers, and for byte swapping code |
| 20452 | regions. Once an object file has been linked, it is safe to remove the |
| 20453 | symbols as they will no longer be needed. */ |
| 20454 | |
| 20455 | static void |
| 20456 | elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym) |
| 20457 | { |
| 20458 | if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0) |
| 20459 | && sym->section != bfd_abs_section_ptr |
| 20460 | && is_arm_mapping_symbol (sym->name)) |
| 20461 | sym->flags |= BSF_KEEP; |
| 20462 | } |
| 20463 | |
| 20464 | #undef elf_backend_copy_special_section_fields |
| 20465 | #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields |
| 20466 | |
| 20467 | #define ELF_ARCH bfd_arch_arm |
| 20468 | #define ELF_TARGET_ID ARM_ELF_DATA |
| 20469 | #define ELF_MACHINE_CODE EM_ARM |
| 20470 | #ifdef __QNXTARGET__ |
| 20471 | #define ELF_MAXPAGESIZE 0x1000 |
| 20472 | #else |
| 20473 | #define ELF_MAXPAGESIZE 0x10000 |
| 20474 | #endif |
| 20475 | #define ELF_MINPAGESIZE 0x1000 |
| 20476 | #define ELF_COMMONPAGESIZE 0x1000 |
| 20477 | |
| 20478 | #define bfd_elf32_mkobject elf32_arm_mkobject |
| 20479 | |
| 20480 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
| 20481 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data |
| 20482 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
| 20483 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data |
| 20484 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create |
| 20485 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
| 20486 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
| 20487 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
| 20488 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
| 20489 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
| 20490 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
| 20491 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
| 20492 | #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab |
| 20493 | |
| 20494 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type |
| 20495 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook |
| 20496 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
| 20497 | #define elf_backend_check_relocs elf32_arm_check_relocs |
| 20498 | #define elf_backend_update_relocs elf32_arm_update_relocs |
| 20499 | #define elf_backend_relocate_section elf32_arm_relocate_section |
| 20500 | #define elf_backend_write_section elf32_arm_write_section |
| 20501 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
| 20502 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
| 20503 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
| 20504 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections |
| 20505 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections |
| 20506 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
| 20507 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
| 20508 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
| 20509 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
| 20510 | #define elf_backend_object_p elf32_arm_object_p |
| 20511 | #define elf_backend_fake_sections elf32_arm_fake_sections |
| 20512 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr |
| 20513 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
| 20514 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol |
| 20515 | #define elf_backend_size_info elf32_arm_size_info |
| 20516 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
| 20517 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
| 20518 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms |
| 20519 | #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols |
| 20520 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing |
| 20521 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
| 20522 | #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs |
| 20523 | #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing |
| 20524 | |
| 20525 | #define elf_backend_can_refcount 1 |
| 20526 | #define elf_backend_can_gc_sections 1 |
| 20527 | #define elf_backend_plt_readonly 1 |
| 20528 | #define elf_backend_want_got_plt 1 |
| 20529 | #define elf_backend_want_plt_sym 0 |
| 20530 | #define elf_backend_want_dynrelro 1 |
| 20531 | #define elf_backend_may_use_rel_p 1 |
| 20532 | #define elf_backend_may_use_rela_p 0 |
| 20533 | #define elf_backend_default_use_rela_p 0 |
| 20534 | #define elf_backend_dtrel_excludes_plt 1 |
| 20535 | |
| 20536 | #define elf_backend_got_header_size 12 |
| 20537 | #define elf_backend_extern_protected_data 1 |
| 20538 | |
| 20539 | #undef elf_backend_obj_attrs_vendor |
| 20540 | #define elf_backend_obj_attrs_vendor "aeabi" |
| 20541 | #undef elf_backend_obj_attrs_section |
| 20542 | #define elf_backend_obj_attrs_section ".ARM.attributes" |
| 20543 | #undef elf_backend_obj_attrs_arg_type |
| 20544 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type |
| 20545 | #undef elf_backend_obj_attrs_section_type |
| 20546 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
| 20547 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
| 20548 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown |
| 20549 | |
| 20550 | #undef elf_backend_section_flags |
| 20551 | #define elf_backend_section_flags elf32_arm_section_flags |
| 20552 | #undef elf_backend_lookup_section_flags_hook |
| 20553 | #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags |
| 20554 | |
| 20555 | #define elf_backend_linux_prpsinfo32_ugid16 TRUE |
| 20556 | |
| 20557 | #include "elf32-target.h" |
| 20558 | |
| 20559 | /* Native Client targets. */ |
| 20560 | |
| 20561 | #undef TARGET_LITTLE_SYM |
| 20562 | #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec |
| 20563 | #undef TARGET_LITTLE_NAME |
| 20564 | #define TARGET_LITTLE_NAME "elf32-littlearm-nacl" |
| 20565 | #undef TARGET_BIG_SYM |
| 20566 | #define TARGET_BIG_SYM arm_elf32_nacl_be_vec |
| 20567 | #undef TARGET_BIG_NAME |
| 20568 | #define TARGET_BIG_NAME "elf32-bigarm-nacl" |
| 20569 | |
| 20570 | /* Like elf32_arm_link_hash_table_create -- but overrides |
| 20571 | appropriately for NaCl. */ |
| 20572 | |
| 20573 | static struct bfd_link_hash_table * |
| 20574 | elf32_arm_nacl_link_hash_table_create (bfd *abfd) |
| 20575 | { |
| 20576 | struct bfd_link_hash_table *ret; |
| 20577 | |
| 20578 | ret = elf32_arm_link_hash_table_create (abfd); |
| 20579 | if (ret) |
| 20580 | { |
| 20581 | struct elf32_arm_link_hash_table *htab |
| 20582 | = (struct elf32_arm_link_hash_table *) ret; |
| 20583 | |
| 20584 | htab->nacl_p = 1; |
| 20585 | |
| 20586 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry); |
| 20587 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry); |
| 20588 | } |
| 20589 | return ret; |
| 20590 | } |
| 20591 | |
| 20592 | /* Since NaCl doesn't use the ARM-specific unwind format, we don't |
| 20593 | really need to use elf32_arm_modify_segment_map. But we do it |
| 20594 | anyway just to reduce gratuitous differences with the stock ARM backend. */ |
| 20595 | |
| 20596 | static bfd_boolean |
| 20597 | elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info) |
| 20598 | { |
| 20599 | return (elf32_arm_modify_segment_map (abfd, info) |
| 20600 | && nacl_modify_segment_map (abfd, info)); |
| 20601 | } |
| 20602 | |
| 20603 | static bfd_boolean |
| 20604 | elf32_arm_nacl_final_write_processing (bfd *abfd) |
| 20605 | { |
| 20606 | arm_final_write_processing (abfd); |
| 20607 | return nacl_final_write_processing (abfd); |
| 20608 | } |
| 20609 | |
| 20610 | static bfd_vma |
| 20611 | elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt, |
| 20612 | const arelent *rel ATTRIBUTE_UNUSED) |
| 20613 | { |
| 20614 | return plt->vma |
| 20615 | + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) + |
| 20616 | i * ARRAY_SIZE (elf32_arm_nacl_plt_entry)); |
| 20617 | } |
| 20618 | |
| 20619 | #undef elf32_bed |
| 20620 | #define elf32_bed elf32_arm_nacl_bed |
| 20621 | #undef bfd_elf32_bfd_link_hash_table_create |
| 20622 | #define bfd_elf32_bfd_link_hash_table_create \ |
| 20623 | elf32_arm_nacl_link_hash_table_create |
| 20624 | #undef elf_backend_plt_alignment |
| 20625 | #define elf_backend_plt_alignment 4 |
| 20626 | #undef elf_backend_modify_segment_map |
| 20627 | #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map |
| 20628 | #undef elf_backend_modify_program_headers |
| 20629 | #define elf_backend_modify_program_headers nacl_modify_program_headers |
| 20630 | #undef elf_backend_final_write_processing |
| 20631 | #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing |
| 20632 | #undef bfd_elf32_get_synthetic_symtab |
| 20633 | #undef elf_backend_plt_sym_val |
| 20634 | #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val |
| 20635 | #undef elf_backend_copy_special_section_fields |
| 20636 | |
| 20637 | #undef ELF_MINPAGESIZE |
| 20638 | #undef ELF_COMMONPAGESIZE |
| 20639 | |
| 20640 | |
| 20641 | #include "elf32-target.h" |
| 20642 | |
| 20643 | /* Reset to defaults. */ |
| 20644 | #undef elf_backend_plt_alignment |
| 20645 | #undef elf_backend_modify_segment_map |
| 20646 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
| 20647 | #undef elf_backend_modify_program_headers |
| 20648 | #undef elf_backend_final_write_processing |
| 20649 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
| 20650 | #undef ELF_MINPAGESIZE |
| 20651 | #define ELF_MINPAGESIZE 0x1000 |
| 20652 | #undef ELF_COMMONPAGESIZE |
| 20653 | #define ELF_COMMONPAGESIZE 0x1000 |
| 20654 | |
| 20655 | |
| 20656 | /* FDPIC Targets. */ |
| 20657 | |
| 20658 | #undef TARGET_LITTLE_SYM |
| 20659 | #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec |
| 20660 | #undef TARGET_LITTLE_NAME |
| 20661 | #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic" |
| 20662 | #undef TARGET_BIG_SYM |
| 20663 | #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec |
| 20664 | #undef TARGET_BIG_NAME |
| 20665 | #define TARGET_BIG_NAME "elf32-bigarm-fdpic" |
| 20666 | #undef elf_match_priority |
| 20667 | #define elf_match_priority 128 |
| 20668 | #undef ELF_OSABI |
| 20669 | #define ELF_OSABI ELFOSABI_ARM_FDPIC |
| 20670 | |
| 20671 | /* Like elf32_arm_link_hash_table_create -- but overrides |
| 20672 | appropriately for FDPIC. */ |
| 20673 | |
| 20674 | static struct bfd_link_hash_table * |
| 20675 | elf32_arm_fdpic_link_hash_table_create (bfd *abfd) |
| 20676 | { |
| 20677 | struct bfd_link_hash_table *ret; |
| 20678 | |
| 20679 | ret = elf32_arm_link_hash_table_create (abfd); |
| 20680 | if (ret) |
| 20681 | { |
| 20682 | struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret; |
| 20683 | |
| 20684 | htab->fdpic_p = 1; |
| 20685 | } |
| 20686 | return ret; |
| 20687 | } |
| 20688 | |
| 20689 | /* We need dynamic symbols for every section, since segments can |
| 20690 | relocate independently. */ |
| 20691 | static bfd_boolean |
| 20692 | elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED, |
| 20693 | struct bfd_link_info *info |
| 20694 | ATTRIBUTE_UNUSED, |
| 20695 | asection *p ATTRIBUTE_UNUSED) |
| 20696 | { |
| 20697 | switch (elf_section_data (p)->this_hdr.sh_type) |
| 20698 | { |
| 20699 | case SHT_PROGBITS: |
| 20700 | case SHT_NOBITS: |
| 20701 | /* If sh_type is yet undecided, assume it could be |
| 20702 | SHT_PROGBITS/SHT_NOBITS. */ |
| 20703 | case SHT_NULL: |
| 20704 | return FALSE; |
| 20705 | |
| 20706 | /* There shouldn't be section relative relocations |
| 20707 | against any other section. */ |
| 20708 | default: |
| 20709 | return TRUE; |
| 20710 | } |
| 20711 | } |
| 20712 | |
| 20713 | #undef elf32_bed |
| 20714 | #define elf32_bed elf32_arm_fdpic_bed |
| 20715 | |
| 20716 | #undef bfd_elf32_bfd_link_hash_table_create |
| 20717 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create |
| 20718 | |
| 20719 | #undef elf_backend_omit_section_dynsym |
| 20720 | #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym |
| 20721 | |
| 20722 | #include "elf32-target.h" |
| 20723 | |
| 20724 | #undef elf_match_priority |
| 20725 | #undef ELF_OSABI |
| 20726 | #undef elf_backend_omit_section_dynsym |
| 20727 | |
| 20728 | /* VxWorks Targets. */ |
| 20729 | |
| 20730 | #undef TARGET_LITTLE_SYM |
| 20731 | #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec |
| 20732 | #undef TARGET_LITTLE_NAME |
| 20733 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" |
| 20734 | #undef TARGET_BIG_SYM |
| 20735 | #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec |
| 20736 | #undef TARGET_BIG_NAME |
| 20737 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" |
| 20738 | |
| 20739 | /* Like elf32_arm_link_hash_table_create -- but overrides |
| 20740 | appropriately for VxWorks. */ |
| 20741 | |
| 20742 | static struct bfd_link_hash_table * |
| 20743 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) |
| 20744 | { |
| 20745 | struct bfd_link_hash_table *ret; |
| 20746 | |
| 20747 | ret = elf32_arm_link_hash_table_create (abfd); |
| 20748 | if (ret) |
| 20749 | { |
| 20750 | struct elf32_arm_link_hash_table *htab |
| 20751 | = (struct elf32_arm_link_hash_table *) ret; |
| 20752 | htab->use_rel = 0; |
| 20753 | htab->vxworks_p = 1; |
| 20754 | } |
| 20755 | return ret; |
| 20756 | } |
| 20757 | |
| 20758 | static bfd_boolean |
| 20759 | elf32_arm_vxworks_final_write_processing (bfd *abfd) |
| 20760 | { |
| 20761 | arm_final_write_processing (abfd); |
| 20762 | return elf_vxworks_final_write_processing (abfd); |
| 20763 | } |
| 20764 | |
| 20765 | #undef elf32_bed |
| 20766 | #define elf32_bed elf32_arm_vxworks_bed |
| 20767 | |
| 20768 | #undef bfd_elf32_bfd_link_hash_table_create |
| 20769 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create |
| 20770 | #undef elf_backend_final_write_processing |
| 20771 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing |
| 20772 | #undef elf_backend_emit_relocs |
| 20773 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs |
| 20774 | |
| 20775 | #undef elf_backend_may_use_rel_p |
| 20776 | #define elf_backend_may_use_rel_p 0 |
| 20777 | #undef elf_backend_may_use_rela_p |
| 20778 | #define elf_backend_may_use_rela_p 1 |
| 20779 | #undef elf_backend_default_use_rela_p |
| 20780 | #define elf_backend_default_use_rela_p 1 |
| 20781 | #undef elf_backend_want_plt_sym |
| 20782 | #define elf_backend_want_plt_sym 1 |
| 20783 | #undef ELF_MAXPAGESIZE |
| 20784 | #define ELF_MAXPAGESIZE 0x1000 |
| 20785 | |
| 20786 | #include "elf32-target.h" |
| 20787 | |
| 20788 | |
| 20789 | /* Merge backend specific data from an object file to the output |
| 20790 | object file when linking. */ |
| 20791 | |
| 20792 | static bfd_boolean |
| 20793 | elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
| 20794 | { |
| 20795 | bfd *obfd = info->output_bfd; |
| 20796 | flagword out_flags; |
| 20797 | flagword in_flags; |
| 20798 | bfd_boolean flags_compatible = TRUE; |
| 20799 | asection *sec; |
| 20800 | |
| 20801 | /* Check if we have the same endianness. */ |
| 20802 | if (! _bfd_generic_verify_endian_match (ibfd, info)) |
| 20803 | return FALSE; |
| 20804 | |
| 20805 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
| 20806 | return TRUE; |
| 20807 | |
| 20808 | if (!elf32_arm_merge_eabi_attributes (ibfd, info)) |
| 20809 | return FALSE; |
| 20810 | |
| 20811 | /* The input BFD must have had its flags initialised. */ |
| 20812 | /* The following seems bogus to me -- The flags are initialized in |
| 20813 | the assembler but I don't think an elf_flags_init field is |
| 20814 | written into the object. */ |
| 20815 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ |
| 20816 | |
| 20817 | in_flags = elf_elfheader (ibfd)->e_flags; |
| 20818 | out_flags = elf_elfheader (obfd)->e_flags; |
| 20819 | |
| 20820 | /* In theory there is no reason why we couldn't handle this. However |
| 20821 | in practice it isn't even close to working and there is no real |
| 20822 | reason to want it. */ |
| 20823 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 |
| 20824 | && !(ibfd->flags & DYNAMIC) |
| 20825 | && (in_flags & EF_ARM_BE8)) |
| 20826 | { |
| 20827 | _bfd_error_handler (_("error: %pB is already in final BE8 format"), |
| 20828 | ibfd); |
| 20829 | return FALSE; |
| 20830 | } |
| 20831 | |
| 20832 | if (!elf_flags_init (obfd)) |
| 20833 | { |
| 20834 | /* If the input is the default architecture and had the default |
| 20835 | flags then do not bother setting the flags for the output |
| 20836 | architecture, instead allow future merges to do this. If no |
| 20837 | future merges ever set these flags then they will retain their |
| 20838 | uninitialised values, which surprise surprise, correspond |
| 20839 | to the default values. */ |
| 20840 | if (bfd_get_arch_info (ibfd)->the_default |
| 20841 | && elf_elfheader (ibfd)->e_flags == 0) |
| 20842 | return TRUE; |
| 20843 | |
| 20844 | elf_flags_init (obfd) = TRUE; |
| 20845 | elf_elfheader (obfd)->e_flags = in_flags; |
| 20846 | |
| 20847 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) |
| 20848 | && bfd_get_arch_info (obfd)->the_default) |
| 20849 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); |
| 20850 | |
| 20851 | return TRUE; |
| 20852 | } |
| 20853 | |
| 20854 | /* Determine what should happen if the input ARM architecture |
| 20855 | does not match the output ARM architecture. */ |
| 20856 | if (! bfd_arm_merge_machines (ibfd, obfd)) |
| 20857 | return FALSE; |
| 20858 | |
| 20859 | /* Identical flags must be compatible. */ |
| 20860 | if (in_flags == out_flags) |
| 20861 | return TRUE; |
| 20862 | |
| 20863 | /* Check to see if the input BFD actually contains any sections. If |
| 20864 | not, its flags may not have been initialised either, but it |
| 20865 | cannot actually cause any incompatiblity. Do not short-circuit |
| 20866 | dynamic objects; their section list may be emptied by |
| 20867 | elf_link_add_object_symbols. |
| 20868 | |
| 20869 | Also check to see if there are no code sections in the input. |
| 20870 | In this case there is no need to check for code specific flags. |
| 20871 | XXX - do we need to worry about floating-point format compatability |
| 20872 | in data sections ? */ |
| 20873 | if (!(ibfd->flags & DYNAMIC)) |
| 20874 | { |
| 20875 | bfd_boolean null_input_bfd = TRUE; |
| 20876 | bfd_boolean only_data_sections = TRUE; |
| 20877 | |
| 20878 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) |
| 20879 | { |
| 20880 | /* Ignore synthetic glue sections. */ |
| 20881 | if (strcmp (sec->name, ".glue_7") |
| 20882 | && strcmp (sec->name, ".glue_7t")) |
| 20883 | { |
| 20884 | if ((bfd_get_section_flags (ibfd, sec) |
| 20885 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) |
| 20886 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) |
| 20887 | only_data_sections = FALSE; |
| 20888 | |
| 20889 | null_input_bfd = FALSE; |
| 20890 | break; |
| 20891 | } |
| 20892 | } |
| 20893 | |
| 20894 | if (null_input_bfd || only_data_sections) |
| 20895 | return TRUE; |
| 20896 | } |
| 20897 | |
| 20898 | /* Complain about various flag mismatches. */ |
| 20899 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), |
| 20900 | EF_ARM_EABI_VERSION (out_flags))) |
| 20901 | { |
| 20902 | _bfd_error_handler |
| 20903 | (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"), |
| 20904 | ibfd, (in_flags & EF_ARM_EABIMASK) >> 24, |
| 20905 | obfd, (out_flags & EF_ARM_EABIMASK) >> 24); |
| 20906 | return FALSE; |
| 20907 | } |
| 20908 | |
| 20909 | /* Not sure what needs to be checked for EABI versions >= 1. */ |
| 20910 | /* VxWorks libraries do not use these flags. */ |
| 20911 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed |
| 20912 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed |
| 20913 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) |
| 20914 | { |
| 20915 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
| 20916 | { |
| 20917 | _bfd_error_handler |
| 20918 | (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"), |
| 20919 | ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32, |
| 20920 | obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32); |
| 20921 | flags_compatible = FALSE; |
| 20922 | } |
| 20923 | |
| 20924 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
| 20925 | { |
| 20926 | if (in_flags & EF_ARM_APCS_FLOAT) |
| 20927 | _bfd_error_handler |
| 20928 | (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"), |
| 20929 | ibfd, obfd); |
| 20930 | else |
| 20931 | _bfd_error_handler |
| 20932 | (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"), |
| 20933 | ibfd, obfd); |
| 20934 | |
| 20935 | flags_compatible = FALSE; |
| 20936 | } |
| 20937 | |
| 20938 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) |
| 20939 | { |
| 20940 | if (in_flags & EF_ARM_VFP_FLOAT) |
| 20941 | _bfd_error_handler |
| 20942 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
| 20943 | ibfd, "VFP", obfd); |
| 20944 | else |
| 20945 | _bfd_error_handler |
| 20946 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
| 20947 | ibfd, "FPA", obfd); |
| 20948 | |
| 20949 | flags_compatible = FALSE; |
| 20950 | } |
| 20951 | |
| 20952 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) |
| 20953 | { |
| 20954 | if (in_flags & EF_ARM_MAVERICK_FLOAT) |
| 20955 | _bfd_error_handler |
| 20956 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
| 20957 | ibfd, "Maverick", obfd); |
| 20958 | else |
| 20959 | _bfd_error_handler |
| 20960 | (_("error: %pB does not use %s instructions, whereas %pB does"), |
| 20961 | ibfd, "Maverick", obfd); |
| 20962 | |
| 20963 | flags_compatible = FALSE; |
| 20964 | } |
| 20965 | |
| 20966 | #ifdef EF_ARM_SOFT_FLOAT |
| 20967 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) |
| 20968 | { |
| 20969 | /* We can allow interworking between code that is VFP format |
| 20970 | layout, and uses either soft float or integer regs for |
| 20971 | passing floating point arguments and results. We already |
| 20972 | know that the APCS_FLOAT flags match; similarly for VFP |
| 20973 | flags. */ |
| 20974 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 |
| 20975 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) |
| 20976 | { |
| 20977 | if (in_flags & EF_ARM_SOFT_FLOAT) |
| 20978 | _bfd_error_handler |
| 20979 | (_("error: %pB uses software FP, whereas %pB uses hardware FP"), |
| 20980 | ibfd, obfd); |
| 20981 | else |
| 20982 | _bfd_error_handler |
| 20983 | (_("error: %pB uses hardware FP, whereas %pB uses software FP"), |
| 20984 | ibfd, obfd); |
| 20985 | |
| 20986 | flags_compatible = FALSE; |
| 20987 | } |
| 20988 | } |
| 20989 | #endif |
| 20990 | |
| 20991 | /* Interworking mismatch is only a warning. */ |
| 20992 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
| 20993 | { |
| 20994 | if (in_flags & EF_ARM_INTERWORK) |
| 20995 | { |
| 20996 | _bfd_error_handler |
| 20997 | (_("warning: %pB supports interworking, whereas %pB does not"), |
| 20998 | ibfd, obfd); |
| 20999 | } |
| 21000 | else |
| 21001 | { |
| 21002 | _bfd_error_handler |
| 21003 | (_("warning: %pB does not support interworking, whereas %pB does"), |
| 21004 | ibfd, obfd); |
| 21005 | } |
| 21006 | } |
| 21007 | } |
| 21008 | |
| 21009 | return flags_compatible; |
| 21010 | } |
| 21011 | |
| 21012 | |
| 21013 | /* Symbian OS Targets. */ |
| 21014 | |
| 21015 | #undef TARGET_LITTLE_SYM |
| 21016 | #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec |
| 21017 | #undef TARGET_LITTLE_NAME |
| 21018 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" |
| 21019 | #undef TARGET_BIG_SYM |
| 21020 | #define TARGET_BIG_SYM arm_elf32_symbian_be_vec |
| 21021 | #undef TARGET_BIG_NAME |
| 21022 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" |
| 21023 | |
| 21024 | /* Like elf32_arm_link_hash_table_create -- but overrides |
| 21025 | appropriately for Symbian OS. */ |
| 21026 | |
| 21027 | static struct bfd_link_hash_table * |
| 21028 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) |
| 21029 | { |
| 21030 | struct bfd_link_hash_table *ret; |
| 21031 | |
| 21032 | ret = elf32_arm_link_hash_table_create (abfd); |
| 21033 | if (ret) |
| 21034 | { |
| 21035 | struct elf32_arm_link_hash_table *htab |
| 21036 | = (struct elf32_arm_link_hash_table *)ret; |
| 21037 | /* There is no PLT header for Symbian OS. */ |
| 21038 | htab->plt_header_size = 0; |
| 21039 | /* The PLT entries are each one instruction and one word. */ |
| 21040 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); |
| 21041 | htab->symbian_p = 1; |
| 21042 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
| 21043 | htab->use_blx = 1; |
| 21044 | htab->root.is_relocatable_executable = 1; |
| 21045 | } |
| 21046 | return ret; |
| 21047 | } |
| 21048 | |
| 21049 | static const struct bfd_elf_special_section |
| 21050 | elf32_arm_symbian_special_sections[] = |
| 21051 | { |
| 21052 | /* In a BPABI executable, the dynamic linking sections do not go in |
| 21053 | the loadable read-only segment. The post-linker may wish to |
| 21054 | refer to these sections, but they are not part of the final |
| 21055 | program image. */ |
| 21056 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
| 21057 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, |
| 21058 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, |
| 21059 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, |
| 21060 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, |
| 21061 | /* These sections do not need to be writable as the SymbianOS |
| 21062 | postlinker will arrange things so that no dynamic relocation is |
| 21063 | required. */ |
| 21064 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
| 21065 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, |
| 21066 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, |
| 21067 | { NULL, 0, 0, 0, 0 } |
| 21068 | }; |
| 21069 | |
| 21070 | static void |
| 21071 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
| 21072 | struct bfd_link_info *link_info) |
| 21073 | { |
| 21074 | /* BPABI objects are never loaded directly by an OS kernel; they are |
| 21075 | processed by a postlinker first, into an OS-specific format. If |
| 21076 | the D_PAGED bit is set on the file, BFD will align segments on |
| 21077 | page boundaries, so that an OS can directly map the file. With |
| 21078 | BPABI objects, that just results in wasted space. In addition, |
| 21079 | because we clear the D_PAGED bit, map_sections_to_segments will |
| 21080 | recognize that the program headers should not be mapped into any |
| 21081 | loadable segment. */ |
| 21082 | abfd->flags &= ~D_PAGED; |
| 21083 | elf32_arm_begin_write_processing (abfd, link_info); |
| 21084 | } |
| 21085 | |
| 21086 | static bfd_boolean |
| 21087 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
| 21088 | struct bfd_link_info *info) |
| 21089 | { |
| 21090 | struct elf_segment_map *m; |
| 21091 | asection *dynsec; |
| 21092 | |
| 21093 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
| 21094 | segment. However, because the .dynamic section is not marked |
| 21095 | with SEC_LOAD, the generic ELF code will not create such a |
| 21096 | segment. */ |
| 21097 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); |
| 21098 | if (dynsec) |
| 21099 | { |
| 21100 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
| 21101 | if (m->p_type == PT_DYNAMIC) |
| 21102 | break; |
| 21103 | |
| 21104 | if (m == NULL) |
| 21105 | { |
| 21106 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); |
| 21107 | m->next = elf_seg_map (abfd); |
| 21108 | elf_seg_map (abfd) = m; |
| 21109 | } |
| 21110 | } |
| 21111 | |
| 21112 | /* Also call the generic arm routine. */ |
| 21113 | return elf32_arm_modify_segment_map (abfd, info); |
| 21114 | } |
| 21115 | |
| 21116 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
| 21117 | or (bfd_vma) -1 if it should not be included. */ |
| 21118 | |
| 21119 | static bfd_vma |
| 21120 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, |
| 21121 | const arelent *rel ATTRIBUTE_UNUSED) |
| 21122 | { |
| 21123 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; |
| 21124 | } |
| 21125 | |
| 21126 | #undef elf32_bed |
| 21127 | #define elf32_bed elf32_arm_symbian_bed |
| 21128 | |
| 21129 | /* The dynamic sections are not allocated on SymbianOS; the postlinker |
| 21130 | will process them and then discard them. */ |
| 21131 | #undef ELF_DYNAMIC_SEC_FLAGS |
| 21132 | #define ELF_DYNAMIC_SEC_FLAGS \ |
| 21133 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) |
| 21134 | |
| 21135 | #undef elf_backend_emit_relocs |
| 21136 | |
| 21137 | #undef bfd_elf32_bfd_link_hash_table_create |
| 21138 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create |
| 21139 | #undef elf_backend_special_sections |
| 21140 | #define elf_backend_special_sections elf32_arm_symbian_special_sections |
| 21141 | #undef elf_backend_begin_write_processing |
| 21142 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing |
| 21143 | #undef elf_backend_final_write_processing |
| 21144 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
| 21145 | |
| 21146 | #undef elf_backend_modify_segment_map |
| 21147 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
| 21148 | |
| 21149 | /* There is no .got section for BPABI objects, and hence no header. */ |
| 21150 | #undef elf_backend_got_header_size |
| 21151 | #define elf_backend_got_header_size 0 |
| 21152 | |
| 21153 | /* Similarly, there is no .got.plt section. */ |
| 21154 | #undef elf_backend_want_got_plt |
| 21155 | #define elf_backend_want_got_plt 0 |
| 21156 | |
| 21157 | #undef elf_backend_plt_sym_val |
| 21158 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
| 21159 | |
| 21160 | #undef elf_backend_may_use_rel_p |
| 21161 | #define elf_backend_may_use_rel_p 1 |
| 21162 | #undef elf_backend_may_use_rela_p |
| 21163 | #define elf_backend_may_use_rela_p 0 |
| 21164 | #undef elf_backend_default_use_rela_p |
| 21165 | #define elf_backend_default_use_rela_p 0 |
| 21166 | #undef elf_backend_want_plt_sym |
| 21167 | #define elf_backend_want_plt_sym 0 |
| 21168 | #undef elf_backend_dtrel_excludes_plt |
| 21169 | #define elf_backend_dtrel_excludes_plt 0 |
| 21170 | #undef ELF_MAXPAGESIZE |
| 21171 | #define ELF_MAXPAGESIZE 0x8000 |
| 21172 | |
| 21173 | #include "elf32-target.h" |