| 1 | /* Renesas RL78 specific support for 32-bit ELF. |
| 2 | Copyright (C) 2011-2019 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of BFD, the Binary File Descriptor library. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 19 | MA 02110-1301, USA. */ |
| 20 | |
| 21 | #include "sysdep.h" |
| 22 | #include "bfd.h" |
| 23 | #include "libbfd.h" |
| 24 | #include "elf-bfd.h" |
| 25 | #include "elf/rl78.h" |
| 26 | #include "libiberty.h" |
| 27 | |
| 28 | #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) |
| 29 | |
| 30 | #define RL78REL(n,sz,bit,shift,complain,pcrel) \ |
| 31 | HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ |
| 32 | bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) |
| 33 | |
| 34 | static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, |
| 35 | asection *, bfd *, char **); |
| 36 | |
| 37 | /* FIXME: We could omit the SHIFT parameter, it is always zero. */ |
| 38 | #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \ |
| 39 | HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ |
| 40 | rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) |
| 41 | |
| 42 | /* Note that the relocations around 0x7f are internal to this file; |
| 43 | feel free to move them as needed to avoid conflicts with published |
| 44 | relocation numbers. */ |
| 45 | |
| 46 | static reloc_howto_type rl78_elf_howto_table [] = |
| 47 | { |
| 48 | RL78REL (NONE, 3, 0, 0, dont, FALSE), |
| 49 | RL78REL (DIR32, 2, 32, 0, signed, FALSE), |
| 50 | RL78REL (DIR24S, 2, 24, 0, signed, FALSE), |
| 51 | RL78REL (DIR16, 1, 16, 0, dont, FALSE), |
| 52 | RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), |
| 53 | RL78REL (DIR16S, 1, 16, 0, signed, FALSE), |
| 54 | RL78REL (DIR8, 0, 8, 0, dont, FALSE), |
| 55 | RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), |
| 56 | RL78REL (DIR8S, 0, 8, 0, signed, FALSE), |
| 57 | RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), |
| 58 | RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), |
| 59 | RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), |
| 60 | RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), |
| 61 | RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), |
| 62 | RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), |
| 63 | RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), |
| 64 | RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), |
| 65 | RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), |
| 66 | RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), |
| 67 | |
| 68 | EMPTY_HOWTO (0x13), |
| 69 | EMPTY_HOWTO (0x14), |
| 70 | EMPTY_HOWTO (0x15), |
| 71 | EMPTY_HOWTO (0x16), |
| 72 | EMPTY_HOWTO (0x17), |
| 73 | EMPTY_HOWTO (0x18), |
| 74 | EMPTY_HOWTO (0x19), |
| 75 | EMPTY_HOWTO (0x1a), |
| 76 | EMPTY_HOWTO (0x1b), |
| 77 | EMPTY_HOWTO (0x1c), |
| 78 | EMPTY_HOWTO (0x1d), |
| 79 | EMPTY_HOWTO (0x1e), |
| 80 | EMPTY_HOWTO (0x1f), |
| 81 | |
| 82 | EMPTY_HOWTO (0x20), |
| 83 | EMPTY_HOWTO (0x21), |
| 84 | EMPTY_HOWTO (0x22), |
| 85 | EMPTY_HOWTO (0x23), |
| 86 | EMPTY_HOWTO (0x24), |
| 87 | EMPTY_HOWTO (0x25), |
| 88 | EMPTY_HOWTO (0x26), |
| 89 | EMPTY_HOWTO (0x27), |
| 90 | EMPTY_HOWTO (0x28), |
| 91 | EMPTY_HOWTO (0x29), |
| 92 | EMPTY_HOWTO (0x2a), |
| 93 | EMPTY_HOWTO (0x2b), |
| 94 | EMPTY_HOWTO (0x2c), |
| 95 | RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), |
| 96 | |
| 97 | EMPTY_HOWTO (0x2e), |
| 98 | RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE), |
| 99 | EMPTY_HOWTO (0x30), |
| 100 | EMPTY_HOWTO (0x31), |
| 101 | EMPTY_HOWTO (0x32), |
| 102 | EMPTY_HOWTO (0x33), |
| 103 | EMPTY_HOWTO (0x34), |
| 104 | EMPTY_HOWTO (0x35), |
| 105 | EMPTY_HOWTO (0x36), |
| 106 | EMPTY_HOWTO (0x37), |
| 107 | EMPTY_HOWTO (0x38), |
| 108 | EMPTY_HOWTO (0x39), |
| 109 | EMPTY_HOWTO (0x3a), |
| 110 | EMPTY_HOWTO (0x3b), |
| 111 | EMPTY_HOWTO (0x3c), |
| 112 | EMPTY_HOWTO (0x3d), |
| 113 | EMPTY_HOWTO (0x3e), |
| 114 | EMPTY_HOWTO (0x3f), |
| 115 | EMPTY_HOWTO (0x40), |
| 116 | |
| 117 | RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE), |
| 118 | RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE), |
| 119 | RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE), |
| 120 | RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE), |
| 121 | RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE), |
| 122 | RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE), |
| 123 | RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE), |
| 124 | RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE), |
| 125 | RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), |
| 126 | RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), |
| 127 | RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), |
| 128 | RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE), |
| 129 | RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE), |
| 130 | RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE), |
| 131 | RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE), |
| 132 | RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE), |
| 133 | RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE), |
| 134 | |
| 135 | #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) |
| 136 | |
| 137 | EMPTY_HOWTO (0x52), |
| 138 | EMPTY_HOWTO (0x53), |
| 139 | EMPTY_HOWTO (0x54), |
| 140 | EMPTY_HOWTO (0x55), |
| 141 | EMPTY_HOWTO (0x56), |
| 142 | EMPTY_HOWTO (0x57), |
| 143 | EMPTY_HOWTO (0x58), |
| 144 | EMPTY_HOWTO (0x59), |
| 145 | EMPTY_HOWTO (0x5a), |
| 146 | EMPTY_HOWTO (0x5b), |
| 147 | EMPTY_HOWTO (0x5c), |
| 148 | EMPTY_HOWTO (0x5d), |
| 149 | EMPTY_HOWTO (0x5e), |
| 150 | EMPTY_HOWTO (0x5f), |
| 151 | EMPTY_HOWTO (0x60), |
| 152 | EMPTY_HOWTO (0x61), |
| 153 | EMPTY_HOWTO (0x62), |
| 154 | EMPTY_HOWTO (0x63), |
| 155 | EMPTY_HOWTO (0x64), |
| 156 | EMPTY_HOWTO (0x65), |
| 157 | EMPTY_HOWTO (0x66), |
| 158 | EMPTY_HOWTO (0x67), |
| 159 | EMPTY_HOWTO (0x68), |
| 160 | EMPTY_HOWTO (0x69), |
| 161 | EMPTY_HOWTO (0x6a), |
| 162 | EMPTY_HOWTO (0x6b), |
| 163 | EMPTY_HOWTO (0x6c), |
| 164 | EMPTY_HOWTO (0x6d), |
| 165 | EMPTY_HOWTO (0x6e), |
| 166 | EMPTY_HOWTO (0x6f), |
| 167 | EMPTY_HOWTO (0x70), |
| 168 | EMPTY_HOWTO (0x71), |
| 169 | EMPTY_HOWTO (0x72), |
| 170 | EMPTY_HOWTO (0x73), |
| 171 | EMPTY_HOWTO (0x74), |
| 172 | EMPTY_HOWTO (0x75), |
| 173 | EMPTY_HOWTO (0x76), |
| 174 | EMPTY_HOWTO (0x77), |
| 175 | |
| 176 | EMPTY_HOWTO (0x78), |
| 177 | EMPTY_HOWTO (0x79), |
| 178 | EMPTY_HOWTO (0x7a), |
| 179 | EMPTY_HOWTO (0x7b), |
| 180 | EMPTY_HOWTO (0x7c), |
| 181 | EMPTY_HOWTO (0x7d), |
| 182 | EMPTY_HOWTO (0x7e), |
| 183 | EMPTY_HOWTO (0x7f), |
| 184 | |
| 185 | RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE), |
| 186 | RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE), |
| 187 | RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE), |
| 188 | RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE), |
| 189 | RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE), |
| 190 | RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE), |
| 191 | RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE), |
| 192 | RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE), |
| 193 | RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE), |
| 194 | EMPTY_HOWTO (0x89), |
| 195 | EMPTY_HOWTO (0x8a), |
| 196 | EMPTY_HOWTO (0x8b), |
| 197 | EMPTY_HOWTO (0x8c), |
| 198 | RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE), |
| 199 | EMPTY_HOWTO (0x8e), |
| 200 | EMPTY_HOWTO (0x8f), |
| 201 | RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE), |
| 202 | RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE), |
| 203 | RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE), |
| 204 | RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE), |
| 205 | RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE), |
| 206 | RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE), |
| 207 | RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE) |
| 208 | }; |
| 209 | \f |
| 210 | /* Map BFD reloc types to RL78 ELF reloc types. */ |
| 211 | |
| 212 | struct rl78_reloc_map |
| 213 | { |
| 214 | bfd_reloc_code_real_type bfd_reloc_val; |
| 215 | unsigned int rl78_reloc_val; |
| 216 | }; |
| 217 | |
| 218 | static const struct rl78_reloc_map rl78_reloc_map [] = |
| 219 | { |
| 220 | { BFD_RELOC_NONE, R_RL78_NONE }, |
| 221 | { BFD_RELOC_8, R_RL78_DIR8S }, |
| 222 | { BFD_RELOC_16, R_RL78_DIR16S }, |
| 223 | { BFD_RELOC_24, R_RL78_DIR24S }, |
| 224 | { BFD_RELOC_32, R_RL78_DIR32 }, |
| 225 | { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, |
| 226 | { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, |
| 227 | { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, |
| 228 | { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, |
| 229 | { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, |
| 230 | { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, |
| 231 | { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, |
| 232 | { BFD_RELOC_RL78_SYM, R_RL78_SYM }, |
| 233 | { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, |
| 234 | { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, |
| 235 | { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, |
| 236 | { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, |
| 237 | { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, |
| 238 | { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, |
| 239 | { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, |
| 240 | { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, |
| 241 | { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, |
| 242 | { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, |
| 243 | { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, |
| 244 | { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, |
| 245 | { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, |
| 246 | { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } |
| 247 | }; |
| 248 | |
| 249 | static reloc_howto_type * |
| 250 | rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
| 251 | bfd_reloc_code_real_type code) |
| 252 | { |
| 253 | unsigned int i; |
| 254 | |
| 255 | if (code == BFD_RELOC_RL78_32_OP) |
| 256 | return rl78_elf_howto_table + R_RL78_DIR32; |
| 257 | |
| 258 | for (i = ARRAY_SIZE (rl78_reloc_map); i--;) |
| 259 | if (rl78_reloc_map [i].bfd_reloc_val == code) |
| 260 | return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; |
| 261 | |
| 262 | return NULL; |
| 263 | } |
| 264 | |
| 265 | static reloc_howto_type * |
| 266 | rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) |
| 267 | { |
| 268 | unsigned int i; |
| 269 | |
| 270 | for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) |
| 271 | if (rl78_elf_howto_table[i].name != NULL |
| 272 | && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) |
| 273 | return rl78_elf_howto_table + i; |
| 274 | |
| 275 | return NULL; |
| 276 | } |
| 277 | |
| 278 | /* Set the howto pointer for an RL78 ELF reloc. */ |
| 279 | |
| 280 | static bfd_boolean |
| 281 | rl78_info_to_howto_rela (bfd * abfd, |
| 282 | arelent * cache_ptr, |
| 283 | Elf_Internal_Rela * dst) |
| 284 | { |
| 285 | unsigned int r_type; |
| 286 | |
| 287 | r_type = ELF32_R_TYPE (dst->r_info); |
| 288 | if (r_type >= (unsigned int) R_RL78_max) |
| 289 | { |
| 290 | /* xgettext:c-format */ |
| 291 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), |
| 292 | abfd, r_type); |
| 293 | bfd_set_error (bfd_error_bad_value); |
| 294 | return FALSE; |
| 295 | } |
| 296 | cache_ptr->howto = rl78_elf_howto_table + r_type; |
| 297 | return TRUE; |
| 298 | } |
| 299 | \f |
| 300 | static bfd_vma |
| 301 | get_symbol_value (const char * name, |
| 302 | struct bfd_link_info * info, |
| 303 | bfd * input_bfd, |
| 304 | asection * input_section, |
| 305 | int offset) |
| 306 | { |
| 307 | struct bfd_link_hash_entry * h; |
| 308 | |
| 309 | if (info == NULL) |
| 310 | return 0; |
| 311 | |
| 312 | h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); |
| 313 | |
| 314 | if (h == NULL |
| 315 | || (h->type != bfd_link_hash_defined |
| 316 | && h->type != bfd_link_hash_defweak)) |
| 317 | { |
| 318 | (*info->callbacks->undefined_symbol) |
| 319 | (info, name, input_bfd, input_section, offset, TRUE); |
| 320 | return 0; |
| 321 | } |
| 322 | |
| 323 | return (h->u.def.value |
| 324 | + h->u.def.section->output_section->vma |
| 325 | + h->u.def.section->output_offset); |
| 326 | } |
| 327 | |
| 328 | static bfd_vma |
| 329 | get_romstart (struct bfd_link_info * info, |
| 330 | bfd * abfd, |
| 331 | asection * sec, |
| 332 | int offset) |
| 333 | { |
| 334 | static bfd_boolean cached = FALSE; |
| 335 | static bfd_vma cached_value = 0; |
| 336 | |
| 337 | if (!cached) |
| 338 | { |
| 339 | cached_value = get_symbol_value ("_start", info, abfd, sec, offset); |
| 340 | cached = TRUE; |
| 341 | } |
| 342 | return cached_value; |
| 343 | } |
| 344 | |
| 345 | static bfd_vma |
| 346 | get_ramstart (struct bfd_link_info * info, |
| 347 | bfd * abfd, |
| 348 | asection * sec, |
| 349 | int offset) |
| 350 | { |
| 351 | static bfd_boolean cached = FALSE; |
| 352 | static bfd_vma cached_value = 0; |
| 353 | |
| 354 | if (!cached) |
| 355 | { |
| 356 | cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); |
| 357 | cached = TRUE; |
| 358 | } |
| 359 | return cached_value; |
| 360 | } |
| 361 | |
| 362 | #define NUM_STACK_ENTRIES 16 |
| 363 | static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; |
| 364 | static unsigned int rl78_stack_top; |
| 365 | |
| 366 | #define RL78_STACK_PUSH(val) \ |
| 367 | do \ |
| 368 | { \ |
| 369 | if (rl78_stack_top < NUM_STACK_ENTRIES) \ |
| 370 | rl78_stack [rl78_stack_top ++] = (val); \ |
| 371 | else \ |
| 372 | _bfd_error_handler (_("internal error: RL78 reloc stack overflow")); \ |
| 373 | } \ |
| 374 | while (0) |
| 375 | |
| 376 | #define RL78_STACK_POP(dest) \ |
| 377 | do \ |
| 378 | { \ |
| 379 | if (rl78_stack_top > 0) \ |
| 380 | (dest) = rl78_stack [-- rl78_stack_top];\ |
| 381 | else \ |
| 382 | { \ |
| 383 | _bfd_error_handler (_("internal error: RL78 reloc stack underflow")); \ |
| 384 | (dest) = 0; \ |
| 385 | } \ |
| 386 | } \ |
| 387 | while (0) |
| 388 | |
| 389 | /* Special handling for RL78 complex relocs. Returns the |
| 390 | value of the reloc, or 0 for relocs which do not generate |
| 391 | a result. SYMVAL is the value of the symbol for relocs |
| 392 | which use a symbolic argument. */ |
| 393 | |
| 394 | static bfd_vma |
| 395 | rl78_compute_complex_reloc (unsigned long r_type, |
| 396 | bfd_vma symval, |
| 397 | asection * input_section) |
| 398 | { |
| 399 | int32_t tmp1, tmp2; |
| 400 | bfd_vma relocation; |
| 401 | |
| 402 | switch (r_type) |
| 403 | { |
| 404 | default: |
| 405 | return 0; |
| 406 | |
| 407 | case R_RL78_ABS24S_PCREL: |
| 408 | case R_RL78_ABS16S_PCREL: |
| 409 | case R_RL78_ABS8S_PCREL: |
| 410 | RL78_STACK_POP (relocation); |
| 411 | relocation -= input_section->output_section->vma + input_section->output_offset; |
| 412 | return relocation; |
| 413 | |
| 414 | case R_RL78_ABS32: |
| 415 | case R_RL78_ABS32_REV: |
| 416 | case R_RL78_ABS16: |
| 417 | case R_RL78_ABS16_REV: |
| 418 | case R_RL78_ABS16S: |
| 419 | case R_RL78_ABS16U: |
| 420 | case R_RL78_ABS8: |
| 421 | case R_RL78_ABS8U: |
| 422 | case R_RL78_ABS8S: |
| 423 | RL78_STACK_POP (relocation); |
| 424 | return relocation; |
| 425 | |
| 426 | case R_RL78_ABS16UL: |
| 427 | case R_RL78_ABS8UL: |
| 428 | RL78_STACK_POP (relocation); |
| 429 | return relocation >> 2; |
| 430 | |
| 431 | case R_RL78_ABS16UW: |
| 432 | case R_RL78_ABS8UW: |
| 433 | RL78_STACK_POP (relocation); |
| 434 | return relocation >> 1; |
| 435 | |
| 436 | /* The rest of the relocs compute values and then push them onto the stack. */ |
| 437 | case R_RL78_OPramtop: |
| 438 | case R_RL78_OPromtop: |
| 439 | case R_RL78_SYM: |
| 440 | RL78_STACK_PUSH (symval); |
| 441 | return 0; |
| 442 | |
| 443 | case R_RL78_OPneg: |
| 444 | RL78_STACK_POP (tmp1); |
| 445 | tmp1 = - tmp1; |
| 446 | RL78_STACK_PUSH (tmp1); |
| 447 | return 0; |
| 448 | |
| 449 | case R_RL78_OPadd: |
| 450 | RL78_STACK_POP (tmp2); |
| 451 | RL78_STACK_POP (tmp1); |
| 452 | tmp1 += tmp2; |
| 453 | RL78_STACK_PUSH (tmp1); |
| 454 | return 0; |
| 455 | |
| 456 | case R_RL78_OPsub: |
| 457 | /* For the expression "A - B", the assembler pushes A, |
| 458 | then B, then OPSUB. So the first op we pop is B, not A. */ |
| 459 | RL78_STACK_POP (tmp2); /* B */ |
| 460 | RL78_STACK_POP (tmp1); /* A */ |
| 461 | tmp1 -= tmp2; /* A - B */ |
| 462 | RL78_STACK_PUSH (tmp1); |
| 463 | return 0; |
| 464 | |
| 465 | case R_RL78_OPmul: |
| 466 | RL78_STACK_POP (tmp2); |
| 467 | RL78_STACK_POP (tmp1); |
| 468 | tmp1 *= tmp2; |
| 469 | RL78_STACK_PUSH (tmp1); |
| 470 | return 0; |
| 471 | |
| 472 | case R_RL78_OPdiv: |
| 473 | RL78_STACK_POP (tmp2); |
| 474 | RL78_STACK_POP (tmp1); |
| 475 | tmp1 /= tmp2; |
| 476 | RL78_STACK_PUSH (tmp1); |
| 477 | return 0; |
| 478 | |
| 479 | case R_RL78_OPshla: |
| 480 | RL78_STACK_POP (tmp2); |
| 481 | RL78_STACK_POP (tmp1); |
| 482 | tmp1 <<= tmp2; |
| 483 | RL78_STACK_PUSH (tmp1); |
| 484 | return 0; |
| 485 | |
| 486 | case R_RL78_OPshra: |
| 487 | RL78_STACK_POP (tmp2); |
| 488 | RL78_STACK_POP (tmp1); |
| 489 | tmp1 >>= tmp2; |
| 490 | RL78_STACK_PUSH (tmp1); |
| 491 | return 0; |
| 492 | |
| 493 | case R_RL78_OPsctsize: |
| 494 | RL78_STACK_PUSH (input_section->size); |
| 495 | return 0; |
| 496 | |
| 497 | case R_RL78_OPscttop: |
| 498 | RL78_STACK_PUSH (input_section->output_section->vma); |
| 499 | return 0; |
| 500 | |
| 501 | case R_RL78_OPand: |
| 502 | RL78_STACK_POP (tmp2); |
| 503 | RL78_STACK_POP (tmp1); |
| 504 | tmp1 &= tmp2; |
| 505 | RL78_STACK_PUSH (tmp1); |
| 506 | return 0; |
| 507 | |
| 508 | case R_RL78_OPor: |
| 509 | RL78_STACK_POP (tmp2); |
| 510 | RL78_STACK_POP (tmp1); |
| 511 | tmp1 |= tmp2; |
| 512 | RL78_STACK_PUSH (tmp1); |
| 513 | return 0; |
| 514 | |
| 515 | case R_RL78_OPxor: |
| 516 | RL78_STACK_POP (tmp2); |
| 517 | RL78_STACK_POP (tmp1); |
| 518 | tmp1 ^= tmp2; |
| 519 | RL78_STACK_PUSH (tmp1); |
| 520 | return 0; |
| 521 | |
| 522 | case R_RL78_OPnot: |
| 523 | RL78_STACK_POP (tmp1); |
| 524 | tmp1 = ~ tmp1; |
| 525 | RL78_STACK_PUSH (tmp1); |
| 526 | return 0; |
| 527 | |
| 528 | case R_RL78_OPmod: |
| 529 | RL78_STACK_POP (tmp2); |
| 530 | RL78_STACK_POP (tmp1); |
| 531 | tmp1 %= tmp2; |
| 532 | RL78_STACK_PUSH (tmp1); |
| 533 | return 0; |
| 534 | } |
| 535 | } |
| 536 | |
| 537 | #undef RL78_STACK_PUSH |
| 538 | #undef RL78_STACK_POP |
| 539 | |
| 540 | #define OP(i) (contents[reloc->address + (i)]) |
| 541 | |
| 542 | static bfd_reloc_status_type |
| 543 | rl78_special_reloc (bfd * input_bfd, |
| 544 | arelent * reloc, |
| 545 | asymbol * symbol, |
| 546 | void * data, |
| 547 | asection * input_section, |
| 548 | bfd * output_bfd ATTRIBUTE_UNUSED, |
| 549 | char ** error_message ATTRIBUTE_UNUSED) |
| 550 | { |
| 551 | bfd_reloc_status_type r = bfd_reloc_ok; |
| 552 | bfd_vma relocation = 0; |
| 553 | unsigned long r_type = reloc->howto->type; |
| 554 | bfd_byte * contents = data; |
| 555 | |
| 556 | /* If necessary, compute the symbolic value of the relocation. */ |
| 557 | switch (r_type) |
| 558 | { |
| 559 | case R_RL78_SYM: |
| 560 | relocation = (symbol->value |
| 561 | + symbol->section->output_section->vma |
| 562 | + symbol->section->output_offset |
| 563 | + reloc->addend); |
| 564 | break; |
| 565 | |
| 566 | case R_RL78_OPromtop: |
| 567 | relocation = get_romstart (NULL, input_bfd, input_section, |
| 568 | reloc->address); |
| 569 | break; |
| 570 | |
| 571 | case R_RL78_OPramtop: |
| 572 | relocation = get_ramstart (NULL, input_bfd, input_section, |
| 573 | reloc->address); |
| 574 | break; |
| 575 | } |
| 576 | |
| 577 | /* Get the value of the relocation. */ |
| 578 | relocation = rl78_compute_complex_reloc (r_type, relocation, input_section); |
| 579 | |
| 580 | /* If the relocation alters the contents of the section then apply it now. |
| 581 | Note - since this function is called from |
| 582 | bfd_generic_get_relocated_section_contents via bfd_perform_relocation, |
| 583 | and not from the linker, we do not perform any range checking. The |
| 584 | clients who are calling us are only interested in some relocated section |
| 585 | contents, and not any linkage problems that might occur later. */ |
| 586 | switch (r_type) |
| 587 | { |
| 588 | case R_RL78_ABS32: |
| 589 | OP (0) = relocation; |
| 590 | OP (1) = relocation >> 8; |
| 591 | OP (2) = relocation >> 16; |
| 592 | OP (3) = relocation >> 24; |
| 593 | break; |
| 594 | |
| 595 | case R_RL78_ABS32_REV: |
| 596 | OP (3) = relocation; |
| 597 | OP (2) = relocation >> 8; |
| 598 | OP (1) = relocation >> 16; |
| 599 | OP (0) = relocation >> 24; |
| 600 | break; |
| 601 | |
| 602 | case R_RL78_ABS24S_PCREL: |
| 603 | case R_RL78_ABS24S: |
| 604 | OP (0) = relocation; |
| 605 | OP (1) = relocation >> 8; |
| 606 | OP (2) = relocation >> 16; |
| 607 | break; |
| 608 | |
| 609 | case R_RL78_ABS16_REV: |
| 610 | OP (1) = relocation; |
| 611 | OP (0) = relocation >> 8; |
| 612 | break; |
| 613 | |
| 614 | case R_RL78_ABS16S_PCREL: |
| 615 | case R_RL78_ABS16: |
| 616 | case R_RL78_ABS16S: |
| 617 | case R_RL78_ABS16U: |
| 618 | case R_RL78_ABS16UL: |
| 619 | case R_RL78_ABS16UW: |
| 620 | OP (0) = relocation; |
| 621 | OP (1) = relocation >> 8; |
| 622 | break; |
| 623 | |
| 624 | case R_RL78_ABS8S_PCREL: |
| 625 | case R_RL78_ABS8: |
| 626 | case R_RL78_ABS8U: |
| 627 | case R_RL78_ABS8UL: |
| 628 | case R_RL78_ABS8UW: |
| 629 | case R_RL78_ABS8S: |
| 630 | OP (0) = relocation; |
| 631 | break; |
| 632 | |
| 633 | default: |
| 634 | break; |
| 635 | } |
| 636 | |
| 637 | return r; |
| 638 | } |
| 639 | |
| 640 | #undef OP |
| 641 | #define OP(i) (contents[rel->r_offset + (i)]) |
| 642 | |
| 643 | /* Relocate an RL78 ELF section. |
| 644 | There is some attempt to make this function usable for many architectures, |
| 645 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], |
| 646 | if only to serve as a learning tool. |
| 647 | |
| 648 | The RELOCATE_SECTION function is called by the new ELF backend linker |
| 649 | to handle the relocations for a section. |
| 650 | |
| 651 | The relocs are always passed as Rela structures; if the section |
| 652 | actually uses Rel structures, the r_addend field will always be |
| 653 | zero. |
| 654 | |
| 655 | This function is responsible for adjusting the section contents as |
| 656 | necessary, and (if using Rela relocs and generating a relocatable |
| 657 | output file) adjusting the reloc addend as necessary. |
| 658 | |
| 659 | This function does not have to worry about setting the reloc |
| 660 | address or the reloc symbol index. |
| 661 | |
| 662 | LOCAL_SYMS is a pointer to the swapped in local symbols. |
| 663 | |
| 664 | LOCAL_SECTIONS is an array giving the section in the input file |
| 665 | corresponding to the st_shndx field of each local symbol. |
| 666 | |
| 667 | The global hash table entry for the global symbols can be found |
| 668 | via elf_sym_hashes (input_bfd). |
| 669 | |
| 670 | When generating relocatable output, this function must handle |
| 671 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is |
| 672 | going to be the section symbol corresponding to the output |
| 673 | section, which means that the addend must be adjusted |
| 674 | accordingly. */ |
| 675 | |
| 676 | static bfd_boolean |
| 677 | rl78_elf_relocate_section |
| 678 | (bfd * output_bfd, |
| 679 | struct bfd_link_info * info, |
| 680 | bfd * input_bfd, |
| 681 | asection * input_section, |
| 682 | bfd_byte * contents, |
| 683 | Elf_Internal_Rela * relocs, |
| 684 | Elf_Internal_Sym * local_syms, |
| 685 | asection ** local_sections) |
| 686 | { |
| 687 | Elf_Internal_Shdr * symtab_hdr; |
| 688 | struct elf_link_hash_entry ** sym_hashes; |
| 689 | Elf_Internal_Rela * rel; |
| 690 | Elf_Internal_Rela * relend; |
| 691 | asection *splt; |
| 692 | |
| 693 | symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; |
| 694 | sym_hashes = elf_sym_hashes (input_bfd); |
| 695 | relend = relocs + input_section->reloc_count; |
| 696 | |
| 697 | splt = elf_hash_table (info)->splt; |
| 698 | |
| 699 | for (rel = relocs; rel < relend; rel ++) |
| 700 | { |
| 701 | reloc_howto_type * howto; |
| 702 | unsigned long r_symndx; |
| 703 | Elf_Internal_Sym * sym; |
| 704 | asection * sec; |
| 705 | struct elf_link_hash_entry * h; |
| 706 | bfd_vma relocation; |
| 707 | bfd_reloc_status_type r; |
| 708 | const char * name = NULL; |
| 709 | bfd_boolean unresolved_reloc = TRUE; |
| 710 | int r_type; |
| 711 | |
| 712 | r_type = ELF32_R_TYPE (rel->r_info); |
| 713 | r_symndx = ELF32_R_SYM (rel->r_info); |
| 714 | |
| 715 | howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); |
| 716 | h = NULL; |
| 717 | sym = NULL; |
| 718 | sec = NULL; |
| 719 | relocation = 0; |
| 720 | |
| 721 | if (r_symndx < symtab_hdr->sh_info) |
| 722 | { |
| 723 | sym = local_syms + r_symndx; |
| 724 | sec = local_sections [r_symndx]; |
| 725 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); |
| 726 | |
| 727 | name = bfd_elf_string_from_elf_section |
| 728 | (input_bfd, symtab_hdr->sh_link, sym->st_name); |
| 729 | name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; |
| 730 | } |
| 731 | else |
| 732 | { |
| 733 | bfd_boolean warned ATTRIBUTE_UNUSED; |
| 734 | bfd_boolean ignored ATTRIBUTE_UNUSED; |
| 735 | |
| 736 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
| 737 | r_symndx, symtab_hdr, sym_hashes, h, |
| 738 | sec, relocation, unresolved_reloc, |
| 739 | warned, ignored); |
| 740 | |
| 741 | name = h->root.root.string; |
| 742 | } |
| 743 | |
| 744 | if (sec != NULL && discarded_section (sec)) |
| 745 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
| 746 | rel, 1, relend, howto, 0, contents); |
| 747 | |
| 748 | if (bfd_link_relocatable (info)) |
| 749 | { |
| 750 | /* This is a relocatable link. We don't have to change |
| 751 | anything, unless the reloc is against a section symbol, |
| 752 | in which case we have to adjust according to where the |
| 753 | section symbol winds up in the output section. */ |
| 754 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) |
| 755 | rel->r_addend += sec->output_offset; |
| 756 | continue; |
| 757 | } |
| 758 | |
| 759 | switch (ELF32_R_TYPE (rel->r_info)) |
| 760 | { |
| 761 | case R_RL78_DIR16S: |
| 762 | { |
| 763 | bfd_vma *plt_offset; |
| 764 | |
| 765 | if (h != NULL) |
| 766 | plt_offset = &h->plt.offset; |
| 767 | else |
| 768 | plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; |
| 769 | |
| 770 | if (! valid_16bit_address (relocation)) |
| 771 | { |
| 772 | /* If this is the first time we've processed this symbol, |
| 773 | fill in the plt entry with the correct symbol address. */ |
| 774 | if ((*plt_offset & 1) == 0) |
| 775 | { |
| 776 | unsigned int x; |
| 777 | |
| 778 | x = 0x000000ec; /* br !!abs24 */ |
| 779 | x |= (relocation << 8) & 0xffffff00; |
| 780 | bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); |
| 781 | *plt_offset |= 1; |
| 782 | } |
| 783 | |
| 784 | relocation = (splt->output_section->vma |
| 785 | + splt->output_offset |
| 786 | + (*plt_offset & -2)); |
| 787 | if (name) |
| 788 | { |
| 789 | char *newname = bfd_malloc (strlen(name)+5); |
| 790 | strcpy (newname, name); |
| 791 | strcat(newname, ".plt"); |
| 792 | _bfd_generic_link_add_one_symbol (info, |
| 793 | input_bfd, |
| 794 | newname, |
| 795 | BSF_FUNCTION | BSF_WEAK, |
| 796 | splt, |
| 797 | (*plt_offset & -2), |
| 798 | 0, |
| 799 | 1, |
| 800 | 0, |
| 801 | 0); |
| 802 | } |
| 803 | } |
| 804 | } |
| 805 | break; |
| 806 | } |
| 807 | |
| 808 | if (h != NULL && h->root.type == bfd_link_hash_undefweak) |
| 809 | /* If the symbol is undefined and weak |
| 810 | then the relocation resolves to zero. */ |
| 811 | relocation = 0; |
| 812 | else |
| 813 | { |
| 814 | if (howto->pc_relative) |
| 815 | { |
| 816 | relocation -= (input_section->output_section->vma |
| 817 | + input_section->output_offset |
| 818 | + rel->r_offset); |
| 819 | relocation -= bfd_get_reloc_size (howto); |
| 820 | } |
| 821 | |
| 822 | relocation += rel->r_addend; |
| 823 | } |
| 824 | |
| 825 | r = bfd_reloc_ok; |
| 826 | |
| 827 | #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow |
| 828 | |
| 829 | /* Opcode relocs are always big endian. Data relocs are bi-endian. */ |
| 830 | switch (r_type) |
| 831 | { |
| 832 | case R_RL78_NONE: |
| 833 | break; |
| 834 | |
| 835 | case R_RL78_RH_RELAX: |
| 836 | break; |
| 837 | |
| 838 | case R_RL78_DIR8S_PCREL: |
| 839 | RANGE (-128, 127); |
| 840 | OP (0) = relocation; |
| 841 | break; |
| 842 | |
| 843 | case R_RL78_DIR8S: |
| 844 | RANGE (-128, 255); |
| 845 | OP (0) = relocation; |
| 846 | break; |
| 847 | |
| 848 | case R_RL78_DIR8U: |
| 849 | RANGE (0, 255); |
| 850 | OP (0) = relocation; |
| 851 | break; |
| 852 | |
| 853 | case R_RL78_DIR16S_PCREL: |
| 854 | RANGE (-32768, 32767); |
| 855 | OP (0) = relocation; |
| 856 | OP (1) = relocation >> 8; |
| 857 | break; |
| 858 | |
| 859 | case R_RL78_DIR16S: |
| 860 | if ((relocation & 0xf0000) == 0xf0000) |
| 861 | relocation &= 0xffff; |
| 862 | RANGE (-32768, 65535); |
| 863 | OP (0) = relocation; |
| 864 | OP (1) = relocation >> 8; |
| 865 | break; |
| 866 | |
| 867 | case R_RL78_DIR16U: |
| 868 | RANGE (0, 65536); |
| 869 | OP (0) = relocation; |
| 870 | OP (1) = relocation >> 8; |
| 871 | break; |
| 872 | |
| 873 | case R_RL78_DIR16: |
| 874 | RANGE (-32768, 65536); |
| 875 | OP (0) = relocation; |
| 876 | OP (1) = relocation >> 8; |
| 877 | break; |
| 878 | |
| 879 | case R_RL78_DIR16_REV: |
| 880 | RANGE (-32768, 65536); |
| 881 | OP (1) = relocation; |
| 882 | OP (0) = relocation >> 8; |
| 883 | break; |
| 884 | |
| 885 | case R_RL78_DIR3U_PCREL: |
| 886 | RANGE (3, 10); |
| 887 | OP (0) &= 0xf8; |
| 888 | OP (0) |= relocation & 0x07; |
| 889 | break; |
| 890 | |
| 891 | case R_RL78_DIR24S_PCREL: |
| 892 | RANGE (-0x800000, 0x7fffff); |
| 893 | OP (0) = relocation; |
| 894 | OP (1) = relocation >> 8; |
| 895 | OP (2) = relocation >> 16; |
| 896 | break; |
| 897 | |
| 898 | case R_RL78_DIR24S: |
| 899 | RANGE (-0x800000, 0x7fffff); |
| 900 | OP (0) = relocation; |
| 901 | OP (1) = relocation >> 8; |
| 902 | OP (2) = relocation >> 16; |
| 903 | break; |
| 904 | |
| 905 | case R_RL78_DIR32: |
| 906 | OP (0) = relocation; |
| 907 | OP (1) = relocation >> 8; |
| 908 | OP (2) = relocation >> 16; |
| 909 | OP (3) = relocation >> 24; |
| 910 | break; |
| 911 | |
| 912 | case R_RL78_DIR32_REV: |
| 913 | OP (3) = relocation; |
| 914 | OP (2) = relocation >> 8; |
| 915 | OP (1) = relocation >> 16; |
| 916 | OP (0) = relocation >> 24; |
| 917 | break; |
| 918 | |
| 919 | case R_RL78_RH_SFR: |
| 920 | RANGE (0xfff00, 0xfffff); |
| 921 | OP (0) = relocation & 0xff; |
| 922 | break; |
| 923 | |
| 924 | case R_RL78_RH_SADDR: |
| 925 | RANGE (0xffe20, 0xfff1f); |
| 926 | OP (0) = relocation & 0xff; |
| 927 | break; |
| 928 | |
| 929 | /* Complex reloc handling: */ |
| 930 | case R_RL78_ABS32: |
| 931 | case R_RL78_ABS32_REV: |
| 932 | case R_RL78_ABS24S_PCREL: |
| 933 | case R_RL78_ABS24S: |
| 934 | case R_RL78_ABS16: |
| 935 | case R_RL78_ABS16_REV: |
| 936 | case R_RL78_ABS16S_PCREL: |
| 937 | case R_RL78_ABS16S: |
| 938 | case R_RL78_ABS16U: |
| 939 | case R_RL78_ABS16UL: |
| 940 | case R_RL78_ABS16UW: |
| 941 | case R_RL78_ABS8: |
| 942 | case R_RL78_ABS8U: |
| 943 | case R_RL78_ABS8UL: |
| 944 | case R_RL78_ABS8UW: |
| 945 | case R_RL78_ABS8S_PCREL: |
| 946 | case R_RL78_ABS8S: |
| 947 | case R_RL78_OPneg: |
| 948 | case R_RL78_OPadd: |
| 949 | case R_RL78_OPsub: |
| 950 | case R_RL78_OPmul: |
| 951 | case R_RL78_OPdiv: |
| 952 | case R_RL78_OPshla: |
| 953 | case R_RL78_OPshra: |
| 954 | case R_RL78_OPsctsize: |
| 955 | case R_RL78_OPscttop: |
| 956 | case R_RL78_OPand: |
| 957 | case R_RL78_OPor: |
| 958 | case R_RL78_OPxor: |
| 959 | case R_RL78_OPnot: |
| 960 | case R_RL78_OPmod: |
| 961 | relocation = rl78_compute_complex_reloc (r_type, 0, input_section); |
| 962 | |
| 963 | switch (r_type) |
| 964 | { |
| 965 | case R_RL78_ABS32: |
| 966 | OP (0) = relocation; |
| 967 | OP (1) = relocation >> 8; |
| 968 | OP (2) = relocation >> 16; |
| 969 | OP (3) = relocation >> 24; |
| 970 | break; |
| 971 | |
| 972 | case R_RL78_ABS32_REV: |
| 973 | OP (3) = relocation; |
| 974 | OP (2) = relocation >> 8; |
| 975 | OP (1) = relocation >> 16; |
| 976 | OP (0) = relocation >> 24; |
| 977 | break; |
| 978 | |
| 979 | case R_RL78_ABS24S_PCREL: |
| 980 | case R_RL78_ABS24S: |
| 981 | RANGE (-0x800000, 0x7fffff); |
| 982 | OP (0) = relocation; |
| 983 | OP (1) = relocation >> 8; |
| 984 | OP (2) = relocation >> 16; |
| 985 | break; |
| 986 | |
| 987 | case R_RL78_ABS16: |
| 988 | RANGE (-32768, 65535); |
| 989 | OP (0) = relocation; |
| 990 | OP (1) = relocation >> 8; |
| 991 | break; |
| 992 | |
| 993 | case R_RL78_ABS16_REV: |
| 994 | RANGE (-32768, 65535); |
| 995 | OP (1) = relocation; |
| 996 | OP (0) = relocation >> 8; |
| 997 | break; |
| 998 | |
| 999 | case R_RL78_ABS16S_PCREL: |
| 1000 | case R_RL78_ABS16S: |
| 1001 | RANGE (-32768, 32767); |
| 1002 | OP (0) = relocation; |
| 1003 | OP (1) = relocation >> 8; |
| 1004 | break; |
| 1005 | |
| 1006 | case R_RL78_ABS16U: |
| 1007 | case R_RL78_ABS16UL: |
| 1008 | case R_RL78_ABS16UW: |
| 1009 | RANGE (0, 65536); |
| 1010 | OP (0) = relocation; |
| 1011 | OP (1) = relocation >> 8; |
| 1012 | break; |
| 1013 | |
| 1014 | case R_RL78_ABS8: |
| 1015 | RANGE (-128, 255); |
| 1016 | OP (0) = relocation; |
| 1017 | break; |
| 1018 | |
| 1019 | case R_RL78_ABS8U: |
| 1020 | case R_RL78_ABS8UL: |
| 1021 | case R_RL78_ABS8UW: |
| 1022 | RANGE (0, 255); |
| 1023 | OP (0) = relocation; |
| 1024 | break; |
| 1025 | |
| 1026 | case R_RL78_ABS8S_PCREL: |
| 1027 | case R_RL78_ABS8S: |
| 1028 | RANGE (-128, 127); |
| 1029 | OP (0) = relocation; |
| 1030 | break; |
| 1031 | |
| 1032 | default: |
| 1033 | break; |
| 1034 | } |
| 1035 | break; |
| 1036 | |
| 1037 | case R_RL78_SYM: |
| 1038 | if (r_symndx < symtab_hdr->sh_info) |
| 1039 | relocation = sec->output_section->vma + sec->output_offset |
| 1040 | + sym->st_value + rel->r_addend; |
| 1041 | else if (h != NULL |
| 1042 | && (h->root.type == bfd_link_hash_defined |
| 1043 | || h->root.type == bfd_link_hash_defweak)) |
| 1044 | relocation = h->root.u.def.value |
| 1045 | + sec->output_section->vma |
| 1046 | + sec->output_offset |
| 1047 | + rel->r_addend; |
| 1048 | else |
| 1049 | { |
| 1050 | relocation = 0; |
| 1051 | if (h->root.type != bfd_link_hash_undefweak) |
| 1052 | _bfd_error_handler |
| 1053 | (_("warning: RL78_SYM reloc with an unknown symbol")); |
| 1054 | } |
| 1055 | (void) rl78_compute_complex_reloc (r_type, relocation, input_section); |
| 1056 | break; |
| 1057 | |
| 1058 | case R_RL78_OPromtop: |
| 1059 | relocation = get_romstart (info, input_bfd, input_section, rel->r_offset); |
| 1060 | (void) rl78_compute_complex_reloc (r_type, relocation, input_section); |
| 1061 | break; |
| 1062 | |
| 1063 | case R_RL78_OPramtop: |
| 1064 | relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset); |
| 1065 | (void) rl78_compute_complex_reloc (r_type, relocation, input_section); |
| 1066 | break; |
| 1067 | |
| 1068 | default: |
| 1069 | r = bfd_reloc_notsupported; |
| 1070 | break; |
| 1071 | } |
| 1072 | |
| 1073 | if (r != bfd_reloc_ok) |
| 1074 | { |
| 1075 | const char * msg = NULL; |
| 1076 | |
| 1077 | switch (r) |
| 1078 | { |
| 1079 | case bfd_reloc_overflow: |
| 1080 | /* Catch the case of a missing function declaration |
| 1081 | and emit a more helpful error message. */ |
| 1082 | if (r_type == R_RL78_DIR24S_PCREL) |
| 1083 | /* xgettext:c-format */ |
| 1084 | msg = _("%pB(%pA): error: call to undefined function '%s'"); |
| 1085 | else |
| 1086 | (*info->callbacks->reloc_overflow) |
| 1087 | (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, |
| 1088 | input_bfd, input_section, rel->r_offset); |
| 1089 | break; |
| 1090 | |
| 1091 | case bfd_reloc_undefined: |
| 1092 | (*info->callbacks->undefined_symbol) |
| 1093 | (info, name, input_bfd, input_section, rel->r_offset, TRUE); |
| 1094 | break; |
| 1095 | |
| 1096 | case bfd_reloc_other: |
| 1097 | /* xgettext:c-format */ |
| 1098 | msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area"); |
| 1099 | break; |
| 1100 | |
| 1101 | case bfd_reloc_outofrange: |
| 1102 | /* xgettext:c-format */ |
| 1103 | msg = _("%pB(%pA): internal error: out of range error"); |
| 1104 | break; |
| 1105 | |
| 1106 | case bfd_reloc_notsupported: |
| 1107 | /* xgettext:c-format */ |
| 1108 | msg = _("%pB(%pA): internal error: unsupported relocation error"); |
| 1109 | break; |
| 1110 | |
| 1111 | case bfd_reloc_dangerous: |
| 1112 | /* xgettext:c-format */ |
| 1113 | msg = _("%pB(%pA): internal error: dangerous relocation"); |
| 1114 | break; |
| 1115 | |
| 1116 | default: |
| 1117 | /* xgettext:c-format */ |
| 1118 | msg = _("%pB(%pA): internal error: unknown error"); |
| 1119 | break; |
| 1120 | } |
| 1121 | |
| 1122 | if (msg) |
| 1123 | _bfd_error_handler (msg, input_bfd, input_section, name); |
| 1124 | } |
| 1125 | } |
| 1126 | |
| 1127 | return TRUE; |
| 1128 | } |
| 1129 | \f |
| 1130 | /* Function to set the ELF flag bits. */ |
| 1131 | |
| 1132 | static bfd_boolean |
| 1133 | rl78_elf_set_private_flags (bfd * abfd, flagword flags) |
| 1134 | { |
| 1135 | elf_elfheader (abfd)->e_flags = flags; |
| 1136 | elf_flags_init (abfd) = TRUE; |
| 1137 | return TRUE; |
| 1138 | } |
| 1139 | |
| 1140 | static bfd_boolean no_warn_mismatch = FALSE; |
| 1141 | |
| 1142 | void bfd_elf32_rl78_set_target_flags (bfd_boolean); |
| 1143 | |
| 1144 | void |
| 1145 | bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) |
| 1146 | { |
| 1147 | no_warn_mismatch = user_no_warn_mismatch; |
| 1148 | } |
| 1149 | |
| 1150 | static const char * |
| 1151 | rl78_cpu_name (flagword flags) |
| 1152 | { |
| 1153 | switch (flags & E_FLAG_RL78_CPU_MASK) |
| 1154 | { |
| 1155 | default: return ""; |
| 1156 | case E_FLAG_RL78_G10: return "G10"; |
| 1157 | case E_FLAG_RL78_G13: return "G13"; |
| 1158 | case E_FLAG_RL78_G14: return "G14"; |
| 1159 | } |
| 1160 | } |
| 1161 | |
| 1162 | /* Merge backend specific data from an object file to the output |
| 1163 | object file when linking. */ |
| 1164 | |
| 1165 | static bfd_boolean |
| 1166 | rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
| 1167 | { |
| 1168 | bfd *obfd = info->output_bfd; |
| 1169 | flagword new_flags; |
| 1170 | flagword old_flags; |
| 1171 | bfd_boolean error = FALSE; |
| 1172 | |
| 1173 | new_flags = elf_elfheader (ibfd)->e_flags; |
| 1174 | old_flags = elf_elfheader (obfd)->e_flags; |
| 1175 | |
| 1176 | if (!elf_flags_init (obfd)) |
| 1177 | { |
| 1178 | /* First call, no flags set. */ |
| 1179 | elf_flags_init (obfd) = TRUE; |
| 1180 | elf_elfheader (obfd)->e_flags = new_flags; |
| 1181 | } |
| 1182 | else if (old_flags != new_flags) |
| 1183 | { |
| 1184 | flagword changed_flags = old_flags ^ new_flags; |
| 1185 | |
| 1186 | if (changed_flags & E_FLAG_RL78_CPU_MASK) |
| 1187 | { |
| 1188 | flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; |
| 1189 | flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; |
| 1190 | |
| 1191 | if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) |
| 1192 | /* It does not matter what new_cpu may have. */; |
| 1193 | else if (out_cpu == E_FLAG_RL78_ANY_CPU) |
| 1194 | { |
| 1195 | if (in_cpu == E_FLAG_RL78_G10) |
| 1196 | { |
| 1197 | /* G10 files can only be linked with other G10 files. |
| 1198 | If the output is set to "any" this means that it is |
| 1199 | a G14 file that does not use hardware multiply/divide, |
| 1200 | but that is still incompatible with the G10 ABI. */ |
| 1201 | error = TRUE; |
| 1202 | |
| 1203 | _bfd_error_handler |
| 1204 | /* xgettext:c-format */ |
| 1205 | (_("RL78 ABI conflict: G10 file %pB cannot be linked" |
| 1206 | " with %s file %pB"), |
| 1207 | ibfd, rl78_cpu_name (out_cpu), obfd); |
| 1208 | } |
| 1209 | else |
| 1210 | { |
| 1211 | old_flags &= ~ E_FLAG_RL78_CPU_MASK; |
| 1212 | old_flags |= in_cpu; |
| 1213 | elf_elfheader (obfd)->e_flags = old_flags; |
| 1214 | } |
| 1215 | } |
| 1216 | else |
| 1217 | { |
| 1218 | error = TRUE; |
| 1219 | |
| 1220 | _bfd_error_handler |
| 1221 | /* xgettext:c-format */ |
| 1222 | (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"), |
| 1223 | rl78_cpu_name (in_cpu), ibfd, |
| 1224 | rl78_cpu_name (out_cpu), obfd); |
| 1225 | } |
| 1226 | } |
| 1227 | |
| 1228 | if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) |
| 1229 | { |
| 1230 | _bfd_error_handler |
| 1231 | (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); |
| 1232 | |
| 1233 | if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) |
| 1234 | /* xgettext:c-format */ |
| 1235 | _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), |
| 1236 | obfd, ibfd); |
| 1237 | else |
| 1238 | /* xgettext:c-format */ |
| 1239 | _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), |
| 1240 | ibfd, obfd); |
| 1241 | error = TRUE; |
| 1242 | } |
| 1243 | } |
| 1244 | |
| 1245 | return !error; |
| 1246 | } |
| 1247 | \f |
| 1248 | static bfd_boolean |
| 1249 | rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) |
| 1250 | { |
| 1251 | FILE * file = (FILE *) ptr; |
| 1252 | flagword flags; |
| 1253 | |
| 1254 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
| 1255 | |
| 1256 | /* Print normal ELF private data. */ |
| 1257 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
| 1258 | |
| 1259 | flags = elf_elfheader (abfd)->e_flags; |
| 1260 | fprintf (file, _("private flags = 0x%lx:"), (long) flags); |
| 1261 | |
| 1262 | if (flags & E_FLAG_RL78_CPU_MASK) |
| 1263 | fprintf (file, " [%s]", rl78_cpu_name (flags)); |
| 1264 | |
| 1265 | if (flags & E_FLAG_RL78_64BIT_DOUBLES) |
| 1266 | fprintf (file, _(" [64-bit doubles]")); |
| 1267 | |
| 1268 | fputc ('\n', file); |
| 1269 | return TRUE; |
| 1270 | } |
| 1271 | |
| 1272 | /* Return the MACH for an e_flags value. */ |
| 1273 | |
| 1274 | static int |
| 1275 | elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) |
| 1276 | { |
| 1277 | return bfd_mach_rl78; |
| 1278 | } |
| 1279 | |
| 1280 | static bfd_boolean |
| 1281 | rl78_elf_object_p (bfd * abfd) |
| 1282 | { |
| 1283 | bfd_default_set_arch_mach (abfd, bfd_arch_rl78, |
| 1284 | elf32_rl78_machine (abfd)); |
| 1285 | return TRUE; |
| 1286 | } |
| 1287 | \f |
| 1288 | /* support PLT for 16-bit references to 24-bit functions. */ |
| 1289 | |
| 1290 | /* We support 16-bit pointers to code above 64k by generating a thunk |
| 1291 | below 64k containing a JMP instruction to the final address. */ |
| 1292 | |
| 1293 | static bfd_boolean |
| 1294 | rl78_elf_check_relocs |
| 1295 | (bfd * abfd, |
| 1296 | struct bfd_link_info * info, |
| 1297 | asection * sec, |
| 1298 | const Elf_Internal_Rela * relocs) |
| 1299 | { |
| 1300 | Elf_Internal_Shdr * symtab_hdr; |
| 1301 | struct elf_link_hash_entry ** sym_hashes; |
| 1302 | const Elf_Internal_Rela * rel; |
| 1303 | const Elf_Internal_Rela * rel_end; |
| 1304 | bfd_vma *local_plt_offsets; |
| 1305 | asection *splt; |
| 1306 | bfd *dynobj; |
| 1307 | |
| 1308 | if (bfd_link_relocatable (info)) |
| 1309 | return TRUE; |
| 1310 | |
| 1311 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
| 1312 | sym_hashes = elf_sym_hashes (abfd); |
| 1313 | local_plt_offsets = elf_local_got_offsets (abfd); |
| 1314 | dynobj = elf_hash_table(info)->dynobj; |
| 1315 | |
| 1316 | rel_end = relocs + sec->reloc_count; |
| 1317 | for (rel = relocs; rel < rel_end; rel++) |
| 1318 | { |
| 1319 | struct elf_link_hash_entry *h; |
| 1320 | unsigned long r_symndx; |
| 1321 | bfd_vma *offset; |
| 1322 | |
| 1323 | r_symndx = ELF32_R_SYM (rel->r_info); |
| 1324 | if (r_symndx < symtab_hdr->sh_info) |
| 1325 | h = NULL; |
| 1326 | else |
| 1327 | { |
| 1328 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; |
| 1329 | while (h->root.type == bfd_link_hash_indirect |
| 1330 | || h->root.type == bfd_link_hash_warning) |
| 1331 | h = (struct elf_link_hash_entry *) h->root.u.i.link; |
| 1332 | } |
| 1333 | |
| 1334 | switch (ELF32_R_TYPE (rel->r_info)) |
| 1335 | { |
| 1336 | /* This relocation describes a 16-bit pointer to a function. |
| 1337 | We may need to allocate a thunk in low memory; reserve memory |
| 1338 | for it now. */ |
| 1339 | case R_RL78_DIR16S: |
| 1340 | if (dynobj == NULL) |
| 1341 | elf_hash_table (info)->dynobj = dynobj = abfd; |
| 1342 | splt = elf_hash_table (info)->splt; |
| 1343 | if (splt == NULL) |
| 1344 | { |
| 1345 | flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS |
| 1346 | | SEC_IN_MEMORY | SEC_LINKER_CREATED |
| 1347 | | SEC_READONLY | SEC_CODE); |
| 1348 | splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", |
| 1349 | flags); |
| 1350 | elf_hash_table (info)->splt = splt; |
| 1351 | if (splt == NULL |
| 1352 | || ! bfd_set_section_alignment (dynobj, splt, 1)) |
| 1353 | return FALSE; |
| 1354 | } |
| 1355 | |
| 1356 | if (h != NULL) |
| 1357 | offset = &h->plt.offset; |
| 1358 | else |
| 1359 | { |
| 1360 | if (local_plt_offsets == NULL) |
| 1361 | { |
| 1362 | size_t size; |
| 1363 | unsigned int i; |
| 1364 | |
| 1365 | size = symtab_hdr->sh_info * sizeof (bfd_vma); |
| 1366 | local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); |
| 1367 | if (local_plt_offsets == NULL) |
| 1368 | return FALSE; |
| 1369 | elf_local_got_offsets (abfd) = local_plt_offsets; |
| 1370 | |
| 1371 | for (i = 0; i < symtab_hdr->sh_info; i++) |
| 1372 | local_plt_offsets[i] = (bfd_vma) -1; |
| 1373 | } |
| 1374 | offset = &local_plt_offsets[r_symndx]; |
| 1375 | } |
| 1376 | |
| 1377 | if (*offset == (bfd_vma) -1) |
| 1378 | { |
| 1379 | *offset = splt->size; |
| 1380 | splt->size += 4; |
| 1381 | } |
| 1382 | break; |
| 1383 | } |
| 1384 | } |
| 1385 | |
| 1386 | return TRUE; |
| 1387 | } |
| 1388 | |
| 1389 | /* This must exist if dynobj is ever set. */ |
| 1390 | |
| 1391 | static bfd_boolean |
| 1392 | rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, |
| 1393 | struct bfd_link_info *info) |
| 1394 | { |
| 1395 | bfd *dynobj; |
| 1396 | asection *splt; |
| 1397 | |
| 1398 | if (!elf_hash_table (info)->dynamic_sections_created) |
| 1399 | return TRUE; |
| 1400 | |
| 1401 | /* As an extra sanity check, verify that all plt entries have been |
| 1402 | filled in. However, relaxing might have changed the relocs so |
| 1403 | that some plt entries don't get filled in, so we have to skip |
| 1404 | this check if we're relaxing. Unfortunately, check_relocs is |
| 1405 | called before relaxation. */ |
| 1406 | |
| 1407 | if (info->relax_trip > 0) |
| 1408 | return TRUE; |
| 1409 | |
| 1410 | dynobj = elf_hash_table (info)->dynobj; |
| 1411 | splt = elf_hash_table (info)->splt; |
| 1412 | if (dynobj != NULL && splt != NULL) |
| 1413 | { |
| 1414 | bfd_byte *contents = splt->contents; |
| 1415 | unsigned int i, size = splt->size; |
| 1416 | |
| 1417 | for (i = 0; i < size; i += 4) |
| 1418 | { |
| 1419 | unsigned int x = bfd_get_32 (dynobj, contents + i); |
| 1420 | BFD_ASSERT (x != 0); |
| 1421 | } |
| 1422 | } |
| 1423 | |
| 1424 | return TRUE; |
| 1425 | } |
| 1426 | |
| 1427 | static bfd_boolean |
| 1428 | rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, |
| 1429 | struct bfd_link_info *info) |
| 1430 | { |
| 1431 | bfd *dynobj; |
| 1432 | asection *splt; |
| 1433 | |
| 1434 | if (bfd_link_relocatable (info)) |
| 1435 | return TRUE; |
| 1436 | |
| 1437 | dynobj = elf_hash_table (info)->dynobj; |
| 1438 | if (dynobj == NULL) |
| 1439 | return TRUE; |
| 1440 | |
| 1441 | splt = elf_hash_table (info)->splt; |
| 1442 | BFD_ASSERT (splt != NULL); |
| 1443 | |
| 1444 | splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); |
| 1445 | if (splt->contents == NULL) |
| 1446 | return FALSE; |
| 1447 | |
| 1448 | return TRUE; |
| 1449 | } |
| 1450 | |
| 1451 | \f |
| 1452 | |
| 1453 | /* Handle relaxing. */ |
| 1454 | |
| 1455 | /* A subroutine of rl78_elf_relax_section. If the global symbol H |
| 1456 | is within the low 64k, remove any entry for it in the plt. */ |
| 1457 | |
| 1458 | struct relax_plt_data |
| 1459 | { |
| 1460 | asection *splt; |
| 1461 | bfd_boolean *again; |
| 1462 | }; |
| 1463 | |
| 1464 | static bfd_boolean |
| 1465 | rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) |
| 1466 | { |
| 1467 | struct relax_plt_data *data = (struct relax_plt_data *) xdata; |
| 1468 | |
| 1469 | if (h->plt.offset != (bfd_vma) -1) |
| 1470 | { |
| 1471 | bfd_vma address; |
| 1472 | |
| 1473 | if (h->root.type == bfd_link_hash_undefined |
| 1474 | || h->root.type == bfd_link_hash_undefweak) |
| 1475 | address = 0; |
| 1476 | else |
| 1477 | address = (h->root.u.def.section->output_section->vma |
| 1478 | + h->root.u.def.section->output_offset |
| 1479 | + h->root.u.def.value); |
| 1480 | |
| 1481 | if (valid_16bit_address (address)) |
| 1482 | { |
| 1483 | h->plt.offset = -1; |
| 1484 | data->splt->size -= 4; |
| 1485 | *data->again = TRUE; |
| 1486 | } |
| 1487 | } |
| 1488 | |
| 1489 | return TRUE; |
| 1490 | } |
| 1491 | |
| 1492 | /* A subroutine of rl78_elf_relax_section. If the global symbol H |
| 1493 | previously had a plt entry, give it a new entry offset. */ |
| 1494 | |
| 1495 | static bfd_boolean |
| 1496 | rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) |
| 1497 | { |
| 1498 | bfd_vma *entry = (bfd_vma *) xdata; |
| 1499 | |
| 1500 | if (h->plt.offset != (bfd_vma) -1) |
| 1501 | { |
| 1502 | h->plt.offset = *entry; |
| 1503 | *entry += 4; |
| 1504 | } |
| 1505 | |
| 1506 | return TRUE; |
| 1507 | } |
| 1508 | |
| 1509 | static bfd_boolean |
| 1510 | rl78_elf_relax_plt_section (bfd *dynobj, |
| 1511 | asection *splt, |
| 1512 | struct bfd_link_info *info, |
| 1513 | bfd_boolean *again) |
| 1514 | { |
| 1515 | struct relax_plt_data relax_plt_data; |
| 1516 | bfd *ibfd; |
| 1517 | |
| 1518 | /* Assume nothing changes. */ |
| 1519 | *again = FALSE; |
| 1520 | |
| 1521 | if (bfd_link_relocatable (info)) |
| 1522 | return TRUE; |
| 1523 | |
| 1524 | /* We only relax the .plt section at the moment. */ |
| 1525 | if (dynobj != elf_hash_table (info)->dynobj |
| 1526 | || strcmp (splt->name, ".plt") != 0) |
| 1527 | return TRUE; |
| 1528 | |
| 1529 | /* Quick check for an empty plt. */ |
| 1530 | if (splt->size == 0) |
| 1531 | return TRUE; |
| 1532 | |
| 1533 | /* Map across all global symbols; see which ones happen to |
| 1534 | fall in the low 64k. */ |
| 1535 | relax_plt_data.splt = splt; |
| 1536 | relax_plt_data.again = again; |
| 1537 | elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, |
| 1538 | &relax_plt_data); |
| 1539 | |
| 1540 | /* Likewise for local symbols, though that's somewhat less convenient |
| 1541 | as we have to walk the list of input bfds and swap in symbol data. */ |
| 1542 | for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) |
| 1543 | { |
| 1544 | bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); |
| 1545 | Elf_Internal_Shdr *symtab_hdr; |
| 1546 | Elf_Internal_Sym *isymbuf = NULL; |
| 1547 | unsigned int idx; |
| 1548 | |
| 1549 | if (! local_plt_offsets) |
| 1550 | continue; |
| 1551 | |
| 1552 | symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; |
| 1553 | if (symtab_hdr->sh_info != 0) |
| 1554 | { |
| 1555 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 1556 | if (isymbuf == NULL) |
| 1557 | isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, |
| 1558 | symtab_hdr->sh_info, 0, |
| 1559 | NULL, NULL, NULL); |
| 1560 | if (isymbuf == NULL) |
| 1561 | return FALSE; |
| 1562 | } |
| 1563 | |
| 1564 | for (idx = 0; idx < symtab_hdr->sh_info; ++idx) |
| 1565 | { |
| 1566 | Elf_Internal_Sym *isym; |
| 1567 | asection *tsec; |
| 1568 | bfd_vma address; |
| 1569 | |
| 1570 | if (local_plt_offsets[idx] == (bfd_vma) -1) |
| 1571 | continue; |
| 1572 | |
| 1573 | isym = &isymbuf[idx]; |
| 1574 | if (isym->st_shndx == SHN_UNDEF) |
| 1575 | continue; |
| 1576 | else if (isym->st_shndx == SHN_ABS) |
| 1577 | tsec = bfd_abs_section_ptr; |
| 1578 | else if (isym->st_shndx == SHN_COMMON) |
| 1579 | tsec = bfd_com_section_ptr; |
| 1580 | else |
| 1581 | tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); |
| 1582 | |
| 1583 | address = (tsec->output_section->vma |
| 1584 | + tsec->output_offset |
| 1585 | + isym->st_value); |
| 1586 | if (valid_16bit_address (address)) |
| 1587 | { |
| 1588 | local_plt_offsets[idx] = -1; |
| 1589 | splt->size -= 4; |
| 1590 | *again = TRUE; |
| 1591 | } |
| 1592 | } |
| 1593 | |
| 1594 | if (isymbuf != NULL |
| 1595 | && symtab_hdr->contents != (unsigned char *) isymbuf) |
| 1596 | { |
| 1597 | if (! info->keep_memory) |
| 1598 | free (isymbuf); |
| 1599 | else |
| 1600 | { |
| 1601 | /* Cache the symbols for elf_link_input_bfd. */ |
| 1602 | symtab_hdr->contents = (unsigned char *) isymbuf; |
| 1603 | } |
| 1604 | } |
| 1605 | } |
| 1606 | |
| 1607 | /* If we changed anything, walk the symbols again to reallocate |
| 1608 | .plt entry addresses. */ |
| 1609 | if (*again && splt->size > 0) |
| 1610 | { |
| 1611 | bfd_vma entry = 0; |
| 1612 | |
| 1613 | elf_link_hash_traverse (elf_hash_table (info), |
| 1614 | rl78_relax_plt_realloc, &entry); |
| 1615 | |
| 1616 | for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) |
| 1617 | { |
| 1618 | bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); |
| 1619 | unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; |
| 1620 | unsigned int idx; |
| 1621 | |
| 1622 | if (! local_plt_offsets) |
| 1623 | continue; |
| 1624 | |
| 1625 | for (idx = 0; idx < nlocals; ++idx) |
| 1626 | if (local_plt_offsets[idx] != (bfd_vma) -1) |
| 1627 | { |
| 1628 | local_plt_offsets[idx] = entry; |
| 1629 | entry += 4; |
| 1630 | } |
| 1631 | } |
| 1632 | } |
| 1633 | |
| 1634 | return TRUE; |
| 1635 | } |
| 1636 | |
| 1637 | /* Delete some bytes from a section while relaxing. */ |
| 1638 | |
| 1639 | static bfd_boolean |
| 1640 | elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, |
| 1641 | Elf_Internal_Rela *alignment_rel, int force_snip) |
| 1642 | { |
| 1643 | Elf_Internal_Shdr * symtab_hdr; |
| 1644 | unsigned int sec_shndx; |
| 1645 | bfd_byte * contents; |
| 1646 | Elf_Internal_Rela * irel; |
| 1647 | Elf_Internal_Rela * irelend; |
| 1648 | Elf_Internal_Sym * isym; |
| 1649 | Elf_Internal_Sym * isymend; |
| 1650 | bfd_vma toaddr; |
| 1651 | unsigned int symcount; |
| 1652 | struct elf_link_hash_entry ** sym_hashes; |
| 1653 | struct elf_link_hash_entry ** end_hashes; |
| 1654 | |
| 1655 | if (!alignment_rel) |
| 1656 | force_snip = 1; |
| 1657 | |
| 1658 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
| 1659 | |
| 1660 | contents = elf_section_data (sec)->this_hdr.contents; |
| 1661 | |
| 1662 | /* The deletion must stop at the next alignment boundary, if |
| 1663 | ALIGNMENT_REL is non-NULL. */ |
| 1664 | toaddr = sec->size; |
| 1665 | if (alignment_rel) |
| 1666 | toaddr = alignment_rel->r_offset; |
| 1667 | |
| 1668 | irel = elf_section_data (sec)->relocs; |
| 1669 | if (irel == NULL) |
| 1670 | { |
| 1671 | _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); |
| 1672 | irel = elf_section_data (sec)->relocs; |
| 1673 | } |
| 1674 | |
| 1675 | irelend = irel + sec->reloc_count; |
| 1676 | |
| 1677 | /* Actually delete the bytes. */ |
| 1678 | memmove (contents + addr, contents + addr + count, |
| 1679 | (size_t) (toaddr - addr - count)); |
| 1680 | |
| 1681 | /* If we don't have an alignment marker to worry about, we can just |
| 1682 | shrink the section. Otherwise, we have to fill in the newly |
| 1683 | created gap with NOP insns (0x03). */ |
| 1684 | if (force_snip) |
| 1685 | sec->size -= count; |
| 1686 | else |
| 1687 | memset (contents + toaddr - count, 0x03, count); |
| 1688 | |
| 1689 | /* Adjust all the relocs. */ |
| 1690 | for (; irel && irel < irelend; irel++) |
| 1691 | { |
| 1692 | /* Get the new reloc address. */ |
| 1693 | if (irel->r_offset > addr |
| 1694 | && (irel->r_offset < toaddr |
| 1695 | || (force_snip && irel->r_offset == toaddr))) |
| 1696 | irel->r_offset -= count; |
| 1697 | |
| 1698 | /* If we see an ALIGN marker at the end of the gap, we move it |
| 1699 | to the beginning of the gap, since marking these gaps is what |
| 1700 | they're for. */ |
| 1701 | if (irel->r_offset == toaddr |
| 1702 | && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX |
| 1703 | && irel->r_addend & RL78_RELAXA_ALIGN) |
| 1704 | irel->r_offset -= count; |
| 1705 | } |
| 1706 | |
| 1707 | /* Adjust the local symbols defined in this section. */ |
| 1708 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
| 1709 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 1710 | isymend = isym + symtab_hdr->sh_info; |
| 1711 | |
| 1712 | for (; isym < isymend; isym++) |
| 1713 | { |
| 1714 | /* If the symbol is in the range of memory we just moved, we |
| 1715 | have to adjust its value. */ |
| 1716 | if (isym->st_shndx == sec_shndx |
| 1717 | && isym->st_value > addr |
| 1718 | && isym->st_value < toaddr) |
| 1719 | isym->st_value -= count; |
| 1720 | |
| 1721 | /* If the symbol *spans* the bytes we just deleted (i.e. it's |
| 1722 | *end* is in the moved bytes but it's *start* isn't), then we |
| 1723 | must adjust its size. */ |
| 1724 | if (isym->st_shndx == sec_shndx |
| 1725 | && isym->st_value < addr |
| 1726 | && isym->st_value + isym->st_size > addr |
| 1727 | && isym->st_value + isym->st_size < toaddr) |
| 1728 | isym->st_size -= count; |
| 1729 | } |
| 1730 | |
| 1731 | /* Now adjust the global symbols defined in this section. */ |
| 1732 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
| 1733 | - symtab_hdr->sh_info); |
| 1734 | sym_hashes = elf_sym_hashes (abfd); |
| 1735 | end_hashes = sym_hashes + symcount; |
| 1736 | |
| 1737 | for (; sym_hashes < end_hashes; sym_hashes++) |
| 1738 | { |
| 1739 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
| 1740 | |
| 1741 | if ((sym_hash->root.type == bfd_link_hash_defined |
| 1742 | || sym_hash->root.type == bfd_link_hash_defweak) |
| 1743 | && sym_hash->root.u.def.section == sec) |
| 1744 | { |
| 1745 | /* As above, adjust the value if needed. */ |
| 1746 | if (sym_hash->root.u.def.value > addr |
| 1747 | && sym_hash->root.u.def.value < toaddr) |
| 1748 | sym_hash->root.u.def.value -= count; |
| 1749 | |
| 1750 | /* As above, adjust the size if needed. */ |
| 1751 | if (sym_hash->root.u.def.value < addr |
| 1752 | && sym_hash->root.u.def.value + sym_hash->size > addr |
| 1753 | && sym_hash->root.u.def.value + sym_hash->size < toaddr) |
| 1754 | sym_hash->size -= count; |
| 1755 | } |
| 1756 | } |
| 1757 | |
| 1758 | return TRUE; |
| 1759 | } |
| 1760 | |
| 1761 | /* Used to sort relocs by address. If relocs have the same address, |
| 1762 | we maintain their relative order, except that R_RL78_RH_RELAX |
| 1763 | alignment relocs must be the first reloc for any given address. */ |
| 1764 | |
| 1765 | static void |
| 1766 | reloc_bubblesort (Elf_Internal_Rela * r, int count) |
| 1767 | { |
| 1768 | int i; |
| 1769 | bfd_boolean again; |
| 1770 | bfd_boolean swappit; |
| 1771 | |
| 1772 | /* This is almost a classic bubblesort. It's the slowest sort, but |
| 1773 | we're taking advantage of the fact that the relocations are |
| 1774 | mostly in order already (the assembler emits them that way) and |
| 1775 | we need relocs with the same address to remain in the same |
| 1776 | relative order. */ |
| 1777 | again = TRUE; |
| 1778 | while (again) |
| 1779 | { |
| 1780 | again = FALSE; |
| 1781 | for (i = 0; i < count - 1; i ++) |
| 1782 | { |
| 1783 | if (r[i].r_offset > r[i + 1].r_offset) |
| 1784 | swappit = TRUE; |
| 1785 | else if (r[i].r_offset < r[i + 1].r_offset) |
| 1786 | swappit = FALSE; |
| 1787 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX |
| 1788 | && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) |
| 1789 | swappit = TRUE; |
| 1790 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX |
| 1791 | && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) |
| 1792 | && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX |
| 1793 | && (r[i].r_addend & RL78_RELAXA_ALIGN))) |
| 1794 | swappit = TRUE; |
| 1795 | else |
| 1796 | swappit = FALSE; |
| 1797 | |
| 1798 | if (swappit) |
| 1799 | { |
| 1800 | Elf_Internal_Rela tmp; |
| 1801 | |
| 1802 | tmp = r[i]; |
| 1803 | r[i] = r[i + 1]; |
| 1804 | r[i + 1] = tmp; |
| 1805 | /* If we do move a reloc back, re-scan to see if it |
| 1806 | needs to be moved even further back. This avoids |
| 1807 | most of the O(n^2) behavior for our cases. */ |
| 1808 | if (i > 0) |
| 1809 | i -= 2; |
| 1810 | again = TRUE; |
| 1811 | } |
| 1812 | } |
| 1813 | } |
| 1814 | } |
| 1815 | |
| 1816 | |
| 1817 | #define OFFSET_FOR_RELOC(rel, lrel, scale) \ |
| 1818 | rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ |
| 1819 | lrel, abfd, sec, link_info, scale) |
| 1820 | |
| 1821 | static bfd_vma |
| 1822 | rl78_offset_for_reloc (bfd * abfd, |
| 1823 | Elf_Internal_Rela * rel, |
| 1824 | Elf_Internal_Shdr * symtab_hdr, |
| 1825 | Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, |
| 1826 | Elf_Internal_Sym * intsyms, |
| 1827 | Elf_Internal_Rela ** lrel, |
| 1828 | bfd * input_bfd, |
| 1829 | asection * input_section, |
| 1830 | struct bfd_link_info * info, |
| 1831 | int * scale) |
| 1832 | { |
| 1833 | bfd_vma symval; |
| 1834 | |
| 1835 | *scale = 1; |
| 1836 | |
| 1837 | /* REL is the first of 1..N relocations. We compute the symbol |
| 1838 | value for each relocation, then combine them if needed. LREL |
| 1839 | gets a pointer to the last relocation used. */ |
| 1840 | while (1) |
| 1841 | { |
| 1842 | unsigned long r_type; |
| 1843 | |
| 1844 | /* Get the value of the symbol referred to by the reloc. */ |
| 1845 | if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) |
| 1846 | { |
| 1847 | /* A local symbol. */ |
| 1848 | Elf_Internal_Sym *isym; |
| 1849 | asection *ssec; |
| 1850 | |
| 1851 | isym = intsyms + ELF32_R_SYM (rel->r_info); |
| 1852 | |
| 1853 | if (isym->st_shndx == SHN_UNDEF) |
| 1854 | ssec = bfd_und_section_ptr; |
| 1855 | else if (isym->st_shndx == SHN_ABS) |
| 1856 | ssec = bfd_abs_section_ptr; |
| 1857 | else if (isym->st_shndx == SHN_COMMON) |
| 1858 | ssec = bfd_com_section_ptr; |
| 1859 | else |
| 1860 | ssec = bfd_section_from_elf_index (abfd, |
| 1861 | isym->st_shndx); |
| 1862 | |
| 1863 | /* Initial symbol value. */ |
| 1864 | symval = isym->st_value; |
| 1865 | |
| 1866 | /* GAS may have made this symbol relative to a section, in |
| 1867 | which case, we have to add the addend to find the |
| 1868 | symbol. */ |
| 1869 | if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) |
| 1870 | symval += rel->r_addend; |
| 1871 | |
| 1872 | if (ssec) |
| 1873 | { |
| 1874 | if ((ssec->flags & SEC_MERGE) |
| 1875 | && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) |
| 1876 | symval = _bfd_merged_section_offset (abfd, & ssec, |
| 1877 | elf_section_data (ssec)->sec_info, |
| 1878 | symval); |
| 1879 | } |
| 1880 | |
| 1881 | /* Now make the offset relative to where the linker is putting it. */ |
| 1882 | if (ssec) |
| 1883 | symval += |
| 1884 | ssec->output_section->vma + ssec->output_offset; |
| 1885 | |
| 1886 | symval += rel->r_addend; |
| 1887 | } |
| 1888 | else |
| 1889 | { |
| 1890 | unsigned long indx; |
| 1891 | struct elf_link_hash_entry * h; |
| 1892 | |
| 1893 | /* An external symbol. */ |
| 1894 | indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; |
| 1895 | h = elf_sym_hashes (abfd)[indx]; |
| 1896 | BFD_ASSERT (h != NULL); |
| 1897 | |
| 1898 | if (h->root.type != bfd_link_hash_defined |
| 1899 | && h->root.type != bfd_link_hash_defweak) |
| 1900 | { |
| 1901 | /* This appears to be a reference to an undefined |
| 1902 | symbol. Just ignore it--it will be caught by the |
| 1903 | regular reloc processing. */ |
| 1904 | if (lrel) |
| 1905 | *lrel = rel; |
| 1906 | return 0; |
| 1907 | } |
| 1908 | |
| 1909 | symval = (h->root.u.def.value |
| 1910 | + h->root.u.def.section->output_section->vma |
| 1911 | + h->root.u.def.section->output_offset); |
| 1912 | |
| 1913 | symval += rel->r_addend; |
| 1914 | } |
| 1915 | |
| 1916 | r_type = ELF32_R_TYPE (rel->r_info); |
| 1917 | switch (r_type) |
| 1918 | { |
| 1919 | case R_RL78_SYM: |
| 1920 | (void) rl78_compute_complex_reloc (r_type, symval, input_section); |
| 1921 | break; |
| 1922 | |
| 1923 | case R_RL78_OPromtop: |
| 1924 | symval = get_romstart (info, input_bfd, input_section, rel->r_offset); |
| 1925 | (void) rl78_compute_complex_reloc (r_type, symval, input_section); |
| 1926 | break; |
| 1927 | |
| 1928 | case R_RL78_OPramtop: |
| 1929 | symval = get_ramstart (info, input_bfd, input_section, rel->r_offset); |
| 1930 | (void) rl78_compute_complex_reloc (r_type, symval, input_section); |
| 1931 | break; |
| 1932 | |
| 1933 | case R_RL78_OPneg: |
| 1934 | case R_RL78_OPadd: |
| 1935 | case R_RL78_OPsub: |
| 1936 | case R_RL78_OPmul: |
| 1937 | case R_RL78_OPdiv: |
| 1938 | case R_RL78_OPshla: |
| 1939 | case R_RL78_OPshra: |
| 1940 | case R_RL78_OPsctsize: |
| 1941 | case R_RL78_OPscttop: |
| 1942 | case R_RL78_OPand: |
| 1943 | case R_RL78_OPor: |
| 1944 | case R_RL78_OPxor: |
| 1945 | case R_RL78_OPnot: |
| 1946 | case R_RL78_OPmod: |
| 1947 | (void) rl78_compute_complex_reloc (r_type, 0, input_section); |
| 1948 | break; |
| 1949 | |
| 1950 | case R_RL78_DIR16UL: |
| 1951 | case R_RL78_DIR8UL: |
| 1952 | case R_RL78_ABS16UL: |
| 1953 | case R_RL78_ABS8UL: |
| 1954 | *scale = 4; |
| 1955 | goto reloc_computes_value; |
| 1956 | |
| 1957 | case R_RL78_DIR16UW: |
| 1958 | case R_RL78_DIR8UW: |
| 1959 | case R_RL78_ABS16UW: |
| 1960 | case R_RL78_ABS8UW: |
| 1961 | *scale = 2; |
| 1962 | goto reloc_computes_value; |
| 1963 | |
| 1964 | default: |
| 1965 | reloc_computes_value: |
| 1966 | symval = rl78_compute_complex_reloc (r_type, symval, input_section); |
| 1967 | /* Fall through. */ |
| 1968 | case R_RL78_DIR32: |
| 1969 | case R_RL78_DIR24S: |
| 1970 | case R_RL78_DIR16: |
| 1971 | case R_RL78_DIR16U: |
| 1972 | case R_RL78_DIR16S: |
| 1973 | case R_RL78_DIR24S_PCREL: |
| 1974 | case R_RL78_DIR16S_PCREL: |
| 1975 | case R_RL78_DIR8S_PCREL: |
| 1976 | if (lrel) |
| 1977 | *lrel = rel; |
| 1978 | return symval; |
| 1979 | } |
| 1980 | |
| 1981 | rel ++; |
| 1982 | } |
| 1983 | } |
| 1984 | |
| 1985 | struct { |
| 1986 | int prefix; /* or -1 for "no prefix" */ |
| 1987 | int insn; /* or -1 for "end of list" */ |
| 1988 | int insn_for_saddr; /* or -1 for "no alternative" */ |
| 1989 | int insn_for_sfr; /* or -1 for "no alternative" */ |
| 1990 | } relax_addr16[] = { |
| 1991 | { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ |
| 1992 | { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ |
| 1993 | { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ |
| 1994 | { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ |
| 1995 | |
| 1996 | { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ |
| 1997 | { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ |
| 1998 | { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ |
| 1999 | { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ |
| 2000 | { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ |
| 2001 | { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ |
| 2002 | { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ |
| 2003 | { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ |
| 2004 | |
| 2005 | { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ |
| 2006 | { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ |
| 2007 | { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ |
| 2008 | { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ |
| 2009 | { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ |
| 2010 | |
| 2011 | { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ |
| 2012 | { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ |
| 2013 | { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ |
| 2014 | { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ |
| 2015 | |
| 2016 | { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ |
| 2017 | { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ |
| 2018 | { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ |
| 2019 | |
| 2020 | { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ |
| 2021 | { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ |
| 2022 | { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ |
| 2023 | { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ |
| 2024 | { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ |
| 2025 | { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ |
| 2026 | |
| 2027 | { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ |
| 2028 | |
| 2029 | { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ |
| 2030 | { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ |
| 2031 | { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ |
| 2032 | { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ |
| 2033 | { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ |
| 2034 | { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ |
| 2035 | { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ |
| 2036 | { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ |
| 2037 | |
| 2038 | { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ |
| 2039 | { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ |
| 2040 | { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ |
| 2041 | { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ |
| 2042 | { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ |
| 2043 | { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ |
| 2044 | { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ |
| 2045 | { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ |
| 2046 | |
| 2047 | { -1, -1, -1, -1 } |
| 2048 | }; |
| 2049 | |
| 2050 | /* Relax one section. */ |
| 2051 | |
| 2052 | static bfd_boolean |
| 2053 | rl78_elf_relax_section |
| 2054 | (bfd * abfd, |
| 2055 | asection * sec, |
| 2056 | struct bfd_link_info * link_info, |
| 2057 | bfd_boolean * again) |
| 2058 | { |
| 2059 | Elf_Internal_Shdr * symtab_hdr; |
| 2060 | Elf_Internal_Shdr * shndx_hdr; |
| 2061 | Elf_Internal_Rela * internal_relocs; |
| 2062 | Elf_Internal_Rela * free_relocs = NULL; |
| 2063 | Elf_Internal_Rela * irel; |
| 2064 | Elf_Internal_Rela * srel; |
| 2065 | Elf_Internal_Rela * irelend; |
| 2066 | Elf_Internal_Rela * next_alignment; |
| 2067 | bfd_byte * contents = NULL; |
| 2068 | bfd_byte * free_contents = NULL; |
| 2069 | Elf_Internal_Sym * intsyms = NULL; |
| 2070 | Elf_Internal_Sym * free_intsyms = NULL; |
| 2071 | Elf_External_Sym_Shndx * shndx_buf = NULL; |
| 2072 | bfd_vma pc; |
| 2073 | bfd_vma symval ATTRIBUTE_UNUSED = 0; |
| 2074 | int pcrel ATTRIBUTE_UNUSED = 0; |
| 2075 | int code ATTRIBUTE_UNUSED = 0; |
| 2076 | int section_alignment_glue; |
| 2077 | int scale; |
| 2078 | |
| 2079 | if (abfd == elf_hash_table (link_info)->dynobj |
| 2080 | && strcmp (sec->name, ".plt") == 0) |
| 2081 | return rl78_elf_relax_plt_section (abfd, sec, link_info, again); |
| 2082 | |
| 2083 | /* Assume nothing changes. */ |
| 2084 | *again = FALSE; |
| 2085 | |
| 2086 | /* We don't have to do anything for a relocatable link, if |
| 2087 | this section does not have relocs, or if this is not a |
| 2088 | code section. */ |
| 2089 | if (bfd_link_relocatable (link_info) |
| 2090 | || (sec->flags & SEC_RELOC) == 0 |
| 2091 | || sec->reloc_count == 0 |
| 2092 | || (sec->flags & SEC_CODE) == 0) |
| 2093 | return TRUE; |
| 2094 | |
| 2095 | symtab_hdr = & elf_symtab_hdr (abfd); |
| 2096 | if (elf_symtab_shndx_list (abfd)) |
| 2097 | shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; |
| 2098 | else |
| 2099 | shndx_hdr = NULL; |
| 2100 | |
| 2101 | /* Get the section contents. */ |
| 2102 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
| 2103 | contents = elf_section_data (sec)->this_hdr.contents; |
| 2104 | /* Go get them off disk. */ |
| 2105 | else |
| 2106 | { |
| 2107 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
| 2108 | goto error_return; |
| 2109 | elf_section_data (sec)->this_hdr.contents = contents; |
| 2110 | } |
| 2111 | |
| 2112 | /* Read this BFD's symbols. */ |
| 2113 | /* Get cached copy if it exists. */ |
| 2114 | if (symtab_hdr->contents != NULL) |
| 2115 | intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 2116 | else |
| 2117 | { |
| 2118 | intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); |
| 2119 | symtab_hdr->contents = (bfd_byte *) intsyms; |
| 2120 | } |
| 2121 | |
| 2122 | if (shndx_hdr && shndx_hdr->sh_size != 0) |
| 2123 | { |
| 2124 | bfd_size_type amt; |
| 2125 | |
| 2126 | amt = symtab_hdr->sh_info; |
| 2127 | amt *= sizeof (Elf_External_Sym_Shndx); |
| 2128 | shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); |
| 2129 | if (shndx_buf == NULL) |
| 2130 | goto error_return; |
| 2131 | if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 |
| 2132 | || bfd_bread (shndx_buf, amt, abfd) != amt) |
| 2133 | goto error_return; |
| 2134 | shndx_hdr->contents = (bfd_byte *) shndx_buf; |
| 2135 | } |
| 2136 | |
| 2137 | /* Get a copy of the native relocations. */ |
| 2138 | internal_relocs = (_bfd_elf_link_read_relocs |
| 2139 | (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, |
| 2140 | link_info->keep_memory)); |
| 2141 | if (internal_relocs == NULL) |
| 2142 | goto error_return; |
| 2143 | if (! link_info->keep_memory) |
| 2144 | free_relocs = internal_relocs; |
| 2145 | |
| 2146 | /* The RL_ relocs must be just before the operand relocs they go |
| 2147 | with, so we must sort them to guarantee this. We use bubblesort |
| 2148 | instead of qsort so we can guarantee that relocs with the same |
| 2149 | address remain in the same relative order. */ |
| 2150 | reloc_bubblesort (internal_relocs, sec->reloc_count); |
| 2151 | |
| 2152 | /* Walk through them looking for relaxing opportunities. */ |
| 2153 | irelend = internal_relocs + sec->reloc_count; |
| 2154 | |
| 2155 | |
| 2156 | /* This will either be NULL or a pointer to the next alignment |
| 2157 | relocation. */ |
| 2158 | next_alignment = internal_relocs; |
| 2159 | |
| 2160 | /* We calculate worst case shrinkage caused by alignment directives. |
| 2161 | No fool-proof, but better than either ignoring the problem or |
| 2162 | doing heavy duty analysis of all the alignment markers in all |
| 2163 | input sections. */ |
| 2164 | section_alignment_glue = 0; |
| 2165 | for (irel = internal_relocs; irel < irelend; irel++) |
| 2166 | if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX |
| 2167 | && irel->r_addend & RL78_RELAXA_ALIGN) |
| 2168 | { |
| 2169 | int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); |
| 2170 | |
| 2171 | if (section_alignment_glue < this_glue) |
| 2172 | section_alignment_glue = this_glue; |
| 2173 | } |
| 2174 | /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte |
| 2175 | shrinkage. */ |
| 2176 | section_alignment_glue *= 2; |
| 2177 | |
| 2178 | for (irel = internal_relocs; irel < irelend; irel++) |
| 2179 | { |
| 2180 | unsigned char *insn; |
| 2181 | int nrelocs; |
| 2182 | |
| 2183 | /* The insns we care about are all marked with one of these. */ |
| 2184 | if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) |
| 2185 | continue; |
| 2186 | |
| 2187 | if (irel->r_addend & RL78_RELAXA_ALIGN |
| 2188 | || next_alignment == internal_relocs) |
| 2189 | { |
| 2190 | /* When we delete bytes, we need to maintain all the alignments |
| 2191 | indicated. In addition, we need to be careful about relaxing |
| 2192 | jumps across alignment boundaries - these displacements |
| 2193 | *grow* when we delete bytes. For now, don't shrink |
| 2194 | displacements across an alignment boundary, just in case. |
| 2195 | Note that this only affects relocations to the same |
| 2196 | section. */ |
| 2197 | next_alignment += 2; |
| 2198 | while (next_alignment < irelend |
| 2199 | && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX |
| 2200 | || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) |
| 2201 | next_alignment ++; |
| 2202 | if (next_alignment >= irelend || next_alignment->r_offset == 0) |
| 2203 | next_alignment = NULL; |
| 2204 | } |
| 2205 | |
| 2206 | /* When we hit alignment markers, see if we've shrunk enough |
| 2207 | before them to reduce the gap without violating the alignment |
| 2208 | requirements. */ |
| 2209 | if (irel->r_addend & RL78_RELAXA_ALIGN) |
| 2210 | { |
| 2211 | /* At this point, the next relocation *should* be the ELIGN |
| 2212 | end marker. */ |
| 2213 | Elf_Internal_Rela *erel = irel + 1; |
| 2214 | unsigned int alignment, nbytes; |
| 2215 | |
| 2216 | if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) |
| 2217 | continue; |
| 2218 | if (!(erel->r_addend & RL78_RELAXA_ELIGN)) |
| 2219 | continue; |
| 2220 | |
| 2221 | alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); |
| 2222 | |
| 2223 | if (erel->r_offset - irel->r_offset < alignment) |
| 2224 | continue; |
| 2225 | |
| 2226 | nbytes = erel->r_offset - irel->r_offset; |
| 2227 | nbytes /= alignment; |
| 2228 | nbytes *= alignment; |
| 2229 | |
| 2230 | elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, |
| 2231 | next_alignment, erel->r_offset == sec->size); |
| 2232 | *again = TRUE; |
| 2233 | |
| 2234 | continue; |
| 2235 | } |
| 2236 | |
| 2237 | if (irel->r_addend & RL78_RELAXA_ELIGN) |
| 2238 | continue; |
| 2239 | |
| 2240 | insn = contents + irel->r_offset; |
| 2241 | |
| 2242 | nrelocs = irel->r_addend & RL78_RELAXA_RNUM; |
| 2243 | |
| 2244 | /* At this point, we have an insn that is a candidate for linker |
| 2245 | relaxation. There are NRELOCS relocs following that may be |
| 2246 | relaxed, although each reloc may be made of more than one |
| 2247 | reloc entry (such as gp-rel symbols). */ |
| 2248 | |
| 2249 | /* Get the value of the symbol referred to by the reloc. Just |
| 2250 | in case this is the last reloc in the list, use the RL's |
| 2251 | addend to choose between this reloc (no addend) or the next |
| 2252 | (yes addend, which means at least one following reloc). */ |
| 2253 | |
| 2254 | /* srel points to the "current" reloction for this insn - |
| 2255 | actually the last reloc for a given operand, which is the one |
| 2256 | we need to update. We check the relaxations in the same |
| 2257 | order that the relocations happen, so we'll just push it |
| 2258 | along as we go. */ |
| 2259 | srel = irel; |
| 2260 | |
| 2261 | pc = sec->output_section->vma + sec->output_offset |
| 2262 | + srel->r_offset; |
| 2263 | |
| 2264 | #define GET_RELOC \ |
| 2265 | BFD_ASSERT (nrelocs > 0); \ |
| 2266 | symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ |
| 2267 | pcrel = symval - pc + srel->r_addend; \ |
| 2268 | nrelocs --; |
| 2269 | |
| 2270 | #define SNIPNR(offset, nbytes) \ |
| 2271 | elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); |
| 2272 | |
| 2273 | #define SNIP(offset, nbytes, newtype) \ |
| 2274 | SNIPNR (offset, nbytes); \ |
| 2275 | srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) |
| 2276 | |
| 2277 | /* The order of these bit tests must match the order that the |
| 2278 | relocs appear in. Since we sorted those by offset, we can |
| 2279 | predict them. */ |
| 2280 | |
| 2281 | /*----------------------------------------------------------------------*/ |
| 2282 | /* EF ad BR $rel8 pcrel |
| 2283 | ED al ah BR !abs16 abs |
| 2284 | EE al ah BR $!rel16 pcrel |
| 2285 | EC al ah as BR !!abs20 abs |
| 2286 | |
| 2287 | FD al ah CALL !abs16 abs |
| 2288 | FE al ah CALL $!rel16 pcrel |
| 2289 | FC al ah as CALL !!abs20 abs |
| 2290 | |
| 2291 | DC ad BC $rel8 |
| 2292 | DE ad BNC $rel8 |
| 2293 | DD ad BZ $rel8 |
| 2294 | DF ad BNZ $rel8 |
| 2295 | 61 C3 ad BH $rel8 |
| 2296 | 61 D3 ad BNH $rel8 |
| 2297 | 61 C8 EF ad SKC ; BR $rel8 |
| 2298 | 61 D8 EF ad SKNC ; BR $rel8 |
| 2299 | 61 E8 EF ad SKZ ; BR $rel8 |
| 2300 | 61 F8 EF ad SKNZ ; BR $rel8 |
| 2301 | 61 E3 EF ad SKH ; BR $rel8 |
| 2302 | 61 F3 EF ad SKNH ; BR $rel8 |
| 2303 | */ |
| 2304 | |
| 2305 | if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) |
| 2306 | { |
| 2307 | /* SKIP opcodes that skip non-branches will have a relax tag |
| 2308 | but no corresponding symbol to relax against; we just |
| 2309 | skip those. */ |
| 2310 | if (irel->r_addend & RL78_RELAXA_RNUM) |
| 2311 | { |
| 2312 | GET_RELOC; |
| 2313 | } |
| 2314 | |
| 2315 | switch (insn[0]) |
| 2316 | { |
| 2317 | case 0xdc: /* BC */ |
| 2318 | case 0xdd: /* BZ */ |
| 2319 | case 0xde: /* BNC */ |
| 2320 | case 0xdf: /* BNZ */ |
| 2321 | if (insn[1] == 0x03 && insn[2] == 0xee /* BR */ |
| 2322 | && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */ |
| 2323 | { |
| 2324 | /* This is a "long" conditional as generated by gas: |
| 2325 | DC 03 EE ad.dr */ |
| 2326 | if (pcrel < 127 |
| 2327 | && pcrel > -127) |
| 2328 | { |
| 2329 | insn[0] ^= 0x02; /* invert conditional */ |
| 2330 | SNIPNR (4, 1); |
| 2331 | SNIP (1, 2, R_RL78_DIR8S_PCREL); |
| 2332 | insn[1] = pcrel; |
| 2333 | *again = TRUE; |
| 2334 | } |
| 2335 | } |
| 2336 | break; |
| 2337 | |
| 2338 | case 0xec: /* BR !!abs20 */ |
| 2339 | |
| 2340 | if (pcrel < 127 |
| 2341 | && pcrel > -127) |
| 2342 | { |
| 2343 | insn[0] = 0xef; |
| 2344 | insn[1] = pcrel; |
| 2345 | SNIP (2, 2, R_RL78_DIR8S_PCREL); |
| 2346 | *again = TRUE; |
| 2347 | } |
| 2348 | else if (symval < 65536) |
| 2349 | { |
| 2350 | insn[0] = 0xed; |
| 2351 | insn[1] = symval & 0xff; |
| 2352 | insn[2] = symval >> 8; |
| 2353 | SNIP (2, 1, R_RL78_DIR16U); |
| 2354 | *again = TRUE; |
| 2355 | } |
| 2356 | else if (pcrel < 32767 |
| 2357 | && pcrel > -32767) |
| 2358 | { |
| 2359 | insn[0] = 0xee; |
| 2360 | insn[1] = pcrel & 0xff; |
| 2361 | insn[2] = pcrel >> 8; |
| 2362 | SNIP (2, 1, R_RL78_DIR16S_PCREL); |
| 2363 | *again = TRUE; |
| 2364 | } |
| 2365 | break; |
| 2366 | |
| 2367 | case 0xee: /* BR $!pcrel16 */ |
| 2368 | case 0xed: /* BR $!abs16 */ |
| 2369 | if (pcrel < 127 |
| 2370 | && pcrel > -127) |
| 2371 | { |
| 2372 | insn[0] = 0xef; |
| 2373 | insn[1] = pcrel; |
| 2374 | SNIP (2, 1, R_RL78_DIR8S_PCREL); |
| 2375 | *again = TRUE; |
| 2376 | } |
| 2377 | break; |
| 2378 | |
| 2379 | case 0xfc: /* CALL !!abs20 */ |
| 2380 | if (symval < 65536) |
| 2381 | { |
| 2382 | insn[0] = 0xfd; |
| 2383 | insn[1] = symval & 0xff; |
| 2384 | insn[2] = symval >> 8; |
| 2385 | SNIP (2, 1, R_RL78_DIR16U); |
| 2386 | *again = TRUE; |
| 2387 | } |
| 2388 | else if (pcrel < 32767 |
| 2389 | && pcrel > -32767) |
| 2390 | { |
| 2391 | insn[0] = 0xfe; |
| 2392 | insn[1] = pcrel & 0xff; |
| 2393 | insn[2] = pcrel >> 8; |
| 2394 | SNIP (2, 1, R_RL78_DIR16S_PCREL); |
| 2395 | *again = TRUE; |
| 2396 | } |
| 2397 | break; |
| 2398 | |
| 2399 | case 0x61: /* PREFIX */ |
| 2400 | /* For SKIP/BR, we change the BR opcode and delete the |
| 2401 | SKIP. That way, we don't have to find and change the |
| 2402 | relocation for the BR. */ |
| 2403 | /* Note that, for the case where we're skipping some |
| 2404 | other insn, we have no "other" reloc but that's safe |
| 2405 | here anyway. */ |
| 2406 | switch (insn[1]) |
| 2407 | { |
| 2408 | case 0xd3: /* BNH */ |
| 2409 | case 0xc3: /* BH */ |
| 2410 | if (insn[2] == 0x03 && insn[3] == 0xee |
| 2411 | && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */ |
| 2412 | { |
| 2413 | /* Another long branch by gas: |
| 2414 | 61 D3 03 EE ad.dr */ |
| 2415 | if (pcrel < 127 |
| 2416 | && pcrel > -127) |
| 2417 | { |
| 2418 | insn[1] ^= 0x10; /* invert conditional */ |
| 2419 | SNIPNR (5, 1); |
| 2420 | SNIP (2, 2, R_RL78_DIR8S_PCREL); |
| 2421 | insn[2] = pcrel; |
| 2422 | *again = TRUE; |
| 2423 | } |
| 2424 | } |
| 2425 | break; |
| 2426 | |
| 2427 | case 0xc8: /* SKC */ |
| 2428 | if (insn[2] == 0xef) |
| 2429 | { |
| 2430 | insn[2] = 0xde; /* BNC */ |
| 2431 | SNIPNR (0, 2); |
| 2432 | } |
| 2433 | break; |
| 2434 | |
| 2435 | case 0xd8: /* SKNC */ |
| 2436 | if (insn[2] == 0xef) |
| 2437 | { |
| 2438 | insn[2] = 0xdc; /* BC */ |
| 2439 | SNIPNR (0, 2); |
| 2440 | } |
| 2441 | break; |
| 2442 | |
| 2443 | case 0xe8: /* SKZ */ |
| 2444 | if (insn[2] == 0xef) |
| 2445 | { |
| 2446 | insn[2] = 0xdf; /* BNZ */ |
| 2447 | SNIPNR (0, 2); |
| 2448 | } |
| 2449 | break; |
| 2450 | |
| 2451 | case 0xf8: /* SKNZ */ |
| 2452 | if (insn[2] == 0xef) |
| 2453 | { |
| 2454 | insn[2] = 0xdd; /* BZ */ |
| 2455 | SNIPNR (0, 2); |
| 2456 | } |
| 2457 | break; |
| 2458 | |
| 2459 | case 0xe3: /* SKH */ |
| 2460 | if (insn[2] == 0xef) |
| 2461 | { |
| 2462 | insn[2] = 0xd3; /* BNH */ |
| 2463 | SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ |
| 2464 | } |
| 2465 | break; |
| 2466 | |
| 2467 | case 0xf3: /* SKNH */ |
| 2468 | if (insn[2] == 0xef) |
| 2469 | { |
| 2470 | insn[2] = 0xc3; /* BH */ |
| 2471 | SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ |
| 2472 | } |
| 2473 | break; |
| 2474 | } |
| 2475 | break; |
| 2476 | } |
| 2477 | } |
| 2478 | |
| 2479 | if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 |
| 2480 | && nrelocs > 0) |
| 2481 | { |
| 2482 | /*----------------------------------------------------------------------*/ |
| 2483 | /* Some insns have both a 16-bit address operand and an 8-bit |
| 2484 | variant if the address is within a special range: |
| 2485 | |
| 2486 | Address 16-bit operand SADDR range SFR range |
| 2487 | FFF00-FFFFF 0xff00-0xffff 0x00-0xff |
| 2488 | FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff |
| 2489 | |
| 2490 | The RELAX_ADDR16[] array has the insn encodings for the |
| 2491 | 16-bit operand version, as well as the SFR and SADDR |
| 2492 | variants. We only need to replace the encodings and |
| 2493 | adjust the operand. |
| 2494 | |
| 2495 | Note: we intentionally do not attempt to decode and skip |
| 2496 | any ES: prefix, as adding ES: means the addr16 (likely) |
| 2497 | no longer points to saddr/sfr space. |
| 2498 | */ |
| 2499 | |
| 2500 | int is_sfr; |
| 2501 | int is_saddr; |
| 2502 | int idx; |
| 2503 | int poff; |
| 2504 | |
| 2505 | GET_RELOC; |
| 2506 | |
| 2507 | if (0xffe20 <= symval && symval <= 0xfffff) |
| 2508 | { |
| 2509 | |
| 2510 | is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); |
| 2511 | is_sfr = (0xfff00 <= symval && symval <= 0xfffff); |
| 2512 | |
| 2513 | for (idx = 0; relax_addr16[idx].insn != -1; idx ++) |
| 2514 | { |
| 2515 | if (relax_addr16[idx].prefix != -1 |
| 2516 | && insn[0] == relax_addr16[idx].prefix |
| 2517 | && insn[1] == relax_addr16[idx].insn) |
| 2518 | { |
| 2519 | poff = 1; |
| 2520 | } |
| 2521 | else if (relax_addr16[idx].prefix == -1 |
| 2522 | && insn[0] == relax_addr16[idx].insn) |
| 2523 | { |
| 2524 | poff = 0; |
| 2525 | } |
| 2526 | else |
| 2527 | continue; |
| 2528 | |
| 2529 | /* We have a matched insn, and poff is 0 or 1 depending |
| 2530 | on the base pattern size. */ |
| 2531 | |
| 2532 | if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) |
| 2533 | { |
| 2534 | insn[poff] = relax_addr16[idx].insn_for_sfr; |
| 2535 | SNIP (poff+2, 1, R_RL78_RH_SFR); |
| 2536 | } |
| 2537 | |
| 2538 | else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) |
| 2539 | { |
| 2540 | insn[poff] = relax_addr16[idx].insn_for_saddr; |
| 2541 | SNIP (poff+2, 1, R_RL78_RH_SADDR); |
| 2542 | } |
| 2543 | } |
| 2544 | } |
| 2545 | } |
| 2546 | /*----------------------------------------------------------------------*/ |
| 2547 | } |
| 2548 | |
| 2549 | return TRUE; |
| 2550 | |
| 2551 | error_return: |
| 2552 | if (free_relocs != NULL) |
| 2553 | free (free_relocs); |
| 2554 | |
| 2555 | if (free_contents != NULL) |
| 2556 | free (free_contents); |
| 2557 | |
| 2558 | if (shndx_buf != NULL) |
| 2559 | { |
| 2560 | shndx_hdr->contents = NULL; |
| 2561 | free (shndx_buf); |
| 2562 | } |
| 2563 | |
| 2564 | if (free_intsyms != NULL) |
| 2565 | free (free_intsyms); |
| 2566 | |
| 2567 | return TRUE; |
| 2568 | } |
| 2569 | |
| 2570 | \f |
| 2571 | |
| 2572 | #define ELF_ARCH bfd_arch_rl78 |
| 2573 | #define ELF_MACHINE_CODE EM_RL78 |
| 2574 | #define ELF_MAXPAGESIZE 0x1000 |
| 2575 | |
| 2576 | #define TARGET_LITTLE_SYM rl78_elf32_vec |
| 2577 | #define TARGET_LITTLE_NAME "elf32-rl78" |
| 2578 | |
| 2579 | #define elf_info_to_howto_rel NULL |
| 2580 | #define elf_info_to_howto rl78_info_to_howto_rela |
| 2581 | #define elf_backend_object_p rl78_elf_object_p |
| 2582 | #define elf_backend_relocate_section rl78_elf_relocate_section |
| 2583 | #define elf_symbol_leading_char ('_') |
| 2584 | #define elf_backend_can_gc_sections 1 |
| 2585 | |
| 2586 | #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup |
| 2587 | #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup |
| 2588 | #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags |
| 2589 | #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data |
| 2590 | #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data |
| 2591 | |
| 2592 | #define bfd_elf32_bfd_relax_section rl78_elf_relax_section |
| 2593 | #define elf_backend_check_relocs rl78_elf_check_relocs |
| 2594 | #define elf_backend_always_size_sections \ |
| 2595 | rl78_elf_always_size_sections |
| 2596 | #define elf_backend_finish_dynamic_sections \ |
| 2597 | rl78_elf_finish_dynamic_sections |
| 2598 | |
| 2599 | #include "elf32-target.h" |