| 1 | /* Renesas RX specific support for 32-bit ELF. |
| 2 | Copyright (C) 2008, 2009 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of BFD, the Binary File Descriptor library. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 20 | |
| 21 | #include "sysdep.h" |
| 22 | #include "bfd.h" |
| 23 | #include "libbfd.h" |
| 24 | #include "elf-bfd.h" |
| 25 | #include "elf/rx.h" |
| 26 | #include "libiberty.h" |
| 27 | |
| 28 | #define RX_OPCODE_BIG_ENDIAN 0 |
| 29 | |
| 30 | #ifdef DEBUG |
| 31 | char * rx_get_reloc (long); |
| 32 | void dump_symtab (bfd *, void *, void *); |
| 33 | #endif |
| 34 | |
| 35 | #define RXREL(n,sz,bit,shift,complain,pcrel) \ |
| 36 | HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ |
| 37 | bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE) |
| 38 | |
| 39 | /* Note that the relocations around 0x7f are internal to this file; |
| 40 | feel free to move them as needed to avoid conflicts with published |
| 41 | relocation numbers. */ |
| 42 | |
| 43 | static reloc_howto_type rx_elf_howto_table [] = |
| 44 | { |
| 45 | RXREL (NONE, 0, 0, 0, dont, FALSE), |
| 46 | RXREL (DIR32, 2, 32, 0, signed, FALSE), |
| 47 | RXREL (DIR24S, 2, 24, 0, signed, FALSE), |
| 48 | RXREL (DIR16, 1, 16, 0, dont, FALSE), |
| 49 | RXREL (DIR16U, 1, 16, 0, unsigned, FALSE), |
| 50 | RXREL (DIR16S, 1, 16, 0, signed, FALSE), |
| 51 | RXREL (DIR8, 0, 8, 0, dont, FALSE), |
| 52 | RXREL (DIR8U, 0, 8, 0, unsigned, FALSE), |
| 53 | RXREL (DIR8S, 0, 8, 0, signed, FALSE), |
| 54 | RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), |
| 55 | RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), |
| 56 | RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), |
| 57 | RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE), |
| 58 | RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE), |
| 59 | RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE), |
| 60 | RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE), |
| 61 | RXREL (DIR32_REV, 1, 16, 0, dont, FALSE), |
| 62 | RXREL (DIR16_REV, 1, 16, 0, dont, FALSE), |
| 63 | RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), |
| 64 | |
| 65 | EMPTY_HOWTO (0x13), |
| 66 | EMPTY_HOWTO (0x14), |
| 67 | EMPTY_HOWTO (0x15), |
| 68 | EMPTY_HOWTO (0x16), |
| 69 | EMPTY_HOWTO (0x17), |
| 70 | EMPTY_HOWTO (0x18), |
| 71 | EMPTY_HOWTO (0x19), |
| 72 | EMPTY_HOWTO (0x1a), |
| 73 | EMPTY_HOWTO (0x1b), |
| 74 | EMPTY_HOWTO (0x1c), |
| 75 | EMPTY_HOWTO (0x1d), |
| 76 | EMPTY_HOWTO (0x1e), |
| 77 | EMPTY_HOWTO (0x1f), |
| 78 | |
| 79 | RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE), |
| 80 | RXREL (RH_16_OP, 1, 16, 0, signed, FALSE), |
| 81 | RXREL (RH_24_OP, 2, 24, 0, signed, FALSE), |
| 82 | RXREL (RH_32_OP, 2, 32, 0, signed, FALSE), |
| 83 | RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE), |
| 84 | RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE), |
| 85 | RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE), |
| 86 | RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE), |
| 87 | RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE), |
| 88 | RXREL (RH_DIFF, 2, 32, 0, signed, FALSE), |
| 89 | RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE), |
| 90 | RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE), |
| 91 | RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE), |
| 92 | RXREL (RH_RELAX, 0, 0, 0, dont, FALSE), |
| 93 | |
| 94 | EMPTY_HOWTO (0x2e), |
| 95 | EMPTY_HOWTO (0x2f), |
| 96 | EMPTY_HOWTO (0x30), |
| 97 | EMPTY_HOWTO (0x31), |
| 98 | EMPTY_HOWTO (0x32), |
| 99 | EMPTY_HOWTO (0x33), |
| 100 | EMPTY_HOWTO (0x34), |
| 101 | EMPTY_HOWTO (0x35), |
| 102 | EMPTY_HOWTO (0x36), |
| 103 | EMPTY_HOWTO (0x37), |
| 104 | EMPTY_HOWTO (0x38), |
| 105 | EMPTY_HOWTO (0x39), |
| 106 | EMPTY_HOWTO (0x3a), |
| 107 | EMPTY_HOWTO (0x3b), |
| 108 | EMPTY_HOWTO (0x3c), |
| 109 | EMPTY_HOWTO (0x3d), |
| 110 | EMPTY_HOWTO (0x3e), |
| 111 | EMPTY_HOWTO (0x3f), |
| 112 | EMPTY_HOWTO (0x40), |
| 113 | |
| 114 | RXREL (ABS32, 2, 32, 0, dont, FALSE), |
| 115 | RXREL (ABS24S, 2, 24, 0, signed, FALSE), |
| 116 | RXREL (ABS16, 1, 16, 0, dont, FALSE), |
| 117 | RXREL (ABS16U, 1, 16, 0, unsigned, FALSE), |
| 118 | RXREL (ABS16S, 1, 16, 0, signed, FALSE), |
| 119 | RXREL (ABS8, 0, 8, 0, dont, FALSE), |
| 120 | RXREL (ABS8U, 0, 8, 0, unsigned, FALSE), |
| 121 | RXREL (ABS8S, 0, 8, 0, signed, FALSE), |
| 122 | RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), |
| 123 | RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), |
| 124 | RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), |
| 125 | RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE), |
| 126 | RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE), |
| 127 | RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE), |
| 128 | RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE), |
| 129 | RXREL (ABS32_REV, 2, 32, 0, dont, FALSE), |
| 130 | RXREL (ABS16_REV, 1, 16, 0, dont, FALSE), |
| 131 | |
| 132 | #define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32) |
| 133 | |
| 134 | EMPTY_HOWTO (0x52), |
| 135 | EMPTY_HOWTO (0x53), |
| 136 | EMPTY_HOWTO (0x54), |
| 137 | EMPTY_HOWTO (0x55), |
| 138 | EMPTY_HOWTO (0x56), |
| 139 | EMPTY_HOWTO (0x57), |
| 140 | EMPTY_HOWTO (0x58), |
| 141 | EMPTY_HOWTO (0x59), |
| 142 | EMPTY_HOWTO (0x5a), |
| 143 | EMPTY_HOWTO (0x5b), |
| 144 | EMPTY_HOWTO (0x5c), |
| 145 | EMPTY_HOWTO (0x5d), |
| 146 | EMPTY_HOWTO (0x5e), |
| 147 | EMPTY_HOWTO (0x5f), |
| 148 | EMPTY_HOWTO (0x60), |
| 149 | EMPTY_HOWTO (0x61), |
| 150 | EMPTY_HOWTO (0x62), |
| 151 | EMPTY_HOWTO (0x63), |
| 152 | EMPTY_HOWTO (0x64), |
| 153 | EMPTY_HOWTO (0x65), |
| 154 | EMPTY_HOWTO (0x66), |
| 155 | EMPTY_HOWTO (0x67), |
| 156 | EMPTY_HOWTO (0x68), |
| 157 | EMPTY_HOWTO (0x69), |
| 158 | EMPTY_HOWTO (0x6a), |
| 159 | EMPTY_HOWTO (0x6b), |
| 160 | EMPTY_HOWTO (0x6c), |
| 161 | EMPTY_HOWTO (0x6d), |
| 162 | EMPTY_HOWTO (0x6e), |
| 163 | EMPTY_HOWTO (0x6f), |
| 164 | EMPTY_HOWTO (0x70), |
| 165 | EMPTY_HOWTO (0x71), |
| 166 | EMPTY_HOWTO (0x72), |
| 167 | EMPTY_HOWTO (0x73), |
| 168 | EMPTY_HOWTO (0x74), |
| 169 | EMPTY_HOWTO (0x75), |
| 170 | EMPTY_HOWTO (0x76), |
| 171 | EMPTY_HOWTO (0x77), |
| 172 | |
| 173 | /* These are internal. */ |
| 174 | /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */ |
| 175 | /* ---- ---- 4--- 3210. */ |
| 176 | #define R_RX_RH_ABS5p8B 0x78 |
| 177 | RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE), |
| 178 | #define R_RX_RH_ABS5p8W 0x79 |
| 179 | RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE), |
| 180 | #define R_RX_RH_ABS5p8L 0x7a |
| 181 | RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE), |
| 182 | /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */ |
| 183 | /* ---- -432 1--- 0---. */ |
| 184 | #define R_RX_RH_ABS5p5B 0x7b |
| 185 | RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE), |
| 186 | #define R_RX_RH_ABS5p5W 0x7c |
| 187 | RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE), |
| 188 | #define R_RX_RH_ABS5p5L 0x7d |
| 189 | RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE), |
| 190 | /* A 4-bit unsigned immediate at bit position 8. */ |
| 191 | #define R_RX_RH_UIMM4p8 0x7e |
| 192 | RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE), |
| 193 | /* A 4-bit negative unsigned immediate at bit position 8. */ |
| 194 | #define R_RX_RH_UNEG4p8 0x7f |
| 195 | RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE), |
| 196 | /* End of internal relocs. */ |
| 197 | |
| 198 | RXREL (SYM, 2, 32, 0, dont, FALSE), |
| 199 | RXREL (OPneg, 2, 32, 0, dont, FALSE), |
| 200 | RXREL (OPadd, 2, 32, 0, dont, FALSE), |
| 201 | RXREL (OPsub, 2, 32, 0, dont, FALSE), |
| 202 | RXREL (OPmul, 2, 32, 0, dont, FALSE), |
| 203 | RXREL (OPdiv, 2, 32, 0, dont, FALSE), |
| 204 | RXREL (OPshla, 2, 32, 0, dont, FALSE), |
| 205 | RXREL (OPshra, 2, 32, 0, dont, FALSE), |
| 206 | RXREL (OPsctsize, 2, 32, 0, dont, FALSE), |
| 207 | RXREL (OPscttop, 2, 32, 0, dont, FALSE), |
| 208 | RXREL (OPand, 2, 32, 0, dont, FALSE), |
| 209 | RXREL (OPor, 2, 32, 0, dont, FALSE), |
| 210 | RXREL (OPxor, 2, 32, 0, dont, FALSE), |
| 211 | RXREL (OPnot, 2, 32, 0, dont, FALSE), |
| 212 | RXREL (OPmod, 2, 32, 0, dont, FALSE), |
| 213 | RXREL (OPromtop, 2, 32, 0, dont, FALSE), |
| 214 | RXREL (OPramtop, 2, 32, 0, dont, FALSE) |
| 215 | }; |
| 216 | \f |
| 217 | /* Map BFD reloc types to RX ELF reloc types. */ |
| 218 | |
| 219 | struct rx_reloc_map |
| 220 | { |
| 221 | bfd_reloc_code_real_type bfd_reloc_val; |
| 222 | unsigned int rx_reloc_val; |
| 223 | }; |
| 224 | |
| 225 | static const struct rx_reloc_map rx_reloc_map [] = |
| 226 | { |
| 227 | { BFD_RELOC_NONE, R_RX_NONE }, |
| 228 | { BFD_RELOC_8, R_RX_DIR8S }, |
| 229 | { BFD_RELOC_16, R_RX_DIR16S }, |
| 230 | { BFD_RELOC_24, R_RX_DIR24S }, |
| 231 | { BFD_RELOC_32, R_RX_DIR32 }, |
| 232 | { BFD_RELOC_RX_16_OP, R_RX_DIR16 }, |
| 233 | { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL }, |
| 234 | { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL }, |
| 235 | { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL }, |
| 236 | { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL }, |
| 237 | { BFD_RELOC_RX_8U, R_RX_DIR8U }, |
| 238 | { BFD_RELOC_RX_16U, R_RX_DIR16U }, |
| 239 | { BFD_RELOC_RX_24U, R_RX_RH_24_UNS }, |
| 240 | { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG }, |
| 241 | { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG }, |
| 242 | { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG }, |
| 243 | { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG }, |
| 244 | { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF }, |
| 245 | { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB }, |
| 246 | { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW }, |
| 247 | { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL }, |
| 248 | { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX }, |
| 249 | { BFD_RELOC_RX_SYM, R_RX_SYM }, |
| 250 | { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub }, |
| 251 | { BFD_RELOC_RX_ABS8, R_RX_ABS8 }, |
| 252 | { BFD_RELOC_RX_ABS16, R_RX_ABS16 }, |
| 253 | { BFD_RELOC_RX_ABS32, R_RX_ABS32 }, |
| 254 | { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL }, |
| 255 | { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW }, |
| 256 | { BFD_RELOC_RX_ABS16U, R_RX_ABS16U } |
| 257 | }; |
| 258 | |
| 259 | #define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG) |
| 260 | |
| 261 | static reloc_howto_type * |
| 262 | rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
| 263 | bfd_reloc_code_real_type code) |
| 264 | { |
| 265 | unsigned int i; |
| 266 | |
| 267 | if (code == BFD_RELOC_RX_32_OP) |
| 268 | return rx_elf_howto_table + R_RX_DIR32; |
| 269 | |
| 270 | for (i = ARRAY_SIZE (rx_reloc_map); --i;) |
| 271 | if (rx_reloc_map [i].bfd_reloc_val == code) |
| 272 | return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val; |
| 273 | |
| 274 | return NULL; |
| 275 | } |
| 276 | |
| 277 | static reloc_howto_type * |
| 278 | rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) |
| 279 | { |
| 280 | unsigned int i; |
| 281 | |
| 282 | for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++) |
| 283 | if (rx_elf_howto_table[i].name != NULL |
| 284 | && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0) |
| 285 | return rx_elf_howto_table + i; |
| 286 | |
| 287 | return NULL; |
| 288 | } |
| 289 | |
| 290 | /* Set the howto pointer for an RX ELF reloc. */ |
| 291 | |
| 292 | static void |
| 293 | rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, |
| 294 | arelent * cache_ptr, |
| 295 | Elf_Internal_Rela * dst) |
| 296 | { |
| 297 | unsigned int r_type; |
| 298 | |
| 299 | r_type = ELF32_R_TYPE (dst->r_info); |
| 300 | BFD_ASSERT (r_type < (unsigned int) R_RX_max); |
| 301 | cache_ptr->howto = rx_elf_howto_table + r_type; |
| 302 | } |
| 303 | \f |
| 304 | static bfd_vma |
| 305 | get_symbol_value (const char * name, |
| 306 | bfd_reloc_status_type * stat, |
| 307 | struct bfd_link_info * info, |
| 308 | bfd * input_bfd, |
| 309 | asection * input_section, |
| 310 | int offset) |
| 311 | { |
| 312 | bfd_vma value = 0; |
| 313 | struct bfd_link_hash_entry * h; |
| 314 | |
| 315 | h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); |
| 316 | |
| 317 | if (h == NULL |
| 318 | || (h->type != bfd_link_hash_defined |
| 319 | && h->type != bfd_link_hash_defweak)) |
| 320 | * stat = info->callbacks->undefined_symbol |
| 321 | (info, name, input_bfd, input_section, offset, TRUE); |
| 322 | else |
| 323 | value = (h->u.def.value |
| 324 | + h->u.def.section->output_section->vma |
| 325 | + h->u.def.section->output_offset); |
| 326 | |
| 327 | return value; |
| 328 | } |
| 329 | |
| 330 | static bfd_vma |
| 331 | get_gp (bfd_reloc_status_type * stat, |
| 332 | struct bfd_link_info * info, |
| 333 | bfd * abfd, |
| 334 | asection * sec, |
| 335 | int offset) |
| 336 | { |
| 337 | static bfd_boolean cached = FALSE; |
| 338 | static bfd_vma cached_value = 0; |
| 339 | |
| 340 | if (!cached) |
| 341 | { |
| 342 | cached_value = get_symbol_value ("__gp", stat, info, abfd, sec, offset); |
| 343 | cached = TRUE; |
| 344 | } |
| 345 | return cached_value; |
| 346 | } |
| 347 | |
| 348 | static bfd_vma |
| 349 | get_romstart (bfd_reloc_status_type * stat, |
| 350 | struct bfd_link_info * info, |
| 351 | bfd * abfd, |
| 352 | asection * sec, |
| 353 | int offset) |
| 354 | { |
| 355 | static bfd_boolean cached = FALSE; |
| 356 | static bfd_vma cached_value = 0; |
| 357 | |
| 358 | if (!cached) |
| 359 | { |
| 360 | cached_value = get_symbol_value ("_start", stat, info, abfd, sec, offset); |
| 361 | cached = TRUE; |
| 362 | } |
| 363 | return cached_value; |
| 364 | } |
| 365 | |
| 366 | static bfd_vma |
| 367 | get_ramstart (bfd_reloc_status_type * stat, |
| 368 | struct bfd_link_info * info, |
| 369 | bfd * abfd, |
| 370 | asection * sec, |
| 371 | int offset) |
| 372 | { |
| 373 | static bfd_boolean cached = FALSE; |
| 374 | static bfd_vma cached_value = 0; |
| 375 | |
| 376 | if (!cached) |
| 377 | { |
| 378 | cached_value = get_symbol_value ("__datastart", stat, info, abfd, sec, offset); |
| 379 | cached = TRUE; |
| 380 | } |
| 381 | return cached_value; |
| 382 | } |
| 383 | |
| 384 | #define NUM_STACK_ENTRIES 16 |
| 385 | static int32_t rx_stack [ NUM_STACK_ENTRIES ]; |
| 386 | static unsigned int rx_stack_top; |
| 387 | |
| 388 | #define RX_STACK_PUSH(val) \ |
| 389 | do \ |
| 390 | { \ |
| 391 | if (rx_stack_top < NUM_STACK_ENTRIES) \ |
| 392 | rx_stack [rx_stack_top ++] = (val); \ |
| 393 | else \ |
| 394 | r = bfd_reloc_dangerous; \ |
| 395 | } \ |
| 396 | while (0) |
| 397 | |
| 398 | #define RX_STACK_POP(dest) \ |
| 399 | do \ |
| 400 | { \ |
| 401 | if (rx_stack_top > 0) \ |
| 402 | (dest) = rx_stack [-- rx_stack_top]; \ |
| 403 | else \ |
| 404 | (dest) = 0, r = bfd_reloc_dangerous; \ |
| 405 | } \ |
| 406 | while (0) |
| 407 | |
| 408 | /* Relocate an RX ELF section. |
| 409 | There is some attempt to make this function usable for many architectures, |
| 410 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], |
| 411 | if only to serve as a learning tool. |
| 412 | |
| 413 | The RELOCATE_SECTION function is called by the new ELF backend linker |
| 414 | to handle the relocations for a section. |
| 415 | |
| 416 | The relocs are always passed as Rela structures; if the section |
| 417 | actually uses Rel structures, the r_addend field will always be |
| 418 | zero. |
| 419 | |
| 420 | This function is responsible for adjusting the section contents as |
| 421 | necessary, and (if using Rela relocs and generating a relocatable |
| 422 | output file) adjusting the reloc addend as necessary. |
| 423 | |
| 424 | This function does not have to worry about setting the reloc |
| 425 | address or the reloc symbol index. |
| 426 | |
| 427 | LOCAL_SYMS is a pointer to the swapped in local symbols. |
| 428 | |
| 429 | LOCAL_SECTIONS is an array giving the section in the input file |
| 430 | corresponding to the st_shndx field of each local symbol. |
| 431 | |
| 432 | The global hash table entry for the global symbols can be found |
| 433 | via elf_sym_hashes (input_bfd). |
| 434 | |
| 435 | When generating relocatable output, this function must handle |
| 436 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is |
| 437 | going to be the section symbol corresponding to the output |
| 438 | section, which means that the addend must be adjusted |
| 439 | accordingly. */ |
| 440 | |
| 441 | static bfd_boolean |
| 442 | rx_elf_relocate_section |
| 443 | (bfd * output_bfd, |
| 444 | struct bfd_link_info * info, |
| 445 | bfd * input_bfd, |
| 446 | asection * input_section, |
| 447 | bfd_byte * contents, |
| 448 | Elf_Internal_Rela * relocs, |
| 449 | Elf_Internal_Sym * local_syms, |
| 450 | asection ** local_sections) |
| 451 | { |
| 452 | Elf_Internal_Shdr * symtab_hdr; |
| 453 | struct elf_link_hash_entry ** sym_hashes; |
| 454 | Elf_Internal_Rela * rel; |
| 455 | Elf_Internal_Rela * relend; |
| 456 | bfd * dynobj; |
| 457 | asection * splt; |
| 458 | |
| 459 | symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; |
| 460 | sym_hashes = elf_sym_hashes (input_bfd); |
| 461 | relend = relocs + input_section->reloc_count; |
| 462 | |
| 463 | dynobj = elf_hash_table (info)->dynobj; |
| 464 | splt = NULL; |
| 465 | if (dynobj != NULL) |
| 466 | splt = bfd_get_section_by_name (dynobj, ".plt"); |
| 467 | |
| 468 | for (rel = relocs; rel < relend; rel ++) |
| 469 | { |
| 470 | reloc_howto_type * howto; |
| 471 | unsigned long r_symndx; |
| 472 | Elf_Internal_Sym * sym; |
| 473 | asection * sec; |
| 474 | struct elf_link_hash_entry * h; |
| 475 | bfd_vma relocation; |
| 476 | bfd_reloc_status_type r; |
| 477 | const char * name = NULL; |
| 478 | bfd_boolean unresolved_reloc = TRUE; |
| 479 | int r_type; |
| 480 | |
| 481 | r_type = ELF32_R_TYPE (rel->r_info); |
| 482 | r_symndx = ELF32_R_SYM (rel->r_info); |
| 483 | |
| 484 | howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info); |
| 485 | h = NULL; |
| 486 | sym = NULL; |
| 487 | sec = NULL; |
| 488 | relocation = 0; |
| 489 | |
| 490 | if (r_symndx < symtab_hdr->sh_info) |
| 491 | { |
| 492 | sym = local_syms + r_symndx; |
| 493 | sec = local_sections [r_symndx]; |
| 494 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); |
| 495 | |
| 496 | name = bfd_elf_string_from_elf_section |
| 497 | (input_bfd, symtab_hdr->sh_link, sym->st_name); |
| 498 | name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; |
| 499 | } |
| 500 | else |
| 501 | { |
| 502 | bfd_boolean warned; |
| 503 | |
| 504 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
| 505 | r_symndx, symtab_hdr, sym_hashes, h, |
| 506 | sec, relocation, unresolved_reloc, |
| 507 | warned); |
| 508 | |
| 509 | name = h->root.root.string; |
| 510 | } |
| 511 | |
| 512 | if (sec != NULL && elf_discarded_section (sec)) |
| 513 | { |
| 514 | /* For relocs against symbols from removed linkonce sections, |
| 515 | or sections discarded by a linker script, we just want the |
| 516 | section contents zeroed. Avoid any special processing. */ |
| 517 | _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset); |
| 518 | rel->r_info = 0; |
| 519 | rel->r_addend = 0; |
| 520 | continue; |
| 521 | } |
| 522 | |
| 523 | if (info->relocatable) |
| 524 | { |
| 525 | /* This is a relocatable link. We don't have to change |
| 526 | anything, unless the reloc is against a section symbol, |
| 527 | in which case we have to adjust according to where the |
| 528 | section symbol winds up in the output section. */ |
| 529 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) |
| 530 | rel->r_addend += sec->output_offset; |
| 531 | continue; |
| 532 | } |
| 533 | |
| 534 | if (h != NULL && h->root.type == bfd_link_hash_undefweak) |
| 535 | /* If the symbol is undefined and weak |
| 536 | then the relocation resolves to zero. */ |
| 537 | relocation = 0; |
| 538 | else |
| 539 | { |
| 540 | if (howto->pc_relative) |
| 541 | { |
| 542 | relocation -= (input_section->output_section->vma |
| 543 | + input_section->output_offset |
| 544 | + rel->r_offset); |
| 545 | if (r_type != R_RX_RH_3_PCREL |
| 546 | && r_type != R_RX_DIR3U_PCREL) |
| 547 | relocation ++; |
| 548 | } |
| 549 | |
| 550 | relocation += rel->r_addend; |
| 551 | } |
| 552 | |
| 553 | r = bfd_reloc_ok; |
| 554 | |
| 555 | #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow |
| 556 | #define ALIGN(m) if (relocation & m) r = bfd_reloc_other; |
| 557 | #define OP(i) (contents[rel->r_offset + (i)]) |
| 558 | #define WARN_REDHAT(type) \ |
| 559 | _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \ |
| 560 | input_bfd, input_section, name) |
| 561 | |
| 562 | /* Opcode relocs are always big endian. Data relocs are bi-endian. */ |
| 563 | switch (r_type) |
| 564 | { |
| 565 | case R_RX_NONE: |
| 566 | break; |
| 567 | |
| 568 | case R_RX_RH_RELAX: |
| 569 | break; |
| 570 | |
| 571 | case R_RX_RH_3_PCREL: |
| 572 | WARN_REDHAT ("RX_RH_3_PCREL"); |
| 573 | RANGE (3, 10); |
| 574 | OP (0) &= 0xf8; |
| 575 | OP (0) |= relocation & 0x07; |
| 576 | break; |
| 577 | |
| 578 | case R_RX_RH_8_NEG: |
| 579 | WARN_REDHAT ("RX_RH_8_NEG"); |
| 580 | relocation = - relocation; |
| 581 | case R_RX_DIR8S_PCREL: |
| 582 | RANGE (-128, 127); |
| 583 | OP (0) = relocation; |
| 584 | break; |
| 585 | |
| 586 | case R_RX_DIR8S: |
| 587 | RANGE (-128, 255); |
| 588 | OP (0) = relocation; |
| 589 | break; |
| 590 | |
| 591 | case R_RX_DIR8U: |
| 592 | RANGE (0, 255); |
| 593 | OP (0) = relocation; |
| 594 | break; |
| 595 | |
| 596 | case R_RX_RH_16_NEG: |
| 597 | WARN_REDHAT ("RX_RH_16_NEG"); |
| 598 | relocation = - relocation; |
| 599 | case R_RX_DIR16S_PCREL: |
| 600 | RANGE (-32768, 32767); |
| 601 | #if RX_OPCODE_BIG_ENDIAN |
| 602 | #else |
| 603 | OP (0) = relocation; |
| 604 | OP (1) = relocation >> 8; |
| 605 | #endif |
| 606 | break; |
| 607 | |
| 608 | case R_RX_RH_16_OP: |
| 609 | WARN_REDHAT ("RX_RH_16_OP"); |
| 610 | RANGE (-32768, 32767); |
| 611 | #if RX_OPCODE_BIG_ENDIAN |
| 612 | OP (1) = relocation; |
| 613 | OP (0) = relocation >> 8; |
| 614 | #else |
| 615 | OP (0) = relocation; |
| 616 | OP (1) = relocation >> 8; |
| 617 | #endif |
| 618 | break; |
| 619 | |
| 620 | case R_RX_DIR16S: |
| 621 | RANGE (-32768, 65535); |
| 622 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) |
| 623 | { |
| 624 | OP (1) = relocation; |
| 625 | OP (0) = relocation >> 8; |
| 626 | } |
| 627 | else |
| 628 | { |
| 629 | OP (0) = relocation; |
| 630 | OP (1) = relocation >> 8; |
| 631 | } |
| 632 | break; |
| 633 | |
| 634 | case R_RX_DIR16U: |
| 635 | RANGE (0, 65536); |
| 636 | #if RX_OPCODE_BIG_ENDIAN |
| 637 | OP (1) = relocation; |
| 638 | OP (0) = relocation >> 8; |
| 639 | #else |
| 640 | OP (0) = relocation; |
| 641 | OP (1) = relocation >> 8; |
| 642 | #endif |
| 643 | break; |
| 644 | |
| 645 | case R_RX_DIR16: |
| 646 | RANGE (-32768, 65536); |
| 647 | #if RX_OPCODE_BIG_ENDIAN |
| 648 | OP (1) = relocation; |
| 649 | OP (0) = relocation >> 8; |
| 650 | #else |
| 651 | OP (0) = relocation; |
| 652 | OP (1) = relocation >> 8; |
| 653 | #endif |
| 654 | break; |
| 655 | |
| 656 | case R_RX_DIR16_REV: |
| 657 | RANGE (-32768, 65536); |
| 658 | #if RX_OPCODE_BIG_ENDIAN |
| 659 | OP (0) = relocation; |
| 660 | OP (1) = relocation >> 8; |
| 661 | #else |
| 662 | OP (1) = relocation; |
| 663 | OP (0) = relocation >> 8; |
| 664 | #endif |
| 665 | break; |
| 666 | |
| 667 | case R_RX_DIR3U_PCREL: |
| 668 | RANGE (3, 10); |
| 669 | OP (0) &= 0xf8; |
| 670 | OP (0) |= relocation & 0x07; |
| 671 | break; |
| 672 | |
| 673 | case R_RX_RH_24_NEG: |
| 674 | WARN_REDHAT ("RX_RH_24_NEG"); |
| 675 | relocation = - relocation; |
| 676 | case R_RX_DIR24S_PCREL: |
| 677 | RANGE (-0x800000, 0x7fffff); |
| 678 | #if RX_OPCODE_BIG_ENDIAN |
| 679 | OP (2) = relocation; |
| 680 | OP (1) = relocation >> 8; |
| 681 | OP (0) = relocation >> 16; |
| 682 | #else |
| 683 | OP (0) = relocation; |
| 684 | OP (1) = relocation >> 8; |
| 685 | OP (2) = relocation >> 16; |
| 686 | #endif |
| 687 | break; |
| 688 | |
| 689 | case R_RX_RH_24_OP: |
| 690 | WARN_REDHAT ("RX_RH_24_OP"); |
| 691 | RANGE (-0x800000, 0x7fffff); |
| 692 | #if RX_OPCODE_BIG_ENDIAN |
| 693 | OP (2) = relocation; |
| 694 | OP (1) = relocation >> 8; |
| 695 | OP (0) = relocation >> 16; |
| 696 | #else |
| 697 | OP (0) = relocation; |
| 698 | OP (1) = relocation >> 8; |
| 699 | OP (2) = relocation >> 16; |
| 700 | #endif |
| 701 | break; |
| 702 | |
| 703 | case R_RX_DIR24S: |
| 704 | RANGE (-0x800000, 0x7fffff); |
| 705 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) |
| 706 | { |
| 707 | OP (2) = relocation; |
| 708 | OP (1) = relocation >> 8; |
| 709 | OP (0) = relocation >> 16; |
| 710 | } |
| 711 | else |
| 712 | { |
| 713 | OP (0) = relocation; |
| 714 | OP (1) = relocation >> 8; |
| 715 | OP (2) = relocation >> 16; |
| 716 | } |
| 717 | break; |
| 718 | |
| 719 | case R_RX_RH_24_UNS: |
| 720 | WARN_REDHAT ("RX_RH_24_UNS"); |
| 721 | RANGE (0, 0xffffff); |
| 722 | #if RX_OPCODE_BIG_ENDIAN |
| 723 | OP (2) = relocation; |
| 724 | OP (1) = relocation >> 8; |
| 725 | OP (0) = relocation >> 16; |
| 726 | #else |
| 727 | OP (0) = relocation; |
| 728 | OP (1) = relocation >> 8; |
| 729 | OP (2) = relocation >> 16; |
| 730 | #endif |
| 731 | break; |
| 732 | |
| 733 | case R_RX_RH_32_NEG: |
| 734 | WARN_REDHAT ("RX_RH_32_NEG"); |
| 735 | relocation = - relocation; |
| 736 | #if RX_OPCODE_BIG_ENDIAN |
| 737 | OP (3) = relocation; |
| 738 | OP (2) = relocation >> 8; |
| 739 | OP (1) = relocation >> 16; |
| 740 | OP (0) = relocation >> 24; |
| 741 | #else |
| 742 | OP (0) = relocation; |
| 743 | OP (1) = relocation >> 8; |
| 744 | OP (2) = relocation >> 16; |
| 745 | OP (3) = relocation >> 24; |
| 746 | #endif |
| 747 | break; |
| 748 | |
| 749 | case R_RX_RH_32_OP: |
| 750 | WARN_REDHAT ("RX_RH_32_OP"); |
| 751 | #if RX_OPCODE_BIG_ENDIAN |
| 752 | OP (3) = relocation; |
| 753 | OP (2) = relocation >> 8; |
| 754 | OP (1) = relocation >> 16; |
| 755 | OP (0) = relocation >> 24; |
| 756 | #else |
| 757 | OP (0) = relocation; |
| 758 | OP (1) = relocation >> 8; |
| 759 | OP (2) = relocation >> 16; |
| 760 | OP (3) = relocation >> 24; |
| 761 | #endif |
| 762 | break; |
| 763 | |
| 764 | case R_RX_DIR32: |
| 765 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) |
| 766 | { |
| 767 | OP (3) = relocation; |
| 768 | OP (2) = relocation >> 8; |
| 769 | OP (1) = relocation >> 16; |
| 770 | OP (0) = relocation >> 24; |
| 771 | } |
| 772 | else |
| 773 | { |
| 774 | OP (0) = relocation; |
| 775 | OP (1) = relocation >> 8; |
| 776 | OP (2) = relocation >> 16; |
| 777 | OP (3) = relocation >> 24; |
| 778 | } |
| 779 | break; |
| 780 | |
| 781 | case R_RX_DIR32_REV: |
| 782 | if (BIGE (output_bfd)) |
| 783 | { |
| 784 | OP (0) = relocation; |
| 785 | OP (1) = relocation >> 8; |
| 786 | OP (2) = relocation >> 16; |
| 787 | OP (3) = relocation >> 24; |
| 788 | } |
| 789 | else |
| 790 | { |
| 791 | OP (3) = relocation; |
| 792 | OP (2) = relocation >> 8; |
| 793 | OP (1) = relocation >> 16; |
| 794 | OP (0) = relocation >> 24; |
| 795 | } |
| 796 | break; |
| 797 | |
| 798 | case R_RX_RH_DIFF: |
| 799 | { |
| 800 | bfd_vma val; |
| 801 | WARN_REDHAT ("RX_RH_DIFF"); |
| 802 | val = bfd_get_32 (output_bfd, & OP (0)); |
| 803 | val -= relocation; |
| 804 | bfd_put_32 (output_bfd, val, & OP (0)); |
| 805 | } |
| 806 | break; |
| 807 | |
| 808 | case R_RX_RH_GPRELB: |
| 809 | WARN_REDHAT ("RX_RH_GPRELB"); |
| 810 | relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset); |
| 811 | RANGE (0, 65535); |
| 812 | #if RX_OPCODE_BIG_ENDIAN |
| 813 | OP (1) = relocation; |
| 814 | OP (0) = relocation >> 8; |
| 815 | #else |
| 816 | OP (0) = relocation; |
| 817 | OP (1) = relocation >> 8; |
| 818 | #endif |
| 819 | break; |
| 820 | |
| 821 | case R_RX_RH_GPRELW: |
| 822 | WARN_REDHAT ("RX_RH_GPRELW"); |
| 823 | relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset); |
| 824 | ALIGN (1); |
| 825 | relocation >>= 1; |
| 826 | RANGE (0, 65535); |
| 827 | #if RX_OPCODE_BIG_ENDIAN |
| 828 | OP (1) = relocation; |
| 829 | OP (0) = relocation >> 8; |
| 830 | #else |
| 831 | OP (0) = relocation; |
| 832 | OP (1) = relocation >> 8; |
| 833 | #endif |
| 834 | break; |
| 835 | |
| 836 | case R_RX_RH_GPRELL: |
| 837 | WARN_REDHAT ("RX_RH_GPRELL"); |
| 838 | relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset); |
| 839 | ALIGN (3); |
| 840 | relocation >>= 2; |
| 841 | RANGE (0, 65535); |
| 842 | #if RX_OPCODE_BIG_ENDIAN |
| 843 | OP (1) = relocation; |
| 844 | OP (0) = relocation >> 8; |
| 845 | #else |
| 846 | OP (0) = relocation; |
| 847 | OP (1) = relocation >> 8; |
| 848 | #endif |
| 849 | break; |
| 850 | |
| 851 | /* Internal relocations just for relaxation: */ |
| 852 | case R_RX_RH_ABS5p5B: |
| 853 | RX_STACK_POP (relocation); |
| 854 | RANGE (0, 31); |
| 855 | OP (0) &= 0xf8; |
| 856 | OP (0) |= relocation >> 2; |
| 857 | OP (1) &= 0x77; |
| 858 | OP (1) |= (relocation << 6) & 0x80; |
| 859 | OP (1) |= (relocation << 3) & 0x08; |
| 860 | break; |
| 861 | |
| 862 | case R_RX_RH_ABS5p5W: |
| 863 | RX_STACK_POP (relocation); |
| 864 | RANGE (0, 62); |
| 865 | ALIGN (1); |
| 866 | relocation >>= 1; |
| 867 | OP (0) &= 0xf8; |
| 868 | OP (0) |= relocation >> 2; |
| 869 | OP (1) &= 0x77; |
| 870 | OP (1) |= (relocation << 6) & 0x80; |
| 871 | OP (1) |= (relocation << 3) & 0x08; |
| 872 | break; |
| 873 | |
| 874 | case R_RX_RH_ABS5p5L: |
| 875 | RX_STACK_POP (relocation); |
| 876 | RANGE (0, 124); |
| 877 | ALIGN (3); |
| 878 | relocation >>= 2; |
| 879 | OP (0) &= 0xf8; |
| 880 | OP (0) |= relocation >> 2; |
| 881 | OP (1) &= 0x77; |
| 882 | OP (1) |= (relocation << 6) & 0x80; |
| 883 | OP (1) |= (relocation << 3) & 0x08; |
| 884 | break; |
| 885 | |
| 886 | case R_RX_RH_ABS5p8B: |
| 887 | RX_STACK_POP (relocation); |
| 888 | RANGE (0, 31); |
| 889 | OP (0) &= 0x70; |
| 890 | OP (0) |= (relocation << 3) & 0x80; |
| 891 | OP (0) |= relocation & 0x0f; |
| 892 | break; |
| 893 | |
| 894 | case R_RX_RH_ABS5p8W: |
| 895 | RX_STACK_POP (relocation); |
| 896 | RANGE (0, 62); |
| 897 | ALIGN (1); |
| 898 | relocation >>= 1; |
| 899 | OP (0) &= 0x70; |
| 900 | OP (0) |= (relocation << 3) & 0x80; |
| 901 | OP (0) |= relocation & 0x0f; |
| 902 | break; |
| 903 | |
| 904 | case R_RX_RH_ABS5p8L: |
| 905 | RX_STACK_POP (relocation); |
| 906 | RANGE (0, 124); |
| 907 | ALIGN (3); |
| 908 | relocation >>= 2; |
| 909 | OP (0) &= 0x70; |
| 910 | OP (0) |= (relocation << 3) & 0x80; |
| 911 | OP (0) |= relocation & 0x0f; |
| 912 | break; |
| 913 | |
| 914 | case R_RX_RH_UIMM4p8: |
| 915 | RANGE (0, 15); |
| 916 | OP (0) &= 0x0f; |
| 917 | OP (0) |= relocation << 4; |
| 918 | break; |
| 919 | |
| 920 | case R_RX_RH_UNEG4p8: |
| 921 | RANGE (-15, 0); |
| 922 | OP (0) &= 0x0f; |
| 923 | OP (0) |= (-relocation) << 4; |
| 924 | break; |
| 925 | |
| 926 | /* Complex reloc handling: */ |
| 927 | |
| 928 | case R_RX_ABS32: |
| 929 | RX_STACK_POP (relocation); |
| 930 | #if RX_OPCODE_BIG_ENDIAN |
| 931 | OP (3) = relocation; |
| 932 | OP (2) = relocation >> 8; |
| 933 | OP (1) = relocation >> 16; |
| 934 | OP (0) = relocation >> 24; |
| 935 | #else |
| 936 | OP (0) = relocation; |
| 937 | OP (1) = relocation >> 8; |
| 938 | OP (2) = relocation >> 16; |
| 939 | OP (3) = relocation >> 24; |
| 940 | #endif |
| 941 | break; |
| 942 | |
| 943 | case R_RX_ABS32_REV: |
| 944 | RX_STACK_POP (relocation); |
| 945 | #if RX_OPCODE_BIG_ENDIAN |
| 946 | OP (0) = relocation; |
| 947 | OP (1) = relocation >> 8; |
| 948 | OP (2) = relocation >> 16; |
| 949 | OP (3) = relocation >> 24; |
| 950 | #else |
| 951 | OP (3) = relocation; |
| 952 | OP (2) = relocation >> 8; |
| 953 | OP (1) = relocation >> 16; |
| 954 | OP (0) = relocation >> 24; |
| 955 | #endif |
| 956 | break; |
| 957 | |
| 958 | case R_RX_ABS24S_PCREL: |
| 959 | case R_RX_ABS24S: |
| 960 | RX_STACK_POP (relocation); |
| 961 | RANGE (-0x800000, 0x7fffff); |
| 962 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) |
| 963 | { |
| 964 | OP (2) = relocation; |
| 965 | OP (1) = relocation >> 8; |
| 966 | OP (0) = relocation >> 16; |
| 967 | } |
| 968 | else |
| 969 | { |
| 970 | OP (0) = relocation; |
| 971 | OP (1) = relocation >> 8; |
| 972 | OP (2) = relocation >> 16; |
| 973 | } |
| 974 | break; |
| 975 | |
| 976 | case R_RX_ABS16: |
| 977 | RX_STACK_POP (relocation); |
| 978 | RANGE (-32768, 65535); |
| 979 | #if RX_OPCODE_BIG_ENDIAN |
| 980 | OP (1) = relocation; |
| 981 | OP (0) = relocation >> 8; |
| 982 | #else |
| 983 | OP (0) = relocation; |
| 984 | OP (1) = relocation >> 8; |
| 985 | #endif |
| 986 | break; |
| 987 | |
| 988 | case R_RX_ABS16_REV: |
| 989 | RX_STACK_POP (relocation); |
| 990 | RANGE (-32768, 65535); |
| 991 | #if RX_OPCODE_BIG_ENDIAN |
| 992 | OP (0) = relocation; |
| 993 | OP (1) = relocation >> 8; |
| 994 | #else |
| 995 | OP (1) = relocation; |
| 996 | OP (0) = relocation >> 8; |
| 997 | #endif |
| 998 | break; |
| 999 | |
| 1000 | case R_RX_ABS16S_PCREL: |
| 1001 | case R_RX_ABS16S: |
| 1002 | RX_STACK_POP (relocation); |
| 1003 | RANGE (-32768, 32767); |
| 1004 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) |
| 1005 | { |
| 1006 | OP (1) = relocation; |
| 1007 | OP (0) = relocation >> 8; |
| 1008 | } |
| 1009 | else |
| 1010 | { |
| 1011 | OP (0) = relocation; |
| 1012 | OP (1) = relocation >> 8; |
| 1013 | } |
| 1014 | break; |
| 1015 | |
| 1016 | case R_RX_ABS16U: |
| 1017 | RX_STACK_POP (relocation); |
| 1018 | RANGE (0, 65536); |
| 1019 | #if RX_OPCODE_BIG_ENDIAN |
| 1020 | OP (1) = relocation; |
| 1021 | OP (0) = relocation >> 8; |
| 1022 | #else |
| 1023 | OP (0) = relocation; |
| 1024 | OP (1) = relocation >> 8; |
| 1025 | #endif |
| 1026 | break; |
| 1027 | |
| 1028 | case R_RX_ABS16UL: |
| 1029 | RX_STACK_POP (relocation); |
| 1030 | relocation >>= 2; |
| 1031 | RANGE (0, 65536); |
| 1032 | #if RX_OPCODE_BIG_ENDIAN |
| 1033 | OP (1) = relocation; |
| 1034 | OP (0) = relocation >> 8; |
| 1035 | #else |
| 1036 | OP (0) = relocation; |
| 1037 | OP (1) = relocation >> 8; |
| 1038 | #endif |
| 1039 | break; |
| 1040 | |
| 1041 | case R_RX_ABS16UW: |
| 1042 | RX_STACK_POP (relocation); |
| 1043 | relocation >>= 1; |
| 1044 | RANGE (0, 65536); |
| 1045 | #if RX_OPCODE_BIG_ENDIAN |
| 1046 | OP (1) = relocation; |
| 1047 | OP (0) = relocation >> 8; |
| 1048 | #else |
| 1049 | OP (0) = relocation; |
| 1050 | OP (1) = relocation >> 8; |
| 1051 | #endif |
| 1052 | break; |
| 1053 | |
| 1054 | case R_RX_ABS8: |
| 1055 | RX_STACK_POP (relocation); |
| 1056 | RANGE (-128, 255); |
| 1057 | OP (0) = relocation; |
| 1058 | break; |
| 1059 | |
| 1060 | case R_RX_ABS8U: |
| 1061 | RX_STACK_POP (relocation); |
| 1062 | RANGE (0, 255); |
| 1063 | OP (0) = relocation; |
| 1064 | break; |
| 1065 | |
| 1066 | case R_RX_ABS8UL: |
| 1067 | RX_STACK_POP (relocation); |
| 1068 | relocation >>= 2; |
| 1069 | RANGE (0, 255); |
| 1070 | OP (0) = relocation; |
| 1071 | break; |
| 1072 | |
| 1073 | case R_RX_ABS8UW: |
| 1074 | RX_STACK_POP (relocation); |
| 1075 | relocation >>= 1; |
| 1076 | RANGE (0, 255); |
| 1077 | OP (0) = relocation; |
| 1078 | break; |
| 1079 | |
| 1080 | case R_RX_ABS8S_PCREL: |
| 1081 | case R_RX_ABS8S: |
| 1082 | RX_STACK_POP (relocation); |
| 1083 | RANGE (-128, 127); |
| 1084 | OP (0) = relocation; |
| 1085 | break; |
| 1086 | |
| 1087 | case R_RX_SYM: |
| 1088 | if (r_symndx < symtab_hdr->sh_info) |
| 1089 | RX_STACK_PUSH (sec->output_section->vma |
| 1090 | + sec->output_offset |
| 1091 | + sym->st_value); |
| 1092 | else |
| 1093 | { |
| 1094 | if (h != NULL |
| 1095 | && (h->root.type == bfd_link_hash_defined |
| 1096 | || h->root.type == bfd_link_hash_defweak)) |
| 1097 | RX_STACK_PUSH (h->root.u.def.value |
| 1098 | + sec->output_section->vma |
| 1099 | + sec->output_offset); |
| 1100 | else |
| 1101 | _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol")); |
| 1102 | } |
| 1103 | break; |
| 1104 | |
| 1105 | case R_RX_OPneg: |
| 1106 | { |
| 1107 | int32_t tmp; |
| 1108 | |
| 1109 | RX_STACK_POP (tmp); |
| 1110 | tmp = - tmp; |
| 1111 | RX_STACK_PUSH (tmp); |
| 1112 | } |
| 1113 | break; |
| 1114 | |
| 1115 | case R_RX_OPadd: |
| 1116 | { |
| 1117 | int32_t tmp1, tmp2; |
| 1118 | |
| 1119 | RX_STACK_POP (tmp1); |
| 1120 | RX_STACK_POP (tmp2); |
| 1121 | tmp1 += tmp2; |
| 1122 | RX_STACK_PUSH (tmp1); |
| 1123 | } |
| 1124 | break; |
| 1125 | |
| 1126 | case R_RX_OPsub: |
| 1127 | { |
| 1128 | int32_t tmp1, tmp2; |
| 1129 | |
| 1130 | RX_STACK_POP (tmp1); |
| 1131 | RX_STACK_POP (tmp2); |
| 1132 | tmp2 -= tmp1; |
| 1133 | RX_STACK_PUSH (tmp2); |
| 1134 | } |
| 1135 | break; |
| 1136 | |
| 1137 | case R_RX_OPmul: |
| 1138 | { |
| 1139 | int32_t tmp1, tmp2; |
| 1140 | |
| 1141 | RX_STACK_POP (tmp1); |
| 1142 | RX_STACK_POP (tmp2); |
| 1143 | tmp1 *= tmp2; |
| 1144 | RX_STACK_PUSH (tmp1); |
| 1145 | } |
| 1146 | break; |
| 1147 | |
| 1148 | case R_RX_OPdiv: |
| 1149 | { |
| 1150 | int32_t tmp1, tmp2; |
| 1151 | |
| 1152 | RX_STACK_POP (tmp1); |
| 1153 | RX_STACK_POP (tmp2); |
| 1154 | tmp1 /= tmp2; |
| 1155 | RX_STACK_PUSH (tmp1); |
| 1156 | } |
| 1157 | break; |
| 1158 | |
| 1159 | case R_RX_OPshla: |
| 1160 | { |
| 1161 | int32_t tmp1, tmp2; |
| 1162 | |
| 1163 | RX_STACK_POP (tmp1); |
| 1164 | RX_STACK_POP (tmp2); |
| 1165 | tmp1 <<= tmp2; |
| 1166 | RX_STACK_PUSH (tmp1); |
| 1167 | } |
| 1168 | break; |
| 1169 | |
| 1170 | case R_RX_OPshra: |
| 1171 | { |
| 1172 | int32_t tmp1, tmp2; |
| 1173 | |
| 1174 | RX_STACK_POP (tmp1); |
| 1175 | RX_STACK_POP (tmp2); |
| 1176 | tmp1 >>= tmp2; |
| 1177 | RX_STACK_PUSH (tmp1); |
| 1178 | } |
| 1179 | break; |
| 1180 | |
| 1181 | case R_RX_OPsctsize: |
| 1182 | RX_STACK_PUSH (input_section->size); |
| 1183 | break; |
| 1184 | |
| 1185 | case R_RX_OPscttop: |
| 1186 | RX_STACK_PUSH (input_section->output_section->vma); |
| 1187 | break; |
| 1188 | |
| 1189 | case R_RX_OPand: |
| 1190 | { |
| 1191 | int32_t tmp1, tmp2; |
| 1192 | |
| 1193 | RX_STACK_POP (tmp1); |
| 1194 | RX_STACK_POP (tmp2); |
| 1195 | tmp1 &= tmp2; |
| 1196 | RX_STACK_PUSH (tmp1); |
| 1197 | } |
| 1198 | break; |
| 1199 | |
| 1200 | case R_RX_OPor: |
| 1201 | { |
| 1202 | int32_t tmp1, tmp2; |
| 1203 | |
| 1204 | RX_STACK_POP (tmp1); |
| 1205 | RX_STACK_POP (tmp2); |
| 1206 | tmp1 |= tmp2; |
| 1207 | RX_STACK_PUSH (tmp1); |
| 1208 | } |
| 1209 | break; |
| 1210 | |
| 1211 | case R_RX_OPxor: |
| 1212 | { |
| 1213 | int32_t tmp1, tmp2; |
| 1214 | |
| 1215 | RX_STACK_POP (tmp1); |
| 1216 | RX_STACK_POP (tmp2); |
| 1217 | tmp1 ^= tmp2; |
| 1218 | RX_STACK_PUSH (tmp1); |
| 1219 | } |
| 1220 | break; |
| 1221 | |
| 1222 | case R_RX_OPnot: |
| 1223 | { |
| 1224 | int32_t tmp; |
| 1225 | |
| 1226 | RX_STACK_POP (tmp); |
| 1227 | tmp = ~ tmp; |
| 1228 | RX_STACK_PUSH (tmp); |
| 1229 | } |
| 1230 | break; |
| 1231 | |
| 1232 | case R_RX_OPmod: |
| 1233 | { |
| 1234 | int32_t tmp1, tmp2; |
| 1235 | |
| 1236 | RX_STACK_POP (tmp1); |
| 1237 | RX_STACK_POP (tmp2); |
| 1238 | tmp1 %= tmp2; |
| 1239 | RX_STACK_PUSH (tmp1); |
| 1240 | } |
| 1241 | break; |
| 1242 | |
| 1243 | case R_RX_OPromtop: |
| 1244 | RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); |
| 1245 | break; |
| 1246 | |
| 1247 | case R_RX_OPramtop: |
| 1248 | RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); |
| 1249 | break; |
| 1250 | |
| 1251 | default: |
| 1252 | r = bfd_reloc_notsupported; |
| 1253 | break; |
| 1254 | } |
| 1255 | |
| 1256 | if (r != bfd_reloc_ok) |
| 1257 | { |
| 1258 | const char * msg = NULL; |
| 1259 | |
| 1260 | switch (r) |
| 1261 | { |
| 1262 | case bfd_reloc_overflow: |
| 1263 | /* Catch the case of a missing function declaration |
| 1264 | and emit a more helpful error message. */ |
| 1265 | if (r_type == R_RX_DIR24S_PCREL) |
| 1266 | msg = _("%B(%A): error: call to undefined function '%s'"); |
| 1267 | else |
| 1268 | r = info->callbacks->reloc_overflow |
| 1269 | (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, |
| 1270 | input_bfd, input_section, rel->r_offset); |
| 1271 | break; |
| 1272 | |
| 1273 | case bfd_reloc_undefined: |
| 1274 | r = info->callbacks->undefined_symbol |
| 1275 | (info, name, input_bfd, input_section, rel->r_offset, |
| 1276 | TRUE); |
| 1277 | break; |
| 1278 | |
| 1279 | case bfd_reloc_other: |
| 1280 | msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area"); |
| 1281 | break; |
| 1282 | |
| 1283 | case bfd_reloc_outofrange: |
| 1284 | msg = _("%B(%A): internal error: out of range error"); |
| 1285 | break; |
| 1286 | |
| 1287 | case bfd_reloc_notsupported: |
| 1288 | msg = _("%B(%A): internal error: unsupported relocation error"); |
| 1289 | break; |
| 1290 | |
| 1291 | case bfd_reloc_dangerous: |
| 1292 | msg = _("%B(%A): internal error: dangerous relocation"); |
| 1293 | break; |
| 1294 | |
| 1295 | default: |
| 1296 | msg = _("%B(%A): internal error: unknown error"); |
| 1297 | break; |
| 1298 | } |
| 1299 | |
| 1300 | if (msg) |
| 1301 | _bfd_error_handler (msg, input_bfd, input_section, name); |
| 1302 | |
| 1303 | if (! r) |
| 1304 | return FALSE; |
| 1305 | } |
| 1306 | } |
| 1307 | |
| 1308 | return TRUE; |
| 1309 | } |
| 1310 | \f |
| 1311 | /* Relaxation Support. */ |
| 1312 | |
| 1313 | /* Progression of relocations from largest operand size to smallest |
| 1314 | operand size. */ |
| 1315 | |
| 1316 | static int |
| 1317 | next_smaller_reloc (int r) |
| 1318 | { |
| 1319 | switch (r) |
| 1320 | { |
| 1321 | case R_RX_DIR32: return R_RX_DIR24S; |
| 1322 | case R_RX_DIR24S: return R_RX_DIR16S; |
| 1323 | case R_RX_DIR16S: return R_RX_DIR8S; |
| 1324 | case R_RX_DIR8S: return R_RX_NONE; |
| 1325 | |
| 1326 | case R_RX_DIR16: return R_RX_DIR8; |
| 1327 | case R_RX_DIR8: return R_RX_NONE; |
| 1328 | |
| 1329 | case R_RX_DIR16U: return R_RX_DIR8U; |
| 1330 | case R_RX_DIR8U: return R_RX_NONE; |
| 1331 | |
| 1332 | case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL; |
| 1333 | case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL; |
| 1334 | case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL; |
| 1335 | |
| 1336 | case R_RX_DIR16UL: return R_RX_DIR8UL; |
| 1337 | case R_RX_DIR8UL: return R_RX_NONE; |
| 1338 | case R_RX_DIR16UW: return R_RX_DIR8UW; |
| 1339 | case R_RX_DIR8UW: return R_RX_NONE; |
| 1340 | |
| 1341 | case R_RX_RH_32_OP: return R_RX_RH_24_OP; |
| 1342 | case R_RX_RH_24_OP: return R_RX_RH_16_OP; |
| 1343 | case R_RX_RH_16_OP: return R_RX_DIR8; |
| 1344 | |
| 1345 | case R_RX_ABS32: return R_RX_ABS24S; |
| 1346 | case R_RX_ABS24S: return R_RX_ABS16S; |
| 1347 | case R_RX_ABS16: return R_RX_ABS8; |
| 1348 | case R_RX_ABS16U: return R_RX_ABS8U; |
| 1349 | case R_RX_ABS16S: return R_RX_ABS8S; |
| 1350 | case R_RX_ABS8: return R_RX_NONE; |
| 1351 | case R_RX_ABS8U: return R_RX_NONE; |
| 1352 | case R_RX_ABS8S: return R_RX_NONE; |
| 1353 | case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL; |
| 1354 | case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL; |
| 1355 | case R_RX_ABS8S_PCREL: return R_RX_NONE; |
| 1356 | case R_RX_ABS16UL: return R_RX_ABS8UL; |
| 1357 | case R_RX_ABS16UW: return R_RX_ABS8UW; |
| 1358 | case R_RX_ABS8UL: return R_RX_NONE; |
| 1359 | case R_RX_ABS8UW: return R_RX_NONE; |
| 1360 | } |
| 1361 | return r; |
| 1362 | }; |
| 1363 | |
| 1364 | /* Delete some bytes from a section while relaxing. */ |
| 1365 | |
| 1366 | static bfd_boolean |
| 1367 | elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, |
| 1368 | Elf_Internal_Rela *alignment_rel, int force_snip) |
| 1369 | { |
| 1370 | Elf_Internal_Shdr * symtab_hdr; |
| 1371 | unsigned int sec_shndx; |
| 1372 | bfd_byte * contents; |
| 1373 | Elf_Internal_Rela * irel; |
| 1374 | Elf_Internal_Rela * irelend; |
| 1375 | Elf_Internal_Rela * irelalign; |
| 1376 | Elf_Internal_Sym * isym; |
| 1377 | Elf_Internal_Sym * isymend; |
| 1378 | bfd_vma toaddr; |
| 1379 | unsigned int symcount; |
| 1380 | struct elf_link_hash_entry ** sym_hashes; |
| 1381 | struct elf_link_hash_entry ** end_hashes; |
| 1382 | |
| 1383 | if (!alignment_rel) |
| 1384 | force_snip = 1; |
| 1385 | |
| 1386 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
| 1387 | |
| 1388 | contents = elf_section_data (sec)->this_hdr.contents; |
| 1389 | |
| 1390 | /* The deletion must stop at the next alignment boundary, if |
| 1391 | ALIGNMENT_REL is non-NULL. */ |
| 1392 | irelalign = NULL; |
| 1393 | toaddr = sec->size; |
| 1394 | if (alignment_rel) |
| 1395 | toaddr = alignment_rel->r_offset; |
| 1396 | |
| 1397 | irel = elf_section_data (sec)->relocs; |
| 1398 | irelend = irel + sec->reloc_count; |
| 1399 | |
| 1400 | /* Actually delete the bytes. */ |
| 1401 | memmove (contents + addr, contents + addr + count, |
| 1402 | (size_t) (toaddr - addr - count)); |
| 1403 | |
| 1404 | /* If we don't have an alignment marker to worry about, we can just |
| 1405 | shrink the section. Otherwise, we have to fill in the newly |
| 1406 | created gap with NOP insns (0x03). */ |
| 1407 | if (force_snip) |
| 1408 | sec->size -= count; |
| 1409 | else |
| 1410 | memset (contents + toaddr - count, 0x03, count); |
| 1411 | |
| 1412 | /* Adjust all the relocs. */ |
| 1413 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) |
| 1414 | { |
| 1415 | /* Get the new reloc address. */ |
| 1416 | if (irel->r_offset > addr |
| 1417 | && (irel->r_offset < toaddr |
| 1418 | || (force_snip && irel->r_offset == toaddr))) |
| 1419 | irel->r_offset -= count; |
| 1420 | |
| 1421 | /* If we see an ALIGN marker at the end of the gap, we move it |
| 1422 | to the beginning of the gap, since marking these gaps is what |
| 1423 | they're for. */ |
| 1424 | if (irel->r_offset == toaddr |
| 1425 | && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX |
| 1426 | && irel->r_addend & RX_RELAXA_ALIGN) |
| 1427 | irel->r_offset -= count; |
| 1428 | } |
| 1429 | |
| 1430 | /* Adjust the local symbols defined in this section. */ |
| 1431 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
| 1432 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 1433 | isymend = isym + symtab_hdr->sh_info; |
| 1434 | |
| 1435 | for (; isym < isymend; isym++) |
| 1436 | { |
| 1437 | /* If the symbol is in the range of memory we just moved, we |
| 1438 | have to adjust its value. */ |
| 1439 | if (isym->st_shndx == sec_shndx |
| 1440 | && isym->st_value > addr |
| 1441 | && isym->st_value < toaddr) |
| 1442 | isym->st_value -= count; |
| 1443 | |
| 1444 | /* If the symbol *spans* the bytes we just deleted (i.e. it's |
| 1445 | *end* is in the moved bytes but it's *start* isn't), then we |
| 1446 | must adjust its size. */ |
| 1447 | if (isym->st_shndx == sec_shndx |
| 1448 | && isym->st_value < addr |
| 1449 | && isym->st_value + isym->st_size > addr |
| 1450 | && isym->st_value + isym->st_size < toaddr) |
| 1451 | isym->st_size -= count; |
| 1452 | } |
| 1453 | |
| 1454 | /* Now adjust the global symbols defined in this section. */ |
| 1455 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
| 1456 | - symtab_hdr->sh_info); |
| 1457 | sym_hashes = elf_sym_hashes (abfd); |
| 1458 | end_hashes = sym_hashes + symcount; |
| 1459 | |
| 1460 | for (; sym_hashes < end_hashes; sym_hashes++) |
| 1461 | { |
| 1462 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
| 1463 | |
| 1464 | if ((sym_hash->root.type == bfd_link_hash_defined |
| 1465 | || sym_hash->root.type == bfd_link_hash_defweak) |
| 1466 | && sym_hash->root.u.def.section == sec) |
| 1467 | { |
| 1468 | /* As above, adjust the value if needed. */ |
| 1469 | if (sym_hash->root.u.def.value > addr |
| 1470 | && sym_hash->root.u.def.value < toaddr) |
| 1471 | sym_hash->root.u.def.value -= count; |
| 1472 | |
| 1473 | /* As above, adjust the size if needed. */ |
| 1474 | if (sym_hash->root.u.def.value < addr |
| 1475 | && sym_hash->root.u.def.value + sym_hash->size > addr |
| 1476 | && sym_hash->root.u.def.value + sym_hash->size < toaddr) |
| 1477 | sym_hash->size -= count; |
| 1478 | } |
| 1479 | } |
| 1480 | |
| 1481 | return TRUE; |
| 1482 | } |
| 1483 | |
| 1484 | /* Used to sort relocs by address. If relocs have the same address, |
| 1485 | we maintain their relative order, except that R_RX_RH_RELAX |
| 1486 | alignment relocs must be the first reloc for any given address. */ |
| 1487 | |
| 1488 | static void |
| 1489 | reloc_bubblesort (Elf_Internal_Rela * r, int count) |
| 1490 | { |
| 1491 | int i; |
| 1492 | bfd_boolean again; |
| 1493 | bfd_boolean swappit; |
| 1494 | |
| 1495 | /* This is almost a classic bubblesort. It's the slowest sort, but |
| 1496 | we're taking advantage of the fact that the relocations are |
| 1497 | mostly in order already (the assembler emits them that way) and |
| 1498 | we need relocs with the same address to remain in the same |
| 1499 | relative order. */ |
| 1500 | again = TRUE; |
| 1501 | while (again) |
| 1502 | { |
| 1503 | again = FALSE; |
| 1504 | for (i = 0; i < count - 1; i ++) |
| 1505 | { |
| 1506 | if (r[i].r_offset > r[i + 1].r_offset) |
| 1507 | swappit = TRUE; |
| 1508 | else if (r[i].r_offset < r[i + 1].r_offset) |
| 1509 | swappit = FALSE; |
| 1510 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX |
| 1511 | && (r[i + 1].r_addend & RX_RELAXA_ALIGN)) |
| 1512 | swappit = TRUE; |
| 1513 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX |
| 1514 | && (r[i + 1].r_addend & RX_RELAXA_ELIGN) |
| 1515 | && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX |
| 1516 | && (r[i].r_addend & RX_RELAXA_ALIGN))) |
| 1517 | swappit = TRUE; |
| 1518 | else |
| 1519 | swappit = FALSE; |
| 1520 | |
| 1521 | if (swappit) |
| 1522 | { |
| 1523 | Elf_Internal_Rela tmp; |
| 1524 | |
| 1525 | tmp = r[i]; |
| 1526 | r[i] = r[i + 1]; |
| 1527 | r[i + 1] = tmp; |
| 1528 | /* If we do move a reloc back, re-scan to see if it |
| 1529 | needs to be moved even further back. This avoids |
| 1530 | most of the O(n^2) behavior for our cases. */ |
| 1531 | if (i > 0) |
| 1532 | i -= 2; |
| 1533 | again = TRUE; |
| 1534 | } |
| 1535 | } |
| 1536 | } |
| 1537 | } |
| 1538 | |
| 1539 | |
| 1540 | #define OFFSET_FOR_RELOC(rel, lrel, scale) \ |
| 1541 | rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ |
| 1542 | lrel, abfd, sec, link_info, scale) |
| 1543 | |
| 1544 | static bfd_vma |
| 1545 | rx_offset_for_reloc (bfd * abfd, |
| 1546 | Elf_Internal_Rela * rel, |
| 1547 | Elf_Internal_Shdr * symtab_hdr, |
| 1548 | Elf_External_Sym_Shndx * shndx_buf, |
| 1549 | Elf_Internal_Sym * intsyms, |
| 1550 | Elf_Internal_Rela ** lrel, |
| 1551 | bfd * input_bfd, |
| 1552 | asection * input_section, |
| 1553 | struct bfd_link_info * info, |
| 1554 | int * scale) |
| 1555 | { |
| 1556 | bfd_vma symval; |
| 1557 | bfd_reloc_status_type r; |
| 1558 | |
| 1559 | *scale = 1; |
| 1560 | |
| 1561 | /* REL is the first of 1..N relocations. We compute the symbol |
| 1562 | value for each relocation, then combine them if needed. LREL |
| 1563 | gets a pointer to the last relocation used. */ |
| 1564 | while (1) |
| 1565 | { |
| 1566 | int32_t tmp1, tmp2; |
| 1567 | |
| 1568 | /* Get the value of the symbol referred to by the reloc. */ |
| 1569 | if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) |
| 1570 | { |
| 1571 | /* A local symbol. */ |
| 1572 | Elf_Internal_Sym *isym; |
| 1573 | Elf_External_Sym_Shndx *shndx; |
| 1574 | asection *ssec; |
| 1575 | |
| 1576 | isym = intsyms + ELF32_R_SYM (rel->r_info); |
| 1577 | |
| 1578 | if (isym->st_shndx == SHN_UNDEF) |
| 1579 | ssec = bfd_und_section_ptr; |
| 1580 | else if (isym->st_shndx == SHN_ABS) |
| 1581 | ssec = bfd_abs_section_ptr; |
| 1582 | else if (isym->st_shndx == SHN_COMMON) |
| 1583 | ssec = bfd_com_section_ptr; |
| 1584 | else |
| 1585 | ssec = bfd_section_from_elf_index (abfd, |
| 1586 | isym->st_shndx); |
| 1587 | |
| 1588 | shndx = shndx_buf + (shndx_buf ? ELF32_R_SYM (rel->r_info) : 0); |
| 1589 | |
| 1590 | /* Initial symbol value. */ |
| 1591 | symval = isym->st_value; |
| 1592 | |
| 1593 | /* GAS may have made this symbol relative to a section, in |
| 1594 | which case, we have to add the addend to find the |
| 1595 | symbol. */ |
| 1596 | if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) |
| 1597 | symval += rel->r_addend; |
| 1598 | |
| 1599 | if (ssec) |
| 1600 | { |
| 1601 | if ((ssec->flags & SEC_MERGE) |
| 1602 | && ssec->sec_info_type == ELF_INFO_TYPE_MERGE) |
| 1603 | symval = _bfd_merged_section_offset (abfd, & ssec, |
| 1604 | elf_section_data (ssec)->sec_info, |
| 1605 | symval); |
| 1606 | } |
| 1607 | |
| 1608 | /* Now make the offset relative to where the linker is putting it. */ |
| 1609 | if (ssec) |
| 1610 | symval += |
| 1611 | ssec->output_section->vma + ssec->output_offset; |
| 1612 | |
| 1613 | symval += rel->r_addend; |
| 1614 | } |
| 1615 | else |
| 1616 | { |
| 1617 | unsigned long indx; |
| 1618 | struct elf_link_hash_entry * h; |
| 1619 | |
| 1620 | /* An external symbol. */ |
| 1621 | indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; |
| 1622 | h = elf_sym_hashes (abfd)[indx]; |
| 1623 | BFD_ASSERT (h != NULL); |
| 1624 | |
| 1625 | if (h->root.type != bfd_link_hash_defined |
| 1626 | && h->root.type != bfd_link_hash_defweak) |
| 1627 | { |
| 1628 | /* This appears to be a reference to an undefined |
| 1629 | symbol. Just ignore it--it will be caught by the |
| 1630 | regular reloc processing. */ |
| 1631 | if (lrel) |
| 1632 | *lrel = rel; |
| 1633 | return 0; |
| 1634 | } |
| 1635 | |
| 1636 | symval = (h->root.u.def.value |
| 1637 | + h->root.u.def.section->output_section->vma |
| 1638 | + h->root.u.def.section->output_offset); |
| 1639 | |
| 1640 | symval += rel->r_addend; |
| 1641 | } |
| 1642 | |
| 1643 | switch (ELF32_R_TYPE (rel->r_info)) |
| 1644 | { |
| 1645 | case R_RX_SYM: |
| 1646 | RX_STACK_PUSH (symval); |
| 1647 | break; |
| 1648 | |
| 1649 | case R_RX_OPneg: |
| 1650 | RX_STACK_POP (tmp1); |
| 1651 | tmp1 = - tmp1; |
| 1652 | RX_STACK_PUSH (tmp1); |
| 1653 | break; |
| 1654 | |
| 1655 | case R_RX_OPadd: |
| 1656 | RX_STACK_POP (tmp1); |
| 1657 | RX_STACK_POP (tmp2); |
| 1658 | tmp1 += tmp2; |
| 1659 | RX_STACK_PUSH (tmp1); |
| 1660 | break; |
| 1661 | |
| 1662 | case R_RX_OPsub: |
| 1663 | RX_STACK_POP (tmp1); |
| 1664 | RX_STACK_POP (tmp2); |
| 1665 | tmp2 -= tmp1; |
| 1666 | RX_STACK_PUSH (tmp2); |
| 1667 | break; |
| 1668 | |
| 1669 | case R_RX_OPmul: |
| 1670 | RX_STACK_POP (tmp1); |
| 1671 | RX_STACK_POP (tmp2); |
| 1672 | tmp1 *= tmp2; |
| 1673 | RX_STACK_PUSH (tmp1); |
| 1674 | break; |
| 1675 | |
| 1676 | case R_RX_OPdiv: |
| 1677 | RX_STACK_POP (tmp1); |
| 1678 | RX_STACK_POP (tmp2); |
| 1679 | tmp1 /= tmp2; |
| 1680 | RX_STACK_PUSH (tmp1); |
| 1681 | break; |
| 1682 | |
| 1683 | case R_RX_OPshla: |
| 1684 | RX_STACK_POP (tmp1); |
| 1685 | RX_STACK_POP (tmp2); |
| 1686 | tmp1 <<= tmp2; |
| 1687 | RX_STACK_PUSH (tmp1); |
| 1688 | break; |
| 1689 | |
| 1690 | case R_RX_OPshra: |
| 1691 | RX_STACK_POP (tmp1); |
| 1692 | RX_STACK_POP (tmp2); |
| 1693 | tmp1 >>= tmp2; |
| 1694 | RX_STACK_PUSH (tmp1); |
| 1695 | break; |
| 1696 | |
| 1697 | case R_RX_OPsctsize: |
| 1698 | RX_STACK_PUSH (input_section->size); |
| 1699 | break; |
| 1700 | |
| 1701 | case R_RX_OPscttop: |
| 1702 | RX_STACK_PUSH (input_section->output_section->vma); |
| 1703 | break; |
| 1704 | |
| 1705 | case R_RX_OPand: |
| 1706 | RX_STACK_POP (tmp1); |
| 1707 | RX_STACK_POP (tmp2); |
| 1708 | tmp1 &= tmp2; |
| 1709 | RX_STACK_PUSH (tmp1); |
| 1710 | break; |
| 1711 | |
| 1712 | case R_RX_OPor: |
| 1713 | RX_STACK_POP (tmp1); |
| 1714 | RX_STACK_POP (tmp2); |
| 1715 | tmp1 |= tmp2; |
| 1716 | RX_STACK_PUSH (tmp1); |
| 1717 | break; |
| 1718 | |
| 1719 | case R_RX_OPxor: |
| 1720 | RX_STACK_POP (tmp1); |
| 1721 | RX_STACK_POP (tmp2); |
| 1722 | tmp1 ^= tmp2; |
| 1723 | RX_STACK_PUSH (tmp1); |
| 1724 | break; |
| 1725 | |
| 1726 | case R_RX_OPnot: |
| 1727 | RX_STACK_POP (tmp1); |
| 1728 | tmp1 = ~ tmp1; |
| 1729 | RX_STACK_PUSH (tmp1); |
| 1730 | break; |
| 1731 | |
| 1732 | case R_RX_OPmod: |
| 1733 | RX_STACK_POP (tmp1); |
| 1734 | RX_STACK_POP (tmp2); |
| 1735 | tmp1 %= tmp2; |
| 1736 | RX_STACK_PUSH (tmp1); |
| 1737 | break; |
| 1738 | |
| 1739 | case R_RX_OPromtop: |
| 1740 | RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); |
| 1741 | break; |
| 1742 | |
| 1743 | case R_RX_OPramtop: |
| 1744 | RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); |
| 1745 | break; |
| 1746 | |
| 1747 | case R_RX_DIR16UL: |
| 1748 | case R_RX_DIR8UL: |
| 1749 | case R_RX_ABS16UL: |
| 1750 | case R_RX_ABS8UL: |
| 1751 | if (rx_stack_top) |
| 1752 | RX_STACK_POP (symval); |
| 1753 | if (lrel) |
| 1754 | *lrel = rel; |
| 1755 | *scale = 4; |
| 1756 | return symval; |
| 1757 | |
| 1758 | case R_RX_DIR16UW: |
| 1759 | case R_RX_DIR8UW: |
| 1760 | case R_RX_ABS16UW: |
| 1761 | case R_RX_ABS8UW: |
| 1762 | if (rx_stack_top) |
| 1763 | RX_STACK_POP (symval); |
| 1764 | if (lrel) |
| 1765 | *lrel = rel; |
| 1766 | *scale = 2; |
| 1767 | return symval; |
| 1768 | |
| 1769 | default: |
| 1770 | if (rx_stack_top) |
| 1771 | RX_STACK_POP (symval); |
| 1772 | if (lrel) |
| 1773 | *lrel = rel; |
| 1774 | return symval; |
| 1775 | } |
| 1776 | |
| 1777 | rel ++; |
| 1778 | } |
| 1779 | } |
| 1780 | |
| 1781 | static void |
| 1782 | move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta) |
| 1783 | { |
| 1784 | bfd_vma old_offset = srel->r_offset; |
| 1785 | |
| 1786 | irel ++; |
| 1787 | while (irel <= srel) |
| 1788 | { |
| 1789 | if (irel->r_offset == old_offset) |
| 1790 | irel->r_offset += delta; |
| 1791 | irel ++; |
| 1792 | } |
| 1793 | } |
| 1794 | |
| 1795 | /* Relax one section. */ |
| 1796 | |
| 1797 | static bfd_boolean |
| 1798 | elf32_rx_relax_section (bfd * abfd, |
| 1799 | asection * sec, |
| 1800 | struct bfd_link_info * link_info, |
| 1801 | bfd_boolean * again, |
| 1802 | bfd_boolean allow_pcrel3) |
| 1803 | { |
| 1804 | Elf_Internal_Shdr * symtab_hdr; |
| 1805 | Elf_Internal_Shdr * shndx_hdr; |
| 1806 | Elf_Internal_Rela * internal_relocs; |
| 1807 | Elf_Internal_Rela * free_relocs = NULL; |
| 1808 | Elf_Internal_Rela * irel; |
| 1809 | Elf_Internal_Rela * srel; |
| 1810 | Elf_Internal_Rela * irelend; |
| 1811 | Elf_Internal_Rela * next_alignment; |
| 1812 | Elf_Internal_Rela * prev_alignment; |
| 1813 | bfd_byte * contents = NULL; |
| 1814 | bfd_byte * free_contents = NULL; |
| 1815 | Elf_Internal_Sym * intsyms = NULL; |
| 1816 | Elf_Internal_Sym * free_intsyms = NULL; |
| 1817 | Elf_External_Sym_Shndx * shndx_buf = NULL; |
| 1818 | bfd_vma pc; |
| 1819 | bfd_vma sec_start; |
| 1820 | bfd_vma sec_end; |
| 1821 | bfd_vma symval = 0; |
| 1822 | int pcrel = 0; |
| 1823 | int code = 0; |
| 1824 | int section_alignment_glue; |
| 1825 | /* how much to scale the relocation by - 1, 2, or 4. */ |
| 1826 | int scale; |
| 1827 | |
| 1828 | /* Assume nothing changes. */ |
| 1829 | *again = FALSE; |
| 1830 | |
| 1831 | /* We don't have to do anything for a relocatable link, if |
| 1832 | this section does not have relocs, or if this is not a |
| 1833 | code section. */ |
| 1834 | if (link_info->relocatable |
| 1835 | || (sec->flags & SEC_RELOC) == 0 |
| 1836 | || sec->reloc_count == 0 |
| 1837 | || (sec->flags & SEC_CODE) == 0) |
| 1838 | return TRUE; |
| 1839 | |
| 1840 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
| 1841 | shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; |
| 1842 | |
| 1843 | sec_start = sec->output_section->vma + sec->output_offset; |
| 1844 | sec_end = sec->output_section->vma + sec->output_offset + sec->size; |
| 1845 | |
| 1846 | /* Get the section contents. */ |
| 1847 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
| 1848 | contents = elf_section_data (sec)->this_hdr.contents; |
| 1849 | /* Go get them off disk. */ |
| 1850 | else |
| 1851 | { |
| 1852 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
| 1853 | goto error_return; |
| 1854 | elf_section_data (sec)->this_hdr.contents = contents; |
| 1855 | } |
| 1856 | |
| 1857 | /* Read this BFD's symbols. */ |
| 1858 | /* Get cached copy if it exists. */ |
| 1859 | if (symtab_hdr->contents != NULL) |
| 1860 | intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; |
| 1861 | else |
| 1862 | { |
| 1863 | intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); |
| 1864 | symtab_hdr->contents = (bfd_byte *) intsyms; |
| 1865 | } |
| 1866 | |
| 1867 | if (shndx_hdr->sh_size != 0) |
| 1868 | { |
| 1869 | bfd_size_type amt; |
| 1870 | |
| 1871 | amt = symtab_hdr->sh_info; |
| 1872 | amt *= sizeof (Elf_External_Sym_Shndx); |
| 1873 | shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); |
| 1874 | if (shndx_buf == NULL) |
| 1875 | goto error_return; |
| 1876 | if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 |
| 1877 | || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt) |
| 1878 | goto error_return; |
| 1879 | shndx_hdr->contents = (bfd_byte *) shndx_buf; |
| 1880 | } |
| 1881 | |
| 1882 | /* Get a copy of the native relocations. */ |
| 1883 | internal_relocs = (_bfd_elf_link_read_relocs |
| 1884 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, |
| 1885 | link_info->keep_memory)); |
| 1886 | if (internal_relocs == NULL) |
| 1887 | goto error_return; |
| 1888 | if (! link_info->keep_memory) |
| 1889 | free_relocs = internal_relocs; |
| 1890 | |
| 1891 | /* The RL_ relocs must be just before the operand relocs they go |
| 1892 | with, so we must sort them to guarantee this. We use bubblesort |
| 1893 | instead of qsort so we can guarantee that relocs with the same |
| 1894 | address remain in the same relative order. */ |
| 1895 | reloc_bubblesort (internal_relocs, sec->reloc_count); |
| 1896 | |
| 1897 | /* Walk through them looking for relaxing opportunities. */ |
| 1898 | irelend = internal_relocs + sec->reloc_count; |
| 1899 | |
| 1900 | /* This will either be NULL or a pointer to the next alignment |
| 1901 | relocation. */ |
| 1902 | next_alignment = internal_relocs; |
| 1903 | /* This will be the previous alignment, although at first it points |
| 1904 | to the first real relocation. */ |
| 1905 | prev_alignment = internal_relocs; |
| 1906 | |
| 1907 | /* We calculate worst case shrinkage caused by alignment directives. |
| 1908 | No fool-proof, but better than either ignoring the problem or |
| 1909 | doing heavy duty analysis of all the alignment markers in all |
| 1910 | input sections. */ |
| 1911 | section_alignment_glue = 0; |
| 1912 | for (irel = internal_relocs; irel < irelend; irel++) |
| 1913 | if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX |
| 1914 | && irel->r_addend & RX_RELAXA_ALIGN) |
| 1915 | { |
| 1916 | int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM); |
| 1917 | |
| 1918 | if (section_alignment_glue < this_glue) |
| 1919 | section_alignment_glue = this_glue; |
| 1920 | } |
| 1921 | /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte |
| 1922 | shrinkage. */ |
| 1923 | section_alignment_glue *= 2; |
| 1924 | |
| 1925 | for (irel = internal_relocs; irel < irelend; irel++) |
| 1926 | { |
| 1927 | unsigned char *insn; |
| 1928 | int nrelocs; |
| 1929 | |
| 1930 | /* The insns we care about are all marked with one of these. */ |
| 1931 | if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX) |
| 1932 | continue; |
| 1933 | |
| 1934 | if (irel->r_addend & RX_RELAXA_ALIGN |
| 1935 | || next_alignment == internal_relocs) |
| 1936 | { |
| 1937 | /* When we delete bytes, we need to maintain all the alignments |
| 1938 | indicated. In addition, we need to be careful about relaxing |
| 1939 | jumps across alignment boundaries - these displacements |
| 1940 | *grow* when we delete bytes. For now, don't shrink |
| 1941 | displacements across an alignment boundary, just in case. |
| 1942 | Note that this only affects relocations to the same |
| 1943 | section. */ |
| 1944 | prev_alignment = next_alignment; |
| 1945 | next_alignment += 2; |
| 1946 | while (next_alignment < irelend |
| 1947 | && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX |
| 1948 | || !(next_alignment->r_addend & RX_RELAXA_ELIGN))) |
| 1949 | next_alignment ++; |
| 1950 | if (next_alignment >= irelend || next_alignment->r_offset == 0) |
| 1951 | next_alignment = NULL; |
| 1952 | } |
| 1953 | |
| 1954 | /* When we hit alignment markers, see if we've shrunk enough |
| 1955 | before them to reduce the gap without violating the alignment |
| 1956 | requirements. */ |
| 1957 | if (irel->r_addend & RX_RELAXA_ALIGN) |
| 1958 | { |
| 1959 | /* At this point, the next relocation *should* be the ELIGN |
| 1960 | end marker. */ |
| 1961 | Elf_Internal_Rela *erel = irel + 1; |
| 1962 | unsigned int alignment, nbytes; |
| 1963 | |
| 1964 | if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX) |
| 1965 | continue; |
| 1966 | if (!(erel->r_addend & RX_RELAXA_ELIGN)) |
| 1967 | continue; |
| 1968 | |
| 1969 | alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM); |
| 1970 | |
| 1971 | if (erel->r_offset - irel->r_offset < alignment) |
| 1972 | continue; |
| 1973 | |
| 1974 | nbytes = erel->r_offset - irel->r_offset; |
| 1975 | nbytes /= alignment; |
| 1976 | nbytes *= alignment; |
| 1977 | |
| 1978 | elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment, |
| 1979 | erel->r_offset == sec->size); |
| 1980 | *again = TRUE; |
| 1981 | |
| 1982 | continue; |
| 1983 | } |
| 1984 | |
| 1985 | if (irel->r_addend & RX_RELAXA_ELIGN) |
| 1986 | continue; |
| 1987 | |
| 1988 | insn = contents + irel->r_offset; |
| 1989 | |
| 1990 | nrelocs = irel->r_addend & RX_RELAXA_RNUM; |
| 1991 | |
| 1992 | /* At this point, we have an insn that is a candidate for linker |
| 1993 | relaxation. There are NRELOCS relocs following that may be |
| 1994 | relaxed, although each reloc may be made of more than one |
| 1995 | reloc entry (such as gp-rel symbols). */ |
| 1996 | |
| 1997 | /* Get the value of the symbol referred to by the reloc. Just |
| 1998 | in case this is the last reloc in the list, use the RL's |
| 1999 | addend to choose between this reloc (no addend) or the next |
| 2000 | (yes addend, which means at least one following reloc). */ |
| 2001 | |
| 2002 | /* srel points to the "current" reloction for this insn - |
| 2003 | actually the last reloc for a given operand, which is the one |
| 2004 | we need to update. We check the relaxations in the same |
| 2005 | order that the relocations happen, so we'll just push it |
| 2006 | along as we go. */ |
| 2007 | srel = irel; |
| 2008 | |
| 2009 | pc = sec->output_section->vma + sec->output_offset |
| 2010 | + srel->r_offset; |
| 2011 | |
| 2012 | #define GET_RELOC \ |
| 2013 | symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ |
| 2014 | pcrel = symval - pc + srel->r_addend; \ |
| 2015 | nrelocs --; |
| 2016 | |
| 2017 | #define SNIPNR(offset, nbytes) \ |
| 2018 | elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); |
| 2019 | #define SNIP(offset, nbytes, newtype) \ |
| 2020 | SNIPNR (offset, nbytes); \ |
| 2021 | srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) |
| 2022 | |
| 2023 | /* The order of these bit tests must match the order that the |
| 2024 | relocs appear in. Since we sorted those by offset, we can |
| 2025 | predict them. */ |
| 2026 | |
| 2027 | /* Note that the numbers in, say, DSP6 are the bit offsets of |
| 2028 | the code fields that describe the operand. Bits number 0 for |
| 2029 | the MSB of insn[0]. */ |
| 2030 | |
| 2031 | /* DSP* codes: |
| 2032 | 0 00 [reg] |
| 2033 | 1 01 dsp:8[reg] |
| 2034 | 2 10 dsp:16[reg] |
| 2035 | 3 11 reg */ |
| 2036 | if (irel->r_addend & RX_RELAXA_DSP6) |
| 2037 | { |
| 2038 | GET_RELOC; |
| 2039 | |
| 2040 | code = insn[0] & 3; |
| 2041 | if (code == 2 && symval/scale <= 255) |
| 2042 | { |
| 2043 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2044 | insn[0] &= 0xfc; |
| 2045 | insn[0] |= 0x01; |
| 2046 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2047 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2048 | { |
| 2049 | SNIP (3, 1, newrel); |
| 2050 | *again = TRUE; |
| 2051 | } |
| 2052 | } |
| 2053 | |
| 2054 | else if (code == 1 && symval == 0) |
| 2055 | { |
| 2056 | insn[0] &= 0xfc; |
| 2057 | SNIP (2, 1, R_RX_NONE); |
| 2058 | *again = TRUE; |
| 2059 | } |
| 2060 | |
| 2061 | /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */ |
| 2062 | else if (code == 1 && symval/scale <= 31 |
| 2063 | /* Decodable bits. */ |
| 2064 | && (insn[0] & 0xcc) == 0xcc |
| 2065 | /* width */ |
| 2066 | && (insn[0] & 0x30) != 3 |
| 2067 | /* register MSBs */ |
| 2068 | && (insn[1] & 0x88) == 0x00) |
| 2069 | { |
| 2070 | int newrel = 0; |
| 2071 | |
| 2072 | insn[0] = 0x88 | (insn[0] & 0x30); |
| 2073 | /* The register fields are in the right place already. */ |
| 2074 | |
| 2075 | /* We can't relax this new opcode. */ |
| 2076 | irel->r_addend = 0; |
| 2077 | |
| 2078 | switch ((insn[0] & 0x30) >> 4) |
| 2079 | { |
| 2080 | case 0: |
| 2081 | newrel = R_RX_RH_ABS5p5B; |
| 2082 | break; |
| 2083 | case 1: |
| 2084 | newrel = R_RX_RH_ABS5p5W; |
| 2085 | break; |
| 2086 | case 2: |
| 2087 | newrel = R_RX_RH_ABS5p5L; |
| 2088 | break; |
| 2089 | } |
| 2090 | |
| 2091 | move_reloc (irel, srel, -2); |
| 2092 | SNIP (2, 1, newrel); |
| 2093 | } |
| 2094 | |
| 2095 | /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */ |
| 2096 | else if (code == 1 && symval/scale <= 31 |
| 2097 | /* Decodable bits. */ |
| 2098 | && (insn[0] & 0xf8) == 0x58 |
| 2099 | /* Register MSBs. */ |
| 2100 | && (insn[1] & 0x88) == 0x00) |
| 2101 | { |
| 2102 | int newrel = 0; |
| 2103 | |
| 2104 | insn[0] = 0xb0 | ((insn[0] & 0x04) << 1); |
| 2105 | /* The register fields are in the right place already. */ |
| 2106 | |
| 2107 | /* We can't relax this new opcode. */ |
| 2108 | irel->r_addend = 0; |
| 2109 | |
| 2110 | switch ((insn[0] & 0x08) >> 3) |
| 2111 | { |
| 2112 | case 0: |
| 2113 | newrel = R_RX_RH_ABS5p5B; |
| 2114 | break; |
| 2115 | case 1: |
| 2116 | newrel = R_RX_RH_ABS5p5W; |
| 2117 | break; |
| 2118 | } |
| 2119 | |
| 2120 | move_reloc (irel, srel, -2); |
| 2121 | SNIP (2, 1, newrel); |
| 2122 | } |
| 2123 | } |
| 2124 | |
| 2125 | /* A DSP4 operand always follows a DSP6 operand, even if there's |
| 2126 | no relocation for it. We have to read the code out of the |
| 2127 | opcode to calculate the offset of the operand. */ |
| 2128 | if (irel->r_addend & RX_RELAXA_DSP4) |
| 2129 | { |
| 2130 | int code6, offset = 0; |
| 2131 | |
| 2132 | GET_RELOC; |
| 2133 | |
| 2134 | code6 = insn[0] & 0x03; |
| 2135 | switch (code6) |
| 2136 | { |
| 2137 | case 0: offset = 2; break; |
| 2138 | case 1: offset = 3; break; |
| 2139 | case 2: offset = 4; break; |
| 2140 | case 3: offset = 2; break; |
| 2141 | } |
| 2142 | |
| 2143 | code = (insn[0] & 0x0c) >> 2; |
| 2144 | |
| 2145 | if (code == 2 && symval / scale <= 255) |
| 2146 | { |
| 2147 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2148 | |
| 2149 | insn[0] &= 0xf3; |
| 2150 | insn[0] |= 0x04; |
| 2151 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2152 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2153 | { |
| 2154 | SNIP (offset+1, 1, newrel); |
| 2155 | *again = TRUE; |
| 2156 | } |
| 2157 | } |
| 2158 | |
| 2159 | else if (code == 1 && symval == 0) |
| 2160 | { |
| 2161 | insn[0] &= 0xf3; |
| 2162 | SNIP (offset, 1, R_RX_NONE); |
| 2163 | *again = TRUE; |
| 2164 | } |
| 2165 | /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */ |
| 2166 | else if (code == 1 && symval/scale <= 31 |
| 2167 | /* Decodable bits. */ |
| 2168 | && (insn[0] & 0xc3) == 0xc3 |
| 2169 | /* Width. */ |
| 2170 | && (insn[0] & 0x30) != 3 |
| 2171 | /* Register MSBs. */ |
| 2172 | && (insn[1] & 0x88) == 0x00) |
| 2173 | { |
| 2174 | int newrel = 0; |
| 2175 | |
| 2176 | insn[0] = 0x80 | (insn[0] & 0x30); |
| 2177 | /* The register fields are in the right place already. */ |
| 2178 | |
| 2179 | /* We can't relax this new opcode. */ |
| 2180 | irel->r_addend = 0; |
| 2181 | |
| 2182 | switch ((insn[0] & 0x30) >> 4) |
| 2183 | { |
| 2184 | case 0: |
| 2185 | newrel = R_RX_RH_ABS5p5B; |
| 2186 | break; |
| 2187 | case 1: |
| 2188 | newrel = R_RX_RH_ABS5p5W; |
| 2189 | break; |
| 2190 | case 2: |
| 2191 | newrel = R_RX_RH_ABS5p5L; |
| 2192 | break; |
| 2193 | } |
| 2194 | |
| 2195 | move_reloc (irel, srel, -2); |
| 2196 | SNIP (2, 1, newrel); |
| 2197 | } |
| 2198 | } |
| 2199 | |
| 2200 | /* These always occur alone, but the offset depends on whether |
| 2201 | it's a MEMEX opcode (0x06) or not. */ |
| 2202 | if (irel->r_addend & RX_RELAXA_DSP14) |
| 2203 | { |
| 2204 | int offset; |
| 2205 | GET_RELOC; |
| 2206 | |
| 2207 | if (insn[0] == 0x06) |
| 2208 | offset = 3; |
| 2209 | else |
| 2210 | offset = 4; |
| 2211 | |
| 2212 | code = insn[1] & 3; |
| 2213 | |
| 2214 | if (code == 2 && symval / scale <= 255) |
| 2215 | { |
| 2216 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2217 | |
| 2218 | insn[1] &= 0xfc; |
| 2219 | insn[1] |= 0x01; |
| 2220 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2221 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2222 | { |
| 2223 | SNIP (offset, 1, newrel); |
| 2224 | *again = TRUE; |
| 2225 | } |
| 2226 | } |
| 2227 | else if (code == 1 && symval == 0) |
| 2228 | { |
| 2229 | insn[1] &= 0xfc; |
| 2230 | SNIP (offset, 1, R_RX_NONE); |
| 2231 | *again = TRUE; |
| 2232 | } |
| 2233 | } |
| 2234 | |
| 2235 | /* IMM* codes: |
| 2236 | 0 00 imm:32 |
| 2237 | 1 01 simm:8 |
| 2238 | 2 10 simm:16 |
| 2239 | 3 11 simm:24. */ |
| 2240 | |
| 2241 | /* These always occur alone. */ |
| 2242 | if (irel->r_addend & RX_RELAXA_IMM6) |
| 2243 | { |
| 2244 | long ssymval; |
| 2245 | |
| 2246 | GET_RELOC; |
| 2247 | |
| 2248 | /* These relocations sign-extend, so we must do signed compares. */ |
| 2249 | ssymval = (long) symval; |
| 2250 | |
| 2251 | code = insn[0] & 0x03; |
| 2252 | |
| 2253 | if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) |
| 2254 | { |
| 2255 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2256 | |
| 2257 | insn[0] &= 0xfc; |
| 2258 | insn[0] |= 0x03; |
| 2259 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2260 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2261 | { |
| 2262 | SNIP (2, 1, newrel); |
| 2263 | *again = TRUE; |
| 2264 | } |
| 2265 | } |
| 2266 | |
| 2267 | else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) |
| 2268 | { |
| 2269 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2270 | |
| 2271 | insn[0] &= 0xfc; |
| 2272 | insn[0] |= 0x02; |
| 2273 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2274 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2275 | { |
| 2276 | SNIP (2, 1, newrel); |
| 2277 | *again = TRUE; |
| 2278 | } |
| 2279 | } |
| 2280 | |
| 2281 | /* Special case UIMM8 format: CMP #uimm8,Rdst. */ |
| 2282 | else if (code == 2 && ssymval <= 255 && ssymval >= 16 |
| 2283 | /* Decodable bits. */ |
| 2284 | && (insn[0] & 0xfc) == 0x74 |
| 2285 | /* Decodable bits. */ |
| 2286 | && ((insn[1] & 0xf0) == 0x00)) |
| 2287 | { |
| 2288 | int newrel; |
| 2289 | |
| 2290 | insn[0] = 0x75; |
| 2291 | insn[1] = 0x50 | (insn[1] & 0x0f); |
| 2292 | |
| 2293 | /* We can't relax this new opcode. */ |
| 2294 | irel->r_addend = 0; |
| 2295 | |
| 2296 | if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) |
| 2297 | newrel = R_RX_ABS8U; |
| 2298 | else |
| 2299 | newrel = R_RX_DIR8U; |
| 2300 | |
| 2301 | SNIP (2, 1, newrel); |
| 2302 | *again = TRUE; |
| 2303 | } |
| 2304 | |
| 2305 | else if (code == 2 && ssymval <= 127 && ssymval >= -128) |
| 2306 | { |
| 2307 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2308 | |
| 2309 | insn[0] &= 0xfc; |
| 2310 | insn[0] |= 0x01; |
| 2311 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2312 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2313 | { |
| 2314 | SNIP (2, 1, newrel); |
| 2315 | *again = TRUE; |
| 2316 | } |
| 2317 | } |
| 2318 | |
| 2319 | /* Special case UIMM4 format: CMP, MUL, AND, OR. */ |
| 2320 | else if (code == 1 && ssymval <= 15 && ssymval >= 0 |
| 2321 | /* Decodable bits and immediate type. */ |
| 2322 | && insn[0] == 0x75 |
| 2323 | /* Decodable bits. */ |
| 2324 | && (insn[1] & 0xc0) == 0x00) |
| 2325 | { |
| 2326 | static const int newop[4] = { 1, 3, 4, 5 }; |
| 2327 | |
| 2328 | insn[0] = 0x60 | newop[insn[1] >> 4]; |
| 2329 | /* The register number doesn't move. */ |
| 2330 | |
| 2331 | /* We can't relax this new opcode. */ |
| 2332 | irel->r_addend = 0; |
| 2333 | |
| 2334 | move_reloc (irel, srel, -1); |
| 2335 | |
| 2336 | SNIP (2, 1, R_RX_RH_UIMM4p8); |
| 2337 | *again = TRUE; |
| 2338 | } |
| 2339 | |
| 2340 | /* Special case UIMM4 format: ADD -> ADD/SUB. */ |
| 2341 | else if (code == 1 && ssymval <= 15 && ssymval >= -15 |
| 2342 | /* Decodable bits and immediate type. */ |
| 2343 | && insn[0] == 0x71 |
| 2344 | /* Same register for source and destination. */ |
| 2345 | && ((insn[1] >> 4) == (insn[1] & 0x0f))) |
| 2346 | { |
| 2347 | int newrel; |
| 2348 | |
| 2349 | /* Note that we can't turn "add $0,Rs" into a NOP |
| 2350 | because the flags need to be set right. */ |
| 2351 | |
| 2352 | if (ssymval < 0) |
| 2353 | { |
| 2354 | insn[0] = 0x60; /* Subtract. */ |
| 2355 | newrel = R_RX_RH_UNEG4p8; |
| 2356 | } |
| 2357 | else |
| 2358 | { |
| 2359 | insn[0] = 0x62; /* Add. */ |
| 2360 | newrel = R_RX_RH_UIMM4p8; |
| 2361 | } |
| 2362 | |
| 2363 | /* The register number is in the right place. */ |
| 2364 | |
| 2365 | /* We can't relax this new opcode. */ |
| 2366 | irel->r_addend = 0; |
| 2367 | |
| 2368 | move_reloc (irel, srel, -1); |
| 2369 | |
| 2370 | SNIP (2, 1, newrel); |
| 2371 | *again = TRUE; |
| 2372 | } |
| 2373 | } |
| 2374 | |
| 2375 | /* These are either matched with a DSP6 (2-byte base) or an id24 |
| 2376 | (3-byte base). */ |
| 2377 | if (irel->r_addend & RX_RELAXA_IMM12) |
| 2378 | { |
| 2379 | int dspcode, offset = 0; |
| 2380 | long ssymval; |
| 2381 | |
| 2382 | GET_RELOC; |
| 2383 | |
| 2384 | if ((insn[0] & 0xfc) == 0xfc) |
| 2385 | dspcode = 1; /* Just something with one byte operand. */ |
| 2386 | else |
| 2387 | dspcode = insn[0] & 3; |
| 2388 | switch (dspcode) |
| 2389 | { |
| 2390 | case 0: offset = 2; break; |
| 2391 | case 1: offset = 3; break; |
| 2392 | case 2: offset = 4; break; |
| 2393 | case 3: offset = 2; break; |
| 2394 | } |
| 2395 | |
| 2396 | /* These relocations sign-extend, so we must do signed compares. */ |
| 2397 | ssymval = (long) symval; |
| 2398 | |
| 2399 | code = (insn[1] >> 2) & 3; |
| 2400 | if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) |
| 2401 | { |
| 2402 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2403 | |
| 2404 | insn[1] &= 0xf3; |
| 2405 | insn[1] |= 0x0c; |
| 2406 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2407 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2408 | { |
| 2409 | SNIP (offset, 1, newrel); |
| 2410 | *again = TRUE; |
| 2411 | } |
| 2412 | } |
| 2413 | |
| 2414 | else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) |
| 2415 | { |
| 2416 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2417 | |
| 2418 | insn[1] &= 0xf3; |
| 2419 | insn[1] |= 0x08; |
| 2420 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2421 | if (newrel != ELF32_R_TYPE (srel->r_info)) |
| 2422 | { |
| 2423 | SNIP (offset, 1, newrel); |
| 2424 | *again = TRUE; |
| 2425 | } |
| 2426 | } |
| 2427 | |
| 2428 | /* Special case UIMM8 format: MOV #uimm8,Rdst. */ |
| 2429 | else if (code == 2 && ssymval <= 255 && ssymval >= 16 |
| 2430 | /* Decodable bits. */ |
| 2431 | && insn[0] == 0xfb |
| 2432 | /* Decodable bits. */ |
| 2433 | && ((insn[1] & 0x03) == 0x02)) |
| 2434 | { |
| 2435 | int newrel; |
| 2436 | |
| 2437 | insn[0] = 0x75; |
| 2438 | insn[1] = 0x40 | (insn[1] >> 4); |
| 2439 | |
| 2440 | /* We can't relax this new opcode. */ |
| 2441 | irel->r_addend = 0; |
| 2442 | |
| 2443 | if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) |
| 2444 | newrel = R_RX_ABS8U; |
| 2445 | else |
| 2446 | newrel = R_RX_DIR8U; |
| 2447 | |
| 2448 | SNIP (2, 1, newrel); |
| 2449 | *again = TRUE; |
| 2450 | } |
| 2451 | |
| 2452 | else if (code == 2 && ssymval <= 127 && ssymval >= -128) |
| 2453 | { |
| 2454 | unsigned int newrel = ELF32_R_TYPE(srel->r_info); |
| 2455 | |
| 2456 | insn[1] &= 0xf3; |
| 2457 | insn[1] |= 0x04; |
| 2458 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2459 | if (newrel != ELF32_R_TYPE(srel->r_info)) |
| 2460 | { |
| 2461 | SNIP (offset, 1, newrel); |
| 2462 | *again = TRUE; |
| 2463 | } |
| 2464 | } |
| 2465 | |
| 2466 | /* Special case UIMM4 format: MOV #uimm4,Rdst. */ |
| 2467 | else if (code == 1 && ssymval <= 15 && ssymval >= 0 |
| 2468 | /* Decodable bits. */ |
| 2469 | && insn[0] == 0xfb |
| 2470 | /* Decodable bits. */ |
| 2471 | && ((insn[1] & 0x03) == 0x02)) |
| 2472 | { |
| 2473 | insn[0] = 0x66; |
| 2474 | insn[1] = insn[1] >> 4; |
| 2475 | |
| 2476 | /* We can't relax this new opcode. */ |
| 2477 | irel->r_addend = 0; |
| 2478 | |
| 2479 | move_reloc (irel, srel, -1); |
| 2480 | |
| 2481 | SNIP (2, 1, R_RX_RH_UIMM4p8); |
| 2482 | *again = TRUE; |
| 2483 | } |
| 2484 | } |
| 2485 | |
| 2486 | if (irel->r_addend & RX_RELAXA_BRA) |
| 2487 | { |
| 2488 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); |
| 2489 | int max_pcrel3 = 4; |
| 2490 | int alignment_glue = 0; |
| 2491 | |
| 2492 | GET_RELOC; |
| 2493 | |
| 2494 | /* Branches over alignment chunks are problematic, as |
| 2495 | deleting bytes here makes the branch *further* away. We |
| 2496 | can be agressive with branches within this alignment |
| 2497 | block, but not branches outside it. */ |
| 2498 | if ((prev_alignment == NULL |
| 2499 | || symval < (bfd_vma)(sec_start + prev_alignment->r_offset)) |
| 2500 | && (next_alignment == NULL |
| 2501 | || symval > (bfd_vma)(sec_start + next_alignment->r_offset))) |
| 2502 | alignment_glue = section_alignment_glue; |
| 2503 | |
| 2504 | if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX |
| 2505 | && srel[1].r_addend & RX_RELAXA_BRA |
| 2506 | && srel[1].r_offset < irel->r_offset + pcrel) |
| 2507 | max_pcrel3 ++; |
| 2508 | |
| 2509 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); |
| 2510 | |
| 2511 | /* The values we compare PCREL with are not what you'd |
| 2512 | expect; they're off by a little to compensate for (1) |
| 2513 | where the reloc is relative to the insn, and (2) how much |
| 2514 | the insn is going to change when we relax it. */ |
| 2515 | |
| 2516 | /* These we have to decode. */ |
| 2517 | switch (insn[0]) |
| 2518 | { |
| 2519 | case 0x04: /* BRA pcdsp:24 */ |
| 2520 | if (-32768 + alignment_glue <= pcrel |
| 2521 | && pcrel <= 32765 - alignment_glue) |
| 2522 | { |
| 2523 | insn[0] = 0x38; |
| 2524 | SNIP (3, 1, newrel); |
| 2525 | *again = TRUE; |
| 2526 | } |
| 2527 | break; |
| 2528 | |
| 2529 | case 0x38: /* BRA pcdsp:16 */ |
| 2530 | if (-128 + alignment_glue <= pcrel |
| 2531 | && pcrel <= 127 - alignment_glue) |
| 2532 | { |
| 2533 | insn[0] = 0x2e; |
| 2534 | SNIP (2, 1, newrel); |
| 2535 | *again = TRUE; |
| 2536 | } |
| 2537 | break; |
| 2538 | |
| 2539 | case 0x2e: /* BRA pcdsp:8 */ |
| 2540 | /* Note that there's a risk here of shortening things so |
| 2541 | much that we no longer fit this reloc; it *should* |
| 2542 | only happen when you branch across a branch, and that |
| 2543 | branch also devolves into BRA.S. "Real" code should |
| 2544 | be OK. */ |
| 2545 | if (max_pcrel3 + alignment_glue <= pcrel |
| 2546 | && pcrel <= 10 - alignment_glue |
| 2547 | && allow_pcrel3) |
| 2548 | { |
| 2549 | insn[0] = 0x08; |
| 2550 | SNIP (1, 1, newrel); |
| 2551 | move_reloc (irel, srel, -1); |
| 2552 | *again = TRUE; |
| 2553 | } |
| 2554 | break; |
| 2555 | |
| 2556 | case 0x05: /* BSR pcdsp:24 */ |
| 2557 | if (-32768 + alignment_glue <= pcrel |
| 2558 | && pcrel <= 32765 - alignment_glue) |
| 2559 | { |
| 2560 | insn[0] = 0x39; |
| 2561 | SNIP (1, 1, newrel); |
| 2562 | *again = TRUE; |
| 2563 | } |
| 2564 | break; |
| 2565 | |
| 2566 | case 0x3a: /* BEQ.W pcdsp:16 */ |
| 2567 | case 0x3b: /* BNE.W pcdsp:16 */ |
| 2568 | if (-128 + alignment_glue <= pcrel |
| 2569 | && pcrel <= 127 - alignment_glue) |
| 2570 | { |
| 2571 | insn[0] = 0x20 | (insn[0] & 1); |
| 2572 | SNIP (1, 1, newrel); |
| 2573 | *again = TRUE; |
| 2574 | } |
| 2575 | break; |
| 2576 | |
| 2577 | case 0x20: /* BEQ.B pcdsp:8 */ |
| 2578 | case 0x21: /* BNE.B pcdsp:8 */ |
| 2579 | if (max_pcrel3 + alignment_glue <= pcrel |
| 2580 | && pcrel - alignment_glue <= 10 |
| 2581 | && allow_pcrel3) |
| 2582 | { |
| 2583 | insn[0] = 0x10 | ((insn[0] & 1) << 3); |
| 2584 | SNIP (1, 1, newrel); |
| 2585 | move_reloc (irel, srel, -1); |
| 2586 | *again = TRUE; |
| 2587 | } |
| 2588 | break; |
| 2589 | |
| 2590 | case 0x16: /* synthetic BNE dsp24 */ |
| 2591 | case 0x1e: /* synthetic BEQ dsp24 */ |
| 2592 | if (-32767 + alignment_glue <= pcrel |
| 2593 | && pcrel <= 32766 - alignment_glue |
| 2594 | && insn[1] == 0x04) |
| 2595 | { |
| 2596 | if (insn[0] == 0x16) |
| 2597 | insn[0] = 0x3b; |
| 2598 | else |
| 2599 | insn[0] = 0x3a; |
| 2600 | /* We snip out the bytes at the end else the reloc |
| 2601 | will get moved too, and too much. */ |
| 2602 | SNIP (3, 2, newrel); |
| 2603 | move_reloc (irel, srel, -1); |
| 2604 | *again = TRUE; |
| 2605 | } |
| 2606 | break; |
| 2607 | } |
| 2608 | |
| 2609 | /* Special case - synthetic conditional branches, pcrel24. |
| 2610 | Note that EQ and NE have been handled above. */ |
| 2611 | if ((insn[0] & 0xf0) == 0x20 |
| 2612 | && insn[1] == 0x06 |
| 2613 | && insn[2] == 0x04 |
| 2614 | && srel->r_offset != irel->r_offset + 1 |
| 2615 | && -32767 + alignment_glue <= pcrel |
| 2616 | && pcrel <= 32766 - alignment_glue) |
| 2617 | { |
| 2618 | insn[1] = 0x05; |
| 2619 | insn[2] = 0x38; |
| 2620 | SNIP (5, 1, newrel); |
| 2621 | *again = TRUE; |
| 2622 | } |
| 2623 | |
| 2624 | /* Special case - synthetic conditional branches, pcrel16 */ |
| 2625 | if ((insn[0] & 0xf0) == 0x20 |
| 2626 | && insn[1] == 0x05 |
| 2627 | && insn[2] == 0x38 |
| 2628 | && srel->r_offset != irel->r_offset + 1 |
| 2629 | && -127 + alignment_glue <= pcrel |
| 2630 | && pcrel <= 126 - alignment_glue) |
| 2631 | { |
| 2632 | int cond = (insn[0] & 0x0f) ^ 0x01; |
| 2633 | |
| 2634 | insn[0] = 0x20 | cond; |
| 2635 | /* By moving the reloc first, we avoid having |
| 2636 | delete_bytes move it also. */ |
| 2637 | move_reloc (irel, srel, -2); |
| 2638 | SNIP (2, 3, newrel); |
| 2639 | *again = TRUE; |
| 2640 | } |
| 2641 | } |
| 2642 | |
| 2643 | BFD_ASSERT (nrelocs == 0); |
| 2644 | |
| 2645 | /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can |
| 2646 | use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky |
| 2647 | because it may have one or two relocations. */ |
| 2648 | if ((insn[0] & 0xfc) == 0xf8 |
| 2649 | && (insn[1] & 0x80) == 0x00 |
| 2650 | && (insn[0] & 0x03) != 0x03) |
| 2651 | { |
| 2652 | int dcode, icode, reg, ioff, dscale, ilen; |
| 2653 | bfd_vma disp_val = 0; |
| 2654 | long imm_val = 0; |
| 2655 | Elf_Internal_Rela * disp_rel = 0; |
| 2656 | Elf_Internal_Rela * imm_rel = 0; |
| 2657 | |
| 2658 | /* Reset this. */ |
| 2659 | srel = irel; |
| 2660 | |
| 2661 | dcode = insn[0] & 0x03; |
| 2662 | icode = (insn[1] >> 2) & 0x03; |
| 2663 | reg = (insn[1] >> 4) & 0x0f; |
| 2664 | |
| 2665 | ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2; |
| 2666 | |
| 2667 | /* Figure out what the dispacement is. */ |
| 2668 | if (dcode == 1 || dcode == 2) |
| 2669 | { |
| 2670 | /* There's a displacement. See if there's a reloc for it. */ |
| 2671 | if (srel[1].r_offset == irel->r_offset + 2) |
| 2672 | { |
| 2673 | GET_RELOC; |
| 2674 | disp_val = symval; |
| 2675 | disp_rel = srel; |
| 2676 | } |
| 2677 | else |
| 2678 | { |
| 2679 | if (dcode == 1) |
| 2680 | disp_val = insn[2]; |
| 2681 | else |
| 2682 | { |
| 2683 | #if RX_OPCODE_BIG_ENDIAN |
| 2684 | disp_val = insn[2] * 256 + insn[3]; |
| 2685 | #else |
| 2686 | disp_val = insn[2] + insn[3] * 256; |
| 2687 | #endif |
| 2688 | } |
| 2689 | switch (insn[1] & 3) |
| 2690 | { |
| 2691 | case 1: |
| 2692 | disp_val *= 2; |
| 2693 | scale = 2; |
| 2694 | break; |
| 2695 | case 2: |
| 2696 | disp_val *= 4; |
| 2697 | scale = 4; |
| 2698 | break; |
| 2699 | } |
| 2700 | } |
| 2701 | } |
| 2702 | |
| 2703 | dscale = scale; |
| 2704 | |
| 2705 | /* Figure out what the immediate is. */ |
| 2706 | if (srel[1].r_offset == irel->r_offset + ioff) |
| 2707 | { |
| 2708 | GET_RELOC; |
| 2709 | imm_val = (long) symval; |
| 2710 | imm_rel = srel; |
| 2711 | } |
| 2712 | else |
| 2713 | { |
| 2714 | unsigned char * ip = insn + ioff; |
| 2715 | |
| 2716 | switch (icode) |
| 2717 | { |
| 2718 | case 1: |
| 2719 | /* For byte writes, we don't sign extend. Makes the math easier later. */ |
| 2720 | if (scale == 1) |
| 2721 | imm_val = ip[0]; |
| 2722 | else |
| 2723 | imm_val = (char) ip[0]; |
| 2724 | break; |
| 2725 | case 2: |
| 2726 | #if RX_OPCODE_BIG_ENDIAN |
| 2727 | imm_val = ((char) ip[0] << 8) | ip[1]; |
| 2728 | #else |
| 2729 | imm_val = ((char) ip[1] << 8) | ip[0]; |
| 2730 | #endif |
| 2731 | break; |
| 2732 | case 3: |
| 2733 | #if RX_OPCODE_BIG_ENDIAN |
| 2734 | imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2]; |
| 2735 | #else |
| 2736 | imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0]; |
| 2737 | #endif |
| 2738 | break; |
| 2739 | case 0: |
| 2740 | #if RX_OPCODE_BIG_ENDIAN |
| 2741 | imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3]; |
| 2742 | #else |
| 2743 | imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0]; |
| 2744 | #endif |
| 2745 | break; |
| 2746 | } |
| 2747 | } |
| 2748 | |
| 2749 | ilen = 2; |
| 2750 | |
| 2751 | switch (dcode) |
| 2752 | { |
| 2753 | case 1: |
| 2754 | ilen += 1; |
| 2755 | break; |
| 2756 | case 2: |
| 2757 | ilen += 2; |
| 2758 | break; |
| 2759 | } |
| 2760 | |
| 2761 | switch (icode) |
| 2762 | { |
| 2763 | case 1: |
| 2764 | ilen += 1; |
| 2765 | break; |
| 2766 | case 2: |
| 2767 | ilen += 2; |
| 2768 | break; |
| 2769 | case 3: |
| 2770 | ilen += 3; |
| 2771 | break; |
| 2772 | case 4: |
| 2773 | ilen += 4; |
| 2774 | break; |
| 2775 | } |
| 2776 | |
| 2777 | /* The shortcut happens when the immediate is 0..255, |
| 2778 | register r0 to r7, and displacement (scaled) 0..31. */ |
| 2779 | |
| 2780 | if (0 <= imm_val && imm_val <= 255 |
| 2781 | && 0 <= reg && reg <= 7 |
| 2782 | && disp_val / dscale <= 31) |
| 2783 | { |
| 2784 | insn[0] = 0x3c | (insn[1] & 0x03); |
| 2785 | insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f); |
| 2786 | insn[2] = imm_val; |
| 2787 | |
| 2788 | if (disp_rel) |
| 2789 | { |
| 2790 | int newrel = R_RX_NONE; |
| 2791 | |
| 2792 | switch (dscale) |
| 2793 | { |
| 2794 | case 1: |
| 2795 | newrel = R_RX_RH_ABS5p8B; |
| 2796 | break; |
| 2797 | case 2: |
| 2798 | newrel = R_RX_RH_ABS5p8W; |
| 2799 | break; |
| 2800 | case 4: |
| 2801 | newrel = R_RX_RH_ABS5p8L; |
| 2802 | break; |
| 2803 | } |
| 2804 | disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel); |
| 2805 | move_reloc (irel, disp_rel, -1); |
| 2806 | } |
| 2807 | if (imm_rel) |
| 2808 | { |
| 2809 | imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U); |
| 2810 | move_reloc (disp_rel ? disp_rel : irel, |
| 2811 | imm_rel, |
| 2812 | irel->r_offset - imm_rel->r_offset + 2); |
| 2813 | } |
| 2814 | |
| 2815 | SNIPNR (3, ilen - 3); |
| 2816 | *again = TRUE; |
| 2817 | |
| 2818 | /* We can't relax this new opcode. */ |
| 2819 | irel->r_addend = 0; |
| 2820 | } |
| 2821 | } |
| 2822 | } |
| 2823 | |
| 2824 | /* We can't reliably relax branches to DIR3U_PCREL unless we know |
| 2825 | whatever they're branching over won't shrink any more. If we're |
| 2826 | basically done here, do one more pass just for branches - but |
| 2827 | don't request a pass after that one! */ |
| 2828 | if (!*again && !allow_pcrel3) |
| 2829 | { |
| 2830 | bfd_boolean ignored; |
| 2831 | |
| 2832 | elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE); |
| 2833 | } |
| 2834 | |
| 2835 | return TRUE; |
| 2836 | |
| 2837 | error_return: |
| 2838 | if (free_relocs != NULL) |
| 2839 | free (free_relocs); |
| 2840 | |
| 2841 | if (free_contents != NULL) |
| 2842 | free (free_contents); |
| 2843 | |
| 2844 | if (shndx_buf != NULL) |
| 2845 | { |
| 2846 | shndx_hdr->contents = NULL; |
| 2847 | free (shndx_buf); |
| 2848 | } |
| 2849 | |
| 2850 | if (free_intsyms != NULL) |
| 2851 | free (free_intsyms); |
| 2852 | |
| 2853 | return FALSE; |
| 2854 | } |
| 2855 | |
| 2856 | static bfd_boolean |
| 2857 | elf32_rx_relax_section_wrapper (bfd * abfd, |
| 2858 | asection * sec, |
| 2859 | struct bfd_link_info * link_info, |
| 2860 | bfd_boolean * again) |
| 2861 | { |
| 2862 | return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE); |
| 2863 | } |
| 2864 | \f |
| 2865 | /* Function to set the ELF flag bits. */ |
| 2866 | |
| 2867 | static bfd_boolean |
| 2868 | rx_elf_set_private_flags (bfd * abfd, flagword flags) |
| 2869 | { |
| 2870 | elf_elfheader (abfd)->e_flags = flags; |
| 2871 | elf_flags_init (abfd) = TRUE; |
| 2872 | return TRUE; |
| 2873 | } |
| 2874 | |
| 2875 | static bfd_boolean no_warn_mismatch = FALSE; |
| 2876 | |
| 2877 | void bfd_elf32_rx_set_target_flags (bfd_boolean); |
| 2878 | |
| 2879 | void |
| 2880 | bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch) |
| 2881 | { |
| 2882 | no_warn_mismatch = user_no_warn_mismatch; |
| 2883 | } |
| 2884 | |
| 2885 | /* Merge backend specific data from an object file to the output |
| 2886 | object file when linking. */ |
| 2887 | |
| 2888 | static bfd_boolean |
| 2889 | rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) |
| 2890 | { |
| 2891 | flagword old_flags; |
| 2892 | flagword new_flags; |
| 2893 | bfd_boolean error = FALSE; |
| 2894 | |
| 2895 | new_flags = elf_elfheader (ibfd)->e_flags; |
| 2896 | old_flags = elf_elfheader (obfd)->e_flags; |
| 2897 | |
| 2898 | if (!elf_flags_init (obfd)) |
| 2899 | { |
| 2900 | /* First call, no flags set. */ |
| 2901 | elf_flags_init (obfd) = TRUE; |
| 2902 | elf_elfheader (obfd)->e_flags = new_flags; |
| 2903 | } |
| 2904 | else if (old_flags != new_flags) |
| 2905 | { |
| 2906 | flagword known_flags = E_FLAG_RX_64BIT_DOUBLES | E_FLAG_RX_DSP; |
| 2907 | |
| 2908 | if ((old_flags ^ new_flags) & known_flags) |
| 2909 | { |
| 2910 | /* Only complain if flag bits we care about do not match. |
| 2911 | Other bits may be set, since older binaries did use some |
| 2912 | deprecated flags. */ |
| 2913 | if (no_warn_mismatch) |
| 2914 | { |
| 2915 | elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags; |
| 2916 | } |
| 2917 | else |
| 2918 | { |
| 2919 | (*_bfd_error_handler) |
| 2920 | ("ELF header flags mismatch: old_flags = 0x%.8lx, new_flags = 0x%.8lx, filename = %s", |
| 2921 | old_flags, new_flags, bfd_get_filename (ibfd)); |
| 2922 | error = TRUE; |
| 2923 | } |
| 2924 | } |
| 2925 | else |
| 2926 | elf_elfheader (obfd)->e_flags = new_flags & known_flags; |
| 2927 | } |
| 2928 | |
| 2929 | if (error) |
| 2930 | bfd_set_error (bfd_error_bad_value); |
| 2931 | |
| 2932 | return !error; |
| 2933 | } |
| 2934 | \f |
| 2935 | static bfd_boolean |
| 2936 | rx_elf_print_private_bfd_data (bfd * abfd, void * ptr) |
| 2937 | { |
| 2938 | FILE * file = (FILE *) ptr; |
| 2939 | flagword flags; |
| 2940 | |
| 2941 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
| 2942 | |
| 2943 | /* Print normal ELF private data. */ |
| 2944 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
| 2945 | |
| 2946 | flags = elf_elfheader (abfd)->e_flags; |
| 2947 | fprintf (file, _("private flags = 0x%lx:"), (long) flags); |
| 2948 | |
| 2949 | if (flags & E_FLAG_RX_64BIT_DOUBLES) |
| 2950 | fprintf (file, _(" [64-bit doubles]")); |
| 2951 | if (flags & E_FLAG_RX_DSP) |
| 2952 | fprintf (file, _(" [dsp]")); |
| 2953 | |
| 2954 | fputc ('\n', file); |
| 2955 | return TRUE; |
| 2956 | } |
| 2957 | |
| 2958 | /* Return the MACH for an e_flags value. */ |
| 2959 | |
| 2960 | static int |
| 2961 | elf32_rx_machine (bfd * abfd) |
| 2962 | { |
| 2963 | if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX) |
| 2964 | return bfd_mach_rx; |
| 2965 | |
| 2966 | return 0; |
| 2967 | } |
| 2968 | |
| 2969 | static bfd_boolean |
| 2970 | rx_elf_object_p (bfd * abfd) |
| 2971 | { |
| 2972 | bfd_default_set_arch_mach (abfd, bfd_arch_rx, |
| 2973 | elf32_rx_machine (abfd)); |
| 2974 | return TRUE; |
| 2975 | } |
| 2976 | \f |
| 2977 | |
| 2978 | #ifdef DEBUG |
| 2979 | void |
| 2980 | dump_symtab (bfd * abfd, void * internal_syms, void * external_syms) |
| 2981 | { |
| 2982 | size_t locsymcount; |
| 2983 | Elf_Internal_Sym * isymbuf; |
| 2984 | Elf_Internal_Sym * isymend; |
| 2985 | Elf_Internal_Sym * isym; |
| 2986 | Elf_Internal_Shdr * symtab_hdr; |
| 2987 | bfd_boolean free_internal = FALSE, free_external = FALSE; |
| 2988 | char * st_info_str; |
| 2989 | char * st_info_stb_str; |
| 2990 | char * st_other_str; |
| 2991 | char * st_shndx_str; |
| 2992 | |
| 2993 | if (! internal_syms) |
| 2994 | { |
| 2995 | internal_syms = bfd_malloc (1000); |
| 2996 | free_internal = 1; |
| 2997 | } |
| 2998 | if (! external_syms) |
| 2999 | { |
| 3000 | external_syms = bfd_malloc (1000); |
| 3001 | free_external = 1; |
| 3002 | } |
| 3003 | |
| 3004 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
| 3005 | locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym; |
| 3006 | if (free_internal) |
| 3007 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, |
| 3008 | symtab_hdr->sh_info, 0, |
| 3009 | internal_syms, external_syms, NULL); |
| 3010 | else |
| 3011 | isymbuf = internal_syms; |
| 3012 | isymend = isymbuf + locsymcount; |
| 3013 | |
| 3014 | for (isym = isymbuf ; isym < isymend ; isym++) |
| 3015 | { |
| 3016 | switch (ELF_ST_TYPE (isym->st_info)) |
| 3017 | { |
| 3018 | case STT_FUNC: st_info_str = "STT_FUNC"; |
| 3019 | case STT_SECTION: st_info_str = "STT_SECTION"; |
| 3020 | case STT_FILE: st_info_str = "STT_FILE"; |
| 3021 | case STT_OBJECT: st_info_str = "STT_OBJECT"; |
| 3022 | case STT_TLS: st_info_str = "STT_TLS"; |
| 3023 | default: st_info_str = ""; |
| 3024 | } |
| 3025 | switch (ELF_ST_BIND (isym->st_info)) |
| 3026 | { |
| 3027 | case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; |
| 3028 | case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; |
| 3029 | default: st_info_stb_str = ""; |
| 3030 | } |
| 3031 | switch (ELF_ST_VISIBILITY (isym->st_other)) |
| 3032 | { |
| 3033 | case STV_DEFAULT: st_other_str = "STV_DEFAULT"; |
| 3034 | case STV_INTERNAL: st_other_str = "STV_INTERNAL"; |
| 3035 | case STV_PROTECTED: st_other_str = "STV_PROTECTED"; |
| 3036 | default: st_other_str = ""; |
| 3037 | } |
| 3038 | switch (isym->st_shndx) |
| 3039 | { |
| 3040 | case SHN_ABS: st_shndx_str = "SHN_ABS"; |
| 3041 | case SHN_COMMON: st_shndx_str = "SHN_COMMON"; |
| 3042 | case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; |
| 3043 | default: st_shndx_str = ""; |
| 3044 | } |
| 3045 | |
| 3046 | printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s " |
| 3047 | "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n", |
| 3048 | isym, |
| 3049 | (unsigned long) isym->st_value, |
| 3050 | (unsigned long) isym->st_size, |
| 3051 | isym->st_name, |
| 3052 | bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link, |
| 3053 | isym->st_name), |
| 3054 | isym->st_info, st_info_str, st_info_stb_str, |
| 3055 | isym->st_other, st_other_str, |
| 3056 | isym->st_shndx, st_shndx_str); |
| 3057 | } |
| 3058 | if (free_internal) |
| 3059 | free (internal_syms); |
| 3060 | if (free_external) |
| 3061 | free (external_syms); |
| 3062 | } |
| 3063 | |
| 3064 | char * |
| 3065 | rx_get_reloc (long reloc) |
| 3066 | { |
| 3067 | if (0 <= reloc && reloc < R_RX_max) |
| 3068 | return rx_elf_howto_table[reloc].name; |
| 3069 | return ""; |
| 3070 | } |
| 3071 | #endif /* DEBUG */ |
| 3072 | |
| 3073 | \f |
| 3074 | /* We must take care to keep the on-disk copy of any code sections |
| 3075 | that are fully linked swapped if the target is big endian, to match |
| 3076 | the Renesas tools. */ |
| 3077 | |
| 3078 | /* The rule is: big endian object that are final-link executables, |
| 3079 | have code sections stored with 32-bit words swapped relative to |
| 3080 | what you'd get by default. */ |
| 3081 | |
| 3082 | static bfd_boolean |
| 3083 | rx_get_section_contents (bfd * abfd, |
| 3084 | sec_ptr section, |
| 3085 | void * location, |
| 3086 | file_ptr offset, |
| 3087 | bfd_size_type count) |
| 3088 | { |
| 3089 | int exec = (abfd->flags & EXEC_P) ? 1 : 0; |
| 3090 | int s_code = (section->flags & SEC_CODE) ? 1 : 0; |
| 3091 | bfd_boolean rv; |
| 3092 | |
| 3093 | #ifdef DJDEBUG |
| 3094 | fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n", |
| 3095 | (long) offset, (long) count, section->name, |
| 3096 | bfd_big_endian(abfd) ? "be" : "le", |
| 3097 | exec, s_code, (long unsigned) section->filepos, |
| 3098 | (long unsigned) offset); |
| 3099 | #endif |
| 3100 | |
| 3101 | if (exec && s_code && bfd_big_endian (abfd)) |
| 3102 | { |
| 3103 | char * cloc = (char *) location; |
| 3104 | bfd_size_type cnt, end_cnt; |
| 3105 | |
| 3106 | rv = TRUE; |
| 3107 | |
| 3108 | /* Fetch and swap unaligned bytes at the beginning. */ |
| 3109 | if (offset % 4) |
| 3110 | { |
| 3111 | char buf[4]; |
| 3112 | |
| 3113 | rv = _bfd_generic_get_section_contents (abfd, section, buf, |
| 3114 | (offset & -4), 4); |
| 3115 | if (!rv) |
| 3116 | return FALSE; |
| 3117 | |
| 3118 | bfd_putb32 (bfd_getl32 (buf), buf); |
| 3119 | |
| 3120 | cnt = 4 - (offset % 4); |
| 3121 | if (cnt > count) |
| 3122 | cnt = count; |
| 3123 | |
| 3124 | memcpy (location, buf + (offset % 4), cnt); |
| 3125 | |
| 3126 | count -= cnt; |
| 3127 | offset += cnt; |
| 3128 | cloc += count; |
| 3129 | } |
| 3130 | |
| 3131 | end_cnt = count % 4; |
| 3132 | |
| 3133 | /* Fetch and swap the middle bytes. */ |
| 3134 | if (count >= 4) |
| 3135 | { |
| 3136 | rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset, |
| 3137 | count - end_cnt); |
| 3138 | if (!rv) |
| 3139 | return FALSE; |
| 3140 | |
| 3141 | for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4) |
| 3142 | bfd_putb32 (bfd_getl32 (cloc), cloc); |
| 3143 | } |
| 3144 | |
| 3145 | /* Fetch and swap the end bytes. */ |
| 3146 | if (end_cnt > 0) |
| 3147 | { |
| 3148 | char buf[4]; |
| 3149 | |
| 3150 | /* Fetch the end bytes. */ |
| 3151 | rv = _bfd_generic_get_section_contents (abfd, section, buf, |
| 3152 | offset + count - end_cnt, 4); |
| 3153 | if (!rv) |
| 3154 | return FALSE; |
| 3155 | |
| 3156 | bfd_putb32 (bfd_getl32 (buf), buf); |
| 3157 | memcpy (cloc, buf, end_cnt); |
| 3158 | } |
| 3159 | } |
| 3160 | else |
| 3161 | rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count); |
| 3162 | |
| 3163 | return rv; |
| 3164 | } |
| 3165 | |
| 3166 | #ifdef DJDEBUG |
| 3167 | static bfd_boolean |
| 3168 | rx2_set_section_contents (bfd * abfd, |
| 3169 | sec_ptr section, |
| 3170 | const void * location, |
| 3171 | file_ptr offset, |
| 3172 | bfd_size_type count) |
| 3173 | { |
| 3174 | bfd_size_type i; |
| 3175 | |
| 3176 | fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n", |
| 3177 | section->name, (unsigned) section->vma, location, (int) offset, (int) count); |
| 3178 | for (i = 0; i < count; i++) |
| 3179 | { |
| 3180 | if (i % 16 == 0 && i > 0) |
| 3181 | fprintf (stderr, "\n"); |
| 3182 | |
| 3183 | if (i % 16 && i % 4 == 0) |
| 3184 | fprintf (stderr, " "); |
| 3185 | |
| 3186 | if (i % 16 == 0) |
| 3187 | fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); |
| 3188 | |
| 3189 | fprintf (stderr, " %02x", ((unsigned char *) location)[i]); |
| 3190 | } |
| 3191 | fprintf (stderr, "\n"); |
| 3192 | |
| 3193 | return _bfd_elf_set_section_contents (abfd, section, location, offset, count); |
| 3194 | } |
| 3195 | #define _bfd_elf_set_section_contents rx2_set_section_contents |
| 3196 | #endif |
| 3197 | |
| 3198 | static bfd_boolean |
| 3199 | rx_set_section_contents (bfd * abfd, |
| 3200 | sec_ptr section, |
| 3201 | const void * location, |
| 3202 | file_ptr offset, |
| 3203 | bfd_size_type count) |
| 3204 | { |
| 3205 | bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE; |
| 3206 | bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE; |
| 3207 | bfd_boolean rv; |
| 3208 | char * swapped_data = NULL; |
| 3209 | bfd_size_type i; |
| 3210 | bfd_vma caddr = section->vma + offset; |
| 3211 | file_ptr faddr = 0; |
| 3212 | bfd_size_type scount; |
| 3213 | |
| 3214 | #ifdef DJDEBUG |
| 3215 | bfd_size_type i; |
| 3216 | |
| 3217 | fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n", |
| 3218 | (long) offset, (long) count, section->name, |
| 3219 | bfd_big_endian (abfd) ? "be" : "le", |
| 3220 | exec, s_code); |
| 3221 | |
| 3222 | for (i = 0; i < count; i++) |
| 3223 | { |
| 3224 | int a = section->vma + offset + i; |
| 3225 | |
| 3226 | if (a % 16 == 0 && a > 0) |
| 3227 | fprintf (stderr, "\n"); |
| 3228 | |
| 3229 | if (a % 16 && a % 4 == 0) |
| 3230 | fprintf (stderr, " "); |
| 3231 | |
| 3232 | if (a % 16 == 0 || i == 0) |
| 3233 | fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); |
| 3234 | |
| 3235 | fprintf (stderr, " %02x", ((unsigned char *) location)[i]); |
| 3236 | } |
| 3237 | |
| 3238 | fprintf (stderr, "\n"); |
| 3239 | #endif |
| 3240 | |
| 3241 | if (! exec || ! s_code || ! bfd_big_endian (abfd)) |
| 3242 | return _bfd_elf_set_section_contents (abfd, section, location, offset, count); |
| 3243 | |
| 3244 | while (count > 0 && caddr > 0 && caddr % 4) |
| 3245 | { |
| 3246 | switch (caddr % 4) |
| 3247 | { |
| 3248 | case 0: faddr = offset + 3; break; |
| 3249 | case 1: faddr = offset + 1; break; |
| 3250 | case 2: faddr = offset - 1; break; |
| 3251 | case 3: faddr = offset - 3; break; |
| 3252 | } |
| 3253 | |
| 3254 | rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); |
| 3255 | if (! rv) |
| 3256 | return rv; |
| 3257 | |
| 3258 | location ++; |
| 3259 | offset ++; |
| 3260 | count --; |
| 3261 | caddr ++; |
| 3262 | } |
| 3263 | |
| 3264 | scount = (int)(count / 4) * 4; |
| 3265 | if (scount > 0) |
| 3266 | { |
| 3267 | char * cloc = (char *) location; |
| 3268 | |
| 3269 | swapped_data = (char *) bfd_alloc (abfd, count); |
| 3270 | |
| 3271 | for (i = 0; i < count; i += 4) |
| 3272 | { |
| 3273 | bfd_vma v = bfd_getl32 (cloc + i); |
| 3274 | bfd_putb32 (v, swapped_data + i); |
| 3275 | } |
| 3276 | |
| 3277 | rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount); |
| 3278 | |
| 3279 | if (!rv) |
| 3280 | return rv; |
| 3281 | } |
| 3282 | |
| 3283 | count -= scount; |
| 3284 | location += scount; |
| 3285 | offset += scount; |
| 3286 | |
| 3287 | if (count > 0) |
| 3288 | { |
| 3289 | caddr = section->vma + offset; |
| 3290 | while (count > 0) |
| 3291 | { |
| 3292 | switch (caddr % 4) |
| 3293 | { |
| 3294 | case 0: faddr = offset + 3; break; |
| 3295 | case 1: faddr = offset + 1; break; |
| 3296 | case 2: faddr = offset - 1; break; |
| 3297 | case 3: faddr = offset - 3; break; |
| 3298 | } |
| 3299 | rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); |
| 3300 | if (! rv) |
| 3301 | return rv; |
| 3302 | |
| 3303 | location ++; |
| 3304 | offset ++; |
| 3305 | count --; |
| 3306 | caddr ++; |
| 3307 | } |
| 3308 | } |
| 3309 | |
| 3310 | return TRUE; |
| 3311 | } |
| 3312 | |
| 3313 | static bfd_boolean |
| 3314 | rx_final_link (bfd * abfd, struct bfd_link_info * info) |
| 3315 | { |
| 3316 | asection * o; |
| 3317 | |
| 3318 | for (o = abfd->sections; o != NULL; o = o->next) |
| 3319 | { |
| 3320 | #ifdef DJDEBUG |
| 3321 | fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n", |
| 3322 | o->name, o->flags, o->vma, o->lma, o->size, o->rawsize); |
| 3323 | #endif |
| 3324 | if (o->flags & SEC_CODE |
| 3325 | && bfd_big_endian (abfd) |
| 3326 | && (o->size % 4 || o->rawsize % 4)) |
| 3327 | { |
| 3328 | #ifdef DJDEBUG |
| 3329 | fprintf (stderr, "adjusting...\n"); |
| 3330 | #endif |
| 3331 | o->size += 4 - (o->size % 4); |
| 3332 | o->rawsize += 4 - (o->rawsize % 4); |
| 3333 | } |
| 3334 | } |
| 3335 | |
| 3336 | return bfd_elf_final_link (abfd, info); |
| 3337 | } |
| 3338 | |
| 3339 | static bfd_boolean |
| 3340 | elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED, |
| 3341 | struct bfd_link_info * info ATTRIBUTE_UNUSED) |
| 3342 | { |
| 3343 | const struct elf_backend_data * bed; |
| 3344 | struct elf_obj_tdata * tdata; |
| 3345 | Elf_Internal_Phdr * phdr; |
| 3346 | unsigned int count; |
| 3347 | unsigned int i; |
| 3348 | |
| 3349 | bed = get_elf_backend_data (abfd); |
| 3350 | tdata = elf_tdata (abfd); |
| 3351 | phdr = tdata->phdr; |
| 3352 | count = tdata->program_header_size / bed->s->sizeof_phdr; |
| 3353 | |
| 3354 | for (i = count; i-- != 0; ) |
| 3355 | if (phdr[i].p_type == PT_LOAD) |
| 3356 | { |
| 3357 | /* The Renesas tools expect p_paddr to be zero. However, |
| 3358 | there is no other way to store the writable data in ROM for |
| 3359 | startup initialization. So, we let the linker *think* |
| 3360 | we're using paddr and vaddr the "usual" way, but at the |
| 3361 | last minute we move the paddr into the vaddr (which is what |
| 3362 | the simulator uses) and zero out paddr. Note that this |
| 3363 | does not affect the section headers, just the program |
| 3364 | headers. We hope. */ |
| 3365 | phdr[i].p_vaddr = phdr[i].p_paddr; |
| 3366 | /* If we zero out p_paddr, then the LMA in the section table |
| 3367 | becomes wrong. */ |
| 3368 | /*phdr[i].p_paddr = 0;*/ |
| 3369 | } |
| 3370 | |
| 3371 | return TRUE; |
| 3372 | } |
| 3373 | \f |
| 3374 | #define ELF_ARCH bfd_arch_rx |
| 3375 | #define ELF_MACHINE_CODE EM_RX |
| 3376 | #define ELF_MAXPAGESIZE 0x1000 |
| 3377 | |
| 3378 | #define TARGET_BIG_SYM bfd_elf32_rx_be_vec |
| 3379 | #define TARGET_BIG_NAME "elf32-rx-be" |
| 3380 | |
| 3381 | #define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec |
| 3382 | #define TARGET_LITTLE_NAME "elf32-rx-le" |
| 3383 | |
| 3384 | #define elf_info_to_howto_rel NULL |
| 3385 | #define elf_info_to_howto rx_info_to_howto_rela |
| 3386 | #define elf_backend_object_p rx_elf_object_p |
| 3387 | #define elf_backend_relocate_section rx_elf_relocate_section |
| 3388 | #define elf_symbol_leading_char ('_') |
| 3389 | #define elf_backend_can_gc_sections 1 |
| 3390 | #define elf_backend_modify_program_headers elf32_rx_modify_program_headers |
| 3391 | |
| 3392 | #define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup |
| 3393 | #define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup |
| 3394 | #define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags |
| 3395 | #define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data |
| 3396 | #define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data |
| 3397 | #define bfd_elf32_get_section_contents rx_get_section_contents |
| 3398 | #define bfd_elf32_set_section_contents rx_set_section_contents |
| 3399 | #define bfd_elf32_bfd_final_link rx_final_link |
| 3400 | #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper |
| 3401 | |
| 3402 | #include "elf32-target.h" |