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[PATCH] libata: make sure sdev doesn't go away while rescanning
[deliverable/linux.git] / drivers / ata / libata-core.c
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1/*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/list.h>
40#include <linux/mm.h>
41#include <linux/highmem.h>
42#include <linux/spinlock.h>
43#include <linux/blkdev.h>
44#include <linux/delay.h>
45#include <linux/timer.h>
46#include <linux/interrupt.h>
47#include <linux/completion.h>
48#include <linux/suspend.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/scatterlist.h>
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_host.h>
55#include <linux/libata.h>
56#include <asm/io.h>
57#include <asm/semaphore.h>
58#include <asm/byteorder.h>
59
60#include "libata.h"
61
62/* debounce timing parameters in msecs { interval, duration, timeout } */
63const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
66
67static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70static void ata_dev_xfermask(struct ata_device *dev);
71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
75struct workqueue_struct *ata_aux_wq;
76
77int atapi_enabled = 1;
78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
81int atapi_dmadir = 0;
82module_param(atapi_dmadir, int, 0444);
83MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
84
85int libata_fua = 0;
86module_param_named(fua, libata_fua, int, 0444);
87MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
88
89static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90module_param(ata_probe_timeout, int, 0444);
91MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
92
93MODULE_AUTHOR("Jeff Garzik");
94MODULE_DESCRIPTION("Library module for ATA devices");
95MODULE_LICENSE("GPL");
96MODULE_VERSION(DRV_VERSION);
97
98
99/**
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
104 *
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
107 *
108 * LOCKING:
109 * Inherited from caller.
110 */
111
112void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
113{
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
119
120 fis[4] = tf->lbal;
121 fis[5] = tf->lbam;
122 fis[6] = tf->lbah;
123 fis[7] = tf->device;
124
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
129
130 fis[12] = tf->nsect;
131 fis[13] = tf->hob_nsect;
132 fis[14] = 0;
133 fis[15] = tf->ctl;
134
135 fis[16] = 0;
136 fis[17] = 0;
137 fis[18] = 0;
138 fis[19] = 0;
139}
140
141/**
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
145 *
146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
147 *
148 * LOCKING:
149 * Inherited from caller.
150 */
151
152void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
153{
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
156
157 tf->lbal = fis[4];
158 tf->lbam = fis[5];
159 tf->lbah = fis[6];
160 tf->device = fis[7];
161
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
165
166 tf->nsect = fis[12];
167 tf->hob_nsect = fis[13];
168}
169
170static const u8 ata_rw_cmds[] = {
171 /* pio multi */
172 ATA_CMD_READ_MULTI,
173 ATA_CMD_WRITE_MULTI,
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
176 0,
177 0,
178 0,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
180 /* pio */
181 ATA_CMD_PIO_READ,
182 ATA_CMD_PIO_WRITE,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
185 0,
186 0,
187 0,
188 0,
189 /* dma */
190 ATA_CMD_READ,
191 ATA_CMD_WRITE,
192 ATA_CMD_READ_EXT,
193 ATA_CMD_WRITE_EXT,
194 0,
195 0,
196 0,
197 ATA_CMD_WRITE_FUA_EXT
198};
199
200/**
201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
203 *
204 * Examine the device configuration and tf->flags to calculate
205 * the proper read/write commands and protocol to use.
206 *
207 * LOCKING:
208 * caller.
209 */
210int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
211{
212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
214 u8 cmd;
215
216 int index, fua, lba48, write;
217
218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
221
222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
224 index = dev->multi_count ? 0 : 8;
225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
228 index = dev->multi_count ? 0 : 8;
229 } else {
230 tf->protocol = ATA_PROT_DMA;
231 index = 16;
232 }
233
234 cmd = ata_rw_cmds[index + fua + lba48 + write];
235 if (cmd) {
236 tf->command = cmd;
237 return 0;
238 }
239 return -1;
240}
241
242/**
243 * ata_tf_read_block - Read block address from ATA taskfile
244 * @tf: ATA taskfile of interest
245 * @dev: ATA device @tf belongs to
246 *
247 * LOCKING:
248 * None.
249 *
250 * Read block address from @tf. This function can handle all
251 * three address formats - LBA, LBA48 and CHS. tf->protocol and
252 * flags select the address format to use.
253 *
254 * RETURNS:
255 * Block address read from @tf.
256 */
257u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
258{
259 u64 block = 0;
260
261 if (tf->flags & ATA_TFLAG_LBA) {
262 if (tf->flags & ATA_TFLAG_LBA48) {
263 block |= (u64)tf->hob_lbah << 40;
264 block |= (u64)tf->hob_lbam << 32;
265 block |= tf->hob_lbal << 24;
266 } else
267 block |= (tf->device & 0xf) << 24;
268
269 block |= tf->lbah << 16;
270 block |= tf->lbam << 8;
271 block |= tf->lbal;
272 } else {
273 u32 cyl, head, sect;
274
275 cyl = tf->lbam | (tf->lbah << 8);
276 head = tf->device & 0xf;
277 sect = tf->lbal;
278
279 block = (cyl * dev->heads + head) * dev->sectors + sect;
280 }
281
282 return block;
283}
284
285/**
286 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
287 * @pio_mask: pio_mask
288 * @mwdma_mask: mwdma_mask
289 * @udma_mask: udma_mask
290 *
291 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
292 * unsigned int xfer_mask.
293 *
294 * LOCKING:
295 * None.
296 *
297 * RETURNS:
298 * Packed xfer_mask.
299 */
300static unsigned int ata_pack_xfermask(unsigned int pio_mask,
301 unsigned int mwdma_mask,
302 unsigned int udma_mask)
303{
304 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
305 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
306 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
307}
308
309/**
310 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
311 * @xfer_mask: xfer_mask to unpack
312 * @pio_mask: resulting pio_mask
313 * @mwdma_mask: resulting mwdma_mask
314 * @udma_mask: resulting udma_mask
315 *
316 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
317 * Any NULL distination masks will be ignored.
318 */
319static void ata_unpack_xfermask(unsigned int xfer_mask,
320 unsigned int *pio_mask,
321 unsigned int *mwdma_mask,
322 unsigned int *udma_mask)
323{
324 if (pio_mask)
325 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
326 if (mwdma_mask)
327 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
328 if (udma_mask)
329 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
330}
331
332static const struct ata_xfer_ent {
333 int shift, bits;
334 u8 base;
335} ata_xfer_tbl[] = {
336 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
337 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
338 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
339 { -1, },
340};
341
342/**
343 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
344 * @xfer_mask: xfer_mask of interest
345 *
346 * Return matching XFER_* value for @xfer_mask. Only the highest
347 * bit of @xfer_mask is considered.
348 *
349 * LOCKING:
350 * None.
351 *
352 * RETURNS:
353 * Matching XFER_* value, 0 if no match found.
354 */
355static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
356{
357 int highbit = fls(xfer_mask) - 1;
358 const struct ata_xfer_ent *ent;
359
360 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
361 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
362 return ent->base + highbit - ent->shift;
363 return 0;
364}
365
366/**
367 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
368 * @xfer_mode: XFER_* of interest
369 *
370 * Return matching xfer_mask for @xfer_mode.
371 *
372 * LOCKING:
373 * None.
374 *
375 * RETURNS:
376 * Matching xfer_mask, 0 if no match found.
377 */
378static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
379{
380 const struct ata_xfer_ent *ent;
381
382 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
383 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
384 return 1 << (ent->shift + xfer_mode - ent->base);
385 return 0;
386}
387
388/**
389 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
390 * @xfer_mode: XFER_* of interest
391 *
392 * Return matching xfer_shift for @xfer_mode.
393 *
394 * LOCKING:
395 * None.
396 *
397 * RETURNS:
398 * Matching xfer_shift, -1 if no match found.
399 */
400static int ata_xfer_mode2shift(unsigned int xfer_mode)
401{
402 const struct ata_xfer_ent *ent;
403
404 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
405 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
406 return ent->shift;
407 return -1;
408}
409
410/**
411 * ata_mode_string - convert xfer_mask to string
412 * @xfer_mask: mask of bits supported; only highest bit counts.
413 *
414 * Determine string which represents the highest speed
415 * (highest bit in @modemask).
416 *
417 * LOCKING:
418 * None.
419 *
420 * RETURNS:
421 * Constant C string representing highest speed listed in
422 * @mode_mask, or the constant C string "<n/a>".
423 */
424static const char *ata_mode_string(unsigned int xfer_mask)
425{
426 static const char * const xfer_mode_str[] = {
427 "PIO0",
428 "PIO1",
429 "PIO2",
430 "PIO3",
431 "PIO4",
432 "PIO5",
433 "PIO6",
434 "MWDMA0",
435 "MWDMA1",
436 "MWDMA2",
437 "MWDMA3",
438 "MWDMA4",
439 "UDMA/16",
440 "UDMA/25",
441 "UDMA/33",
442 "UDMA/44",
443 "UDMA/66",
444 "UDMA/100",
445 "UDMA/133",
446 "UDMA7",
447 };
448 int highbit;
449
450 highbit = fls(xfer_mask) - 1;
451 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
452 return xfer_mode_str[highbit];
453 return "<n/a>";
454}
455
456static const char *sata_spd_string(unsigned int spd)
457{
458 static const char * const spd_str[] = {
459 "1.5 Gbps",
460 "3.0 Gbps",
461 };
462
463 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
464 return "<unknown>";
465 return spd_str[spd - 1];
466}
467
468void ata_dev_disable(struct ata_device *dev)
469{
470 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
471 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
472 dev->class++;
473 }
474}
475
476/**
477 * ata_pio_devchk - PATA device presence detection
478 * @ap: ATA channel to examine
479 * @device: Device to examine (starting at zero)
480 *
481 * This technique was originally described in
482 * Hale Landis's ATADRVR (www.ata-atapi.com), and
483 * later found its way into the ATA/ATAPI spec.
484 *
485 * Write a pattern to the ATA shadow registers,
486 * and if a device is present, it will respond by
487 * correctly storing and echoing back the
488 * ATA shadow register contents.
489 *
490 * LOCKING:
491 * caller.
492 */
493
494static unsigned int ata_pio_devchk(struct ata_port *ap,
495 unsigned int device)
496{
497 struct ata_ioports *ioaddr = &ap->ioaddr;
498 u8 nsect, lbal;
499
500 ap->ops->dev_select(ap, device);
501
502 outb(0x55, ioaddr->nsect_addr);
503 outb(0xaa, ioaddr->lbal_addr);
504
505 outb(0xaa, ioaddr->nsect_addr);
506 outb(0x55, ioaddr->lbal_addr);
507
508 outb(0x55, ioaddr->nsect_addr);
509 outb(0xaa, ioaddr->lbal_addr);
510
511 nsect = inb(ioaddr->nsect_addr);
512 lbal = inb(ioaddr->lbal_addr);
513
514 if ((nsect == 0x55) && (lbal == 0xaa))
515 return 1; /* we found a device */
516
517 return 0; /* nothing found */
518}
519
520/**
521 * ata_mmio_devchk - PATA device presence detection
522 * @ap: ATA channel to examine
523 * @device: Device to examine (starting at zero)
524 *
525 * This technique was originally described in
526 * Hale Landis's ATADRVR (www.ata-atapi.com), and
527 * later found its way into the ATA/ATAPI spec.
528 *
529 * Write a pattern to the ATA shadow registers,
530 * and if a device is present, it will respond by
531 * correctly storing and echoing back the
532 * ATA shadow register contents.
533 *
534 * LOCKING:
535 * caller.
536 */
537
538static unsigned int ata_mmio_devchk(struct ata_port *ap,
539 unsigned int device)
540{
541 struct ata_ioports *ioaddr = &ap->ioaddr;
542 u8 nsect, lbal;
543
544 ap->ops->dev_select(ap, device);
545
546 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
547 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
548
549 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
550 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
551
552 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
553 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
554
555 nsect = readb((void __iomem *) ioaddr->nsect_addr);
556 lbal = readb((void __iomem *) ioaddr->lbal_addr);
557
558 if ((nsect == 0x55) && (lbal == 0xaa))
559 return 1; /* we found a device */
560
561 return 0; /* nothing found */
562}
563
564/**
565 * ata_devchk - PATA device presence detection
566 * @ap: ATA channel to examine
567 * @device: Device to examine (starting at zero)
568 *
569 * Dispatch ATA device presence detection, depending
570 * on whether we are using PIO or MMIO to talk to the
571 * ATA shadow registers.
572 *
573 * LOCKING:
574 * caller.
575 */
576
577static unsigned int ata_devchk(struct ata_port *ap,
578 unsigned int device)
579{
580 if (ap->flags & ATA_FLAG_MMIO)
581 return ata_mmio_devchk(ap, device);
582 return ata_pio_devchk(ap, device);
583}
584
585/**
586 * ata_dev_classify - determine device type based on ATA-spec signature
587 * @tf: ATA taskfile register set for device to be identified
588 *
589 * Determine from taskfile register contents whether a device is
590 * ATA or ATAPI, as per "Signature and persistence" section
591 * of ATA/PI spec (volume 1, sect 5.14).
592 *
593 * LOCKING:
594 * None.
595 *
596 * RETURNS:
597 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
598 * the event of failure.
599 */
600
601unsigned int ata_dev_classify(const struct ata_taskfile *tf)
602{
603 /* Apple's open source Darwin code hints that some devices only
604 * put a proper signature into the LBA mid/high registers,
605 * So, we only check those. It's sufficient for uniqueness.
606 */
607
608 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
609 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
610 DPRINTK("found ATA device by sig\n");
611 return ATA_DEV_ATA;
612 }
613
614 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
615 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
616 DPRINTK("found ATAPI device by sig\n");
617 return ATA_DEV_ATAPI;
618 }
619
620 DPRINTK("unknown device\n");
621 return ATA_DEV_UNKNOWN;
622}
623
624/**
625 * ata_dev_try_classify - Parse returned ATA device signature
626 * @ap: ATA channel to examine
627 * @device: Device to examine (starting at zero)
628 * @r_err: Value of error register on completion
629 *
630 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
631 * an ATA/ATAPI-defined set of values is placed in the ATA
632 * shadow registers, indicating the results of device detection
633 * and diagnostics.
634 *
635 * Select the ATA device, and read the values from the ATA shadow
636 * registers. Then parse according to the Error register value,
637 * and the spec-defined values examined by ata_dev_classify().
638 *
639 * LOCKING:
640 * caller.
641 *
642 * RETURNS:
643 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
644 */
645
646static unsigned int
647ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
648{
649 struct ata_taskfile tf;
650 unsigned int class;
651 u8 err;
652
653 ap->ops->dev_select(ap, device);
654
655 memset(&tf, 0, sizeof(tf));
656
657 ap->ops->tf_read(ap, &tf);
658 err = tf.feature;
659 if (r_err)
660 *r_err = err;
661
662 /* see if device passed diags: if master then continue and warn later */
663 if (err == 0 && device == 0)
664 /* diagnostic fail : do nothing _YET_ */
665 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
666 else if (err == 1)
667 /* do nothing */ ;
668 else if ((device == 0) && (err == 0x81))
669 /* do nothing */ ;
670 else
671 return ATA_DEV_NONE;
672
673 /* determine if device is ATA or ATAPI */
674 class = ata_dev_classify(&tf);
675
676 if (class == ATA_DEV_UNKNOWN)
677 return ATA_DEV_NONE;
678 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
679 return ATA_DEV_NONE;
680 return class;
681}
682
683/**
684 * ata_id_string - Convert IDENTIFY DEVICE page into string
685 * @id: IDENTIFY DEVICE results we will examine
686 * @s: string into which data is output
687 * @ofs: offset into identify device page
688 * @len: length of string to return. must be an even number.
689 *
690 * The strings in the IDENTIFY DEVICE page are broken up into
691 * 16-bit chunks. Run through the string, and output each
692 * 8-bit chunk linearly, regardless of platform.
693 *
694 * LOCKING:
695 * caller.
696 */
697
698void ata_id_string(const u16 *id, unsigned char *s,
699 unsigned int ofs, unsigned int len)
700{
701 unsigned int c;
702
703 while (len > 0) {
704 c = id[ofs] >> 8;
705 *s = c;
706 s++;
707
708 c = id[ofs] & 0xff;
709 *s = c;
710 s++;
711
712 ofs++;
713 len -= 2;
714 }
715}
716
717/**
718 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
719 * @id: IDENTIFY DEVICE results we will examine
720 * @s: string into which data is output
721 * @ofs: offset into identify device page
722 * @len: length of string to return. must be an odd number.
723 *
724 * This function is identical to ata_id_string except that it
725 * trims trailing spaces and terminates the resulting string with
726 * null. @len must be actual maximum length (even number) + 1.
727 *
728 * LOCKING:
729 * caller.
730 */
731void ata_id_c_string(const u16 *id, unsigned char *s,
732 unsigned int ofs, unsigned int len)
733{
734 unsigned char *p;
735
736 WARN_ON(!(len & 1));
737
738 ata_id_string(id, s, ofs, len - 1);
739
740 p = s + strnlen(s, len - 1);
741 while (p > s && p[-1] == ' ')
742 p--;
743 *p = '\0';
744}
745
746static u64 ata_id_n_sectors(const u16 *id)
747{
748 if (ata_id_has_lba(id)) {
749 if (ata_id_has_lba48(id))
750 return ata_id_u64(id, 100);
751 else
752 return ata_id_u32(id, 60);
753 } else {
754 if (ata_id_current_chs_valid(id))
755 return ata_id_u32(id, 57);
756 else
757 return id[1] * id[3] * id[6];
758 }
759}
760
761/**
762 * ata_noop_dev_select - Select device 0/1 on ATA bus
763 * @ap: ATA channel to manipulate
764 * @device: ATA device (numbered from zero) to select
765 *
766 * This function performs no actual function.
767 *
768 * May be used as the dev_select() entry in ata_port_operations.
769 *
770 * LOCKING:
771 * caller.
772 */
773void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
774{
775}
776
777
778/**
779 * ata_std_dev_select - Select device 0/1 on ATA bus
780 * @ap: ATA channel to manipulate
781 * @device: ATA device (numbered from zero) to select
782 *
783 * Use the method defined in the ATA specification to
784 * make either device 0, or device 1, active on the
785 * ATA channel. Works with both PIO and MMIO.
786 *
787 * May be used as the dev_select() entry in ata_port_operations.
788 *
789 * LOCKING:
790 * caller.
791 */
792
793void ata_std_dev_select (struct ata_port *ap, unsigned int device)
794{
795 u8 tmp;
796
797 if (device == 0)
798 tmp = ATA_DEVICE_OBS;
799 else
800 tmp = ATA_DEVICE_OBS | ATA_DEV1;
801
802 if (ap->flags & ATA_FLAG_MMIO) {
803 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
804 } else {
805 outb(tmp, ap->ioaddr.device_addr);
806 }
807 ata_pause(ap); /* needed; also flushes, for mmio */
808}
809
810/**
811 * ata_dev_select - Select device 0/1 on ATA bus
812 * @ap: ATA channel to manipulate
813 * @device: ATA device (numbered from zero) to select
814 * @wait: non-zero to wait for Status register BSY bit to clear
815 * @can_sleep: non-zero if context allows sleeping
816 *
817 * Use the method defined in the ATA specification to
818 * make either device 0, or device 1, active on the
819 * ATA channel.
820 *
821 * This is a high-level version of ata_std_dev_select(),
822 * which additionally provides the services of inserting
823 * the proper pauses and status polling, where needed.
824 *
825 * LOCKING:
826 * caller.
827 */
828
829void ata_dev_select(struct ata_port *ap, unsigned int device,
830 unsigned int wait, unsigned int can_sleep)
831{
832 if (ata_msg_probe(ap))
833 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
834 "device %u, wait %u\n", ap->id, device, wait);
835
836 if (wait)
837 ata_wait_idle(ap);
838
839 ap->ops->dev_select(ap, device);
840
841 if (wait) {
842 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
843 msleep(150);
844 ata_wait_idle(ap);
845 }
846}
847
848/**
849 * ata_dump_id - IDENTIFY DEVICE info debugging output
850 * @id: IDENTIFY DEVICE page to dump
851 *
852 * Dump selected 16-bit words from the given IDENTIFY DEVICE
853 * page.
854 *
855 * LOCKING:
856 * caller.
857 */
858
859static inline void ata_dump_id(const u16 *id)
860{
861 DPRINTK("49==0x%04x "
862 "53==0x%04x "
863 "63==0x%04x "
864 "64==0x%04x "
865 "75==0x%04x \n",
866 id[49],
867 id[53],
868 id[63],
869 id[64],
870 id[75]);
871 DPRINTK("80==0x%04x "
872 "81==0x%04x "
873 "82==0x%04x "
874 "83==0x%04x "
875 "84==0x%04x \n",
876 id[80],
877 id[81],
878 id[82],
879 id[83],
880 id[84]);
881 DPRINTK("88==0x%04x "
882 "93==0x%04x\n",
883 id[88],
884 id[93]);
885}
886
887/**
888 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
889 * @id: IDENTIFY data to compute xfer mask from
890 *
891 * Compute the xfermask for this device. This is not as trivial
892 * as it seems if we must consider early devices correctly.
893 *
894 * FIXME: pre IDE drive timing (do we care ?).
895 *
896 * LOCKING:
897 * None.
898 *
899 * RETURNS:
900 * Computed xfermask
901 */
902static unsigned int ata_id_xfermask(const u16 *id)
903{
904 unsigned int pio_mask, mwdma_mask, udma_mask;
905
906 /* Usual case. Word 53 indicates word 64 is valid */
907 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
908 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
909 pio_mask <<= 3;
910 pio_mask |= 0x7;
911 } else {
912 /* If word 64 isn't valid then Word 51 high byte holds
913 * the PIO timing number for the maximum. Turn it into
914 * a mask.
915 */
916 u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF;
917 if (mode < 5) /* Valid PIO range */
918 pio_mask = (2 << mode) - 1;
919 else
920 pio_mask = 1;
921
922 /* But wait.. there's more. Design your standards by
923 * committee and you too can get a free iordy field to
924 * process. However its the speeds not the modes that
925 * are supported... Note drivers using the timing API
926 * will get this right anyway
927 */
928 }
929
930 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
931
932 if (ata_id_is_cfa(id)) {
933 /*
934 * Process compact flash extended modes
935 */
936 int pio = id[163] & 0x7;
937 int dma = (id[163] >> 3) & 7;
938
939 if (pio)
940 pio_mask |= (1 << 5);
941 if (pio > 1)
942 pio_mask |= (1 << 6);
943 if (dma)
944 mwdma_mask |= (1 << 3);
945 if (dma > 1)
946 mwdma_mask |= (1 << 4);
947 }
948
949 udma_mask = 0;
950 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
951 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
952
953 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
954}
955
956/**
957 * ata_port_queue_task - Queue port_task
958 * @ap: The ata_port to queue port_task for
959 * @fn: workqueue function to be scheduled
960 * @data: data value to pass to workqueue function
961 * @delay: delay time for workqueue function
962 *
963 * Schedule @fn(@data) for execution after @delay jiffies using
964 * port_task. There is one port_task per port and it's the
965 * user(low level driver)'s responsibility to make sure that only
966 * one task is active at any given time.
967 *
968 * libata core layer takes care of synchronization between
969 * port_task and EH. ata_port_queue_task() may be ignored for EH
970 * synchronization.
971 *
972 * LOCKING:
973 * Inherited from caller.
974 */
975void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
976 unsigned long delay)
977{
978 int rc;
979
980 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
981 return;
982
983 PREPARE_WORK(&ap->port_task, fn, data);
984
985 if (!delay)
986 rc = queue_work(ata_wq, &ap->port_task);
987 else
988 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
989
990 /* rc == 0 means that another user is using port task */
991 WARN_ON(rc == 0);
992}
993
994/**
995 * ata_port_flush_task - Flush port_task
996 * @ap: The ata_port to flush port_task for
997 *
998 * After this function completes, port_task is guranteed not to
999 * be running or scheduled.
1000 *
1001 * LOCKING:
1002 * Kernel thread context (may sleep)
1003 */
1004void ata_port_flush_task(struct ata_port *ap)
1005{
1006 unsigned long flags;
1007
1008 DPRINTK("ENTER\n");
1009
1010 spin_lock_irqsave(ap->lock, flags);
1011 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1012 spin_unlock_irqrestore(ap->lock, flags);
1013
1014 DPRINTK("flush #1\n");
1015 flush_workqueue(ata_wq);
1016
1017 /*
1018 * At this point, if a task is running, it's guaranteed to see
1019 * the FLUSH flag; thus, it will never queue pio tasks again.
1020 * Cancel and flush.
1021 */
1022 if (!cancel_delayed_work(&ap->port_task)) {
1023 if (ata_msg_ctl(ap))
1024 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1025 __FUNCTION__);
1026 flush_workqueue(ata_wq);
1027 }
1028
1029 spin_lock_irqsave(ap->lock, flags);
1030 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1031 spin_unlock_irqrestore(ap->lock, flags);
1032
1033 if (ata_msg_ctl(ap))
1034 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1035}
1036
1037void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1038{
1039 struct completion *waiting = qc->private_data;
1040
1041 complete(waiting);
1042}
1043
1044/**
1045 * ata_exec_internal - execute libata internal command
1046 * @dev: Device to which the command is sent
1047 * @tf: Taskfile registers for the command and the result
1048 * @cdb: CDB for packet command
1049 * @dma_dir: Data tranfer direction of the command
1050 * @buf: Data buffer of the command
1051 * @buflen: Length of data buffer
1052 *
1053 * Executes libata internal command with timeout. @tf contains
1054 * command on entry and result on return. Timeout and error
1055 * conditions are reported via return value. No recovery action
1056 * is taken after a command times out. It's caller's duty to
1057 * clean up after timeout.
1058 *
1059 * LOCKING:
1060 * None. Should be called with kernel context, might sleep.
1061 *
1062 * RETURNS:
1063 * Zero on success, AC_ERR_* mask on failure
1064 */
1065unsigned ata_exec_internal(struct ata_device *dev,
1066 struct ata_taskfile *tf, const u8 *cdb,
1067 int dma_dir, void *buf, unsigned int buflen)
1068{
1069 struct ata_port *ap = dev->ap;
1070 u8 command = tf->command;
1071 struct ata_queued_cmd *qc;
1072 unsigned int tag, preempted_tag;
1073 u32 preempted_sactive, preempted_qc_active;
1074 DECLARE_COMPLETION_ONSTACK(wait);
1075 unsigned long flags;
1076 unsigned int err_mask;
1077 int rc;
1078
1079 spin_lock_irqsave(ap->lock, flags);
1080
1081 /* no internal command while frozen */
1082 if (ap->pflags & ATA_PFLAG_FROZEN) {
1083 spin_unlock_irqrestore(ap->lock, flags);
1084 return AC_ERR_SYSTEM;
1085 }
1086
1087 /* initialize internal qc */
1088
1089 /* XXX: Tag 0 is used for drivers with legacy EH as some
1090 * drivers choke if any other tag is given. This breaks
1091 * ata_tag_internal() test for those drivers. Don't use new
1092 * EH stuff without converting to it.
1093 */
1094 if (ap->ops->error_handler)
1095 tag = ATA_TAG_INTERNAL;
1096 else
1097 tag = 0;
1098
1099 if (test_and_set_bit(tag, &ap->qc_allocated))
1100 BUG();
1101 qc = __ata_qc_from_tag(ap, tag);
1102
1103 qc->tag = tag;
1104 qc->scsicmd = NULL;
1105 qc->ap = ap;
1106 qc->dev = dev;
1107 ata_qc_reinit(qc);
1108
1109 preempted_tag = ap->active_tag;
1110 preempted_sactive = ap->sactive;
1111 preempted_qc_active = ap->qc_active;
1112 ap->active_tag = ATA_TAG_POISON;
1113 ap->sactive = 0;
1114 ap->qc_active = 0;
1115
1116 /* prepare & issue qc */
1117 qc->tf = *tf;
1118 if (cdb)
1119 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1120 qc->flags |= ATA_QCFLAG_RESULT_TF;
1121 qc->dma_dir = dma_dir;
1122 if (dma_dir != DMA_NONE) {
1123 ata_sg_init_one(qc, buf, buflen);
1124 qc->nsect = buflen / ATA_SECT_SIZE;
1125 }
1126
1127 qc->private_data = &wait;
1128 qc->complete_fn = ata_qc_complete_internal;
1129
1130 ata_qc_issue(qc);
1131
1132 spin_unlock_irqrestore(ap->lock, flags);
1133
1134 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1135
1136 ata_port_flush_task(ap);
1137
1138 if (!rc) {
1139 spin_lock_irqsave(ap->lock, flags);
1140
1141 /* We're racing with irq here. If we lose, the
1142 * following test prevents us from completing the qc
1143 * twice. If we win, the port is frozen and will be
1144 * cleaned up by ->post_internal_cmd().
1145 */
1146 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1147 qc->err_mask |= AC_ERR_TIMEOUT;
1148
1149 if (ap->ops->error_handler)
1150 ata_port_freeze(ap);
1151 else
1152 ata_qc_complete(qc);
1153
1154 if (ata_msg_warn(ap))
1155 ata_dev_printk(dev, KERN_WARNING,
1156 "qc timeout (cmd 0x%x)\n", command);
1157 }
1158
1159 spin_unlock_irqrestore(ap->lock, flags);
1160 }
1161
1162 /* do post_internal_cmd */
1163 if (ap->ops->post_internal_cmd)
1164 ap->ops->post_internal_cmd(qc);
1165
1166 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1167 if (ata_msg_warn(ap))
1168 ata_dev_printk(dev, KERN_WARNING,
1169 "zero err_mask for failed "
1170 "internal command, assuming AC_ERR_OTHER\n");
1171 qc->err_mask |= AC_ERR_OTHER;
1172 }
1173
1174 /* finish up */
1175 spin_lock_irqsave(ap->lock, flags);
1176
1177 *tf = qc->result_tf;
1178 err_mask = qc->err_mask;
1179
1180 ata_qc_free(qc);
1181 ap->active_tag = preempted_tag;
1182 ap->sactive = preempted_sactive;
1183 ap->qc_active = preempted_qc_active;
1184
1185 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1186 * Until those drivers are fixed, we detect the condition
1187 * here, fail the command with AC_ERR_SYSTEM and reenable the
1188 * port.
1189 *
1190 * Note that this doesn't change any behavior as internal
1191 * command failure results in disabling the device in the
1192 * higher layer for LLDDs without new reset/EH callbacks.
1193 *
1194 * Kill the following code as soon as those drivers are fixed.
1195 */
1196 if (ap->flags & ATA_FLAG_DISABLED) {
1197 err_mask |= AC_ERR_SYSTEM;
1198 ata_port_probe(ap);
1199 }
1200
1201 spin_unlock_irqrestore(ap->lock, flags);
1202
1203 return err_mask;
1204}
1205
1206/**
1207 * ata_do_simple_cmd - execute simple internal command
1208 * @dev: Device to which the command is sent
1209 * @cmd: Opcode to execute
1210 *
1211 * Execute a 'simple' command, that only consists of the opcode
1212 * 'cmd' itself, without filling any other registers
1213 *
1214 * LOCKING:
1215 * Kernel thread context (may sleep).
1216 *
1217 * RETURNS:
1218 * Zero on success, AC_ERR_* mask on failure
1219 */
1220unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1221{
1222 struct ata_taskfile tf;
1223
1224 ata_tf_init(dev, &tf);
1225
1226 tf.command = cmd;
1227 tf.flags |= ATA_TFLAG_DEVICE;
1228 tf.protocol = ATA_PROT_NODATA;
1229
1230 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1231}
1232
1233/**
1234 * ata_pio_need_iordy - check if iordy needed
1235 * @adev: ATA device
1236 *
1237 * Check if the current speed of the device requires IORDY. Used
1238 * by various controllers for chip configuration.
1239 */
1240
1241unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1242{
1243 int pio;
1244 int speed = adev->pio_mode - XFER_PIO_0;
1245
1246 if (speed < 2)
1247 return 0;
1248 if (speed > 2)
1249 return 1;
1250
1251 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1252
1253 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1254 pio = adev->id[ATA_ID_EIDE_PIO];
1255 /* Is the speed faster than the drive allows non IORDY ? */
1256 if (pio) {
1257 /* This is cycle times not frequency - watch the logic! */
1258 if (pio > 240) /* PIO2 is 240nS per cycle */
1259 return 1;
1260 return 0;
1261 }
1262 }
1263 return 0;
1264}
1265
1266/**
1267 * ata_dev_read_id - Read ID data from the specified device
1268 * @dev: target device
1269 * @p_class: pointer to class of the target device (may be changed)
1270 * @flags: ATA_READID_* flags
1271 * @id: buffer to read IDENTIFY data into
1272 *
1273 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1274 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1275 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1276 * for pre-ATA4 drives.
1277 *
1278 * LOCKING:
1279 * Kernel thread context (may sleep)
1280 *
1281 * RETURNS:
1282 * 0 on success, -errno otherwise.
1283 */
1284int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1285 unsigned int flags, u16 *id)
1286{
1287 struct ata_port *ap = dev->ap;
1288 unsigned int class = *p_class;
1289 struct ata_taskfile tf;
1290 unsigned int err_mask = 0;
1291 const char *reason;
1292 int rc;
1293
1294 if (ata_msg_ctl(ap))
1295 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1296 __FUNCTION__, ap->id, dev->devno);
1297
1298 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1299
1300 retry:
1301 ata_tf_init(dev, &tf);
1302
1303 switch (class) {
1304 case ATA_DEV_ATA:
1305 tf.command = ATA_CMD_ID_ATA;
1306 break;
1307 case ATA_DEV_ATAPI:
1308 tf.command = ATA_CMD_ID_ATAPI;
1309 break;
1310 default:
1311 rc = -ENODEV;
1312 reason = "unsupported class";
1313 goto err_out;
1314 }
1315
1316 tf.protocol = ATA_PROT_PIO;
1317
1318 /* presence detection using polling IDENTIFY? */
1319 if (flags & ATA_READID_DETECT)
1320 tf.flags |= ATA_TFLAG_POLLING;
1321
1322 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1323 id, sizeof(id[0]) * ATA_ID_WORDS);
1324 if (err_mask) {
1325 if ((flags & ATA_READID_DETECT) &&
1326 (err_mask & AC_ERR_NODEV_HINT)) {
1327 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1328 ap->id, dev->devno);
1329 return -ENOENT;
1330 }
1331
1332 rc = -EIO;
1333 reason = "I/O error";
1334 goto err_out;
1335 }
1336
1337 swap_buf_le16(id, ATA_ID_WORDS);
1338
1339 /* sanity check */
1340 rc = -EINVAL;
1341 reason = "device reports illegal type";
1342
1343 if (class == ATA_DEV_ATA) {
1344 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1345 goto err_out;
1346 } else {
1347 if (ata_id_is_ata(id))
1348 goto err_out;
1349 }
1350
1351 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1352 /*
1353 * The exact sequence expected by certain pre-ATA4 drives is:
1354 * SRST RESET
1355 * IDENTIFY
1356 * INITIALIZE DEVICE PARAMETERS
1357 * anything else..
1358 * Some drives were very specific about that exact sequence.
1359 */
1360 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1361 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1362 if (err_mask) {
1363 rc = -EIO;
1364 reason = "INIT_DEV_PARAMS failed";
1365 goto err_out;
1366 }
1367
1368 /* current CHS translation info (id[53-58]) might be
1369 * changed. reread the identify device info.
1370 */
1371 flags &= ~ATA_READID_POSTRESET;
1372 goto retry;
1373 }
1374 }
1375
1376 *p_class = class;
1377
1378 return 0;
1379
1380 err_out:
1381 if (ata_msg_warn(ap))
1382 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1383 "(%s, err_mask=0x%x)\n", reason, err_mask);
1384 return rc;
1385}
1386
1387static inline u8 ata_dev_knobble(struct ata_device *dev)
1388{
1389 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1390}
1391
1392static void ata_dev_config_ncq(struct ata_device *dev,
1393 char *desc, size_t desc_sz)
1394{
1395 struct ata_port *ap = dev->ap;
1396 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1397
1398 if (!ata_id_has_ncq(dev->id)) {
1399 desc[0] = '\0';
1400 return;
1401 }
1402 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1403 snprintf(desc, desc_sz, "NCQ (not used)");
1404 return;
1405 }
1406 if (ap->flags & ATA_FLAG_NCQ) {
1407 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1408 dev->flags |= ATA_DFLAG_NCQ;
1409 }
1410
1411 if (hdepth >= ddepth)
1412 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1413 else
1414 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1415}
1416
1417static void ata_set_port_max_cmd_len(struct ata_port *ap)
1418{
1419 int i;
1420
1421 if (ap->scsi_host) {
1422 unsigned int len = 0;
1423
1424 for (i = 0; i < ATA_MAX_DEVICES; i++)
1425 len = max(len, ap->device[i].cdb_len);
1426
1427 ap->scsi_host->max_cmd_len = len;
1428 }
1429}
1430
1431/**
1432 * ata_dev_configure - Configure the specified ATA/ATAPI device
1433 * @dev: Target device to configure
1434 *
1435 * Configure @dev according to @dev->id. Generic and low-level
1436 * driver specific fixups are also applied.
1437 *
1438 * LOCKING:
1439 * Kernel thread context (may sleep)
1440 *
1441 * RETURNS:
1442 * 0 on success, -errno otherwise
1443 */
1444int ata_dev_configure(struct ata_device *dev)
1445{
1446 struct ata_port *ap = dev->ap;
1447 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1448 const u16 *id = dev->id;
1449 unsigned int xfer_mask;
1450 char revbuf[7]; /* XYZ-99\0 */
1451 int rc;
1452
1453 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1454 ata_dev_printk(dev, KERN_INFO,
1455 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1456 __FUNCTION__, ap->id, dev->devno);
1457 return 0;
1458 }
1459
1460 if (ata_msg_probe(ap))
1461 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1462 __FUNCTION__, ap->id, dev->devno);
1463
1464 /* print device capabilities */
1465 if (ata_msg_probe(ap))
1466 ata_dev_printk(dev, KERN_DEBUG,
1467 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1468 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1469 __FUNCTION__,
1470 id[49], id[82], id[83], id[84],
1471 id[85], id[86], id[87], id[88]);
1472
1473 /* initialize to-be-configured parameters */
1474 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1475 dev->max_sectors = 0;
1476 dev->cdb_len = 0;
1477 dev->n_sectors = 0;
1478 dev->cylinders = 0;
1479 dev->heads = 0;
1480 dev->sectors = 0;
1481
1482 /*
1483 * common ATA, ATAPI feature tests
1484 */
1485
1486 /* find max transfer mode; for printk only */
1487 xfer_mask = ata_id_xfermask(id);
1488
1489 if (ata_msg_probe(ap))
1490 ata_dump_id(id);
1491
1492 /* ATA-specific feature tests */
1493 if (dev->class == ATA_DEV_ATA) {
1494 if (ata_id_is_cfa(id)) {
1495 if (id[162] & 1) /* CPRM may make this media unusable */
1496 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1497 ap->id, dev->devno);
1498 snprintf(revbuf, 7, "CFA");
1499 }
1500 else
1501 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1502
1503 dev->n_sectors = ata_id_n_sectors(id);
1504
1505 if (ata_id_has_lba(id)) {
1506 const char *lba_desc;
1507 char ncq_desc[20];
1508
1509 lba_desc = "LBA";
1510 dev->flags |= ATA_DFLAG_LBA;
1511 if (ata_id_has_lba48(id)) {
1512 dev->flags |= ATA_DFLAG_LBA48;
1513 lba_desc = "LBA48";
1514
1515 if (dev->n_sectors >= (1UL << 28) &&
1516 ata_id_has_flush_ext(id))
1517 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1518 }
1519
1520 /* config NCQ */
1521 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1522
1523 /* print device info to dmesg */
1524 if (ata_msg_drv(ap) && print_info)
1525 ata_dev_printk(dev, KERN_INFO, "%s, "
1526 "max %s, %Lu sectors: %s %s\n",
1527 revbuf,
1528 ata_mode_string(xfer_mask),
1529 (unsigned long long)dev->n_sectors,
1530 lba_desc, ncq_desc);
1531 } else {
1532 /* CHS */
1533
1534 /* Default translation */
1535 dev->cylinders = id[1];
1536 dev->heads = id[3];
1537 dev->sectors = id[6];
1538
1539 if (ata_id_current_chs_valid(id)) {
1540 /* Current CHS translation is valid. */
1541 dev->cylinders = id[54];
1542 dev->heads = id[55];
1543 dev->sectors = id[56];
1544 }
1545
1546 /* print device info to dmesg */
1547 if (ata_msg_drv(ap) && print_info)
1548 ata_dev_printk(dev, KERN_INFO, "%s, "
1549 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1550 revbuf,
1551 ata_mode_string(xfer_mask),
1552 (unsigned long long)dev->n_sectors,
1553 dev->cylinders, dev->heads,
1554 dev->sectors);
1555 }
1556
1557 if (dev->id[59] & 0x100) {
1558 dev->multi_count = dev->id[59] & 0xff;
1559 if (ata_msg_drv(ap) && print_info)
1560 ata_dev_printk(dev, KERN_INFO,
1561 "ata%u: dev %u multi count %u\n",
1562 ap->id, dev->devno, dev->multi_count);
1563 }
1564
1565 dev->cdb_len = 16;
1566 }
1567
1568 /* ATAPI-specific feature tests */
1569 else if (dev->class == ATA_DEV_ATAPI) {
1570 char *cdb_intr_string = "";
1571
1572 rc = atapi_cdb_len(id);
1573 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1574 if (ata_msg_warn(ap))
1575 ata_dev_printk(dev, KERN_WARNING,
1576 "unsupported CDB len\n");
1577 rc = -EINVAL;
1578 goto err_out_nosup;
1579 }
1580 dev->cdb_len = (unsigned int) rc;
1581
1582 if (ata_id_cdb_intr(dev->id)) {
1583 dev->flags |= ATA_DFLAG_CDB_INTR;
1584 cdb_intr_string = ", CDB intr";
1585 }
1586
1587 /* print device info to dmesg */
1588 if (ata_msg_drv(ap) && print_info)
1589 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1590 ata_mode_string(xfer_mask),
1591 cdb_intr_string);
1592 }
1593
1594 /* determine max_sectors */
1595 dev->max_sectors = ATA_MAX_SECTORS;
1596 if (dev->flags & ATA_DFLAG_LBA48)
1597 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1598
1599 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1600 /* Let the user know. We don't want to disallow opens for
1601 rescue purposes, or in case the vendor is just a blithering
1602 idiot */
1603 if (print_info) {
1604 ata_dev_printk(dev, KERN_WARNING,
1605"Drive reports diagnostics failure. This may indicate a drive\n");
1606 ata_dev_printk(dev, KERN_WARNING,
1607"fault or invalid emulation. Contact drive vendor for information.\n");
1608 }
1609 }
1610
1611 ata_set_port_max_cmd_len(ap);
1612
1613 /* limit bridge transfers to udma5, 200 sectors */
1614 if (ata_dev_knobble(dev)) {
1615 if (ata_msg_drv(ap) && print_info)
1616 ata_dev_printk(dev, KERN_INFO,
1617 "applying bridge limits\n");
1618 dev->udma_mask &= ATA_UDMA5;
1619 dev->max_sectors = ATA_MAX_SECTORS;
1620 }
1621
1622 if (ap->ops->dev_config)
1623 ap->ops->dev_config(ap, dev);
1624
1625 if (ata_msg_probe(ap))
1626 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1627 __FUNCTION__, ata_chk_status(ap));
1628 return 0;
1629
1630err_out_nosup:
1631 if (ata_msg_probe(ap))
1632 ata_dev_printk(dev, KERN_DEBUG,
1633 "%s: EXIT, err\n", __FUNCTION__);
1634 return rc;
1635}
1636
1637/**
1638 * ata_bus_probe - Reset and probe ATA bus
1639 * @ap: Bus to probe
1640 *
1641 * Master ATA bus probing function. Initiates a hardware-dependent
1642 * bus reset, then attempts to identify any devices found on
1643 * the bus.
1644 *
1645 * LOCKING:
1646 * PCI/etc. bus probe sem.
1647 *
1648 * RETURNS:
1649 * Zero on success, negative errno otherwise.
1650 */
1651
1652int ata_bus_probe(struct ata_port *ap)
1653{
1654 unsigned int classes[ATA_MAX_DEVICES];
1655 int tries[ATA_MAX_DEVICES];
1656 int i, rc, down_xfermask;
1657 struct ata_device *dev;
1658
1659 ata_port_probe(ap);
1660
1661 for (i = 0; i < ATA_MAX_DEVICES; i++)
1662 tries[i] = ATA_PROBE_MAX_TRIES;
1663
1664 retry:
1665 down_xfermask = 0;
1666
1667 /* reset and determine device classes */
1668 ap->ops->phy_reset(ap);
1669
1670 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1671 dev = &ap->device[i];
1672
1673 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1674 dev->class != ATA_DEV_UNKNOWN)
1675 classes[dev->devno] = dev->class;
1676 else
1677 classes[dev->devno] = ATA_DEV_NONE;
1678
1679 dev->class = ATA_DEV_UNKNOWN;
1680 }
1681
1682 ata_port_probe(ap);
1683
1684 /* after the reset the device state is PIO 0 and the controller
1685 state is undefined. Record the mode */
1686
1687 for (i = 0; i < ATA_MAX_DEVICES; i++)
1688 ap->device[i].pio_mode = XFER_PIO_0;
1689
1690 /* read IDENTIFY page and configure devices */
1691 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1692 dev = &ap->device[i];
1693
1694 if (tries[i])
1695 dev->class = classes[i];
1696
1697 if (!ata_dev_enabled(dev))
1698 continue;
1699
1700 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1701 dev->id);
1702 if (rc)
1703 goto fail;
1704
1705 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1706 rc = ata_dev_configure(dev);
1707 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1708 if (rc)
1709 goto fail;
1710 }
1711
1712 /* configure transfer mode */
1713 rc = ata_set_mode(ap, &dev);
1714 if (rc) {
1715 down_xfermask = 1;
1716 goto fail;
1717 }
1718
1719 for (i = 0; i < ATA_MAX_DEVICES; i++)
1720 if (ata_dev_enabled(&ap->device[i]))
1721 return 0;
1722
1723 /* no device present, disable port */
1724 ata_port_disable(ap);
1725 ap->ops->port_disable(ap);
1726 return -ENODEV;
1727
1728 fail:
1729 switch (rc) {
1730 case -EINVAL:
1731 case -ENODEV:
1732 tries[dev->devno] = 0;
1733 break;
1734 case -EIO:
1735 sata_down_spd_limit(ap);
1736 /* fall through */
1737 default:
1738 tries[dev->devno]--;
1739 if (down_xfermask &&
1740 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1741 tries[dev->devno] = 0;
1742 }
1743
1744 if (!tries[dev->devno]) {
1745 ata_down_xfermask_limit(dev, 1);
1746 ata_dev_disable(dev);
1747 }
1748
1749 goto retry;
1750}
1751
1752/**
1753 * ata_port_probe - Mark port as enabled
1754 * @ap: Port for which we indicate enablement
1755 *
1756 * Modify @ap data structure such that the system
1757 * thinks that the entire port is enabled.
1758 *
1759 * LOCKING: host lock, or some other form of
1760 * serialization.
1761 */
1762
1763void ata_port_probe(struct ata_port *ap)
1764{
1765 ap->flags &= ~ATA_FLAG_DISABLED;
1766}
1767
1768/**
1769 * sata_print_link_status - Print SATA link status
1770 * @ap: SATA port to printk link status about
1771 *
1772 * This function prints link speed and status of a SATA link.
1773 *
1774 * LOCKING:
1775 * None.
1776 */
1777static void sata_print_link_status(struct ata_port *ap)
1778{
1779 u32 sstatus, scontrol, tmp;
1780
1781 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1782 return;
1783 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1784
1785 if (ata_port_online(ap)) {
1786 tmp = (sstatus >> 4) & 0xf;
1787 ata_port_printk(ap, KERN_INFO,
1788 "SATA link up %s (SStatus %X SControl %X)\n",
1789 sata_spd_string(tmp), sstatus, scontrol);
1790 } else {
1791 ata_port_printk(ap, KERN_INFO,
1792 "SATA link down (SStatus %X SControl %X)\n",
1793 sstatus, scontrol);
1794 }
1795}
1796
1797/**
1798 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1799 * @ap: SATA port associated with target SATA PHY.
1800 *
1801 * This function issues commands to standard SATA Sxxx
1802 * PHY registers, to wake up the phy (and device), and
1803 * clear any reset condition.
1804 *
1805 * LOCKING:
1806 * PCI/etc. bus probe sem.
1807 *
1808 */
1809void __sata_phy_reset(struct ata_port *ap)
1810{
1811 u32 sstatus;
1812 unsigned long timeout = jiffies + (HZ * 5);
1813
1814 if (ap->flags & ATA_FLAG_SATA_RESET) {
1815 /* issue phy wake/reset */
1816 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1817 /* Couldn't find anything in SATA I/II specs, but
1818 * AHCI-1.1 10.4.2 says at least 1 ms. */
1819 mdelay(1);
1820 }
1821 /* phy wake/clear reset */
1822 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1823
1824 /* wait for phy to become ready, if necessary */
1825 do {
1826 msleep(200);
1827 sata_scr_read(ap, SCR_STATUS, &sstatus);
1828 if ((sstatus & 0xf) != 1)
1829 break;
1830 } while (time_before(jiffies, timeout));
1831
1832 /* print link status */
1833 sata_print_link_status(ap);
1834
1835 /* TODO: phy layer with polling, timeouts, etc. */
1836 if (!ata_port_offline(ap))
1837 ata_port_probe(ap);
1838 else
1839 ata_port_disable(ap);
1840
1841 if (ap->flags & ATA_FLAG_DISABLED)
1842 return;
1843
1844 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1845 ata_port_disable(ap);
1846 return;
1847 }
1848
1849 ap->cbl = ATA_CBL_SATA;
1850}
1851
1852/**
1853 * sata_phy_reset - Reset SATA bus.
1854 * @ap: SATA port associated with target SATA PHY.
1855 *
1856 * This function resets the SATA bus, and then probes
1857 * the bus for devices.
1858 *
1859 * LOCKING:
1860 * PCI/etc. bus probe sem.
1861 *
1862 */
1863void sata_phy_reset(struct ata_port *ap)
1864{
1865 __sata_phy_reset(ap);
1866 if (ap->flags & ATA_FLAG_DISABLED)
1867 return;
1868 ata_bus_reset(ap);
1869}
1870
1871/**
1872 * ata_dev_pair - return other device on cable
1873 * @adev: device
1874 *
1875 * Obtain the other device on the same cable, or if none is
1876 * present NULL is returned
1877 */
1878
1879struct ata_device *ata_dev_pair(struct ata_device *adev)
1880{
1881 struct ata_port *ap = adev->ap;
1882 struct ata_device *pair = &ap->device[1 - adev->devno];
1883 if (!ata_dev_enabled(pair))
1884 return NULL;
1885 return pair;
1886}
1887
1888/**
1889 * ata_port_disable - Disable port.
1890 * @ap: Port to be disabled.
1891 *
1892 * Modify @ap data structure such that the system
1893 * thinks that the entire port is disabled, and should
1894 * never attempt to probe or communicate with devices
1895 * on this port.
1896 *
1897 * LOCKING: host lock, or some other form of
1898 * serialization.
1899 */
1900
1901void ata_port_disable(struct ata_port *ap)
1902{
1903 ap->device[0].class = ATA_DEV_NONE;
1904 ap->device[1].class = ATA_DEV_NONE;
1905 ap->flags |= ATA_FLAG_DISABLED;
1906}
1907
1908/**
1909 * sata_down_spd_limit - adjust SATA spd limit downward
1910 * @ap: Port to adjust SATA spd limit for
1911 *
1912 * Adjust SATA spd limit of @ap downward. Note that this
1913 * function only adjusts the limit. The change must be applied
1914 * using sata_set_spd().
1915 *
1916 * LOCKING:
1917 * Inherited from caller.
1918 *
1919 * RETURNS:
1920 * 0 on success, negative errno on failure
1921 */
1922int sata_down_spd_limit(struct ata_port *ap)
1923{
1924 u32 sstatus, spd, mask;
1925 int rc, highbit;
1926
1927 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1928 if (rc)
1929 return rc;
1930
1931 mask = ap->sata_spd_limit;
1932 if (mask <= 1)
1933 return -EINVAL;
1934 highbit = fls(mask) - 1;
1935 mask &= ~(1 << highbit);
1936
1937 spd = (sstatus >> 4) & 0xf;
1938 if (spd <= 1)
1939 return -EINVAL;
1940 spd--;
1941 mask &= (1 << spd) - 1;
1942 if (!mask)
1943 return -EINVAL;
1944
1945 ap->sata_spd_limit = mask;
1946
1947 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1948 sata_spd_string(fls(mask)));
1949
1950 return 0;
1951}
1952
1953static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1954{
1955 u32 spd, limit;
1956
1957 if (ap->sata_spd_limit == UINT_MAX)
1958 limit = 0;
1959 else
1960 limit = fls(ap->sata_spd_limit);
1961
1962 spd = (*scontrol >> 4) & 0xf;
1963 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1964
1965 return spd != limit;
1966}
1967
1968/**
1969 * sata_set_spd_needed - is SATA spd configuration needed
1970 * @ap: Port in question
1971 *
1972 * Test whether the spd limit in SControl matches
1973 * @ap->sata_spd_limit. This function is used to determine
1974 * whether hardreset is necessary to apply SATA spd
1975 * configuration.
1976 *
1977 * LOCKING:
1978 * Inherited from caller.
1979 *
1980 * RETURNS:
1981 * 1 if SATA spd configuration is needed, 0 otherwise.
1982 */
1983int sata_set_spd_needed(struct ata_port *ap)
1984{
1985 u32 scontrol;
1986
1987 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1988 return 0;
1989
1990 return __sata_set_spd_needed(ap, &scontrol);
1991}
1992
1993/**
1994 * sata_set_spd - set SATA spd according to spd limit
1995 * @ap: Port to set SATA spd for
1996 *
1997 * Set SATA spd of @ap according to sata_spd_limit.
1998 *
1999 * LOCKING:
2000 * Inherited from caller.
2001 *
2002 * RETURNS:
2003 * 0 if spd doesn't need to be changed, 1 if spd has been
2004 * changed. Negative errno if SCR registers are inaccessible.
2005 */
2006int sata_set_spd(struct ata_port *ap)
2007{
2008 u32 scontrol;
2009 int rc;
2010
2011 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2012 return rc;
2013
2014 if (!__sata_set_spd_needed(ap, &scontrol))
2015 return 0;
2016
2017 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2018 return rc;
2019
2020 return 1;
2021}
2022
2023/*
2024 * This mode timing computation functionality is ported over from
2025 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2026 */
2027/*
2028 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2029 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2030 * for UDMA6, which is currently supported only by Maxtor drives.
2031 *
2032 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2033 */
2034
2035static const struct ata_timing ata_timing[] = {
2036
2037 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2038 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2039 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2040 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2041
2042 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2043 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2044 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2045 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2046 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2047
2048/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2049
2050 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2051 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2052 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2053
2054 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2055 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2056 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2057
2058 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2059 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2060 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2061 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2062
2063 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2064 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2065 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2066
2067/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2068
2069 { 0xFF }
2070};
2071
2072#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2073#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2074
2075static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2076{
2077 q->setup = EZ(t->setup * 1000, T);
2078 q->act8b = EZ(t->act8b * 1000, T);
2079 q->rec8b = EZ(t->rec8b * 1000, T);
2080 q->cyc8b = EZ(t->cyc8b * 1000, T);
2081 q->active = EZ(t->active * 1000, T);
2082 q->recover = EZ(t->recover * 1000, T);
2083 q->cycle = EZ(t->cycle * 1000, T);
2084 q->udma = EZ(t->udma * 1000, UT);
2085}
2086
2087void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2088 struct ata_timing *m, unsigned int what)
2089{
2090 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2091 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2092 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2093 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2094 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2095 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2096 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2097 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2098}
2099
2100static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2101{
2102 const struct ata_timing *t;
2103
2104 for (t = ata_timing; t->mode != speed; t++)
2105 if (t->mode == 0xFF)
2106 return NULL;
2107 return t;
2108}
2109
2110int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2111 struct ata_timing *t, int T, int UT)
2112{
2113 const struct ata_timing *s;
2114 struct ata_timing p;
2115
2116 /*
2117 * Find the mode.
2118 */
2119
2120 if (!(s = ata_timing_find_mode(speed)))
2121 return -EINVAL;
2122
2123 memcpy(t, s, sizeof(*s));
2124
2125 /*
2126 * If the drive is an EIDE drive, it can tell us it needs extended
2127 * PIO/MW_DMA cycle timing.
2128 */
2129
2130 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2131 memset(&p, 0, sizeof(p));
2132 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2133 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2134 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2135 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2136 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2137 }
2138 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2139 }
2140
2141 /*
2142 * Convert the timing to bus clock counts.
2143 */
2144
2145 ata_timing_quantize(t, t, T, UT);
2146
2147 /*
2148 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2149 * S.M.A.R.T * and some other commands. We have to ensure that the
2150 * DMA cycle timing is slower/equal than the fastest PIO timing.
2151 */
2152
2153 if (speed > XFER_PIO_4) {
2154 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2155 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2156 }
2157
2158 /*
2159 * Lengthen active & recovery time so that cycle time is correct.
2160 */
2161
2162 if (t->act8b + t->rec8b < t->cyc8b) {
2163 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2164 t->rec8b = t->cyc8b - t->act8b;
2165 }
2166
2167 if (t->active + t->recover < t->cycle) {
2168 t->active += (t->cycle - (t->active + t->recover)) / 2;
2169 t->recover = t->cycle - t->active;
2170 }
2171
2172 return 0;
2173}
2174
2175/**
2176 * ata_down_xfermask_limit - adjust dev xfer masks downward
2177 * @dev: Device to adjust xfer masks
2178 * @force_pio0: Force PIO0
2179 *
2180 * Adjust xfer masks of @dev downward. Note that this function
2181 * does not apply the change. Invoking ata_set_mode() afterwards
2182 * will apply the limit.
2183 *
2184 * LOCKING:
2185 * Inherited from caller.
2186 *
2187 * RETURNS:
2188 * 0 on success, negative errno on failure
2189 */
2190int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2191{
2192 unsigned long xfer_mask;
2193 int highbit;
2194
2195 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2196 dev->udma_mask);
2197
2198 if (!xfer_mask)
2199 goto fail;
2200 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2201 if (xfer_mask & ATA_MASK_UDMA)
2202 xfer_mask &= ~ATA_MASK_MWDMA;
2203
2204 highbit = fls(xfer_mask) - 1;
2205 xfer_mask &= ~(1 << highbit);
2206 if (force_pio0)
2207 xfer_mask &= 1 << ATA_SHIFT_PIO;
2208 if (!xfer_mask)
2209 goto fail;
2210
2211 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2212 &dev->udma_mask);
2213
2214 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2215 ata_mode_string(xfer_mask));
2216
2217 return 0;
2218
2219 fail:
2220 return -EINVAL;
2221}
2222
2223static int ata_dev_set_mode(struct ata_device *dev)
2224{
2225 struct ata_eh_context *ehc = &dev->ap->eh_context;
2226 unsigned int err_mask;
2227 int rc;
2228
2229 dev->flags &= ~ATA_DFLAG_PIO;
2230 if (dev->xfer_shift == ATA_SHIFT_PIO)
2231 dev->flags |= ATA_DFLAG_PIO;
2232
2233 err_mask = ata_dev_set_xfermode(dev);
2234 if (err_mask) {
2235 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2236 "(err_mask=0x%x)\n", err_mask);
2237 return -EIO;
2238 }
2239
2240 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2241 rc = ata_dev_revalidate(dev, 0);
2242 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2243 if (rc)
2244 return rc;
2245
2246 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2247 dev->xfer_shift, (int)dev->xfer_mode);
2248
2249 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2250 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2251 return 0;
2252}
2253
2254/**
2255 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2256 * @ap: port on which timings will be programmed
2257 * @r_failed_dev: out paramter for failed device
2258 *
2259 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2260 * ata_set_mode() fails, pointer to the failing device is
2261 * returned in @r_failed_dev.
2262 *
2263 * LOCKING:
2264 * PCI/etc. bus probe sem.
2265 *
2266 * RETURNS:
2267 * 0 on success, negative errno otherwise
2268 */
2269int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2270{
2271 struct ata_device *dev;
2272 int i, rc = 0, used_dma = 0, found = 0;
2273
2274 /* has private set_mode? */
2275 if (ap->ops->set_mode) {
2276 /* FIXME: make ->set_mode handle no device case and
2277 * return error code and failing device on failure.
2278 */
2279 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2280 if (ata_dev_ready(&ap->device[i])) {
2281 ap->ops->set_mode(ap);
2282 break;
2283 }
2284 }
2285 return 0;
2286 }
2287
2288 /* step 1: calculate xfer_mask */
2289 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2290 unsigned int pio_mask, dma_mask;
2291
2292 dev = &ap->device[i];
2293
2294 if (!ata_dev_enabled(dev))
2295 continue;
2296
2297 ata_dev_xfermask(dev);
2298
2299 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2300 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2301 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2302 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2303
2304 found = 1;
2305 if (dev->dma_mode)
2306 used_dma = 1;
2307 }
2308 if (!found)
2309 goto out;
2310
2311 /* step 2: always set host PIO timings */
2312 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2313 dev = &ap->device[i];
2314 if (!ata_dev_enabled(dev))
2315 continue;
2316
2317 if (!dev->pio_mode) {
2318 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2319 rc = -EINVAL;
2320 goto out;
2321 }
2322
2323 dev->xfer_mode = dev->pio_mode;
2324 dev->xfer_shift = ATA_SHIFT_PIO;
2325 if (ap->ops->set_piomode)
2326 ap->ops->set_piomode(ap, dev);
2327 }
2328
2329 /* step 3: set host DMA timings */
2330 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2331 dev = &ap->device[i];
2332
2333 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2334 continue;
2335
2336 dev->xfer_mode = dev->dma_mode;
2337 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2338 if (ap->ops->set_dmamode)
2339 ap->ops->set_dmamode(ap, dev);
2340 }
2341
2342 /* step 4: update devices' xfer mode */
2343 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2344 dev = &ap->device[i];
2345
2346 /* don't udpate suspended devices' xfer mode */
2347 if (!ata_dev_ready(dev))
2348 continue;
2349
2350 rc = ata_dev_set_mode(dev);
2351 if (rc)
2352 goto out;
2353 }
2354
2355 /* Record simplex status. If we selected DMA then the other
2356 * host channels are not permitted to do so.
2357 */
2358 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2359 ap->host->simplex_claimed = 1;
2360
2361 /* step5: chip specific finalisation */
2362 if (ap->ops->post_set_mode)
2363 ap->ops->post_set_mode(ap);
2364
2365 out:
2366 if (rc)
2367 *r_failed_dev = dev;
2368 return rc;
2369}
2370
2371/**
2372 * ata_tf_to_host - issue ATA taskfile to host controller
2373 * @ap: port to which command is being issued
2374 * @tf: ATA taskfile register set
2375 *
2376 * Issues ATA taskfile register set to ATA host controller,
2377 * with proper synchronization with interrupt handler and
2378 * other threads.
2379 *
2380 * LOCKING:
2381 * spin_lock_irqsave(host lock)
2382 */
2383
2384static inline void ata_tf_to_host(struct ata_port *ap,
2385 const struct ata_taskfile *tf)
2386{
2387 ap->ops->tf_load(ap, tf);
2388 ap->ops->exec_command(ap, tf);
2389}
2390
2391/**
2392 * ata_busy_sleep - sleep until BSY clears, or timeout
2393 * @ap: port containing status register to be polled
2394 * @tmout_pat: impatience timeout
2395 * @tmout: overall timeout
2396 *
2397 * Sleep until ATA Status register bit BSY clears,
2398 * or a timeout occurs.
2399 *
2400 * LOCKING:
2401 * Kernel thread context (may sleep).
2402 *
2403 * RETURNS:
2404 * 0 on success, -errno otherwise.
2405 */
2406int ata_busy_sleep(struct ata_port *ap,
2407 unsigned long tmout_pat, unsigned long tmout)
2408{
2409 unsigned long timer_start, timeout;
2410 u8 status;
2411
2412 status = ata_busy_wait(ap, ATA_BUSY, 300);
2413 timer_start = jiffies;
2414 timeout = timer_start + tmout_pat;
2415 while (status != 0xff && (status & ATA_BUSY) &&
2416 time_before(jiffies, timeout)) {
2417 msleep(50);
2418 status = ata_busy_wait(ap, ATA_BUSY, 3);
2419 }
2420
2421 if (status != 0xff && (status & ATA_BUSY))
2422 ata_port_printk(ap, KERN_WARNING,
2423 "port is slow to respond, please be patient "
2424 "(Status 0x%x)\n", status);
2425
2426 timeout = timer_start + tmout;
2427 while (status != 0xff && (status & ATA_BUSY) &&
2428 time_before(jiffies, timeout)) {
2429 msleep(50);
2430 status = ata_chk_status(ap);
2431 }
2432
2433 if (status == 0xff)
2434 return -ENODEV;
2435
2436 if (status & ATA_BUSY) {
2437 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2438 "(%lu secs, Status 0x%x)\n",
2439 tmout / HZ, status);
2440 return -EBUSY;
2441 }
2442
2443 return 0;
2444}
2445
2446static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2447{
2448 struct ata_ioports *ioaddr = &ap->ioaddr;
2449 unsigned int dev0 = devmask & (1 << 0);
2450 unsigned int dev1 = devmask & (1 << 1);
2451 unsigned long timeout;
2452
2453 /* if device 0 was found in ata_devchk, wait for its
2454 * BSY bit to clear
2455 */
2456 if (dev0)
2457 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2458
2459 /* if device 1 was found in ata_devchk, wait for
2460 * register access, then wait for BSY to clear
2461 */
2462 timeout = jiffies + ATA_TMOUT_BOOT;
2463 while (dev1) {
2464 u8 nsect, lbal;
2465
2466 ap->ops->dev_select(ap, 1);
2467 if (ap->flags & ATA_FLAG_MMIO) {
2468 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2469 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2470 } else {
2471 nsect = inb(ioaddr->nsect_addr);
2472 lbal = inb(ioaddr->lbal_addr);
2473 }
2474 if ((nsect == 1) && (lbal == 1))
2475 break;
2476 if (time_after(jiffies, timeout)) {
2477 dev1 = 0;
2478 break;
2479 }
2480 msleep(50); /* give drive a breather */
2481 }
2482 if (dev1)
2483 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2484
2485 /* is all this really necessary? */
2486 ap->ops->dev_select(ap, 0);
2487 if (dev1)
2488 ap->ops->dev_select(ap, 1);
2489 if (dev0)
2490 ap->ops->dev_select(ap, 0);
2491}
2492
2493static unsigned int ata_bus_softreset(struct ata_port *ap,
2494 unsigned int devmask)
2495{
2496 struct ata_ioports *ioaddr = &ap->ioaddr;
2497
2498 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2499
2500 /* software reset. causes dev0 to be selected */
2501 if (ap->flags & ATA_FLAG_MMIO) {
2502 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2503 udelay(20); /* FIXME: flush */
2504 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2505 udelay(20); /* FIXME: flush */
2506 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2507 } else {
2508 outb(ap->ctl, ioaddr->ctl_addr);
2509 udelay(10);
2510 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2511 udelay(10);
2512 outb(ap->ctl, ioaddr->ctl_addr);
2513 }
2514
2515 /* spec mandates ">= 2ms" before checking status.
2516 * We wait 150ms, because that was the magic delay used for
2517 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2518 * between when the ATA command register is written, and then
2519 * status is checked. Because waiting for "a while" before
2520 * checking status is fine, post SRST, we perform this magic
2521 * delay here as well.
2522 *
2523 * Old drivers/ide uses the 2mS rule and then waits for ready
2524 */
2525 msleep(150);
2526
2527 /* Before we perform post reset processing we want to see if
2528 * the bus shows 0xFF because the odd clown forgets the D7
2529 * pulldown resistor.
2530 */
2531 if (ata_check_status(ap) == 0xFF)
2532 return 0;
2533
2534 ata_bus_post_reset(ap, devmask);
2535
2536 return 0;
2537}
2538
2539/**
2540 * ata_bus_reset - reset host port and associated ATA channel
2541 * @ap: port to reset
2542 *
2543 * This is typically the first time we actually start issuing
2544 * commands to the ATA channel. We wait for BSY to clear, then
2545 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2546 * result. Determine what devices, if any, are on the channel
2547 * by looking at the device 0/1 error register. Look at the signature
2548 * stored in each device's taskfile registers, to determine if
2549 * the device is ATA or ATAPI.
2550 *
2551 * LOCKING:
2552 * PCI/etc. bus probe sem.
2553 * Obtains host lock.
2554 *
2555 * SIDE EFFECTS:
2556 * Sets ATA_FLAG_DISABLED if bus reset fails.
2557 */
2558
2559void ata_bus_reset(struct ata_port *ap)
2560{
2561 struct ata_ioports *ioaddr = &ap->ioaddr;
2562 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2563 u8 err;
2564 unsigned int dev0, dev1 = 0, devmask = 0;
2565
2566 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2567
2568 /* determine if device 0/1 are present */
2569 if (ap->flags & ATA_FLAG_SATA_RESET)
2570 dev0 = 1;
2571 else {
2572 dev0 = ata_devchk(ap, 0);
2573 if (slave_possible)
2574 dev1 = ata_devchk(ap, 1);
2575 }
2576
2577 if (dev0)
2578 devmask |= (1 << 0);
2579 if (dev1)
2580 devmask |= (1 << 1);
2581
2582 /* select device 0 again */
2583 ap->ops->dev_select(ap, 0);
2584
2585 /* issue bus reset */
2586 if (ap->flags & ATA_FLAG_SRST)
2587 if (ata_bus_softreset(ap, devmask))
2588 goto err_out;
2589
2590 /*
2591 * determine by signature whether we have ATA or ATAPI devices
2592 */
2593 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2594 if ((slave_possible) && (err != 0x81))
2595 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2596
2597 /* re-enable interrupts */
2598 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2599 ata_irq_on(ap);
2600
2601 /* is double-select really necessary? */
2602 if (ap->device[1].class != ATA_DEV_NONE)
2603 ap->ops->dev_select(ap, 1);
2604 if (ap->device[0].class != ATA_DEV_NONE)
2605 ap->ops->dev_select(ap, 0);
2606
2607 /* if no devices were detected, disable this port */
2608 if ((ap->device[0].class == ATA_DEV_NONE) &&
2609 (ap->device[1].class == ATA_DEV_NONE))
2610 goto err_out;
2611
2612 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2613 /* set up device control for ATA_FLAG_SATA_RESET */
2614 if (ap->flags & ATA_FLAG_MMIO)
2615 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2616 else
2617 outb(ap->ctl, ioaddr->ctl_addr);
2618 }
2619
2620 DPRINTK("EXIT\n");
2621 return;
2622
2623err_out:
2624 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2625 ap->ops->port_disable(ap);
2626
2627 DPRINTK("EXIT\n");
2628}
2629
2630/**
2631 * sata_phy_debounce - debounce SATA phy status
2632 * @ap: ATA port to debounce SATA phy status for
2633 * @params: timing parameters { interval, duratinon, timeout } in msec
2634 *
2635 * Make sure SStatus of @ap reaches stable state, determined by
2636 * holding the same value where DET is not 1 for @duration polled
2637 * every @interval, before @timeout. Timeout constraints the
2638 * beginning of the stable state. Because, after hot unplugging,
2639 * DET gets stuck at 1 on some controllers, this functions waits
2640 * until timeout then returns 0 if DET is stable at 1.
2641 *
2642 * LOCKING:
2643 * Kernel thread context (may sleep)
2644 *
2645 * RETURNS:
2646 * 0 on success, -errno on failure.
2647 */
2648int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2649{
2650 unsigned long interval_msec = params[0];
2651 unsigned long duration = params[1] * HZ / 1000;
2652 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2653 unsigned long last_jiffies;
2654 u32 last, cur;
2655 int rc;
2656
2657 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2658 return rc;
2659 cur &= 0xf;
2660
2661 last = cur;
2662 last_jiffies = jiffies;
2663
2664 while (1) {
2665 msleep(interval_msec);
2666 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2667 return rc;
2668 cur &= 0xf;
2669
2670 /* DET stable? */
2671 if (cur == last) {
2672 if (cur == 1 && time_before(jiffies, timeout))
2673 continue;
2674 if (time_after(jiffies, last_jiffies + duration))
2675 return 0;
2676 continue;
2677 }
2678
2679 /* unstable, start over */
2680 last = cur;
2681 last_jiffies = jiffies;
2682
2683 /* check timeout */
2684 if (time_after(jiffies, timeout))
2685 return -EBUSY;
2686 }
2687}
2688
2689/**
2690 * sata_phy_resume - resume SATA phy
2691 * @ap: ATA port to resume SATA phy for
2692 * @params: timing parameters { interval, duratinon, timeout } in msec
2693 *
2694 * Resume SATA phy of @ap and debounce it.
2695 *
2696 * LOCKING:
2697 * Kernel thread context (may sleep)
2698 *
2699 * RETURNS:
2700 * 0 on success, -errno on failure.
2701 */
2702int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2703{
2704 u32 scontrol;
2705 int rc;
2706
2707 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2708 return rc;
2709
2710 scontrol = (scontrol & 0x0f0) | 0x300;
2711
2712 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2713 return rc;
2714
2715 /* Some PHYs react badly if SStatus is pounded immediately
2716 * after resuming. Delay 200ms before debouncing.
2717 */
2718 msleep(200);
2719
2720 return sata_phy_debounce(ap, params);
2721}
2722
2723static void ata_wait_spinup(struct ata_port *ap)
2724{
2725 struct ata_eh_context *ehc = &ap->eh_context;
2726 unsigned long end, secs;
2727 int rc;
2728
2729 /* first, debounce phy if SATA */
2730 if (ap->cbl == ATA_CBL_SATA) {
2731 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2732
2733 /* if debounced successfully and offline, no need to wait */
2734 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2735 return;
2736 }
2737
2738 /* okay, let's give the drive time to spin up */
2739 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2740 secs = ((end - jiffies) + HZ - 1) / HZ;
2741
2742 if (time_after(jiffies, end))
2743 return;
2744
2745 if (secs > 5)
2746 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2747 "(%lu secs)\n", secs);
2748
2749 schedule_timeout_uninterruptible(end - jiffies);
2750}
2751
2752/**
2753 * ata_std_prereset - prepare for reset
2754 * @ap: ATA port to be reset
2755 *
2756 * @ap is about to be reset. Initialize it.
2757 *
2758 * LOCKING:
2759 * Kernel thread context (may sleep)
2760 *
2761 * RETURNS:
2762 * 0 on success, -errno otherwise.
2763 */
2764int ata_std_prereset(struct ata_port *ap)
2765{
2766 struct ata_eh_context *ehc = &ap->eh_context;
2767 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2768 int rc;
2769
2770 /* handle link resume & hotplug spinup */
2771 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2772 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2773 ehc->i.action |= ATA_EH_HARDRESET;
2774
2775 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2776 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2777 ata_wait_spinup(ap);
2778
2779 /* if we're about to do hardreset, nothing more to do */
2780 if (ehc->i.action & ATA_EH_HARDRESET)
2781 return 0;
2782
2783 /* if SATA, resume phy */
2784 if (ap->cbl == ATA_CBL_SATA) {
2785 rc = sata_phy_resume(ap, timing);
2786 if (rc && rc != -EOPNOTSUPP) {
2787 /* phy resume failed */
2788 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2789 "link for reset (errno=%d)\n", rc);
2790 return rc;
2791 }
2792 }
2793
2794 /* Wait for !BSY if the controller can wait for the first D2H
2795 * Reg FIS and we don't know that no device is attached.
2796 */
2797 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2798 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2799
2800 return 0;
2801}
2802
2803/**
2804 * ata_std_softreset - reset host port via ATA SRST
2805 * @ap: port to reset
2806 * @classes: resulting classes of attached devices
2807 *
2808 * Reset host port using ATA SRST.
2809 *
2810 * LOCKING:
2811 * Kernel thread context (may sleep)
2812 *
2813 * RETURNS:
2814 * 0 on success, -errno otherwise.
2815 */
2816int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2817{
2818 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2819 unsigned int devmask = 0, err_mask;
2820 u8 err;
2821
2822 DPRINTK("ENTER\n");
2823
2824 if (ata_port_offline(ap)) {
2825 classes[0] = ATA_DEV_NONE;
2826 goto out;
2827 }
2828
2829 /* determine if device 0/1 are present */
2830 if (ata_devchk(ap, 0))
2831 devmask |= (1 << 0);
2832 if (slave_possible && ata_devchk(ap, 1))
2833 devmask |= (1 << 1);
2834
2835 /* select device 0 again */
2836 ap->ops->dev_select(ap, 0);
2837
2838 /* issue bus reset */
2839 DPRINTK("about to softreset, devmask=%x\n", devmask);
2840 err_mask = ata_bus_softreset(ap, devmask);
2841 if (err_mask) {
2842 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2843 err_mask);
2844 return -EIO;
2845 }
2846
2847 /* determine by signature whether we have ATA or ATAPI devices */
2848 classes[0] = ata_dev_try_classify(ap, 0, &err);
2849 if (slave_possible && err != 0x81)
2850 classes[1] = ata_dev_try_classify(ap, 1, &err);
2851
2852 out:
2853 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2854 return 0;
2855}
2856
2857/**
2858 * sata_port_hardreset - reset port via SATA phy reset
2859 * @ap: port to reset
2860 * @timing: timing parameters { interval, duratinon, timeout } in msec
2861 *
2862 * SATA phy-reset host port using DET bits of SControl register.
2863 *
2864 * LOCKING:
2865 * Kernel thread context (may sleep)
2866 *
2867 * RETURNS:
2868 * 0 on success, -errno otherwise.
2869 */
2870int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2871{
2872 u32 scontrol;
2873 int rc;
2874
2875 DPRINTK("ENTER\n");
2876
2877 if (sata_set_spd_needed(ap)) {
2878 /* SATA spec says nothing about how to reconfigure
2879 * spd. To be on the safe side, turn off phy during
2880 * reconfiguration. This works for at least ICH7 AHCI
2881 * and Sil3124.
2882 */
2883 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2884 goto out;
2885
2886 scontrol = (scontrol & 0x0f0) | 0x304;
2887
2888 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2889 goto out;
2890
2891 sata_set_spd(ap);
2892 }
2893
2894 /* issue phy wake/reset */
2895 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2896 goto out;
2897
2898 scontrol = (scontrol & 0x0f0) | 0x301;
2899
2900 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2901 goto out;
2902
2903 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2904 * 10.4.2 says at least 1 ms.
2905 */
2906 msleep(1);
2907
2908 /* bring phy back */
2909 rc = sata_phy_resume(ap, timing);
2910 out:
2911 DPRINTK("EXIT, rc=%d\n", rc);
2912 return rc;
2913}
2914
2915/**
2916 * sata_std_hardreset - reset host port via SATA phy reset
2917 * @ap: port to reset
2918 * @class: resulting class of attached device
2919 *
2920 * SATA phy-reset host port using DET bits of SControl register,
2921 * wait for !BSY and classify the attached device.
2922 *
2923 * LOCKING:
2924 * Kernel thread context (may sleep)
2925 *
2926 * RETURNS:
2927 * 0 on success, -errno otherwise.
2928 */
2929int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2930{
2931 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
2932 int rc;
2933
2934 DPRINTK("ENTER\n");
2935
2936 /* do hardreset */
2937 rc = sata_port_hardreset(ap, timing);
2938 if (rc) {
2939 ata_port_printk(ap, KERN_ERR,
2940 "COMRESET failed (errno=%d)\n", rc);
2941 return rc;
2942 }
2943
2944 /* TODO: phy layer with polling, timeouts, etc. */
2945 if (ata_port_offline(ap)) {
2946 *class = ATA_DEV_NONE;
2947 DPRINTK("EXIT, link offline\n");
2948 return 0;
2949 }
2950
2951 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2952 ata_port_printk(ap, KERN_ERR,
2953 "COMRESET failed (device not ready)\n");
2954 return -EIO;
2955 }
2956
2957 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2958
2959 *class = ata_dev_try_classify(ap, 0, NULL);
2960
2961 DPRINTK("EXIT, class=%u\n", *class);
2962 return 0;
2963}
2964
2965/**
2966 * ata_std_postreset - standard postreset callback
2967 * @ap: the target ata_port
2968 * @classes: classes of attached devices
2969 *
2970 * This function is invoked after a successful reset. Note that
2971 * the device might have been reset more than once using
2972 * different reset methods before postreset is invoked.
2973 *
2974 * LOCKING:
2975 * Kernel thread context (may sleep)
2976 */
2977void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2978{
2979 u32 serror;
2980
2981 DPRINTK("ENTER\n");
2982
2983 /* print link status */
2984 sata_print_link_status(ap);
2985
2986 /* clear SError */
2987 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2988 sata_scr_write(ap, SCR_ERROR, serror);
2989
2990 /* re-enable interrupts */
2991 if (!ap->ops->error_handler) {
2992 /* FIXME: hack. create a hook instead */
2993 if (ap->ioaddr.ctl_addr)
2994 ata_irq_on(ap);
2995 }
2996
2997 /* is double-select really necessary? */
2998 if (classes[0] != ATA_DEV_NONE)
2999 ap->ops->dev_select(ap, 1);
3000 if (classes[1] != ATA_DEV_NONE)
3001 ap->ops->dev_select(ap, 0);
3002
3003 /* bail out if no device is present */
3004 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3005 DPRINTK("EXIT, no device\n");
3006 return;
3007 }
3008
3009 /* set up device control */
3010 if (ap->ioaddr.ctl_addr) {
3011 if (ap->flags & ATA_FLAG_MMIO)
3012 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
3013 else
3014 outb(ap->ctl, ap->ioaddr.ctl_addr);
3015 }
3016
3017 DPRINTK("EXIT\n");
3018}
3019
3020/**
3021 * ata_dev_same_device - Determine whether new ID matches configured device
3022 * @dev: device to compare against
3023 * @new_class: class of the new device
3024 * @new_id: IDENTIFY page of the new device
3025 *
3026 * Compare @new_class and @new_id against @dev and determine
3027 * whether @dev is the device indicated by @new_class and
3028 * @new_id.
3029 *
3030 * LOCKING:
3031 * None.
3032 *
3033 * RETURNS:
3034 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3035 */
3036static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3037 const u16 *new_id)
3038{
3039 const u16 *old_id = dev->id;
3040 unsigned char model[2][41], serial[2][21];
3041 u64 new_n_sectors;
3042
3043 if (dev->class != new_class) {
3044 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3045 dev->class, new_class);
3046 return 0;
3047 }
3048
3049 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
3050 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
3051 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
3052 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
3053 new_n_sectors = ata_id_n_sectors(new_id);
3054
3055 if (strcmp(model[0], model[1])) {
3056 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3057 "'%s' != '%s'\n", model[0], model[1]);
3058 return 0;
3059 }
3060
3061 if (strcmp(serial[0], serial[1])) {
3062 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3063 "'%s' != '%s'\n", serial[0], serial[1]);
3064 return 0;
3065 }
3066
3067 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3068 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3069 "%llu != %llu\n",
3070 (unsigned long long)dev->n_sectors,
3071 (unsigned long long)new_n_sectors);
3072 return 0;
3073 }
3074
3075 return 1;
3076}
3077
3078/**
3079 * ata_dev_revalidate - Revalidate ATA device
3080 * @dev: device to revalidate
3081 * @readid_flags: read ID flags
3082 *
3083 * Re-read IDENTIFY page and make sure @dev is still attached to
3084 * the port.
3085 *
3086 * LOCKING:
3087 * Kernel thread context (may sleep)
3088 *
3089 * RETURNS:
3090 * 0 on success, negative errno otherwise
3091 */
3092int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3093{
3094 unsigned int class = dev->class;
3095 u16 *id = (void *)dev->ap->sector_buf;
3096 int rc;
3097
3098 if (!ata_dev_enabled(dev)) {
3099 rc = -ENODEV;
3100 goto fail;
3101 }
3102
3103 /* read ID data */
3104 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3105 if (rc)
3106 goto fail;
3107
3108 /* is the device still there? */
3109 if (!ata_dev_same_device(dev, class, id)) {
3110 rc = -ENODEV;
3111 goto fail;
3112 }
3113
3114 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3115
3116 /* configure device according to the new ID */
3117 rc = ata_dev_configure(dev);
3118 if (rc == 0)
3119 return 0;
3120
3121 fail:
3122 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3123 return rc;
3124}
3125
3126struct ata_blacklist_entry {
3127 const char *model_num;
3128 const char *model_rev;
3129 unsigned long horkage;
3130};
3131
3132static const struct ata_blacklist_entry ata_device_blacklist [] = {
3133 /* Devices with DMA related problems under Linux */
3134 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3135 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3136 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3137 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3138 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3139 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3140 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3141 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3142 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3143 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3144 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3145 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3146 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3147 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3148 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3149 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3150 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3151 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3152 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3153 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3154 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3155 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3156 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3157 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3158 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3159 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3160 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3161 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3162 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3163 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3164
3165 /* Devices we expect to fail diagnostics */
3166
3167 /* Devices where NCQ should be avoided */
3168 /* NCQ is slow */
3169 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3170
3171 /* Devices with NCQ limits */
3172
3173 /* End Marker */
3174 { }
3175};
3176
3177static int ata_strim(char *s, size_t len)
3178{
3179 len = strnlen(s, len);
3180
3181 /* ATAPI specifies that empty space is blank-filled; remove blanks */
3182 while ((len > 0) && (s[len - 1] == ' ')) {
3183 len--;
3184 s[len] = 0;
3185 }
3186 return len;
3187}
3188
3189unsigned long ata_device_blacklisted(const struct ata_device *dev)
3190{
3191 unsigned char model_num[40];
3192 unsigned char model_rev[16];
3193 unsigned int nlen, rlen;
3194 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3195
3196 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3197 sizeof(model_num));
3198 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3199 sizeof(model_rev));
3200 nlen = ata_strim(model_num, sizeof(model_num));
3201 rlen = ata_strim(model_rev, sizeof(model_rev));
3202
3203 while (ad->model_num) {
3204 if (!strncmp(ad->model_num, model_num, nlen)) {
3205 if (ad->model_rev == NULL)
3206 return ad->horkage;
3207 if (!strncmp(ad->model_rev, model_rev, rlen))
3208 return ad->horkage;
3209 }
3210 ad++;
3211 }
3212 return 0;
3213}
3214
3215static int ata_dma_blacklisted(const struct ata_device *dev)
3216{
3217 /* We don't support polling DMA.
3218 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3219 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3220 */
3221 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3222 (dev->flags & ATA_DFLAG_CDB_INTR))
3223 return 1;
3224 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3225}
3226
3227/**
3228 * ata_dev_xfermask - Compute supported xfermask of the given device
3229 * @dev: Device to compute xfermask for
3230 *
3231 * Compute supported xfermask of @dev and store it in
3232 * dev->*_mask. This function is responsible for applying all
3233 * known limits including host controller limits, device
3234 * blacklist, etc...
3235 *
3236 * LOCKING:
3237 * None.
3238 */
3239static void ata_dev_xfermask(struct ata_device *dev)
3240{
3241 struct ata_port *ap = dev->ap;
3242 struct ata_host *host = ap->host;
3243 unsigned long xfer_mask;
3244
3245 /* controller modes available */
3246 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3247 ap->mwdma_mask, ap->udma_mask);
3248
3249 /* Apply cable rule here. Don't apply it early because when
3250 * we handle hot plug the cable type can itself change.
3251 */
3252 if (ap->cbl == ATA_CBL_PATA40)
3253 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3254 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3255 * host side are checked drive side as well. Cases where we know a
3256 * 40wire cable is used safely for 80 are not checked here.
3257 */
3258 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3259 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3260
3261
3262 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3263 dev->mwdma_mask, dev->udma_mask);
3264 xfer_mask &= ata_id_xfermask(dev->id);
3265
3266 /*
3267 * CFA Advanced TrueIDE timings are not allowed on a shared
3268 * cable
3269 */
3270 if (ata_dev_pair(dev)) {
3271 /* No PIO5 or PIO6 */
3272 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3273 /* No MWDMA3 or MWDMA 4 */
3274 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3275 }
3276
3277 if (ata_dma_blacklisted(dev)) {
3278 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3279 ata_dev_printk(dev, KERN_WARNING,
3280 "device is on DMA blacklist, disabling DMA\n");
3281 }
3282
3283 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3284 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3285 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3286 "other device, disabling DMA\n");
3287 }
3288
3289 if (ap->ops->mode_filter)
3290 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3291
3292 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3293 &dev->mwdma_mask, &dev->udma_mask);
3294}
3295
3296/**
3297 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3298 * @dev: Device to which command will be sent
3299 *
3300 * Issue SET FEATURES - XFER MODE command to device @dev
3301 * on port @ap.
3302 *
3303 * LOCKING:
3304 * PCI/etc. bus probe sem.
3305 *
3306 * RETURNS:
3307 * 0 on success, AC_ERR_* mask otherwise.
3308 */
3309
3310static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3311{
3312 struct ata_taskfile tf;
3313 unsigned int err_mask;
3314
3315 /* set up set-features taskfile */
3316 DPRINTK("set features - xfer mode\n");
3317
3318 ata_tf_init(dev, &tf);
3319 tf.command = ATA_CMD_SET_FEATURES;
3320 tf.feature = SETFEATURES_XFER;
3321 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3322 tf.protocol = ATA_PROT_NODATA;
3323 tf.nsect = dev->xfer_mode;
3324
3325 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3326
3327 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3328 return err_mask;
3329}
3330
3331/**
3332 * ata_dev_init_params - Issue INIT DEV PARAMS command
3333 * @dev: Device to which command will be sent
3334 * @heads: Number of heads (taskfile parameter)
3335 * @sectors: Number of sectors (taskfile parameter)
3336 *
3337 * LOCKING:
3338 * Kernel thread context (may sleep)
3339 *
3340 * RETURNS:
3341 * 0 on success, AC_ERR_* mask otherwise.
3342 */
3343static unsigned int ata_dev_init_params(struct ata_device *dev,
3344 u16 heads, u16 sectors)
3345{
3346 struct ata_taskfile tf;
3347 unsigned int err_mask;
3348
3349 /* Number of sectors per track 1-255. Number of heads 1-16 */
3350 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3351 return AC_ERR_INVALID;
3352
3353 /* set up init dev params taskfile */
3354 DPRINTK("init dev params \n");
3355
3356 ata_tf_init(dev, &tf);
3357 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3358 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3359 tf.protocol = ATA_PROT_NODATA;
3360 tf.nsect = sectors;
3361 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3362
3363 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3364
3365 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3366 return err_mask;
3367}
3368
3369/**
3370 * ata_sg_clean - Unmap DMA memory associated with command
3371 * @qc: Command containing DMA memory to be released
3372 *
3373 * Unmap all mapped DMA memory associated with this command.
3374 *
3375 * LOCKING:
3376 * spin_lock_irqsave(host lock)
3377 */
3378
3379static void ata_sg_clean(struct ata_queued_cmd *qc)
3380{
3381 struct ata_port *ap = qc->ap;
3382 struct scatterlist *sg = qc->__sg;
3383 int dir = qc->dma_dir;
3384 void *pad_buf = NULL;
3385
3386 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3387 WARN_ON(sg == NULL);
3388
3389 if (qc->flags & ATA_QCFLAG_SINGLE)
3390 WARN_ON(qc->n_elem > 1);
3391
3392 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3393
3394 /* if we padded the buffer out to 32-bit bound, and data
3395 * xfer direction is from-device, we must copy from the
3396 * pad buffer back into the supplied buffer
3397 */
3398 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3399 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3400
3401 if (qc->flags & ATA_QCFLAG_SG) {
3402 if (qc->n_elem)
3403 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3404 /* restore last sg */
3405 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3406 if (pad_buf) {
3407 struct scatterlist *psg = &qc->pad_sgent;
3408 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3409 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3410 kunmap_atomic(addr, KM_IRQ0);
3411 }
3412 } else {
3413 if (qc->n_elem)
3414 dma_unmap_single(ap->dev,
3415 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3416 dir);
3417 /* restore sg */
3418 sg->length += qc->pad_len;
3419 if (pad_buf)
3420 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3421 pad_buf, qc->pad_len);
3422 }
3423
3424 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3425 qc->__sg = NULL;
3426}
3427
3428/**
3429 * ata_fill_sg - Fill PCI IDE PRD table
3430 * @qc: Metadata associated with taskfile to be transferred
3431 *
3432 * Fill PCI IDE PRD (scatter-gather) table with segments
3433 * associated with the current disk command.
3434 *
3435 * LOCKING:
3436 * spin_lock_irqsave(host lock)
3437 *
3438 */
3439static void ata_fill_sg(struct ata_queued_cmd *qc)
3440{
3441 struct ata_port *ap = qc->ap;
3442 struct scatterlist *sg;
3443 unsigned int idx;
3444
3445 WARN_ON(qc->__sg == NULL);
3446 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3447
3448 idx = 0;
3449 ata_for_each_sg(sg, qc) {
3450 u32 addr, offset;
3451 u32 sg_len, len;
3452
3453 /* determine if physical DMA addr spans 64K boundary.
3454 * Note h/w doesn't support 64-bit, so we unconditionally
3455 * truncate dma_addr_t to u32.
3456 */
3457 addr = (u32) sg_dma_address(sg);
3458 sg_len = sg_dma_len(sg);
3459
3460 while (sg_len) {
3461 offset = addr & 0xffff;
3462 len = sg_len;
3463 if ((offset + sg_len) > 0x10000)
3464 len = 0x10000 - offset;
3465
3466 ap->prd[idx].addr = cpu_to_le32(addr);
3467 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3468 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3469
3470 idx++;
3471 sg_len -= len;
3472 addr += len;
3473 }
3474 }
3475
3476 if (idx)
3477 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3478}
3479/**
3480 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3481 * @qc: Metadata associated with taskfile to check
3482 *
3483 * Allow low-level driver to filter ATA PACKET commands, returning
3484 * a status indicating whether or not it is OK to use DMA for the
3485 * supplied PACKET command.
3486 *
3487 * LOCKING:
3488 * spin_lock_irqsave(host lock)
3489 *
3490 * RETURNS: 0 when ATAPI DMA can be used
3491 * nonzero otherwise
3492 */
3493int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3494{
3495 struct ata_port *ap = qc->ap;
3496 int rc = 0; /* Assume ATAPI DMA is OK by default */
3497
3498 if (ap->ops->check_atapi_dma)
3499 rc = ap->ops->check_atapi_dma(qc);
3500
3501 return rc;
3502}
3503/**
3504 * ata_qc_prep - Prepare taskfile for submission
3505 * @qc: Metadata associated with taskfile to be prepared
3506 *
3507 * Prepare ATA taskfile for submission.
3508 *
3509 * LOCKING:
3510 * spin_lock_irqsave(host lock)
3511 */
3512void ata_qc_prep(struct ata_queued_cmd *qc)
3513{
3514 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3515 return;
3516
3517 ata_fill_sg(qc);
3518}
3519
3520void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3521
3522/**
3523 * ata_sg_init_one - Associate command with memory buffer
3524 * @qc: Command to be associated
3525 * @buf: Memory buffer
3526 * @buflen: Length of memory buffer, in bytes.
3527 *
3528 * Initialize the data-related elements of queued_cmd @qc
3529 * to point to a single memory buffer, @buf of byte length @buflen.
3530 *
3531 * LOCKING:
3532 * spin_lock_irqsave(host lock)
3533 */
3534
3535void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3536{
3537 qc->flags |= ATA_QCFLAG_SINGLE;
3538
3539 qc->__sg = &qc->sgent;
3540 qc->n_elem = 1;
3541 qc->orig_n_elem = 1;
3542 qc->buf_virt = buf;
3543 qc->nbytes = buflen;
3544
3545 sg_init_one(&qc->sgent, buf, buflen);
3546}
3547
3548/**
3549 * ata_sg_init - Associate command with scatter-gather table.
3550 * @qc: Command to be associated
3551 * @sg: Scatter-gather table.
3552 * @n_elem: Number of elements in s/g table.
3553 *
3554 * Initialize the data-related elements of queued_cmd @qc
3555 * to point to a scatter-gather table @sg, containing @n_elem
3556 * elements.
3557 *
3558 * LOCKING:
3559 * spin_lock_irqsave(host lock)
3560 */
3561
3562void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3563 unsigned int n_elem)
3564{
3565 qc->flags |= ATA_QCFLAG_SG;
3566 qc->__sg = sg;
3567 qc->n_elem = n_elem;
3568 qc->orig_n_elem = n_elem;
3569}
3570
3571/**
3572 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3573 * @qc: Command with memory buffer to be mapped.
3574 *
3575 * DMA-map the memory buffer associated with queued_cmd @qc.
3576 *
3577 * LOCKING:
3578 * spin_lock_irqsave(host lock)
3579 *
3580 * RETURNS:
3581 * Zero on success, negative on error.
3582 */
3583
3584static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3585{
3586 struct ata_port *ap = qc->ap;
3587 int dir = qc->dma_dir;
3588 struct scatterlist *sg = qc->__sg;
3589 dma_addr_t dma_address;
3590 int trim_sg = 0;
3591
3592 /* we must lengthen transfers to end on a 32-bit boundary */
3593 qc->pad_len = sg->length & 3;
3594 if (qc->pad_len) {
3595 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3596 struct scatterlist *psg = &qc->pad_sgent;
3597
3598 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3599
3600 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3601
3602 if (qc->tf.flags & ATA_TFLAG_WRITE)
3603 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3604 qc->pad_len);
3605
3606 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3607 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3608 /* trim sg */
3609 sg->length -= qc->pad_len;
3610 if (sg->length == 0)
3611 trim_sg = 1;
3612
3613 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3614 sg->length, qc->pad_len);
3615 }
3616
3617 if (trim_sg) {
3618 qc->n_elem--;
3619 goto skip_map;
3620 }
3621
3622 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3623 sg->length, dir);
3624 if (dma_mapping_error(dma_address)) {
3625 /* restore sg */
3626 sg->length += qc->pad_len;
3627 return -1;
3628 }
3629
3630 sg_dma_address(sg) = dma_address;
3631 sg_dma_len(sg) = sg->length;
3632
3633skip_map:
3634 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3635 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3636
3637 return 0;
3638}
3639
3640/**
3641 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3642 * @qc: Command with scatter-gather table to be mapped.
3643 *
3644 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3645 *
3646 * LOCKING:
3647 * spin_lock_irqsave(host lock)
3648 *
3649 * RETURNS:
3650 * Zero on success, negative on error.
3651 *
3652 */
3653
3654static int ata_sg_setup(struct ata_queued_cmd *qc)
3655{
3656 struct ata_port *ap = qc->ap;
3657 struct scatterlist *sg = qc->__sg;
3658 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3659 int n_elem, pre_n_elem, dir, trim_sg = 0;
3660
3661 VPRINTK("ENTER, ata%u\n", ap->id);
3662 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3663
3664 /* we must lengthen transfers to end on a 32-bit boundary */
3665 qc->pad_len = lsg->length & 3;
3666 if (qc->pad_len) {
3667 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3668 struct scatterlist *psg = &qc->pad_sgent;
3669 unsigned int offset;
3670
3671 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3672
3673 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3674
3675 /*
3676 * psg->page/offset are used to copy to-be-written
3677 * data in this function or read data in ata_sg_clean.
3678 */
3679 offset = lsg->offset + lsg->length - qc->pad_len;
3680 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3681 psg->offset = offset_in_page(offset);
3682
3683 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3684 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3685 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3686 kunmap_atomic(addr, KM_IRQ0);
3687 }
3688
3689 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3690 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3691 /* trim last sg */
3692 lsg->length -= qc->pad_len;
3693 if (lsg->length == 0)
3694 trim_sg = 1;
3695
3696 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3697 qc->n_elem - 1, lsg->length, qc->pad_len);
3698 }
3699
3700 pre_n_elem = qc->n_elem;
3701 if (trim_sg && pre_n_elem)
3702 pre_n_elem--;
3703
3704 if (!pre_n_elem) {
3705 n_elem = 0;
3706 goto skip_map;
3707 }
3708
3709 dir = qc->dma_dir;
3710 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3711 if (n_elem < 1) {
3712 /* restore last sg */
3713 lsg->length += qc->pad_len;
3714 return -1;
3715 }
3716
3717 DPRINTK("%d sg elements mapped\n", n_elem);
3718
3719skip_map:
3720 qc->n_elem = n_elem;
3721
3722 return 0;
3723}
3724
3725/**
3726 * swap_buf_le16 - swap halves of 16-bit words in place
3727 * @buf: Buffer to swap
3728 * @buf_words: Number of 16-bit words in buffer.
3729 *
3730 * Swap halves of 16-bit words if needed to convert from
3731 * little-endian byte order to native cpu byte order, or
3732 * vice-versa.
3733 *
3734 * LOCKING:
3735 * Inherited from caller.
3736 */
3737void swap_buf_le16(u16 *buf, unsigned int buf_words)
3738{
3739#ifdef __BIG_ENDIAN
3740 unsigned int i;
3741
3742 for (i = 0; i < buf_words; i++)
3743 buf[i] = le16_to_cpu(buf[i]);
3744#endif /* __BIG_ENDIAN */
3745}
3746
3747/**
3748 * ata_mmio_data_xfer - Transfer data by MMIO
3749 * @adev: device for this I/O
3750 * @buf: data buffer
3751 * @buflen: buffer length
3752 * @write_data: read/write
3753 *
3754 * Transfer data from/to the device data register by MMIO.
3755 *
3756 * LOCKING:
3757 * Inherited from caller.
3758 */
3759
3760void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3761 unsigned int buflen, int write_data)
3762{
3763 struct ata_port *ap = adev->ap;
3764 unsigned int i;
3765 unsigned int words = buflen >> 1;
3766 u16 *buf16 = (u16 *) buf;
3767 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3768
3769 /* Transfer multiple of 2 bytes */
3770 if (write_data) {
3771 for (i = 0; i < words; i++)
3772 writew(le16_to_cpu(buf16[i]), mmio);
3773 } else {
3774 for (i = 0; i < words; i++)
3775 buf16[i] = cpu_to_le16(readw(mmio));
3776 }
3777
3778 /* Transfer trailing 1 byte, if any. */
3779 if (unlikely(buflen & 0x01)) {
3780 u16 align_buf[1] = { 0 };
3781 unsigned char *trailing_buf = buf + buflen - 1;
3782
3783 if (write_data) {
3784 memcpy(align_buf, trailing_buf, 1);
3785 writew(le16_to_cpu(align_buf[0]), mmio);
3786 } else {
3787 align_buf[0] = cpu_to_le16(readw(mmio));
3788 memcpy(trailing_buf, align_buf, 1);
3789 }
3790 }
3791}
3792
3793/**
3794 * ata_pio_data_xfer - Transfer data by PIO
3795 * @adev: device to target
3796 * @buf: data buffer
3797 * @buflen: buffer length
3798 * @write_data: read/write
3799 *
3800 * Transfer data from/to the device data register by PIO.
3801 *
3802 * LOCKING:
3803 * Inherited from caller.
3804 */
3805
3806void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3807 unsigned int buflen, int write_data)
3808{
3809 struct ata_port *ap = adev->ap;
3810 unsigned int words = buflen >> 1;
3811
3812 /* Transfer multiple of 2 bytes */
3813 if (write_data)
3814 outsw(ap->ioaddr.data_addr, buf, words);
3815 else
3816 insw(ap->ioaddr.data_addr, buf, words);
3817
3818 /* Transfer trailing 1 byte, if any. */
3819 if (unlikely(buflen & 0x01)) {
3820 u16 align_buf[1] = { 0 };
3821 unsigned char *trailing_buf = buf + buflen - 1;
3822
3823 if (write_data) {
3824 memcpy(align_buf, trailing_buf, 1);
3825 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3826 } else {
3827 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3828 memcpy(trailing_buf, align_buf, 1);
3829 }
3830 }
3831}
3832
3833/**
3834 * ata_pio_data_xfer_noirq - Transfer data by PIO
3835 * @adev: device to target
3836 * @buf: data buffer
3837 * @buflen: buffer length
3838 * @write_data: read/write
3839 *
3840 * Transfer data from/to the device data register by PIO. Do the
3841 * transfer with interrupts disabled.
3842 *
3843 * LOCKING:
3844 * Inherited from caller.
3845 */
3846
3847void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3848 unsigned int buflen, int write_data)
3849{
3850 unsigned long flags;
3851 local_irq_save(flags);
3852 ata_pio_data_xfer(adev, buf, buflen, write_data);
3853 local_irq_restore(flags);
3854}
3855
3856
3857/**
3858 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3859 * @qc: Command on going
3860 *
3861 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3862 *
3863 * LOCKING:
3864 * Inherited from caller.
3865 */
3866
3867static void ata_pio_sector(struct ata_queued_cmd *qc)
3868{
3869 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3870 struct scatterlist *sg = qc->__sg;
3871 struct ata_port *ap = qc->ap;
3872 struct page *page;
3873 unsigned int offset;
3874 unsigned char *buf;
3875
3876 if (qc->cursect == (qc->nsect - 1))
3877 ap->hsm_task_state = HSM_ST_LAST;
3878
3879 page = sg[qc->cursg].page;
3880 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3881
3882 /* get the current page and offset */
3883 page = nth_page(page, (offset >> PAGE_SHIFT));
3884 offset %= PAGE_SIZE;
3885
3886 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3887
3888 if (PageHighMem(page)) {
3889 unsigned long flags;
3890
3891 /* FIXME: use a bounce buffer */
3892 local_irq_save(flags);
3893 buf = kmap_atomic(page, KM_IRQ0);
3894
3895 /* do the actual data transfer */
3896 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3897
3898 kunmap_atomic(buf, KM_IRQ0);
3899 local_irq_restore(flags);
3900 } else {
3901 buf = page_address(page);
3902 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3903 }
3904
3905 qc->cursect++;
3906 qc->cursg_ofs++;
3907
3908 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3909 qc->cursg++;
3910 qc->cursg_ofs = 0;
3911 }
3912}
3913
3914/**
3915 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3916 * @qc: Command on going
3917 *
3918 * Transfer one or many ATA_SECT_SIZE of data from/to the
3919 * ATA device for the DRQ request.
3920 *
3921 * LOCKING:
3922 * Inherited from caller.
3923 */
3924
3925static void ata_pio_sectors(struct ata_queued_cmd *qc)
3926{
3927 if (is_multi_taskfile(&qc->tf)) {
3928 /* READ/WRITE MULTIPLE */
3929 unsigned int nsect;
3930
3931 WARN_ON(qc->dev->multi_count == 0);
3932
3933 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3934 while (nsect--)
3935 ata_pio_sector(qc);
3936 } else
3937 ata_pio_sector(qc);
3938}
3939
3940/**
3941 * atapi_send_cdb - Write CDB bytes to hardware
3942 * @ap: Port to which ATAPI device is attached.
3943 * @qc: Taskfile currently active
3944 *
3945 * When device has indicated its readiness to accept
3946 * a CDB, this function is called. Send the CDB.
3947 *
3948 * LOCKING:
3949 * caller.
3950 */
3951
3952static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3953{
3954 /* send SCSI cdb */
3955 DPRINTK("send cdb\n");
3956 WARN_ON(qc->dev->cdb_len < 12);
3957
3958 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3959 ata_altstatus(ap); /* flush */
3960
3961 switch (qc->tf.protocol) {
3962 case ATA_PROT_ATAPI:
3963 ap->hsm_task_state = HSM_ST;
3964 break;
3965 case ATA_PROT_ATAPI_NODATA:
3966 ap->hsm_task_state = HSM_ST_LAST;
3967 break;
3968 case ATA_PROT_ATAPI_DMA:
3969 ap->hsm_task_state = HSM_ST_LAST;
3970 /* initiate bmdma */
3971 ap->ops->bmdma_start(qc);
3972 break;
3973 }
3974}
3975
3976/**
3977 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3978 * @qc: Command on going
3979 * @bytes: number of bytes
3980 *
3981 * Transfer Transfer data from/to the ATAPI device.
3982 *
3983 * LOCKING:
3984 * Inherited from caller.
3985 *
3986 */
3987
3988static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3989{
3990 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3991 struct scatterlist *sg = qc->__sg;
3992 struct ata_port *ap = qc->ap;
3993 struct page *page;
3994 unsigned char *buf;
3995 unsigned int offset, count;
3996
3997 if (qc->curbytes + bytes >= qc->nbytes)
3998 ap->hsm_task_state = HSM_ST_LAST;
3999
4000next_sg:
4001 if (unlikely(qc->cursg >= qc->n_elem)) {
4002 /*
4003 * The end of qc->sg is reached and the device expects
4004 * more data to transfer. In order not to overrun qc->sg
4005 * and fulfill length specified in the byte count register,
4006 * - for read case, discard trailing data from the device
4007 * - for write case, padding zero data to the device
4008 */
4009 u16 pad_buf[1] = { 0 };
4010 unsigned int words = bytes >> 1;
4011 unsigned int i;
4012
4013 if (words) /* warning if bytes > 1 */
4014 ata_dev_printk(qc->dev, KERN_WARNING,
4015 "%u bytes trailing data\n", bytes);
4016
4017 for (i = 0; i < words; i++)
4018 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4019
4020 ap->hsm_task_state = HSM_ST_LAST;
4021 return;
4022 }
4023
4024 sg = &qc->__sg[qc->cursg];
4025
4026 page = sg->page;
4027 offset = sg->offset + qc->cursg_ofs;
4028
4029 /* get the current page and offset */
4030 page = nth_page(page, (offset >> PAGE_SHIFT));
4031 offset %= PAGE_SIZE;
4032
4033 /* don't overrun current sg */
4034 count = min(sg->length - qc->cursg_ofs, bytes);
4035
4036 /* don't cross page boundaries */
4037 count = min(count, (unsigned int)PAGE_SIZE - offset);
4038
4039 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4040
4041 if (PageHighMem(page)) {
4042 unsigned long flags;
4043
4044 /* FIXME: use bounce buffer */
4045 local_irq_save(flags);
4046 buf = kmap_atomic(page, KM_IRQ0);
4047
4048 /* do the actual data transfer */
4049 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4050
4051 kunmap_atomic(buf, KM_IRQ0);
4052 local_irq_restore(flags);
4053 } else {
4054 buf = page_address(page);
4055 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4056 }
4057
4058 bytes -= count;
4059 qc->curbytes += count;
4060 qc->cursg_ofs += count;
4061
4062 if (qc->cursg_ofs == sg->length) {
4063 qc->cursg++;
4064 qc->cursg_ofs = 0;
4065 }
4066
4067 if (bytes)
4068 goto next_sg;
4069}
4070
4071/**
4072 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4073 * @qc: Command on going
4074 *
4075 * Transfer Transfer data from/to the ATAPI device.
4076 *
4077 * LOCKING:
4078 * Inherited from caller.
4079 */
4080
4081static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4082{
4083 struct ata_port *ap = qc->ap;
4084 struct ata_device *dev = qc->dev;
4085 unsigned int ireason, bc_lo, bc_hi, bytes;
4086 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4087
4088 /* Abuse qc->result_tf for temp storage of intermediate TF
4089 * here to save some kernel stack usage.
4090 * For normal completion, qc->result_tf is not relevant. For
4091 * error, qc->result_tf is later overwritten by ata_qc_complete().
4092 * So, the correctness of qc->result_tf is not affected.
4093 */
4094 ap->ops->tf_read(ap, &qc->result_tf);
4095 ireason = qc->result_tf.nsect;
4096 bc_lo = qc->result_tf.lbam;
4097 bc_hi = qc->result_tf.lbah;
4098 bytes = (bc_hi << 8) | bc_lo;
4099
4100 /* shall be cleared to zero, indicating xfer of data */
4101 if (ireason & (1 << 0))
4102 goto err_out;
4103
4104 /* make sure transfer direction matches expected */
4105 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4106 if (do_write != i_write)
4107 goto err_out;
4108
4109 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4110
4111 __atapi_pio_bytes(qc, bytes);
4112
4113 return;
4114
4115err_out:
4116 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4117 qc->err_mask |= AC_ERR_HSM;
4118 ap->hsm_task_state = HSM_ST_ERR;
4119}
4120
4121/**
4122 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4123 * @ap: the target ata_port
4124 * @qc: qc on going
4125 *
4126 * RETURNS:
4127 * 1 if ok in workqueue, 0 otherwise.
4128 */
4129
4130static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4131{
4132 if (qc->tf.flags & ATA_TFLAG_POLLING)
4133 return 1;
4134
4135 if (ap->hsm_task_state == HSM_ST_FIRST) {
4136 if (qc->tf.protocol == ATA_PROT_PIO &&
4137 (qc->tf.flags & ATA_TFLAG_WRITE))
4138 return 1;
4139
4140 if (is_atapi_taskfile(&qc->tf) &&
4141 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4142 return 1;
4143 }
4144
4145 return 0;
4146}
4147
4148/**
4149 * ata_hsm_qc_complete - finish a qc running on standard HSM
4150 * @qc: Command to complete
4151 * @in_wq: 1 if called from workqueue, 0 otherwise
4152 *
4153 * Finish @qc which is running on standard HSM.
4154 *
4155 * LOCKING:
4156 * If @in_wq is zero, spin_lock_irqsave(host lock).
4157 * Otherwise, none on entry and grabs host lock.
4158 */
4159static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4160{
4161 struct ata_port *ap = qc->ap;
4162 unsigned long flags;
4163
4164 if (ap->ops->error_handler) {
4165 if (in_wq) {
4166 spin_lock_irqsave(ap->lock, flags);
4167
4168 /* EH might have kicked in while host lock is
4169 * released.
4170 */
4171 qc = ata_qc_from_tag(ap, qc->tag);
4172 if (qc) {
4173 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4174 ata_irq_on(ap);
4175 ata_qc_complete(qc);
4176 } else
4177 ata_port_freeze(ap);
4178 }
4179
4180 spin_unlock_irqrestore(ap->lock, flags);
4181 } else {
4182 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4183 ata_qc_complete(qc);
4184 else
4185 ata_port_freeze(ap);
4186 }
4187 } else {
4188 if (in_wq) {
4189 spin_lock_irqsave(ap->lock, flags);
4190 ata_irq_on(ap);
4191 ata_qc_complete(qc);
4192 spin_unlock_irqrestore(ap->lock, flags);
4193 } else
4194 ata_qc_complete(qc);
4195 }
4196
4197 ata_altstatus(ap); /* flush */
4198}
4199
4200/**
4201 * ata_hsm_move - move the HSM to the next state.
4202 * @ap: the target ata_port
4203 * @qc: qc on going
4204 * @status: current device status
4205 * @in_wq: 1 if called from workqueue, 0 otherwise
4206 *
4207 * RETURNS:
4208 * 1 when poll next status needed, 0 otherwise.
4209 */
4210int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4211 u8 status, int in_wq)
4212{
4213 unsigned long flags = 0;
4214 int poll_next;
4215
4216 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4217
4218 /* Make sure ata_qc_issue_prot() does not throw things
4219 * like DMA polling into the workqueue. Notice that
4220 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4221 */
4222 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4223
4224fsm_start:
4225 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4226 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4227
4228 switch (ap->hsm_task_state) {
4229 case HSM_ST_FIRST:
4230 /* Send first data block or PACKET CDB */
4231
4232 /* If polling, we will stay in the work queue after
4233 * sending the data. Otherwise, interrupt handler
4234 * takes over after sending the data.
4235 */
4236 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4237
4238 /* check device status */
4239 if (unlikely((status & ATA_DRQ) == 0)) {
4240 /* handle BSY=0, DRQ=0 as error */
4241 if (likely(status & (ATA_ERR | ATA_DF)))
4242 /* device stops HSM for abort/error */
4243 qc->err_mask |= AC_ERR_DEV;
4244 else
4245 /* HSM violation. Let EH handle this */
4246 qc->err_mask |= AC_ERR_HSM;
4247
4248 ap->hsm_task_state = HSM_ST_ERR;
4249 goto fsm_start;
4250 }
4251
4252 /* Device should not ask for data transfer (DRQ=1)
4253 * when it finds something wrong.
4254 * We ignore DRQ here and stop the HSM by
4255 * changing hsm_task_state to HSM_ST_ERR and
4256 * let the EH abort the command or reset the device.
4257 */
4258 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4259 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4260 ap->id, status);
4261 qc->err_mask |= AC_ERR_HSM;
4262 ap->hsm_task_state = HSM_ST_ERR;
4263 goto fsm_start;
4264 }
4265
4266 /* Send the CDB (atapi) or the first data block (ata pio out).
4267 * During the state transition, interrupt handler shouldn't
4268 * be invoked before the data transfer is complete and
4269 * hsm_task_state is changed. Hence, the following locking.
4270 */
4271 if (in_wq)
4272 spin_lock_irqsave(ap->lock, flags);
4273
4274 if (qc->tf.protocol == ATA_PROT_PIO) {
4275 /* PIO data out protocol.
4276 * send first data block.
4277 */
4278
4279 /* ata_pio_sectors() might change the state
4280 * to HSM_ST_LAST. so, the state is changed here
4281 * before ata_pio_sectors().
4282 */
4283 ap->hsm_task_state = HSM_ST;
4284 ata_pio_sectors(qc);
4285 ata_altstatus(ap); /* flush */
4286 } else
4287 /* send CDB */
4288 atapi_send_cdb(ap, qc);
4289
4290 if (in_wq)
4291 spin_unlock_irqrestore(ap->lock, flags);
4292
4293 /* if polling, ata_pio_task() handles the rest.
4294 * otherwise, interrupt handler takes over from here.
4295 */
4296 break;
4297
4298 case HSM_ST:
4299 /* complete command or read/write the data register */
4300 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4301 /* ATAPI PIO protocol */
4302 if ((status & ATA_DRQ) == 0) {
4303 /* No more data to transfer or device error.
4304 * Device error will be tagged in HSM_ST_LAST.
4305 */
4306 ap->hsm_task_state = HSM_ST_LAST;
4307 goto fsm_start;
4308 }
4309
4310 /* Device should not ask for data transfer (DRQ=1)
4311 * when it finds something wrong.
4312 * We ignore DRQ here and stop the HSM by
4313 * changing hsm_task_state to HSM_ST_ERR and
4314 * let the EH abort the command or reset the device.
4315 */
4316 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4317 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4318 ap->id, status);
4319 qc->err_mask |= AC_ERR_HSM;
4320 ap->hsm_task_state = HSM_ST_ERR;
4321 goto fsm_start;
4322 }
4323
4324 atapi_pio_bytes(qc);
4325
4326 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4327 /* bad ireason reported by device */
4328 goto fsm_start;
4329
4330 } else {
4331 /* ATA PIO protocol */
4332 if (unlikely((status & ATA_DRQ) == 0)) {
4333 /* handle BSY=0, DRQ=0 as error */
4334 if (likely(status & (ATA_ERR | ATA_DF)))
4335 /* device stops HSM for abort/error */
4336 qc->err_mask |= AC_ERR_DEV;
4337 else
4338 /* HSM violation. Let EH handle this.
4339 * Phantom devices also trigger this
4340 * condition. Mark hint.
4341 */
4342 qc->err_mask |= AC_ERR_HSM |
4343 AC_ERR_NODEV_HINT;
4344
4345 ap->hsm_task_state = HSM_ST_ERR;
4346 goto fsm_start;
4347 }
4348
4349 /* For PIO reads, some devices may ask for
4350 * data transfer (DRQ=1) alone with ERR=1.
4351 * We respect DRQ here and transfer one
4352 * block of junk data before changing the
4353 * hsm_task_state to HSM_ST_ERR.
4354 *
4355 * For PIO writes, ERR=1 DRQ=1 doesn't make
4356 * sense since the data block has been
4357 * transferred to the device.
4358 */
4359 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4360 /* data might be corrputed */
4361 qc->err_mask |= AC_ERR_DEV;
4362
4363 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4364 ata_pio_sectors(qc);
4365 ata_altstatus(ap);
4366 status = ata_wait_idle(ap);
4367 }
4368
4369 if (status & (ATA_BUSY | ATA_DRQ))
4370 qc->err_mask |= AC_ERR_HSM;
4371
4372 /* ata_pio_sectors() might change the
4373 * state to HSM_ST_LAST. so, the state
4374 * is changed after ata_pio_sectors().
4375 */
4376 ap->hsm_task_state = HSM_ST_ERR;
4377 goto fsm_start;
4378 }
4379
4380 ata_pio_sectors(qc);
4381
4382 if (ap->hsm_task_state == HSM_ST_LAST &&
4383 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4384 /* all data read */
4385 ata_altstatus(ap);
4386 status = ata_wait_idle(ap);
4387 goto fsm_start;
4388 }
4389 }
4390
4391 ata_altstatus(ap); /* flush */
4392 poll_next = 1;
4393 break;
4394
4395 case HSM_ST_LAST:
4396 if (unlikely(!ata_ok(status))) {
4397 qc->err_mask |= __ac_err_mask(status);
4398 ap->hsm_task_state = HSM_ST_ERR;
4399 goto fsm_start;
4400 }
4401
4402 /* no more data to transfer */
4403 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4404 ap->id, qc->dev->devno, status);
4405
4406 WARN_ON(qc->err_mask);
4407
4408 ap->hsm_task_state = HSM_ST_IDLE;
4409
4410 /* complete taskfile transaction */
4411 ata_hsm_qc_complete(qc, in_wq);
4412
4413 poll_next = 0;
4414 break;
4415
4416 case HSM_ST_ERR:
4417 /* make sure qc->err_mask is available to
4418 * know what's wrong and recover
4419 */
4420 WARN_ON(qc->err_mask == 0);
4421
4422 ap->hsm_task_state = HSM_ST_IDLE;
4423
4424 /* complete taskfile transaction */
4425 ata_hsm_qc_complete(qc, in_wq);
4426
4427 poll_next = 0;
4428 break;
4429 default:
4430 poll_next = 0;
4431 BUG();
4432 }
4433
4434 return poll_next;
4435}
4436
4437static void ata_pio_task(void *_data)
4438{
4439 struct ata_queued_cmd *qc = _data;
4440 struct ata_port *ap = qc->ap;
4441 u8 status;
4442 int poll_next;
4443
4444fsm_start:
4445 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4446
4447 /*
4448 * This is purely heuristic. This is a fast path.
4449 * Sometimes when we enter, BSY will be cleared in
4450 * a chk-status or two. If not, the drive is probably seeking
4451 * or something. Snooze for a couple msecs, then
4452 * chk-status again. If still busy, queue delayed work.
4453 */
4454 status = ata_busy_wait(ap, ATA_BUSY, 5);
4455 if (status & ATA_BUSY) {
4456 msleep(2);
4457 status = ata_busy_wait(ap, ATA_BUSY, 10);
4458 if (status & ATA_BUSY) {
4459 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4460 return;
4461 }
4462 }
4463
4464 /* move the HSM */
4465 poll_next = ata_hsm_move(ap, qc, status, 1);
4466
4467 /* another command or interrupt handler
4468 * may be running at this point.
4469 */
4470 if (poll_next)
4471 goto fsm_start;
4472}
4473
4474/**
4475 * ata_qc_new - Request an available ATA command, for queueing
4476 * @ap: Port associated with device @dev
4477 * @dev: Device from whom we request an available command structure
4478 *
4479 * LOCKING:
4480 * None.
4481 */
4482
4483static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4484{
4485 struct ata_queued_cmd *qc = NULL;
4486 unsigned int i;
4487
4488 /* no command while frozen */
4489 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4490 return NULL;
4491
4492 /* the last tag is reserved for internal command. */
4493 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4494 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4495 qc = __ata_qc_from_tag(ap, i);
4496 break;
4497 }
4498
4499 if (qc)
4500 qc->tag = i;
4501
4502 return qc;
4503}
4504
4505/**
4506 * ata_qc_new_init - Request an available ATA command, and initialize it
4507 * @dev: Device from whom we request an available command structure
4508 *
4509 * LOCKING:
4510 * None.
4511 */
4512
4513struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4514{
4515 struct ata_port *ap = dev->ap;
4516 struct ata_queued_cmd *qc;
4517
4518 qc = ata_qc_new(ap);
4519 if (qc) {
4520 qc->scsicmd = NULL;
4521 qc->ap = ap;
4522 qc->dev = dev;
4523
4524 ata_qc_reinit(qc);
4525 }
4526
4527 return qc;
4528}
4529
4530/**
4531 * ata_qc_free - free unused ata_queued_cmd
4532 * @qc: Command to complete
4533 *
4534 * Designed to free unused ata_queued_cmd object
4535 * in case something prevents using it.
4536 *
4537 * LOCKING:
4538 * spin_lock_irqsave(host lock)
4539 */
4540void ata_qc_free(struct ata_queued_cmd *qc)
4541{
4542 struct ata_port *ap = qc->ap;
4543 unsigned int tag;
4544
4545 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4546
4547 qc->flags = 0;
4548 tag = qc->tag;
4549 if (likely(ata_tag_valid(tag))) {
4550 qc->tag = ATA_TAG_POISON;
4551 clear_bit(tag, &ap->qc_allocated);
4552 }
4553}
4554
4555void __ata_qc_complete(struct ata_queued_cmd *qc)
4556{
4557 struct ata_port *ap = qc->ap;
4558
4559 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4560 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4561
4562 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4563 ata_sg_clean(qc);
4564
4565 /* command should be marked inactive atomically with qc completion */
4566 if (qc->tf.protocol == ATA_PROT_NCQ)
4567 ap->sactive &= ~(1 << qc->tag);
4568 else
4569 ap->active_tag = ATA_TAG_POISON;
4570
4571 /* atapi: mark qc as inactive to prevent the interrupt handler
4572 * from completing the command twice later, before the error handler
4573 * is called. (when rc != 0 and atapi request sense is needed)
4574 */
4575 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4576 ap->qc_active &= ~(1 << qc->tag);
4577
4578 /* call completion callback */
4579 qc->complete_fn(qc);
4580}
4581
4582static void fill_result_tf(struct ata_queued_cmd *qc)
4583{
4584 struct ata_port *ap = qc->ap;
4585
4586 ap->ops->tf_read(ap, &qc->result_tf);
4587 qc->result_tf.flags = qc->tf.flags;
4588}
4589
4590/**
4591 * ata_qc_complete - Complete an active ATA command
4592 * @qc: Command to complete
4593 * @err_mask: ATA Status register contents
4594 *
4595 * Indicate to the mid and upper layers that an ATA
4596 * command has completed, with either an ok or not-ok status.
4597 *
4598 * LOCKING:
4599 * spin_lock_irqsave(host lock)
4600 */
4601void ata_qc_complete(struct ata_queued_cmd *qc)
4602{
4603 struct ata_port *ap = qc->ap;
4604
4605 /* XXX: New EH and old EH use different mechanisms to
4606 * synchronize EH with regular execution path.
4607 *
4608 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4609 * Normal execution path is responsible for not accessing a
4610 * failed qc. libata core enforces the rule by returning NULL
4611 * from ata_qc_from_tag() for failed qcs.
4612 *
4613 * Old EH depends on ata_qc_complete() nullifying completion
4614 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4615 * not synchronize with interrupt handler. Only PIO task is
4616 * taken care of.
4617 */
4618 if (ap->ops->error_handler) {
4619 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4620
4621 if (unlikely(qc->err_mask))
4622 qc->flags |= ATA_QCFLAG_FAILED;
4623
4624 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4625 if (!ata_tag_internal(qc->tag)) {
4626 /* always fill result TF for failed qc */
4627 fill_result_tf(qc);
4628 ata_qc_schedule_eh(qc);
4629 return;
4630 }
4631 }
4632
4633 /* read result TF if requested */
4634 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4635 fill_result_tf(qc);
4636
4637 __ata_qc_complete(qc);
4638 } else {
4639 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4640 return;
4641
4642 /* read result TF if failed or requested */
4643 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4644 fill_result_tf(qc);
4645
4646 __ata_qc_complete(qc);
4647 }
4648}
4649
4650/**
4651 * ata_qc_complete_multiple - Complete multiple qcs successfully
4652 * @ap: port in question
4653 * @qc_active: new qc_active mask
4654 * @finish_qc: LLDD callback invoked before completing a qc
4655 *
4656 * Complete in-flight commands. This functions is meant to be
4657 * called from low-level driver's interrupt routine to complete
4658 * requests normally. ap->qc_active and @qc_active is compared
4659 * and commands are completed accordingly.
4660 *
4661 * LOCKING:
4662 * spin_lock_irqsave(host lock)
4663 *
4664 * RETURNS:
4665 * Number of completed commands on success, -errno otherwise.
4666 */
4667int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4668 void (*finish_qc)(struct ata_queued_cmd *))
4669{
4670 int nr_done = 0;
4671 u32 done_mask;
4672 int i;
4673
4674 done_mask = ap->qc_active ^ qc_active;
4675
4676 if (unlikely(done_mask & qc_active)) {
4677 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4678 "(%08x->%08x)\n", ap->qc_active, qc_active);
4679 return -EINVAL;
4680 }
4681
4682 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4683 struct ata_queued_cmd *qc;
4684
4685 if (!(done_mask & (1 << i)))
4686 continue;
4687
4688 if ((qc = ata_qc_from_tag(ap, i))) {
4689 if (finish_qc)
4690 finish_qc(qc);
4691 ata_qc_complete(qc);
4692 nr_done++;
4693 }
4694 }
4695
4696 return nr_done;
4697}
4698
4699static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4700{
4701 struct ata_port *ap = qc->ap;
4702
4703 switch (qc->tf.protocol) {
4704 case ATA_PROT_NCQ:
4705 case ATA_PROT_DMA:
4706 case ATA_PROT_ATAPI_DMA:
4707 return 1;
4708
4709 case ATA_PROT_ATAPI:
4710 case ATA_PROT_PIO:
4711 if (ap->flags & ATA_FLAG_PIO_DMA)
4712 return 1;
4713
4714 /* fall through */
4715
4716 default:
4717 return 0;
4718 }
4719
4720 /* never reached */
4721}
4722
4723/**
4724 * ata_qc_issue - issue taskfile to device
4725 * @qc: command to issue to device
4726 *
4727 * Prepare an ATA command to submission to device.
4728 * This includes mapping the data into a DMA-able
4729 * area, filling in the S/G table, and finally
4730 * writing the taskfile to hardware, starting the command.
4731 *
4732 * LOCKING:
4733 * spin_lock_irqsave(host lock)
4734 */
4735void ata_qc_issue(struct ata_queued_cmd *qc)
4736{
4737 struct ata_port *ap = qc->ap;
4738
4739 /* Make sure only one non-NCQ command is outstanding. The
4740 * check is skipped for old EH because it reuses active qc to
4741 * request ATAPI sense.
4742 */
4743 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4744
4745 if (qc->tf.protocol == ATA_PROT_NCQ) {
4746 WARN_ON(ap->sactive & (1 << qc->tag));
4747 ap->sactive |= 1 << qc->tag;
4748 } else {
4749 WARN_ON(ap->sactive);
4750 ap->active_tag = qc->tag;
4751 }
4752
4753 qc->flags |= ATA_QCFLAG_ACTIVE;
4754 ap->qc_active |= 1 << qc->tag;
4755
4756 if (ata_should_dma_map(qc)) {
4757 if (qc->flags & ATA_QCFLAG_SG) {
4758 if (ata_sg_setup(qc))
4759 goto sg_err;
4760 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4761 if (ata_sg_setup_one(qc))
4762 goto sg_err;
4763 }
4764 } else {
4765 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4766 }
4767
4768 ap->ops->qc_prep(qc);
4769
4770 qc->err_mask |= ap->ops->qc_issue(qc);
4771 if (unlikely(qc->err_mask))
4772 goto err;
4773 return;
4774
4775sg_err:
4776 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4777 qc->err_mask |= AC_ERR_SYSTEM;
4778err:
4779 ata_qc_complete(qc);
4780}
4781
4782/**
4783 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4784 * @qc: command to issue to device
4785 *
4786 * Using various libata functions and hooks, this function
4787 * starts an ATA command. ATA commands are grouped into
4788 * classes called "protocols", and issuing each type of protocol
4789 * is slightly different.
4790 *
4791 * May be used as the qc_issue() entry in ata_port_operations.
4792 *
4793 * LOCKING:
4794 * spin_lock_irqsave(host lock)
4795 *
4796 * RETURNS:
4797 * Zero on success, AC_ERR_* mask on failure
4798 */
4799
4800unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4801{
4802 struct ata_port *ap = qc->ap;
4803
4804 /* Use polling pio if the LLD doesn't handle
4805 * interrupt driven pio and atapi CDB interrupt.
4806 */
4807 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4808 switch (qc->tf.protocol) {
4809 case ATA_PROT_PIO:
4810 case ATA_PROT_ATAPI:
4811 case ATA_PROT_ATAPI_NODATA:
4812 qc->tf.flags |= ATA_TFLAG_POLLING;
4813 break;
4814 case ATA_PROT_ATAPI_DMA:
4815 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4816 /* see ata_dma_blacklisted() */
4817 BUG();
4818 break;
4819 default:
4820 break;
4821 }
4822 }
4823
4824 /* Some controllers show flaky interrupt behavior after
4825 * setting xfer mode. Use polling instead.
4826 */
4827 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4828 qc->tf.feature == SETFEATURES_XFER) &&
4829 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4830 qc->tf.flags |= ATA_TFLAG_POLLING;
4831
4832 /* select the device */
4833 ata_dev_select(ap, qc->dev->devno, 1, 0);
4834
4835 /* start the command */
4836 switch (qc->tf.protocol) {
4837 case ATA_PROT_NODATA:
4838 if (qc->tf.flags & ATA_TFLAG_POLLING)
4839 ata_qc_set_polling(qc);
4840
4841 ata_tf_to_host(ap, &qc->tf);
4842 ap->hsm_task_state = HSM_ST_LAST;
4843
4844 if (qc->tf.flags & ATA_TFLAG_POLLING)
4845 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4846
4847 break;
4848
4849 case ATA_PROT_DMA:
4850 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4851
4852 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4853 ap->ops->bmdma_setup(qc); /* set up bmdma */
4854 ap->ops->bmdma_start(qc); /* initiate bmdma */
4855 ap->hsm_task_state = HSM_ST_LAST;
4856 break;
4857
4858 case ATA_PROT_PIO:
4859 if (qc->tf.flags & ATA_TFLAG_POLLING)
4860 ata_qc_set_polling(qc);
4861
4862 ata_tf_to_host(ap, &qc->tf);
4863
4864 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4865 /* PIO data out protocol */
4866 ap->hsm_task_state = HSM_ST_FIRST;
4867 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4868
4869 /* always send first data block using
4870 * the ata_pio_task() codepath.
4871 */
4872 } else {
4873 /* PIO data in protocol */
4874 ap->hsm_task_state = HSM_ST;
4875
4876 if (qc->tf.flags & ATA_TFLAG_POLLING)
4877 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4878
4879 /* if polling, ata_pio_task() handles the rest.
4880 * otherwise, interrupt handler takes over from here.
4881 */
4882 }
4883
4884 break;
4885
4886 case ATA_PROT_ATAPI:
4887 case ATA_PROT_ATAPI_NODATA:
4888 if (qc->tf.flags & ATA_TFLAG_POLLING)
4889 ata_qc_set_polling(qc);
4890
4891 ata_tf_to_host(ap, &qc->tf);
4892
4893 ap->hsm_task_state = HSM_ST_FIRST;
4894
4895 /* send cdb by polling if no cdb interrupt */
4896 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4897 (qc->tf.flags & ATA_TFLAG_POLLING))
4898 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4899 break;
4900
4901 case ATA_PROT_ATAPI_DMA:
4902 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4903
4904 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4905 ap->ops->bmdma_setup(qc); /* set up bmdma */
4906 ap->hsm_task_state = HSM_ST_FIRST;
4907
4908 /* send cdb by polling if no cdb interrupt */
4909 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4910 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4911 break;
4912
4913 default:
4914 WARN_ON(1);
4915 return AC_ERR_SYSTEM;
4916 }
4917
4918 return 0;
4919}
4920
4921/**
4922 * ata_host_intr - Handle host interrupt for given (port, task)
4923 * @ap: Port on which interrupt arrived (possibly...)
4924 * @qc: Taskfile currently active in engine
4925 *
4926 * Handle host interrupt for given queued command. Currently,
4927 * only DMA interrupts are handled. All other commands are
4928 * handled via polling with interrupts disabled (nIEN bit).
4929 *
4930 * LOCKING:
4931 * spin_lock_irqsave(host lock)
4932 *
4933 * RETURNS:
4934 * One if interrupt was handled, zero if not (shared irq).
4935 */
4936
4937inline unsigned int ata_host_intr (struct ata_port *ap,
4938 struct ata_queued_cmd *qc)
4939{
4940 u8 status, host_stat = 0;
4941
4942 VPRINTK("ata%u: protocol %d task_state %d\n",
4943 ap->id, qc->tf.protocol, ap->hsm_task_state);
4944
4945 /* Check whether we are expecting interrupt in this state */
4946 switch (ap->hsm_task_state) {
4947 case HSM_ST_FIRST:
4948 /* Some pre-ATAPI-4 devices assert INTRQ
4949 * at this state when ready to receive CDB.
4950 */
4951
4952 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4953 * The flag was turned on only for atapi devices.
4954 * No need to check is_atapi_taskfile(&qc->tf) again.
4955 */
4956 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4957 goto idle_irq;
4958 break;
4959 case HSM_ST_LAST:
4960 if (qc->tf.protocol == ATA_PROT_DMA ||
4961 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4962 /* check status of DMA engine */
4963 host_stat = ap->ops->bmdma_status(ap);
4964 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4965
4966 /* if it's not our irq... */
4967 if (!(host_stat & ATA_DMA_INTR))
4968 goto idle_irq;
4969
4970 /* before we do anything else, clear DMA-Start bit */
4971 ap->ops->bmdma_stop(qc);
4972
4973 if (unlikely(host_stat & ATA_DMA_ERR)) {
4974 /* error when transfering data to/from memory */
4975 qc->err_mask |= AC_ERR_HOST_BUS;
4976 ap->hsm_task_state = HSM_ST_ERR;
4977 }
4978 }
4979 break;
4980 case HSM_ST:
4981 break;
4982 default:
4983 goto idle_irq;
4984 }
4985
4986 /* check altstatus */
4987 status = ata_altstatus(ap);
4988 if (status & ATA_BUSY)
4989 goto idle_irq;
4990
4991 /* check main status, clearing INTRQ */
4992 status = ata_chk_status(ap);
4993 if (unlikely(status & ATA_BUSY))
4994 goto idle_irq;
4995
4996 /* ack bmdma irq events */
4997 ap->ops->irq_clear(ap);
4998
4999 ata_hsm_move(ap, qc, status, 0);
5000 return 1; /* irq handled */
5001
5002idle_irq:
5003 ap->stats.idle_irq++;
5004
5005#ifdef ATA_IRQ_TRAP
5006 if ((ap->stats.idle_irq % 1000) == 0) {
5007 ata_irq_ack(ap, 0); /* debug trap */
5008 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5009 return 1;
5010 }
5011#endif
5012 return 0; /* irq not handled */
5013}
5014
5015/**
5016 * ata_interrupt - Default ATA host interrupt handler
5017 * @irq: irq line (unused)
5018 * @dev_instance: pointer to our ata_host information structure
5019 *
5020 * Default interrupt handler for PCI IDE devices. Calls
5021 * ata_host_intr() for each port that is not disabled.
5022 *
5023 * LOCKING:
5024 * Obtains host lock during operation.
5025 *
5026 * RETURNS:
5027 * IRQ_NONE or IRQ_HANDLED.
5028 */
5029
5030irqreturn_t ata_interrupt (int irq, void *dev_instance)
5031{
5032 struct ata_host *host = dev_instance;
5033 unsigned int i;
5034 unsigned int handled = 0;
5035 unsigned long flags;
5036
5037 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5038 spin_lock_irqsave(&host->lock, flags);
5039
5040 for (i = 0; i < host->n_ports; i++) {
5041 struct ata_port *ap;
5042
5043 ap = host->ports[i];
5044 if (ap &&
5045 !(ap->flags & ATA_FLAG_DISABLED)) {
5046 struct ata_queued_cmd *qc;
5047
5048 qc = ata_qc_from_tag(ap, ap->active_tag);
5049 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5050 (qc->flags & ATA_QCFLAG_ACTIVE))
5051 handled |= ata_host_intr(ap, qc);
5052 }
5053 }
5054
5055 spin_unlock_irqrestore(&host->lock, flags);
5056
5057 return IRQ_RETVAL(handled);
5058}
5059
5060/**
5061 * sata_scr_valid - test whether SCRs are accessible
5062 * @ap: ATA port to test SCR accessibility for
5063 *
5064 * Test whether SCRs are accessible for @ap.
5065 *
5066 * LOCKING:
5067 * None.
5068 *
5069 * RETURNS:
5070 * 1 if SCRs are accessible, 0 otherwise.
5071 */
5072int sata_scr_valid(struct ata_port *ap)
5073{
5074 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5075}
5076
5077/**
5078 * sata_scr_read - read SCR register of the specified port
5079 * @ap: ATA port to read SCR for
5080 * @reg: SCR to read
5081 * @val: Place to store read value
5082 *
5083 * Read SCR register @reg of @ap into *@val. This function is
5084 * guaranteed to succeed if the cable type of the port is SATA
5085 * and the port implements ->scr_read.
5086 *
5087 * LOCKING:
5088 * None.
5089 *
5090 * RETURNS:
5091 * 0 on success, negative errno on failure.
5092 */
5093int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5094{
5095 if (sata_scr_valid(ap)) {
5096 *val = ap->ops->scr_read(ap, reg);
5097 return 0;
5098 }
5099 return -EOPNOTSUPP;
5100}
5101
5102/**
5103 * sata_scr_write - write SCR register of the specified port
5104 * @ap: ATA port to write SCR for
5105 * @reg: SCR to write
5106 * @val: value to write
5107 *
5108 * Write @val to SCR register @reg of @ap. This function is
5109 * guaranteed to succeed if the cable type of the port is SATA
5110 * and the port implements ->scr_read.
5111 *
5112 * LOCKING:
5113 * None.
5114 *
5115 * RETURNS:
5116 * 0 on success, negative errno on failure.
5117 */
5118int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5119{
5120 if (sata_scr_valid(ap)) {
5121 ap->ops->scr_write(ap, reg, val);
5122 return 0;
5123 }
5124 return -EOPNOTSUPP;
5125}
5126
5127/**
5128 * sata_scr_write_flush - write SCR register of the specified port and flush
5129 * @ap: ATA port to write SCR for
5130 * @reg: SCR to write
5131 * @val: value to write
5132 *
5133 * This function is identical to sata_scr_write() except that this
5134 * function performs flush after writing to the register.
5135 *
5136 * LOCKING:
5137 * None.
5138 *
5139 * RETURNS:
5140 * 0 on success, negative errno on failure.
5141 */
5142int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5143{
5144 if (sata_scr_valid(ap)) {
5145 ap->ops->scr_write(ap, reg, val);
5146 ap->ops->scr_read(ap, reg);
5147 return 0;
5148 }
5149 return -EOPNOTSUPP;
5150}
5151
5152/**
5153 * ata_port_online - test whether the given port is online
5154 * @ap: ATA port to test
5155 *
5156 * Test whether @ap is online. Note that this function returns 0
5157 * if online status of @ap cannot be obtained, so
5158 * ata_port_online(ap) != !ata_port_offline(ap).
5159 *
5160 * LOCKING:
5161 * None.
5162 *
5163 * RETURNS:
5164 * 1 if the port online status is available and online.
5165 */
5166int ata_port_online(struct ata_port *ap)
5167{
5168 u32 sstatus;
5169
5170 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5171 return 1;
5172 return 0;
5173}
5174
5175/**
5176 * ata_port_offline - test whether the given port is offline
5177 * @ap: ATA port to test
5178 *
5179 * Test whether @ap is offline. Note that this function returns
5180 * 0 if offline status of @ap cannot be obtained, so
5181 * ata_port_online(ap) != !ata_port_offline(ap).
5182 *
5183 * LOCKING:
5184 * None.
5185 *
5186 * RETURNS:
5187 * 1 if the port offline status is available and offline.
5188 */
5189int ata_port_offline(struct ata_port *ap)
5190{
5191 u32 sstatus;
5192
5193 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5194 return 1;
5195 return 0;
5196}
5197
5198int ata_flush_cache(struct ata_device *dev)
5199{
5200 unsigned int err_mask;
5201 u8 cmd;
5202
5203 if (!ata_try_flush_cache(dev))
5204 return 0;
5205
5206 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5207 cmd = ATA_CMD_FLUSH_EXT;
5208 else
5209 cmd = ATA_CMD_FLUSH;
5210
5211 err_mask = ata_do_simple_cmd(dev, cmd);
5212 if (err_mask) {
5213 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5214 return -EIO;
5215 }
5216
5217 return 0;
5218}
5219
5220static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5221 unsigned int action, unsigned int ehi_flags,
5222 int wait)
5223{
5224 unsigned long flags;
5225 int i, rc;
5226
5227 for (i = 0; i < host->n_ports; i++) {
5228 struct ata_port *ap = host->ports[i];
5229
5230 /* Previous resume operation might still be in
5231 * progress. Wait for PM_PENDING to clear.
5232 */
5233 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5234 ata_port_wait_eh(ap);
5235 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5236 }
5237
5238 /* request PM ops to EH */
5239 spin_lock_irqsave(ap->lock, flags);
5240
5241 ap->pm_mesg = mesg;
5242 if (wait) {
5243 rc = 0;
5244 ap->pm_result = &rc;
5245 }
5246
5247 ap->pflags |= ATA_PFLAG_PM_PENDING;
5248 ap->eh_info.action |= action;
5249 ap->eh_info.flags |= ehi_flags;
5250
5251 ata_port_schedule_eh(ap);
5252
5253 spin_unlock_irqrestore(ap->lock, flags);
5254
5255 /* wait and check result */
5256 if (wait) {
5257 ata_port_wait_eh(ap);
5258 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5259 if (rc)
5260 return rc;
5261 }
5262 }
5263
5264 return 0;
5265}
5266
5267/**
5268 * ata_host_suspend - suspend host
5269 * @host: host to suspend
5270 * @mesg: PM message
5271 *
5272 * Suspend @host. Actual operation is performed by EH. This
5273 * function requests EH to perform PM operations and waits for EH
5274 * to finish.
5275 *
5276 * LOCKING:
5277 * Kernel thread context (may sleep).
5278 *
5279 * RETURNS:
5280 * 0 on success, -errno on failure.
5281 */
5282int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5283{
5284 int i, j, rc;
5285
5286 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5287 if (rc)
5288 goto fail;
5289
5290 /* EH is quiescent now. Fail if we have any ready device.
5291 * This happens if hotplug occurs between completion of device
5292 * suspension and here.
5293 */
5294 for (i = 0; i < host->n_ports; i++) {
5295 struct ata_port *ap = host->ports[i];
5296
5297 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5298 struct ata_device *dev = &ap->device[j];
5299
5300 if (ata_dev_ready(dev)) {
5301 ata_port_printk(ap, KERN_WARNING,
5302 "suspend failed, device %d "
5303 "still active\n", dev->devno);
5304 rc = -EBUSY;
5305 goto fail;
5306 }
5307 }
5308 }
5309
5310 host->dev->power.power_state = mesg;
5311 return 0;
5312
5313 fail:
5314 ata_host_resume(host);
5315 return rc;
5316}
5317
5318/**
5319 * ata_host_resume - resume host
5320 * @host: host to resume
5321 *
5322 * Resume @host. Actual operation is performed by EH. This
5323 * function requests EH to perform PM operations and returns.
5324 * Note that all resume operations are performed parallely.
5325 *
5326 * LOCKING:
5327 * Kernel thread context (may sleep).
5328 */
5329void ata_host_resume(struct ata_host *host)
5330{
5331 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5332 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5333 host->dev->power.power_state = PMSG_ON;
5334}
5335
5336/**
5337 * ata_port_start - Set port up for dma.
5338 * @ap: Port to initialize
5339 *
5340 * Called just after data structures for each port are
5341 * initialized. Allocates space for PRD table.
5342 *
5343 * May be used as the port_start() entry in ata_port_operations.
5344 *
5345 * LOCKING:
5346 * Inherited from caller.
5347 */
5348
5349int ata_port_start (struct ata_port *ap)
5350{
5351 struct device *dev = ap->dev;
5352 int rc;
5353
5354 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5355 if (!ap->prd)
5356 return -ENOMEM;
5357
5358 rc = ata_pad_alloc(ap, dev);
5359 if (rc) {
5360 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5361 return rc;
5362 }
5363
5364 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5365
5366 return 0;
5367}
5368
5369
5370/**
5371 * ata_port_stop - Undo ata_port_start()
5372 * @ap: Port to shut down
5373 *
5374 * Frees the PRD table.
5375 *
5376 * May be used as the port_stop() entry in ata_port_operations.
5377 *
5378 * LOCKING:
5379 * Inherited from caller.
5380 */
5381
5382void ata_port_stop (struct ata_port *ap)
5383{
5384 struct device *dev = ap->dev;
5385
5386 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5387 ata_pad_free(ap, dev);
5388}
5389
5390void ata_host_stop (struct ata_host *host)
5391{
5392 if (host->mmio_base)
5393 iounmap(host->mmio_base);
5394}
5395
5396/**
5397 * ata_dev_init - Initialize an ata_device structure
5398 * @dev: Device structure to initialize
5399 *
5400 * Initialize @dev in preparation for probing.
5401 *
5402 * LOCKING:
5403 * Inherited from caller.
5404 */
5405void ata_dev_init(struct ata_device *dev)
5406{
5407 struct ata_port *ap = dev->ap;
5408 unsigned long flags;
5409
5410 /* SATA spd limit is bound to the first device */
5411 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5412
5413 /* High bits of dev->flags are used to record warm plug
5414 * requests which occur asynchronously. Synchronize using
5415 * host lock.
5416 */
5417 spin_lock_irqsave(ap->lock, flags);
5418 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5419 spin_unlock_irqrestore(ap->lock, flags);
5420
5421 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5422 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5423 dev->pio_mask = UINT_MAX;
5424 dev->mwdma_mask = UINT_MAX;
5425 dev->udma_mask = UINT_MAX;
5426}
5427
5428/**
5429 * ata_port_init - Initialize an ata_port structure
5430 * @ap: Structure to initialize
5431 * @host: Collection of hosts to which @ap belongs
5432 * @ent: Probe information provided by low-level driver
5433 * @port_no: Port number associated with this ata_port
5434 *
5435 * Initialize a new ata_port structure.
5436 *
5437 * LOCKING:
5438 * Inherited from caller.
5439 */
5440void ata_port_init(struct ata_port *ap, struct ata_host *host,
5441 const struct ata_probe_ent *ent, unsigned int port_no)
5442{
5443 unsigned int i;
5444
5445 ap->lock = &host->lock;
5446 ap->flags = ATA_FLAG_DISABLED;
5447 ap->id = ata_unique_id++;
5448 ap->ctl = ATA_DEVCTL_OBS;
5449 ap->host = host;
5450 ap->dev = ent->dev;
5451 ap->port_no = port_no;
5452 if (port_no == 1 && ent->pinfo2) {
5453 ap->pio_mask = ent->pinfo2->pio_mask;
5454 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5455 ap->udma_mask = ent->pinfo2->udma_mask;
5456 ap->flags |= ent->pinfo2->flags;
5457 ap->ops = ent->pinfo2->port_ops;
5458 } else {
5459 ap->pio_mask = ent->pio_mask;
5460 ap->mwdma_mask = ent->mwdma_mask;
5461 ap->udma_mask = ent->udma_mask;
5462 ap->flags |= ent->port_flags;
5463 ap->ops = ent->port_ops;
5464 }
5465 ap->hw_sata_spd_limit = UINT_MAX;
5466 ap->active_tag = ATA_TAG_POISON;
5467 ap->last_ctl = 0xFF;
5468
5469#if defined(ATA_VERBOSE_DEBUG)
5470 /* turn on all debugging levels */
5471 ap->msg_enable = 0x00FF;
5472#elif defined(ATA_DEBUG)
5473 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5474#else
5475 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5476#endif
5477
5478 INIT_WORK(&ap->port_task, NULL, NULL);
5479 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5480 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5481 INIT_LIST_HEAD(&ap->eh_done_q);
5482 init_waitqueue_head(&ap->eh_wait_q);
5483
5484 /* set cable type */
5485 ap->cbl = ATA_CBL_NONE;
5486 if (ap->flags & ATA_FLAG_SATA)
5487 ap->cbl = ATA_CBL_SATA;
5488
5489 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5490 struct ata_device *dev = &ap->device[i];
5491 dev->ap = ap;
5492 dev->devno = i;
5493 ata_dev_init(dev);
5494 }
5495
5496#ifdef ATA_IRQ_TRAP
5497 ap->stats.unhandled_irq = 1;
5498 ap->stats.idle_irq = 1;
5499#endif
5500
5501 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5502}
5503
5504/**
5505 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5506 * @ap: ATA port to initialize SCSI host for
5507 * @shost: SCSI host associated with @ap
5508 *
5509 * Initialize SCSI host @shost associated with ATA port @ap.
5510 *
5511 * LOCKING:
5512 * Inherited from caller.
5513 */
5514static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5515{
5516 ap->scsi_host = shost;
5517
5518 shost->unique_id = ap->id;
5519 shost->max_id = 16;
5520 shost->max_lun = 1;
5521 shost->max_channel = 1;
5522 shost->max_cmd_len = 12;
5523}
5524
5525/**
5526 * ata_port_add - Attach low-level ATA driver to system
5527 * @ent: Information provided by low-level driver
5528 * @host: Collections of ports to which we add
5529 * @port_no: Port number associated with this host
5530 *
5531 * Attach low-level ATA driver to system.
5532 *
5533 * LOCKING:
5534 * PCI/etc. bus probe sem.
5535 *
5536 * RETURNS:
5537 * New ata_port on success, for NULL on error.
5538 */
5539static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5540 struct ata_host *host,
5541 unsigned int port_no)
5542{
5543 struct Scsi_Host *shost;
5544 struct ata_port *ap;
5545
5546 DPRINTK("ENTER\n");
5547
5548 if (!ent->port_ops->error_handler &&
5549 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5550 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5551 port_no);
5552 return NULL;
5553 }
5554
5555 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5556 if (!shost)
5557 return NULL;
5558
5559 shost->transportt = &ata_scsi_transport_template;
5560
5561 ap = ata_shost_to_port(shost);
5562
5563 ata_port_init(ap, host, ent, port_no);
5564 ata_port_init_shost(ap, shost);
5565
5566 return ap;
5567}
5568
5569/**
5570 * ata_sas_host_init - Initialize a host struct
5571 * @host: host to initialize
5572 * @dev: device host is attached to
5573 * @flags: host flags
5574 * @ops: port_ops
5575 *
5576 * LOCKING:
5577 * PCI/etc. bus probe sem.
5578 *
5579 */
5580
5581void ata_host_init(struct ata_host *host, struct device *dev,
5582 unsigned long flags, const struct ata_port_operations *ops)
5583{
5584 spin_lock_init(&host->lock);
5585 host->dev = dev;
5586 host->flags = flags;
5587 host->ops = ops;
5588}
5589
5590/**
5591 * ata_device_add - Register hardware device with ATA and SCSI layers
5592 * @ent: Probe information describing hardware device to be registered
5593 *
5594 * This function processes the information provided in the probe
5595 * information struct @ent, allocates the necessary ATA and SCSI
5596 * host information structures, initializes them, and registers
5597 * everything with requisite kernel subsystems.
5598 *
5599 * This function requests irqs, probes the ATA bus, and probes
5600 * the SCSI bus.
5601 *
5602 * LOCKING:
5603 * PCI/etc. bus probe sem.
5604 *
5605 * RETURNS:
5606 * Number of ports registered. Zero on error (no ports registered).
5607 */
5608int ata_device_add(const struct ata_probe_ent *ent)
5609{
5610 unsigned int i;
5611 struct device *dev = ent->dev;
5612 struct ata_host *host;
5613 int rc;
5614
5615 DPRINTK("ENTER\n");
5616
5617 if (ent->irq == 0) {
5618 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5619 return 0;
5620 }
5621 /* alloc a container for our list of ATA ports (buses) */
5622 host = kzalloc(sizeof(struct ata_host) +
5623 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5624 if (!host)
5625 return 0;
5626
5627 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5628 host->n_ports = ent->n_ports;
5629 host->irq = ent->irq;
5630 host->irq2 = ent->irq2;
5631 host->mmio_base = ent->mmio_base;
5632 host->private_data = ent->private_data;
5633
5634 /* register each port bound to this device */
5635 for (i = 0; i < host->n_ports; i++) {
5636 struct ata_port *ap;
5637 unsigned long xfer_mode_mask;
5638 int irq_line = ent->irq;
5639
5640 ap = ata_port_add(ent, host, i);
5641 host->ports[i] = ap;
5642 if (!ap)
5643 goto err_out;
5644
5645 /* dummy? */
5646 if (ent->dummy_port_mask & (1 << i)) {
5647 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5648 ap->ops = &ata_dummy_port_ops;
5649 continue;
5650 }
5651
5652 /* start port */
5653 rc = ap->ops->port_start(ap);
5654 if (rc) {
5655 host->ports[i] = NULL;
5656 scsi_host_put(ap->scsi_host);
5657 goto err_out;
5658 }
5659
5660 /* Report the secondary IRQ for second channel legacy */
5661 if (i == 1 && ent->irq2)
5662 irq_line = ent->irq2;
5663
5664 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5665 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5666 (ap->pio_mask << ATA_SHIFT_PIO);
5667
5668 /* print per-port info to dmesg */
5669 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5670 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5671 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5672 ata_mode_string(xfer_mode_mask),
5673 ap->ioaddr.cmd_addr,
5674 ap->ioaddr.ctl_addr,
5675 ap->ioaddr.bmdma_addr,
5676 irq_line);
5677
5678 ata_chk_status(ap);
5679 host->ops->irq_clear(ap);
5680 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5681 }
5682
5683 /* obtain irq, that may be shared between channels */
5684 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5685 DRV_NAME, host);
5686 if (rc) {
5687 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5688 ent->irq, rc);
5689 goto err_out;
5690 }
5691
5692 /* do we have a second IRQ for the other channel, eg legacy mode */
5693 if (ent->irq2) {
5694 /* We will get weird core code crashes later if this is true
5695 so trap it now */
5696 BUG_ON(ent->irq == ent->irq2);
5697
5698 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5699 DRV_NAME, host);
5700 if (rc) {
5701 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5702 ent->irq2, rc);
5703 goto err_out_free_irq;
5704 }
5705 }
5706
5707 /* perform each probe synchronously */
5708 DPRINTK("probe begin\n");
5709 for (i = 0; i < host->n_ports; i++) {
5710 struct ata_port *ap = host->ports[i];
5711 u32 scontrol;
5712 int rc;
5713
5714 /* init sata_spd_limit to the current value */
5715 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5716 int spd = (scontrol >> 4) & 0xf;
5717 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5718 }
5719 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5720
5721 rc = scsi_add_host(ap->scsi_host, dev);
5722 if (rc) {
5723 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5724 /* FIXME: do something useful here */
5725 /* FIXME: handle unconditional calls to
5726 * scsi_scan_host and ata_host_remove, below,
5727 * at the very least
5728 */
5729 }
5730
5731 if (ap->ops->error_handler) {
5732 struct ata_eh_info *ehi = &ap->eh_info;
5733 unsigned long flags;
5734
5735 ata_port_probe(ap);
5736
5737 /* kick EH for boot probing */
5738 spin_lock_irqsave(ap->lock, flags);
5739
5740 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5741 ehi->action |= ATA_EH_SOFTRESET;
5742 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5743
5744 ap->pflags |= ATA_PFLAG_LOADING;
5745 ata_port_schedule_eh(ap);
5746
5747 spin_unlock_irqrestore(ap->lock, flags);
5748
5749 /* wait for EH to finish */
5750 ata_port_wait_eh(ap);
5751 } else {
5752 DPRINTK("ata%u: bus probe begin\n", ap->id);
5753 rc = ata_bus_probe(ap);
5754 DPRINTK("ata%u: bus probe end\n", ap->id);
5755
5756 if (rc) {
5757 /* FIXME: do something useful here?
5758 * Current libata behavior will
5759 * tear down everything when
5760 * the module is removed
5761 * or the h/w is unplugged.
5762 */
5763 }
5764 }
5765 }
5766
5767 /* probes are done, now scan each port's disk(s) */
5768 DPRINTK("host probe begin\n");
5769 for (i = 0; i < host->n_ports; i++) {
5770 struct ata_port *ap = host->ports[i];
5771
5772 ata_scsi_scan_host(ap);
5773 }
5774
5775 dev_set_drvdata(dev, host);
5776
5777 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5778 return ent->n_ports; /* success */
5779
5780err_out_free_irq:
5781 free_irq(ent->irq, host);
5782err_out:
5783 for (i = 0; i < host->n_ports; i++) {
5784 struct ata_port *ap = host->ports[i];
5785 if (ap) {
5786 ap->ops->port_stop(ap);
5787 scsi_host_put(ap->scsi_host);
5788 }
5789 }
5790
5791 kfree(host);
5792 VPRINTK("EXIT, returning 0\n");
5793 return 0;
5794}
5795
5796/**
5797 * ata_port_detach - Detach ATA port in prepration of device removal
5798 * @ap: ATA port to be detached
5799 *
5800 * Detach all ATA devices and the associated SCSI devices of @ap;
5801 * then, remove the associated SCSI host. @ap is guaranteed to
5802 * be quiescent on return from this function.
5803 *
5804 * LOCKING:
5805 * Kernel thread context (may sleep).
5806 */
5807void ata_port_detach(struct ata_port *ap)
5808{
5809 unsigned long flags;
5810 int i;
5811
5812 if (!ap->ops->error_handler)
5813 goto skip_eh;
5814
5815 /* tell EH we're leaving & flush EH */
5816 spin_lock_irqsave(ap->lock, flags);
5817 ap->pflags |= ATA_PFLAG_UNLOADING;
5818 spin_unlock_irqrestore(ap->lock, flags);
5819
5820 ata_port_wait_eh(ap);
5821
5822 /* EH is now guaranteed to see UNLOADING, so no new device
5823 * will be attached. Disable all existing devices.
5824 */
5825 spin_lock_irqsave(ap->lock, flags);
5826
5827 for (i = 0; i < ATA_MAX_DEVICES; i++)
5828 ata_dev_disable(&ap->device[i]);
5829
5830 spin_unlock_irqrestore(ap->lock, flags);
5831
5832 /* Final freeze & EH. All in-flight commands are aborted. EH
5833 * will be skipped and retrials will be terminated with bad
5834 * target.
5835 */
5836 spin_lock_irqsave(ap->lock, flags);
5837 ata_port_freeze(ap); /* won't be thawed */
5838 spin_unlock_irqrestore(ap->lock, flags);
5839
5840 ata_port_wait_eh(ap);
5841
5842 /* Flush hotplug task. The sequence is similar to
5843 * ata_port_flush_task().
5844 */
5845 flush_workqueue(ata_aux_wq);
5846 cancel_delayed_work(&ap->hotplug_task);
5847 flush_workqueue(ata_aux_wq);
5848
5849 skip_eh:
5850 /* remove the associated SCSI host */
5851 scsi_remove_host(ap->scsi_host);
5852}
5853
5854/**
5855 * ata_host_remove - PCI layer callback for device removal
5856 * @host: ATA host set that was removed
5857 *
5858 * Unregister all objects associated with this host set. Free those
5859 * objects.
5860 *
5861 * LOCKING:
5862 * Inherited from calling layer (may sleep).
5863 */
5864
5865void ata_host_remove(struct ata_host *host)
5866{
5867 unsigned int i;
5868
5869 for (i = 0; i < host->n_ports; i++)
5870 ata_port_detach(host->ports[i]);
5871
5872 free_irq(host->irq, host);
5873 if (host->irq2)
5874 free_irq(host->irq2, host);
5875
5876 for (i = 0; i < host->n_ports; i++) {
5877 struct ata_port *ap = host->ports[i];
5878
5879 ata_scsi_release(ap->scsi_host);
5880
5881 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5882 struct ata_ioports *ioaddr = &ap->ioaddr;
5883
5884 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5885 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5886 release_region(ATA_PRIMARY_CMD, 8);
5887 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5888 release_region(ATA_SECONDARY_CMD, 8);
5889 }
5890
5891 scsi_host_put(ap->scsi_host);
5892 }
5893
5894 if (host->ops->host_stop)
5895 host->ops->host_stop(host);
5896
5897 kfree(host);
5898}
5899
5900/**
5901 * ata_scsi_release - SCSI layer callback hook for host unload
5902 * @shost: libata host to be unloaded
5903 *
5904 * Performs all duties necessary to shut down a libata port...
5905 * Kill port kthread, disable port, and release resources.
5906 *
5907 * LOCKING:
5908 * Inherited from SCSI layer.
5909 *
5910 * RETURNS:
5911 * One.
5912 */
5913
5914int ata_scsi_release(struct Scsi_Host *shost)
5915{
5916 struct ata_port *ap = ata_shost_to_port(shost);
5917
5918 DPRINTK("ENTER\n");
5919
5920 ap->ops->port_disable(ap);
5921 ap->ops->port_stop(ap);
5922
5923 DPRINTK("EXIT\n");
5924 return 1;
5925}
5926
5927struct ata_probe_ent *
5928ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5929{
5930 struct ata_probe_ent *probe_ent;
5931
5932 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5933 if (!probe_ent) {
5934 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5935 kobject_name(&(dev->kobj)));
5936 return NULL;
5937 }
5938
5939 INIT_LIST_HEAD(&probe_ent->node);
5940 probe_ent->dev = dev;
5941
5942 probe_ent->sht = port->sht;
5943 probe_ent->port_flags = port->flags;
5944 probe_ent->pio_mask = port->pio_mask;
5945 probe_ent->mwdma_mask = port->mwdma_mask;
5946 probe_ent->udma_mask = port->udma_mask;
5947 probe_ent->port_ops = port->port_ops;
5948 probe_ent->private_data = port->private_data;
5949
5950 return probe_ent;
5951}
5952
5953/**
5954 * ata_std_ports - initialize ioaddr with standard port offsets.
5955 * @ioaddr: IO address structure to be initialized
5956 *
5957 * Utility function which initializes data_addr, error_addr,
5958 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5959 * device_addr, status_addr, and command_addr to standard offsets
5960 * relative to cmd_addr.
5961 *
5962 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5963 */
5964
5965void ata_std_ports(struct ata_ioports *ioaddr)
5966{
5967 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5968 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5969 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5970 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5971 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5972 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5973 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5974 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5975 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5976 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5977}
5978
5979
5980#ifdef CONFIG_PCI
5981
5982void ata_pci_host_stop (struct ata_host *host)
5983{
5984 struct pci_dev *pdev = to_pci_dev(host->dev);
5985
5986 pci_iounmap(pdev, host->mmio_base);
5987}
5988
5989/**
5990 * ata_pci_remove_one - PCI layer callback for device removal
5991 * @pdev: PCI device that was removed
5992 *
5993 * PCI layer indicates to libata via this hook that
5994 * hot-unplug or module unload event has occurred.
5995 * Handle this by unregistering all objects associated
5996 * with this PCI device. Free those objects. Then finally
5997 * release PCI resources and disable device.
5998 *
5999 * LOCKING:
6000 * Inherited from PCI layer (may sleep).
6001 */
6002
6003void ata_pci_remove_one (struct pci_dev *pdev)
6004{
6005 struct device *dev = pci_dev_to_dev(pdev);
6006 struct ata_host *host = dev_get_drvdata(dev);
6007
6008 ata_host_remove(host);
6009
6010 pci_release_regions(pdev);
6011 pci_disable_device(pdev);
6012 dev_set_drvdata(dev, NULL);
6013}
6014
6015/* move to PCI subsystem */
6016int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6017{
6018 unsigned long tmp = 0;
6019
6020 switch (bits->width) {
6021 case 1: {
6022 u8 tmp8 = 0;
6023 pci_read_config_byte(pdev, bits->reg, &tmp8);
6024 tmp = tmp8;
6025 break;
6026 }
6027 case 2: {
6028 u16 tmp16 = 0;
6029 pci_read_config_word(pdev, bits->reg, &tmp16);
6030 tmp = tmp16;
6031 break;
6032 }
6033 case 4: {
6034 u32 tmp32 = 0;
6035 pci_read_config_dword(pdev, bits->reg, &tmp32);
6036 tmp = tmp32;
6037 break;
6038 }
6039
6040 default:
6041 return -EINVAL;
6042 }
6043
6044 tmp &= bits->mask;
6045
6046 return (tmp == bits->val) ? 1 : 0;
6047}
6048
6049void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6050{
6051 pci_save_state(pdev);
6052
6053 if (mesg.event == PM_EVENT_SUSPEND) {
6054 pci_disable_device(pdev);
6055 pci_set_power_state(pdev, PCI_D3hot);
6056 }
6057}
6058
6059void ata_pci_device_do_resume(struct pci_dev *pdev)
6060{
6061 pci_set_power_state(pdev, PCI_D0);
6062 pci_restore_state(pdev);
6063 pci_enable_device(pdev);
6064 pci_set_master(pdev);
6065}
6066
6067int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6068{
6069 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6070 int rc = 0;
6071
6072 rc = ata_host_suspend(host, mesg);
6073 if (rc)
6074 return rc;
6075
6076 ata_pci_device_do_suspend(pdev, mesg);
6077
6078 return 0;
6079}
6080
6081int ata_pci_device_resume(struct pci_dev *pdev)
6082{
6083 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6084
6085 ata_pci_device_do_resume(pdev);
6086 ata_host_resume(host);
6087 return 0;
6088}
6089#endif /* CONFIG_PCI */
6090
6091
6092static int __init ata_init(void)
6093{
6094 ata_probe_timeout *= HZ;
6095 ata_wq = create_workqueue("ata");
6096 if (!ata_wq)
6097 return -ENOMEM;
6098
6099 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6100 if (!ata_aux_wq) {
6101 destroy_workqueue(ata_wq);
6102 return -ENOMEM;
6103 }
6104
6105 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6106 return 0;
6107}
6108
6109static void __exit ata_exit(void)
6110{
6111 destroy_workqueue(ata_wq);
6112 destroy_workqueue(ata_aux_wq);
6113}
6114
6115subsys_initcall(ata_init);
6116module_exit(ata_exit);
6117
6118static unsigned long ratelimit_time;
6119static DEFINE_SPINLOCK(ata_ratelimit_lock);
6120
6121int ata_ratelimit(void)
6122{
6123 int rc;
6124 unsigned long flags;
6125
6126 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6127
6128 if (time_after(jiffies, ratelimit_time)) {
6129 rc = 1;
6130 ratelimit_time = jiffies + (HZ/5);
6131 } else
6132 rc = 0;
6133
6134 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6135
6136 return rc;
6137}
6138
6139/**
6140 * ata_wait_register - wait until register value changes
6141 * @reg: IO-mapped register
6142 * @mask: Mask to apply to read register value
6143 * @val: Wait condition
6144 * @interval_msec: polling interval in milliseconds
6145 * @timeout_msec: timeout in milliseconds
6146 *
6147 * Waiting for some bits of register to change is a common
6148 * operation for ATA controllers. This function reads 32bit LE
6149 * IO-mapped register @reg and tests for the following condition.
6150 *
6151 * (*@reg & mask) != val
6152 *
6153 * If the condition is met, it returns; otherwise, the process is
6154 * repeated after @interval_msec until timeout.
6155 *
6156 * LOCKING:
6157 * Kernel thread context (may sleep)
6158 *
6159 * RETURNS:
6160 * The final register value.
6161 */
6162u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6163 unsigned long interval_msec,
6164 unsigned long timeout_msec)
6165{
6166 unsigned long timeout;
6167 u32 tmp;
6168
6169 tmp = ioread32(reg);
6170
6171 /* Calculate timeout _after_ the first read to make sure
6172 * preceding writes reach the controller before starting to
6173 * eat away the timeout.
6174 */
6175 timeout = jiffies + (timeout_msec * HZ) / 1000;
6176
6177 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6178 msleep(interval_msec);
6179 tmp = ioread32(reg);
6180 }
6181
6182 return tmp;
6183}
6184
6185/*
6186 * Dummy port_ops
6187 */
6188static void ata_dummy_noret(struct ata_port *ap) { }
6189static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6190static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6191
6192static u8 ata_dummy_check_status(struct ata_port *ap)
6193{
6194 return ATA_DRDY;
6195}
6196
6197static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6198{
6199 return AC_ERR_SYSTEM;
6200}
6201
6202const struct ata_port_operations ata_dummy_port_ops = {
6203 .port_disable = ata_port_disable,
6204 .check_status = ata_dummy_check_status,
6205 .check_altstatus = ata_dummy_check_status,
6206 .dev_select = ata_noop_dev_select,
6207 .qc_prep = ata_noop_qc_prep,
6208 .qc_issue = ata_dummy_qc_issue,
6209 .freeze = ata_dummy_noret,
6210 .thaw = ata_dummy_noret,
6211 .error_handler = ata_dummy_noret,
6212 .post_internal_cmd = ata_dummy_qc_noret,
6213 .irq_clear = ata_dummy_noret,
6214 .port_start = ata_dummy_ret0,
6215 .port_stop = ata_dummy_noret,
6216};
6217
6218/*
6219 * libata is essentially a library of internal helper functions for
6220 * low-level ATA host controller drivers. As such, the API/ABI is
6221 * likely to change as new drivers are added and updated.
6222 * Do not depend on ABI/API stability.
6223 */
6224
6225EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6226EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6227EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6228EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6229EXPORT_SYMBOL_GPL(ata_std_bios_param);
6230EXPORT_SYMBOL_GPL(ata_std_ports);
6231EXPORT_SYMBOL_GPL(ata_host_init);
6232EXPORT_SYMBOL_GPL(ata_device_add);
6233EXPORT_SYMBOL_GPL(ata_port_detach);
6234EXPORT_SYMBOL_GPL(ata_host_remove);
6235EXPORT_SYMBOL_GPL(ata_sg_init);
6236EXPORT_SYMBOL_GPL(ata_sg_init_one);
6237EXPORT_SYMBOL_GPL(ata_hsm_move);
6238EXPORT_SYMBOL_GPL(ata_qc_complete);
6239EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6240EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6241EXPORT_SYMBOL_GPL(ata_tf_load);
6242EXPORT_SYMBOL_GPL(ata_tf_read);
6243EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6244EXPORT_SYMBOL_GPL(ata_std_dev_select);
6245EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6246EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6247EXPORT_SYMBOL_GPL(ata_check_status);
6248EXPORT_SYMBOL_GPL(ata_altstatus);
6249EXPORT_SYMBOL_GPL(ata_exec_command);
6250EXPORT_SYMBOL_GPL(ata_port_start);
6251EXPORT_SYMBOL_GPL(ata_port_stop);
6252EXPORT_SYMBOL_GPL(ata_host_stop);
6253EXPORT_SYMBOL_GPL(ata_interrupt);
6254EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6255EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6256EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6257EXPORT_SYMBOL_GPL(ata_qc_prep);
6258EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6259EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6260EXPORT_SYMBOL_GPL(ata_bmdma_start);
6261EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6262EXPORT_SYMBOL_GPL(ata_bmdma_status);
6263EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6264EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6265EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6266EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6267EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6268EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6269EXPORT_SYMBOL_GPL(ata_port_probe);
6270EXPORT_SYMBOL_GPL(sata_set_spd);
6271EXPORT_SYMBOL_GPL(sata_phy_debounce);
6272EXPORT_SYMBOL_GPL(sata_phy_resume);
6273EXPORT_SYMBOL_GPL(sata_phy_reset);
6274EXPORT_SYMBOL_GPL(__sata_phy_reset);
6275EXPORT_SYMBOL_GPL(ata_bus_reset);
6276EXPORT_SYMBOL_GPL(ata_std_prereset);
6277EXPORT_SYMBOL_GPL(ata_std_softreset);
6278EXPORT_SYMBOL_GPL(sata_port_hardreset);
6279EXPORT_SYMBOL_GPL(sata_std_hardreset);
6280EXPORT_SYMBOL_GPL(ata_std_postreset);
6281EXPORT_SYMBOL_GPL(ata_dev_classify);
6282EXPORT_SYMBOL_GPL(ata_dev_pair);
6283EXPORT_SYMBOL_GPL(ata_port_disable);
6284EXPORT_SYMBOL_GPL(ata_ratelimit);
6285EXPORT_SYMBOL_GPL(ata_wait_register);
6286EXPORT_SYMBOL_GPL(ata_busy_sleep);
6287EXPORT_SYMBOL_GPL(ata_port_queue_task);
6288EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6289EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6290EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6291EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6292EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6293EXPORT_SYMBOL_GPL(ata_scsi_release);
6294EXPORT_SYMBOL_GPL(ata_host_intr);
6295EXPORT_SYMBOL_GPL(sata_scr_valid);
6296EXPORT_SYMBOL_GPL(sata_scr_read);
6297EXPORT_SYMBOL_GPL(sata_scr_write);
6298EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6299EXPORT_SYMBOL_GPL(ata_port_online);
6300EXPORT_SYMBOL_GPL(ata_port_offline);
6301EXPORT_SYMBOL_GPL(ata_host_suspend);
6302EXPORT_SYMBOL_GPL(ata_host_resume);
6303EXPORT_SYMBOL_GPL(ata_id_string);
6304EXPORT_SYMBOL_GPL(ata_id_c_string);
6305EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6306EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6307
6308EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6309EXPORT_SYMBOL_GPL(ata_timing_compute);
6310EXPORT_SYMBOL_GPL(ata_timing_merge);
6311
6312#ifdef CONFIG_PCI
6313EXPORT_SYMBOL_GPL(pci_test_config_bits);
6314EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6315EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6316EXPORT_SYMBOL_GPL(ata_pci_init_one);
6317EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6318EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6319EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6320EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6321EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6322EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6323EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6324#endif /* CONFIG_PCI */
6325
6326EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6327EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6328
6329EXPORT_SYMBOL_GPL(ata_eng_timeout);
6330EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6331EXPORT_SYMBOL_GPL(ata_port_abort);
6332EXPORT_SYMBOL_GPL(ata_port_freeze);
6333EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6334EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6335EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6336EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6337EXPORT_SYMBOL_GPL(ata_do_eh);
Linux kernel - Deliverables
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