| 1 | /* |
| 2 | * pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the |
| 3 | * PATA port of the controller. The SATA ports are |
| 4 | * driven by AHCI in the usual configuration although |
| 5 | * this driver can handle other setups if we need it. |
| 6 | * |
| 7 | * (c) 2006 Red Hat |
| 8 | */ |
| 9 | |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/pci.h> |
| 13 | #include <linux/blkdev.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include <linux/device.h> |
| 16 | #include <scsi/scsi_host.h> |
| 17 | #include <linux/libata.h> |
| 18 | #include <linux/ata.h> |
| 19 | |
| 20 | #define DRV_NAME "pata_jmicron" |
| 21 | #define DRV_VERSION "0.1.5" |
| 22 | |
| 23 | typedef enum { |
| 24 | PORT_PATA0 = 0, |
| 25 | PORT_PATA1 = 1, |
| 26 | PORT_SATA = 2, |
| 27 | } port_type; |
| 28 | |
| 29 | /** |
| 30 | * jmicron_pre_reset - check for 40/80 pin |
| 31 | * @link: ATA link |
| 32 | * @deadline: deadline jiffies for the operation |
| 33 | * |
| 34 | * Perform the PATA port setup we need. |
| 35 | * |
| 36 | * On the Jmicron 361/363 there is a single PATA port that can be mapped |
| 37 | * either as primary or secondary (or neither). We don't do any policy |
| 38 | * and setup here. We assume that has been done by init_one and the |
| 39 | * BIOS. |
| 40 | */ |
| 41 | static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline) |
| 42 | { |
| 43 | struct ata_port *ap = link->ap; |
| 44 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 45 | u32 control; |
| 46 | u32 control5; |
| 47 | int port_mask = 1<< (4 * ap->port_no); |
| 48 | int port = ap->port_no; |
| 49 | port_type port_map[2]; |
| 50 | |
| 51 | /* Check if our port is enabled */ |
| 52 | pci_read_config_dword(pdev, 0x40, &control); |
| 53 | if ((control & port_mask) == 0) |
| 54 | return -ENOENT; |
| 55 | |
| 56 | /* There are two basic mappings. One has the two SATA ports merged |
| 57 | as master/slave and the secondary as PATA, the other has only the |
| 58 | SATA port mapped */ |
| 59 | if (control & (1 << 23)) { |
| 60 | port_map[0] = PORT_SATA; |
| 61 | port_map[1] = PORT_PATA0; |
| 62 | } else { |
| 63 | port_map[0] = PORT_SATA; |
| 64 | port_map[1] = PORT_SATA; |
| 65 | } |
| 66 | |
| 67 | /* The 365/366 may have this bit set to map the second PATA port |
| 68 | as the internal primary channel */ |
| 69 | pci_read_config_dword(pdev, 0x80, &control5); |
| 70 | if (control5 & (1<<24)) |
| 71 | port_map[0] = PORT_PATA1; |
| 72 | |
| 73 | /* The two ports may then be logically swapped by the firmware */ |
| 74 | if (control & (1 << 22)) |
| 75 | port = port ^ 1; |
| 76 | |
| 77 | /* |
| 78 | * Now we know which physical port we are talking about we can |
| 79 | * actually do our cable checking etc. Thankfully we don't need |
| 80 | * to do the plumbing for other cases. |
| 81 | */ |
| 82 | switch (port_map[port]) { |
| 83 | case PORT_PATA0: |
| 84 | if ((control & (1 << 5)) == 0) |
| 85 | return -ENOENT; |
| 86 | if (control & (1 << 3)) /* 40/80 pin primary */ |
| 87 | ap->cbl = ATA_CBL_PATA40; |
| 88 | else |
| 89 | ap->cbl = ATA_CBL_PATA80; |
| 90 | break; |
| 91 | case PORT_PATA1: |
| 92 | /* Bit 21 is set if the port is enabled */ |
| 93 | if ((control5 & (1 << 21)) == 0) |
| 94 | return -ENOENT; |
| 95 | if (control5 & (1 << 19)) /* 40/80 pin secondary */ |
| 96 | ap->cbl = ATA_CBL_PATA40; |
| 97 | else |
| 98 | ap->cbl = ATA_CBL_PATA80; |
| 99 | break; |
| 100 | case PORT_SATA: |
| 101 | ap->cbl = ATA_CBL_SATA; |
| 102 | break; |
| 103 | } |
| 104 | return ata_sff_prereset(link, deadline); |
| 105 | } |
| 106 | |
| 107 | /* No PIO or DMA methods needed for this device */ |
| 108 | |
| 109 | static struct scsi_host_template jmicron_sht = { |
| 110 | ATA_BMDMA_SHT(DRV_NAME), |
| 111 | }; |
| 112 | |
| 113 | static struct ata_port_operations jmicron_ops = { |
| 114 | .inherits = &ata_bmdma_port_ops, |
| 115 | .prereset = jmicron_pre_reset, |
| 116 | }; |
| 117 | |
| 118 | |
| 119 | /** |
| 120 | * jmicron_init_one - Register Jmicron ATA PCI device with kernel services |
| 121 | * @pdev: PCI device to register |
| 122 | * @ent: Entry in jmicron_pci_tbl matching with @pdev |
| 123 | * |
| 124 | * Called from kernel PCI layer. |
| 125 | * |
| 126 | * LOCKING: |
| 127 | * Inherited from PCI layer (may sleep). |
| 128 | * |
| 129 | * RETURNS: |
| 130 | * Zero on success, or -ERRNO value. |
| 131 | */ |
| 132 | |
| 133 | static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id) |
| 134 | { |
| 135 | static const struct ata_port_info info = { |
| 136 | .flags = ATA_FLAG_SLAVE_POSS, |
| 137 | |
| 138 | .pio_mask = ATA_PIO4, |
| 139 | .mwdma_mask = ATA_MWDMA2, |
| 140 | .udma_mask = ATA_UDMA5, |
| 141 | |
| 142 | .port_ops = &jmicron_ops, |
| 143 | }; |
| 144 | const struct ata_port_info *ppi[] = { &info, NULL }; |
| 145 | |
| 146 | return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0); |
| 147 | } |
| 148 | |
| 149 | static const struct pci_device_id jmicron_pci_tbl[] = { |
| 150 | { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 151 | PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 }, |
| 152 | { } /* terminate list */ |
| 153 | }; |
| 154 | |
| 155 | static struct pci_driver jmicron_pci_driver = { |
| 156 | .name = DRV_NAME, |
| 157 | .id_table = jmicron_pci_tbl, |
| 158 | .probe = jmicron_init_one, |
| 159 | .remove = ata_pci_remove_one, |
| 160 | #ifdef CONFIG_PM_SLEEP |
| 161 | .suspend = ata_pci_device_suspend, |
| 162 | .resume = ata_pci_device_resume, |
| 163 | #endif |
| 164 | }; |
| 165 | |
| 166 | module_pci_driver(jmicron_pci_driver); |
| 167 | |
| 168 | MODULE_AUTHOR("Alan Cox"); |
| 169 | MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports"); |
| 170 | MODULE_LICENSE("GPL"); |
| 171 | MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl); |
| 172 | MODULE_VERSION(DRV_VERSION); |
| 173 | |