| 1 | /* |
| 2 | * DMA Engine test module |
| 3 | * |
| 4 | * Copyright (C) 2007 Atmel Corporation |
| 5 | * Copyright (C) 2013 Intel Corporation |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 12 | |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/dma-mapping.h> |
| 15 | #include <linux/dmaengine.h> |
| 16 | #include <linux/freezer.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/kthread.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/moduleparam.h> |
| 21 | #include <linux/random.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/wait.h> |
| 24 | |
| 25 | static unsigned int test_buf_size = 16384; |
| 26 | module_param(test_buf_size, uint, S_IRUGO | S_IWUSR); |
| 27 | MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); |
| 28 | |
| 29 | static char test_channel[20]; |
| 30 | module_param_string(channel, test_channel, sizeof(test_channel), |
| 31 | S_IRUGO | S_IWUSR); |
| 32 | MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)"); |
| 33 | |
| 34 | static char test_device[20]; |
| 35 | module_param_string(device, test_device, sizeof(test_device), |
| 36 | S_IRUGO | S_IWUSR); |
| 37 | MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)"); |
| 38 | |
| 39 | static unsigned int threads_per_chan = 1; |
| 40 | module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR); |
| 41 | MODULE_PARM_DESC(threads_per_chan, |
| 42 | "Number of threads to start per channel (default: 1)"); |
| 43 | |
| 44 | static unsigned int max_channels; |
| 45 | module_param(max_channels, uint, S_IRUGO | S_IWUSR); |
| 46 | MODULE_PARM_DESC(max_channels, |
| 47 | "Maximum number of channels to use (default: all)"); |
| 48 | |
| 49 | static unsigned int iterations; |
| 50 | module_param(iterations, uint, S_IRUGO | S_IWUSR); |
| 51 | MODULE_PARM_DESC(iterations, |
| 52 | "Iterations before stopping test (default: infinite)"); |
| 53 | |
| 54 | static unsigned int xor_sources = 3; |
| 55 | module_param(xor_sources, uint, S_IRUGO | S_IWUSR); |
| 56 | MODULE_PARM_DESC(xor_sources, |
| 57 | "Number of xor source buffers (default: 3)"); |
| 58 | |
| 59 | static unsigned int pq_sources = 3; |
| 60 | module_param(pq_sources, uint, S_IRUGO | S_IWUSR); |
| 61 | MODULE_PARM_DESC(pq_sources, |
| 62 | "Number of p+q source buffers (default: 3)"); |
| 63 | |
| 64 | static int timeout = 3000; |
| 65 | module_param(timeout, uint, S_IRUGO | S_IWUSR); |
| 66 | MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), " |
| 67 | "Pass -1 for infinite timeout"); |
| 68 | |
| 69 | static bool noverify; |
| 70 | module_param(noverify, bool, S_IRUGO | S_IWUSR); |
| 71 | MODULE_PARM_DESC(noverify, "Disable random data setup and verification"); |
| 72 | |
| 73 | /** |
| 74 | * struct dmatest_params - test parameters. |
| 75 | * @buf_size: size of the memcpy test buffer |
| 76 | * @channel: bus ID of the channel to test |
| 77 | * @device: bus ID of the DMA Engine to test |
| 78 | * @threads_per_chan: number of threads to start per channel |
| 79 | * @max_channels: maximum number of channels to use |
| 80 | * @iterations: iterations before stopping test |
| 81 | * @xor_sources: number of xor source buffers |
| 82 | * @pq_sources: number of p+q source buffers |
| 83 | * @timeout: transfer timeout in msec, -1 for infinite timeout |
| 84 | */ |
| 85 | struct dmatest_params { |
| 86 | unsigned int buf_size; |
| 87 | char channel[20]; |
| 88 | char device[20]; |
| 89 | unsigned int threads_per_chan; |
| 90 | unsigned int max_channels; |
| 91 | unsigned int iterations; |
| 92 | unsigned int xor_sources; |
| 93 | unsigned int pq_sources; |
| 94 | int timeout; |
| 95 | bool noverify; |
| 96 | }; |
| 97 | |
| 98 | /** |
| 99 | * struct dmatest_info - test information. |
| 100 | * @params: test parameters |
| 101 | * @lock: access protection to the fields of this structure |
| 102 | */ |
| 103 | static struct dmatest_info { |
| 104 | /* Test parameters */ |
| 105 | struct dmatest_params params; |
| 106 | |
| 107 | /* Internal state */ |
| 108 | struct list_head channels; |
| 109 | unsigned int nr_channels; |
| 110 | struct mutex lock; |
| 111 | bool did_init; |
| 112 | } test_info = { |
| 113 | .channels = LIST_HEAD_INIT(test_info.channels), |
| 114 | .lock = __MUTEX_INITIALIZER(test_info.lock), |
| 115 | }; |
| 116 | |
| 117 | static int dmatest_run_set(const char *val, const struct kernel_param *kp); |
| 118 | static int dmatest_run_get(char *val, const struct kernel_param *kp); |
| 119 | static struct kernel_param_ops run_ops = { |
| 120 | .set = dmatest_run_set, |
| 121 | .get = dmatest_run_get, |
| 122 | }; |
| 123 | static bool dmatest_run; |
| 124 | module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR); |
| 125 | MODULE_PARM_DESC(run, "Run the test (default: false)"); |
| 126 | |
| 127 | /* Maximum amount of mismatched bytes in buffer to print */ |
| 128 | #define MAX_ERROR_COUNT 32 |
| 129 | |
| 130 | /* |
| 131 | * Initialization patterns. All bytes in the source buffer has bit 7 |
| 132 | * set, all bytes in the destination buffer has bit 7 cleared. |
| 133 | * |
| 134 | * Bit 6 is set for all bytes which are to be copied by the DMA |
| 135 | * engine. Bit 5 is set for all bytes which are to be overwritten by |
| 136 | * the DMA engine. |
| 137 | * |
| 138 | * The remaining bits are the inverse of a counter which increments by |
| 139 | * one for each byte address. |
| 140 | */ |
| 141 | #define PATTERN_SRC 0x80 |
| 142 | #define PATTERN_DST 0x00 |
| 143 | #define PATTERN_COPY 0x40 |
| 144 | #define PATTERN_OVERWRITE 0x20 |
| 145 | #define PATTERN_COUNT_MASK 0x1f |
| 146 | |
| 147 | struct dmatest_thread { |
| 148 | struct list_head node; |
| 149 | struct dmatest_info *info; |
| 150 | struct task_struct *task; |
| 151 | struct dma_chan *chan; |
| 152 | u8 **srcs; |
| 153 | u8 **dsts; |
| 154 | enum dma_transaction_type type; |
| 155 | bool done; |
| 156 | }; |
| 157 | |
| 158 | struct dmatest_chan { |
| 159 | struct list_head node; |
| 160 | struct dma_chan *chan; |
| 161 | struct list_head threads; |
| 162 | }; |
| 163 | |
| 164 | static DECLARE_WAIT_QUEUE_HEAD(thread_wait); |
| 165 | static bool wait; |
| 166 | |
| 167 | static bool is_threaded_test_run(struct dmatest_info *info) |
| 168 | { |
| 169 | struct dmatest_chan *dtc; |
| 170 | |
| 171 | list_for_each_entry(dtc, &info->channels, node) { |
| 172 | struct dmatest_thread *thread; |
| 173 | |
| 174 | list_for_each_entry(thread, &dtc->threads, node) { |
| 175 | if (!thread->done) |
| 176 | return true; |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | return false; |
| 181 | } |
| 182 | |
| 183 | static int dmatest_wait_get(char *val, const struct kernel_param *kp) |
| 184 | { |
| 185 | struct dmatest_info *info = &test_info; |
| 186 | struct dmatest_params *params = &info->params; |
| 187 | |
| 188 | if (params->iterations) |
| 189 | wait_event(thread_wait, !is_threaded_test_run(info)); |
| 190 | wait = true; |
| 191 | return param_get_bool(val, kp); |
| 192 | } |
| 193 | |
| 194 | static struct kernel_param_ops wait_ops = { |
| 195 | .get = dmatest_wait_get, |
| 196 | .set = param_set_bool, |
| 197 | }; |
| 198 | module_param_cb(wait, &wait_ops, &wait, S_IRUGO); |
| 199 | MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)"); |
| 200 | |
| 201 | static bool dmatest_match_channel(struct dmatest_params *params, |
| 202 | struct dma_chan *chan) |
| 203 | { |
| 204 | if (params->channel[0] == '\0') |
| 205 | return true; |
| 206 | return strcmp(dma_chan_name(chan), params->channel) == 0; |
| 207 | } |
| 208 | |
| 209 | static bool dmatest_match_device(struct dmatest_params *params, |
| 210 | struct dma_device *device) |
| 211 | { |
| 212 | if (params->device[0] == '\0') |
| 213 | return true; |
| 214 | return strcmp(dev_name(device->dev), params->device) == 0; |
| 215 | } |
| 216 | |
| 217 | static unsigned long dmatest_random(void) |
| 218 | { |
| 219 | unsigned long buf; |
| 220 | |
| 221 | prandom_bytes(&buf, sizeof(buf)); |
| 222 | return buf; |
| 223 | } |
| 224 | |
| 225 | static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len, |
| 226 | unsigned int buf_size) |
| 227 | { |
| 228 | unsigned int i; |
| 229 | u8 *buf; |
| 230 | |
| 231 | for (; (buf = *bufs); bufs++) { |
| 232 | for (i = 0; i < start; i++) |
| 233 | buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); |
| 234 | for ( ; i < start + len; i++) |
| 235 | buf[i] = PATTERN_SRC | PATTERN_COPY |
| 236 | | (~i & PATTERN_COUNT_MASK); |
| 237 | for ( ; i < buf_size; i++) |
| 238 | buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); |
| 239 | buf++; |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len, |
| 244 | unsigned int buf_size) |
| 245 | { |
| 246 | unsigned int i; |
| 247 | u8 *buf; |
| 248 | |
| 249 | for (; (buf = *bufs); bufs++) { |
| 250 | for (i = 0; i < start; i++) |
| 251 | buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); |
| 252 | for ( ; i < start + len; i++) |
| 253 | buf[i] = PATTERN_DST | PATTERN_OVERWRITE |
| 254 | | (~i & PATTERN_COUNT_MASK); |
| 255 | for ( ; i < buf_size; i++) |
| 256 | buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); |
| 257 | } |
| 258 | } |
| 259 | |
| 260 | static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index, |
| 261 | unsigned int counter, bool is_srcbuf) |
| 262 | { |
| 263 | u8 diff = actual ^ pattern; |
| 264 | u8 expected = pattern | (~counter & PATTERN_COUNT_MASK); |
| 265 | const char *thread_name = current->comm; |
| 266 | |
| 267 | if (is_srcbuf) |
| 268 | pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n", |
| 269 | thread_name, index, expected, actual); |
| 270 | else if ((pattern & PATTERN_COPY) |
| 271 | && (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) |
| 272 | pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n", |
| 273 | thread_name, index, expected, actual); |
| 274 | else if (diff & PATTERN_SRC) |
| 275 | pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n", |
| 276 | thread_name, index, expected, actual); |
| 277 | else |
| 278 | pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n", |
| 279 | thread_name, index, expected, actual); |
| 280 | } |
| 281 | |
| 282 | static unsigned int dmatest_verify(u8 **bufs, unsigned int start, |
| 283 | unsigned int end, unsigned int counter, u8 pattern, |
| 284 | bool is_srcbuf) |
| 285 | { |
| 286 | unsigned int i; |
| 287 | unsigned int error_count = 0; |
| 288 | u8 actual; |
| 289 | u8 expected; |
| 290 | u8 *buf; |
| 291 | unsigned int counter_orig = counter; |
| 292 | |
| 293 | for (; (buf = *bufs); bufs++) { |
| 294 | counter = counter_orig; |
| 295 | for (i = start; i < end; i++) { |
| 296 | actual = buf[i]; |
| 297 | expected = pattern | (~counter & PATTERN_COUNT_MASK); |
| 298 | if (actual != expected) { |
| 299 | if (error_count < MAX_ERROR_COUNT) |
| 300 | dmatest_mismatch(actual, pattern, i, |
| 301 | counter, is_srcbuf); |
| 302 | error_count++; |
| 303 | } |
| 304 | counter++; |
| 305 | } |
| 306 | } |
| 307 | |
| 308 | if (error_count > MAX_ERROR_COUNT) |
| 309 | pr_warn("%s: %u errors suppressed\n", |
| 310 | current->comm, error_count - MAX_ERROR_COUNT); |
| 311 | |
| 312 | return error_count; |
| 313 | } |
| 314 | |
| 315 | /* poor man's completion - we want to use wait_event_freezable() on it */ |
| 316 | struct dmatest_done { |
| 317 | bool done; |
| 318 | wait_queue_head_t *wait; |
| 319 | }; |
| 320 | |
| 321 | static void dmatest_callback(void *arg) |
| 322 | { |
| 323 | struct dmatest_done *done = arg; |
| 324 | |
| 325 | done->done = true; |
| 326 | wake_up_all(done->wait); |
| 327 | } |
| 328 | |
| 329 | static unsigned int min_odd(unsigned int x, unsigned int y) |
| 330 | { |
| 331 | unsigned int val = min(x, y); |
| 332 | |
| 333 | return val % 2 ? val : val - 1; |
| 334 | } |
| 335 | |
| 336 | static void result(const char *err, unsigned int n, unsigned int src_off, |
| 337 | unsigned int dst_off, unsigned int len, unsigned long data) |
| 338 | { |
| 339 | pr_info("%s: result #%u: '%s' with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)", |
| 340 | current->comm, n, err, src_off, dst_off, len, data); |
| 341 | } |
| 342 | |
| 343 | static void dbg_result(const char *err, unsigned int n, unsigned int src_off, |
| 344 | unsigned int dst_off, unsigned int len, |
| 345 | unsigned long data) |
| 346 | { |
| 347 | pr_debug("%s: result #%u: '%s' with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)", |
| 348 | current->comm, n, err, src_off, dst_off, len, data); |
| 349 | } |
| 350 | |
| 351 | static unsigned long long dmatest_persec(s64 runtime, unsigned int val) |
| 352 | { |
| 353 | unsigned long long per_sec = 1000000; |
| 354 | |
| 355 | if (runtime <= 0) |
| 356 | return 0; |
| 357 | |
| 358 | /* drop precision until runtime is 32-bits */ |
| 359 | while (runtime > UINT_MAX) { |
| 360 | runtime >>= 1; |
| 361 | per_sec <<= 1; |
| 362 | } |
| 363 | |
| 364 | per_sec *= val; |
| 365 | do_div(per_sec, runtime); |
| 366 | return per_sec; |
| 367 | } |
| 368 | |
| 369 | static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len) |
| 370 | { |
| 371 | return dmatest_persec(runtime, len >> 10); |
| 372 | } |
| 373 | |
| 374 | /* |
| 375 | * This function repeatedly tests DMA transfers of various lengths and |
| 376 | * offsets for a given operation type until it is told to exit by |
| 377 | * kthread_stop(). There may be multiple threads running this function |
| 378 | * in parallel for a single channel, and there may be multiple channels |
| 379 | * being tested in parallel. |
| 380 | * |
| 381 | * Before each test, the source and destination buffer is initialized |
| 382 | * with a known pattern. This pattern is different depending on |
| 383 | * whether it's in an area which is supposed to be copied or |
| 384 | * overwritten, and different in the source and destination buffers. |
| 385 | * So if the DMA engine doesn't copy exactly what we tell it to copy, |
| 386 | * we'll notice. |
| 387 | */ |
| 388 | static int dmatest_func(void *data) |
| 389 | { |
| 390 | DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait); |
| 391 | struct dmatest_thread *thread = data; |
| 392 | struct dmatest_done done = { .wait = &done_wait }; |
| 393 | struct dmatest_info *info; |
| 394 | struct dmatest_params *params; |
| 395 | struct dma_chan *chan; |
| 396 | struct dma_device *dev; |
| 397 | unsigned int src_off, dst_off, len; |
| 398 | unsigned int error_count; |
| 399 | unsigned int failed_tests = 0; |
| 400 | unsigned int total_tests = 0; |
| 401 | dma_cookie_t cookie; |
| 402 | enum dma_status status; |
| 403 | enum dma_ctrl_flags flags; |
| 404 | u8 *pq_coefs = NULL; |
| 405 | int ret; |
| 406 | int src_cnt; |
| 407 | int dst_cnt; |
| 408 | int i; |
| 409 | ktime_t ktime; |
| 410 | s64 runtime = 0; |
| 411 | unsigned long long total_len = 0; |
| 412 | |
| 413 | set_freezable(); |
| 414 | |
| 415 | ret = -ENOMEM; |
| 416 | |
| 417 | smp_rmb(); |
| 418 | info = thread->info; |
| 419 | params = &info->params; |
| 420 | chan = thread->chan; |
| 421 | dev = chan->device; |
| 422 | if (thread->type == DMA_MEMCPY) |
| 423 | src_cnt = dst_cnt = 1; |
| 424 | else if (thread->type == DMA_XOR) { |
| 425 | /* force odd to ensure dst = src */ |
| 426 | src_cnt = min_odd(params->xor_sources | 1, dev->max_xor); |
| 427 | dst_cnt = 1; |
| 428 | } else if (thread->type == DMA_PQ) { |
| 429 | /* force odd to ensure dst = src */ |
| 430 | src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0)); |
| 431 | dst_cnt = 2; |
| 432 | |
| 433 | pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL); |
| 434 | if (!pq_coefs) |
| 435 | goto err_thread_type; |
| 436 | |
| 437 | for (i = 0; i < src_cnt; i++) |
| 438 | pq_coefs[i] = 1; |
| 439 | } else |
| 440 | goto err_thread_type; |
| 441 | |
| 442 | thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL); |
| 443 | if (!thread->srcs) |
| 444 | goto err_srcs; |
| 445 | for (i = 0; i < src_cnt; i++) { |
| 446 | thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL); |
| 447 | if (!thread->srcs[i]) |
| 448 | goto err_srcbuf; |
| 449 | } |
| 450 | thread->srcs[i] = NULL; |
| 451 | |
| 452 | thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL); |
| 453 | if (!thread->dsts) |
| 454 | goto err_dsts; |
| 455 | for (i = 0; i < dst_cnt; i++) { |
| 456 | thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL); |
| 457 | if (!thread->dsts[i]) |
| 458 | goto err_dstbuf; |
| 459 | } |
| 460 | thread->dsts[i] = NULL; |
| 461 | |
| 462 | set_user_nice(current, 10); |
| 463 | |
| 464 | /* |
| 465 | * src and dst buffers are freed by ourselves below |
| 466 | */ |
| 467 | flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; |
| 468 | |
| 469 | ktime = ktime_get(); |
| 470 | while (!kthread_should_stop() |
| 471 | && !(params->iterations && total_tests >= params->iterations)) { |
| 472 | struct dma_async_tx_descriptor *tx = NULL; |
| 473 | struct dmaengine_unmap_data *um; |
| 474 | dma_addr_t srcs[src_cnt]; |
| 475 | dma_addr_t *dsts; |
| 476 | u8 align = 0; |
| 477 | |
| 478 | total_tests++; |
| 479 | |
| 480 | /* honor alignment restrictions */ |
| 481 | if (thread->type == DMA_MEMCPY) |
| 482 | align = dev->copy_align; |
| 483 | else if (thread->type == DMA_XOR) |
| 484 | align = dev->xor_align; |
| 485 | else if (thread->type == DMA_PQ) |
| 486 | align = dev->pq_align; |
| 487 | |
| 488 | if (1 << align > params->buf_size) { |
| 489 | pr_err("%u-byte buffer too small for %d-byte alignment\n", |
| 490 | params->buf_size, 1 << align); |
| 491 | break; |
| 492 | } |
| 493 | |
| 494 | if (params->noverify) { |
| 495 | len = params->buf_size; |
| 496 | src_off = 0; |
| 497 | dst_off = 0; |
| 498 | } else { |
| 499 | len = dmatest_random() % params->buf_size + 1; |
| 500 | len = (len >> align) << align; |
| 501 | if (!len) |
| 502 | len = 1 << align; |
| 503 | src_off = dmatest_random() % (params->buf_size - len + 1); |
| 504 | dst_off = dmatest_random() % (params->buf_size - len + 1); |
| 505 | |
| 506 | src_off = (src_off >> align) << align; |
| 507 | dst_off = (dst_off >> align) << align; |
| 508 | |
| 509 | dmatest_init_srcs(thread->srcs, src_off, len, |
| 510 | params->buf_size); |
| 511 | dmatest_init_dsts(thread->dsts, dst_off, len, |
| 512 | params->buf_size); |
| 513 | } |
| 514 | |
| 515 | len = (len >> align) << align; |
| 516 | if (!len) |
| 517 | len = 1 << align; |
| 518 | total_len += len; |
| 519 | |
| 520 | um = dmaengine_get_unmap_data(dev->dev, src_cnt+dst_cnt, |
| 521 | GFP_KERNEL); |
| 522 | if (!um) { |
| 523 | failed_tests++; |
| 524 | result("unmap data NULL", total_tests, |
| 525 | src_off, dst_off, len, ret); |
| 526 | continue; |
| 527 | } |
| 528 | |
| 529 | um->len = params->buf_size; |
| 530 | for (i = 0; i < src_cnt; i++) { |
| 531 | unsigned long buf = (unsigned long) thread->srcs[i]; |
| 532 | struct page *pg = virt_to_page(buf); |
| 533 | unsigned pg_off = buf & ~PAGE_MASK; |
| 534 | |
| 535 | um->addr[i] = dma_map_page(dev->dev, pg, pg_off, |
| 536 | um->len, DMA_TO_DEVICE); |
| 537 | srcs[i] = um->addr[i] + src_off; |
| 538 | ret = dma_mapping_error(dev->dev, um->addr[i]); |
| 539 | if (ret) { |
| 540 | dmaengine_unmap_put(um); |
| 541 | result("src mapping error", total_tests, |
| 542 | src_off, dst_off, len, ret); |
| 543 | failed_tests++; |
| 544 | continue; |
| 545 | } |
| 546 | um->to_cnt++; |
| 547 | } |
| 548 | /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */ |
| 549 | dsts = &um->addr[src_cnt]; |
| 550 | for (i = 0; i < dst_cnt; i++) { |
| 551 | unsigned long buf = (unsigned long) thread->dsts[i]; |
| 552 | struct page *pg = virt_to_page(buf); |
| 553 | unsigned pg_off = buf & ~PAGE_MASK; |
| 554 | |
| 555 | dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len, |
| 556 | DMA_BIDIRECTIONAL); |
| 557 | ret = dma_mapping_error(dev->dev, dsts[i]); |
| 558 | if (ret) { |
| 559 | dmaengine_unmap_put(um); |
| 560 | result("dst mapping error", total_tests, |
| 561 | src_off, dst_off, len, ret); |
| 562 | failed_tests++; |
| 563 | continue; |
| 564 | } |
| 565 | um->bidi_cnt++; |
| 566 | } |
| 567 | |
| 568 | if (thread->type == DMA_MEMCPY) |
| 569 | tx = dev->device_prep_dma_memcpy(chan, |
| 570 | dsts[0] + dst_off, |
| 571 | srcs[0], len, flags); |
| 572 | else if (thread->type == DMA_XOR) |
| 573 | tx = dev->device_prep_dma_xor(chan, |
| 574 | dsts[0] + dst_off, |
| 575 | srcs, src_cnt, |
| 576 | len, flags); |
| 577 | else if (thread->type == DMA_PQ) { |
| 578 | dma_addr_t dma_pq[dst_cnt]; |
| 579 | |
| 580 | for (i = 0; i < dst_cnt; i++) |
| 581 | dma_pq[i] = dsts[i] + dst_off; |
| 582 | tx = dev->device_prep_dma_pq(chan, dma_pq, srcs, |
| 583 | src_cnt, pq_coefs, |
| 584 | len, flags); |
| 585 | } |
| 586 | |
| 587 | if (!tx) { |
| 588 | dmaengine_unmap_put(um); |
| 589 | result("prep error", total_tests, src_off, |
| 590 | dst_off, len, ret); |
| 591 | msleep(100); |
| 592 | failed_tests++; |
| 593 | continue; |
| 594 | } |
| 595 | |
| 596 | done.done = false; |
| 597 | tx->callback = dmatest_callback; |
| 598 | tx->callback_param = &done; |
| 599 | cookie = tx->tx_submit(tx); |
| 600 | |
| 601 | if (dma_submit_error(cookie)) { |
| 602 | dmaengine_unmap_put(um); |
| 603 | result("submit error", total_tests, src_off, |
| 604 | dst_off, len, ret); |
| 605 | msleep(100); |
| 606 | failed_tests++; |
| 607 | continue; |
| 608 | } |
| 609 | dma_async_issue_pending(chan); |
| 610 | |
| 611 | wait_event_freezable_timeout(done_wait, done.done, |
| 612 | msecs_to_jiffies(params->timeout)); |
| 613 | |
| 614 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
| 615 | |
| 616 | if (!done.done) { |
| 617 | /* |
| 618 | * We're leaving the timed out dma operation with |
| 619 | * dangling pointer to done_wait. To make this |
| 620 | * correct, we'll need to allocate wait_done for |
| 621 | * each test iteration and perform "who's gonna |
| 622 | * free it this time?" dancing. For now, just |
| 623 | * leave it dangling. |
| 624 | */ |
| 625 | dmaengine_unmap_put(um); |
| 626 | result("test timed out", total_tests, src_off, dst_off, |
| 627 | len, 0); |
| 628 | failed_tests++; |
| 629 | continue; |
| 630 | } else if (status != DMA_SUCCESS) { |
| 631 | dmaengine_unmap_put(um); |
| 632 | result(status == DMA_ERROR ? |
| 633 | "completion error status" : |
| 634 | "completion busy status", total_tests, src_off, |
| 635 | dst_off, len, ret); |
| 636 | failed_tests++; |
| 637 | continue; |
| 638 | } |
| 639 | |
| 640 | dmaengine_unmap_put(um); |
| 641 | |
| 642 | if (params->noverify) { |
| 643 | dbg_result("test passed", total_tests, src_off, dst_off, |
| 644 | len, 0); |
| 645 | continue; |
| 646 | } |
| 647 | |
| 648 | pr_debug("%s: verifying source buffer...\n", current->comm); |
| 649 | error_count = dmatest_verify(thread->srcs, 0, src_off, |
| 650 | 0, PATTERN_SRC, true); |
| 651 | error_count += dmatest_verify(thread->srcs, src_off, |
| 652 | src_off + len, src_off, |
| 653 | PATTERN_SRC | PATTERN_COPY, true); |
| 654 | error_count += dmatest_verify(thread->srcs, src_off + len, |
| 655 | params->buf_size, src_off + len, |
| 656 | PATTERN_SRC, true); |
| 657 | |
| 658 | pr_debug("%s: verifying dest buffer...\n", current->comm); |
| 659 | error_count += dmatest_verify(thread->dsts, 0, dst_off, |
| 660 | 0, PATTERN_DST, false); |
| 661 | error_count += dmatest_verify(thread->dsts, dst_off, |
| 662 | dst_off + len, src_off, |
| 663 | PATTERN_SRC | PATTERN_COPY, false); |
| 664 | error_count += dmatest_verify(thread->dsts, dst_off + len, |
| 665 | params->buf_size, dst_off + len, |
| 666 | PATTERN_DST, false); |
| 667 | |
| 668 | if (error_count) { |
| 669 | result("data error", total_tests, src_off, dst_off, |
| 670 | len, error_count); |
| 671 | failed_tests++; |
| 672 | } else { |
| 673 | dbg_result("test passed", total_tests, src_off, dst_off, |
| 674 | len, 0); |
| 675 | } |
| 676 | } |
| 677 | runtime = ktime_us_delta(ktime_get(), ktime); |
| 678 | |
| 679 | ret = 0; |
| 680 | for (i = 0; thread->dsts[i]; i++) |
| 681 | kfree(thread->dsts[i]); |
| 682 | err_dstbuf: |
| 683 | kfree(thread->dsts); |
| 684 | err_dsts: |
| 685 | for (i = 0; thread->srcs[i]; i++) |
| 686 | kfree(thread->srcs[i]); |
| 687 | err_srcbuf: |
| 688 | kfree(thread->srcs); |
| 689 | err_srcs: |
| 690 | kfree(pq_coefs); |
| 691 | err_thread_type: |
| 692 | pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n", |
| 693 | current->comm, total_tests, failed_tests, |
| 694 | dmatest_persec(runtime, total_tests), |
| 695 | dmatest_KBs(runtime, total_len), ret); |
| 696 | |
| 697 | /* terminate all transfers on specified channels */ |
| 698 | if (ret) |
| 699 | dmaengine_terminate_all(chan); |
| 700 | |
| 701 | thread->done = true; |
| 702 | wake_up(&thread_wait); |
| 703 | |
| 704 | return ret; |
| 705 | } |
| 706 | |
| 707 | static void dmatest_cleanup_channel(struct dmatest_chan *dtc) |
| 708 | { |
| 709 | struct dmatest_thread *thread; |
| 710 | struct dmatest_thread *_thread; |
| 711 | int ret; |
| 712 | |
| 713 | list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { |
| 714 | ret = kthread_stop(thread->task); |
| 715 | pr_debug("thread %s exited with status %d\n", |
| 716 | thread->task->comm, ret); |
| 717 | list_del(&thread->node); |
| 718 | put_task_struct(thread->task); |
| 719 | kfree(thread); |
| 720 | } |
| 721 | |
| 722 | /* terminate all transfers on specified channels */ |
| 723 | dmaengine_terminate_all(dtc->chan); |
| 724 | |
| 725 | kfree(dtc); |
| 726 | } |
| 727 | |
| 728 | static int dmatest_add_threads(struct dmatest_info *info, |
| 729 | struct dmatest_chan *dtc, enum dma_transaction_type type) |
| 730 | { |
| 731 | struct dmatest_params *params = &info->params; |
| 732 | struct dmatest_thread *thread; |
| 733 | struct dma_chan *chan = dtc->chan; |
| 734 | char *op; |
| 735 | unsigned int i; |
| 736 | |
| 737 | if (type == DMA_MEMCPY) |
| 738 | op = "copy"; |
| 739 | else if (type == DMA_XOR) |
| 740 | op = "xor"; |
| 741 | else if (type == DMA_PQ) |
| 742 | op = "pq"; |
| 743 | else |
| 744 | return -EINVAL; |
| 745 | |
| 746 | for (i = 0; i < params->threads_per_chan; i++) { |
| 747 | thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL); |
| 748 | if (!thread) { |
| 749 | pr_warn("No memory for %s-%s%u\n", |
| 750 | dma_chan_name(chan), op, i); |
| 751 | break; |
| 752 | } |
| 753 | thread->info = info; |
| 754 | thread->chan = dtc->chan; |
| 755 | thread->type = type; |
| 756 | smp_wmb(); |
| 757 | thread->task = kthread_create(dmatest_func, thread, "%s-%s%u", |
| 758 | dma_chan_name(chan), op, i); |
| 759 | if (IS_ERR(thread->task)) { |
| 760 | pr_warn("Failed to create thread %s-%s%u\n", |
| 761 | dma_chan_name(chan), op, i); |
| 762 | kfree(thread); |
| 763 | break; |
| 764 | } |
| 765 | |
| 766 | /* srcbuf and dstbuf are allocated by the thread itself */ |
| 767 | get_task_struct(thread->task); |
| 768 | list_add_tail(&thread->node, &dtc->threads); |
| 769 | wake_up_process(thread->task); |
| 770 | } |
| 771 | |
| 772 | return i; |
| 773 | } |
| 774 | |
| 775 | static int dmatest_add_channel(struct dmatest_info *info, |
| 776 | struct dma_chan *chan) |
| 777 | { |
| 778 | struct dmatest_chan *dtc; |
| 779 | struct dma_device *dma_dev = chan->device; |
| 780 | unsigned int thread_count = 0; |
| 781 | int cnt; |
| 782 | |
| 783 | dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); |
| 784 | if (!dtc) { |
| 785 | pr_warn("No memory for %s\n", dma_chan_name(chan)); |
| 786 | return -ENOMEM; |
| 787 | } |
| 788 | |
| 789 | dtc->chan = chan; |
| 790 | INIT_LIST_HEAD(&dtc->threads); |
| 791 | |
| 792 | if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { |
| 793 | cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); |
| 794 | thread_count += cnt > 0 ? cnt : 0; |
| 795 | } |
| 796 | if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { |
| 797 | cnt = dmatest_add_threads(info, dtc, DMA_XOR); |
| 798 | thread_count += cnt > 0 ? cnt : 0; |
| 799 | } |
| 800 | if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { |
| 801 | cnt = dmatest_add_threads(info, dtc, DMA_PQ); |
| 802 | thread_count += cnt > 0 ? cnt : 0; |
| 803 | } |
| 804 | |
| 805 | pr_info("Started %u threads using %s\n", |
| 806 | thread_count, dma_chan_name(chan)); |
| 807 | |
| 808 | list_add_tail(&dtc->node, &info->channels); |
| 809 | info->nr_channels++; |
| 810 | |
| 811 | return 0; |
| 812 | } |
| 813 | |
| 814 | static bool filter(struct dma_chan *chan, void *param) |
| 815 | { |
| 816 | struct dmatest_params *params = param; |
| 817 | |
| 818 | if (!dmatest_match_channel(params, chan) || |
| 819 | !dmatest_match_device(params, chan->device)) |
| 820 | return false; |
| 821 | else |
| 822 | return true; |
| 823 | } |
| 824 | |
| 825 | static void request_channels(struct dmatest_info *info, |
| 826 | enum dma_transaction_type type) |
| 827 | { |
| 828 | dma_cap_mask_t mask; |
| 829 | |
| 830 | dma_cap_zero(mask); |
| 831 | dma_cap_set(type, mask); |
| 832 | for (;;) { |
| 833 | struct dmatest_params *params = &info->params; |
| 834 | struct dma_chan *chan; |
| 835 | |
| 836 | chan = dma_request_channel(mask, filter, params); |
| 837 | if (chan) { |
| 838 | if (dmatest_add_channel(info, chan)) { |
| 839 | dma_release_channel(chan); |
| 840 | break; /* add_channel failed, punt */ |
| 841 | } |
| 842 | } else |
| 843 | break; /* no more channels available */ |
| 844 | if (params->max_channels && |
| 845 | info->nr_channels >= params->max_channels) |
| 846 | break; /* we have all we need */ |
| 847 | } |
| 848 | } |
| 849 | |
| 850 | static void run_threaded_test(struct dmatest_info *info) |
| 851 | { |
| 852 | struct dmatest_params *params = &info->params; |
| 853 | |
| 854 | /* Copy test parameters */ |
| 855 | params->buf_size = test_buf_size; |
| 856 | strlcpy(params->channel, strim(test_channel), sizeof(params->channel)); |
| 857 | strlcpy(params->device, strim(test_device), sizeof(params->device)); |
| 858 | params->threads_per_chan = threads_per_chan; |
| 859 | params->max_channels = max_channels; |
| 860 | params->iterations = iterations; |
| 861 | params->xor_sources = xor_sources; |
| 862 | params->pq_sources = pq_sources; |
| 863 | params->timeout = timeout; |
| 864 | params->noverify = noverify; |
| 865 | |
| 866 | request_channels(info, DMA_MEMCPY); |
| 867 | request_channels(info, DMA_XOR); |
| 868 | request_channels(info, DMA_PQ); |
| 869 | } |
| 870 | |
| 871 | static void stop_threaded_test(struct dmatest_info *info) |
| 872 | { |
| 873 | struct dmatest_chan *dtc, *_dtc; |
| 874 | struct dma_chan *chan; |
| 875 | |
| 876 | list_for_each_entry_safe(dtc, _dtc, &info->channels, node) { |
| 877 | list_del(&dtc->node); |
| 878 | chan = dtc->chan; |
| 879 | dmatest_cleanup_channel(dtc); |
| 880 | pr_debug("dropped channel %s\n", dma_chan_name(chan)); |
| 881 | dma_release_channel(chan); |
| 882 | } |
| 883 | |
| 884 | info->nr_channels = 0; |
| 885 | } |
| 886 | |
| 887 | static void restart_threaded_test(struct dmatest_info *info, bool run) |
| 888 | { |
| 889 | /* we might be called early to set run=, defer running until all |
| 890 | * parameters have been evaluated |
| 891 | */ |
| 892 | if (!info->did_init) |
| 893 | return; |
| 894 | |
| 895 | /* Stop any running test first */ |
| 896 | stop_threaded_test(info); |
| 897 | |
| 898 | /* Run test with new parameters */ |
| 899 | run_threaded_test(info); |
| 900 | } |
| 901 | |
| 902 | static int dmatest_run_get(char *val, const struct kernel_param *kp) |
| 903 | { |
| 904 | struct dmatest_info *info = &test_info; |
| 905 | |
| 906 | mutex_lock(&info->lock); |
| 907 | if (is_threaded_test_run(info)) { |
| 908 | dmatest_run = true; |
| 909 | } else { |
| 910 | stop_threaded_test(info); |
| 911 | dmatest_run = false; |
| 912 | } |
| 913 | mutex_unlock(&info->lock); |
| 914 | |
| 915 | return param_get_bool(val, kp); |
| 916 | } |
| 917 | |
| 918 | static int dmatest_run_set(const char *val, const struct kernel_param *kp) |
| 919 | { |
| 920 | struct dmatest_info *info = &test_info; |
| 921 | int ret; |
| 922 | |
| 923 | mutex_lock(&info->lock); |
| 924 | ret = param_set_bool(val, kp); |
| 925 | if (ret) { |
| 926 | mutex_unlock(&info->lock); |
| 927 | return ret; |
| 928 | } |
| 929 | |
| 930 | if (is_threaded_test_run(info)) |
| 931 | ret = -EBUSY; |
| 932 | else if (dmatest_run) |
| 933 | restart_threaded_test(info, dmatest_run); |
| 934 | |
| 935 | mutex_unlock(&info->lock); |
| 936 | |
| 937 | return ret; |
| 938 | } |
| 939 | |
| 940 | static int __init dmatest_init(void) |
| 941 | { |
| 942 | struct dmatest_info *info = &test_info; |
| 943 | struct dmatest_params *params = &info->params; |
| 944 | |
| 945 | if (dmatest_run) { |
| 946 | mutex_lock(&info->lock); |
| 947 | run_threaded_test(info); |
| 948 | mutex_unlock(&info->lock); |
| 949 | } |
| 950 | |
| 951 | if (params->iterations && wait) |
| 952 | wait_event(thread_wait, !is_threaded_test_run(info)); |
| 953 | |
| 954 | /* module parameters are stable, inittime tests are started, |
| 955 | * let userspace take over 'run' control |
| 956 | */ |
| 957 | info->did_init = true; |
| 958 | |
| 959 | return 0; |
| 960 | } |
| 961 | /* when compiled-in wait for drivers to load first */ |
| 962 | late_initcall(dmatest_init); |
| 963 | |
| 964 | static void __exit dmatest_exit(void) |
| 965 | { |
| 966 | struct dmatest_info *info = &test_info; |
| 967 | |
| 968 | mutex_lock(&info->lock); |
| 969 | stop_threaded_test(info); |
| 970 | mutex_unlock(&info->lock); |
| 971 | } |
| 972 | module_exit(dmatest_exit); |
| 973 | |
| 974 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
| 975 | MODULE_LICENSE("GPL v2"); |