| 1 | /* |
| 2 | * PCA953x 4/8/16/24/40 bit I/O ports |
| 3 | * |
| 4 | * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> |
| 5 | * Copyright (C) 2007 Marvell International Ltd. |
| 6 | * |
| 7 | * Derived from drivers/i2c/chips/pca9539.c |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; version 2 of the License. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/gpio.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/i2c.h> |
| 19 | #include <linux/platform_data/pca953x.h> |
| 20 | #include <linux/slab.h> |
| 21 | #ifdef CONFIG_OF_GPIO |
| 22 | #include <linux/of_platform.h> |
| 23 | #endif |
| 24 | |
| 25 | #define PCA953X_INPUT 0 |
| 26 | #define PCA953X_OUTPUT 1 |
| 27 | #define PCA953X_INVERT 2 |
| 28 | #define PCA953X_DIRECTION 3 |
| 29 | |
| 30 | #define REG_ADDR_AI 0x80 |
| 31 | |
| 32 | #define PCA957X_IN 0 |
| 33 | #define PCA957X_INVRT 1 |
| 34 | #define PCA957X_BKEN 2 |
| 35 | #define PCA957X_PUPD 3 |
| 36 | #define PCA957X_CFG 4 |
| 37 | #define PCA957X_OUT 5 |
| 38 | #define PCA957X_MSK 6 |
| 39 | #define PCA957X_INTS 7 |
| 40 | |
| 41 | #define PCA_GPIO_MASK 0x00FF |
| 42 | #define PCA_INT 0x0100 |
| 43 | #define PCA953X_TYPE 0x1000 |
| 44 | #define PCA957X_TYPE 0x2000 |
| 45 | |
| 46 | static const struct i2c_device_id pca953x_id[] = { |
| 47 | { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, |
| 48 | { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, |
| 49 | { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, |
| 50 | { "pca9536", 4 | PCA953X_TYPE, }, |
| 51 | { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, |
| 52 | { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, |
| 53 | { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, |
| 54 | { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, |
| 55 | { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, |
| 56 | { "pca9556", 8 | PCA953X_TYPE, }, |
| 57 | { "pca9557", 8 | PCA953X_TYPE, }, |
| 58 | { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, |
| 59 | { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, |
| 60 | { "pca9698", 40 | PCA953X_TYPE, }, |
| 61 | |
| 62 | { "max7310", 8 | PCA953X_TYPE, }, |
| 63 | { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, |
| 64 | { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, |
| 65 | { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, |
| 66 | { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, |
| 67 | { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, |
| 68 | { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, |
| 69 | { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, |
| 70 | { "xra1202", 8 | PCA953X_TYPE }, |
| 71 | { } |
| 72 | }; |
| 73 | MODULE_DEVICE_TABLE(i2c, pca953x_id); |
| 74 | |
| 75 | #define MAX_BANK 5 |
| 76 | #define BANK_SZ 8 |
| 77 | |
| 78 | #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ) |
| 79 | |
| 80 | struct pca953x_chip { |
| 81 | unsigned gpio_start; |
| 82 | u8 reg_output[MAX_BANK]; |
| 83 | u8 reg_direction[MAX_BANK]; |
| 84 | struct mutex i2c_lock; |
| 85 | |
| 86 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
| 87 | struct mutex irq_lock; |
| 88 | u8 irq_mask[MAX_BANK]; |
| 89 | u8 irq_stat[MAX_BANK]; |
| 90 | u8 irq_trig_raise[MAX_BANK]; |
| 91 | u8 irq_trig_fall[MAX_BANK]; |
| 92 | #endif |
| 93 | |
| 94 | struct i2c_client *client; |
| 95 | struct gpio_chip gpio_chip; |
| 96 | const char *const *names; |
| 97 | int chip_type; |
| 98 | }; |
| 99 | |
| 100 | static inline struct pca953x_chip *to_pca(struct gpio_chip *gc) |
| 101 | { |
| 102 | return container_of(gc, struct pca953x_chip, gpio_chip); |
| 103 | } |
| 104 | |
| 105 | static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, |
| 106 | int off) |
| 107 | { |
| 108 | int ret; |
| 109 | int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
| 110 | int offset = off / BANK_SZ; |
| 111 | |
| 112 | ret = i2c_smbus_read_byte_data(chip->client, |
| 113 | (reg << bank_shift) + offset); |
| 114 | *val = ret; |
| 115 | |
| 116 | if (ret < 0) { |
| 117 | dev_err(&chip->client->dev, "failed reading register\n"); |
| 118 | return ret; |
| 119 | } |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, |
| 125 | int off) |
| 126 | { |
| 127 | int ret = 0; |
| 128 | int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
| 129 | int offset = off / BANK_SZ; |
| 130 | |
| 131 | ret = i2c_smbus_write_byte_data(chip->client, |
| 132 | (reg << bank_shift) + offset, val); |
| 133 | |
| 134 | if (ret < 0) { |
| 135 | dev_err(&chip->client->dev, "failed writing register\n"); |
| 136 | return ret; |
| 137 | } |
| 138 | |
| 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) |
| 143 | { |
| 144 | int ret = 0; |
| 145 | |
| 146 | if (chip->gpio_chip.ngpio <= 8) |
| 147 | ret = i2c_smbus_write_byte_data(chip->client, reg, *val); |
| 148 | else if (chip->gpio_chip.ngpio >= 24) { |
| 149 | int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
| 150 | ret = i2c_smbus_write_i2c_block_data(chip->client, |
| 151 | (reg << bank_shift) | REG_ADDR_AI, |
| 152 | NBANK(chip), val); |
| 153 | } else { |
| 154 | switch (chip->chip_type) { |
| 155 | case PCA953X_TYPE: |
| 156 | ret = i2c_smbus_write_word_data(chip->client, |
| 157 | reg << 1, (u16) *val); |
| 158 | break; |
| 159 | case PCA957X_TYPE: |
| 160 | ret = i2c_smbus_write_byte_data(chip->client, reg << 1, |
| 161 | val[0]); |
| 162 | if (ret < 0) |
| 163 | break; |
| 164 | ret = i2c_smbus_write_byte_data(chip->client, |
| 165 | (reg << 1) + 1, |
| 166 | val[1]); |
| 167 | break; |
| 168 | } |
| 169 | } |
| 170 | |
| 171 | if (ret < 0) { |
| 172 | dev_err(&chip->client->dev, "failed writing register\n"); |
| 173 | return ret; |
| 174 | } |
| 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
| 179 | static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) |
| 180 | { |
| 181 | int ret; |
| 182 | |
| 183 | if (chip->gpio_chip.ngpio <= 8) { |
| 184 | ret = i2c_smbus_read_byte_data(chip->client, reg); |
| 185 | *val = ret; |
| 186 | } else if (chip->gpio_chip.ngpio >= 24) { |
| 187 | int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); |
| 188 | |
| 189 | ret = i2c_smbus_read_i2c_block_data(chip->client, |
| 190 | (reg << bank_shift) | REG_ADDR_AI, |
| 191 | NBANK(chip), val); |
| 192 | } else { |
| 193 | ret = i2c_smbus_read_word_data(chip->client, reg << 1); |
| 194 | val[0] = (u16)ret & 0xFF; |
| 195 | val[1] = (u16)ret >> 8; |
| 196 | } |
| 197 | if (ret < 0) { |
| 198 | dev_err(&chip->client->dev, "failed reading register\n"); |
| 199 | return ret; |
| 200 | } |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
| 206 | { |
| 207 | struct pca953x_chip *chip = to_pca(gc); |
| 208 | u8 reg_val; |
| 209 | int ret, offset = 0; |
| 210 | |
| 211 | mutex_lock(&chip->i2c_lock); |
| 212 | reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); |
| 213 | |
| 214 | switch (chip->chip_type) { |
| 215 | case PCA953X_TYPE: |
| 216 | offset = PCA953X_DIRECTION; |
| 217 | break; |
| 218 | case PCA957X_TYPE: |
| 219 | offset = PCA957X_CFG; |
| 220 | break; |
| 221 | } |
| 222 | ret = pca953x_write_single(chip, offset, reg_val, off); |
| 223 | if (ret) |
| 224 | goto exit; |
| 225 | |
| 226 | chip->reg_direction[off / BANK_SZ] = reg_val; |
| 227 | ret = 0; |
| 228 | exit: |
| 229 | mutex_unlock(&chip->i2c_lock); |
| 230 | return ret; |
| 231 | } |
| 232 | |
| 233 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
| 234 | unsigned off, int val) |
| 235 | { |
| 236 | struct pca953x_chip *chip = to_pca(gc); |
| 237 | u8 reg_val; |
| 238 | int ret, offset = 0; |
| 239 | |
| 240 | mutex_lock(&chip->i2c_lock); |
| 241 | /* set output level */ |
| 242 | if (val) |
| 243 | reg_val = chip->reg_output[off / BANK_SZ] |
| 244 | | (1u << (off % BANK_SZ)); |
| 245 | else |
| 246 | reg_val = chip->reg_output[off / BANK_SZ] |
| 247 | & ~(1u << (off % BANK_SZ)); |
| 248 | |
| 249 | switch (chip->chip_type) { |
| 250 | case PCA953X_TYPE: |
| 251 | offset = PCA953X_OUTPUT; |
| 252 | break; |
| 253 | case PCA957X_TYPE: |
| 254 | offset = PCA957X_OUT; |
| 255 | break; |
| 256 | } |
| 257 | ret = pca953x_write_single(chip, offset, reg_val, off); |
| 258 | if (ret) |
| 259 | goto exit; |
| 260 | |
| 261 | chip->reg_output[off / BANK_SZ] = reg_val; |
| 262 | |
| 263 | /* then direction */ |
| 264 | reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); |
| 265 | switch (chip->chip_type) { |
| 266 | case PCA953X_TYPE: |
| 267 | offset = PCA953X_DIRECTION; |
| 268 | break; |
| 269 | case PCA957X_TYPE: |
| 270 | offset = PCA957X_CFG; |
| 271 | break; |
| 272 | } |
| 273 | ret = pca953x_write_single(chip, offset, reg_val, off); |
| 274 | if (ret) |
| 275 | goto exit; |
| 276 | |
| 277 | chip->reg_direction[off / BANK_SZ] = reg_val; |
| 278 | ret = 0; |
| 279 | exit: |
| 280 | mutex_unlock(&chip->i2c_lock); |
| 281 | return ret; |
| 282 | } |
| 283 | |
| 284 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
| 285 | { |
| 286 | struct pca953x_chip *chip = to_pca(gc); |
| 287 | u32 reg_val; |
| 288 | int ret, offset = 0; |
| 289 | |
| 290 | mutex_lock(&chip->i2c_lock); |
| 291 | switch (chip->chip_type) { |
| 292 | case PCA953X_TYPE: |
| 293 | offset = PCA953X_INPUT; |
| 294 | break; |
| 295 | case PCA957X_TYPE: |
| 296 | offset = PCA957X_IN; |
| 297 | break; |
| 298 | } |
| 299 | ret = pca953x_read_single(chip, offset, ®_val, off); |
| 300 | mutex_unlock(&chip->i2c_lock); |
| 301 | if (ret < 0) { |
| 302 | /* NOTE: diagnostic already emitted; that's all we should |
| 303 | * do unless gpio_*_value_cansleep() calls become different |
| 304 | * from their nonsleeping siblings (and report faults). |
| 305 | */ |
| 306 | return 0; |
| 307 | } |
| 308 | |
| 309 | return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; |
| 310 | } |
| 311 | |
| 312 | static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
| 313 | { |
| 314 | struct pca953x_chip *chip = to_pca(gc); |
| 315 | u8 reg_val; |
| 316 | int ret, offset = 0; |
| 317 | |
| 318 | mutex_lock(&chip->i2c_lock); |
| 319 | if (val) |
| 320 | reg_val = chip->reg_output[off / BANK_SZ] |
| 321 | | (1u << (off % BANK_SZ)); |
| 322 | else |
| 323 | reg_val = chip->reg_output[off / BANK_SZ] |
| 324 | & ~(1u << (off % BANK_SZ)); |
| 325 | |
| 326 | switch (chip->chip_type) { |
| 327 | case PCA953X_TYPE: |
| 328 | offset = PCA953X_OUTPUT; |
| 329 | break; |
| 330 | case PCA957X_TYPE: |
| 331 | offset = PCA957X_OUT; |
| 332 | break; |
| 333 | } |
| 334 | ret = pca953x_write_single(chip, offset, reg_val, off); |
| 335 | if (ret) |
| 336 | goto exit; |
| 337 | |
| 338 | chip->reg_output[off / BANK_SZ] = reg_val; |
| 339 | exit: |
| 340 | mutex_unlock(&chip->i2c_lock); |
| 341 | } |
| 342 | |
| 343 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
| 344 | { |
| 345 | struct gpio_chip *gc; |
| 346 | |
| 347 | gc = &chip->gpio_chip; |
| 348 | |
| 349 | gc->direction_input = pca953x_gpio_direction_input; |
| 350 | gc->direction_output = pca953x_gpio_direction_output; |
| 351 | gc->get = pca953x_gpio_get_value; |
| 352 | gc->set = pca953x_gpio_set_value; |
| 353 | gc->can_sleep = true; |
| 354 | |
| 355 | gc->base = chip->gpio_start; |
| 356 | gc->ngpio = gpios; |
| 357 | gc->label = chip->client->name; |
| 358 | gc->dev = &chip->client->dev; |
| 359 | gc->owner = THIS_MODULE; |
| 360 | gc->names = chip->names; |
| 361 | } |
| 362 | |
| 363 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
| 364 | static void pca953x_irq_mask(struct irq_data *d) |
| 365 | { |
| 366 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 367 | struct pca953x_chip *chip = to_pca(gc); |
| 368 | |
| 369 | chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); |
| 370 | } |
| 371 | |
| 372 | static void pca953x_irq_unmask(struct irq_data *d) |
| 373 | { |
| 374 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 375 | struct pca953x_chip *chip = to_pca(gc); |
| 376 | |
| 377 | chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); |
| 378 | } |
| 379 | |
| 380 | static void pca953x_irq_bus_lock(struct irq_data *d) |
| 381 | { |
| 382 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 383 | struct pca953x_chip *chip = to_pca(gc); |
| 384 | |
| 385 | mutex_lock(&chip->irq_lock); |
| 386 | } |
| 387 | |
| 388 | static void pca953x_irq_bus_sync_unlock(struct irq_data *d) |
| 389 | { |
| 390 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 391 | struct pca953x_chip *chip = to_pca(gc); |
| 392 | u8 new_irqs; |
| 393 | int level, i; |
| 394 | |
| 395 | /* Look for any newly setup interrupt */ |
| 396 | for (i = 0; i < NBANK(chip); i++) { |
| 397 | new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; |
| 398 | new_irqs &= ~chip->reg_direction[i]; |
| 399 | |
| 400 | while (new_irqs) { |
| 401 | level = __ffs(new_irqs); |
| 402 | pca953x_gpio_direction_input(&chip->gpio_chip, |
| 403 | level + (BANK_SZ * i)); |
| 404 | new_irqs &= ~(1 << level); |
| 405 | } |
| 406 | } |
| 407 | |
| 408 | mutex_unlock(&chip->irq_lock); |
| 409 | } |
| 410 | |
| 411 | static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) |
| 412 | { |
| 413 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
| 414 | struct pca953x_chip *chip = to_pca(gc); |
| 415 | int bank_nb = d->hwirq / BANK_SZ; |
| 416 | u8 mask = 1 << (d->hwirq % BANK_SZ); |
| 417 | |
| 418 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { |
| 419 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", |
| 420 | d->irq, type); |
| 421 | return -EINVAL; |
| 422 | } |
| 423 | |
| 424 | if (type & IRQ_TYPE_EDGE_FALLING) |
| 425 | chip->irq_trig_fall[bank_nb] |= mask; |
| 426 | else |
| 427 | chip->irq_trig_fall[bank_nb] &= ~mask; |
| 428 | |
| 429 | if (type & IRQ_TYPE_EDGE_RISING) |
| 430 | chip->irq_trig_raise[bank_nb] |= mask; |
| 431 | else |
| 432 | chip->irq_trig_raise[bank_nb] &= ~mask; |
| 433 | |
| 434 | return 0; |
| 435 | } |
| 436 | |
| 437 | static struct irq_chip pca953x_irq_chip = { |
| 438 | .name = "pca953x", |
| 439 | .irq_mask = pca953x_irq_mask, |
| 440 | .irq_unmask = pca953x_irq_unmask, |
| 441 | .irq_bus_lock = pca953x_irq_bus_lock, |
| 442 | .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, |
| 443 | .irq_set_type = pca953x_irq_set_type, |
| 444 | }; |
| 445 | |
| 446 | static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) |
| 447 | { |
| 448 | u8 cur_stat[MAX_BANK]; |
| 449 | u8 old_stat[MAX_BANK]; |
| 450 | bool pending_seen = false; |
| 451 | bool trigger_seen = false; |
| 452 | u8 trigger[MAX_BANK]; |
| 453 | int ret, i, offset = 0; |
| 454 | |
| 455 | switch (chip->chip_type) { |
| 456 | case PCA953X_TYPE: |
| 457 | offset = PCA953X_INPUT; |
| 458 | break; |
| 459 | case PCA957X_TYPE: |
| 460 | offset = PCA957X_IN; |
| 461 | break; |
| 462 | } |
| 463 | ret = pca953x_read_regs(chip, offset, cur_stat); |
| 464 | if (ret) |
| 465 | return false; |
| 466 | |
| 467 | /* Remove output pins from the equation */ |
| 468 | for (i = 0; i < NBANK(chip); i++) |
| 469 | cur_stat[i] &= chip->reg_direction[i]; |
| 470 | |
| 471 | memcpy(old_stat, chip->irq_stat, NBANK(chip)); |
| 472 | |
| 473 | for (i = 0; i < NBANK(chip); i++) { |
| 474 | trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; |
| 475 | if (trigger[i]) |
| 476 | trigger_seen = true; |
| 477 | } |
| 478 | |
| 479 | if (!trigger_seen) |
| 480 | return false; |
| 481 | |
| 482 | memcpy(chip->irq_stat, cur_stat, NBANK(chip)); |
| 483 | |
| 484 | for (i = 0; i < NBANK(chip); i++) { |
| 485 | pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | |
| 486 | (cur_stat[i] & chip->irq_trig_raise[i]); |
| 487 | pending[i] &= trigger[i]; |
| 488 | if (pending[i]) |
| 489 | pending_seen = true; |
| 490 | } |
| 491 | |
| 492 | return pending_seen; |
| 493 | } |
| 494 | |
| 495 | static irqreturn_t pca953x_irq_handler(int irq, void *devid) |
| 496 | { |
| 497 | struct pca953x_chip *chip = devid; |
| 498 | u8 pending[MAX_BANK]; |
| 499 | u8 level; |
| 500 | unsigned nhandled = 0; |
| 501 | int i; |
| 502 | |
| 503 | if (!pca953x_irq_pending(chip, pending)) |
| 504 | return IRQ_NONE; |
| 505 | |
| 506 | for (i = 0; i < NBANK(chip); i++) { |
| 507 | while (pending[i]) { |
| 508 | level = __ffs(pending[i]); |
| 509 | handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, |
| 510 | level + (BANK_SZ * i))); |
| 511 | pending[i] &= ~(1 << level); |
| 512 | nhandled++; |
| 513 | } |
| 514 | } |
| 515 | |
| 516 | return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; |
| 517 | } |
| 518 | |
| 519 | static int pca953x_irq_setup(struct pca953x_chip *chip, |
| 520 | const struct i2c_device_id *id, |
| 521 | int irq_base) |
| 522 | { |
| 523 | struct i2c_client *client = chip->client; |
| 524 | int ret, i, offset = 0; |
| 525 | |
| 526 | if (client->irq && irq_base != -1 |
| 527 | && (id->driver_data & PCA_INT)) { |
| 528 | |
| 529 | switch (chip->chip_type) { |
| 530 | case PCA953X_TYPE: |
| 531 | offset = PCA953X_INPUT; |
| 532 | break; |
| 533 | case PCA957X_TYPE: |
| 534 | offset = PCA957X_IN; |
| 535 | break; |
| 536 | } |
| 537 | ret = pca953x_read_regs(chip, offset, chip->irq_stat); |
| 538 | if (ret) |
| 539 | return ret; |
| 540 | |
| 541 | /* |
| 542 | * There is no way to know which GPIO line generated the |
| 543 | * interrupt. We have to rely on the previous read for |
| 544 | * this purpose. |
| 545 | */ |
| 546 | for (i = 0; i < NBANK(chip); i++) |
| 547 | chip->irq_stat[i] &= chip->reg_direction[i]; |
| 548 | mutex_init(&chip->irq_lock); |
| 549 | |
| 550 | ret = devm_request_threaded_irq(&client->dev, |
| 551 | client->irq, |
| 552 | NULL, |
| 553 | pca953x_irq_handler, |
| 554 | IRQF_TRIGGER_LOW | IRQF_ONESHOT | |
| 555 | IRQF_SHARED, |
| 556 | dev_name(&client->dev), chip); |
| 557 | if (ret) { |
| 558 | dev_err(&client->dev, "failed to request irq %d\n", |
| 559 | client->irq); |
| 560 | return ret; |
| 561 | } |
| 562 | |
| 563 | ret = gpiochip_irqchip_add(&chip->gpio_chip, |
| 564 | &pca953x_irq_chip, |
| 565 | irq_base, |
| 566 | handle_simple_irq, |
| 567 | IRQ_TYPE_NONE); |
| 568 | if (ret) { |
| 569 | dev_err(&client->dev, |
| 570 | "could not connect irqchip to gpiochip\n"); |
| 571 | return ret; |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | return 0; |
| 576 | } |
| 577 | |
| 578 | #else /* CONFIG_GPIO_PCA953X_IRQ */ |
| 579 | static int pca953x_irq_setup(struct pca953x_chip *chip, |
| 580 | const struct i2c_device_id *id, |
| 581 | int irq_base) |
| 582 | { |
| 583 | struct i2c_client *client = chip->client; |
| 584 | |
| 585 | if (irq_base != -1 && (id->driver_data & PCA_INT)) |
| 586 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
| 587 | |
| 588 | return 0; |
| 589 | } |
| 590 | #endif |
| 591 | |
| 592 | static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) |
| 593 | { |
| 594 | int ret; |
| 595 | u8 val[MAX_BANK]; |
| 596 | |
| 597 | ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); |
| 598 | if (ret) |
| 599 | goto out; |
| 600 | |
| 601 | ret = pca953x_read_regs(chip, PCA953X_DIRECTION, |
| 602 | chip->reg_direction); |
| 603 | if (ret) |
| 604 | goto out; |
| 605 | |
| 606 | /* set platform specific polarity inversion */ |
| 607 | if (invert) |
| 608 | memset(val, 0xFF, NBANK(chip)); |
| 609 | else |
| 610 | memset(val, 0, NBANK(chip)); |
| 611 | |
| 612 | ret = pca953x_write_regs(chip, PCA953X_INVERT, val); |
| 613 | out: |
| 614 | return ret; |
| 615 | } |
| 616 | |
| 617 | static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) |
| 618 | { |
| 619 | int ret; |
| 620 | u8 val[MAX_BANK]; |
| 621 | |
| 622 | ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); |
| 623 | if (ret) |
| 624 | goto out; |
| 625 | ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); |
| 626 | if (ret) |
| 627 | goto out; |
| 628 | |
| 629 | /* set platform specific polarity inversion */ |
| 630 | if (invert) |
| 631 | memset(val, 0xFF, NBANK(chip)); |
| 632 | else |
| 633 | memset(val, 0, NBANK(chip)); |
| 634 | pca953x_write_regs(chip, PCA957X_INVRT, val); |
| 635 | |
| 636 | /* To enable register 6, 7 to control pull up and pull down */ |
| 637 | memset(val, 0x02, NBANK(chip)); |
| 638 | pca953x_write_regs(chip, PCA957X_BKEN, val); |
| 639 | |
| 640 | return 0; |
| 641 | out: |
| 642 | return ret; |
| 643 | } |
| 644 | |
| 645 | static int pca953x_probe(struct i2c_client *client, |
| 646 | const struct i2c_device_id *id) |
| 647 | { |
| 648 | struct pca953x_platform_data *pdata; |
| 649 | struct pca953x_chip *chip; |
| 650 | int irq_base = 0; |
| 651 | int ret; |
| 652 | u32 invert = 0; |
| 653 | |
| 654 | chip = devm_kzalloc(&client->dev, |
| 655 | sizeof(struct pca953x_chip), GFP_KERNEL); |
| 656 | if (chip == NULL) |
| 657 | return -ENOMEM; |
| 658 | |
| 659 | pdata = dev_get_platdata(&client->dev); |
| 660 | if (pdata) { |
| 661 | irq_base = pdata->irq_base; |
| 662 | chip->gpio_start = pdata->gpio_base; |
| 663 | invert = pdata->invert; |
| 664 | chip->names = pdata->names; |
| 665 | } else { |
| 666 | chip->gpio_start = -1; |
| 667 | irq_base = 0; |
| 668 | } |
| 669 | |
| 670 | chip->client = client; |
| 671 | |
| 672 | chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); |
| 673 | |
| 674 | mutex_init(&chip->i2c_lock); |
| 675 | |
| 676 | /* initialize cached registers from their original values. |
| 677 | * we can't share this chip with another i2c master. |
| 678 | */ |
| 679 | pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); |
| 680 | |
| 681 | if (chip->chip_type == PCA953X_TYPE) |
| 682 | ret = device_pca953x_init(chip, invert); |
| 683 | else |
| 684 | ret = device_pca957x_init(chip, invert); |
| 685 | if (ret) |
| 686 | return ret; |
| 687 | |
| 688 | ret = gpiochip_add(&chip->gpio_chip); |
| 689 | if (ret) |
| 690 | return ret; |
| 691 | |
| 692 | ret = pca953x_irq_setup(chip, id, irq_base); |
| 693 | if (ret) |
| 694 | return ret; |
| 695 | |
| 696 | if (pdata && pdata->setup) { |
| 697 | ret = pdata->setup(client, chip->gpio_chip.base, |
| 698 | chip->gpio_chip.ngpio, pdata->context); |
| 699 | if (ret < 0) |
| 700 | dev_warn(&client->dev, "setup failed, %d\n", ret); |
| 701 | } |
| 702 | |
| 703 | i2c_set_clientdata(client, chip); |
| 704 | return 0; |
| 705 | } |
| 706 | |
| 707 | static int pca953x_remove(struct i2c_client *client) |
| 708 | { |
| 709 | struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); |
| 710 | struct pca953x_chip *chip = i2c_get_clientdata(client); |
| 711 | int ret = 0; |
| 712 | |
| 713 | if (pdata && pdata->teardown) { |
| 714 | ret = pdata->teardown(client, chip->gpio_chip.base, |
| 715 | chip->gpio_chip.ngpio, pdata->context); |
| 716 | if (ret < 0) { |
| 717 | dev_err(&client->dev, "%s failed, %d\n", |
| 718 | "teardown", ret); |
| 719 | return ret; |
| 720 | } |
| 721 | } |
| 722 | |
| 723 | gpiochip_remove(&chip->gpio_chip); |
| 724 | |
| 725 | return 0; |
| 726 | } |
| 727 | |
| 728 | static const struct of_device_id pca953x_dt_ids[] = { |
| 729 | { .compatible = "nxp,pca9505", }, |
| 730 | { .compatible = "nxp,pca9534", }, |
| 731 | { .compatible = "nxp,pca9535", }, |
| 732 | { .compatible = "nxp,pca9536", }, |
| 733 | { .compatible = "nxp,pca9537", }, |
| 734 | { .compatible = "nxp,pca9538", }, |
| 735 | { .compatible = "nxp,pca9539", }, |
| 736 | { .compatible = "nxp,pca9554", }, |
| 737 | { .compatible = "nxp,pca9555", }, |
| 738 | { .compatible = "nxp,pca9556", }, |
| 739 | { .compatible = "nxp,pca9557", }, |
| 740 | { .compatible = "nxp,pca9574", }, |
| 741 | { .compatible = "nxp,pca9575", }, |
| 742 | { .compatible = "nxp,pca9698", }, |
| 743 | |
| 744 | { .compatible = "maxim,max7310", }, |
| 745 | { .compatible = "maxim,max7312", }, |
| 746 | { .compatible = "maxim,max7313", }, |
| 747 | { .compatible = "maxim,max7315", }, |
| 748 | |
| 749 | { .compatible = "ti,pca6107", }, |
| 750 | { .compatible = "ti,tca6408", }, |
| 751 | { .compatible = "ti,tca6416", }, |
| 752 | { .compatible = "ti,tca6424", }, |
| 753 | |
| 754 | { .compatible = "exar,xra1202", }, |
| 755 | { } |
| 756 | }; |
| 757 | |
| 758 | MODULE_DEVICE_TABLE(of, pca953x_dt_ids); |
| 759 | |
| 760 | static struct i2c_driver pca953x_driver = { |
| 761 | .driver = { |
| 762 | .name = "pca953x", |
| 763 | .of_match_table = pca953x_dt_ids, |
| 764 | }, |
| 765 | .probe = pca953x_probe, |
| 766 | .remove = pca953x_remove, |
| 767 | .id_table = pca953x_id, |
| 768 | }; |
| 769 | |
| 770 | static int __init pca953x_init(void) |
| 771 | { |
| 772 | return i2c_add_driver(&pca953x_driver); |
| 773 | } |
| 774 | /* register after i2c postcore initcall and before |
| 775 | * subsys initcalls that may rely on these GPIOs |
| 776 | */ |
| 777 | subsys_initcall(pca953x_init); |
| 778 | |
| 779 | static void __exit pca953x_exit(void) |
| 780 | { |
| 781 | i2c_del_driver(&pca953x_driver); |
| 782 | } |
| 783 | module_exit(pca953x_exit); |
| 784 | |
| 785 | MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); |
| 786 | MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); |
| 787 | MODULE_LICENSE("GPL"); |