projects / deliverable / linux.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Merge tag 'v3.7-rc2' into drm-intel-next-queued
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_crt.c
... / ...
CommitLineData
1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/dmi.h>
28#include <linux/i2c.h>
29#include <linux/slab.h>
30#include <drm/drmP.h>
31#include <drm/drm_crtc.h>
32#include <drm/drm_crtc_helper.h>
33#include <drm/drm_edid.h>
34#include "intel_drv.h"
35#include <drm/i915_drm.h>
36#include "i915_drv.h"
37
38/* Here's the desired hotplug mode */
39#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
45
46struct intel_crt {
47 struct intel_encoder base;
48 bool force_hotplug_required;
49 u32 adpa_reg;
50};
51
52static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
53{
54 return container_of(intel_attached_encoder(connector),
55 struct intel_crt, base);
56}
57
58static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
59{
60 return container_of(encoder, struct intel_crt, base);
61}
62
63static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
64 enum pipe *pipe)
65{
66 struct drm_device *dev = encoder->base.dev;
67 struct drm_i915_private *dev_priv = dev->dev_private;
68 struct intel_crt *crt = intel_encoder_to_crt(encoder);
69 u32 tmp;
70
71 tmp = I915_READ(crt->adpa_reg);
72
73 if (!(tmp & ADPA_DAC_ENABLE))
74 return false;
75
76 if (HAS_PCH_CPT(dev))
77 *pipe = PORT_TO_PIPE_CPT(tmp);
78 else
79 *pipe = PORT_TO_PIPE(tmp);
80
81 return true;
82}
83
84static void intel_disable_crt(struct intel_encoder *encoder)
85{
86 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
87 struct intel_crt *crt = intel_encoder_to_crt(encoder);
88 u32 temp;
89
90 temp = I915_READ(crt->adpa_reg);
91 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
92 temp &= ~ADPA_DAC_ENABLE;
93 I915_WRITE(crt->adpa_reg, temp);
94}
95
96static void intel_enable_crt(struct intel_encoder *encoder)
97{
98 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
99 struct intel_crt *crt = intel_encoder_to_crt(encoder);
100 u32 temp;
101
102 temp = I915_READ(crt->adpa_reg);
103 temp |= ADPA_DAC_ENABLE;
104 I915_WRITE(crt->adpa_reg, temp);
105}
106
107/* Note: The caller is required to filter out dpms modes not supported by the
108 * platform. */
109static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
110{
111 struct drm_device *dev = encoder->base.dev;
112 struct drm_i915_private *dev_priv = dev->dev_private;
113 struct intel_crt *crt = intel_encoder_to_crt(encoder);
114 u32 temp;
115
116 temp = I915_READ(crt->adpa_reg);
117 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
118 temp &= ~ADPA_DAC_ENABLE;
119
120 switch (mode) {
121 case DRM_MODE_DPMS_ON:
122 temp |= ADPA_DAC_ENABLE;
123 break;
124 case DRM_MODE_DPMS_STANDBY:
125 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
126 break;
127 case DRM_MODE_DPMS_SUSPEND:
128 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
129 break;
130 case DRM_MODE_DPMS_OFF:
131 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
132 break;
133 }
134
135 I915_WRITE(crt->adpa_reg, temp);
136}
137
138static void intel_crt_dpms(struct drm_connector *connector, int mode)
139{
140 struct drm_device *dev = connector->dev;
141 struct intel_encoder *encoder = intel_attached_encoder(connector);
142 struct drm_crtc *crtc;
143 int old_dpms;
144
145 /* PCH platforms and VLV only support on/off. */
146 if (INTEL_INFO(dev)->gen < 5 && mode != DRM_MODE_DPMS_ON)
147 mode = DRM_MODE_DPMS_OFF;
148
149 if (mode == connector->dpms)
150 return;
151
152 old_dpms = connector->dpms;
153 connector->dpms = mode;
154
155 /* Only need to change hw state when actually enabled */
156 crtc = encoder->base.crtc;
157 if (!crtc) {
158 encoder->connectors_active = false;
159 return;
160 }
161
162 /* We need the pipe to run for anything but OFF. */
163 if (mode == DRM_MODE_DPMS_OFF)
164 encoder->connectors_active = false;
165 else
166 encoder->connectors_active = true;
167
168 if (mode < old_dpms) {
169 /* From off to on, enable the pipe first. */
170 intel_crtc_update_dpms(crtc);
171
172 intel_crt_set_dpms(encoder, mode);
173 } else {
174 intel_crt_set_dpms(encoder, mode);
175
176 intel_crtc_update_dpms(crtc);
177 }
178
179 intel_modeset_check_state(connector->dev);
180}
181
182static int intel_crt_mode_valid(struct drm_connector *connector,
183 struct drm_display_mode *mode)
184{
185 struct drm_device *dev = connector->dev;
186
187 int max_clock = 0;
188 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
189 return MODE_NO_DBLESCAN;
190
191 if (mode->clock < 25000)
192 return MODE_CLOCK_LOW;
193
194 if (IS_GEN2(dev))
195 max_clock = 350000;
196 else
197 max_clock = 400000;
198 if (mode->clock > max_clock)
199 return MODE_CLOCK_HIGH;
200
201 return MODE_OK;
202}
203
204static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
205 const struct drm_display_mode *mode,
206 struct drm_display_mode *adjusted_mode)
207{
208 return true;
209}
210
211static void intel_crt_mode_set(struct drm_encoder *encoder,
212 struct drm_display_mode *mode,
213 struct drm_display_mode *adjusted_mode)
214{
215
216 struct drm_device *dev = encoder->dev;
217 struct drm_crtc *crtc = encoder->crtc;
218 struct intel_crt *crt =
219 intel_encoder_to_crt(to_intel_encoder(encoder));
220 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
221 struct drm_i915_private *dev_priv = dev->dev_private;
222 int dpll_md_reg;
223 u32 adpa, dpll_md;
224
225 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
226
227 /*
228 * Disable separate mode multiplier used when cloning SDVO to CRT
229 * XXX this needs to be adjusted when we really are cloning
230 */
231 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
232 dpll_md = I915_READ(dpll_md_reg);
233 I915_WRITE(dpll_md_reg,
234 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
235 }
236
237 if (HAS_PCH_SPLIT(dev))
238 adpa = ADPA_HOTPLUG_BITS;
239 else
240 adpa = 0;
241
242 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
243 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
244 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
245 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
246
247 /* For CPT allow 3 pipe config, for others just use A or B */
248 if (HAS_PCH_CPT(dev))
249 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
250 else if (intel_crtc->pipe == 0)
251 adpa |= ADPA_PIPE_A_SELECT;
252 else
253 adpa |= ADPA_PIPE_B_SELECT;
254
255 if (!HAS_PCH_SPLIT(dev))
256 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
257
258 I915_WRITE(crt->adpa_reg, adpa);
259}
260
261static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
262{
263 struct drm_device *dev = connector->dev;
264 struct intel_crt *crt = intel_attached_crt(connector);
265 struct drm_i915_private *dev_priv = dev->dev_private;
266 u32 adpa;
267 bool ret;
268
269 /* The first time through, trigger an explicit detection cycle */
270 if (crt->force_hotplug_required) {
271 bool turn_off_dac = HAS_PCH_SPLIT(dev);
272 u32 save_adpa;
273
274 crt->force_hotplug_required = 0;
275
276 save_adpa = adpa = I915_READ(PCH_ADPA);
277 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
278
279 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
280 if (turn_off_dac)
281 adpa &= ~ADPA_DAC_ENABLE;
282
283 I915_WRITE(PCH_ADPA, adpa);
284
285 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
286 1000))
287 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
288
289 if (turn_off_dac) {
290 I915_WRITE(PCH_ADPA, save_adpa);
291 POSTING_READ(PCH_ADPA);
292 }
293 }
294
295 /* Check the status to see if both blue and green are on now */
296 adpa = I915_READ(PCH_ADPA);
297 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
298 ret = true;
299 else
300 ret = false;
301 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
302
303 return ret;
304}
305
306static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
307{
308 struct drm_device *dev = connector->dev;
309 struct drm_i915_private *dev_priv = dev->dev_private;
310 u32 adpa;
311 bool ret;
312 u32 save_adpa;
313
314 save_adpa = adpa = I915_READ(ADPA);
315 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
316
317 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
318
319 I915_WRITE(ADPA, adpa);
320
321 if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
322 1000)) {
323 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
324 I915_WRITE(ADPA, save_adpa);
325 }
326
327 /* Check the status to see if both blue and green are on now */
328 adpa = I915_READ(ADPA);
329 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
330 ret = true;
331 else
332 ret = false;
333
334 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
335
336 /* FIXME: debug force function and remove */
337 ret = true;
338
339 return ret;
340}
341
342/**
343 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
344 *
345 * Not for i915G/i915GM
346 *
347 * \return true if CRT is connected.
348 * \return false if CRT is disconnected.
349 */
350static bool intel_crt_detect_hotplug(struct drm_connector *connector)
351{
352 struct drm_device *dev = connector->dev;
353 struct drm_i915_private *dev_priv = dev->dev_private;
354 u32 hotplug_en, orig, stat;
355 bool ret = false;
356 int i, tries = 0;
357
358 if (HAS_PCH_SPLIT(dev))
359 return intel_ironlake_crt_detect_hotplug(connector);
360
361 if (IS_VALLEYVIEW(dev))
362 return valleyview_crt_detect_hotplug(connector);
363
364 /*
365 * On 4 series desktop, CRT detect sequence need to be done twice
366 * to get a reliable result.
367 */
368
369 if (IS_G4X(dev) && !IS_GM45(dev))
370 tries = 2;
371 else
372 tries = 1;
373 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
374 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
375
376 for (i = 0; i < tries ; i++) {
377 /* turn on the FORCE_DETECT */
378 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
379 /* wait for FORCE_DETECT to go off */
380 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
381 CRT_HOTPLUG_FORCE_DETECT) == 0,
382 1000))
383 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
384 }
385
386 stat = I915_READ(PORT_HOTPLUG_STAT);
387 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
388 ret = true;
389
390 /* clear the interrupt we just generated, if any */
391 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
392
393 /* and put the bits back */
394 I915_WRITE(PORT_HOTPLUG_EN, orig);
395
396 return ret;
397}
398
399static struct edid *intel_crt_get_edid(struct drm_connector *connector,
400 struct i2c_adapter *i2c)
401{
402 struct edid *edid;
403
404 edid = drm_get_edid(connector, i2c);
405
406 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
407 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
408 intel_gmbus_force_bit(i2c, true);
409 edid = drm_get_edid(connector, i2c);
410 intel_gmbus_force_bit(i2c, false);
411 }
412
413 return edid;
414}
415
416/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
417static int intel_crt_ddc_get_modes(struct drm_connector *connector,
418 struct i2c_adapter *adapter)
419{
420 struct edid *edid;
421
422 edid = intel_crt_get_edid(connector, adapter);
423 if (!edid)
424 return 0;
425
426 return intel_connector_update_modes(connector, edid);
427}
428
429static bool intel_crt_detect_ddc(struct drm_connector *connector)
430{
431 struct intel_crt *crt = intel_attached_crt(connector);
432 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
433 struct edid *edid;
434 struct i2c_adapter *i2c;
435
436 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
437
438 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
439 edid = intel_crt_get_edid(connector, i2c);
440
441 if (edid) {
442 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
443
444 /*
445 * This may be a DVI-I connector with a shared DDC
446 * link between analog and digital outputs, so we
447 * have to check the EDID input spec of the attached device.
448 */
449 if (!is_digital) {
450 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
451 return true;
452 }
453
454 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
455 } else {
456 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
457 }
458
459 kfree(edid);
460
461 return false;
462}
463
464static enum drm_connector_status
465intel_crt_load_detect(struct intel_crt *crt)
466{
467 struct drm_device *dev = crt->base.base.dev;
468 struct drm_i915_private *dev_priv = dev->dev_private;
469 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
470 uint32_t save_bclrpat;
471 uint32_t save_vtotal;
472 uint32_t vtotal, vactive;
473 uint32_t vsample;
474 uint32_t vblank, vblank_start, vblank_end;
475 uint32_t dsl;
476 uint32_t bclrpat_reg;
477 uint32_t vtotal_reg;
478 uint32_t vblank_reg;
479 uint32_t vsync_reg;
480 uint32_t pipeconf_reg;
481 uint32_t pipe_dsl_reg;
482 uint8_t st00;
483 enum drm_connector_status status;
484
485 DRM_DEBUG_KMS("starting load-detect on CRT\n");
486
487 bclrpat_reg = BCLRPAT(pipe);
488 vtotal_reg = VTOTAL(pipe);
489 vblank_reg = VBLANK(pipe);
490 vsync_reg = VSYNC(pipe);
491 pipeconf_reg = PIPECONF(pipe);
492 pipe_dsl_reg = PIPEDSL(pipe);
493
494 save_bclrpat = I915_READ(bclrpat_reg);
495 save_vtotal = I915_READ(vtotal_reg);
496 vblank = I915_READ(vblank_reg);
497
498 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
499 vactive = (save_vtotal & 0x7ff) + 1;
500
501 vblank_start = (vblank & 0xfff) + 1;
502 vblank_end = ((vblank >> 16) & 0xfff) + 1;
503
504 /* Set the border color to purple. */
505 I915_WRITE(bclrpat_reg, 0x500050);
506
507 if (!IS_GEN2(dev)) {
508 uint32_t pipeconf = I915_READ(pipeconf_reg);
509 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
510 POSTING_READ(pipeconf_reg);
511 /* Wait for next Vblank to substitue
512 * border color for Color info */
513 intel_wait_for_vblank(dev, pipe);
514 st00 = I915_READ8(VGA_MSR_WRITE);
515 status = ((st00 & (1 << 4)) != 0) ?
516 connector_status_connected :
517 connector_status_disconnected;
518
519 I915_WRITE(pipeconf_reg, pipeconf);
520 } else {
521 bool restore_vblank = false;
522 int count, detect;
523
524 /*
525 * If there isn't any border, add some.
526 * Yes, this will flicker
527 */
528 if (vblank_start <= vactive && vblank_end >= vtotal) {
529 uint32_t vsync = I915_READ(vsync_reg);
530 uint32_t vsync_start = (vsync & 0xffff) + 1;
531
532 vblank_start = vsync_start;
533 I915_WRITE(vblank_reg,
534 (vblank_start - 1) |
535 ((vblank_end - 1) << 16));
536 restore_vblank = true;
537 }
538 /* sample in the vertical border, selecting the larger one */
539 if (vblank_start - vactive >= vtotal - vblank_end)
540 vsample = (vblank_start + vactive) >> 1;
541 else
542 vsample = (vtotal + vblank_end) >> 1;
543
544 /*
545 * Wait for the border to be displayed
546 */
547 while (I915_READ(pipe_dsl_reg) >= vactive)
548 ;
549 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
550 ;
551 /*
552 * Watch ST00 for an entire scanline
553 */
554 detect = 0;
555 count = 0;
556 do {
557 count++;
558 /* Read the ST00 VGA status register */
559 st00 = I915_READ8(VGA_MSR_WRITE);
560 if (st00 & (1 << 4))
561 detect++;
562 } while ((I915_READ(pipe_dsl_reg) == dsl));
563
564 /* restore vblank if necessary */
565 if (restore_vblank)
566 I915_WRITE(vblank_reg, vblank);
567 /*
568 * If more than 3/4 of the scanline detected a monitor,
569 * then it is assumed to be present. This works even on i830,
570 * where there isn't any way to force the border color across
571 * the screen
572 */
573 status = detect * 4 > count * 3 ?
574 connector_status_connected :
575 connector_status_disconnected;
576 }
577
578 /* Restore previous settings */
579 I915_WRITE(bclrpat_reg, save_bclrpat);
580
581 return status;
582}
583
584static enum drm_connector_status
585intel_crt_detect(struct drm_connector *connector, bool force)
586{
587 struct drm_device *dev = connector->dev;
588 struct intel_crt *crt = intel_attached_crt(connector);
589 enum drm_connector_status status;
590 struct intel_load_detect_pipe tmp;
591
592 if (I915_HAS_HOTPLUG(dev)) {
593 /* We can not rely on the HPD pin always being correctly wired
594 * up, for example many KVM do not pass it through, and so
595 * only trust an assertion that the monitor is connected.
596 */
597 if (intel_crt_detect_hotplug(connector)) {
598 DRM_DEBUG_KMS("CRT detected via hotplug\n");
599 return connector_status_connected;
600 } else
601 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
602 }
603
604 if (intel_crt_detect_ddc(connector))
605 return connector_status_connected;
606
607 /* Load detection is broken on HPD capable machines. Whoever wants a
608 * broken monitor (without edid) to work behind a broken kvm (that fails
609 * to have the right resistors for HP detection) needs to fix this up.
610 * For now just bail out. */
611 if (I915_HAS_HOTPLUG(dev))
612 return connector_status_disconnected;
613
614 if (!force)
615 return connector->status;
616
617 /* for pre-945g platforms use load detect */
618 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
619 if (intel_crt_detect_ddc(connector))
620 status = connector_status_connected;
621 else
622 status = intel_crt_load_detect(crt);
623 intel_release_load_detect_pipe(connector, &tmp);
624 } else
625 status = connector_status_unknown;
626
627 return status;
628}
629
630static void intel_crt_destroy(struct drm_connector *connector)
631{
632 drm_sysfs_connector_remove(connector);
633 drm_connector_cleanup(connector);
634 kfree(connector);
635}
636
637static int intel_crt_get_modes(struct drm_connector *connector)
638{
639 struct drm_device *dev = connector->dev;
640 struct drm_i915_private *dev_priv = dev->dev_private;
641 int ret;
642 struct i2c_adapter *i2c;
643
644 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
645 ret = intel_crt_ddc_get_modes(connector, i2c);
646 if (ret || !IS_G4X(dev))
647 return ret;
648
649 /* Try to probe digital port for output in DVI-I -> VGA mode. */
650 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
651 return intel_crt_ddc_get_modes(connector, i2c);
652}
653
654static int intel_crt_set_property(struct drm_connector *connector,
655 struct drm_property *property,
656 uint64_t value)
657{
658 return 0;
659}
660
661static void intel_crt_reset(struct drm_connector *connector)
662{
663 struct drm_device *dev = connector->dev;
664 struct drm_i915_private *dev_priv = dev->dev_private;
665 struct intel_crt *crt = intel_attached_crt(connector);
666
667 if (HAS_PCH_SPLIT(dev)) {
668 u32 adpa;
669
670 adpa = I915_READ(PCH_ADPA);
671 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
672 adpa |= ADPA_HOTPLUG_BITS;
673 I915_WRITE(PCH_ADPA, adpa);
674 POSTING_READ(PCH_ADPA);
675
676 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
677 crt->force_hotplug_required = 1;
678 }
679
680}
681
682/*
683 * Routines for controlling stuff on the analog port
684 */
685
686static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
687 .mode_fixup = intel_crt_mode_fixup,
688 .mode_set = intel_crt_mode_set,
689 .disable = intel_encoder_noop,
690};
691
692static const struct drm_connector_funcs intel_crt_connector_funcs = {
693 .reset = intel_crt_reset,
694 .dpms = intel_crt_dpms,
695 .detect = intel_crt_detect,
696 .fill_modes = drm_helper_probe_single_connector_modes,
697 .destroy = intel_crt_destroy,
698 .set_property = intel_crt_set_property,
699};
700
701static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
702 .mode_valid = intel_crt_mode_valid,
703 .get_modes = intel_crt_get_modes,
704 .best_encoder = intel_best_encoder,
705};
706
707static const struct drm_encoder_funcs intel_crt_enc_funcs = {
708 .destroy = intel_encoder_destroy,
709};
710
711static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
712{
713 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
714 return 1;
715}
716
717static const struct dmi_system_id intel_no_crt[] = {
718 {
719 .callback = intel_no_crt_dmi_callback,
720 .ident = "ACER ZGB",
721 .matches = {
722 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
723 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
724 },
725 },
726 { }
727};
728
729void intel_crt_init(struct drm_device *dev)
730{
731 struct drm_connector *connector;
732 struct intel_crt *crt;
733 struct intel_connector *intel_connector;
734 struct drm_i915_private *dev_priv = dev->dev_private;
735
736 /* Skip machines without VGA that falsely report hotplug events */
737 if (dmi_check_system(intel_no_crt))
738 return;
739
740 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
741 if (!crt)
742 return;
743
744 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
745 if (!intel_connector) {
746 kfree(crt);
747 return;
748 }
749
750 connector = &intel_connector->base;
751 drm_connector_init(dev, &intel_connector->base,
752 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
753
754 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
755 DRM_MODE_ENCODER_DAC);
756
757 intel_connector_attach_encoder(intel_connector, &crt->base);
758
759 crt->base.type = INTEL_OUTPUT_ANALOG;
760 crt->base.cloneable = true;
761 if (IS_HASWELL(dev))
762 crt->base.crtc_mask = (1 << 0);
763 else
764 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
765
766 if (IS_GEN2(dev))
767 connector->interlace_allowed = 0;
768 else
769 connector->interlace_allowed = 1;
770 connector->doublescan_allowed = 0;
771
772 if (HAS_PCH_SPLIT(dev))
773 crt->adpa_reg = PCH_ADPA;
774 else if (IS_VALLEYVIEW(dev))
775 crt->adpa_reg = VLV_ADPA;
776 else
777 crt->adpa_reg = ADPA;
778
779 crt->base.disable = intel_disable_crt;
780 crt->base.enable = intel_enable_crt;
781 crt->base.get_hw_state = intel_crt_get_hw_state;
782 intel_connector->get_hw_state = intel_connector_get_hw_state;
783
784 drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
785 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
786
787 drm_sysfs_connector_add(connector);
788
789 if (I915_HAS_HOTPLUG(dev))
790 connector->polled = DRM_CONNECTOR_POLL_HPD;
791 else
792 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
793
794 /*
795 * Configure the automatic hotplug detection stuff
796 */
797 crt->force_hotplug_required = 0;
798
799 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
800}
Linux kernel - Deliverables
This page took 0.037863 seconds and 5 git commands to generate.