| 1 | /* |
| 2 | * i.MX IPUv3 Graphics driver |
| 3 | * |
| 4 | * Copyright (C) 2011 Sascha Hauer, Pengutronix |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version 2 |
| 9 | * of the License, or (at your option) any later version. |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | #include <linux/component.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/export.h> |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <drm/drmP.h> |
| 21 | #include <drm/drm_atomic.h> |
| 22 | #include <drm/drm_atomic_helper.h> |
| 23 | #include <drm/drm_crtc_helper.h> |
| 24 | #include <linux/fb.h> |
| 25 | #include <linux/clk.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <drm/drm_gem_cma_helper.h> |
| 28 | #include <drm/drm_fb_cma_helper.h> |
| 29 | |
| 30 | #include <video/imx-ipu-v3.h> |
| 31 | #include "imx-drm.h" |
| 32 | #include "ipuv3-plane.h" |
| 33 | |
| 34 | #define DRIVER_DESC "i.MX IPUv3 Graphics" |
| 35 | |
| 36 | struct ipu_crtc { |
| 37 | struct device *dev; |
| 38 | struct drm_crtc base; |
| 39 | struct imx_drm_crtc *imx_crtc; |
| 40 | |
| 41 | /* plane[0] is the full plane, plane[1] is the partial plane */ |
| 42 | struct ipu_plane *plane[2]; |
| 43 | |
| 44 | struct ipu_dc *dc; |
| 45 | struct ipu_di *di; |
| 46 | int irq; |
| 47 | }; |
| 48 | |
| 49 | #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base) |
| 50 | |
| 51 | static void ipu_crtc_enable(struct drm_crtc *crtc) |
| 52 | { |
| 53 | struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); |
| 54 | struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); |
| 55 | |
| 56 | ipu_dc_enable(ipu); |
| 57 | ipu_dc_enable_channel(ipu_crtc->dc); |
| 58 | ipu_di_enable(ipu_crtc->di); |
| 59 | } |
| 60 | |
| 61 | static void ipu_crtc_disable(struct drm_crtc *crtc) |
| 62 | { |
| 63 | struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); |
| 64 | struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); |
| 65 | |
| 66 | ipu_dc_disable_channel(ipu_crtc->dc); |
| 67 | ipu_di_disable(ipu_crtc->di); |
| 68 | ipu_dc_disable(ipu); |
| 69 | |
| 70 | spin_lock_irq(&crtc->dev->event_lock); |
| 71 | if (crtc->state->event) { |
| 72 | drm_crtc_send_vblank_event(crtc, crtc->state->event); |
| 73 | crtc->state->event = NULL; |
| 74 | } |
| 75 | spin_unlock_irq(&crtc->dev->event_lock); |
| 76 | } |
| 77 | |
| 78 | static const struct drm_crtc_funcs ipu_crtc_funcs = { |
| 79 | .set_config = drm_atomic_helper_set_config, |
| 80 | .destroy = drm_crtc_cleanup, |
| 81 | .page_flip = drm_atomic_helper_page_flip, |
| 82 | .reset = drm_atomic_helper_crtc_reset, |
| 83 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, |
| 84 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, |
| 85 | }; |
| 86 | |
| 87 | static irqreturn_t ipu_irq_handler(int irq, void *dev_id) |
| 88 | { |
| 89 | struct ipu_crtc *ipu_crtc = dev_id; |
| 90 | |
| 91 | imx_drm_handle_vblank(ipu_crtc->imx_crtc); |
| 92 | |
| 93 | return IRQ_HANDLED; |
| 94 | } |
| 95 | |
| 96 | static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc, |
| 97 | const struct drm_display_mode *mode, |
| 98 | struct drm_display_mode *adjusted_mode) |
| 99 | { |
| 100 | struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); |
| 101 | struct videomode vm; |
| 102 | int ret; |
| 103 | |
| 104 | drm_display_mode_to_videomode(adjusted_mode, &vm); |
| 105 | |
| 106 | ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm); |
| 107 | if (ret) |
| 108 | return false; |
| 109 | |
| 110 | if ((vm.vsync_len == 0) || (vm.hsync_len == 0)) |
| 111 | return false; |
| 112 | |
| 113 | drm_display_mode_from_videomode(&vm, adjusted_mode); |
| 114 | |
| 115 | return true; |
| 116 | } |
| 117 | |
| 118 | static int ipu_crtc_atomic_check(struct drm_crtc *crtc, |
| 119 | struct drm_crtc_state *state) |
| 120 | { |
| 121 | u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary); |
| 122 | |
| 123 | if (state->active && (primary_plane_mask & state->plane_mask) == 0) |
| 124 | return -EINVAL; |
| 125 | |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | static void ipu_crtc_atomic_begin(struct drm_crtc *crtc, |
| 130 | struct drm_crtc_state *old_crtc_state) |
| 131 | { |
| 132 | spin_lock_irq(&crtc->dev->event_lock); |
| 133 | if (crtc->state->event) { |
| 134 | WARN_ON(drm_crtc_vblank_get(crtc)); |
| 135 | drm_crtc_arm_vblank_event(crtc, crtc->state->event); |
| 136 | crtc->state->event = NULL; |
| 137 | } |
| 138 | spin_unlock_irq(&crtc->dev->event_lock); |
| 139 | } |
| 140 | |
| 141 | static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc) |
| 142 | { |
| 143 | struct drm_device *dev = crtc->dev; |
| 144 | struct drm_encoder *encoder; |
| 145 | struct imx_drm_encoder *imx_encoder = NULL; |
| 146 | struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); |
| 147 | struct drm_display_mode *mode = &crtc->state->adjusted_mode; |
| 148 | struct ipu_di_signal_cfg sig_cfg = {}; |
| 149 | unsigned long encoder_types = 0; |
| 150 | |
| 151 | dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__, |
| 152 | mode->hdisplay); |
| 153 | dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__, |
| 154 | mode->vdisplay); |
| 155 | |
| 156 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
| 157 | if (encoder->crtc == crtc) { |
| 158 | encoder_types |= BIT(encoder->encoder_type); |
| 159 | imx_encoder = enc_to_imx_enc(encoder); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n", |
| 164 | __func__, encoder_types); |
| 165 | |
| 166 | /* |
| 167 | * If we have DAC or LDB, then we need the IPU DI clock to be |
| 168 | * the same as the LDB DI clock. For TVDAC, derive the IPU DI |
| 169 | * clock from 27 MHz TVE_DI clock, but allow to divide it. |
| 170 | */ |
| 171 | if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) | |
| 172 | BIT(DRM_MODE_ENCODER_LVDS))) |
| 173 | sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT; |
| 174 | else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC)) |
| 175 | sig_cfg.clkflags = IPU_DI_CLKMODE_EXT; |
| 176 | else |
| 177 | sig_cfg.clkflags = 0; |
| 178 | |
| 179 | sig_cfg.enable_pol = !(imx_encoder->bus_flags & DRM_BUS_FLAG_DE_LOW); |
| 180 | /* Default to driving pixel data on negative clock edges */ |
| 181 | sig_cfg.clk_pol = !!(imx_encoder->bus_flags & |
| 182 | DRM_BUS_FLAG_PIXDATA_POSEDGE); |
| 183 | sig_cfg.bus_format = imx_encoder->bus_format; |
| 184 | sig_cfg.v_to_h_sync = 0; |
| 185 | sig_cfg.hsync_pin = imx_encoder->di_hsync_pin; |
| 186 | sig_cfg.vsync_pin = imx_encoder->di_vsync_pin; |
| 187 | |
| 188 | drm_display_mode_to_videomode(mode, &sig_cfg.mode); |
| 189 | |
| 190 | ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, |
| 191 | mode->flags & DRM_MODE_FLAG_INTERLACE, |
| 192 | imx_encoder->bus_format, mode->hdisplay); |
| 193 | ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg); |
| 194 | } |
| 195 | |
| 196 | static const struct drm_crtc_helper_funcs ipu_helper_funcs = { |
| 197 | .mode_fixup = ipu_crtc_mode_fixup, |
| 198 | .mode_set_nofb = ipu_crtc_mode_set_nofb, |
| 199 | .atomic_check = ipu_crtc_atomic_check, |
| 200 | .atomic_begin = ipu_crtc_atomic_begin, |
| 201 | .disable = ipu_crtc_disable, |
| 202 | .enable = ipu_crtc_enable, |
| 203 | }; |
| 204 | |
| 205 | static int ipu_enable_vblank(struct drm_crtc *crtc) |
| 206 | { |
| 207 | struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); |
| 208 | |
| 209 | enable_irq(ipu_crtc->irq); |
| 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | static void ipu_disable_vblank(struct drm_crtc *crtc) |
| 215 | { |
| 216 | struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); |
| 217 | |
| 218 | disable_irq_nosync(ipu_crtc->irq); |
| 219 | } |
| 220 | |
| 221 | static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = { |
| 222 | .enable_vblank = ipu_enable_vblank, |
| 223 | .disable_vblank = ipu_disable_vblank, |
| 224 | .crtc_funcs = &ipu_crtc_funcs, |
| 225 | .crtc_helper_funcs = &ipu_helper_funcs, |
| 226 | }; |
| 227 | |
| 228 | static void ipu_put_resources(struct ipu_crtc *ipu_crtc) |
| 229 | { |
| 230 | if (!IS_ERR_OR_NULL(ipu_crtc->dc)) |
| 231 | ipu_dc_put(ipu_crtc->dc); |
| 232 | if (!IS_ERR_OR_NULL(ipu_crtc->di)) |
| 233 | ipu_di_put(ipu_crtc->di); |
| 234 | } |
| 235 | |
| 236 | static int ipu_get_resources(struct ipu_crtc *ipu_crtc, |
| 237 | struct ipu_client_platformdata *pdata) |
| 238 | { |
| 239 | struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); |
| 240 | int ret; |
| 241 | |
| 242 | ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc); |
| 243 | if (IS_ERR(ipu_crtc->dc)) { |
| 244 | ret = PTR_ERR(ipu_crtc->dc); |
| 245 | goto err_out; |
| 246 | } |
| 247 | |
| 248 | ipu_crtc->di = ipu_di_get(ipu, pdata->di); |
| 249 | if (IS_ERR(ipu_crtc->di)) { |
| 250 | ret = PTR_ERR(ipu_crtc->di); |
| 251 | goto err_out; |
| 252 | } |
| 253 | |
| 254 | return 0; |
| 255 | err_out: |
| 256 | ipu_put_resources(ipu_crtc); |
| 257 | |
| 258 | return ret; |
| 259 | } |
| 260 | |
| 261 | static int ipu_crtc_init(struct ipu_crtc *ipu_crtc, |
| 262 | struct ipu_client_platformdata *pdata, struct drm_device *drm) |
| 263 | { |
| 264 | struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); |
| 265 | int dp = -EINVAL; |
| 266 | int ret; |
| 267 | |
| 268 | ret = ipu_get_resources(ipu_crtc, pdata); |
| 269 | if (ret) { |
| 270 | dev_err(ipu_crtc->dev, "getting resources failed with %d.\n", |
| 271 | ret); |
| 272 | return ret; |
| 273 | } |
| 274 | |
| 275 | if (pdata->dp >= 0) |
| 276 | dp = IPU_DP_FLOW_SYNC_BG; |
| 277 | ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0, |
| 278 | DRM_PLANE_TYPE_PRIMARY); |
| 279 | if (IS_ERR(ipu_crtc->plane[0])) { |
| 280 | ret = PTR_ERR(ipu_crtc->plane[0]); |
| 281 | goto err_put_resources; |
| 282 | } |
| 283 | |
| 284 | ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc, |
| 285 | &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs, |
| 286 | pdata->of_node); |
| 287 | if (ret) { |
| 288 | dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret); |
| 289 | goto err_put_resources; |
| 290 | } |
| 291 | |
| 292 | ret = ipu_plane_get_resources(ipu_crtc->plane[0]); |
| 293 | if (ret) { |
| 294 | dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n", |
| 295 | ret); |
| 296 | goto err_remove_crtc; |
| 297 | } |
| 298 | |
| 299 | /* If this crtc is using the DP, add an overlay plane */ |
| 300 | if (pdata->dp >= 0 && pdata->dma[1] > 0) { |
| 301 | ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1], |
| 302 | IPU_DP_FLOW_SYNC_FG, |
| 303 | drm_crtc_mask(&ipu_crtc->base), |
| 304 | DRM_PLANE_TYPE_OVERLAY); |
| 305 | if (IS_ERR(ipu_crtc->plane[1])) { |
| 306 | ipu_crtc->plane[1] = NULL; |
| 307 | } else { |
| 308 | ret = ipu_plane_get_resources(ipu_crtc->plane[1]); |
| 309 | if (ret) { |
| 310 | dev_err(ipu_crtc->dev, "getting plane 1 " |
| 311 | "resources failed with %d.\n", ret); |
| 312 | goto err_put_plane0_res; |
| 313 | } |
| 314 | } |
| 315 | } |
| 316 | |
| 317 | ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]); |
| 318 | ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0, |
| 319 | "imx_drm", ipu_crtc); |
| 320 | if (ret < 0) { |
| 321 | dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret); |
| 322 | goto err_put_plane1_res; |
| 323 | } |
| 324 | /* Only enable IRQ when we actually need it to trigger work. */ |
| 325 | disable_irq(ipu_crtc->irq); |
| 326 | |
| 327 | return 0; |
| 328 | |
| 329 | err_put_plane1_res: |
| 330 | if (ipu_crtc->plane[1]) |
| 331 | ipu_plane_put_resources(ipu_crtc->plane[1]); |
| 332 | err_put_plane0_res: |
| 333 | ipu_plane_put_resources(ipu_crtc->plane[0]); |
| 334 | err_remove_crtc: |
| 335 | imx_drm_remove_crtc(ipu_crtc->imx_crtc); |
| 336 | err_put_resources: |
| 337 | ipu_put_resources(ipu_crtc); |
| 338 | |
| 339 | return ret; |
| 340 | } |
| 341 | |
| 342 | static int ipu_drm_bind(struct device *dev, struct device *master, void *data) |
| 343 | { |
| 344 | struct ipu_client_platformdata *pdata = dev->platform_data; |
| 345 | struct drm_device *drm = data; |
| 346 | struct ipu_crtc *ipu_crtc; |
| 347 | int ret; |
| 348 | |
| 349 | ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL); |
| 350 | if (!ipu_crtc) |
| 351 | return -ENOMEM; |
| 352 | |
| 353 | ipu_crtc->dev = dev; |
| 354 | |
| 355 | ret = ipu_crtc_init(ipu_crtc, pdata, drm); |
| 356 | if (ret) |
| 357 | return ret; |
| 358 | |
| 359 | dev_set_drvdata(dev, ipu_crtc); |
| 360 | |
| 361 | return 0; |
| 362 | } |
| 363 | |
| 364 | static void ipu_drm_unbind(struct device *dev, struct device *master, |
| 365 | void *data) |
| 366 | { |
| 367 | struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev); |
| 368 | |
| 369 | imx_drm_remove_crtc(ipu_crtc->imx_crtc); |
| 370 | |
| 371 | ipu_put_resources(ipu_crtc); |
| 372 | if (ipu_crtc->plane[1]) |
| 373 | ipu_plane_put_resources(ipu_crtc->plane[1]); |
| 374 | ipu_plane_put_resources(ipu_crtc->plane[0]); |
| 375 | } |
| 376 | |
| 377 | static const struct component_ops ipu_crtc_ops = { |
| 378 | .bind = ipu_drm_bind, |
| 379 | .unbind = ipu_drm_unbind, |
| 380 | }; |
| 381 | |
| 382 | static int ipu_drm_probe(struct platform_device *pdev) |
| 383 | { |
| 384 | struct device *dev = &pdev->dev; |
| 385 | int ret; |
| 386 | |
| 387 | if (!dev->platform_data) |
| 388 | return -EINVAL; |
| 389 | |
| 390 | ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); |
| 391 | if (ret) |
| 392 | return ret; |
| 393 | |
| 394 | return component_add(dev, &ipu_crtc_ops); |
| 395 | } |
| 396 | |
| 397 | static int ipu_drm_remove(struct platform_device *pdev) |
| 398 | { |
| 399 | component_del(&pdev->dev, &ipu_crtc_ops); |
| 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | static struct platform_driver ipu_drm_driver = { |
| 404 | .driver = { |
| 405 | .name = "imx-ipuv3-crtc", |
| 406 | }, |
| 407 | .probe = ipu_drm_probe, |
| 408 | .remove = ipu_drm_remove, |
| 409 | }; |
| 410 | module_platform_driver(ipu_drm_driver); |
| 411 | |
| 412 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); |
| 413 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 414 | MODULE_LICENSE("GPL"); |
| 415 | MODULE_ALIAS("platform:imx-ipuv3-crtc"); |