| 1 | |
| 2 | #define R100_TRACK_MAX_TEXTURE 3 |
| 3 | #define R200_TRACK_MAX_TEXTURE 6 |
| 4 | #define R300_TRACK_MAX_TEXTURE 16 |
| 5 | |
| 6 | #define R100_MAX_CB 1 |
| 7 | #define R300_MAX_CB 4 |
| 8 | |
| 9 | /* |
| 10 | * CS functions |
| 11 | */ |
| 12 | struct r100_cs_track_cb { |
| 13 | struct radeon_bo *robj; |
| 14 | unsigned pitch; |
| 15 | unsigned cpp; |
| 16 | unsigned offset; |
| 17 | }; |
| 18 | |
| 19 | struct r100_cs_track_array { |
| 20 | struct radeon_bo *robj; |
| 21 | unsigned esize; |
| 22 | }; |
| 23 | |
| 24 | struct r100_cs_cube_info { |
| 25 | struct radeon_bo *robj; |
| 26 | unsigned offset; |
| 27 | unsigned width; |
| 28 | unsigned height; |
| 29 | }; |
| 30 | |
| 31 | #define R100_TRACK_COMP_NONE 0 |
| 32 | #define R100_TRACK_COMP_DXT1 1 |
| 33 | #define R100_TRACK_COMP_DXT35 2 |
| 34 | |
| 35 | struct r100_cs_track_texture { |
| 36 | struct radeon_bo *robj; |
| 37 | struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */ |
| 38 | unsigned pitch; |
| 39 | unsigned width; |
| 40 | unsigned height; |
| 41 | unsigned num_levels; |
| 42 | unsigned cpp; |
| 43 | unsigned tex_coord_type; |
| 44 | unsigned txdepth; |
| 45 | unsigned width_11; |
| 46 | unsigned height_11; |
| 47 | bool use_pitch; |
| 48 | bool enabled; |
| 49 | bool lookup_disable; |
| 50 | bool roundup_w; |
| 51 | bool roundup_h; |
| 52 | unsigned compress_format; |
| 53 | }; |
| 54 | |
| 55 | struct r100_cs_track { |
| 56 | unsigned num_cb; |
| 57 | unsigned num_texture; |
| 58 | unsigned maxy; |
| 59 | unsigned vtx_size; |
| 60 | unsigned vap_vf_cntl; |
| 61 | unsigned vap_alt_nverts; |
| 62 | unsigned immd_dwords; |
| 63 | unsigned num_arrays; |
| 64 | unsigned max_indx; |
| 65 | unsigned color_channel_mask; |
| 66 | struct r100_cs_track_array arrays[16]; |
| 67 | struct r100_cs_track_cb cb[R300_MAX_CB]; |
| 68 | struct r100_cs_track_cb zb; |
| 69 | struct r100_cs_track_cb aa; |
| 70 | struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE]; |
| 71 | bool z_enabled; |
| 72 | bool separate_cube; |
| 73 | bool zb_cb_clear; |
| 74 | bool blend_read_enable; |
| 75 | bool cb_dirty; |
| 76 | bool zb_dirty; |
| 77 | bool tex_dirty; |
| 78 | bool aa_dirty; |
| 79 | bool aaresolve; |
| 80 | }; |
| 81 | |
| 82 | int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track); |
| 83 | void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track); |
| 84 | |
| 85 | int r100_cs_packet_parse_vline(struct radeon_cs_parser *p); |
| 86 | |
| 87 | int r200_packet0_check(struct radeon_cs_parser *p, |
| 88 | struct radeon_cs_packet *pkt, |
| 89 | unsigned idx, unsigned reg); |
| 90 | |
| 91 | int r100_reloc_pitch_offset(struct radeon_cs_parser *p, |
| 92 | struct radeon_cs_packet *pkt, |
| 93 | unsigned idx, |
| 94 | unsigned reg); |
| 95 | int r100_packet3_load_vbpntr(struct radeon_cs_parser *p, |
| 96 | struct radeon_cs_packet *pkt, |
| 97 | int idx); |