| 1 | /* |
| 2 | * Samsung EXYNOS FIMC-LITE (camera host interface) driver |
| 3 | * |
| 4 | * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. |
| 5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__ |
| 12 | |
| 13 | #include <linux/bug.h> |
| 14 | #include <linux/clk.h> |
| 15 | #include <linux/device.h> |
| 16 | #include <linux/errno.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/list.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/of.h> |
| 22 | #include <linux/types.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/pm_runtime.h> |
| 25 | #include <linux/slab.h> |
| 26 | #include <linux/videodev2.h> |
| 27 | |
| 28 | #include <media/v4l2-device.h> |
| 29 | #include <media/v4l2-ioctl.h> |
| 30 | #include <media/v4l2-mem2mem.h> |
| 31 | #include <media/videobuf2-v4l2.h> |
| 32 | #include <media/videobuf2-dma-contig.h> |
| 33 | #include <media/drv-intf/exynos-fimc.h> |
| 34 | |
| 35 | #include "common.h" |
| 36 | #include "fimc-core.h" |
| 37 | #include "fimc-lite.h" |
| 38 | #include "fimc-lite-reg.h" |
| 39 | |
| 40 | static int debug; |
| 41 | module_param(debug, int, 0644); |
| 42 | |
| 43 | static const struct fimc_fmt fimc_lite_formats[] = { |
| 44 | { |
| 45 | .name = "YUV 4:2:2 packed, YCbYCr", |
| 46 | .fourcc = V4L2_PIX_FMT_YUYV, |
| 47 | .colorspace = V4L2_COLORSPACE_JPEG, |
| 48 | .depth = { 16 }, |
| 49 | .color = FIMC_FMT_YCBYCR422, |
| 50 | .memplanes = 1, |
| 51 | .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, |
| 52 | .flags = FMT_FLAGS_YUV, |
| 53 | }, { |
| 54 | .name = "YUV 4:2:2 packed, CbYCrY", |
| 55 | .fourcc = V4L2_PIX_FMT_UYVY, |
| 56 | .colorspace = V4L2_COLORSPACE_JPEG, |
| 57 | .depth = { 16 }, |
| 58 | .color = FIMC_FMT_CBYCRY422, |
| 59 | .memplanes = 1, |
| 60 | .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, |
| 61 | .flags = FMT_FLAGS_YUV, |
| 62 | }, { |
| 63 | .name = "YUV 4:2:2 packed, CrYCbY", |
| 64 | .fourcc = V4L2_PIX_FMT_VYUY, |
| 65 | .colorspace = V4L2_COLORSPACE_JPEG, |
| 66 | .depth = { 16 }, |
| 67 | .color = FIMC_FMT_CRYCBY422, |
| 68 | .memplanes = 1, |
| 69 | .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, |
| 70 | .flags = FMT_FLAGS_YUV, |
| 71 | }, { |
| 72 | .name = "YUV 4:2:2 packed, YCrYCb", |
| 73 | .fourcc = V4L2_PIX_FMT_YVYU, |
| 74 | .colorspace = V4L2_COLORSPACE_JPEG, |
| 75 | .depth = { 16 }, |
| 76 | .color = FIMC_FMT_YCRYCB422, |
| 77 | .memplanes = 1, |
| 78 | .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, |
| 79 | .flags = FMT_FLAGS_YUV, |
| 80 | }, { |
| 81 | .name = "RAW8 (GRBG)", |
| 82 | .fourcc = V4L2_PIX_FMT_SGRBG8, |
| 83 | .colorspace = V4L2_COLORSPACE_SRGB, |
| 84 | .depth = { 8 }, |
| 85 | .color = FIMC_FMT_RAW8, |
| 86 | .memplanes = 1, |
| 87 | .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, |
| 88 | .flags = FMT_FLAGS_RAW_BAYER, |
| 89 | }, { |
| 90 | .name = "RAW10 (GRBG)", |
| 91 | .fourcc = V4L2_PIX_FMT_SGRBG10, |
| 92 | .colorspace = V4L2_COLORSPACE_SRGB, |
| 93 | .depth = { 16 }, |
| 94 | .color = FIMC_FMT_RAW10, |
| 95 | .memplanes = 1, |
| 96 | .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, |
| 97 | .flags = FMT_FLAGS_RAW_BAYER, |
| 98 | }, { |
| 99 | .name = "RAW12 (GRBG)", |
| 100 | .fourcc = V4L2_PIX_FMT_SGRBG12, |
| 101 | .colorspace = V4L2_COLORSPACE_SRGB, |
| 102 | .depth = { 16 }, |
| 103 | .color = FIMC_FMT_RAW12, |
| 104 | .memplanes = 1, |
| 105 | .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, |
| 106 | .flags = FMT_FLAGS_RAW_BAYER, |
| 107 | }, |
| 108 | }; |
| 109 | |
| 110 | /** |
| 111 | * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code |
| 112 | * @pixelformat: fourcc to match, ignored if null |
| 113 | * @mbus_code: media bus code to match, ignored if null |
| 114 | * @mask: the color format flags to match |
| 115 | * @index: index to the fimc_lite_formats array, ignored if negative |
| 116 | */ |
| 117 | static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat, |
| 118 | const u32 *mbus_code, unsigned int mask, int index) |
| 119 | { |
| 120 | const struct fimc_fmt *fmt, *def_fmt = NULL; |
| 121 | unsigned int i; |
| 122 | int id = 0; |
| 123 | |
| 124 | if (index >= (int)ARRAY_SIZE(fimc_lite_formats)) |
| 125 | return NULL; |
| 126 | |
| 127 | for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) { |
| 128 | fmt = &fimc_lite_formats[i]; |
| 129 | if (mask && !(fmt->flags & mask)) |
| 130 | continue; |
| 131 | if (pixelformat && fmt->fourcc == *pixelformat) |
| 132 | return fmt; |
| 133 | if (mbus_code && fmt->mbus_code == *mbus_code) |
| 134 | return fmt; |
| 135 | if (index == id) |
| 136 | def_fmt = fmt; |
| 137 | id++; |
| 138 | } |
| 139 | return def_fmt; |
| 140 | } |
| 141 | |
| 142 | static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output) |
| 143 | { |
| 144 | struct fimc_source_info *si; |
| 145 | unsigned long flags; |
| 146 | |
| 147 | if (fimc->sensor == NULL) |
| 148 | return -ENXIO; |
| 149 | |
| 150 | if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL) |
| 151 | return -EINVAL; |
| 152 | |
| 153 | /* Get sensor configuration data from the sensor subdev */ |
| 154 | si = v4l2_get_subdev_hostdata(fimc->sensor); |
| 155 | if (!si) |
| 156 | return -EINVAL; |
| 157 | |
| 158 | spin_lock_irqsave(&fimc->slock, flags); |
| 159 | |
| 160 | flite_hw_set_camera_bus(fimc, si); |
| 161 | flite_hw_set_source_format(fimc, &fimc->inp_frame); |
| 162 | flite_hw_set_window_offset(fimc, &fimc->inp_frame); |
| 163 | flite_hw_set_dma_buf_mask(fimc, 0); |
| 164 | flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output); |
| 165 | flite_hw_set_interrupt_mask(fimc); |
| 166 | flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); |
| 167 | |
| 168 | if (debug > 0) |
| 169 | flite_hw_dump_regs(fimc, __func__); |
| 170 | |
| 171 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | /* |
| 176 | * Reinitialize the driver so it is ready to start the streaming again. |
| 177 | * Set fimc->state to indicate stream off and the hardware shut down state. |
| 178 | * If not suspending (@suspend is false), return any buffers to videobuf2. |
| 179 | * Otherwise put any owned buffers onto the pending buffers queue, so they |
| 180 | * can be re-spun when the device is being resumed. Also perform FIMC |
| 181 | * software reset and disable streaming on the whole pipeline if required. |
| 182 | */ |
| 183 | static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend) |
| 184 | { |
| 185 | struct flite_buffer *buf; |
| 186 | unsigned long flags; |
| 187 | bool streaming; |
| 188 | |
| 189 | spin_lock_irqsave(&fimc->slock, flags); |
| 190 | streaming = fimc->state & (1 << ST_SENSOR_STREAM); |
| 191 | |
| 192 | fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF | |
| 193 | 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM); |
| 194 | if (suspend) |
| 195 | fimc->state |= (1 << ST_FLITE_SUSPENDED); |
| 196 | else |
| 197 | fimc->state &= ~(1 << ST_FLITE_PENDING | |
| 198 | 1 << ST_FLITE_SUSPENDED); |
| 199 | |
| 200 | /* Release unused buffers */ |
| 201 | while (!suspend && !list_empty(&fimc->pending_buf_q)) { |
| 202 | buf = fimc_lite_pending_queue_pop(fimc); |
| 203 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
| 204 | } |
| 205 | /* If suspending put unused buffers onto pending queue */ |
| 206 | while (!list_empty(&fimc->active_buf_q)) { |
| 207 | buf = fimc_lite_active_queue_pop(fimc); |
| 208 | if (suspend) |
| 209 | fimc_lite_pending_queue_add(fimc, buf); |
| 210 | else |
| 211 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
| 212 | } |
| 213 | |
| 214 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 215 | |
| 216 | flite_hw_reset(fimc); |
| 217 | |
| 218 | if (!streaming) |
| 219 | return 0; |
| 220 | |
| 221 | return fimc_pipeline_call(&fimc->ve, set_stream, 0); |
| 222 | } |
| 223 | |
| 224 | static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend) |
| 225 | { |
| 226 | unsigned long flags; |
| 227 | |
| 228 | if (!fimc_lite_active(fimc)) |
| 229 | return 0; |
| 230 | |
| 231 | spin_lock_irqsave(&fimc->slock, flags); |
| 232 | set_bit(ST_FLITE_OFF, &fimc->state); |
| 233 | flite_hw_capture_stop(fimc); |
| 234 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 235 | |
| 236 | wait_event_timeout(fimc->irq_queue, |
| 237 | !test_bit(ST_FLITE_OFF, &fimc->state), |
| 238 | (2*HZ/10)); /* 200 ms */ |
| 239 | |
| 240 | return fimc_lite_reinit(fimc, suspend); |
| 241 | } |
| 242 | |
| 243 | /* Must be called with fimc.slock spinlock held. */ |
| 244 | static void fimc_lite_config_update(struct fimc_lite *fimc) |
| 245 | { |
| 246 | flite_hw_set_window_offset(fimc, &fimc->inp_frame); |
| 247 | flite_hw_set_dma_window(fimc, &fimc->out_frame); |
| 248 | flite_hw_set_test_pattern(fimc, fimc->test_pattern->val); |
| 249 | clear_bit(ST_FLITE_CONFIG, &fimc->state); |
| 250 | } |
| 251 | |
| 252 | static irqreturn_t flite_irq_handler(int irq, void *priv) |
| 253 | { |
| 254 | struct fimc_lite *fimc = priv; |
| 255 | struct flite_buffer *vbuf; |
| 256 | unsigned long flags; |
| 257 | u32 intsrc; |
| 258 | |
| 259 | spin_lock_irqsave(&fimc->slock, flags); |
| 260 | |
| 261 | intsrc = flite_hw_get_interrupt_source(fimc); |
| 262 | flite_hw_clear_pending_irq(fimc); |
| 263 | |
| 264 | if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) { |
| 265 | wake_up(&fimc->irq_queue); |
| 266 | goto done; |
| 267 | } |
| 268 | |
| 269 | if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) { |
| 270 | clear_bit(ST_FLITE_RUN, &fimc->state); |
| 271 | fimc->events.data_overflow++; |
| 272 | } |
| 273 | |
| 274 | if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) { |
| 275 | flite_hw_clear_last_capture_end(fimc); |
| 276 | clear_bit(ST_FLITE_STREAM, &fimc->state); |
| 277 | wake_up(&fimc->irq_queue); |
| 278 | } |
| 279 | |
| 280 | if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) |
| 281 | goto done; |
| 282 | |
| 283 | if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) && |
| 284 | test_bit(ST_FLITE_RUN, &fimc->state) && |
| 285 | !list_empty(&fimc->pending_buf_q)) { |
| 286 | vbuf = fimc_lite_pending_queue_pop(fimc); |
| 287 | flite_hw_set_dma_buffer(fimc, vbuf); |
| 288 | fimc_lite_active_queue_add(fimc, vbuf); |
| 289 | } |
| 290 | |
| 291 | if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) && |
| 292 | test_bit(ST_FLITE_RUN, &fimc->state) && |
| 293 | !list_empty(&fimc->active_buf_q)) { |
| 294 | vbuf = fimc_lite_active_queue_pop(fimc); |
| 295 | vbuf->vb.vb2_buf.timestamp = ktime_get_ns(); |
| 296 | vbuf->vb.sequence = fimc->frame_count++; |
| 297 | flite_hw_mask_dma_buffer(fimc, vbuf->index); |
| 298 | vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE); |
| 299 | } |
| 300 | |
| 301 | if (test_bit(ST_FLITE_CONFIG, &fimc->state)) |
| 302 | fimc_lite_config_update(fimc); |
| 303 | |
| 304 | if (list_empty(&fimc->pending_buf_q)) { |
| 305 | flite_hw_capture_stop(fimc); |
| 306 | clear_bit(ST_FLITE_STREAM, &fimc->state); |
| 307 | } |
| 308 | done: |
| 309 | set_bit(ST_FLITE_RUN, &fimc->state); |
| 310 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 311 | return IRQ_HANDLED; |
| 312 | } |
| 313 | |
| 314 | static int start_streaming(struct vb2_queue *q, unsigned int count) |
| 315 | { |
| 316 | struct fimc_lite *fimc = q->drv_priv; |
| 317 | unsigned long flags; |
| 318 | int ret; |
| 319 | |
| 320 | spin_lock_irqsave(&fimc->slock, flags); |
| 321 | |
| 322 | fimc->buf_index = 0; |
| 323 | fimc->frame_count = 0; |
| 324 | |
| 325 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 326 | |
| 327 | ret = fimc_lite_hw_init(fimc, false); |
| 328 | if (ret) { |
| 329 | fimc_lite_reinit(fimc, false); |
| 330 | return ret; |
| 331 | } |
| 332 | |
| 333 | set_bit(ST_FLITE_PENDING, &fimc->state); |
| 334 | |
| 335 | if (!list_empty(&fimc->active_buf_q) && |
| 336 | !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { |
| 337 | flite_hw_capture_start(fimc); |
| 338 | |
| 339 | if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) |
| 340 | fimc_pipeline_call(&fimc->ve, set_stream, 1); |
| 341 | } |
| 342 | if (debug > 0) |
| 343 | flite_hw_dump_regs(fimc, __func__); |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | static void stop_streaming(struct vb2_queue *q) |
| 349 | { |
| 350 | struct fimc_lite *fimc = q->drv_priv; |
| 351 | |
| 352 | if (!fimc_lite_active(fimc)) |
| 353 | return; |
| 354 | |
| 355 | fimc_lite_stop_capture(fimc, false); |
| 356 | } |
| 357 | |
| 358 | static int queue_setup(struct vb2_queue *vq, |
| 359 | unsigned int *num_buffers, unsigned int *num_planes, |
| 360 | unsigned int sizes[], void *allocators[]) |
| 361 | { |
| 362 | struct fimc_lite *fimc = vq->drv_priv; |
| 363 | struct flite_frame *frame = &fimc->out_frame; |
| 364 | const struct fimc_fmt *fmt = frame->fmt; |
| 365 | unsigned long wh = frame->f_width * frame->f_height; |
| 366 | int i; |
| 367 | |
| 368 | if (fmt == NULL) |
| 369 | return -EINVAL; |
| 370 | |
| 371 | if (*num_planes) { |
| 372 | if (*num_planes != fmt->memplanes) |
| 373 | return -EINVAL; |
| 374 | for (i = 0; i < *num_planes; i++) { |
| 375 | if (sizes[i] < (wh * fmt->depth[i]) / 8) |
| 376 | return -EINVAL; |
| 377 | allocators[i] = fimc->alloc_ctx; |
| 378 | } |
| 379 | return 0; |
| 380 | } |
| 381 | |
| 382 | *num_planes = fmt->memplanes; |
| 383 | |
| 384 | for (i = 0; i < fmt->memplanes; i++) { |
| 385 | sizes[i] = (wh * fmt->depth[i]) / 8; |
| 386 | allocators[i] = fimc->alloc_ctx; |
| 387 | } |
| 388 | |
| 389 | return 0; |
| 390 | } |
| 391 | |
| 392 | static int buffer_prepare(struct vb2_buffer *vb) |
| 393 | { |
| 394 | struct vb2_queue *vq = vb->vb2_queue; |
| 395 | struct fimc_lite *fimc = vq->drv_priv; |
| 396 | int i; |
| 397 | |
| 398 | if (fimc->out_frame.fmt == NULL) |
| 399 | return -EINVAL; |
| 400 | |
| 401 | for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) { |
| 402 | unsigned long size = fimc->payload[i]; |
| 403 | |
| 404 | if (vb2_plane_size(vb, i) < size) { |
| 405 | v4l2_err(&fimc->ve.vdev, |
| 406 | "User buffer too small (%ld < %ld)\n", |
| 407 | vb2_plane_size(vb, i), size); |
| 408 | return -EINVAL; |
| 409 | } |
| 410 | vb2_set_plane_payload(vb, i, size); |
| 411 | } |
| 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | |
| 416 | static void buffer_queue(struct vb2_buffer *vb) |
| 417 | { |
| 418 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 419 | struct flite_buffer *buf |
| 420 | = container_of(vbuf, struct flite_buffer, vb); |
| 421 | struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue); |
| 422 | unsigned long flags; |
| 423 | |
| 424 | spin_lock_irqsave(&fimc->slock, flags); |
| 425 | buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0); |
| 426 | |
| 427 | buf->index = fimc->buf_index++; |
| 428 | if (fimc->buf_index >= fimc->reqbufs_count) |
| 429 | fimc->buf_index = 0; |
| 430 | |
| 431 | if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) && |
| 432 | !test_bit(ST_FLITE_STREAM, &fimc->state) && |
| 433 | list_empty(&fimc->active_buf_q)) { |
| 434 | flite_hw_set_dma_buffer(fimc, buf); |
| 435 | fimc_lite_active_queue_add(fimc, buf); |
| 436 | } else { |
| 437 | fimc_lite_pending_queue_add(fimc, buf); |
| 438 | } |
| 439 | |
| 440 | if (vb2_is_streaming(&fimc->vb_queue) && |
| 441 | !list_empty(&fimc->pending_buf_q) && |
| 442 | !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) { |
| 443 | flite_hw_capture_start(fimc); |
| 444 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 445 | |
| 446 | if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state)) |
| 447 | fimc_pipeline_call(&fimc->ve, set_stream, 1); |
| 448 | return; |
| 449 | } |
| 450 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 451 | } |
| 452 | |
| 453 | static const struct vb2_ops fimc_lite_qops = { |
| 454 | .queue_setup = queue_setup, |
| 455 | .buf_prepare = buffer_prepare, |
| 456 | .buf_queue = buffer_queue, |
| 457 | .wait_prepare = vb2_ops_wait_prepare, |
| 458 | .wait_finish = vb2_ops_wait_finish, |
| 459 | .start_streaming = start_streaming, |
| 460 | .stop_streaming = stop_streaming, |
| 461 | }; |
| 462 | |
| 463 | static void fimc_lite_clear_event_counters(struct fimc_lite *fimc) |
| 464 | { |
| 465 | unsigned long flags; |
| 466 | |
| 467 | spin_lock_irqsave(&fimc->slock, flags); |
| 468 | memset(&fimc->events, 0, sizeof(fimc->events)); |
| 469 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 470 | } |
| 471 | |
| 472 | static int fimc_lite_open(struct file *file) |
| 473 | { |
| 474 | struct fimc_lite *fimc = video_drvdata(file); |
| 475 | struct media_entity *me = &fimc->ve.vdev.entity; |
| 476 | int ret; |
| 477 | |
| 478 | mutex_lock(&fimc->lock); |
| 479 | if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) { |
| 480 | ret = -EBUSY; |
| 481 | goto unlock; |
| 482 | } |
| 483 | |
| 484 | set_bit(ST_FLITE_IN_USE, &fimc->state); |
| 485 | ret = pm_runtime_get_sync(&fimc->pdev->dev); |
| 486 | if (ret < 0) |
| 487 | goto unlock; |
| 488 | |
| 489 | ret = v4l2_fh_open(file); |
| 490 | if (ret < 0) |
| 491 | goto err_pm; |
| 492 | |
| 493 | if (!v4l2_fh_is_singular_file(file) || |
| 494 | atomic_read(&fimc->out_path) != FIMC_IO_DMA) |
| 495 | goto unlock; |
| 496 | |
| 497 | mutex_lock(&me->graph_obj.mdev->graph_mutex); |
| 498 | |
| 499 | ret = fimc_pipeline_call(&fimc->ve, open, me, true); |
| 500 | |
| 501 | /* Mark video pipeline ending at this video node as in use. */ |
| 502 | if (ret == 0) |
| 503 | me->use_count++; |
| 504 | |
| 505 | mutex_unlock(&me->graph_obj.mdev->graph_mutex); |
| 506 | |
| 507 | if (!ret) { |
| 508 | fimc_lite_clear_event_counters(fimc); |
| 509 | goto unlock; |
| 510 | } |
| 511 | |
| 512 | v4l2_fh_release(file); |
| 513 | err_pm: |
| 514 | pm_runtime_put_sync(&fimc->pdev->dev); |
| 515 | clear_bit(ST_FLITE_IN_USE, &fimc->state); |
| 516 | unlock: |
| 517 | mutex_unlock(&fimc->lock); |
| 518 | return ret; |
| 519 | } |
| 520 | |
| 521 | static int fimc_lite_release(struct file *file) |
| 522 | { |
| 523 | struct fimc_lite *fimc = video_drvdata(file); |
| 524 | struct media_entity *entity = &fimc->ve.vdev.entity; |
| 525 | |
| 526 | mutex_lock(&fimc->lock); |
| 527 | |
| 528 | if (v4l2_fh_is_singular_file(file) && |
| 529 | atomic_read(&fimc->out_path) == FIMC_IO_DMA) { |
| 530 | if (fimc->streaming) { |
| 531 | media_entity_pipeline_stop(entity); |
| 532 | fimc->streaming = false; |
| 533 | } |
| 534 | fimc_lite_stop_capture(fimc, false); |
| 535 | fimc_pipeline_call(&fimc->ve, close); |
| 536 | clear_bit(ST_FLITE_IN_USE, &fimc->state); |
| 537 | |
| 538 | mutex_lock(&entity->graph_obj.mdev->graph_mutex); |
| 539 | entity->use_count--; |
| 540 | mutex_unlock(&entity->graph_obj.mdev->graph_mutex); |
| 541 | } |
| 542 | |
| 543 | _vb2_fop_release(file, NULL); |
| 544 | pm_runtime_put(&fimc->pdev->dev); |
| 545 | clear_bit(ST_FLITE_SUSPENDED, &fimc->state); |
| 546 | |
| 547 | mutex_unlock(&fimc->lock); |
| 548 | return 0; |
| 549 | } |
| 550 | |
| 551 | static const struct v4l2_file_operations fimc_lite_fops = { |
| 552 | .owner = THIS_MODULE, |
| 553 | .open = fimc_lite_open, |
| 554 | .release = fimc_lite_release, |
| 555 | .poll = vb2_fop_poll, |
| 556 | .unlocked_ioctl = video_ioctl2, |
| 557 | .mmap = vb2_fop_mmap, |
| 558 | }; |
| 559 | |
| 560 | /* |
| 561 | * Format and crop negotiation helpers |
| 562 | */ |
| 563 | |
| 564 | static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc, |
| 565 | struct v4l2_subdev_pad_config *cfg, |
| 566 | struct v4l2_subdev_format *format) |
| 567 | { |
| 568 | struct flite_drvdata *dd = fimc->dd; |
| 569 | struct v4l2_mbus_framefmt *mf = &format->format; |
| 570 | const struct fimc_fmt *fmt = NULL; |
| 571 | |
| 572 | if (format->pad == FLITE_SD_PAD_SINK) { |
| 573 | v4l_bound_align_image(&mf->width, 8, dd->max_width, |
| 574 | ffs(dd->out_width_align) - 1, |
| 575 | &mf->height, 0, dd->max_height, 0, 0); |
| 576 | |
| 577 | fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0); |
| 578 | if (WARN_ON(!fmt)) |
| 579 | return NULL; |
| 580 | |
| 581 | mf->colorspace = fmt->colorspace; |
| 582 | mf->code = fmt->mbus_code; |
| 583 | } else { |
| 584 | struct flite_frame *sink = &fimc->inp_frame; |
| 585 | struct v4l2_mbus_framefmt *sink_fmt; |
| 586 | struct v4l2_rect *rect; |
| 587 | |
| 588 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 589 | sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev, cfg, |
| 590 | FLITE_SD_PAD_SINK); |
| 591 | |
| 592 | mf->code = sink_fmt->code; |
| 593 | mf->colorspace = sink_fmt->colorspace; |
| 594 | |
| 595 | rect = v4l2_subdev_get_try_crop(&fimc->subdev, cfg, |
| 596 | FLITE_SD_PAD_SINK); |
| 597 | } else { |
| 598 | mf->code = sink->fmt->mbus_code; |
| 599 | mf->colorspace = sink->fmt->colorspace; |
| 600 | rect = &sink->rect; |
| 601 | } |
| 602 | |
| 603 | /* Allow changing format only on sink pad */ |
| 604 | mf->width = rect->width; |
| 605 | mf->height = rect->height; |
| 606 | } |
| 607 | |
| 608 | mf->field = V4L2_FIELD_NONE; |
| 609 | |
| 610 | v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n", |
| 611 | mf->code, mf->colorspace, mf->width, mf->height); |
| 612 | |
| 613 | return fmt; |
| 614 | } |
| 615 | |
| 616 | static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r) |
| 617 | { |
| 618 | struct flite_frame *frame = &fimc->inp_frame; |
| 619 | |
| 620 | v4l_bound_align_image(&r->width, 0, frame->f_width, 0, |
| 621 | &r->height, 0, frame->f_height, 0, 0); |
| 622 | |
| 623 | /* Adjust left/top if cropping rectangle got out of bounds */ |
| 624 | r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); |
| 625 | r->left = round_down(r->left, fimc->dd->win_hor_offs_align); |
| 626 | r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height); |
| 627 | |
| 628 | v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n", |
| 629 | r->left, r->top, r->width, r->height, |
| 630 | frame->f_width, frame->f_height); |
| 631 | } |
| 632 | |
| 633 | static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r) |
| 634 | { |
| 635 | struct flite_frame *frame = &fimc->out_frame; |
| 636 | struct v4l2_rect *crop_rect = &fimc->inp_frame.rect; |
| 637 | |
| 638 | /* Scaling is not supported so we enforce compose rectangle size |
| 639 | same as size of the sink crop rectangle. */ |
| 640 | r->width = crop_rect->width; |
| 641 | r->height = crop_rect->height; |
| 642 | |
| 643 | /* Adjust left/top if the composing rectangle got out of bounds */ |
| 644 | r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width); |
| 645 | r->left = round_down(r->left, fimc->dd->out_hor_offs_align); |
| 646 | r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height); |
| 647 | |
| 648 | v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n", |
| 649 | r->left, r->top, r->width, r->height, |
| 650 | frame->f_width, frame->f_height); |
| 651 | } |
| 652 | |
| 653 | /* |
| 654 | * Video node ioctl operations |
| 655 | */ |
| 656 | static int fimc_lite_querycap(struct file *file, void *priv, |
| 657 | struct v4l2_capability *cap) |
| 658 | { |
| 659 | struct fimc_lite *fimc = video_drvdata(file); |
| 660 | |
| 661 | strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver)); |
| 662 | strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card)); |
| 663 | snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", |
| 664 | dev_name(&fimc->pdev->dev)); |
| 665 | |
| 666 | cap->device_caps = V4L2_CAP_STREAMING; |
| 667 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; |
| 668 | return 0; |
| 669 | } |
| 670 | |
| 671 | static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv, |
| 672 | struct v4l2_fmtdesc *f) |
| 673 | { |
| 674 | const struct fimc_fmt *fmt; |
| 675 | |
| 676 | if (f->index >= ARRAY_SIZE(fimc_lite_formats)) |
| 677 | return -EINVAL; |
| 678 | |
| 679 | fmt = &fimc_lite_formats[f->index]; |
| 680 | strlcpy(f->description, fmt->name, sizeof(f->description)); |
| 681 | f->pixelformat = fmt->fourcc; |
| 682 | |
| 683 | return 0; |
| 684 | } |
| 685 | |
| 686 | static int fimc_lite_g_fmt_mplane(struct file *file, void *fh, |
| 687 | struct v4l2_format *f) |
| 688 | { |
| 689 | struct fimc_lite *fimc = video_drvdata(file); |
| 690 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; |
| 691 | struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0]; |
| 692 | struct flite_frame *frame = &fimc->out_frame; |
| 693 | const struct fimc_fmt *fmt = frame->fmt; |
| 694 | |
| 695 | plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8; |
| 696 | plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height; |
| 697 | |
| 698 | pixm->num_planes = fmt->memplanes; |
| 699 | pixm->pixelformat = fmt->fourcc; |
| 700 | pixm->width = frame->f_width; |
| 701 | pixm->height = frame->f_height; |
| 702 | pixm->field = V4L2_FIELD_NONE; |
| 703 | pixm->colorspace = fmt->colorspace; |
| 704 | return 0; |
| 705 | } |
| 706 | |
| 707 | static int fimc_lite_try_fmt(struct fimc_lite *fimc, |
| 708 | struct v4l2_pix_format_mplane *pixm, |
| 709 | const struct fimc_fmt **ffmt) |
| 710 | { |
| 711 | u32 bpl = pixm->plane_fmt[0].bytesperline; |
| 712 | struct flite_drvdata *dd = fimc->dd; |
| 713 | const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt; |
| 714 | const struct fimc_fmt *fmt; |
| 715 | |
| 716 | if (WARN_ON(inp_fmt == NULL)) |
| 717 | return -EINVAL; |
| 718 | /* |
| 719 | * We allow some flexibility only for YUV formats. In case of raw |
| 720 | * raw Bayer the FIMC-LITE's output format must match its camera |
| 721 | * interface input format. |
| 722 | */ |
| 723 | if (inp_fmt->flags & FMT_FLAGS_YUV) |
| 724 | fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, |
| 725 | inp_fmt->flags, 0); |
| 726 | else |
| 727 | fmt = inp_fmt; |
| 728 | |
| 729 | if (WARN_ON(fmt == NULL)) |
| 730 | return -EINVAL; |
| 731 | if (ffmt) |
| 732 | *ffmt = fmt; |
| 733 | v4l_bound_align_image(&pixm->width, 8, dd->max_width, |
| 734 | ffs(dd->out_width_align) - 1, |
| 735 | &pixm->height, 0, dd->max_height, 0, 0); |
| 736 | |
| 737 | if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width)) |
| 738 | pixm->plane_fmt[0].bytesperline = (pixm->width * |
| 739 | fmt->depth[0]) / 8; |
| 740 | |
| 741 | if (pixm->plane_fmt[0].sizeimage == 0) |
| 742 | pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height * |
| 743 | fmt->depth[0]) / 8; |
| 744 | pixm->num_planes = fmt->memplanes; |
| 745 | pixm->pixelformat = fmt->fourcc; |
| 746 | pixm->colorspace = fmt->colorspace; |
| 747 | pixm->field = V4L2_FIELD_NONE; |
| 748 | return 0; |
| 749 | } |
| 750 | |
| 751 | static int fimc_lite_try_fmt_mplane(struct file *file, void *fh, |
| 752 | struct v4l2_format *f) |
| 753 | { |
| 754 | struct fimc_lite *fimc = video_drvdata(file); |
| 755 | return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL); |
| 756 | } |
| 757 | |
| 758 | static int fimc_lite_s_fmt_mplane(struct file *file, void *priv, |
| 759 | struct v4l2_format *f) |
| 760 | { |
| 761 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; |
| 762 | struct fimc_lite *fimc = video_drvdata(file); |
| 763 | struct flite_frame *frame = &fimc->out_frame; |
| 764 | const struct fimc_fmt *fmt = NULL; |
| 765 | int ret; |
| 766 | |
| 767 | if (vb2_is_busy(&fimc->vb_queue)) |
| 768 | return -EBUSY; |
| 769 | |
| 770 | ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt); |
| 771 | if (ret < 0) |
| 772 | return ret; |
| 773 | |
| 774 | frame->fmt = fmt; |
| 775 | fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8, |
| 776 | pixm->plane_fmt[0].sizeimage); |
| 777 | frame->f_width = pixm->width; |
| 778 | frame->f_height = pixm->height; |
| 779 | |
| 780 | return 0; |
| 781 | } |
| 782 | |
| 783 | static int fimc_pipeline_validate(struct fimc_lite *fimc) |
| 784 | { |
| 785 | struct v4l2_subdev *sd = &fimc->subdev; |
| 786 | struct v4l2_subdev_format sink_fmt, src_fmt; |
| 787 | struct media_pad *pad; |
| 788 | int ret; |
| 789 | |
| 790 | while (1) { |
| 791 | /* Retrieve format at the sink pad */ |
| 792 | pad = &sd->entity.pads[0]; |
| 793 | if (!(pad->flags & MEDIA_PAD_FL_SINK)) |
| 794 | break; |
| 795 | /* Don't call FIMC subdev operation to avoid nested locking */ |
| 796 | if (sd == &fimc->subdev) { |
| 797 | struct flite_frame *ff = &fimc->out_frame; |
| 798 | sink_fmt.format.width = ff->f_width; |
| 799 | sink_fmt.format.height = ff->f_height; |
| 800 | sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code; |
| 801 | } else { |
| 802 | sink_fmt.pad = pad->index; |
| 803 | sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; |
| 804 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, |
| 805 | &sink_fmt); |
| 806 | if (ret < 0 && ret != -ENOIOCTLCMD) |
| 807 | return -EPIPE; |
| 808 | } |
| 809 | /* Retrieve format at the source pad */ |
| 810 | pad = media_entity_remote_pad(pad); |
| 811 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
| 812 | break; |
| 813 | |
| 814 | sd = media_entity_to_v4l2_subdev(pad->entity); |
| 815 | src_fmt.pad = pad->index; |
| 816 | src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; |
| 817 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); |
| 818 | if (ret < 0 && ret != -ENOIOCTLCMD) |
| 819 | return -EPIPE; |
| 820 | |
| 821 | if (src_fmt.format.width != sink_fmt.format.width || |
| 822 | src_fmt.format.height != sink_fmt.format.height || |
| 823 | src_fmt.format.code != sink_fmt.format.code) |
| 824 | return -EPIPE; |
| 825 | } |
| 826 | return 0; |
| 827 | } |
| 828 | |
| 829 | static int fimc_lite_streamon(struct file *file, void *priv, |
| 830 | enum v4l2_buf_type type) |
| 831 | { |
| 832 | struct fimc_lite *fimc = video_drvdata(file); |
| 833 | struct media_entity *entity = &fimc->ve.vdev.entity; |
| 834 | int ret; |
| 835 | |
| 836 | if (fimc_lite_active(fimc)) |
| 837 | return -EBUSY; |
| 838 | |
| 839 | ret = media_entity_pipeline_start(entity, &fimc->ve.pipe->mp); |
| 840 | if (ret < 0) |
| 841 | return ret; |
| 842 | |
| 843 | ret = fimc_pipeline_validate(fimc); |
| 844 | if (ret < 0) |
| 845 | goto err_p_stop; |
| 846 | |
| 847 | fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity); |
| 848 | |
| 849 | ret = vb2_ioctl_streamon(file, priv, type); |
| 850 | if (!ret) { |
| 851 | fimc->streaming = true; |
| 852 | return ret; |
| 853 | } |
| 854 | |
| 855 | err_p_stop: |
| 856 | media_entity_pipeline_stop(entity); |
| 857 | return 0; |
| 858 | } |
| 859 | |
| 860 | static int fimc_lite_streamoff(struct file *file, void *priv, |
| 861 | enum v4l2_buf_type type) |
| 862 | { |
| 863 | struct fimc_lite *fimc = video_drvdata(file); |
| 864 | int ret; |
| 865 | |
| 866 | ret = vb2_ioctl_streamoff(file, priv, type); |
| 867 | if (ret < 0) |
| 868 | return ret; |
| 869 | |
| 870 | media_entity_pipeline_stop(&fimc->ve.vdev.entity); |
| 871 | fimc->streaming = false; |
| 872 | return 0; |
| 873 | } |
| 874 | |
| 875 | static int fimc_lite_reqbufs(struct file *file, void *priv, |
| 876 | struct v4l2_requestbuffers *reqbufs) |
| 877 | { |
| 878 | struct fimc_lite *fimc = video_drvdata(file); |
| 879 | int ret; |
| 880 | |
| 881 | reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count); |
| 882 | ret = vb2_ioctl_reqbufs(file, priv, reqbufs); |
| 883 | if (!ret) |
| 884 | fimc->reqbufs_count = reqbufs->count; |
| 885 | |
| 886 | return ret; |
| 887 | } |
| 888 | |
| 889 | /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */ |
| 890 | static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b) |
| 891 | { |
| 892 | if (a->left < b->left || a->top < b->top) |
| 893 | return 0; |
| 894 | if (a->left + a->width > b->left + b->width) |
| 895 | return 0; |
| 896 | if (a->top + a->height > b->top + b->height) |
| 897 | return 0; |
| 898 | |
| 899 | return 1; |
| 900 | } |
| 901 | |
| 902 | static int fimc_lite_g_selection(struct file *file, void *fh, |
| 903 | struct v4l2_selection *sel) |
| 904 | { |
| 905 | struct fimc_lite *fimc = video_drvdata(file); |
| 906 | struct flite_frame *f = &fimc->out_frame; |
| 907 | |
| 908 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) |
| 909 | return -EINVAL; |
| 910 | |
| 911 | switch (sel->target) { |
| 912 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: |
| 913 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: |
| 914 | sel->r.left = 0; |
| 915 | sel->r.top = 0; |
| 916 | sel->r.width = f->f_width; |
| 917 | sel->r.height = f->f_height; |
| 918 | return 0; |
| 919 | |
| 920 | case V4L2_SEL_TGT_COMPOSE: |
| 921 | sel->r = f->rect; |
| 922 | return 0; |
| 923 | } |
| 924 | |
| 925 | return -EINVAL; |
| 926 | } |
| 927 | |
| 928 | static int fimc_lite_s_selection(struct file *file, void *fh, |
| 929 | struct v4l2_selection *sel) |
| 930 | { |
| 931 | struct fimc_lite *fimc = video_drvdata(file); |
| 932 | struct flite_frame *f = &fimc->out_frame; |
| 933 | struct v4l2_rect rect = sel->r; |
| 934 | unsigned long flags; |
| 935 | |
| 936 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE || |
| 937 | sel->target != V4L2_SEL_TGT_COMPOSE) |
| 938 | return -EINVAL; |
| 939 | |
| 940 | fimc_lite_try_compose(fimc, &rect); |
| 941 | |
| 942 | if ((sel->flags & V4L2_SEL_FLAG_LE) && |
| 943 | !enclosed_rectangle(&rect, &sel->r)) |
| 944 | return -ERANGE; |
| 945 | |
| 946 | if ((sel->flags & V4L2_SEL_FLAG_GE) && |
| 947 | !enclosed_rectangle(&sel->r, &rect)) |
| 948 | return -ERANGE; |
| 949 | |
| 950 | sel->r = rect; |
| 951 | spin_lock_irqsave(&fimc->slock, flags); |
| 952 | f->rect = rect; |
| 953 | set_bit(ST_FLITE_CONFIG, &fimc->state); |
| 954 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 955 | |
| 956 | return 0; |
| 957 | } |
| 958 | |
| 959 | static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = { |
| 960 | .vidioc_querycap = fimc_lite_querycap, |
| 961 | .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane, |
| 962 | .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane, |
| 963 | .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane, |
| 964 | .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane, |
| 965 | .vidioc_g_selection = fimc_lite_g_selection, |
| 966 | .vidioc_s_selection = fimc_lite_s_selection, |
| 967 | .vidioc_reqbufs = fimc_lite_reqbufs, |
| 968 | .vidioc_querybuf = vb2_ioctl_querybuf, |
| 969 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, |
| 970 | .vidioc_create_bufs = vb2_ioctl_create_bufs, |
| 971 | .vidioc_qbuf = vb2_ioctl_qbuf, |
| 972 | .vidioc_dqbuf = vb2_ioctl_dqbuf, |
| 973 | .vidioc_streamon = fimc_lite_streamon, |
| 974 | .vidioc_streamoff = fimc_lite_streamoff, |
| 975 | }; |
| 976 | |
| 977 | /* Capture subdev media entity operations */ |
| 978 | static int fimc_lite_link_setup(struct media_entity *entity, |
| 979 | const struct media_pad *local, |
| 980 | const struct media_pad *remote, u32 flags) |
| 981 | { |
| 982 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); |
| 983 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 984 | int ret = 0; |
| 985 | |
| 986 | if (WARN_ON(fimc == NULL)) |
| 987 | return 0; |
| 988 | |
| 989 | v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n", |
| 990 | __func__, remote->entity->name, local->entity->name, |
| 991 | flags, fimc->source_subdev_grp_id); |
| 992 | |
| 993 | switch (local->index) { |
| 994 | case FLITE_SD_PAD_SINK: |
| 995 | if (flags & MEDIA_LNK_FL_ENABLED) { |
| 996 | if (fimc->source_subdev_grp_id == 0) |
| 997 | fimc->source_subdev_grp_id = sd->grp_id; |
| 998 | else |
| 999 | ret = -EBUSY; |
| 1000 | } else { |
| 1001 | fimc->source_subdev_grp_id = 0; |
| 1002 | fimc->sensor = NULL; |
| 1003 | } |
| 1004 | break; |
| 1005 | |
| 1006 | case FLITE_SD_PAD_SOURCE_DMA: |
| 1007 | if (!(flags & MEDIA_LNK_FL_ENABLED)) |
| 1008 | atomic_set(&fimc->out_path, FIMC_IO_NONE); |
| 1009 | else |
| 1010 | atomic_set(&fimc->out_path, FIMC_IO_DMA); |
| 1011 | break; |
| 1012 | |
| 1013 | case FLITE_SD_PAD_SOURCE_ISP: |
| 1014 | if (!(flags & MEDIA_LNK_FL_ENABLED)) |
| 1015 | atomic_set(&fimc->out_path, FIMC_IO_NONE); |
| 1016 | else |
| 1017 | atomic_set(&fimc->out_path, FIMC_IO_ISP); |
| 1018 | break; |
| 1019 | |
| 1020 | default: |
| 1021 | v4l2_err(sd, "Invalid pad index\n"); |
| 1022 | ret = -EINVAL; |
| 1023 | } |
| 1024 | mb(); |
| 1025 | |
| 1026 | return ret; |
| 1027 | } |
| 1028 | |
| 1029 | static const struct media_entity_operations fimc_lite_subdev_media_ops = { |
| 1030 | .link_setup = fimc_lite_link_setup, |
| 1031 | }; |
| 1032 | |
| 1033 | static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd, |
| 1034 | struct v4l2_subdev_pad_config *cfg, |
| 1035 | struct v4l2_subdev_mbus_code_enum *code) |
| 1036 | { |
| 1037 | const struct fimc_fmt *fmt; |
| 1038 | |
| 1039 | fmt = fimc_lite_find_format(NULL, NULL, 0, code->index); |
| 1040 | if (!fmt) |
| 1041 | return -EINVAL; |
| 1042 | code->code = fmt->mbus_code; |
| 1043 | return 0; |
| 1044 | } |
| 1045 | |
| 1046 | static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt( |
| 1047 | struct v4l2_subdev *sd, |
| 1048 | struct v4l2_subdev_pad_config *cfg, unsigned int pad) |
| 1049 | { |
| 1050 | if (pad != FLITE_SD_PAD_SINK) |
| 1051 | pad = FLITE_SD_PAD_SOURCE_DMA; |
| 1052 | |
| 1053 | return v4l2_subdev_get_try_format(sd, cfg, pad); |
| 1054 | } |
| 1055 | |
| 1056 | static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd, |
| 1057 | struct v4l2_subdev_pad_config *cfg, |
| 1058 | struct v4l2_subdev_format *fmt) |
| 1059 | { |
| 1060 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1061 | struct v4l2_mbus_framefmt *mf = &fmt->format; |
| 1062 | struct flite_frame *f = &fimc->inp_frame; |
| 1063 | |
| 1064 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 1065 | mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad); |
| 1066 | fmt->format = *mf; |
| 1067 | return 0; |
| 1068 | } |
| 1069 | |
| 1070 | mutex_lock(&fimc->lock); |
| 1071 | mf->colorspace = f->fmt->colorspace; |
| 1072 | mf->code = f->fmt->mbus_code; |
| 1073 | |
| 1074 | if (fmt->pad == FLITE_SD_PAD_SINK) { |
| 1075 | /* full camera input frame size */ |
| 1076 | mf->width = f->f_width; |
| 1077 | mf->height = f->f_height; |
| 1078 | } else { |
| 1079 | /* crop size */ |
| 1080 | mf->width = f->rect.width; |
| 1081 | mf->height = f->rect.height; |
| 1082 | } |
| 1083 | mutex_unlock(&fimc->lock); |
| 1084 | return 0; |
| 1085 | } |
| 1086 | |
| 1087 | static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd, |
| 1088 | struct v4l2_subdev_pad_config *cfg, |
| 1089 | struct v4l2_subdev_format *fmt) |
| 1090 | { |
| 1091 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1092 | struct v4l2_mbus_framefmt *mf = &fmt->format; |
| 1093 | struct flite_frame *sink = &fimc->inp_frame; |
| 1094 | struct flite_frame *source = &fimc->out_frame; |
| 1095 | const struct fimc_fmt *ffmt; |
| 1096 | |
| 1097 | v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n", |
| 1098 | fmt->pad, mf->code, mf->width, mf->height); |
| 1099 | |
| 1100 | mutex_lock(&fimc->lock); |
| 1101 | |
| 1102 | if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP && |
| 1103 | sd->entity.stream_count > 0) || |
| 1104 | (atomic_read(&fimc->out_path) == FIMC_IO_DMA && |
| 1105 | vb2_is_busy(&fimc->vb_queue))) { |
| 1106 | mutex_unlock(&fimc->lock); |
| 1107 | return -EBUSY; |
| 1108 | } |
| 1109 | |
| 1110 | ffmt = fimc_lite_subdev_try_fmt(fimc, cfg, fmt); |
| 1111 | |
| 1112 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 1113 | struct v4l2_mbus_framefmt *src_fmt; |
| 1114 | |
| 1115 | mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad); |
| 1116 | *mf = fmt->format; |
| 1117 | |
| 1118 | if (fmt->pad == FLITE_SD_PAD_SINK) { |
| 1119 | unsigned int pad = FLITE_SD_PAD_SOURCE_DMA; |
| 1120 | src_fmt = __fimc_lite_subdev_get_try_fmt(sd, cfg, pad); |
| 1121 | *src_fmt = *mf; |
| 1122 | } |
| 1123 | |
| 1124 | mutex_unlock(&fimc->lock); |
| 1125 | return 0; |
| 1126 | } |
| 1127 | |
| 1128 | if (fmt->pad == FLITE_SD_PAD_SINK) { |
| 1129 | sink->f_width = mf->width; |
| 1130 | sink->f_height = mf->height; |
| 1131 | sink->fmt = ffmt; |
| 1132 | /* Set sink crop rectangle */ |
| 1133 | sink->rect.width = mf->width; |
| 1134 | sink->rect.height = mf->height; |
| 1135 | sink->rect.left = 0; |
| 1136 | sink->rect.top = 0; |
| 1137 | /* Reset source format and crop rectangle */ |
| 1138 | source->rect = sink->rect; |
| 1139 | source->f_width = mf->width; |
| 1140 | source->f_height = mf->height; |
| 1141 | } |
| 1142 | |
| 1143 | mutex_unlock(&fimc->lock); |
| 1144 | return 0; |
| 1145 | } |
| 1146 | |
| 1147 | static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd, |
| 1148 | struct v4l2_subdev_pad_config *cfg, |
| 1149 | struct v4l2_subdev_selection *sel) |
| 1150 | { |
| 1151 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1152 | struct flite_frame *f = &fimc->inp_frame; |
| 1153 | |
| 1154 | if ((sel->target != V4L2_SEL_TGT_CROP && |
| 1155 | sel->target != V4L2_SEL_TGT_CROP_BOUNDS) || |
| 1156 | sel->pad != FLITE_SD_PAD_SINK) |
| 1157 | return -EINVAL; |
| 1158 | |
| 1159 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 1160 | sel->r = *v4l2_subdev_get_try_crop(sd, cfg, sel->pad); |
| 1161 | return 0; |
| 1162 | } |
| 1163 | |
| 1164 | mutex_lock(&fimc->lock); |
| 1165 | if (sel->target == V4L2_SEL_TGT_CROP) { |
| 1166 | sel->r = f->rect; |
| 1167 | } else { |
| 1168 | sel->r.left = 0; |
| 1169 | sel->r.top = 0; |
| 1170 | sel->r.width = f->f_width; |
| 1171 | sel->r.height = f->f_height; |
| 1172 | } |
| 1173 | mutex_unlock(&fimc->lock); |
| 1174 | |
| 1175 | v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", |
| 1176 | __func__, f->rect.left, f->rect.top, f->rect.width, |
| 1177 | f->rect.height, f->f_width, f->f_height); |
| 1178 | |
| 1179 | return 0; |
| 1180 | } |
| 1181 | |
| 1182 | static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd, |
| 1183 | struct v4l2_subdev_pad_config *cfg, |
| 1184 | struct v4l2_subdev_selection *sel) |
| 1185 | { |
| 1186 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1187 | struct flite_frame *f = &fimc->inp_frame; |
| 1188 | int ret = 0; |
| 1189 | |
| 1190 | if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK) |
| 1191 | return -EINVAL; |
| 1192 | |
| 1193 | mutex_lock(&fimc->lock); |
| 1194 | fimc_lite_try_crop(fimc, &sel->r); |
| 1195 | |
| 1196 | if (sel->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 1197 | *v4l2_subdev_get_try_crop(sd, cfg, sel->pad) = sel->r; |
| 1198 | } else { |
| 1199 | unsigned long flags; |
| 1200 | spin_lock_irqsave(&fimc->slock, flags); |
| 1201 | f->rect = sel->r; |
| 1202 | /* Same crop rectangle on the source pad */ |
| 1203 | fimc->out_frame.rect = sel->r; |
| 1204 | set_bit(ST_FLITE_CONFIG, &fimc->state); |
| 1205 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 1206 | } |
| 1207 | mutex_unlock(&fimc->lock); |
| 1208 | |
| 1209 | v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n", |
| 1210 | __func__, f->rect.left, f->rect.top, f->rect.width, |
| 1211 | f->rect.height, f->f_width, f->f_height); |
| 1212 | |
| 1213 | return ret; |
| 1214 | } |
| 1215 | |
| 1216 | static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on) |
| 1217 | { |
| 1218 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1219 | unsigned long flags; |
| 1220 | int ret; |
| 1221 | |
| 1222 | /* |
| 1223 | * Find sensor subdev linked to FIMC-LITE directly or through |
| 1224 | * MIPI-CSIS. This is required for configuration where FIMC-LITE |
| 1225 | * is used as a subdev only and feeds data internally to FIMC-IS. |
| 1226 | * The pipeline links are protected through entity.stream_count |
| 1227 | * so there is no need to take the media graph mutex here. |
| 1228 | */ |
| 1229 | fimc->sensor = fimc_find_remote_sensor(&sd->entity); |
| 1230 | |
| 1231 | if (atomic_read(&fimc->out_path) != FIMC_IO_ISP) |
| 1232 | return -ENOIOCTLCMD; |
| 1233 | |
| 1234 | mutex_lock(&fimc->lock); |
| 1235 | if (on) { |
| 1236 | flite_hw_reset(fimc); |
| 1237 | ret = fimc_lite_hw_init(fimc, true); |
| 1238 | if (!ret) { |
| 1239 | spin_lock_irqsave(&fimc->slock, flags); |
| 1240 | flite_hw_capture_start(fimc); |
| 1241 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 1242 | } |
| 1243 | } else { |
| 1244 | set_bit(ST_FLITE_OFF, &fimc->state); |
| 1245 | |
| 1246 | spin_lock_irqsave(&fimc->slock, flags); |
| 1247 | flite_hw_capture_stop(fimc); |
| 1248 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 1249 | |
| 1250 | ret = wait_event_timeout(fimc->irq_queue, |
| 1251 | !test_bit(ST_FLITE_OFF, &fimc->state), |
| 1252 | msecs_to_jiffies(200)); |
| 1253 | if (ret == 0) |
| 1254 | v4l2_err(sd, "s_stream(0) timeout\n"); |
| 1255 | clear_bit(ST_FLITE_RUN, &fimc->state); |
| 1256 | } |
| 1257 | |
| 1258 | mutex_unlock(&fimc->lock); |
| 1259 | return ret; |
| 1260 | } |
| 1261 | |
| 1262 | static int fimc_lite_log_status(struct v4l2_subdev *sd) |
| 1263 | { |
| 1264 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1265 | |
| 1266 | flite_hw_dump_regs(fimc, __func__); |
| 1267 | return 0; |
| 1268 | } |
| 1269 | |
| 1270 | static int fimc_lite_subdev_registered(struct v4l2_subdev *sd) |
| 1271 | { |
| 1272 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1273 | struct vb2_queue *q = &fimc->vb_queue; |
| 1274 | struct video_device *vfd = &fimc->ve.vdev; |
| 1275 | int ret; |
| 1276 | |
| 1277 | memset(vfd, 0, sizeof(*vfd)); |
| 1278 | atomic_set(&fimc->out_path, FIMC_IO_DMA); |
| 1279 | |
| 1280 | snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture", |
| 1281 | fimc->index); |
| 1282 | |
| 1283 | vfd->fops = &fimc_lite_fops; |
| 1284 | vfd->ioctl_ops = &fimc_lite_ioctl_ops; |
| 1285 | vfd->v4l2_dev = sd->v4l2_dev; |
| 1286 | vfd->minor = -1; |
| 1287 | vfd->release = video_device_release_empty; |
| 1288 | vfd->queue = q; |
| 1289 | fimc->reqbufs_count = 0; |
| 1290 | |
| 1291 | INIT_LIST_HEAD(&fimc->pending_buf_q); |
| 1292 | INIT_LIST_HEAD(&fimc->active_buf_q); |
| 1293 | |
| 1294 | memset(q, 0, sizeof(*q)); |
| 1295 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; |
| 1296 | q->io_modes = VB2_MMAP | VB2_USERPTR; |
| 1297 | q->ops = &fimc_lite_qops; |
| 1298 | q->mem_ops = &vb2_dma_contig_memops; |
| 1299 | q->buf_struct_size = sizeof(struct flite_buffer); |
| 1300 | q->drv_priv = fimc; |
| 1301 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 1302 | q->lock = &fimc->lock; |
| 1303 | |
| 1304 | ret = vb2_queue_init(q); |
| 1305 | if (ret < 0) |
| 1306 | return ret; |
| 1307 | |
| 1308 | fimc->vd_pad.flags = MEDIA_PAD_FL_SINK; |
| 1309 | ret = media_entity_pads_init(&vfd->entity, 1, &fimc->vd_pad); |
| 1310 | if (ret < 0) |
| 1311 | return ret; |
| 1312 | |
| 1313 | video_set_drvdata(vfd, fimc); |
| 1314 | fimc->ve.pipe = v4l2_get_subdev_hostdata(sd); |
| 1315 | |
| 1316 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1); |
| 1317 | if (ret < 0) { |
| 1318 | media_entity_cleanup(&vfd->entity); |
| 1319 | fimc->ve.pipe = NULL; |
| 1320 | return ret; |
| 1321 | } |
| 1322 | |
| 1323 | v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n", |
| 1324 | vfd->name, video_device_node_name(vfd)); |
| 1325 | return 0; |
| 1326 | } |
| 1327 | |
| 1328 | static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd) |
| 1329 | { |
| 1330 | struct fimc_lite *fimc = v4l2_get_subdevdata(sd); |
| 1331 | |
| 1332 | if (fimc == NULL) |
| 1333 | return; |
| 1334 | |
| 1335 | mutex_lock(&fimc->lock); |
| 1336 | |
| 1337 | if (video_is_registered(&fimc->ve.vdev)) { |
| 1338 | video_unregister_device(&fimc->ve.vdev); |
| 1339 | media_entity_cleanup(&fimc->ve.vdev.entity); |
| 1340 | fimc->ve.pipe = NULL; |
| 1341 | } |
| 1342 | |
| 1343 | mutex_unlock(&fimc->lock); |
| 1344 | } |
| 1345 | |
| 1346 | static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = { |
| 1347 | .registered = fimc_lite_subdev_registered, |
| 1348 | .unregistered = fimc_lite_subdev_unregistered, |
| 1349 | }; |
| 1350 | |
| 1351 | static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = { |
| 1352 | .enum_mbus_code = fimc_lite_subdev_enum_mbus_code, |
| 1353 | .get_selection = fimc_lite_subdev_get_selection, |
| 1354 | .set_selection = fimc_lite_subdev_set_selection, |
| 1355 | .get_fmt = fimc_lite_subdev_get_fmt, |
| 1356 | .set_fmt = fimc_lite_subdev_set_fmt, |
| 1357 | }; |
| 1358 | |
| 1359 | static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = { |
| 1360 | .s_stream = fimc_lite_subdev_s_stream, |
| 1361 | }; |
| 1362 | |
| 1363 | static const struct v4l2_subdev_core_ops fimc_lite_core_ops = { |
| 1364 | .log_status = fimc_lite_log_status, |
| 1365 | }; |
| 1366 | |
| 1367 | static struct v4l2_subdev_ops fimc_lite_subdev_ops = { |
| 1368 | .core = &fimc_lite_core_ops, |
| 1369 | .video = &fimc_lite_subdev_video_ops, |
| 1370 | .pad = &fimc_lite_subdev_pad_ops, |
| 1371 | }; |
| 1372 | |
| 1373 | static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl) |
| 1374 | { |
| 1375 | struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite, |
| 1376 | ctrl_handler); |
| 1377 | set_bit(ST_FLITE_CONFIG, &fimc->state); |
| 1378 | return 0; |
| 1379 | } |
| 1380 | |
| 1381 | static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = { |
| 1382 | .s_ctrl = fimc_lite_s_ctrl, |
| 1383 | }; |
| 1384 | |
| 1385 | static const struct v4l2_ctrl_config fimc_lite_ctrl = { |
| 1386 | .ops = &fimc_lite_ctrl_ops, |
| 1387 | .id = V4L2_CTRL_CLASS_USER | 0x1001, |
| 1388 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
| 1389 | .name = "Test Pattern 640x480", |
| 1390 | .step = 1, |
| 1391 | }; |
| 1392 | |
| 1393 | static void fimc_lite_set_default_config(struct fimc_lite *fimc) |
| 1394 | { |
| 1395 | struct flite_frame *sink = &fimc->inp_frame; |
| 1396 | struct flite_frame *source = &fimc->out_frame; |
| 1397 | |
| 1398 | sink->fmt = &fimc_lite_formats[0]; |
| 1399 | sink->f_width = FLITE_DEFAULT_WIDTH; |
| 1400 | sink->f_height = FLITE_DEFAULT_HEIGHT; |
| 1401 | |
| 1402 | sink->rect.width = FLITE_DEFAULT_WIDTH; |
| 1403 | sink->rect.height = FLITE_DEFAULT_HEIGHT; |
| 1404 | sink->rect.left = 0; |
| 1405 | sink->rect.top = 0; |
| 1406 | |
| 1407 | *source = *sink; |
| 1408 | } |
| 1409 | |
| 1410 | static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc) |
| 1411 | { |
| 1412 | struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler; |
| 1413 | struct v4l2_subdev *sd = &fimc->subdev; |
| 1414 | int ret; |
| 1415 | |
| 1416 | v4l2_subdev_init(sd, &fimc_lite_subdev_ops); |
| 1417 | sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
| 1418 | snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index); |
| 1419 | |
| 1420 | fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
| 1421 | fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE; |
| 1422 | fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE; |
| 1423 | ret = media_entity_pads_init(&sd->entity, FLITE_SD_PADS_NUM, |
| 1424 | fimc->subdev_pads); |
| 1425 | if (ret) |
| 1426 | return ret; |
| 1427 | |
| 1428 | v4l2_ctrl_handler_init(handler, 1); |
| 1429 | fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl, |
| 1430 | NULL); |
| 1431 | if (handler->error) { |
| 1432 | media_entity_cleanup(&sd->entity); |
| 1433 | return handler->error; |
| 1434 | } |
| 1435 | |
| 1436 | sd->ctrl_handler = handler; |
| 1437 | sd->internal_ops = &fimc_lite_subdev_internal_ops; |
| 1438 | sd->entity.ops = &fimc_lite_subdev_media_ops; |
| 1439 | sd->owner = THIS_MODULE; |
| 1440 | v4l2_set_subdevdata(sd, fimc); |
| 1441 | |
| 1442 | return 0; |
| 1443 | } |
| 1444 | |
| 1445 | static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc) |
| 1446 | { |
| 1447 | struct v4l2_subdev *sd = &fimc->subdev; |
| 1448 | |
| 1449 | v4l2_device_unregister_subdev(sd); |
| 1450 | media_entity_cleanup(&sd->entity); |
| 1451 | v4l2_ctrl_handler_free(&fimc->ctrl_handler); |
| 1452 | v4l2_set_subdevdata(sd, NULL); |
| 1453 | } |
| 1454 | |
| 1455 | static void fimc_lite_clk_put(struct fimc_lite *fimc) |
| 1456 | { |
| 1457 | if (IS_ERR(fimc->clock)) |
| 1458 | return; |
| 1459 | |
| 1460 | clk_unprepare(fimc->clock); |
| 1461 | clk_put(fimc->clock); |
| 1462 | fimc->clock = ERR_PTR(-EINVAL); |
| 1463 | } |
| 1464 | |
| 1465 | static int fimc_lite_clk_get(struct fimc_lite *fimc) |
| 1466 | { |
| 1467 | int ret; |
| 1468 | |
| 1469 | fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME); |
| 1470 | if (IS_ERR(fimc->clock)) |
| 1471 | return PTR_ERR(fimc->clock); |
| 1472 | |
| 1473 | ret = clk_prepare(fimc->clock); |
| 1474 | if (ret < 0) { |
| 1475 | clk_put(fimc->clock); |
| 1476 | fimc->clock = ERR_PTR(-EINVAL); |
| 1477 | } |
| 1478 | return ret; |
| 1479 | } |
| 1480 | |
| 1481 | static const struct of_device_id flite_of_match[]; |
| 1482 | |
| 1483 | static int fimc_lite_probe(struct platform_device *pdev) |
| 1484 | { |
| 1485 | struct flite_drvdata *drv_data = NULL; |
| 1486 | struct device *dev = &pdev->dev; |
| 1487 | const struct of_device_id *of_id; |
| 1488 | struct fimc_lite *fimc; |
| 1489 | struct resource *res; |
| 1490 | int ret; |
| 1491 | |
| 1492 | if (!dev->of_node) |
| 1493 | return -ENODEV; |
| 1494 | |
| 1495 | fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL); |
| 1496 | if (!fimc) |
| 1497 | return -ENOMEM; |
| 1498 | |
| 1499 | of_id = of_match_node(flite_of_match, dev->of_node); |
| 1500 | if (of_id) |
| 1501 | drv_data = (struct flite_drvdata *)of_id->data; |
| 1502 | fimc->index = of_alias_get_id(dev->of_node, "fimc-lite"); |
| 1503 | |
| 1504 | if (!drv_data || fimc->index >= drv_data->num_instances || |
| 1505 | fimc->index < 0) { |
| 1506 | dev_err(dev, "Wrong %s node alias\n", |
| 1507 | dev->of_node->full_name); |
| 1508 | return -EINVAL; |
| 1509 | } |
| 1510 | |
| 1511 | fimc->dd = drv_data; |
| 1512 | fimc->pdev = pdev; |
| 1513 | |
| 1514 | init_waitqueue_head(&fimc->irq_queue); |
| 1515 | spin_lock_init(&fimc->slock); |
| 1516 | mutex_init(&fimc->lock); |
| 1517 | |
| 1518 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1519 | fimc->regs = devm_ioremap_resource(dev, res); |
| 1520 | if (IS_ERR(fimc->regs)) |
| 1521 | return PTR_ERR(fimc->regs); |
| 1522 | |
| 1523 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1524 | if (res == NULL) { |
| 1525 | dev_err(dev, "Failed to get IRQ resource\n"); |
| 1526 | return -ENXIO; |
| 1527 | } |
| 1528 | |
| 1529 | ret = fimc_lite_clk_get(fimc); |
| 1530 | if (ret) |
| 1531 | return ret; |
| 1532 | |
| 1533 | ret = devm_request_irq(dev, res->start, flite_irq_handler, |
| 1534 | 0, dev_name(dev), fimc); |
| 1535 | if (ret) { |
| 1536 | dev_err(dev, "Failed to install irq (%d)\n", ret); |
| 1537 | goto err_clk_put; |
| 1538 | } |
| 1539 | |
| 1540 | /* The video node will be created within the subdev's registered() op */ |
| 1541 | ret = fimc_lite_create_capture_subdev(fimc); |
| 1542 | if (ret) |
| 1543 | goto err_clk_put; |
| 1544 | |
| 1545 | platform_set_drvdata(pdev, fimc); |
| 1546 | pm_runtime_enable(dev); |
| 1547 | |
| 1548 | if (!pm_runtime_enabled(dev)) { |
| 1549 | ret = clk_enable(fimc->clock); |
| 1550 | if (ret < 0) |
| 1551 | goto err_sd; |
| 1552 | } |
| 1553 | |
| 1554 | fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev); |
| 1555 | if (IS_ERR(fimc->alloc_ctx)) { |
| 1556 | ret = PTR_ERR(fimc->alloc_ctx); |
| 1557 | goto err_clk_dis; |
| 1558 | } |
| 1559 | |
| 1560 | fimc_lite_set_default_config(fimc); |
| 1561 | |
| 1562 | dev_dbg(dev, "FIMC-LITE.%d registered successfully\n", |
| 1563 | fimc->index); |
| 1564 | return 0; |
| 1565 | |
| 1566 | err_clk_dis: |
| 1567 | if (!pm_runtime_enabled(dev)) |
| 1568 | clk_disable(fimc->clock); |
| 1569 | err_sd: |
| 1570 | fimc_lite_unregister_capture_subdev(fimc); |
| 1571 | err_clk_put: |
| 1572 | fimc_lite_clk_put(fimc); |
| 1573 | return ret; |
| 1574 | } |
| 1575 | |
| 1576 | #ifdef CONFIG_PM |
| 1577 | static int fimc_lite_runtime_resume(struct device *dev) |
| 1578 | { |
| 1579 | struct fimc_lite *fimc = dev_get_drvdata(dev); |
| 1580 | |
| 1581 | clk_enable(fimc->clock); |
| 1582 | return 0; |
| 1583 | } |
| 1584 | |
| 1585 | static int fimc_lite_runtime_suspend(struct device *dev) |
| 1586 | { |
| 1587 | struct fimc_lite *fimc = dev_get_drvdata(dev); |
| 1588 | |
| 1589 | clk_disable(fimc->clock); |
| 1590 | return 0; |
| 1591 | } |
| 1592 | #endif |
| 1593 | |
| 1594 | #ifdef CONFIG_PM_SLEEP |
| 1595 | static int fimc_lite_resume(struct device *dev) |
| 1596 | { |
| 1597 | struct fimc_lite *fimc = dev_get_drvdata(dev); |
| 1598 | struct flite_buffer *buf; |
| 1599 | unsigned long flags; |
| 1600 | int i; |
| 1601 | |
| 1602 | spin_lock_irqsave(&fimc->slock, flags); |
| 1603 | if (!test_and_clear_bit(ST_LPM, &fimc->state) || |
| 1604 | !test_bit(ST_FLITE_IN_USE, &fimc->state)) { |
| 1605 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 1606 | return 0; |
| 1607 | } |
| 1608 | flite_hw_reset(fimc); |
| 1609 | spin_unlock_irqrestore(&fimc->slock, flags); |
| 1610 | |
| 1611 | if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state)) |
| 1612 | return 0; |
| 1613 | |
| 1614 | INIT_LIST_HEAD(&fimc->active_buf_q); |
| 1615 | fimc_pipeline_call(&fimc->ve, open, |
| 1616 | &fimc->ve.vdev.entity, false); |
| 1617 | fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP); |
| 1618 | clear_bit(ST_FLITE_SUSPENDED, &fimc->state); |
| 1619 | |
| 1620 | for (i = 0; i < fimc->reqbufs_count; i++) { |
| 1621 | if (list_empty(&fimc->pending_buf_q)) |
| 1622 | break; |
| 1623 | buf = fimc_lite_pending_queue_pop(fimc); |
| 1624 | buffer_queue(&buf->vb.vb2_buf); |
| 1625 | } |
| 1626 | return 0; |
| 1627 | } |
| 1628 | |
| 1629 | static int fimc_lite_suspend(struct device *dev) |
| 1630 | { |
| 1631 | struct fimc_lite *fimc = dev_get_drvdata(dev); |
| 1632 | bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state); |
| 1633 | int ret; |
| 1634 | |
| 1635 | if (test_and_set_bit(ST_LPM, &fimc->state)) |
| 1636 | return 0; |
| 1637 | |
| 1638 | ret = fimc_lite_stop_capture(fimc, suspend); |
| 1639 | if (ret < 0 || !fimc_lite_active(fimc)) |
| 1640 | return ret; |
| 1641 | |
| 1642 | return fimc_pipeline_call(&fimc->ve, close); |
| 1643 | } |
| 1644 | #endif /* CONFIG_PM_SLEEP */ |
| 1645 | |
| 1646 | static int fimc_lite_remove(struct platform_device *pdev) |
| 1647 | { |
| 1648 | struct fimc_lite *fimc = platform_get_drvdata(pdev); |
| 1649 | struct device *dev = &pdev->dev; |
| 1650 | |
| 1651 | pm_runtime_disable(dev); |
| 1652 | pm_runtime_set_suspended(dev); |
| 1653 | fimc_lite_unregister_capture_subdev(fimc); |
| 1654 | vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); |
| 1655 | fimc_lite_clk_put(fimc); |
| 1656 | |
| 1657 | dev_info(dev, "Driver unloaded\n"); |
| 1658 | return 0; |
| 1659 | } |
| 1660 | |
| 1661 | static const struct dev_pm_ops fimc_lite_pm_ops = { |
| 1662 | SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume) |
| 1663 | SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume, |
| 1664 | NULL) |
| 1665 | }; |
| 1666 | |
| 1667 | /* EXYNOS4212, EXYNOS4412 */ |
| 1668 | static struct flite_drvdata fimc_lite_drvdata_exynos4 = { |
| 1669 | .max_width = 8192, |
| 1670 | .max_height = 8192, |
| 1671 | .out_width_align = 8, |
| 1672 | .win_hor_offs_align = 2, |
| 1673 | .out_hor_offs_align = 8, |
| 1674 | .max_dma_bufs = 1, |
| 1675 | .num_instances = 2, |
| 1676 | }; |
| 1677 | |
| 1678 | /* EXYNOS5250 */ |
| 1679 | static struct flite_drvdata fimc_lite_drvdata_exynos5 = { |
| 1680 | .max_width = 8192, |
| 1681 | .max_height = 8192, |
| 1682 | .out_width_align = 8, |
| 1683 | .win_hor_offs_align = 2, |
| 1684 | .out_hor_offs_align = 8, |
| 1685 | .max_dma_bufs = 32, |
| 1686 | .num_instances = 3, |
| 1687 | }; |
| 1688 | |
| 1689 | static const struct of_device_id flite_of_match[] = { |
| 1690 | { |
| 1691 | .compatible = "samsung,exynos4212-fimc-lite", |
| 1692 | .data = &fimc_lite_drvdata_exynos4, |
| 1693 | }, |
| 1694 | { |
| 1695 | .compatible = "samsung,exynos5250-fimc-lite", |
| 1696 | .data = &fimc_lite_drvdata_exynos5, |
| 1697 | }, |
| 1698 | { /* sentinel */ }, |
| 1699 | }; |
| 1700 | MODULE_DEVICE_TABLE(of, flite_of_match); |
| 1701 | |
| 1702 | static struct platform_driver fimc_lite_driver = { |
| 1703 | .probe = fimc_lite_probe, |
| 1704 | .remove = fimc_lite_remove, |
| 1705 | .driver = { |
| 1706 | .of_match_table = flite_of_match, |
| 1707 | .name = FIMC_LITE_DRV_NAME, |
| 1708 | .pm = &fimc_lite_pm_ops, |
| 1709 | } |
| 1710 | }; |
| 1711 | module_platform_driver(fimc_lite_driver); |
| 1712 | MODULE_LICENSE("GPL"); |
| 1713 | MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME); |