projects / deliverable / linux.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
iwlwifi: deprecate "iwl4965" alias support
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
... / ...
CommitLineData
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/sched.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
48#define DRV_NAME "iwlagn"
49
50#include "iwl-eeprom.h"
51#include "iwl-dev.h"
52#include "iwl-core.h"
53#include "iwl-io.h"
54#include "iwl-helpers.h"
55#include "iwl-sta.h"
56#include "iwl-calib.h"
57#include "iwl-agn.h"
58
59
60/******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66/*
67 * module name, copyright, version, etc.
68 */
69#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
70
71#ifdef CONFIG_IWLWIFI_DEBUG
72#define VD "d"
73#else
74#define VD
75#endif
76
77#define DRV_VERSION IWLWIFI_VERSION VD
78
79
80MODULE_DESCRIPTION(DRV_DESCRIPTION);
81MODULE_VERSION(DRV_VERSION);
82MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
83MODULE_LICENSE("GPL");
84MODULE_ALIAS("iwl4965");
85
86/**
87 * iwl_commit_rxon - commit staging_rxon to hardware
88 *
89 * The RXON command in staging_rxon is committed to the hardware and
90 * the active_rxon structure is updated with the new data. This
91 * function correctly transitions out of the RXON_ASSOC_MSK state if
92 * a HW tune is required based on the RXON structure changes.
93 */
94int iwl_commit_rxon(struct iwl_priv *priv)
95{
96 /* cast away the const for active_rxon in this function */
97 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
98 int ret;
99 bool new_assoc =
100 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
101
102 if (!iwl_is_alive(priv))
103 return -EBUSY;
104
105 /* always get timestamp with Rx frame */
106 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
107
108 ret = iwl_check_rxon_cmd(priv);
109 if (ret) {
110 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
111 return -EINVAL;
112 }
113
114 /*
115 * receive commit_rxon request
116 * abort any previous channel switch if still in process
117 */
118 if (priv->switch_rxon.switch_in_progress &&
119 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
120 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
121 le16_to_cpu(priv->switch_rxon.channel));
122 priv->switch_rxon.switch_in_progress = false;
123 }
124
125 /* If we don't need to send a full RXON, we can use
126 * iwl_rxon_assoc_cmd which is used to reconfigure filter
127 * and other flags for the current radio configuration. */
128 if (!iwl_full_rxon_required(priv)) {
129 ret = iwl_send_rxon_assoc(priv);
130 if (ret) {
131 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132 return ret;
133 }
134
135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136 iwl_print_rx_config_cmd(priv);
137 return 0;
138 }
139
140 /* If we are currently associated and the new config requires
141 * an RXON_ASSOC and the new config wants the associated mask enabled,
142 * we must clear the associated from the active configuration
143 * before we apply the new config */
144 if (iwl_is_associated(priv) && new_assoc) {
145 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
146 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
147
148 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
149 sizeof(struct iwl_rxon_cmd),
150 &priv->active_rxon);
151
152 /* If the mask clearing failed then we set
153 * active_rxon back to what it was previously */
154 if (ret) {
155 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
156 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
157 return ret;
158 }
159 iwl_clear_ucode_stations(priv, false);
160 iwl_restore_stations(priv);
161 }
162
163 IWL_DEBUG_INFO(priv, "Sending RXON\n"
164 "* with%s RXON_FILTER_ASSOC_MSK\n"
165 "* channel = %d\n"
166 "* bssid = %pM\n",
167 (new_assoc ? "" : "out"),
168 le16_to_cpu(priv->staging_rxon.channel),
169 priv->staging_rxon.bssid_addr);
170
171 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
172
173 /* Apply the new configuration
174 * RXON unassoc clears the station table in uCode so restoration of
175 * stations is needed after it (the RXON command) completes
176 */
177 if (!new_assoc) {
178 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
179 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
180 if (ret) {
181 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
182 return ret;
183 }
184 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON. \n");
185 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186 iwl_clear_ucode_stations(priv, false);
187 iwl_restore_stations(priv);
188 }
189
190 priv->start_calib = 0;
191 if (new_assoc) {
192 /*
193 * allow CTS-to-self if possible for new association.
194 * this is relevant only for 5000 series and up,
195 * but will not damage 4965
196 */
197 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
198
199 /* Apply the new configuration
200 * RXON assoc doesn't clear the station table in uCode,
201 */
202 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
203 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
204 if (ret) {
205 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
206 return ret;
207 }
208 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
209 }
210 iwl_print_rx_config_cmd(priv);
211
212 iwl_init_sensitivity(priv);
213
214 /* If we issue a new RXON command which required a tune then we must
215 * send a new TXPOWER command or we won't be able to Tx any frames */
216 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
217 if (ret) {
218 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
219 return ret;
220 }
221
222 return 0;
223}
224
225void iwl_update_chain_flags(struct iwl_priv *priv)
226{
227
228 if (priv->cfg->ops->hcmd->set_rxon_chain)
229 priv->cfg->ops->hcmd->set_rxon_chain(priv);
230 iwlcore_commit_rxon(priv);
231}
232
233static void iwl_clear_free_frames(struct iwl_priv *priv)
234{
235 struct list_head *element;
236
237 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
238 priv->frames_count);
239
240 while (!list_empty(&priv->free_frames)) {
241 element = priv->free_frames.next;
242 list_del(element);
243 kfree(list_entry(element, struct iwl_frame, list));
244 priv->frames_count--;
245 }
246
247 if (priv->frames_count) {
248 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
249 priv->frames_count);
250 priv->frames_count = 0;
251 }
252}
253
254static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
255{
256 struct iwl_frame *frame;
257 struct list_head *element;
258 if (list_empty(&priv->free_frames)) {
259 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
260 if (!frame) {
261 IWL_ERR(priv, "Could not allocate frame!\n");
262 return NULL;
263 }
264
265 priv->frames_count++;
266 return frame;
267 }
268
269 element = priv->free_frames.next;
270 list_del(element);
271 return list_entry(element, struct iwl_frame, list);
272}
273
274static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
275{
276 memset(frame, 0, sizeof(*frame));
277 list_add(&frame->list, &priv->free_frames);
278}
279
280static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
281 struct ieee80211_hdr *hdr,
282 int left)
283{
284 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
285 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
286 (priv->iw_mode != NL80211_IFTYPE_AP)))
287 return 0;
288
289 if (priv->ibss_beacon->len > left)
290 return 0;
291
292 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
293
294 return priv->ibss_beacon->len;
295}
296
297/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
298static void iwl_set_beacon_tim(struct iwl_priv *priv,
299 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
300 u8 *beacon, u32 frame_size)
301{
302 u16 tim_idx;
303 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
304
305 /*
306 * The index is relative to frame start but we start looking at the
307 * variable-length part of the beacon.
308 */
309 tim_idx = mgmt->u.beacon.variable - beacon;
310
311 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
312 while ((tim_idx < (frame_size - 2)) &&
313 (beacon[tim_idx] != WLAN_EID_TIM))
314 tim_idx += beacon[tim_idx+1] + 2;
315
316 /* If TIM field was found, set variables */
317 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
318 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
319 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
320 } else
321 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
322}
323
324static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
325 struct iwl_frame *frame)
326{
327 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
328 u32 frame_size;
329 u32 rate_flags;
330 u32 rate;
331 /*
332 * We have to set up the TX command, the TX Beacon command, and the
333 * beacon contents.
334 */
335
336 /* Initialize memory */
337 tx_beacon_cmd = &frame->u.beacon;
338 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
339
340 /* Set up TX beacon contents */
341 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
342 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
343 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
344 return 0;
345
346 /* Set up TX command fields */
347 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
348 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
349 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
350 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
351 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
352
353 /* Set up TX beacon command fields */
354 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
355 frame_size);
356
357 /* Set up packet rate and flags */
358 rate = iwl_rate_get_lowest_plcp(priv);
359 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
360 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
361 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
362 rate_flags |= RATE_MCS_CCK_MSK;
363 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
364 rate_flags);
365
366 return sizeof(*tx_beacon_cmd) + frame_size;
367}
368static int iwl_send_beacon_cmd(struct iwl_priv *priv)
369{
370 struct iwl_frame *frame;
371 unsigned int frame_size;
372 int rc;
373
374 frame = iwl_get_free_frame(priv);
375 if (!frame) {
376 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
377 "command.\n");
378 return -ENOMEM;
379 }
380
381 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
382 if (!frame_size) {
383 IWL_ERR(priv, "Error configuring the beacon command\n");
384 iwl_free_frame(priv, frame);
385 return -EINVAL;
386 }
387
388 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
389 &frame->u.cmd[0]);
390
391 iwl_free_frame(priv, frame);
392
393 return rc;
394}
395
396static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
397{
398 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
399
400 dma_addr_t addr = get_unaligned_le32(&tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 addr |=
403 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
404
405 return addr;
406}
407
408static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
409{
410 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
411
412 return le16_to_cpu(tb->hi_n_len) >> 4;
413}
414
415static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
416 dma_addr_t addr, u16 len)
417{
418 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
419 u16 hi_n_len = len << 4;
420
421 put_unaligned_le32(addr, &tb->lo);
422 if (sizeof(dma_addr_t) > sizeof(u32))
423 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
424
425 tb->hi_n_len = cpu_to_le16(hi_n_len);
426
427 tfd->num_tbs = idx + 1;
428}
429
430static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
431{
432 return tfd->num_tbs & 0x1f;
433}
434
435/**
436 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
437 * @priv - driver private data
438 * @txq - tx queue
439 *
440 * Does NOT advance any TFD circular buffer read/write indexes
441 * Does NOT free the TFD itself (which is within circular buffer)
442 */
443void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
444{
445 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
446 struct iwl_tfd *tfd;
447 struct pci_dev *dev = priv->pci_dev;
448 int index = txq->q.read_ptr;
449 int i;
450 int num_tbs;
451
452 tfd = &tfd_tmp[index];
453
454 /* Sanity check on number of chunks */
455 num_tbs = iwl_tfd_get_num_tbs(tfd);
456
457 if (num_tbs >= IWL_NUM_OF_TBS) {
458 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
459 /* @todo issue fatal error, it is quite serious situation */
460 return;
461 }
462
463 /* Unmap tx_cmd */
464 if (num_tbs)
465 pci_unmap_single(dev,
466 pci_unmap_addr(&txq->meta[index], mapping),
467 pci_unmap_len(&txq->meta[index], len),
468 PCI_DMA_BIDIRECTIONAL);
469
470 /* Unmap chunks, if any. */
471 for (i = 1; i < num_tbs; i++) {
472 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
473 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
474
475 if (txq->txb) {
476 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
477 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
478 }
479 }
480}
481
482int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
483 struct iwl_tx_queue *txq,
484 dma_addr_t addr, u16 len,
485 u8 reset, u8 pad)
486{
487 struct iwl_queue *q;
488 struct iwl_tfd *tfd, *tfd_tmp;
489 u32 num_tbs;
490
491 q = &txq->q;
492 tfd_tmp = (struct iwl_tfd *)txq->tfds;
493 tfd = &tfd_tmp[q->write_ptr];
494
495 if (reset)
496 memset(tfd, 0, sizeof(*tfd));
497
498 num_tbs = iwl_tfd_get_num_tbs(tfd);
499
500 /* Each TFD can point to a maximum 20 Tx buffers */
501 if (num_tbs >= IWL_NUM_OF_TBS) {
502 IWL_ERR(priv, "Error can not send more than %d chunks\n",
503 IWL_NUM_OF_TBS);
504 return -EINVAL;
505 }
506
507 BUG_ON(addr & ~DMA_BIT_MASK(36));
508 if (unlikely(addr & ~IWL_TX_DMA_MASK))
509 IWL_ERR(priv, "Unaligned address = %llx\n",
510 (unsigned long long)addr);
511
512 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
513
514 return 0;
515}
516
517/*
518 * Tell nic where to find circular buffer of Tx Frame Descriptors for
519 * given Tx queue, and enable the DMA channel used for that queue.
520 *
521 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
522 * channels supported in hardware.
523 */
524int iwl_hw_tx_queue_init(struct iwl_priv *priv,
525 struct iwl_tx_queue *txq)
526{
527 int txq_id = txq->q.id;
528
529 /* Circular buffer (TFD queue in DRAM) physical base address */
530 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
531 txq->q.dma_addr >> 8);
532
533 return 0;
534}
535
536/******************************************************************************
537 *
538 * Generic RX handler implementations
539 *
540 ******************************************************************************/
541static void iwl_rx_reply_alive(struct iwl_priv *priv,
542 struct iwl_rx_mem_buffer *rxb)
543{
544 struct iwl_rx_packet *pkt = rxb_addr(rxb);
545 struct iwl_alive_resp *palive;
546 struct delayed_work *pwork;
547
548 palive = &pkt->u.alive_frame;
549
550 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
551 "0x%01X 0x%01X\n",
552 palive->is_valid, palive->ver_type,
553 palive->ver_subtype);
554
555 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
556 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
557 memcpy(&priv->card_alive_init,
558 &pkt->u.alive_frame,
559 sizeof(struct iwl_init_alive_resp));
560 pwork = &priv->init_alive_start;
561 } else {
562 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
563 memcpy(&priv->card_alive, &pkt->u.alive_frame,
564 sizeof(struct iwl_alive_resp));
565 pwork = &priv->alive_start;
566 }
567
568 /* We delay the ALIVE response by 5ms to
569 * give the HW RF Kill time to activate... */
570 if (palive->is_valid == UCODE_VALID_OK)
571 queue_delayed_work(priv->workqueue, pwork,
572 msecs_to_jiffies(5));
573 else
574 IWL_WARN(priv, "uCode did not respond OK.\n");
575}
576
577static void iwl_bg_beacon_update(struct work_struct *work)
578{
579 struct iwl_priv *priv =
580 container_of(work, struct iwl_priv, beacon_update);
581 struct sk_buff *beacon;
582
583 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
584 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
585
586 if (!beacon) {
587 IWL_ERR(priv, "update beacon failed\n");
588 return;
589 }
590
591 mutex_lock(&priv->mutex);
592 /* new beacon skb is allocated every time; dispose previous.*/
593 if (priv->ibss_beacon)
594 dev_kfree_skb(priv->ibss_beacon);
595
596 priv->ibss_beacon = beacon;
597 mutex_unlock(&priv->mutex);
598
599 iwl_send_beacon_cmd(priv);
600}
601
602/**
603 * iwl_bg_statistics_periodic - Timer callback to queue statistics
604 *
605 * This callback is provided in order to send a statistics request.
606 *
607 * This timer function is continually reset to execute within
608 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
609 * was received. We need to ensure we receive the statistics in order
610 * to update the temperature used for calibrating the TXPOWER.
611 */
612static void iwl_bg_statistics_periodic(unsigned long data)
613{
614 struct iwl_priv *priv = (struct iwl_priv *)data;
615
616 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
617 return;
618
619 /* dont send host command if rf-kill is on */
620 if (!iwl_is_ready_rf(priv))
621 return;
622
623 iwl_send_statistics_request(priv, CMD_ASYNC, false);
624}
625
626
627static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
628 u32 start_idx, u32 num_events,
629 u32 mode)
630{
631 u32 i;
632 u32 ptr; /* SRAM byte address of log data */
633 u32 ev, time, data; /* event log data */
634 unsigned long reg_flags;
635
636 if (mode == 0)
637 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
638 else
639 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
640
641 /* Make sure device is powered up for SRAM reads */
642 spin_lock_irqsave(&priv->reg_lock, reg_flags);
643 if (iwl_grab_nic_access(priv)) {
644 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
645 return;
646 }
647
648 /* Set starting address; reads will auto-increment */
649 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
650 rmb();
651
652 /*
653 * "time" is actually "data" for mode 0 (no timestamp).
654 * place event id # at far right for easier visual parsing.
655 */
656 for (i = 0; i < num_events; i++) {
657 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
658 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
659 if (mode == 0) {
660 trace_iwlwifi_dev_ucode_cont_event(priv,
661 0, time, ev);
662 } else {
663 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
664 trace_iwlwifi_dev_ucode_cont_event(priv,
665 time, data, ev);
666 }
667 }
668 /* Allow device to power down */
669 iwl_release_nic_access(priv);
670 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
671}
672
673static void iwl_continuous_event_trace(struct iwl_priv *priv)
674{
675 u32 capacity; /* event log capacity in # entries */
676 u32 base; /* SRAM byte address of event log header */
677 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
678 u32 num_wraps; /* # times uCode wrapped to top of log */
679 u32 next_entry; /* index of next entry to be written by uCode */
680
681 if (priv->ucode_type == UCODE_INIT)
682 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
683 else
684 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
685 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
686 capacity = iwl_read_targ_mem(priv, base);
687 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
688 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
689 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
690 } else
691 return;
692
693 if (num_wraps == priv->event_log.num_wraps) {
694 iwl_print_cont_event_trace(priv,
695 base, priv->event_log.next_entry,
696 next_entry - priv->event_log.next_entry,
697 mode);
698 priv->event_log.non_wraps_count++;
699 } else {
700 if ((num_wraps - priv->event_log.num_wraps) > 1)
701 priv->event_log.wraps_more_count++;
702 else
703 priv->event_log.wraps_once_count++;
704 trace_iwlwifi_dev_ucode_wrap_event(priv,
705 num_wraps - priv->event_log.num_wraps,
706 next_entry, priv->event_log.next_entry);
707 if (next_entry < priv->event_log.next_entry) {
708 iwl_print_cont_event_trace(priv, base,
709 priv->event_log.next_entry,
710 capacity - priv->event_log.next_entry,
711 mode);
712
713 iwl_print_cont_event_trace(priv, base, 0,
714 next_entry, mode);
715 } else {
716 iwl_print_cont_event_trace(priv, base,
717 next_entry, capacity - next_entry,
718 mode);
719
720 iwl_print_cont_event_trace(priv, base, 0,
721 next_entry, mode);
722 }
723 }
724 priv->event_log.num_wraps = num_wraps;
725 priv->event_log.next_entry = next_entry;
726}
727
728/**
729 * iwl_bg_ucode_trace - Timer callback to log ucode event
730 *
731 * The timer is continually set to execute every
732 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
733 * this function is to perform continuous uCode event logging operation
734 * if enabled
735 */
736static void iwl_bg_ucode_trace(unsigned long data)
737{
738 struct iwl_priv *priv = (struct iwl_priv *)data;
739
740 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
741 return;
742
743 if (priv->event_log.ucode_trace) {
744 iwl_continuous_event_trace(priv);
745 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
746 mod_timer(&priv->ucode_trace,
747 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
748 }
749}
750
751static void iwl_rx_beacon_notif(struct iwl_priv *priv,
752 struct iwl_rx_mem_buffer *rxb)
753{
754#ifdef CONFIG_IWLWIFI_DEBUG
755 struct iwl_rx_packet *pkt = rxb_addr(rxb);
756 struct iwl4965_beacon_notif *beacon =
757 (struct iwl4965_beacon_notif *)pkt->u.raw;
758 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
759
760 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
761 "tsf %d %d rate %d\n",
762 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
763 beacon->beacon_notify_hdr.failure_frame,
764 le32_to_cpu(beacon->ibss_mgr_status),
765 le32_to_cpu(beacon->high_tsf),
766 le32_to_cpu(beacon->low_tsf), rate);
767#endif
768
769 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
770 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
771 queue_work(priv->workqueue, &priv->beacon_update);
772}
773
774/* Handle notification from uCode that card's power state is changing
775 * due to software, hardware, or critical temperature RFKILL */
776static void iwl_rx_card_state_notif(struct iwl_priv *priv,
777 struct iwl_rx_mem_buffer *rxb)
778{
779 struct iwl_rx_packet *pkt = rxb_addr(rxb);
780 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
781 unsigned long status = priv->status;
782
783 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
784 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
785 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
786 (flags & CT_CARD_DISABLED) ?
787 "Reached" : "Not reached");
788
789 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
790 CT_CARD_DISABLED)) {
791
792 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
793 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
794
795 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
796 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
797
798 if (!(flags & RXON_CARD_DISABLED)) {
799 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
800 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
801 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
802 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
803 }
804 if (flags & CT_CARD_DISABLED)
805 iwl_tt_enter_ct_kill(priv);
806 }
807 if (!(flags & CT_CARD_DISABLED))
808 iwl_tt_exit_ct_kill(priv);
809
810 if (flags & HW_CARD_DISABLED)
811 set_bit(STATUS_RF_KILL_HW, &priv->status);
812 else
813 clear_bit(STATUS_RF_KILL_HW, &priv->status);
814
815
816 if (!(flags & RXON_CARD_DISABLED))
817 iwl_scan_cancel(priv);
818
819 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
820 test_bit(STATUS_RF_KILL_HW, &priv->status)))
821 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
822 test_bit(STATUS_RF_KILL_HW, &priv->status));
823 else
824 wake_up_interruptible(&priv->wait_command_queue);
825}
826
827int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
828{
829 if (src == IWL_PWR_SRC_VAUX) {
830 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
831 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
832 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
833 ~APMG_PS_CTRL_MSK_PWR_SRC);
834 } else {
835 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
836 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
837 ~APMG_PS_CTRL_MSK_PWR_SRC);
838 }
839
840 return 0;
841}
842
843/**
844 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
845 *
846 * Setup the RX handlers for each of the reply types sent from the uCode
847 * to the host.
848 *
849 * This function chains into the hardware specific files for them to setup
850 * any hardware specific handlers as well.
851 */
852static void iwl_setup_rx_handlers(struct iwl_priv *priv)
853{
854 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
855 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
856 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
857 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
858 iwl_rx_spectrum_measure_notif;
859 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
860 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
861 iwl_rx_pm_debug_statistics_notif;
862 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
863
864 /*
865 * The same handler is used for both the REPLY to a discrete
866 * statistics request from the host as well as for the periodic
867 * statistics notifications (after received beacons) from the uCode.
868 */
869 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
870 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
871
872 iwl_setup_rx_scan_handlers(priv);
873
874 /* status change handler */
875 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
876
877 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
878 iwl_rx_missed_beacon_notif;
879 /* Rx handlers */
880 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
881 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
882 /* block ack */
883 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
884 /* Set up hardware specific Rx handlers */
885 priv->cfg->ops->lib->rx_handler_setup(priv);
886}
887
888/**
889 * iwl_rx_handle - Main entry function for receiving responses from uCode
890 *
891 * Uses the priv->rx_handlers callback function array to invoke
892 * the appropriate handlers, including command responses,
893 * frame-received notifications, and other notifications.
894 */
895void iwl_rx_handle(struct iwl_priv *priv)
896{
897 struct iwl_rx_mem_buffer *rxb;
898 struct iwl_rx_packet *pkt;
899 struct iwl_rx_queue *rxq = &priv->rxq;
900 u32 r, i;
901 int reclaim;
902 unsigned long flags;
903 u8 fill_rx = 0;
904 u32 count = 8;
905 int total_empty;
906
907 /* uCode's read index (stored in shared DRAM) indicates the last Rx
908 * buffer that the driver may process (last buffer filled by ucode). */
909 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
910 i = rxq->read;
911
912 /* Rx interrupt, but nothing sent from uCode */
913 if (i == r)
914 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
915
916 /* calculate total frames need to be restock after handling RX */
917 total_empty = r - rxq->write_actual;
918 if (total_empty < 0)
919 total_empty += RX_QUEUE_SIZE;
920
921 if (total_empty > (RX_QUEUE_SIZE / 2))
922 fill_rx = 1;
923
924 while (i != r) {
925 rxb = rxq->queue[i];
926
927 /* If an RXB doesn't have a Rx queue slot associated with it,
928 * then a bug has been introduced in the queue refilling
929 * routines -- catch it here */
930 BUG_ON(rxb == NULL);
931
932 rxq->queue[i] = NULL;
933
934 pci_unmap_page(priv->pci_dev, rxb->page_dma,
935 PAGE_SIZE << priv->hw_params.rx_page_order,
936 PCI_DMA_FROMDEVICE);
937 pkt = rxb_addr(rxb);
938
939 trace_iwlwifi_dev_rx(priv, pkt,
940 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
941
942 /* Reclaim a command buffer only if this packet is a response
943 * to a (driver-originated) command.
944 * If the packet (e.g. Rx frame) originated from uCode,
945 * there is no command buffer to reclaim.
946 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
947 * but apparently a few don't get set; catch them here. */
948 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
949 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
950 (pkt->hdr.cmd != REPLY_RX) &&
951 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
952 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
953 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
954 (pkt->hdr.cmd != REPLY_TX);
955
956 /* Based on type of command response or notification,
957 * handle those that need handling via function in
958 * rx_handlers table. See iwl_setup_rx_handlers() */
959 if (priv->rx_handlers[pkt->hdr.cmd]) {
960 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
961 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
962 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
963 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
964 } else {
965 /* No handling needed */
966 IWL_DEBUG_RX(priv,
967 "r %d i %d No handler needed for %s, 0x%02x\n",
968 r, i, get_cmd_string(pkt->hdr.cmd),
969 pkt->hdr.cmd);
970 }
971
972 /*
973 * XXX: After here, we should always check rxb->page
974 * against NULL before touching it or its virtual
975 * memory (pkt). Because some rx_handler might have
976 * already taken or freed the pages.
977 */
978
979 if (reclaim) {
980 /* Invoke any callbacks, transfer the buffer to caller,
981 * and fire off the (possibly) blocking iwl_send_cmd()
982 * as we reclaim the driver command queue */
983 if (rxb->page)
984 iwl_tx_cmd_complete(priv, rxb);
985 else
986 IWL_WARN(priv, "Claim null rxb?\n");
987 }
988
989 /* Reuse the page if possible. For notification packets and
990 * SKBs that fail to Rx correctly, add them back into the
991 * rx_free list for reuse later. */
992 spin_lock_irqsave(&rxq->lock, flags);
993 if (rxb->page != NULL) {
994 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
995 0, PAGE_SIZE << priv->hw_params.rx_page_order,
996 PCI_DMA_FROMDEVICE);
997 list_add_tail(&rxb->list, &rxq->rx_free);
998 rxq->free_count++;
999 } else
1000 list_add_tail(&rxb->list, &rxq->rx_used);
1001
1002 spin_unlock_irqrestore(&rxq->lock, flags);
1003
1004 i = (i + 1) & RX_QUEUE_MASK;
1005 /* If there are a lot of unused frames,
1006 * restock the Rx queue so ucode wont assert. */
1007 if (fill_rx) {
1008 count++;
1009 if (count >= 8) {
1010 rxq->read = i;
1011 iwlagn_rx_replenish_now(priv);
1012 count = 0;
1013 }
1014 }
1015 }
1016
1017 /* Backtrack one entry */
1018 rxq->read = i;
1019 if (fill_rx)
1020 iwlagn_rx_replenish_now(priv);
1021 else
1022 iwlagn_rx_queue_restock(priv);
1023}
1024
1025/* call this function to flush any scheduled tasklet */
1026static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1027{
1028 /* wait to make sure we flush pending tasklet*/
1029 synchronize_irq(priv->pci_dev->irq);
1030 tasklet_kill(&priv->irq_tasklet);
1031}
1032
1033static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1034{
1035 u32 inta, handled = 0;
1036 u32 inta_fh;
1037 unsigned long flags;
1038 u32 i;
1039#ifdef CONFIG_IWLWIFI_DEBUG
1040 u32 inta_mask;
1041#endif
1042
1043 spin_lock_irqsave(&priv->lock, flags);
1044
1045 /* Ack/clear/reset pending uCode interrupts.
1046 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1047 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1048 inta = iwl_read32(priv, CSR_INT);
1049 iwl_write32(priv, CSR_INT, inta);
1050
1051 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1052 * Any new interrupts that happen after this, either while we're
1053 * in this tasklet, or later, will show up in next ISR/tasklet. */
1054 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1055 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1056
1057#ifdef CONFIG_IWLWIFI_DEBUG
1058 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1059 /* just for debug */
1060 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1061 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1062 inta, inta_mask, inta_fh);
1063 }
1064#endif
1065
1066 spin_unlock_irqrestore(&priv->lock, flags);
1067
1068 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1069 * atomic, make sure that inta covers all the interrupts that
1070 * we've discovered, even if FH interrupt came in just after
1071 * reading CSR_INT. */
1072 if (inta_fh & CSR49_FH_INT_RX_MASK)
1073 inta |= CSR_INT_BIT_FH_RX;
1074 if (inta_fh & CSR49_FH_INT_TX_MASK)
1075 inta |= CSR_INT_BIT_FH_TX;
1076
1077 /* Now service all interrupt bits discovered above. */
1078 if (inta & CSR_INT_BIT_HW_ERR) {
1079 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1080
1081 /* Tell the device to stop sending interrupts */
1082 iwl_disable_interrupts(priv);
1083
1084 priv->isr_stats.hw++;
1085 iwl_irq_handle_error(priv);
1086
1087 handled |= CSR_INT_BIT_HW_ERR;
1088
1089 return;
1090 }
1091
1092#ifdef CONFIG_IWLWIFI_DEBUG
1093 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1094 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1095 if (inta & CSR_INT_BIT_SCD) {
1096 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1097 "the frame/frames.\n");
1098 priv->isr_stats.sch++;
1099 }
1100
1101 /* Alive notification via Rx interrupt will do the real work */
1102 if (inta & CSR_INT_BIT_ALIVE) {
1103 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1104 priv->isr_stats.alive++;
1105 }
1106 }
1107#endif
1108 /* Safely ignore these bits for debug checks below */
1109 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1110
1111 /* HW RF KILL switch toggled */
1112 if (inta & CSR_INT_BIT_RF_KILL) {
1113 int hw_rf_kill = 0;
1114 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1115 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1116 hw_rf_kill = 1;
1117
1118 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1119 hw_rf_kill ? "disable radio" : "enable radio");
1120
1121 priv->isr_stats.rfkill++;
1122
1123 /* driver only loads ucode once setting the interface up.
1124 * the driver allows loading the ucode even if the radio
1125 * is killed. Hence update the killswitch state here. The
1126 * rfkill handler will care about restarting if needed.
1127 */
1128 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1129 if (hw_rf_kill)
1130 set_bit(STATUS_RF_KILL_HW, &priv->status);
1131 else
1132 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1133 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1134 }
1135
1136 handled |= CSR_INT_BIT_RF_KILL;
1137 }
1138
1139 /* Chip got too hot and stopped itself */
1140 if (inta & CSR_INT_BIT_CT_KILL) {
1141 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1142 priv->isr_stats.ctkill++;
1143 handled |= CSR_INT_BIT_CT_KILL;
1144 }
1145
1146 /* Error detected by uCode */
1147 if (inta & CSR_INT_BIT_SW_ERR) {
1148 IWL_ERR(priv, "Microcode SW error detected. "
1149 " Restarting 0x%X.\n", inta);
1150 priv->isr_stats.sw++;
1151 priv->isr_stats.sw_err = inta;
1152 iwl_irq_handle_error(priv);
1153 handled |= CSR_INT_BIT_SW_ERR;
1154 }
1155
1156 /*
1157 * uCode wakes up after power-down sleep.
1158 * Tell device about any new tx or host commands enqueued,
1159 * and about any Rx buffers made available while asleep.
1160 */
1161 if (inta & CSR_INT_BIT_WAKEUP) {
1162 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1163 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1164 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1165 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1166 priv->isr_stats.wakeup++;
1167 handled |= CSR_INT_BIT_WAKEUP;
1168 }
1169
1170 /* All uCode command responses, including Tx command responses,
1171 * Rx "responses" (frame-received notification), and other
1172 * notifications from uCode come through here*/
1173 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1174 iwl_rx_handle(priv);
1175 priv->isr_stats.rx++;
1176 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1177 }
1178
1179 /* This "Tx" DMA channel is used only for loading uCode */
1180 if (inta & CSR_INT_BIT_FH_TX) {
1181 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1182 priv->isr_stats.tx++;
1183 handled |= CSR_INT_BIT_FH_TX;
1184 /* Wake up uCode load routine, now that load is complete */
1185 priv->ucode_write_complete = 1;
1186 wake_up_interruptible(&priv->wait_command_queue);
1187 }
1188
1189 if (inta & ~handled) {
1190 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1191 priv->isr_stats.unhandled++;
1192 }
1193
1194 if (inta & ~(priv->inta_mask)) {
1195 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1196 inta & ~priv->inta_mask);
1197 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1198 }
1199
1200 /* Re-enable all interrupts */
1201 /* only Re-enable if diabled by irq */
1202 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1203 iwl_enable_interrupts(priv);
1204
1205#ifdef CONFIG_IWLWIFI_DEBUG
1206 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1207 inta = iwl_read32(priv, CSR_INT);
1208 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1209 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1210 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1211 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1212 }
1213#endif
1214}
1215
1216/* tasklet for iwlagn interrupt */
1217static void iwl_irq_tasklet(struct iwl_priv *priv)
1218{
1219 u32 inta = 0;
1220 u32 handled = 0;
1221 unsigned long flags;
1222 u32 i;
1223#ifdef CONFIG_IWLWIFI_DEBUG
1224 u32 inta_mask;
1225#endif
1226
1227 spin_lock_irqsave(&priv->lock, flags);
1228
1229 /* Ack/clear/reset pending uCode interrupts.
1230 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1231 */
1232 iwl_write32(priv, CSR_INT, priv->_agn.inta);
1233
1234 inta = priv->_agn.inta;
1235
1236#ifdef CONFIG_IWLWIFI_DEBUG
1237 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1238 /* just for debug */
1239 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1240 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1241 inta, inta_mask);
1242 }
1243#endif
1244
1245 spin_unlock_irqrestore(&priv->lock, flags);
1246
1247 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1248 priv->_agn.inta = 0;
1249
1250 /* Now service all interrupt bits discovered above. */
1251 if (inta & CSR_INT_BIT_HW_ERR) {
1252 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1253
1254 /* Tell the device to stop sending interrupts */
1255 iwl_disable_interrupts(priv);
1256
1257 priv->isr_stats.hw++;
1258 iwl_irq_handle_error(priv);
1259
1260 handled |= CSR_INT_BIT_HW_ERR;
1261
1262 return;
1263 }
1264
1265#ifdef CONFIG_IWLWIFI_DEBUG
1266 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1267 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1268 if (inta & CSR_INT_BIT_SCD) {
1269 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1270 "the frame/frames.\n");
1271 priv->isr_stats.sch++;
1272 }
1273
1274 /* Alive notification via Rx interrupt will do the real work */
1275 if (inta & CSR_INT_BIT_ALIVE) {
1276 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1277 priv->isr_stats.alive++;
1278 }
1279 }
1280#endif
1281 /* Safely ignore these bits for debug checks below */
1282 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1283
1284 /* HW RF KILL switch toggled */
1285 if (inta & CSR_INT_BIT_RF_KILL) {
1286 int hw_rf_kill = 0;
1287 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1288 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1289 hw_rf_kill = 1;
1290
1291 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1292 hw_rf_kill ? "disable radio" : "enable radio");
1293
1294 priv->isr_stats.rfkill++;
1295
1296 /* driver only loads ucode once setting the interface up.
1297 * the driver allows loading the ucode even if the radio
1298 * is killed. Hence update the killswitch state here. The
1299 * rfkill handler will care about restarting if needed.
1300 */
1301 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1302 if (hw_rf_kill)
1303 set_bit(STATUS_RF_KILL_HW, &priv->status);
1304 else
1305 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1306 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1307 }
1308
1309 handled |= CSR_INT_BIT_RF_KILL;
1310 }
1311
1312 /* Chip got too hot and stopped itself */
1313 if (inta & CSR_INT_BIT_CT_KILL) {
1314 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1315 priv->isr_stats.ctkill++;
1316 handled |= CSR_INT_BIT_CT_KILL;
1317 }
1318
1319 /* Error detected by uCode */
1320 if (inta & CSR_INT_BIT_SW_ERR) {
1321 IWL_ERR(priv, "Microcode SW error detected. "
1322 " Restarting 0x%X.\n", inta);
1323 priv->isr_stats.sw++;
1324 priv->isr_stats.sw_err = inta;
1325 iwl_irq_handle_error(priv);
1326 handled |= CSR_INT_BIT_SW_ERR;
1327 }
1328
1329 /* uCode wakes up after power-down sleep */
1330 if (inta & CSR_INT_BIT_WAKEUP) {
1331 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1332 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1333 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1334 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1335
1336 priv->isr_stats.wakeup++;
1337
1338 handled |= CSR_INT_BIT_WAKEUP;
1339 }
1340
1341 /* All uCode command responses, including Tx command responses,
1342 * Rx "responses" (frame-received notification), and other
1343 * notifications from uCode come through here*/
1344 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1345 CSR_INT_BIT_RX_PERIODIC)) {
1346 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1347 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1348 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1349 iwl_write32(priv, CSR_FH_INT_STATUS,
1350 CSR49_FH_INT_RX_MASK);
1351 }
1352 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1353 handled |= CSR_INT_BIT_RX_PERIODIC;
1354 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1355 }
1356 /* Sending RX interrupt require many steps to be done in the
1357 * the device:
1358 * 1- write interrupt to current index in ICT table.
1359 * 2- dma RX frame.
1360 * 3- update RX shared data to indicate last write index.
1361 * 4- send interrupt.
1362 * This could lead to RX race, driver could receive RX interrupt
1363 * but the shared data changes does not reflect this;
1364 * periodic interrupt will detect any dangling Rx activity.
1365 */
1366
1367 /* Disable periodic interrupt; we use it as just a one-shot. */
1368 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1369 CSR_INT_PERIODIC_DIS);
1370 iwl_rx_handle(priv);
1371
1372 /*
1373 * Enable periodic interrupt in 8 msec only if we received
1374 * real RX interrupt (instead of just periodic int), to catch
1375 * any dangling Rx interrupt. If it was just the periodic
1376 * interrupt, there was no dangling Rx activity, and no need
1377 * to extend the periodic interrupt; one-shot is enough.
1378 */
1379 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1380 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1381 CSR_INT_PERIODIC_ENA);
1382
1383 priv->isr_stats.rx++;
1384 }
1385
1386 /* This "Tx" DMA channel is used only for loading uCode */
1387 if (inta & CSR_INT_BIT_FH_TX) {
1388 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1389 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1390 priv->isr_stats.tx++;
1391 handled |= CSR_INT_BIT_FH_TX;
1392 /* Wake up uCode load routine, now that load is complete */
1393 priv->ucode_write_complete = 1;
1394 wake_up_interruptible(&priv->wait_command_queue);
1395 }
1396
1397 if (inta & ~handled) {
1398 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1399 priv->isr_stats.unhandled++;
1400 }
1401
1402 if (inta & ~(priv->inta_mask)) {
1403 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1404 inta & ~priv->inta_mask);
1405 }
1406
1407 /* Re-enable all interrupts */
1408 /* only Re-enable if diabled by irq */
1409 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1410 iwl_enable_interrupts(priv);
1411}
1412
1413/* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1414#define ACK_CNT_RATIO (50)
1415#define BA_TIMEOUT_CNT (5)
1416#define BA_TIMEOUT_MAX (16)
1417
1418/**
1419 * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1420 *
1421 * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1422 * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1423 * operation state.
1424 */
1425bool iwl_good_ack_health(struct iwl_priv *priv,
1426 struct iwl_rx_packet *pkt)
1427{
1428 bool rc = true;
1429 int actual_ack_cnt_delta, expected_ack_cnt_delta;
1430 int ba_timeout_delta;
1431
1432 actual_ack_cnt_delta =
1433 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1434 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1435 expected_ack_cnt_delta =
1436 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1437 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1438 ba_timeout_delta =
1439 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1440 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1441 if ((priv->_agn.agg_tids_count > 0) &&
1442 (expected_ack_cnt_delta > 0) &&
1443 (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1444 < ACK_CNT_RATIO) &&
1445 (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1446 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1447 " expected_ack_cnt = %d\n",
1448 actual_ack_cnt_delta, expected_ack_cnt_delta);
1449
1450#ifdef CONFIG_IWLWIFI_DEBUG
1451 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1452 priv->delta_statistics.tx.rx_detected_cnt);
1453 IWL_DEBUG_RADIO(priv,
1454 "ack_or_ba_timeout_collision delta = %d\n",
1455 priv->delta_statistics.tx.
1456 ack_or_ba_timeout_collision);
1457#endif
1458 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1459 ba_timeout_delta);
1460 if (!actual_ack_cnt_delta &&
1461 (ba_timeout_delta >= BA_TIMEOUT_MAX))
1462 rc = false;
1463 }
1464 return rc;
1465}
1466
1467
1468/******************************************************************************
1469 *
1470 * uCode download functions
1471 *
1472 ******************************************************************************/
1473
1474static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1475{
1476 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1477 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1478 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1479 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1480 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1481 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1482}
1483
1484static void iwl_nic_start(struct iwl_priv *priv)
1485{
1486 /* Remove all resets to allow NIC to operate */
1487 iwl_write32(priv, CSR_RESET, 0);
1488}
1489
1490
1491static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1492static int iwl_mac_setup_register(struct iwl_priv *priv);
1493
1494static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1495{
1496 const char *name_pre = priv->cfg->fw_name_pre;
1497
1498 if (first)
1499 priv->fw_index = priv->cfg->ucode_api_max;
1500 else
1501 priv->fw_index--;
1502
1503 if (priv->fw_index < priv->cfg->ucode_api_min) {
1504 IWL_ERR(priv, "no suitable firmware found!\n");
1505 return -ENOENT;
1506 }
1507
1508 sprintf(priv->firmware_name, "%s%d%s",
1509 name_pre, priv->fw_index, ".ucode");
1510
1511 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1512 priv->firmware_name);
1513
1514 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1515 &priv->pci_dev->dev, GFP_KERNEL, priv,
1516 iwl_ucode_callback);
1517}
1518
1519/**
1520 * iwl_ucode_callback - callback when firmware was loaded
1521 *
1522 * If loaded successfully, copies the firmware into buffers
1523 * for the card to fetch (via DMA).
1524 */
1525static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1526{
1527 struct iwl_priv *priv = context;
1528 struct iwl_ucode_header *ucode;
1529 const unsigned int api_max = priv->cfg->ucode_api_max;
1530 const unsigned int api_min = priv->cfg->ucode_api_min;
1531 u8 *src;
1532 size_t len;
1533 u32 api_ver, build;
1534 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1535 int err;
1536 u16 eeprom_ver;
1537
1538 if (!ucode_raw) {
1539 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1540 priv->firmware_name);
1541 goto try_again;
1542 }
1543
1544 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1545 priv->firmware_name, ucode_raw->size);
1546
1547 /* Make sure that we got at least the v1 header! */
1548 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1549 IWL_ERR(priv, "File size way too small!\n");
1550 goto try_again;
1551 }
1552
1553 /* Data from ucode file: header followed by uCode images */
1554 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1555
1556 priv->ucode_ver = le32_to_cpu(ucode->ver);
1557 api_ver = IWL_UCODE_API(priv->ucode_ver);
1558 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1559 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1560 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1561 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1562 init_data_size =
1563 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1564 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1565 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1566
1567 /* api_ver should match the api version forming part of the
1568 * firmware filename ... but we don't check for that and only rely
1569 * on the API version read from firmware header from here on forward */
1570
1571 if (api_ver < api_min || api_ver > api_max) {
1572 IWL_ERR(priv, "Driver unable to support your firmware API. "
1573 "Driver supports v%u, firmware is v%u.\n",
1574 api_max, api_ver);
1575 goto try_again;
1576 }
1577
1578 if (api_ver != api_max)
1579 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1580 "got v%u. New firmware can be obtained "
1581 "from http://www.intellinuxwireless.org.\n",
1582 api_max, api_ver);
1583
1584 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1585 IWL_UCODE_MAJOR(priv->ucode_ver),
1586 IWL_UCODE_MINOR(priv->ucode_ver),
1587 IWL_UCODE_API(priv->ucode_ver),
1588 IWL_UCODE_SERIAL(priv->ucode_ver));
1589
1590 snprintf(priv->hw->wiphy->fw_version,
1591 sizeof(priv->hw->wiphy->fw_version),
1592 "%u.%u.%u.%u",
1593 IWL_UCODE_MAJOR(priv->ucode_ver),
1594 IWL_UCODE_MINOR(priv->ucode_ver),
1595 IWL_UCODE_API(priv->ucode_ver),
1596 IWL_UCODE_SERIAL(priv->ucode_ver));
1597
1598 if (build)
1599 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1600
1601 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1602 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1603 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1604 ? "OTP" : "EEPROM", eeprom_ver);
1605
1606 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1607 priv->ucode_ver);
1608 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1609 inst_size);
1610 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1611 data_size);
1612 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1613 init_size);
1614 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1615 init_data_size);
1616 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1617 boot_size);
1618
1619 /*
1620 * For any of the failures below (before allocating pci memory)
1621 * we will try to load a version with a smaller API -- maybe the
1622 * user just got a corrupted version of the latest API.
1623 */
1624
1625 /* Verify size of file vs. image size info in file's header */
1626 if (ucode_raw->size !=
1627 priv->cfg->ops->ucode->get_header_size(api_ver) +
1628 inst_size + data_size + init_size +
1629 init_data_size + boot_size) {
1630
1631 IWL_DEBUG_INFO(priv,
1632 "uCode file size %d does not match expected size\n",
1633 (int)ucode_raw->size);
1634 goto try_again;
1635 }
1636
1637 /* Verify that uCode images will fit in card's SRAM */
1638 if (inst_size > priv->hw_params.max_inst_size) {
1639 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1640 inst_size);
1641 goto try_again;
1642 }
1643
1644 if (data_size > priv->hw_params.max_data_size) {
1645 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1646 data_size);
1647 goto try_again;
1648 }
1649 if (init_size > priv->hw_params.max_inst_size) {
1650 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1651 init_size);
1652 goto try_again;
1653 }
1654 if (init_data_size > priv->hw_params.max_data_size) {
1655 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1656 init_data_size);
1657 goto try_again;
1658 }
1659 if (boot_size > priv->hw_params.max_bsm_size) {
1660 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1661 boot_size);
1662 goto try_again;
1663 }
1664
1665 /* Allocate ucode buffers for card's bus-master loading ... */
1666
1667 /* Runtime instructions and 2 copies of data:
1668 * 1) unmodified from disk
1669 * 2) backup cache for save/restore during power-downs */
1670 priv->ucode_code.len = inst_size;
1671 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1672
1673 priv->ucode_data.len = data_size;
1674 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1675
1676 priv->ucode_data_backup.len = data_size;
1677 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1678
1679 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1680 !priv->ucode_data_backup.v_addr)
1681 goto err_pci_alloc;
1682
1683 /* Initialization instructions and data */
1684 if (init_size && init_data_size) {
1685 priv->ucode_init.len = init_size;
1686 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1687
1688 priv->ucode_init_data.len = init_data_size;
1689 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1690
1691 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1692 goto err_pci_alloc;
1693 }
1694
1695 /* Bootstrap (instructions only, no data) */
1696 if (boot_size) {
1697 priv->ucode_boot.len = boot_size;
1698 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1699
1700 if (!priv->ucode_boot.v_addr)
1701 goto err_pci_alloc;
1702 }
1703
1704 /* Copy images into buffers for card's bus-master reads ... */
1705
1706 /* Runtime instructions (first block of data in file) */
1707 len = inst_size;
1708 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1709 memcpy(priv->ucode_code.v_addr, src, len);
1710 src += len;
1711
1712 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1713 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1714
1715 /* Runtime data (2nd block)
1716 * NOTE: Copy into backup buffer will be done in iwl_up() */
1717 len = data_size;
1718 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1719 memcpy(priv->ucode_data.v_addr, src, len);
1720 memcpy(priv->ucode_data_backup.v_addr, src, len);
1721 src += len;
1722
1723 /* Initialization instructions (3rd block) */
1724 if (init_size) {
1725 len = init_size;
1726 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1727 len);
1728 memcpy(priv->ucode_init.v_addr, src, len);
1729 src += len;
1730 }
1731
1732 /* Initialization data (4th block) */
1733 if (init_data_size) {
1734 len = init_data_size;
1735 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1736 len);
1737 memcpy(priv->ucode_init_data.v_addr, src, len);
1738 src += len;
1739 }
1740
1741 /* Bootstrap instructions (5th block) */
1742 len = boot_size;
1743 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1744 memcpy(priv->ucode_boot.v_addr, src, len);
1745
1746 /**************************************************
1747 * This is still part of probe() in a sense...
1748 *
1749 * 9. Setup and register with mac80211 and debugfs
1750 **************************************************/
1751 err = iwl_mac_setup_register(priv);
1752 if (err)
1753 goto out_unbind;
1754
1755 err = iwl_dbgfs_register(priv, DRV_NAME);
1756 if (err)
1757 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1758
1759 /* We have our copies now, allow OS release its copies */
1760 release_firmware(ucode_raw);
1761 return;
1762
1763 try_again:
1764 /* try next, if any */
1765 if (iwl_request_firmware(priv, false))
1766 goto out_unbind;
1767 release_firmware(ucode_raw);
1768 return;
1769
1770 err_pci_alloc:
1771 IWL_ERR(priv, "failed to allocate pci memory\n");
1772 iwl_dealloc_ucode_pci(priv);
1773 out_unbind:
1774 device_release_driver(&priv->pci_dev->dev);
1775 release_firmware(ucode_raw);
1776}
1777
1778static const char *desc_lookup_text[] = {
1779 "OK",
1780 "FAIL",
1781 "BAD_PARAM",
1782 "BAD_CHECKSUM",
1783 "NMI_INTERRUPT_WDG",
1784 "SYSASSERT",
1785 "FATAL_ERROR",
1786 "BAD_COMMAND",
1787 "HW_ERROR_TUNE_LOCK",
1788 "HW_ERROR_TEMPERATURE",
1789 "ILLEGAL_CHAN_FREQ",
1790 "VCC_NOT_STABLE",
1791 "FH_ERROR",
1792 "NMI_INTERRUPT_HOST",
1793 "NMI_INTERRUPT_ACTION_PT",
1794 "NMI_INTERRUPT_UNKNOWN",
1795 "UCODE_VERSION_MISMATCH",
1796 "HW_ERROR_ABS_LOCK",
1797 "HW_ERROR_CAL_LOCK_FAIL",
1798 "NMI_INTERRUPT_INST_ACTION_PT",
1799 "NMI_INTERRUPT_DATA_ACTION_PT",
1800 "NMI_TRM_HW_ER",
1801 "NMI_INTERRUPT_TRM",
1802 "NMI_INTERRUPT_BREAK_POINT"
1803 "DEBUG_0",
1804 "DEBUG_1",
1805 "DEBUG_2",
1806 "DEBUG_3",
1807 "ADVANCED SYSASSERT"
1808};
1809
1810static const char *desc_lookup(int i)
1811{
1812 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1813
1814 if (i < 0 || i > max)
1815 i = max;
1816
1817 return desc_lookup_text[i];
1818}
1819
1820#define ERROR_START_OFFSET (1 * sizeof(u32))
1821#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1822
1823void iwl_dump_nic_error_log(struct iwl_priv *priv)
1824{
1825 u32 data2, line;
1826 u32 desc, time, count, base, data1;
1827 u32 blink1, blink2, ilink1, ilink2;
1828
1829 if (priv->ucode_type == UCODE_INIT)
1830 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1831 else
1832 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1833
1834 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1835 IWL_ERR(priv,
1836 "Not valid error log pointer 0x%08X for %s uCode\n",
1837 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1838 return;
1839 }
1840
1841 count = iwl_read_targ_mem(priv, base);
1842
1843 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1844 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1845 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1846 priv->status, count);
1847 }
1848
1849 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1850 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1851 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1852 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1853 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1854 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1855 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1856 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1857 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1858
1859 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1860 blink1, blink2, ilink1, ilink2);
1861
1862 IWL_ERR(priv, "Desc Time "
1863 "data1 data2 line\n");
1864 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1865 desc_lookup(desc), desc, time, data1, data2, line);
1866 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1867 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1868 ilink1, ilink2);
1869
1870}
1871
1872#define EVENT_START_OFFSET (4 * sizeof(u32))
1873
1874/**
1875 * iwl_print_event_log - Dump error event log to syslog
1876 *
1877 */
1878static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1879 u32 num_events, u32 mode,
1880 int pos, char **buf, size_t bufsz)
1881{
1882 u32 i;
1883 u32 base; /* SRAM byte address of event log header */
1884 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1885 u32 ptr; /* SRAM byte address of log data */
1886 u32 ev, time, data; /* event log data */
1887 unsigned long reg_flags;
1888
1889 if (num_events == 0)
1890 return pos;
1891 if (priv->ucode_type == UCODE_INIT)
1892 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1893 else
1894 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1895
1896 if (mode == 0)
1897 event_size = 2 * sizeof(u32);
1898 else
1899 event_size = 3 * sizeof(u32);
1900
1901 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1902
1903 /* Make sure device is powered up for SRAM reads */
1904 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1905 iwl_grab_nic_access(priv);
1906
1907 /* Set starting address; reads will auto-increment */
1908 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1909 rmb();
1910
1911 /* "time" is actually "data" for mode 0 (no timestamp).
1912 * place event id # at far right for easier visual parsing. */
1913 for (i = 0; i < num_events; i++) {
1914 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1915 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1916 if (mode == 0) {
1917 /* data, ev */
1918 if (bufsz) {
1919 pos += scnprintf(*buf + pos, bufsz - pos,
1920 "EVT_LOG:0x%08x:%04u\n",
1921 time, ev);
1922 } else {
1923 trace_iwlwifi_dev_ucode_event(priv, 0,
1924 time, ev);
1925 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1926 time, ev);
1927 }
1928 } else {
1929 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1930 if (bufsz) {
1931 pos += scnprintf(*buf + pos, bufsz - pos,
1932 "EVT_LOGT:%010u:0x%08x:%04u\n",
1933 time, data, ev);
1934 } else {
1935 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1936 time, data, ev);
1937 trace_iwlwifi_dev_ucode_event(priv, time,
1938 data, ev);
1939 }
1940 }
1941 }
1942
1943 /* Allow device to power down */
1944 iwl_release_nic_access(priv);
1945 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1946 return pos;
1947}
1948
1949/**
1950 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1951 */
1952static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1953 u32 num_wraps, u32 next_entry,
1954 u32 size, u32 mode,
1955 int pos, char **buf, size_t bufsz)
1956{
1957 /*
1958 * display the newest DEFAULT_LOG_ENTRIES entries
1959 * i.e the entries just before the next ont that uCode would fill.
1960 */
1961 if (num_wraps) {
1962 if (next_entry < size) {
1963 pos = iwl_print_event_log(priv,
1964 capacity - (size - next_entry),
1965 size - next_entry, mode,
1966 pos, buf, bufsz);
1967 pos = iwl_print_event_log(priv, 0,
1968 next_entry, mode,
1969 pos, buf, bufsz);
1970 } else
1971 pos = iwl_print_event_log(priv, next_entry - size,
1972 size, mode, pos, buf, bufsz);
1973 } else {
1974 if (next_entry < size) {
1975 pos = iwl_print_event_log(priv, 0, next_entry,
1976 mode, pos, buf, bufsz);
1977 } else {
1978 pos = iwl_print_event_log(priv, next_entry - size,
1979 size, mode, pos, buf, bufsz);
1980 }
1981 }
1982 return pos;
1983}
1984
1985/* For sanity check only. Actual size is determined by uCode, typ. 512 */
1986#define MAX_EVENT_LOG_SIZE (512)
1987
1988#define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1989
1990int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1991 char **buf, bool display)
1992{
1993 u32 base; /* SRAM byte address of event log header */
1994 u32 capacity; /* event log capacity in # entries */
1995 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1996 u32 num_wraps; /* # times uCode wrapped to top of log */
1997 u32 next_entry; /* index of next entry to be written by uCode */
1998 u32 size; /* # entries that we'll print */
1999 int pos = 0;
2000 size_t bufsz = 0;
2001
2002 if (priv->ucode_type == UCODE_INIT)
2003 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2004 else
2005 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2006
2007 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2008 IWL_ERR(priv,
2009 "Invalid event log pointer 0x%08X for %s uCode\n",
2010 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2011 return -EINVAL;
2012 }
2013
2014 /* event log header */
2015 capacity = iwl_read_targ_mem(priv, base);
2016 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2017 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2018 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2019
2020 if (capacity > MAX_EVENT_LOG_SIZE) {
2021 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2022 capacity, MAX_EVENT_LOG_SIZE);
2023 capacity = MAX_EVENT_LOG_SIZE;
2024 }
2025
2026 if (next_entry > MAX_EVENT_LOG_SIZE) {
2027 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2028 next_entry, MAX_EVENT_LOG_SIZE);
2029 next_entry = MAX_EVENT_LOG_SIZE;
2030 }
2031
2032 size = num_wraps ? capacity : next_entry;
2033
2034 /* bail out if nothing in log */
2035 if (size == 0) {
2036 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2037 return pos;
2038 }
2039
2040#ifdef CONFIG_IWLWIFI_DEBUG
2041 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2042 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2043 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2044#else
2045 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2046 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2047#endif
2048 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2049 size);
2050
2051#ifdef CONFIG_IWLWIFI_DEBUG
2052 if (display) {
2053 if (full_log)
2054 bufsz = capacity * 48;
2055 else
2056 bufsz = size * 48;
2057 *buf = kmalloc(bufsz, GFP_KERNEL);
2058 if (!*buf)
2059 return -ENOMEM;
2060 }
2061 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2062 /*
2063 * if uCode has wrapped back to top of log,
2064 * start at the oldest entry,
2065 * i.e the next one that uCode would fill.
2066 */
2067 if (num_wraps)
2068 pos = iwl_print_event_log(priv, next_entry,
2069 capacity - next_entry, mode,
2070 pos, buf, bufsz);
2071 /* (then/else) start at top of log */
2072 pos = iwl_print_event_log(priv, 0,
2073 next_entry, mode, pos, buf, bufsz);
2074 } else
2075 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2076 next_entry, size, mode,
2077 pos, buf, bufsz);
2078#else
2079 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2080 next_entry, size, mode,
2081 pos, buf, bufsz);
2082#endif
2083 return pos;
2084}
2085
2086/**
2087 * iwl_alive_start - called after REPLY_ALIVE notification received
2088 * from protocol/runtime uCode (initialization uCode's
2089 * Alive gets handled by iwl_init_alive_start()).
2090 */
2091static void iwl_alive_start(struct iwl_priv *priv)
2092{
2093 int ret = 0;
2094
2095 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2096
2097 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2098 /* We had an error bringing up the hardware, so take it
2099 * all the way back down so we can try again */
2100 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2101 goto restart;
2102 }
2103
2104 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2105 * This is a paranoid check, because we would not have gotten the
2106 * "runtime" alive if code weren't properly loaded. */
2107 if (iwl_verify_ucode(priv)) {
2108 /* Runtime instruction load was bad;
2109 * take it all the way back down so we can try again */
2110 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2111 goto restart;
2112 }
2113
2114 ret = priv->cfg->ops->lib->alive_notify(priv);
2115 if (ret) {
2116 IWL_WARN(priv,
2117 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2118 goto restart;
2119 }
2120
2121 /* After the ALIVE response, we can send host commands to the uCode */
2122 set_bit(STATUS_ALIVE, &priv->status);
2123
2124 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2125 /* Enable timer to monitor the driver queues */
2126 mod_timer(&priv->monitor_recover,
2127 jiffies +
2128 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2129 }
2130
2131 if (iwl_is_rfkill(priv))
2132 return;
2133
2134 ieee80211_wake_queues(priv->hw);
2135
2136 priv->active_rate = IWL_RATES_MASK;
2137
2138 /* Configure Tx antenna selection based on H/W config */
2139 if (priv->cfg->ops->hcmd->set_tx_ant)
2140 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2141
2142 if (iwl_is_associated(priv)) {
2143 struct iwl_rxon_cmd *active_rxon =
2144 (struct iwl_rxon_cmd *)&priv->active_rxon;
2145 /* apply any changes in staging */
2146 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2147 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2148 } else {
2149 /* Initialize our rx_config data */
2150 iwl_connection_init_rx_config(priv, priv->iw_mode);
2151
2152 if (priv->cfg->ops->hcmd->set_rxon_chain)
2153 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2154
2155 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2156 }
2157
2158 /* Configure Bluetooth device coexistence support */
2159 iwl_send_bt_config(priv);
2160
2161 iwl_reset_run_time_calib(priv);
2162
2163 /* Configure the adapter for unassociated operation */
2164 iwlcore_commit_rxon(priv);
2165
2166 /* At this point, the NIC is initialized and operational */
2167 iwl_rf_kill_ct_config(priv);
2168
2169 iwl_leds_init(priv);
2170
2171 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2172 set_bit(STATUS_READY, &priv->status);
2173 wake_up_interruptible(&priv->wait_command_queue);
2174
2175 iwl_power_update_mode(priv, true);
2176 IWL_DEBUG_INFO(priv, "Updated power mode\n");
2177
2178
2179 return;
2180
2181 restart:
2182 queue_work(priv->workqueue, &priv->restart);
2183}
2184
2185static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2186
2187static void __iwl_down(struct iwl_priv *priv)
2188{
2189 unsigned long flags;
2190 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2191
2192 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2193
2194 if (!exit_pending)
2195 set_bit(STATUS_EXIT_PENDING, &priv->status);
2196
2197 iwl_clear_ucode_stations(priv, true);
2198
2199 /* Unblock any waiting calls */
2200 wake_up_interruptible_all(&priv->wait_command_queue);
2201
2202 /* Wipe out the EXIT_PENDING status bit if we are not actually
2203 * exiting the module */
2204 if (!exit_pending)
2205 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2206
2207 /* stop and reset the on-board processor */
2208 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2209
2210 /* tell the device to stop sending interrupts */
2211 spin_lock_irqsave(&priv->lock, flags);
2212 iwl_disable_interrupts(priv);
2213 spin_unlock_irqrestore(&priv->lock, flags);
2214 iwl_synchronize_irq(priv);
2215
2216 if (priv->mac80211_registered)
2217 ieee80211_stop_queues(priv->hw);
2218
2219 /* If we have not previously called iwl_init() then
2220 * clear all bits but the RF Kill bit and return */
2221 if (!iwl_is_init(priv)) {
2222 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2223 STATUS_RF_KILL_HW |
2224 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2225 STATUS_GEO_CONFIGURED |
2226 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2227 STATUS_EXIT_PENDING;
2228 goto exit;
2229 }
2230
2231 /* ...otherwise clear out all the status bits but the RF Kill
2232 * bit and continue taking the NIC down. */
2233 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2234 STATUS_RF_KILL_HW |
2235 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2236 STATUS_GEO_CONFIGURED |
2237 test_bit(STATUS_FW_ERROR, &priv->status) <<
2238 STATUS_FW_ERROR |
2239 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2240 STATUS_EXIT_PENDING;
2241
2242 /* device going down, Stop using ICT table */
2243 iwl_disable_ict(priv);
2244
2245 iwlagn_txq_ctx_stop(priv);
2246 iwlagn_rxq_stop(priv);
2247
2248 /* Power-down device's busmaster DMA clocks */
2249 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2250 udelay(5);
2251
2252 /* Make sure (redundant) we've released our request to stay awake */
2253 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2254
2255 /* Stop the device, and put it in low power state */
2256 priv->cfg->ops->lib->apm_ops.stop(priv);
2257
2258 exit:
2259 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2260
2261 if (priv->ibss_beacon)
2262 dev_kfree_skb(priv->ibss_beacon);
2263 priv->ibss_beacon = NULL;
2264
2265 /* clear out any free frames */
2266 iwl_clear_free_frames(priv);
2267}
2268
2269static void iwl_down(struct iwl_priv *priv)
2270{
2271 mutex_lock(&priv->mutex);
2272 __iwl_down(priv);
2273 mutex_unlock(&priv->mutex);
2274
2275 iwl_cancel_deferred_work(priv);
2276}
2277
2278#define HW_READY_TIMEOUT (50)
2279
2280static int iwl_set_hw_ready(struct iwl_priv *priv)
2281{
2282 int ret = 0;
2283
2284 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2285 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2286
2287 /* See if we got it */
2288 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2289 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2290 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2291 HW_READY_TIMEOUT);
2292 if (ret != -ETIMEDOUT)
2293 priv->hw_ready = true;
2294 else
2295 priv->hw_ready = false;
2296
2297 IWL_DEBUG_INFO(priv, "hardware %s\n",
2298 (priv->hw_ready == 1) ? "ready" : "not ready");
2299 return ret;
2300}
2301
2302static int iwl_prepare_card_hw(struct iwl_priv *priv)
2303{
2304 int ret = 0;
2305
2306 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2307
2308 ret = iwl_set_hw_ready(priv);
2309 if (priv->hw_ready)
2310 return ret;
2311
2312 /* If HW is not ready, prepare the conditions to check again */
2313 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2314 CSR_HW_IF_CONFIG_REG_PREPARE);
2315
2316 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2317 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2318 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2319
2320 /* HW should be ready by now, check again. */
2321 if (ret != -ETIMEDOUT)
2322 iwl_set_hw_ready(priv);
2323
2324 return ret;
2325}
2326
2327#define MAX_HW_RESTARTS 5
2328
2329static int __iwl_up(struct iwl_priv *priv)
2330{
2331 int i;
2332 int ret;
2333
2334 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2335 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2336 return -EIO;
2337 }
2338
2339 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2340 IWL_ERR(priv, "ucode not available for device bringup\n");
2341 return -EIO;
2342 }
2343
2344 iwl_prepare_card_hw(priv);
2345
2346 if (!priv->hw_ready) {
2347 IWL_WARN(priv, "Exit HW not ready\n");
2348 return -EIO;
2349 }
2350
2351 /* If platform's RF_KILL switch is NOT set to KILL */
2352 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2353 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2354 else
2355 set_bit(STATUS_RF_KILL_HW, &priv->status);
2356
2357 if (iwl_is_rfkill(priv)) {
2358 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2359
2360 iwl_enable_interrupts(priv);
2361 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2362 return 0;
2363 }
2364
2365 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2366
2367 ret = iwlagn_hw_nic_init(priv);
2368 if (ret) {
2369 IWL_ERR(priv, "Unable to init nic\n");
2370 return ret;
2371 }
2372
2373 /* make sure rfkill handshake bits are cleared */
2374 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2375 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2376 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2377
2378 /* clear (again), then enable host interrupts */
2379 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2380 iwl_enable_interrupts(priv);
2381
2382 /* really make sure rfkill handshake bits are cleared */
2383 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2384 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2385
2386 /* Copy original ucode data image from disk into backup cache.
2387 * This will be used to initialize the on-board processor's
2388 * data SRAM for a clean start when the runtime program first loads. */
2389 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2390 priv->ucode_data.len);
2391
2392 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2393
2394 /* load bootstrap state machine,
2395 * load bootstrap program into processor's memory,
2396 * prepare to load the "initialize" uCode */
2397 ret = priv->cfg->ops->lib->load_ucode(priv);
2398
2399 if (ret) {
2400 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2401 ret);
2402 continue;
2403 }
2404
2405 /* start card; "initialize" will load runtime ucode */
2406 iwl_nic_start(priv);
2407
2408 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2409
2410 return 0;
2411 }
2412
2413 set_bit(STATUS_EXIT_PENDING, &priv->status);
2414 __iwl_down(priv);
2415 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2416
2417 /* tried to restart and config the device for as long as our
2418 * patience could withstand */
2419 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2420 return -EIO;
2421}
2422
2423
2424/*****************************************************************************
2425 *
2426 * Workqueue callbacks
2427 *
2428 *****************************************************************************/
2429
2430static void iwl_bg_init_alive_start(struct work_struct *data)
2431{
2432 struct iwl_priv *priv =
2433 container_of(data, struct iwl_priv, init_alive_start.work);
2434
2435 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2436 return;
2437
2438 mutex_lock(&priv->mutex);
2439 priv->cfg->ops->lib->init_alive_start(priv);
2440 mutex_unlock(&priv->mutex);
2441}
2442
2443static void iwl_bg_alive_start(struct work_struct *data)
2444{
2445 struct iwl_priv *priv =
2446 container_of(data, struct iwl_priv, alive_start.work);
2447
2448 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2449 return;
2450
2451 /* enable dram interrupt */
2452 iwl_reset_ict(priv);
2453
2454 mutex_lock(&priv->mutex);
2455 iwl_alive_start(priv);
2456 mutex_unlock(&priv->mutex);
2457}
2458
2459static void iwl_bg_run_time_calib_work(struct work_struct *work)
2460{
2461 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2462 run_time_calib_work);
2463
2464 mutex_lock(&priv->mutex);
2465
2466 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2467 test_bit(STATUS_SCANNING, &priv->status)) {
2468 mutex_unlock(&priv->mutex);
2469 return;
2470 }
2471
2472 if (priv->start_calib) {
2473 iwl_chain_noise_calibration(priv, &priv->statistics);
2474
2475 iwl_sensitivity_calibration(priv, &priv->statistics);
2476 }
2477
2478 mutex_unlock(&priv->mutex);
2479 return;
2480}
2481
2482static void iwl_bg_restart(struct work_struct *data)
2483{
2484 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2485
2486 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2487 return;
2488
2489 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2490 mutex_lock(&priv->mutex);
2491 priv->vif = NULL;
2492 priv->is_open = 0;
2493 mutex_unlock(&priv->mutex);
2494 iwl_down(priv);
2495 ieee80211_restart_hw(priv->hw);
2496 } else {
2497 iwl_down(priv);
2498
2499 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2500 return;
2501
2502 mutex_lock(&priv->mutex);
2503 __iwl_up(priv);
2504 mutex_unlock(&priv->mutex);
2505 }
2506}
2507
2508static void iwl_bg_rx_replenish(struct work_struct *data)
2509{
2510 struct iwl_priv *priv =
2511 container_of(data, struct iwl_priv, rx_replenish);
2512
2513 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2514 return;
2515
2516 mutex_lock(&priv->mutex);
2517 iwlagn_rx_replenish(priv);
2518 mutex_unlock(&priv->mutex);
2519}
2520
2521#define IWL_DELAY_NEXT_SCAN (HZ*2)
2522
2523void iwl_post_associate(struct iwl_priv *priv)
2524{
2525 struct ieee80211_conf *conf = NULL;
2526 int ret = 0;
2527
2528 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2529 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2530 return;
2531 }
2532
2533 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2534 return;
2535
2536
2537 if (!priv->vif || !priv->is_open)
2538 return;
2539
2540 iwl_scan_cancel_timeout(priv, 200);
2541
2542 conf = ieee80211_get_hw_conf(priv->hw);
2543
2544 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2545 iwlcore_commit_rxon(priv);
2546
2547 iwl_setup_rxon_timing(priv);
2548 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2549 sizeof(priv->rxon_timing), &priv->rxon_timing);
2550 if (ret)
2551 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2552 "Attempting to continue.\n");
2553
2554 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2555
2556 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2557
2558 if (priv->cfg->ops->hcmd->set_rxon_chain)
2559 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2560
2561 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2562
2563 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2564 priv->assoc_id, priv->beacon_int);
2565
2566 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2567 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2568 else
2569 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2570
2571 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2572 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2573 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2574 else
2575 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2576
2577 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2578 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2579
2580 }
2581
2582 iwlcore_commit_rxon(priv);
2583
2584 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2585 priv->assoc_id, priv->active_rxon.bssid_addr);
2586
2587 switch (priv->iw_mode) {
2588 case NL80211_IFTYPE_STATION:
2589 break;
2590
2591 case NL80211_IFTYPE_ADHOC:
2592
2593 /* assume default assoc id */
2594 priv->assoc_id = 1;
2595
2596 iwl_add_local_station(priv, priv->bssid, true);
2597 iwl_send_beacon_cmd(priv);
2598
2599 break;
2600
2601 default:
2602 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2603 __func__, priv->iw_mode);
2604 break;
2605 }
2606
2607 /* the chain noise calibration will enabled PM upon completion
2608 * If chain noise has already been run, then we need to enable
2609 * power management here */
2610 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2611 iwl_power_update_mode(priv, false);
2612
2613 /* Enable Rx differential gain and sensitivity calibrations */
2614 iwl_chain_noise_reset(priv);
2615 priv->start_calib = 1;
2616
2617}
2618
2619/*****************************************************************************
2620 *
2621 * mac80211 entry point functions
2622 *
2623 *****************************************************************************/
2624
2625#define UCODE_READY_TIMEOUT (4 * HZ)
2626
2627/*
2628 * Not a mac80211 entry point function, but it fits in with all the
2629 * other mac80211 functions grouped here.
2630 */
2631static int iwl_mac_setup_register(struct iwl_priv *priv)
2632{
2633 int ret;
2634 struct ieee80211_hw *hw = priv->hw;
2635 hw->rate_control_algorithm = "iwl-agn-rs";
2636
2637 /* Tell mac80211 our characteristics */
2638 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2639 IEEE80211_HW_NOISE_DBM |
2640 IEEE80211_HW_AMPDU_AGGREGATION |
2641 IEEE80211_HW_SPECTRUM_MGMT;
2642
2643 if (!priv->cfg->broken_powersave)
2644 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2645 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2646
2647 if (priv->cfg->sku & IWL_SKU_N)
2648 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2649 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2650
2651 hw->sta_data_size = sizeof(struct iwl_station_priv);
2652 hw->wiphy->interface_modes =
2653 BIT(NL80211_IFTYPE_STATION) |
2654 BIT(NL80211_IFTYPE_ADHOC);
2655
2656 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2657 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2658
2659 /*
2660 * For now, disable PS by default because it affects
2661 * RX performance significantly.
2662 */
2663 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2664
2665 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX + 1;
2666 /* we create the 802.11 header and a zero-length SSID element */
2667 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2668
2669 /* Default value; 4 EDCA QOS priorities */
2670 hw->queues = 4;
2671
2672 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2673
2674 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2675 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2676 &priv->bands[IEEE80211_BAND_2GHZ];
2677 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2678 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2679 &priv->bands[IEEE80211_BAND_5GHZ];
2680
2681 ret = ieee80211_register_hw(priv->hw);
2682 if (ret) {
2683 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2684 return ret;
2685 }
2686 priv->mac80211_registered = 1;
2687
2688 return 0;
2689}
2690
2691
2692static int iwl_mac_start(struct ieee80211_hw *hw)
2693{
2694 struct iwl_priv *priv = hw->priv;
2695 int ret;
2696
2697 IWL_DEBUG_MAC80211(priv, "enter\n");
2698
2699 /* we should be verifying the device is ready to be opened */
2700 mutex_lock(&priv->mutex);
2701 ret = __iwl_up(priv);
2702 mutex_unlock(&priv->mutex);
2703
2704 if (ret)
2705 return ret;
2706
2707 if (iwl_is_rfkill(priv))
2708 goto out;
2709
2710 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2711
2712 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2713 * mac80211 will not be run successfully. */
2714 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2715 test_bit(STATUS_READY, &priv->status),
2716 UCODE_READY_TIMEOUT);
2717 if (!ret) {
2718 if (!test_bit(STATUS_READY, &priv->status)) {
2719 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2720 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2721 return -ETIMEDOUT;
2722 }
2723 }
2724
2725 iwl_led_start(priv);
2726
2727out:
2728 priv->is_open = 1;
2729 IWL_DEBUG_MAC80211(priv, "leave\n");
2730 return 0;
2731}
2732
2733static void iwl_mac_stop(struct ieee80211_hw *hw)
2734{
2735 struct iwl_priv *priv = hw->priv;
2736
2737 IWL_DEBUG_MAC80211(priv, "enter\n");
2738
2739 if (!priv->is_open)
2740 return;
2741
2742 priv->is_open = 0;
2743
2744 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2745 /* stop mac, cancel any scan request and clear
2746 * RXON_FILTER_ASSOC_MSK BIT
2747 */
2748 mutex_lock(&priv->mutex);
2749 iwl_scan_cancel_timeout(priv, 100);
2750 mutex_unlock(&priv->mutex);
2751 }
2752
2753 iwl_down(priv);
2754
2755 flush_workqueue(priv->workqueue);
2756
2757 /* enable interrupts again in order to receive rfkill changes */
2758 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2759 iwl_enable_interrupts(priv);
2760
2761 IWL_DEBUG_MAC80211(priv, "leave\n");
2762}
2763
2764static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2765{
2766 struct iwl_priv *priv = hw->priv;
2767
2768 IWL_DEBUG_MACDUMP(priv, "enter\n");
2769
2770 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2771 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2772
2773 if (iwlagn_tx_skb(priv, skb))
2774 dev_kfree_skb_any(skb);
2775
2776 IWL_DEBUG_MACDUMP(priv, "leave\n");
2777 return NETDEV_TX_OK;
2778}
2779
2780void iwl_config_ap(struct iwl_priv *priv)
2781{
2782 int ret = 0;
2783
2784 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2785 return;
2786
2787 /* The following should be done only at AP bring up */
2788 if (!iwl_is_associated(priv)) {
2789
2790 /* RXON - unassoc (to set timing command) */
2791 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2792 iwlcore_commit_rxon(priv);
2793
2794 /* RXON Timing */
2795 iwl_setup_rxon_timing(priv);
2796 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2797 sizeof(priv->rxon_timing), &priv->rxon_timing);
2798 if (ret)
2799 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2800 "Attempting to continue.\n");
2801
2802 /* AP has all antennas */
2803 priv->chain_noise_data.active_chains =
2804 priv->hw_params.valid_rx_ant;
2805 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2806 if (priv->cfg->ops->hcmd->set_rxon_chain)
2807 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2808
2809 /* FIXME: what should be the assoc_id for AP? */
2810 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2811 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2812 priv->staging_rxon.flags |=
2813 RXON_FLG_SHORT_PREAMBLE_MSK;
2814 else
2815 priv->staging_rxon.flags &=
2816 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2817
2818 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2819 if (priv->assoc_capability &
2820 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2821 priv->staging_rxon.flags |=
2822 RXON_FLG_SHORT_SLOT_MSK;
2823 else
2824 priv->staging_rxon.flags &=
2825 ~RXON_FLG_SHORT_SLOT_MSK;
2826
2827 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2828 priv->staging_rxon.flags &=
2829 ~RXON_FLG_SHORT_SLOT_MSK;
2830 }
2831 /* restore RXON assoc */
2832 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2833 iwlcore_commit_rxon(priv);
2834 iwl_add_bcast_station(priv);
2835 }
2836 iwl_send_beacon_cmd(priv);
2837
2838 /* FIXME - we need to add code here to detect a totally new
2839 * configuration, reset the AP, unassoc, rxon timing, assoc,
2840 * clear sta table, add BCAST sta... */
2841}
2842
2843static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2844 struct ieee80211_vif *vif,
2845 struct ieee80211_key_conf *keyconf,
2846 struct ieee80211_sta *sta,
2847 u32 iv32, u16 *phase1key)
2848{
2849
2850 struct iwl_priv *priv = hw->priv;
2851 IWL_DEBUG_MAC80211(priv, "enter\n");
2852
2853 iwl_update_tkip_key(priv, keyconf,
2854 sta ? sta->addr : iwl_bcast_addr,
2855 iv32, phase1key);
2856
2857 IWL_DEBUG_MAC80211(priv, "leave\n");
2858}
2859
2860static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2861 struct ieee80211_vif *vif,
2862 struct ieee80211_sta *sta,
2863 struct ieee80211_key_conf *key)
2864{
2865 struct iwl_priv *priv = hw->priv;
2866 const u8 *addr;
2867 int ret;
2868 u8 sta_id;
2869 bool is_default_wep_key = false;
2870
2871 IWL_DEBUG_MAC80211(priv, "enter\n");
2872
2873 if (priv->cfg->mod_params->sw_crypto) {
2874 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2875 return -EOPNOTSUPP;
2876 }
2877 addr = sta ? sta->addr : iwl_bcast_addr;
2878 sta_id = iwl_find_station(priv, addr);
2879 if (sta_id == IWL_INVALID_STATION) {
2880 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2881 addr);
2882 return -EINVAL;
2883
2884 }
2885
2886 mutex_lock(&priv->mutex);
2887 iwl_scan_cancel_timeout(priv, 100);
2888
2889 /* If we are getting WEP group key and we didn't receive any key mapping
2890 * so far, we are in legacy wep mode (group key only), otherwise we are
2891 * in 1X mode.
2892 * In legacy wep mode, we use another host command to the uCode */
2893 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2894 priv->iw_mode != NL80211_IFTYPE_AP) {
2895 if (cmd == SET_KEY)
2896 is_default_wep_key = !priv->key_mapping_key;
2897 else
2898 is_default_wep_key =
2899 (key->hw_key_idx == HW_KEY_DEFAULT);
2900 }
2901
2902 switch (cmd) {
2903 case SET_KEY:
2904 if (is_default_wep_key)
2905 ret = iwl_set_default_wep_key(priv, key);
2906 else
2907 ret = iwl_set_dynamic_key(priv, key, sta_id);
2908
2909 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2910 break;
2911 case DISABLE_KEY:
2912 if (is_default_wep_key)
2913 ret = iwl_remove_default_wep_key(priv, key);
2914 else
2915 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2916
2917 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2918 break;
2919 default:
2920 ret = -EINVAL;
2921 }
2922
2923 mutex_unlock(&priv->mutex);
2924 IWL_DEBUG_MAC80211(priv, "leave\n");
2925
2926 return ret;
2927}
2928
2929static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2930 struct ieee80211_vif *vif,
2931 enum ieee80211_ampdu_mlme_action action,
2932 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2933{
2934 struct iwl_priv *priv = hw->priv;
2935 int ret;
2936
2937 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2938 sta->addr, tid);
2939
2940 if (!(priv->cfg->sku & IWL_SKU_N))
2941 return -EACCES;
2942
2943 switch (action) {
2944 case IEEE80211_AMPDU_RX_START:
2945 IWL_DEBUG_HT(priv, "start Rx\n");
2946 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2947 case IEEE80211_AMPDU_RX_STOP:
2948 IWL_DEBUG_HT(priv, "stop Rx\n");
2949 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2950 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2951 return 0;
2952 else
2953 return ret;
2954 case IEEE80211_AMPDU_TX_START:
2955 IWL_DEBUG_HT(priv, "start Tx\n");
2956 ret = iwlagn_tx_agg_start(priv, sta->addr, tid, ssn);
2957 if (ret == 0) {
2958 priv->_agn.agg_tids_count++;
2959 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2960 priv->_agn.agg_tids_count);
2961 }
2962 return ret;
2963 case IEEE80211_AMPDU_TX_STOP:
2964 IWL_DEBUG_HT(priv, "stop Tx\n");
2965 ret = iwlagn_tx_agg_stop(priv, sta->addr, tid);
2966 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2967 priv->_agn.agg_tids_count--;
2968 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2969 priv->_agn.agg_tids_count);
2970 }
2971 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2972 return 0;
2973 else
2974 return ret;
2975 case IEEE80211_AMPDU_TX_OPERATIONAL:
2976 /* do nothing */
2977 return -EOPNOTSUPP;
2978 default:
2979 IWL_DEBUG_HT(priv, "unknown\n");
2980 return -EINVAL;
2981 break;
2982 }
2983 return 0;
2984}
2985
2986static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2987 struct ieee80211_low_level_stats *stats)
2988{
2989 struct iwl_priv *priv = hw->priv;
2990
2991 priv = hw->priv;
2992 IWL_DEBUG_MAC80211(priv, "enter\n");
2993 IWL_DEBUG_MAC80211(priv, "leave\n");
2994
2995 return 0;
2996}
2997
2998static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2999 struct ieee80211_vif *vif,
3000 enum sta_notify_cmd cmd,
3001 struct ieee80211_sta *sta)
3002{
3003 struct iwl_priv *priv = hw->priv;
3004 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3005 int sta_id;
3006
3007 switch (cmd) {
3008 case STA_NOTIFY_SLEEP:
3009 WARN_ON(!sta_priv->client);
3010 sta_priv->asleep = true;
3011 if (atomic_read(&sta_priv->pending_frames) > 0)
3012 ieee80211_sta_block_awake(hw, sta, true);
3013 break;
3014 case STA_NOTIFY_AWAKE:
3015 WARN_ON(!sta_priv->client);
3016 if (!sta_priv->asleep)
3017 break;
3018 sta_priv->asleep = false;
3019 sta_id = iwl_find_station(priv, sta->addr);
3020 if (sta_id != IWL_INVALID_STATION)
3021 iwl_sta_modify_ps_wake(priv, sta_id);
3022 break;
3023 default:
3024 break;
3025 }
3026}
3027
3028/**
3029 * iwl_restore_wepkeys - Restore WEP keys to device
3030 */
3031static void iwl_restore_wepkeys(struct iwl_priv *priv)
3032{
3033 mutex_lock(&priv->mutex);
3034 if (priv->iw_mode == NL80211_IFTYPE_STATION &&
3035 priv->default_wep_key &&
3036 iwl_send_static_wepkey_cmd(priv, 0))
3037 IWL_ERR(priv, "Could not send WEP static key\n");
3038 mutex_unlock(&priv->mutex);
3039}
3040
3041static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3042 struct ieee80211_vif *vif,
3043 struct ieee80211_sta *sta)
3044{
3045 struct iwl_priv *priv = hw->priv;
3046 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3047 bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3048 int ret;
3049 u8 sta_id;
3050
3051 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3052 sta->addr);
3053
3054 atomic_set(&sta_priv->pending_frames, 0);
3055 if (vif->type == NL80211_IFTYPE_AP)
3056 sta_priv->client = true;
3057
3058 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3059 &sta_id);
3060 if (ret) {
3061 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3062 sta->addr, ret);
3063 /* Should we return success if return code is EEXIST ? */
3064 return ret;
3065 }
3066
3067 iwl_restore_wepkeys(priv);
3068
3069 /* Initialize rate scaling */
3070 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM \n",
3071 sta->addr);
3072 iwl_rs_rate_init(priv, sta, sta_id);
3073
3074 return ret;
3075}
3076
3077/*****************************************************************************
3078 *
3079 * sysfs attributes
3080 *
3081 *****************************************************************************/
3082
3083#ifdef CONFIG_IWLWIFI_DEBUG
3084
3085/*
3086 * The following adds a new attribute to the sysfs representation
3087 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3088 * used for controlling the debug level.
3089 *
3090 * See the level definitions in iwl for details.
3091 *
3092 * The debug_level being managed using sysfs below is a per device debug
3093 * level that is used instead of the global debug level if it (the per
3094 * device debug level) is set.
3095 */
3096static ssize_t show_debug_level(struct device *d,
3097 struct device_attribute *attr, char *buf)
3098{
3099 struct iwl_priv *priv = dev_get_drvdata(d);
3100 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3101}
3102static ssize_t store_debug_level(struct device *d,
3103 struct device_attribute *attr,
3104 const char *buf, size_t count)
3105{
3106 struct iwl_priv *priv = dev_get_drvdata(d);
3107 unsigned long val;
3108 int ret;
3109
3110 ret = strict_strtoul(buf, 0, &val);
3111 if (ret)
3112 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3113 else {
3114 priv->debug_level = val;
3115 if (iwl_alloc_traffic_mem(priv))
3116 IWL_ERR(priv,
3117 "Not enough memory to generate traffic log\n");
3118 }
3119 return strnlen(buf, count);
3120}
3121
3122static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3123 show_debug_level, store_debug_level);
3124
3125
3126#endif /* CONFIG_IWLWIFI_DEBUG */
3127
3128
3129static ssize_t show_temperature(struct device *d,
3130 struct device_attribute *attr, char *buf)
3131{
3132 struct iwl_priv *priv = dev_get_drvdata(d);
3133
3134 if (!iwl_is_alive(priv))
3135 return -EAGAIN;
3136
3137 return sprintf(buf, "%d\n", priv->temperature);
3138}
3139
3140static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3141
3142static ssize_t show_tx_power(struct device *d,
3143 struct device_attribute *attr, char *buf)
3144{
3145 struct iwl_priv *priv = dev_get_drvdata(d);
3146
3147 if (!iwl_is_ready_rf(priv))
3148 return sprintf(buf, "off\n");
3149 else
3150 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3151}
3152
3153static ssize_t store_tx_power(struct device *d,
3154 struct device_attribute *attr,
3155 const char *buf, size_t count)
3156{
3157 struct iwl_priv *priv = dev_get_drvdata(d);
3158 unsigned long val;
3159 int ret;
3160
3161 ret = strict_strtoul(buf, 10, &val);
3162 if (ret)
3163 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3164 else {
3165 ret = iwl_set_tx_power(priv, val, false);
3166 if (ret)
3167 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3168 ret);
3169 else
3170 ret = count;
3171 }
3172 return ret;
3173}
3174
3175static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3176
3177static ssize_t show_statistics(struct device *d,
3178 struct device_attribute *attr, char *buf)
3179{
3180 struct iwl_priv *priv = dev_get_drvdata(d);
3181 u32 size = sizeof(struct iwl_notif_statistics);
3182 u32 len = 0, ofs = 0;
3183 u8 *data = (u8 *)&priv->statistics;
3184 int rc = 0;
3185
3186 if (!iwl_is_alive(priv))
3187 return -EAGAIN;
3188
3189 mutex_lock(&priv->mutex);
3190 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3191 mutex_unlock(&priv->mutex);
3192
3193 if (rc) {
3194 len = sprintf(buf,
3195 "Error sending statistics request: 0x%08X\n", rc);
3196 return len;
3197 }
3198
3199 while (size && (PAGE_SIZE - len)) {
3200 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3201 PAGE_SIZE - len, 1);
3202 len = strlen(buf);
3203 if (PAGE_SIZE - len)
3204 buf[len++] = '\n';
3205
3206 ofs += 16;
3207 size -= min(size, 16U);
3208 }
3209
3210 return len;
3211}
3212
3213static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3214
3215static ssize_t show_rts_ht_protection(struct device *d,
3216 struct device_attribute *attr, char *buf)
3217{
3218 struct iwl_priv *priv = dev_get_drvdata(d);
3219
3220 return sprintf(buf, "%s\n",
3221 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3222}
3223
3224static ssize_t store_rts_ht_protection(struct device *d,
3225 struct device_attribute *attr,
3226 const char *buf, size_t count)
3227{
3228 struct iwl_priv *priv = dev_get_drvdata(d);
3229 unsigned long val;
3230 int ret;
3231
3232 ret = strict_strtoul(buf, 10, &val);
3233 if (ret)
3234 IWL_INFO(priv, "Input is not in decimal form.\n");
3235 else {
3236 if (!iwl_is_associated(priv))
3237 priv->cfg->use_rts_for_ht = val ? true : false;
3238 else
3239 IWL_ERR(priv, "Sta associated with AP - "
3240 "Change protection mechanism is not allowed\n");
3241 ret = count;
3242 }
3243 return ret;
3244}
3245
3246static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3247 show_rts_ht_protection, store_rts_ht_protection);
3248
3249
3250/*****************************************************************************
3251 *
3252 * driver setup and teardown
3253 *
3254 *****************************************************************************/
3255
3256static void iwl_setup_deferred_work(struct iwl_priv *priv)
3257{
3258 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3259
3260 init_waitqueue_head(&priv->wait_command_queue);
3261
3262 INIT_WORK(&priv->restart, iwl_bg_restart);
3263 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3264 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3265 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3266 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3267 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3268
3269 iwl_setup_scan_deferred_work(priv);
3270
3271 if (priv->cfg->ops->lib->setup_deferred_work)
3272 priv->cfg->ops->lib->setup_deferred_work(priv);
3273
3274 init_timer(&priv->statistics_periodic);
3275 priv->statistics_periodic.data = (unsigned long)priv;
3276 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3277
3278 init_timer(&priv->ucode_trace);
3279 priv->ucode_trace.data = (unsigned long)priv;
3280 priv->ucode_trace.function = iwl_bg_ucode_trace;
3281
3282 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3283 init_timer(&priv->monitor_recover);
3284 priv->monitor_recover.data = (unsigned long)priv;
3285 priv->monitor_recover.function =
3286 priv->cfg->ops->lib->recover_from_tx_stall;
3287 }
3288
3289 if (!priv->cfg->use_isr_legacy)
3290 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3291 iwl_irq_tasklet, (unsigned long)priv);
3292 else
3293 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3294 iwl_irq_tasklet_legacy, (unsigned long)priv);
3295}
3296
3297static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3298{
3299 if (priv->cfg->ops->lib->cancel_deferred_work)
3300 priv->cfg->ops->lib->cancel_deferred_work(priv);
3301
3302 cancel_delayed_work_sync(&priv->init_alive_start);
3303 cancel_delayed_work(&priv->scan_check);
3304 cancel_delayed_work(&priv->alive_start);
3305 cancel_work_sync(&priv->beacon_update);
3306 del_timer_sync(&priv->statistics_periodic);
3307 del_timer_sync(&priv->ucode_trace);
3308 if (priv->cfg->ops->lib->recover_from_tx_stall)
3309 del_timer_sync(&priv->monitor_recover);
3310}
3311
3312static void iwl_init_hw_rates(struct iwl_priv *priv,
3313 struct ieee80211_rate *rates)
3314{
3315 int i;
3316
3317 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3318 rates[i].bitrate = iwl_rates[i].ieee * 5;
3319 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3320 rates[i].hw_value_short = i;
3321 rates[i].flags = 0;
3322 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3323 /*
3324 * If CCK != 1M then set short preamble rate flag.
3325 */
3326 rates[i].flags |=
3327 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3328 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3329 }
3330 }
3331}
3332
3333static int iwl_init_drv(struct iwl_priv *priv)
3334{
3335 int ret;
3336
3337 priv->ibss_beacon = NULL;
3338
3339 spin_lock_init(&priv->sta_lock);
3340 spin_lock_init(&priv->hcmd_lock);
3341
3342 INIT_LIST_HEAD(&priv->free_frames);
3343
3344 mutex_init(&priv->mutex);
3345 mutex_init(&priv->sync_cmd_mutex);
3346
3347 priv->ieee_channels = NULL;
3348 priv->ieee_rates = NULL;
3349 priv->band = IEEE80211_BAND_2GHZ;
3350
3351 priv->iw_mode = NL80211_IFTYPE_STATION;
3352 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3353 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3354 priv->_agn.agg_tids_count = 0;
3355
3356 /* initialize force reset */
3357 priv->force_reset[IWL_RF_RESET].reset_duration =
3358 IWL_DELAY_NEXT_FORCE_RF_RESET;
3359 priv->force_reset[IWL_FW_RESET].reset_duration =
3360 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3361
3362 /* Choose which receivers/antennas to use */
3363 if (priv->cfg->ops->hcmd->set_rxon_chain)
3364 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3365
3366 iwl_init_scan_params(priv);
3367
3368 /* Set the tx_power_user_lmt to the lowest power level
3369 * this value will get overwritten by channel max power avg
3370 * from eeprom */
3371 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3372
3373 ret = iwl_init_channel_map(priv);
3374 if (ret) {
3375 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3376 goto err;
3377 }
3378
3379 ret = iwlcore_init_geos(priv);
3380 if (ret) {
3381 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3382 goto err_free_channel_map;
3383 }
3384 iwl_init_hw_rates(priv, priv->ieee_rates);
3385
3386 return 0;
3387
3388err_free_channel_map:
3389 iwl_free_channel_map(priv);
3390err:
3391 return ret;
3392}
3393
3394static void iwl_uninit_drv(struct iwl_priv *priv)
3395{
3396 iwl_calib_free_results(priv);
3397 iwlcore_free_geos(priv);
3398 iwl_free_channel_map(priv);
3399 kfree(priv->scan);
3400}
3401
3402static struct attribute *iwl_sysfs_entries[] = {
3403 &dev_attr_statistics.attr,
3404 &dev_attr_temperature.attr,
3405 &dev_attr_tx_power.attr,
3406 &dev_attr_rts_ht_protection.attr,
3407#ifdef CONFIG_IWLWIFI_DEBUG
3408 &dev_attr_debug_level.attr,
3409#endif
3410 NULL
3411};
3412
3413static struct attribute_group iwl_attribute_group = {
3414 .name = NULL, /* put in device directory */
3415 .attrs = iwl_sysfs_entries,
3416};
3417
3418static struct ieee80211_ops iwl_hw_ops = {
3419 .tx = iwl_mac_tx,
3420 .start = iwl_mac_start,
3421 .stop = iwl_mac_stop,
3422 .add_interface = iwl_mac_add_interface,
3423 .remove_interface = iwl_mac_remove_interface,
3424 .config = iwl_mac_config,
3425 .configure_filter = iwl_configure_filter,
3426 .set_key = iwl_mac_set_key,
3427 .update_tkip_key = iwl_mac_update_tkip_key,
3428 .get_stats = iwl_mac_get_stats,
3429 .conf_tx = iwl_mac_conf_tx,
3430 .reset_tsf = iwl_mac_reset_tsf,
3431 .bss_info_changed = iwl_bss_info_changed,
3432 .ampdu_action = iwl_mac_ampdu_action,
3433 .hw_scan = iwl_mac_hw_scan,
3434 .sta_notify = iwl_mac_sta_notify,
3435 .sta_add = iwlagn_mac_sta_add,
3436 .sta_remove = iwl_mac_sta_remove,
3437};
3438
3439static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3440{
3441 int err = 0;
3442 struct iwl_priv *priv;
3443 struct ieee80211_hw *hw;
3444 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3445 unsigned long flags;
3446 u16 pci_cmd;
3447
3448 /************************
3449 * 1. Allocating HW data
3450 ************************/
3451
3452 /* Disabling hardware scan means that mac80211 will perform scans
3453 * "the hard way", rather than using device's scan. */
3454 if (cfg->mod_params->disable_hw_scan) {
3455 if (iwl_debug_level & IWL_DL_INFO)
3456 dev_printk(KERN_DEBUG, &(pdev->dev),
3457 "Disabling hw_scan\n");
3458 iwl_hw_ops.hw_scan = NULL;
3459 }
3460
3461 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3462 if (!hw) {
3463 err = -ENOMEM;
3464 goto out;
3465 }
3466 priv = hw->priv;
3467 /* At this point both hw and priv are allocated. */
3468
3469 SET_IEEE80211_DEV(hw, &pdev->dev);
3470
3471 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3472 priv->cfg = cfg;
3473 priv->pci_dev = pdev;
3474 priv->inta_mask = CSR_INI_SET_MASK;
3475
3476#ifdef CONFIG_IWLWIFI_DEBUG
3477 atomic_set(&priv->restrict_refcnt, 0);
3478#endif
3479 if (iwl_alloc_traffic_mem(priv))
3480 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3481
3482 /**************************
3483 * 2. Initializing PCI bus
3484 **************************/
3485 if (pci_enable_device(pdev)) {
3486 err = -ENODEV;
3487 goto out_ieee80211_free_hw;
3488 }
3489
3490 pci_set_master(pdev);
3491
3492 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3493 if (!err)
3494 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3495 if (err) {
3496 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3497 if (!err)
3498 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3499 /* both attempts failed: */
3500 if (err) {
3501 IWL_WARN(priv, "No suitable DMA available.\n");
3502 goto out_pci_disable_device;
3503 }
3504 }
3505
3506 err = pci_request_regions(pdev, DRV_NAME);
3507 if (err)
3508 goto out_pci_disable_device;
3509
3510 pci_set_drvdata(pdev, priv);
3511
3512
3513 /***********************
3514 * 3. Read REV register
3515 ***********************/
3516 priv->hw_base = pci_iomap(pdev, 0, 0);
3517 if (!priv->hw_base) {
3518 err = -ENODEV;
3519 goto out_pci_release_regions;
3520 }
3521
3522 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3523 (unsigned long long) pci_resource_len(pdev, 0));
3524 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3525
3526 /* these spin locks will be used in apm_ops.init and EEPROM access
3527 * we should init now
3528 */
3529 spin_lock_init(&priv->reg_lock);
3530 spin_lock_init(&priv->lock);
3531
3532 /*
3533 * stop and reset the on-board processor just in case it is in a
3534 * strange state ... like being left stranded by a primary kernel
3535 * and this is now the kdump kernel trying to start up
3536 */
3537 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3538
3539 iwl_hw_detect(priv);
3540 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3541 priv->cfg->name, priv->hw_rev);
3542
3543 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3544 * PCI Tx retries from interfering with C3 CPU state */
3545 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3546
3547 iwl_prepare_card_hw(priv);
3548 if (!priv->hw_ready) {
3549 IWL_WARN(priv, "Failed, HW not ready\n");
3550 goto out_iounmap;
3551 }
3552
3553 /*****************
3554 * 4. Read EEPROM
3555 *****************/
3556 /* Read the EEPROM */
3557 err = iwl_eeprom_init(priv);
3558 if (err) {
3559 IWL_ERR(priv, "Unable to init EEPROM\n");
3560 goto out_iounmap;
3561 }
3562 err = iwl_eeprom_check_version(priv);
3563 if (err)
3564 goto out_free_eeprom;
3565
3566 /* extract MAC Address */
3567 iwl_eeprom_get_mac(priv, priv->mac_addr);
3568 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3569 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3570
3571 /************************
3572 * 5. Setup HW constants
3573 ************************/
3574 if (iwl_set_hw_params(priv)) {
3575 IWL_ERR(priv, "failed to set hw parameters\n");
3576 goto out_free_eeprom;
3577 }
3578
3579 /*******************
3580 * 6. Setup priv
3581 *******************/
3582
3583 err = iwl_init_drv(priv);
3584 if (err)
3585 goto out_free_eeprom;
3586 /* At this point both hw and priv are initialized. */
3587
3588 /********************
3589 * 7. Setup services
3590 ********************/
3591 spin_lock_irqsave(&priv->lock, flags);
3592 iwl_disable_interrupts(priv);
3593 spin_unlock_irqrestore(&priv->lock, flags);
3594
3595 pci_enable_msi(priv->pci_dev);
3596
3597 iwl_alloc_isr_ict(priv);
3598 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3599 IRQF_SHARED, DRV_NAME, priv);
3600 if (err) {
3601 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3602 goto out_disable_msi;
3603 }
3604 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3605 if (err) {
3606 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3607 goto out_free_irq;
3608 }
3609
3610 iwl_setup_deferred_work(priv);
3611 iwl_setup_rx_handlers(priv);
3612
3613 /*********************************************
3614 * 8. Enable interrupts and read RFKILL state
3615 *********************************************/
3616
3617 /* enable interrupts if needed: hw bug w/a */
3618 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3619 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3620 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3621 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3622 }
3623
3624 iwl_enable_interrupts(priv);
3625
3626 /* If platform's RF_KILL switch is NOT set to KILL */
3627 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3628 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3629 else
3630 set_bit(STATUS_RF_KILL_HW, &priv->status);
3631
3632 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3633 test_bit(STATUS_RF_KILL_HW, &priv->status));
3634
3635 iwl_power_initialize(priv);
3636 iwl_tt_initialize(priv);
3637
3638 err = iwl_request_firmware(priv, true);
3639 if (err)
3640 goto out_remove_sysfs;
3641
3642 return 0;
3643
3644 out_remove_sysfs:
3645 destroy_workqueue(priv->workqueue);
3646 priv->workqueue = NULL;
3647 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3648 out_free_irq:
3649 free_irq(priv->pci_dev->irq, priv);
3650 iwl_free_isr_ict(priv);
3651 out_disable_msi:
3652 pci_disable_msi(priv->pci_dev);
3653 iwl_uninit_drv(priv);
3654 out_free_eeprom:
3655 iwl_eeprom_free(priv);
3656 out_iounmap:
3657 pci_iounmap(pdev, priv->hw_base);
3658 out_pci_release_regions:
3659 pci_set_drvdata(pdev, NULL);
3660 pci_release_regions(pdev);
3661 out_pci_disable_device:
3662 pci_disable_device(pdev);
3663 out_ieee80211_free_hw:
3664 iwl_free_traffic_mem(priv);
3665 ieee80211_free_hw(priv->hw);
3666 out:
3667 return err;
3668}
3669
3670static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3671{
3672 struct iwl_priv *priv = pci_get_drvdata(pdev);
3673 unsigned long flags;
3674
3675 if (!priv)
3676 return;
3677
3678 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3679
3680 iwl_dbgfs_unregister(priv);
3681 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3682
3683 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3684 * to be called and iwl_down since we are removing the device
3685 * we need to set STATUS_EXIT_PENDING bit.
3686 */
3687 set_bit(STATUS_EXIT_PENDING, &priv->status);
3688 if (priv->mac80211_registered) {
3689 ieee80211_unregister_hw(priv->hw);
3690 priv->mac80211_registered = 0;
3691 } else {
3692 iwl_down(priv);
3693 }
3694
3695 /*
3696 * Make sure device is reset to low power before unloading driver.
3697 * This may be redundant with iwl_down(), but there are paths to
3698 * run iwl_down() without calling apm_ops.stop(), and there are
3699 * paths to avoid running iwl_down() at all before leaving driver.
3700 * This (inexpensive) call *makes sure* device is reset.
3701 */
3702 priv->cfg->ops->lib->apm_ops.stop(priv);
3703
3704 iwl_tt_exit(priv);
3705
3706 /* make sure we flush any pending irq or
3707 * tasklet for the driver
3708 */
3709 spin_lock_irqsave(&priv->lock, flags);
3710 iwl_disable_interrupts(priv);
3711 spin_unlock_irqrestore(&priv->lock, flags);
3712
3713 iwl_synchronize_irq(priv);
3714
3715 iwl_dealloc_ucode_pci(priv);
3716
3717 if (priv->rxq.bd)
3718 iwlagn_rx_queue_free(priv, &priv->rxq);
3719 iwlagn_hw_txq_ctx_free(priv);
3720
3721 iwl_eeprom_free(priv);
3722
3723
3724 /*netif_stop_queue(dev); */
3725 flush_workqueue(priv->workqueue);
3726
3727 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3728 * priv->workqueue... so we can't take down the workqueue
3729 * until now... */
3730 destroy_workqueue(priv->workqueue);
3731 priv->workqueue = NULL;
3732 iwl_free_traffic_mem(priv);
3733
3734 free_irq(priv->pci_dev->irq, priv);
3735 pci_disable_msi(priv->pci_dev);
3736 pci_iounmap(pdev, priv->hw_base);
3737 pci_release_regions(pdev);
3738 pci_disable_device(pdev);
3739 pci_set_drvdata(pdev, NULL);
3740
3741 iwl_uninit_drv(priv);
3742
3743 iwl_free_isr_ict(priv);
3744
3745 if (priv->ibss_beacon)
3746 dev_kfree_skb(priv->ibss_beacon);
3747
3748 ieee80211_free_hw(priv->hw);
3749}
3750
3751
3752/*****************************************************************************
3753 *
3754 * driver and module entry point
3755 *
3756 *****************************************************************************/
3757
3758/* Hardware specific file defines the PCI IDs table for that hardware module */
3759static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3760#ifdef CONFIG_IWL4965
3761 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3762 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3763#endif /* CONFIG_IWL4965 */
3764#ifdef CONFIG_IWL5000
3765/* 5100 Series WiFi */
3766 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3767 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3768 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3769 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3770 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3771 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3772 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3773 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3774 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3775 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3776 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3777 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3778 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3779 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3780 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3781 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3782 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3783 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3784 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3785 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3786 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3787 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3788 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3789 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3790
3791/* 5300 Series WiFi */
3792 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3793 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3794 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3795 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3796 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3797 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3798 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3799 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3800 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3801 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3802 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3803 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3804
3805/* 5350 Series WiFi/WiMax */
3806 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3807 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3808 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3809
3810/* 5150 Series Wifi/WiMax */
3811 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3812 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3813 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3814 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3815 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3816 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3817
3818 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3819 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3820 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3821 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3822
3823/* 6x00 Series */
3824 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3825 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3826 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3827 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3828 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3829 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3830 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3831 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3832 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3833 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3834 {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000i_g2_2agn_cfg)},
3835
3836/* 6x50 WiFi/WiMax Series */
3837 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3838 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3839 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3840 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3841 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3842 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3843
3844/* 1000 Series WiFi */
3845 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3846 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3847 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3848 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3849 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3850 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3851 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3852 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3853 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3854 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3855 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3856 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3857#endif /* CONFIG_IWL5000 */
3858
3859 {0}
3860};
3861MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3862
3863static struct pci_driver iwl_driver = {
3864 .name = DRV_NAME,
3865 .id_table = iwl_hw_card_ids,
3866 .probe = iwl_pci_probe,
3867 .remove = __devexit_p(iwl_pci_remove),
3868#ifdef CONFIG_PM
3869 .suspend = iwl_pci_suspend,
3870 .resume = iwl_pci_resume,
3871#endif
3872};
3873
3874static int __init iwl_init(void)
3875{
3876
3877 int ret;
3878 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3879 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3880
3881 ret = iwlagn_rate_control_register();
3882 if (ret) {
3883 printk(KERN_ERR DRV_NAME
3884 "Unable to register rate control algorithm: %d\n", ret);
3885 return ret;
3886 }
3887
3888 ret = pci_register_driver(&iwl_driver);
3889 if (ret) {
3890 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3891 goto error_register;
3892 }
3893
3894 return ret;
3895
3896error_register:
3897 iwlagn_rate_control_unregister();
3898 return ret;
3899}
3900
3901static void __exit iwl_exit(void)
3902{
3903 pci_unregister_driver(&iwl_driver);
3904 iwlagn_rate_control_unregister();
3905}
3906
3907module_exit(iwl_exit);
3908module_init(iwl_init);
3909
3910#ifdef CONFIG_IWLWIFI_DEBUG
3911module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3912MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3913module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3914MODULE_PARM_DESC(debug, "debug output mask");
3915#endif
3916
3917module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
3918MODULE_PARM_DESC(swcrypto50,
3919 "using crypto in software (default 0 [hardware]) (deprecated)");
3920module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3921MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3922module_param_named(queues_num50,
3923 iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3924MODULE_PARM_DESC(queues_num50,
3925 "number of hw queues in 50xx series (deprecated)");
3926module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3927MODULE_PARM_DESC(queues_num, "number of hw queues.");
3928module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3929MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
3930module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3931MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3932module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
3933 int, S_IRUGO);
3934MODULE_PARM_DESC(amsdu_size_8K50,
3935 "enable 8K amsdu size in 50XX series (deprecated)");
3936module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3937 int, S_IRUGO);
3938MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3939module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3940MODULE_PARM_DESC(fw_restart50,
3941 "restart firmware in case of error (deprecated)");
3942module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3943MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3944module_param_named(
3945 disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
3946MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
Linux kernel - Deliverables
This page took 0.040119 seconds and 5 git commands to generate.