| 1 | /****************************************************************************** |
| 2 | * |
| 3 | * GPL LICENSE SUMMARY |
| 4 | * |
| 5 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of version 2 of the GNU General Public License as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, |
| 19 | * USA |
| 20 | * |
| 21 | * The full GNU General Public License is included in this distribution |
| 22 | * in the file called LICENSE.GPL. |
| 23 | * |
| 24 | * Contact Information: |
| 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
| 26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 27 | *****************************************************************************/ |
| 28 | |
| 29 | #include <linux/kernel.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <net/mac80211.h> |
| 32 | |
| 33 | #include "iwl-eeprom.h" |
| 34 | #include "iwl-dev.h" /* FIXME: remove */ |
| 35 | #include "iwl-debug.h" |
| 36 | #include "iwl-core.h" |
| 37 | #include "iwl-io.h" |
| 38 | #include "iwl-rfkill.h" |
| 39 | #include "iwl-power.h" |
| 40 | #include "iwl-sta.h" |
| 41 | |
| 42 | |
| 43 | MODULE_DESCRIPTION("iwl core"); |
| 44 | MODULE_VERSION(IWLWIFI_VERSION); |
| 45 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
| 46 | MODULE_LICENSE("GPL"); |
| 47 | |
| 48 | #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \ |
| 49 | [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ |
| 50 | IWL_RATE_SISO_##s##M_PLCP, \ |
| 51 | IWL_RATE_MIMO2_##s##M_PLCP,\ |
| 52 | IWL_RATE_MIMO3_##s##M_PLCP,\ |
| 53 | IWL_RATE_##r##M_IEEE, \ |
| 54 | IWL_RATE_##ip##M_INDEX, \ |
| 55 | IWL_RATE_##in##M_INDEX, \ |
| 56 | IWL_RATE_##rp##M_INDEX, \ |
| 57 | IWL_RATE_##rn##M_INDEX, \ |
| 58 | IWL_RATE_##pp##M_INDEX, \ |
| 59 | IWL_RATE_##np##M_INDEX } |
| 60 | |
| 61 | /* |
| 62 | * Parameter order: |
| 63 | * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate |
| 64 | * |
| 65 | * If there isn't a valid next or previous rate then INV is used which |
| 66 | * maps to IWL_RATE_INVALID |
| 67 | * |
| 68 | */ |
| 69 | const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = { |
| 70 | IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */ |
| 71 | IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */ |
| 72 | IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */ |
| 73 | IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */ |
| 74 | IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */ |
| 75 | IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */ |
| 76 | IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */ |
| 77 | IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */ |
| 78 | IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */ |
| 79 | IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */ |
| 80 | IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */ |
| 81 | IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */ |
| 82 | IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */ |
| 83 | /* FIXME:RS: ^^ should be INV (legacy) */ |
| 84 | }; |
| 85 | EXPORT_SYMBOL(iwl_rates); |
| 86 | |
| 87 | /** |
| 88 | * translate ucode response to mac80211 tx status control values |
| 89 | */ |
| 90 | void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags, |
| 91 | struct ieee80211_tx_info *info) |
| 92 | { |
| 93 | int rate_index; |
| 94 | struct ieee80211_tx_rate *r = &info->control.rates[0]; |
| 95 | |
| 96 | info->antenna_sel_tx = |
| 97 | ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS); |
| 98 | if (rate_n_flags & RATE_MCS_HT_MSK) |
| 99 | r->flags |= IEEE80211_TX_RC_MCS; |
| 100 | if (rate_n_flags & RATE_MCS_GF_MSK) |
| 101 | r->flags |= IEEE80211_TX_RC_GREEN_FIELD; |
| 102 | if (rate_n_flags & RATE_MCS_FAT_MSK) |
| 103 | r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; |
| 104 | if (rate_n_flags & RATE_MCS_DUP_MSK) |
| 105 | r->flags |= IEEE80211_TX_RC_DUP_DATA; |
| 106 | if (rate_n_flags & RATE_MCS_SGI_MSK) |
| 107 | r->flags |= IEEE80211_TX_RC_SHORT_GI; |
| 108 | rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags); |
| 109 | if (info->band == IEEE80211_BAND_5GHZ) |
| 110 | rate_index -= IWL_FIRST_OFDM_RATE; |
| 111 | r->idx = rate_index; |
| 112 | } |
| 113 | EXPORT_SYMBOL(iwl_hwrate_to_tx_control); |
| 114 | |
| 115 | int iwl_hwrate_to_plcp_idx(u32 rate_n_flags) |
| 116 | { |
| 117 | int idx = 0; |
| 118 | |
| 119 | /* HT rate format */ |
| 120 | if (rate_n_flags & RATE_MCS_HT_MSK) { |
| 121 | idx = (rate_n_flags & 0xff); |
| 122 | |
| 123 | if (idx >= IWL_RATE_MIMO3_6M_PLCP) |
| 124 | idx = idx - IWL_RATE_MIMO3_6M_PLCP; |
| 125 | else if (idx >= IWL_RATE_MIMO2_6M_PLCP) |
| 126 | idx = idx - IWL_RATE_MIMO2_6M_PLCP; |
| 127 | |
| 128 | idx += IWL_FIRST_OFDM_RATE; |
| 129 | /* skip 9M not supported in ht*/ |
| 130 | if (idx >= IWL_RATE_9M_INDEX) |
| 131 | idx += 1; |
| 132 | if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE)) |
| 133 | return idx; |
| 134 | |
| 135 | /* legacy rate format, search for match in table */ |
| 136 | } else { |
| 137 | for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++) |
| 138 | if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF)) |
| 139 | return idx; |
| 140 | } |
| 141 | |
| 142 | return -1; |
| 143 | } |
| 144 | EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx); |
| 145 | |
| 146 | u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant) |
| 147 | { |
| 148 | int i; |
| 149 | u8 ind = ant; |
| 150 | for (i = 0; i < RATE_ANT_NUM - 1; i++) { |
| 151 | ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0; |
| 152 | if (priv->hw_params.valid_tx_ant & BIT(ind)) |
| 153 | return ind; |
| 154 | } |
| 155 | return ant; |
| 156 | } |
| 157 | |
| 158 | const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
| 159 | EXPORT_SYMBOL(iwl_bcast_addr); |
| 160 | |
| 161 | |
| 162 | /* This function both allocates and initializes hw and priv. */ |
| 163 | struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg, |
| 164 | struct ieee80211_ops *hw_ops) |
| 165 | { |
| 166 | struct iwl_priv *priv; |
| 167 | |
| 168 | /* mac80211 allocates memory for this device instance, including |
| 169 | * space for this driver's private structure */ |
| 170 | struct ieee80211_hw *hw = |
| 171 | ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops); |
| 172 | if (hw == NULL) { |
| 173 | printk(KERN_ERR "%s: Can not allocate network device\n", |
| 174 | cfg->name); |
| 175 | goto out; |
| 176 | } |
| 177 | |
| 178 | priv = hw->priv; |
| 179 | priv->hw = hw; |
| 180 | |
| 181 | out: |
| 182 | return hw; |
| 183 | } |
| 184 | EXPORT_SYMBOL(iwl_alloc_all); |
| 185 | |
| 186 | void iwl_hw_detect(struct iwl_priv *priv) |
| 187 | { |
| 188 | priv->hw_rev = _iwl_read32(priv, CSR_HW_REV); |
| 189 | priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG); |
| 190 | pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id); |
| 191 | } |
| 192 | EXPORT_SYMBOL(iwl_hw_detect); |
| 193 | |
| 194 | int iwl_hw_nic_init(struct iwl_priv *priv) |
| 195 | { |
| 196 | unsigned long flags; |
| 197 | struct iwl_rx_queue *rxq = &priv->rxq; |
| 198 | int ret; |
| 199 | |
| 200 | /* nic_init */ |
| 201 | spin_lock_irqsave(&priv->lock, flags); |
| 202 | priv->cfg->ops->lib->apm_ops.init(priv); |
| 203 | iwl_write32(priv, CSR_INT_COALESCING, 512 / 32); |
| 204 | spin_unlock_irqrestore(&priv->lock, flags); |
| 205 | |
| 206 | ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN); |
| 207 | |
| 208 | priv->cfg->ops->lib->apm_ops.config(priv); |
| 209 | |
| 210 | /* Allocate the RX queue, or reset if it is already allocated */ |
| 211 | if (!rxq->bd) { |
| 212 | ret = iwl_rx_queue_alloc(priv); |
| 213 | if (ret) { |
| 214 | IWL_ERR(priv, "Unable to initialize Rx queue\n"); |
| 215 | return -ENOMEM; |
| 216 | } |
| 217 | } else |
| 218 | iwl_rx_queue_reset(priv, rxq); |
| 219 | |
| 220 | iwl_rx_replenish(priv); |
| 221 | |
| 222 | iwl_rx_init(priv, rxq); |
| 223 | |
| 224 | spin_lock_irqsave(&priv->lock, flags); |
| 225 | |
| 226 | rxq->need_update = 1; |
| 227 | iwl_rx_queue_update_write_ptr(priv, rxq); |
| 228 | |
| 229 | spin_unlock_irqrestore(&priv->lock, flags); |
| 230 | |
| 231 | /* Allocate and init all Tx and Command queues */ |
| 232 | ret = iwl_txq_ctx_reset(priv); |
| 233 | if (ret) |
| 234 | return ret; |
| 235 | |
| 236 | set_bit(STATUS_INIT, &priv->status); |
| 237 | |
| 238 | return 0; |
| 239 | } |
| 240 | EXPORT_SYMBOL(iwl_hw_nic_init); |
| 241 | |
| 242 | void iwl_reset_qos(struct iwl_priv *priv) |
| 243 | { |
| 244 | u16 cw_min = 15; |
| 245 | u16 cw_max = 1023; |
| 246 | u8 aifs = 2; |
| 247 | bool is_legacy = false; |
| 248 | unsigned long flags; |
| 249 | int i; |
| 250 | |
| 251 | spin_lock_irqsave(&priv->lock, flags); |
| 252 | /* QoS always active in AP and ADHOC mode |
| 253 | * In STA mode wait for association |
| 254 | */ |
| 255 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC || |
| 256 | priv->iw_mode == NL80211_IFTYPE_AP) |
| 257 | priv->qos_data.qos_active = 1; |
| 258 | else |
| 259 | priv->qos_data.qos_active = 0; |
| 260 | |
| 261 | /* check for legacy mode */ |
| 262 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC && |
| 263 | (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) || |
| 264 | (priv->iw_mode == NL80211_IFTYPE_STATION && |
| 265 | (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) { |
| 266 | cw_min = 31; |
| 267 | is_legacy = 1; |
| 268 | } |
| 269 | |
| 270 | if (priv->qos_data.qos_active) |
| 271 | aifs = 3; |
| 272 | |
| 273 | priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min); |
| 274 | priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max); |
| 275 | priv->qos_data.def_qos_parm.ac[0].aifsn = aifs; |
| 276 | priv->qos_data.def_qos_parm.ac[0].edca_txop = 0; |
| 277 | priv->qos_data.def_qos_parm.ac[0].reserved1 = 0; |
| 278 | |
| 279 | if (priv->qos_data.qos_active) { |
| 280 | i = 1; |
| 281 | priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min); |
| 282 | priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max); |
| 283 | priv->qos_data.def_qos_parm.ac[i].aifsn = 7; |
| 284 | priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; |
| 285 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; |
| 286 | |
| 287 | i = 2; |
| 288 | priv->qos_data.def_qos_parm.ac[i].cw_min = |
| 289 | cpu_to_le16((cw_min + 1) / 2 - 1); |
| 290 | priv->qos_data.def_qos_parm.ac[i].cw_max = |
| 291 | cpu_to_le16(cw_max); |
| 292 | priv->qos_data.def_qos_parm.ac[i].aifsn = 2; |
| 293 | if (is_legacy) |
| 294 | priv->qos_data.def_qos_parm.ac[i].edca_txop = |
| 295 | cpu_to_le16(6016); |
| 296 | else |
| 297 | priv->qos_data.def_qos_parm.ac[i].edca_txop = |
| 298 | cpu_to_le16(3008); |
| 299 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; |
| 300 | |
| 301 | i = 3; |
| 302 | priv->qos_data.def_qos_parm.ac[i].cw_min = |
| 303 | cpu_to_le16((cw_min + 1) / 4 - 1); |
| 304 | priv->qos_data.def_qos_parm.ac[i].cw_max = |
| 305 | cpu_to_le16((cw_max + 1) / 2 - 1); |
| 306 | priv->qos_data.def_qos_parm.ac[i].aifsn = 2; |
| 307 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; |
| 308 | if (is_legacy) |
| 309 | priv->qos_data.def_qos_parm.ac[i].edca_txop = |
| 310 | cpu_to_le16(3264); |
| 311 | else |
| 312 | priv->qos_data.def_qos_parm.ac[i].edca_txop = |
| 313 | cpu_to_le16(1504); |
| 314 | } else { |
| 315 | for (i = 1; i < 4; i++) { |
| 316 | priv->qos_data.def_qos_parm.ac[i].cw_min = |
| 317 | cpu_to_le16(cw_min); |
| 318 | priv->qos_data.def_qos_parm.ac[i].cw_max = |
| 319 | cpu_to_le16(cw_max); |
| 320 | priv->qos_data.def_qos_parm.ac[i].aifsn = aifs; |
| 321 | priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; |
| 322 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; |
| 323 | } |
| 324 | } |
| 325 | IWL_DEBUG_QOS("set QoS to default \n"); |
| 326 | |
| 327 | spin_unlock_irqrestore(&priv->lock, flags); |
| 328 | } |
| 329 | EXPORT_SYMBOL(iwl_reset_qos); |
| 330 | |
| 331 | #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */ |
| 332 | #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */ |
| 333 | static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv, |
| 334 | struct ieee80211_sta_ht_cap *ht_info, |
| 335 | enum ieee80211_band band) |
| 336 | { |
| 337 | u16 max_bit_rate = 0; |
| 338 | u8 rx_chains_num = priv->hw_params.rx_chains_num; |
| 339 | u8 tx_chains_num = priv->hw_params.tx_chains_num; |
| 340 | |
| 341 | ht_info->cap = 0; |
| 342 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
| 343 | |
| 344 | ht_info->ht_supported = true; |
| 345 | |
| 346 | ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD; |
| 347 | ht_info->cap |= IEEE80211_HT_CAP_SGI_20; |
| 348 | ht_info->cap |= (IEEE80211_HT_CAP_SM_PS & |
| 349 | (WLAN_HT_CAP_SM_PS_DISABLED << 2)); |
| 350 | |
| 351 | max_bit_rate = MAX_BIT_RATE_20_MHZ; |
| 352 | if (priv->hw_params.fat_channel & BIT(band)) { |
| 353 | ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
| 354 | ht_info->cap |= IEEE80211_HT_CAP_SGI_40; |
| 355 | ht_info->mcs.rx_mask[4] = 0x01; |
| 356 | max_bit_rate = MAX_BIT_RATE_40_MHZ; |
| 357 | } |
| 358 | |
| 359 | if (priv->cfg->mod_params->amsdu_size_8K) |
| 360 | ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
| 361 | |
| 362 | ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF; |
| 363 | ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF; |
| 364 | |
| 365 | ht_info->mcs.rx_mask[0] = 0xFF; |
| 366 | if (rx_chains_num >= 2) |
| 367 | ht_info->mcs.rx_mask[1] = 0xFF; |
| 368 | if (rx_chains_num >= 3) |
| 369 | ht_info->mcs.rx_mask[2] = 0xFF; |
| 370 | |
| 371 | /* Highest supported Rx data rate */ |
| 372 | max_bit_rate *= rx_chains_num; |
| 373 | WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK); |
| 374 | ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate); |
| 375 | |
| 376 | /* Tx MCS capabilities */ |
| 377 | ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; |
| 378 | if (tx_chains_num != rx_chains_num) { |
| 379 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
| 380 | ht_info->mcs.tx_params |= ((tx_chains_num - 1) << |
| 381 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); |
| 382 | } |
| 383 | } |
| 384 | |
| 385 | static void iwlcore_init_hw_rates(struct iwl_priv *priv, |
| 386 | struct ieee80211_rate *rates) |
| 387 | { |
| 388 | int i; |
| 389 | |
| 390 | for (i = 0; i < IWL_RATE_COUNT; i++) { |
| 391 | rates[i].bitrate = iwl_rates[i].ieee * 5; |
| 392 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ |
| 393 | rates[i].hw_value_short = i; |
| 394 | rates[i].flags = 0; |
| 395 | if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { |
| 396 | /* |
| 397 | * If CCK != 1M then set short preamble rate flag. |
| 398 | */ |
| 399 | rates[i].flags |= |
| 400 | (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ? |
| 401 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; |
| 402 | } |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | /** |
| 407 | * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom |
| 408 | */ |
| 409 | static int iwlcore_init_geos(struct iwl_priv *priv) |
| 410 | { |
| 411 | struct iwl_channel_info *ch; |
| 412 | struct ieee80211_supported_band *sband; |
| 413 | struct ieee80211_channel *channels; |
| 414 | struct ieee80211_channel *geo_ch; |
| 415 | struct ieee80211_rate *rates; |
| 416 | int i = 0; |
| 417 | |
| 418 | if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates || |
| 419 | priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) { |
| 420 | IWL_DEBUG_INFO("Geography modes already initialized.\n"); |
| 421 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); |
| 422 | return 0; |
| 423 | } |
| 424 | |
| 425 | channels = kzalloc(sizeof(struct ieee80211_channel) * |
| 426 | priv->channel_count, GFP_KERNEL); |
| 427 | if (!channels) |
| 428 | return -ENOMEM; |
| 429 | |
| 430 | rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)), |
| 431 | GFP_KERNEL); |
| 432 | if (!rates) { |
| 433 | kfree(channels); |
| 434 | return -ENOMEM; |
| 435 | } |
| 436 | |
| 437 | /* 5.2GHz channels start after the 2.4GHz channels */ |
| 438 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; |
| 439 | sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)]; |
| 440 | /* just OFDM */ |
| 441 | sband->bitrates = &rates[IWL_FIRST_OFDM_RATE]; |
| 442 | sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE; |
| 443 | |
| 444 | if (priv->cfg->sku & IWL_SKU_N) |
| 445 | iwlcore_init_ht_hw_capab(priv, &sband->ht_cap, |
| 446 | IEEE80211_BAND_5GHZ); |
| 447 | |
| 448 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; |
| 449 | sband->channels = channels; |
| 450 | /* OFDM & CCK */ |
| 451 | sband->bitrates = rates; |
| 452 | sband->n_bitrates = IWL_RATE_COUNT; |
| 453 | |
| 454 | if (priv->cfg->sku & IWL_SKU_N) |
| 455 | iwlcore_init_ht_hw_capab(priv, &sband->ht_cap, |
| 456 | IEEE80211_BAND_2GHZ); |
| 457 | |
| 458 | priv->ieee_channels = channels; |
| 459 | priv->ieee_rates = rates; |
| 460 | |
| 461 | iwlcore_init_hw_rates(priv, rates); |
| 462 | |
| 463 | for (i = 0; i < priv->channel_count; i++) { |
| 464 | ch = &priv->channel_info[i]; |
| 465 | |
| 466 | /* FIXME: might be removed if scan is OK */ |
| 467 | if (!is_channel_valid(ch)) |
| 468 | continue; |
| 469 | |
| 470 | if (is_channel_a_band(ch)) |
| 471 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; |
| 472 | else |
| 473 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; |
| 474 | |
| 475 | geo_ch = &sband->channels[sband->n_channels++]; |
| 476 | |
| 477 | geo_ch->center_freq = |
| 478 | ieee80211_channel_to_frequency(ch->channel); |
| 479 | geo_ch->max_power = ch->max_power_avg; |
| 480 | geo_ch->max_antenna_gain = 0xff; |
| 481 | geo_ch->hw_value = ch->channel; |
| 482 | |
| 483 | if (is_channel_valid(ch)) { |
| 484 | if (!(ch->flags & EEPROM_CHANNEL_IBSS)) |
| 485 | geo_ch->flags |= IEEE80211_CHAN_NO_IBSS; |
| 486 | |
| 487 | if (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) |
| 488 | geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN; |
| 489 | |
| 490 | if (ch->flags & EEPROM_CHANNEL_RADAR) |
| 491 | geo_ch->flags |= IEEE80211_CHAN_RADAR; |
| 492 | |
| 493 | geo_ch->flags |= ch->fat_extension_channel; |
| 494 | |
| 495 | if (ch->max_power_avg > priv->tx_power_channel_lmt) |
| 496 | priv->tx_power_channel_lmt = ch->max_power_avg; |
| 497 | } else { |
| 498 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; |
| 499 | } |
| 500 | |
| 501 | /* Save flags for reg domain usage */ |
| 502 | geo_ch->orig_flags = geo_ch->flags; |
| 503 | |
| 504 | IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", |
| 505 | ch->channel, geo_ch->center_freq, |
| 506 | is_channel_a_band(ch) ? "5.2" : "2.4", |
| 507 | geo_ch->flags & IEEE80211_CHAN_DISABLED ? |
| 508 | "restricted" : "valid", |
| 509 | geo_ch->flags); |
| 510 | } |
| 511 | |
| 512 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && |
| 513 | priv->cfg->sku & IWL_SKU_A) { |
| 514 | IWL_INFO(priv, "Incorrectly detected BG card as ABG. " |
| 515 | "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n", |
| 516 | priv->pci_dev->device, |
| 517 | priv->pci_dev->subsystem_device); |
| 518 | priv->cfg->sku &= ~IWL_SKU_A; |
| 519 | } |
| 520 | |
| 521 | IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n", |
| 522 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, |
| 523 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); |
| 524 | |
| 525 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); |
| 526 | |
| 527 | return 0; |
| 528 | } |
| 529 | |
| 530 | /* |
| 531 | * iwlcore_free_geos - undo allocations in iwlcore_init_geos |
| 532 | */ |
| 533 | static void iwlcore_free_geos(struct iwl_priv *priv) |
| 534 | { |
| 535 | kfree(priv->ieee_channels); |
| 536 | kfree(priv->ieee_rates); |
| 537 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); |
| 538 | } |
| 539 | |
| 540 | static bool is_single_rx_stream(struct iwl_priv *priv) |
| 541 | { |
| 542 | return !priv->current_ht_config.is_ht || |
| 543 | ((priv->current_ht_config.mcs.rx_mask[1] == 0) && |
| 544 | (priv->current_ht_config.mcs.rx_mask[2] == 0)); |
| 545 | } |
| 546 | |
| 547 | static u8 iwl_is_channel_extension(struct iwl_priv *priv, |
| 548 | enum ieee80211_band band, |
| 549 | u16 channel, u8 extension_chan_offset) |
| 550 | { |
| 551 | const struct iwl_channel_info *ch_info; |
| 552 | |
| 553 | ch_info = iwl_get_channel_info(priv, band, channel); |
| 554 | if (!is_channel_valid(ch_info)) |
| 555 | return 0; |
| 556 | |
| 557 | if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) |
| 558 | return !(ch_info->fat_extension_channel & |
| 559 | IEEE80211_CHAN_NO_FAT_ABOVE); |
| 560 | else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) |
| 561 | return !(ch_info->fat_extension_channel & |
| 562 | IEEE80211_CHAN_NO_FAT_BELOW); |
| 563 | |
| 564 | return 0; |
| 565 | } |
| 566 | |
| 567 | u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv, |
| 568 | struct ieee80211_sta_ht_cap *sta_ht_inf) |
| 569 | { |
| 570 | struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config; |
| 571 | |
| 572 | if ((!iwl_ht_conf->is_ht) || |
| 573 | (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) || |
| 574 | (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE)) |
| 575 | return 0; |
| 576 | |
| 577 | if (sta_ht_inf) { |
| 578 | if ((!sta_ht_inf->ht_supported) || |
| 579 | (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40))) |
| 580 | return 0; |
| 581 | } |
| 582 | |
| 583 | return iwl_is_channel_extension(priv, priv->band, |
| 584 | le16_to_cpu(priv->staging_rxon.channel), |
| 585 | iwl_ht_conf->extension_chan_offset); |
| 586 | } |
| 587 | EXPORT_SYMBOL(iwl_is_fat_tx_allowed); |
| 588 | |
| 589 | void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info) |
| 590 | { |
| 591 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
| 592 | u32 val; |
| 593 | |
| 594 | if (!ht_info->is_ht) { |
| 595 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | |
| 596 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK | |
| 597 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | |
| 598 | RXON_FLG_FAT_PROT_MSK | |
| 599 | RXON_FLG_HT_PROT_MSK); |
| 600 | return; |
| 601 | } |
| 602 | |
| 603 | /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */ |
| 604 | if (iwl_is_fat_tx_allowed(priv, NULL)) |
| 605 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK; |
| 606 | else |
| 607 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | |
| 608 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); |
| 609 | |
| 610 | /* Note: control channel is opposite of extension channel */ |
| 611 | switch (ht_info->extension_chan_offset) { |
| 612 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: |
| 613 | rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); |
| 614 | break; |
| 615 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: |
| 616 | rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; |
| 617 | break; |
| 618 | case IEEE80211_HT_PARAM_CHA_SEC_NONE: |
| 619 | default: |
| 620 | rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK; |
| 621 | break; |
| 622 | } |
| 623 | |
| 624 | val = ht_info->ht_protection; |
| 625 | |
| 626 | rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS); |
| 627 | |
| 628 | iwl_set_rxon_chain(priv); |
| 629 | |
| 630 | IWL_DEBUG_ASSOC("supported HT rate 0x%X 0x%X 0x%X " |
| 631 | "rxon flags 0x%X operation mode :0x%X " |
| 632 | "extension channel offset 0x%x\n", |
| 633 | ht_info->mcs.rx_mask[0], |
| 634 | ht_info->mcs.rx_mask[1], |
| 635 | ht_info->mcs.rx_mask[2], |
| 636 | le32_to_cpu(rxon->flags), ht_info->ht_protection, |
| 637 | ht_info->extension_chan_offset); |
| 638 | return; |
| 639 | } |
| 640 | EXPORT_SYMBOL(iwl_set_rxon_ht); |
| 641 | |
| 642 | #define IWL_NUM_RX_CHAINS_MULTIPLE 3 |
| 643 | #define IWL_NUM_RX_CHAINS_SINGLE 2 |
| 644 | #define IWL_NUM_IDLE_CHAINS_DUAL 2 |
| 645 | #define IWL_NUM_IDLE_CHAINS_SINGLE 1 |
| 646 | |
| 647 | /* Determine how many receiver/antenna chains to use. |
| 648 | * More provides better reception via diversity. Fewer saves power. |
| 649 | * MIMO (dual stream) requires at least 2, but works better with 3. |
| 650 | * This does not determine *which* chains to use, just how many. |
| 651 | */ |
| 652 | static int iwl_get_active_rx_chain_count(struct iwl_priv *priv) |
| 653 | { |
| 654 | bool is_single = is_single_rx_stream(priv); |
| 655 | bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status); |
| 656 | |
| 657 | /* # of Rx chains to use when expecting MIMO. */ |
| 658 | if (is_single || (!is_cam && (priv->current_ht_config.sm_ps == |
| 659 | WLAN_HT_CAP_SM_PS_STATIC))) |
| 660 | return IWL_NUM_RX_CHAINS_SINGLE; |
| 661 | else |
| 662 | return IWL_NUM_RX_CHAINS_MULTIPLE; |
| 663 | } |
| 664 | |
| 665 | static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt) |
| 666 | { |
| 667 | int idle_cnt; |
| 668 | bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status); |
| 669 | /* # Rx chains when idling and maybe trying to save power */ |
| 670 | switch (priv->current_ht_config.sm_ps) { |
| 671 | case WLAN_HT_CAP_SM_PS_STATIC: |
| 672 | case WLAN_HT_CAP_SM_PS_DYNAMIC: |
| 673 | idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL : |
| 674 | IWL_NUM_IDLE_CHAINS_SINGLE; |
| 675 | break; |
| 676 | case WLAN_HT_CAP_SM_PS_DISABLED: |
| 677 | idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE; |
| 678 | break; |
| 679 | case WLAN_HT_CAP_SM_PS_INVALID: |
| 680 | default: |
| 681 | IWL_ERR(priv, "invalid mimo ps mode %d\n", |
| 682 | priv->current_ht_config.sm_ps); |
| 683 | WARN_ON(1); |
| 684 | idle_cnt = -1; |
| 685 | break; |
| 686 | } |
| 687 | return idle_cnt; |
| 688 | } |
| 689 | |
| 690 | /* up to 4 chains */ |
| 691 | static u8 iwl_count_chain_bitmap(u32 chain_bitmap) |
| 692 | { |
| 693 | u8 res; |
| 694 | res = (chain_bitmap & BIT(0)) >> 0; |
| 695 | res += (chain_bitmap & BIT(1)) >> 1; |
| 696 | res += (chain_bitmap & BIT(2)) >> 2; |
| 697 | res += (chain_bitmap & BIT(4)) >> 4; |
| 698 | return res; |
| 699 | } |
| 700 | |
| 701 | /** |
| 702 | * iwl_is_monitor_mode - Determine if interface in monitor mode |
| 703 | * |
| 704 | * priv->iw_mode is set in add_interface, but add_interface is |
| 705 | * never called for monitor mode. The only way mac80211 informs us about |
| 706 | * monitor mode is through configuring filters (call to configure_filter). |
| 707 | */ |
| 708 | static bool iwl_is_monitor_mode(struct iwl_priv *priv) |
| 709 | { |
| 710 | return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK); |
| 711 | } |
| 712 | |
| 713 | /** |
| 714 | * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image |
| 715 | * |
| 716 | * Selects how many and which Rx receivers/antennas/chains to use. |
| 717 | * This should not be used for scan command ... it puts data in wrong place. |
| 718 | */ |
| 719 | void iwl_set_rxon_chain(struct iwl_priv *priv) |
| 720 | { |
| 721 | bool is_single = is_single_rx_stream(priv); |
| 722 | bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status); |
| 723 | u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt; |
| 724 | u32 active_chains; |
| 725 | u16 rx_chain; |
| 726 | |
| 727 | /* Tell uCode which antennas are actually connected. |
| 728 | * Before first association, we assume all antennas are connected. |
| 729 | * Just after first association, iwl_chain_noise_calibration() |
| 730 | * checks which antennas actually *are* connected. */ |
| 731 | if (priv->chain_noise_data.active_chains) |
| 732 | active_chains = priv->chain_noise_data.active_chains; |
| 733 | else |
| 734 | active_chains = priv->hw_params.valid_rx_ant; |
| 735 | |
| 736 | rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS; |
| 737 | |
| 738 | /* How many receivers should we use? */ |
| 739 | active_rx_cnt = iwl_get_active_rx_chain_count(priv); |
| 740 | idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt); |
| 741 | |
| 742 | |
| 743 | /* correct rx chain count according hw settings |
| 744 | * and chain noise calibration |
| 745 | */ |
| 746 | valid_rx_cnt = iwl_count_chain_bitmap(active_chains); |
| 747 | if (valid_rx_cnt < active_rx_cnt) |
| 748 | active_rx_cnt = valid_rx_cnt; |
| 749 | |
| 750 | if (valid_rx_cnt < idle_rx_cnt) |
| 751 | idle_rx_cnt = valid_rx_cnt; |
| 752 | |
| 753 | rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS; |
| 754 | rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS; |
| 755 | |
| 756 | /* copied from 'iwl_bg_request_scan()' */ |
| 757 | /* Force use of chains B and C (0x6) for Rx for 4965 |
| 758 | * Avoid A (0x1) because of its off-channel reception on A-band. |
| 759 | * MIMO is not used here, but value is required */ |
| 760 | if (iwl_is_monitor_mode(priv) && |
| 761 | !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) && |
| 762 | ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) { |
| 763 | rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS; |
| 764 | rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS; |
| 765 | rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS; |
| 766 | rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS; |
| 767 | } |
| 768 | |
| 769 | priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain); |
| 770 | |
| 771 | if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam) |
| 772 | priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK; |
| 773 | else |
| 774 | priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; |
| 775 | |
| 776 | IWL_DEBUG_ASSOC("rx_chain=0x%X active=%d idle=%d\n", |
| 777 | priv->staging_rxon.rx_chain, |
| 778 | active_rx_cnt, idle_rx_cnt); |
| 779 | |
| 780 | WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 || |
| 781 | active_rx_cnt < idle_rx_cnt); |
| 782 | } |
| 783 | EXPORT_SYMBOL(iwl_set_rxon_chain); |
| 784 | |
| 785 | /** |
| 786 | * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON |
| 787 | * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz |
| 788 | * @channel: Any channel valid for the requested phymode |
| 789 | |
| 790 | * In addition to setting the staging RXON, priv->phymode is also set. |
| 791 | * |
| 792 | * NOTE: Does not commit to the hardware; it sets appropriate bit fields |
| 793 | * in the staging RXON flag structure based on the phymode |
| 794 | */ |
| 795 | int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch) |
| 796 | { |
| 797 | enum ieee80211_band band = ch->band; |
| 798 | u16 channel = ieee80211_frequency_to_channel(ch->center_freq); |
| 799 | |
| 800 | if (!iwl_get_channel_info(priv, band, channel)) { |
| 801 | IWL_DEBUG_INFO("Could not set channel to %d [%d]\n", |
| 802 | channel, band); |
| 803 | return -EINVAL; |
| 804 | } |
| 805 | |
| 806 | if ((le16_to_cpu(priv->staging_rxon.channel) == channel) && |
| 807 | (priv->band == band)) |
| 808 | return 0; |
| 809 | |
| 810 | priv->staging_rxon.channel = cpu_to_le16(channel); |
| 811 | if (band == IEEE80211_BAND_5GHZ) |
| 812 | priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK; |
| 813 | else |
| 814 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; |
| 815 | |
| 816 | priv->band = band; |
| 817 | |
| 818 | IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band); |
| 819 | |
| 820 | return 0; |
| 821 | } |
| 822 | EXPORT_SYMBOL(iwl_set_rxon_channel); |
| 823 | |
| 824 | int iwl_setup_mac(struct iwl_priv *priv) |
| 825 | { |
| 826 | int ret; |
| 827 | struct ieee80211_hw *hw = priv->hw; |
| 828 | hw->rate_control_algorithm = "iwl-agn-rs"; |
| 829 | |
| 830 | /* Tell mac80211 our characteristics */ |
| 831 | hw->flags = IEEE80211_HW_SIGNAL_DBM | |
| 832 | IEEE80211_HW_NOISE_DBM | |
| 833 | IEEE80211_HW_AMPDU_AGGREGATION | |
| 834 | IEEE80211_HW_SUPPORTS_PS; |
| 835 | hw->wiphy->interface_modes = |
| 836 | BIT(NL80211_IFTYPE_STATION) | |
| 837 | BIT(NL80211_IFTYPE_ADHOC); |
| 838 | |
| 839 | hw->wiphy->custom_regulatory = true; |
| 840 | |
| 841 | /* Default value; 4 EDCA QOS priorities */ |
| 842 | hw->queues = 4; |
| 843 | /* queues to support 11n aggregation */ |
| 844 | if (priv->cfg->sku & IWL_SKU_N) |
| 845 | hw->ampdu_queues = priv->cfg->mod_params->num_of_ampdu_queues; |
| 846 | |
| 847 | hw->conf.beacon_int = 100; |
| 848 | hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL; |
| 849 | |
| 850 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) |
| 851 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
| 852 | &priv->bands[IEEE80211_BAND_2GHZ]; |
| 853 | if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) |
| 854 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
| 855 | &priv->bands[IEEE80211_BAND_5GHZ]; |
| 856 | |
| 857 | ret = ieee80211_register_hw(priv->hw); |
| 858 | if (ret) { |
| 859 | IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); |
| 860 | return ret; |
| 861 | } |
| 862 | priv->mac80211_registered = 1; |
| 863 | |
| 864 | return 0; |
| 865 | } |
| 866 | EXPORT_SYMBOL(iwl_setup_mac); |
| 867 | |
| 868 | int iwl_set_hw_params(struct iwl_priv *priv) |
| 869 | { |
| 870 | priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto; |
| 871 | priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; |
| 872 | priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; |
| 873 | if (priv->cfg->mod_params->amsdu_size_8K) |
| 874 | priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K; |
| 875 | else |
| 876 | priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K; |
| 877 | priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256; |
| 878 | |
| 879 | if (priv->cfg->mod_params->disable_11n) |
| 880 | priv->cfg->sku &= ~IWL_SKU_N; |
| 881 | |
| 882 | /* Device-specific setup */ |
| 883 | return priv->cfg->ops->lib->set_hw_params(priv); |
| 884 | } |
| 885 | EXPORT_SYMBOL(iwl_set_hw_params); |
| 886 | |
| 887 | int iwl_init_drv(struct iwl_priv *priv) |
| 888 | { |
| 889 | int ret; |
| 890 | |
| 891 | priv->ibss_beacon = NULL; |
| 892 | |
| 893 | spin_lock_init(&priv->lock); |
| 894 | spin_lock_init(&priv->power_data.lock); |
| 895 | spin_lock_init(&priv->sta_lock); |
| 896 | spin_lock_init(&priv->hcmd_lock); |
| 897 | |
| 898 | INIT_LIST_HEAD(&priv->free_frames); |
| 899 | |
| 900 | mutex_init(&priv->mutex); |
| 901 | |
| 902 | /* Clear the driver's (not device's) station table */ |
| 903 | iwl_clear_stations_table(priv); |
| 904 | |
| 905 | priv->data_retry_limit = -1; |
| 906 | priv->ieee_channels = NULL; |
| 907 | priv->ieee_rates = NULL; |
| 908 | priv->band = IEEE80211_BAND_2GHZ; |
| 909 | |
| 910 | priv->iw_mode = NL80211_IFTYPE_STATION; |
| 911 | |
| 912 | priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED; |
| 913 | |
| 914 | /* Choose which receivers/antennas to use */ |
| 915 | iwl_set_rxon_chain(priv); |
| 916 | iwl_init_scan_params(priv); |
| 917 | |
| 918 | iwl_reset_qos(priv); |
| 919 | |
| 920 | priv->qos_data.qos_active = 0; |
| 921 | priv->qos_data.qos_cap.val = 0; |
| 922 | |
| 923 | priv->rates_mask = IWL_RATES_MASK; |
| 924 | /* If power management is turned on, default to AC mode */ |
| 925 | priv->power_mode = IWL_POWER_AC; |
| 926 | priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX; |
| 927 | |
| 928 | ret = iwl_init_channel_map(priv); |
| 929 | if (ret) { |
| 930 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); |
| 931 | goto err; |
| 932 | } |
| 933 | |
| 934 | ret = iwlcore_init_geos(priv); |
| 935 | if (ret) { |
| 936 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); |
| 937 | goto err_free_channel_map; |
| 938 | } |
| 939 | |
| 940 | return 0; |
| 941 | |
| 942 | err_free_channel_map: |
| 943 | iwl_free_channel_map(priv); |
| 944 | err: |
| 945 | return ret; |
| 946 | } |
| 947 | EXPORT_SYMBOL(iwl_init_drv); |
| 948 | |
| 949 | int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force) |
| 950 | { |
| 951 | int ret = 0; |
| 952 | if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) { |
| 953 | IWL_WARN(priv, "Requested user TXPOWER %d below limit.\n", |
| 954 | priv->tx_power_user_lmt); |
| 955 | return -EINVAL; |
| 956 | } |
| 957 | |
| 958 | if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) { |
| 959 | IWL_WARN(priv, "Requested user TXPOWER %d above limit.\n", |
| 960 | priv->tx_power_user_lmt); |
| 961 | return -EINVAL; |
| 962 | } |
| 963 | |
| 964 | if (priv->tx_power_user_lmt != tx_power) |
| 965 | force = true; |
| 966 | |
| 967 | priv->tx_power_user_lmt = tx_power; |
| 968 | |
| 969 | if (force && priv->cfg->ops->lib->send_tx_power) |
| 970 | ret = priv->cfg->ops->lib->send_tx_power(priv); |
| 971 | |
| 972 | return ret; |
| 973 | } |
| 974 | EXPORT_SYMBOL(iwl_set_tx_power); |
| 975 | |
| 976 | void iwl_uninit_drv(struct iwl_priv *priv) |
| 977 | { |
| 978 | iwl_calib_free_results(priv); |
| 979 | iwlcore_free_geos(priv); |
| 980 | iwl_free_channel_map(priv); |
| 981 | kfree(priv->scan); |
| 982 | } |
| 983 | EXPORT_SYMBOL(iwl_uninit_drv); |
| 984 | |
| 985 | |
| 986 | void iwl_disable_interrupts(struct iwl_priv *priv) |
| 987 | { |
| 988 | clear_bit(STATUS_INT_ENABLED, &priv->status); |
| 989 | |
| 990 | /* disable interrupts from uCode/NIC to host */ |
| 991 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
| 992 | |
| 993 | /* acknowledge/clear/reset any interrupts still pending |
| 994 | * from uCode or flow handler (Rx/Tx DMA) */ |
| 995 | iwl_write32(priv, CSR_INT, 0xffffffff); |
| 996 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); |
| 997 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
| 998 | } |
| 999 | EXPORT_SYMBOL(iwl_disable_interrupts); |
| 1000 | |
| 1001 | void iwl_enable_interrupts(struct iwl_priv *priv) |
| 1002 | { |
| 1003 | IWL_DEBUG_ISR("Enabling interrupts\n"); |
| 1004 | set_bit(STATUS_INT_ENABLED, &priv->status); |
| 1005 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
| 1006 | } |
| 1007 | EXPORT_SYMBOL(iwl_enable_interrupts); |
| 1008 | |
| 1009 | int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags) |
| 1010 | { |
| 1011 | u32 stat_flags = 0; |
| 1012 | struct iwl_host_cmd cmd = { |
| 1013 | .id = REPLY_STATISTICS_CMD, |
| 1014 | .meta.flags = flags, |
| 1015 | .len = sizeof(stat_flags), |
| 1016 | .data = (u8 *) &stat_flags, |
| 1017 | }; |
| 1018 | return iwl_send_cmd(priv, &cmd); |
| 1019 | } |
| 1020 | EXPORT_SYMBOL(iwl_send_statistics_request); |
| 1021 | |
| 1022 | /** |
| 1023 | * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host, |
| 1024 | * using sample data 100 bytes apart. If these sample points are good, |
| 1025 | * it's a pretty good bet that everything between them is good, too. |
| 1026 | */ |
| 1027 | static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) |
| 1028 | { |
| 1029 | u32 val; |
| 1030 | int ret = 0; |
| 1031 | u32 errcnt = 0; |
| 1032 | u32 i; |
| 1033 | |
| 1034 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); |
| 1035 | |
| 1036 | ret = iwl_grab_nic_access(priv); |
| 1037 | if (ret) |
| 1038 | return ret; |
| 1039 | |
| 1040 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { |
| 1041 | /* read data comes through single port, auto-incr addr */ |
| 1042 | /* NOTE: Use the debugless read so we don't flood kernel log |
| 1043 | * if IWL_DL_IO is set */ |
| 1044 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
| 1045 | i + IWL49_RTC_INST_LOWER_BOUND); |
| 1046 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
| 1047 | if (val != le32_to_cpu(*image)) { |
| 1048 | ret = -EIO; |
| 1049 | errcnt++; |
| 1050 | if (errcnt >= 3) |
| 1051 | break; |
| 1052 | } |
| 1053 | } |
| 1054 | |
| 1055 | iwl_release_nic_access(priv); |
| 1056 | |
| 1057 | return ret; |
| 1058 | } |
| 1059 | |
| 1060 | /** |
| 1061 | * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host, |
| 1062 | * looking at all data. |
| 1063 | */ |
| 1064 | static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image, |
| 1065 | u32 len) |
| 1066 | { |
| 1067 | u32 val; |
| 1068 | u32 save_len = len; |
| 1069 | int ret = 0; |
| 1070 | u32 errcnt; |
| 1071 | |
| 1072 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); |
| 1073 | |
| 1074 | ret = iwl_grab_nic_access(priv); |
| 1075 | if (ret) |
| 1076 | return ret; |
| 1077 | |
| 1078 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
| 1079 | IWL49_RTC_INST_LOWER_BOUND); |
| 1080 | |
| 1081 | errcnt = 0; |
| 1082 | for (; len > 0; len -= sizeof(u32), image++) { |
| 1083 | /* read data comes through single port, auto-incr addr */ |
| 1084 | /* NOTE: Use the debugless read so we don't flood kernel log |
| 1085 | * if IWL_DL_IO is set */ |
| 1086 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
| 1087 | if (val != le32_to_cpu(*image)) { |
| 1088 | IWL_ERR(priv, "uCode INST section is invalid at " |
| 1089 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
| 1090 | save_len - len, val, le32_to_cpu(*image)); |
| 1091 | ret = -EIO; |
| 1092 | errcnt++; |
| 1093 | if (errcnt >= 20) |
| 1094 | break; |
| 1095 | } |
| 1096 | } |
| 1097 | |
| 1098 | iwl_release_nic_access(priv); |
| 1099 | |
| 1100 | if (!errcnt) |
| 1101 | IWL_DEBUG_INFO |
| 1102 | ("ucode image in INSTRUCTION memory is good\n"); |
| 1103 | |
| 1104 | return ret; |
| 1105 | } |
| 1106 | |
| 1107 | /** |
| 1108 | * iwl_verify_ucode - determine which instruction image is in SRAM, |
| 1109 | * and verify its contents |
| 1110 | */ |
| 1111 | int iwl_verify_ucode(struct iwl_priv *priv) |
| 1112 | { |
| 1113 | __le32 *image; |
| 1114 | u32 len; |
| 1115 | int ret; |
| 1116 | |
| 1117 | /* Try bootstrap */ |
| 1118 | image = (__le32 *)priv->ucode_boot.v_addr; |
| 1119 | len = priv->ucode_boot.len; |
| 1120 | ret = iwlcore_verify_inst_sparse(priv, image, len); |
| 1121 | if (!ret) { |
| 1122 | IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n"); |
| 1123 | return 0; |
| 1124 | } |
| 1125 | |
| 1126 | /* Try initialize */ |
| 1127 | image = (__le32 *)priv->ucode_init.v_addr; |
| 1128 | len = priv->ucode_init.len; |
| 1129 | ret = iwlcore_verify_inst_sparse(priv, image, len); |
| 1130 | if (!ret) { |
| 1131 | IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n"); |
| 1132 | return 0; |
| 1133 | } |
| 1134 | |
| 1135 | /* Try runtime/protocol */ |
| 1136 | image = (__le32 *)priv->ucode_code.v_addr; |
| 1137 | len = priv->ucode_code.len; |
| 1138 | ret = iwlcore_verify_inst_sparse(priv, image, len); |
| 1139 | if (!ret) { |
| 1140 | IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n"); |
| 1141 | return 0; |
| 1142 | } |
| 1143 | |
| 1144 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); |
| 1145 | |
| 1146 | /* Since nothing seems to match, show first several data entries in |
| 1147 | * instruction SRAM, so maybe visual inspection will give a clue. |
| 1148 | * Selection of bootstrap image (vs. other images) is arbitrary. */ |
| 1149 | image = (__le32 *)priv->ucode_boot.v_addr; |
| 1150 | len = priv->ucode_boot.len; |
| 1151 | ret = iwl_verify_inst_full(priv, image, len); |
| 1152 | |
| 1153 | return ret; |
| 1154 | } |
| 1155 | EXPORT_SYMBOL(iwl_verify_ucode); |
| 1156 | |
| 1157 | |
| 1158 | static const char *desc_lookup_text[] = { |
| 1159 | "OK", |
| 1160 | "FAIL", |
| 1161 | "BAD_PARAM", |
| 1162 | "BAD_CHECKSUM", |
| 1163 | "NMI_INTERRUPT_WDG", |
| 1164 | "SYSASSERT", |
| 1165 | "FATAL_ERROR", |
| 1166 | "BAD_COMMAND", |
| 1167 | "HW_ERROR_TUNE_LOCK", |
| 1168 | "HW_ERROR_TEMPERATURE", |
| 1169 | "ILLEGAL_CHAN_FREQ", |
| 1170 | "VCC_NOT_STABLE", |
| 1171 | "FH_ERROR", |
| 1172 | "NMI_INTERRUPT_HOST", |
| 1173 | "NMI_INTERRUPT_ACTION_PT", |
| 1174 | "NMI_INTERRUPT_UNKNOWN", |
| 1175 | "UCODE_VERSION_MISMATCH", |
| 1176 | "HW_ERROR_ABS_LOCK", |
| 1177 | "HW_ERROR_CAL_LOCK_FAIL", |
| 1178 | "NMI_INTERRUPT_INST_ACTION_PT", |
| 1179 | "NMI_INTERRUPT_DATA_ACTION_PT", |
| 1180 | "NMI_TRM_HW_ER", |
| 1181 | "NMI_INTERRUPT_TRM", |
| 1182 | "NMI_INTERRUPT_BREAK_POINT" |
| 1183 | "DEBUG_0", |
| 1184 | "DEBUG_1", |
| 1185 | "DEBUG_2", |
| 1186 | "DEBUG_3", |
| 1187 | "UNKNOWN" |
| 1188 | }; |
| 1189 | |
| 1190 | static const char *desc_lookup(int i) |
| 1191 | { |
| 1192 | int max = ARRAY_SIZE(desc_lookup_text) - 1; |
| 1193 | |
| 1194 | if (i < 0 || i > max) |
| 1195 | i = max; |
| 1196 | |
| 1197 | return desc_lookup_text[i]; |
| 1198 | } |
| 1199 | |
| 1200 | #define ERROR_START_OFFSET (1 * sizeof(u32)) |
| 1201 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) |
| 1202 | |
| 1203 | void iwl_dump_nic_error_log(struct iwl_priv *priv) |
| 1204 | { |
| 1205 | u32 data2, line; |
| 1206 | u32 desc, time, count, base, data1; |
| 1207 | u32 blink1, blink2, ilink1, ilink2; |
| 1208 | int ret; |
| 1209 | |
| 1210 | if (priv->ucode_type == UCODE_INIT) |
| 1211 | base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); |
| 1212 | else |
| 1213 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); |
| 1214 | |
| 1215 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
| 1216 | IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base); |
| 1217 | return; |
| 1218 | } |
| 1219 | |
| 1220 | ret = iwl_grab_nic_access(priv); |
| 1221 | if (ret) { |
| 1222 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
| 1223 | return; |
| 1224 | } |
| 1225 | |
| 1226 | count = iwl_read_targ_mem(priv, base); |
| 1227 | |
| 1228 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { |
| 1229 | IWL_ERR(priv, "Start IWL Error Log Dump:\n"); |
| 1230 | IWL_ERR(priv, "Status: 0x%08lX, count: %d\n", |
| 1231 | priv->status, count); |
| 1232 | } |
| 1233 | |
| 1234 | desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); |
| 1235 | blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32)); |
| 1236 | blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32)); |
| 1237 | ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32)); |
| 1238 | ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32)); |
| 1239 | data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32)); |
| 1240 | data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32)); |
| 1241 | line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); |
| 1242 | time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); |
| 1243 | |
| 1244 | IWL_ERR(priv, "Desc Time " |
| 1245 | "data1 data2 line\n"); |
| 1246 | IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n", |
| 1247 | desc_lookup(desc), desc, time, data1, data2, line); |
| 1248 | IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n"); |
| 1249 | IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, |
| 1250 | ilink1, ilink2); |
| 1251 | |
| 1252 | iwl_release_nic_access(priv); |
| 1253 | } |
| 1254 | EXPORT_SYMBOL(iwl_dump_nic_error_log); |
| 1255 | |
| 1256 | #define EVENT_START_OFFSET (4 * sizeof(u32)) |
| 1257 | |
| 1258 | /** |
| 1259 | * iwl_print_event_log - Dump error event log to syslog |
| 1260 | * |
| 1261 | * NOTE: Must be called with iwl_grab_nic_access() already obtained! |
| 1262 | */ |
| 1263 | static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, |
| 1264 | u32 num_events, u32 mode) |
| 1265 | { |
| 1266 | u32 i; |
| 1267 | u32 base; /* SRAM byte address of event log header */ |
| 1268 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ |
| 1269 | u32 ptr; /* SRAM byte address of log data */ |
| 1270 | u32 ev, time, data; /* event log data */ |
| 1271 | |
| 1272 | if (num_events == 0) |
| 1273 | return; |
| 1274 | if (priv->ucode_type == UCODE_INIT) |
| 1275 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); |
| 1276 | else |
| 1277 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
| 1278 | |
| 1279 | if (mode == 0) |
| 1280 | event_size = 2 * sizeof(u32); |
| 1281 | else |
| 1282 | event_size = 3 * sizeof(u32); |
| 1283 | |
| 1284 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); |
| 1285 | |
| 1286 | /* "time" is actually "data" for mode 0 (no timestamp). |
| 1287 | * place event id # at far right for easier visual parsing. */ |
| 1288 | for (i = 0; i < num_events; i++) { |
| 1289 | ev = iwl_read_targ_mem(priv, ptr); |
| 1290 | ptr += sizeof(u32); |
| 1291 | time = iwl_read_targ_mem(priv, ptr); |
| 1292 | ptr += sizeof(u32); |
| 1293 | if (mode == 0) { |
| 1294 | /* data, ev */ |
| 1295 | IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev); |
| 1296 | } else { |
| 1297 | data = iwl_read_targ_mem(priv, ptr); |
| 1298 | ptr += sizeof(u32); |
| 1299 | IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n", |
| 1300 | time, data, ev); |
| 1301 | } |
| 1302 | } |
| 1303 | } |
| 1304 | |
| 1305 | void iwl_dump_nic_event_log(struct iwl_priv *priv) |
| 1306 | { |
| 1307 | int ret; |
| 1308 | u32 base; /* SRAM byte address of event log header */ |
| 1309 | u32 capacity; /* event log capacity in # entries */ |
| 1310 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ |
| 1311 | u32 num_wraps; /* # times uCode wrapped to top of log */ |
| 1312 | u32 next_entry; /* index of next entry to be written by uCode */ |
| 1313 | u32 size; /* # entries that we'll print */ |
| 1314 | |
| 1315 | if (priv->ucode_type == UCODE_INIT) |
| 1316 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); |
| 1317 | else |
| 1318 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
| 1319 | |
| 1320 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
| 1321 | IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); |
| 1322 | return; |
| 1323 | } |
| 1324 | |
| 1325 | ret = iwl_grab_nic_access(priv); |
| 1326 | if (ret) { |
| 1327 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
| 1328 | return; |
| 1329 | } |
| 1330 | |
| 1331 | /* event log header */ |
| 1332 | capacity = iwl_read_targ_mem(priv, base); |
| 1333 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); |
| 1334 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); |
| 1335 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); |
| 1336 | |
| 1337 | size = num_wraps ? capacity : next_entry; |
| 1338 | |
| 1339 | /* bail out if nothing in log */ |
| 1340 | if (size == 0) { |
| 1341 | IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); |
| 1342 | iwl_release_nic_access(priv); |
| 1343 | return; |
| 1344 | } |
| 1345 | |
| 1346 | IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n", |
| 1347 | size, num_wraps); |
| 1348 | |
| 1349 | /* if uCode has wrapped back to top of log, start at the oldest entry, |
| 1350 | * i.e the next one that uCode would fill. */ |
| 1351 | if (num_wraps) |
| 1352 | iwl_print_event_log(priv, next_entry, |
| 1353 | capacity - next_entry, mode); |
| 1354 | /* (then/else) start at top of log */ |
| 1355 | iwl_print_event_log(priv, 0, next_entry, mode); |
| 1356 | |
| 1357 | iwl_release_nic_access(priv); |
| 1358 | } |
| 1359 | EXPORT_SYMBOL(iwl_dump_nic_event_log); |
| 1360 | |
| 1361 | void iwl_rf_kill_ct_config(struct iwl_priv *priv) |
| 1362 | { |
| 1363 | struct iwl_ct_kill_config cmd; |
| 1364 | unsigned long flags; |
| 1365 | int ret = 0; |
| 1366 | |
| 1367 | spin_lock_irqsave(&priv->lock, flags); |
| 1368 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
| 1369 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
| 1370 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1371 | |
| 1372 | cmd.critical_temperature_R = |
| 1373 | cpu_to_le32(priv->hw_params.ct_kill_threshold); |
| 1374 | |
| 1375 | ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD, |
| 1376 | sizeof(cmd), &cmd); |
| 1377 | if (ret) |
| 1378 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); |
| 1379 | else |
| 1380 | IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, " |
| 1381 | "critical temperature is %d\n", |
| 1382 | cmd.critical_temperature_R); |
| 1383 | } |
| 1384 | EXPORT_SYMBOL(iwl_rf_kill_ct_config); |
| 1385 | |
| 1386 | |
| 1387 | /* |
| 1388 | * CARD_STATE_CMD |
| 1389 | * |
| 1390 | * Use: Sets the device's internal card state to enable, disable, or halt |
| 1391 | * |
| 1392 | * When in the 'enable' state the card operates as normal. |
| 1393 | * When in the 'disable' state, the card enters into a low power mode. |
| 1394 | * When in the 'halt' state, the card is shut down and must be fully |
| 1395 | * restarted to come back on. |
| 1396 | */ |
| 1397 | int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
| 1398 | { |
| 1399 | struct iwl_host_cmd cmd = { |
| 1400 | .id = REPLY_CARD_STATE_CMD, |
| 1401 | .len = sizeof(u32), |
| 1402 | .data = &flags, |
| 1403 | .meta.flags = meta_flag, |
| 1404 | }; |
| 1405 | |
| 1406 | return iwl_send_cmd(priv, &cmd); |
| 1407 | } |
| 1408 | EXPORT_SYMBOL(iwl_send_card_state); |
| 1409 | |
| 1410 | void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv) |
| 1411 | { |
| 1412 | unsigned long flags; |
| 1413 | |
| 1414 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) |
| 1415 | return; |
| 1416 | |
| 1417 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO OFF\n"); |
| 1418 | |
| 1419 | iwl_scan_cancel(priv); |
| 1420 | /* FIXME: This is a workaround for AP */ |
| 1421 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
| 1422 | spin_lock_irqsave(&priv->lock, flags); |
| 1423 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
| 1424 | CSR_UCODE_SW_BIT_RFKILL); |
| 1425 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1426 | /* call the host command only if no hw rf-kill set */ |
| 1427 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status) && |
| 1428 | iwl_is_ready(priv)) |
| 1429 | iwl_send_card_state(priv, |
| 1430 | CARD_STATE_CMD_DISABLE, 0); |
| 1431 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
| 1432 | /* make sure mac80211 stop sending Tx frame */ |
| 1433 | if (priv->mac80211_registered) |
| 1434 | ieee80211_stop_queues(priv->hw); |
| 1435 | } |
| 1436 | } |
| 1437 | EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio); |
| 1438 | |
| 1439 | int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv) |
| 1440 | { |
| 1441 | unsigned long flags; |
| 1442 | |
| 1443 | if (!test_bit(STATUS_RF_KILL_SW, &priv->status)) |
| 1444 | return 0; |
| 1445 | |
| 1446 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO ON\n"); |
| 1447 | |
| 1448 | spin_lock_irqsave(&priv->lock, flags); |
| 1449 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
| 1450 | |
| 1451 | /* If the driver is up it will receive CARD_STATE_NOTIFICATION |
| 1452 | * notification where it will clear SW rfkill status. |
| 1453 | * Setting it here would break the handler. Only if the |
| 1454 | * interface is down we can set here since we don't |
| 1455 | * receive any further notification. |
| 1456 | */ |
| 1457 | if (!priv->is_open) |
| 1458 | clear_bit(STATUS_RF_KILL_SW, &priv->status); |
| 1459 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1460 | |
| 1461 | /* wake up ucode */ |
| 1462 | msleep(10); |
| 1463 | |
| 1464 | spin_lock_irqsave(&priv->lock, flags); |
| 1465 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
| 1466 | if (!iwl_grab_nic_access(priv)) |
| 1467 | iwl_release_nic_access(priv); |
| 1468 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1469 | |
| 1470 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { |
| 1471 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " |
| 1472 | "disabled by HW switch\n"); |
| 1473 | return 0; |
| 1474 | } |
| 1475 | |
| 1476 | /* when driver is up while rfkill is on, it wont receive |
| 1477 | * any CARD_STATE_NOTIFICATION notifications so we have to |
| 1478 | * restart it in here |
| 1479 | */ |
| 1480 | if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) { |
| 1481 | clear_bit(STATUS_RF_KILL_SW, &priv->status); |
| 1482 | if (!iwl_is_rfkill(priv)) |
| 1483 | queue_work(priv->workqueue, &priv->up); |
| 1484 | } |
| 1485 | |
| 1486 | /* If the driver is already loaded, it will receive |
| 1487 | * CARD_STATE_NOTIFICATION notifications and the handler will |
| 1488 | * call restart to reload the driver. |
| 1489 | */ |
| 1490 | return 1; |
| 1491 | } |
| 1492 | EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio); |
| 1493 | |
| 1494 | void iwl_bg_rf_kill(struct work_struct *work) |
| 1495 | { |
| 1496 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
| 1497 | |
| 1498 | wake_up_interruptible(&priv->wait_command_queue); |
| 1499 | |
| 1500 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
| 1501 | return; |
| 1502 | |
| 1503 | mutex_lock(&priv->mutex); |
| 1504 | |
| 1505 | if (!iwl_is_rfkill(priv)) { |
| 1506 | IWL_DEBUG(IWL_DL_RF_KILL, |
| 1507 | "HW and/or SW RF Kill no longer active, restarting " |
| 1508 | "device\n"); |
| 1509 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status) && |
| 1510 | test_bit(STATUS_ALIVE, &priv->status)) |
| 1511 | queue_work(priv->workqueue, &priv->restart); |
| 1512 | } else { |
| 1513 | /* make sure mac80211 stop sending Tx frame */ |
| 1514 | if (priv->mac80211_registered) |
| 1515 | ieee80211_stop_queues(priv->hw); |
| 1516 | |
| 1517 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) |
| 1518 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " |
| 1519 | "disabled by SW switch\n"); |
| 1520 | else |
| 1521 | IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n" |
| 1522 | "Kill switch must be turned off for " |
| 1523 | "wireless networking to work.\n"); |
| 1524 | } |
| 1525 | mutex_unlock(&priv->mutex); |
| 1526 | iwl_rfkill_set_hw_state(priv); |
| 1527 | } |
| 1528 | EXPORT_SYMBOL(iwl_bg_rf_kill); |