| 1 | /****************************************************************************** |
| 2 | * |
| 3 | * Copyright(c) 2009-2012 Realtek Corporation. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of version 2 of the GNU General Public License as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * The full GNU General Public License is included in this distribution in the |
| 15 | * file called LICENSE. |
| 16 | * |
| 17 | * Contact Information: |
| 18 | * wlanfae <wlanfae@realtek.com> |
| 19 | * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, |
| 20 | * Hsinchu 300, Taiwan. |
| 21 | * |
| 22 | * Larry Finger <Larry.Finger@lwfinger.net> |
| 23 | * |
| 24 | *****************************************************************************/ |
| 25 | #ifndef __HALBTC_OUT_SRC_H__ |
| 26 | #define __HALBTC_OUT_SRC_H__ |
| 27 | |
| 28 | #include "../wifi.h" |
| 29 | |
| 30 | #define NORMAL_EXEC false |
| 31 | #define FORCE_EXEC true |
| 32 | |
| 33 | #define BTC_RF_A RF90_PATH_A |
| 34 | #define BTC_RF_B RF90_PATH_B |
| 35 | #define BTC_RF_C RF90_PATH_C |
| 36 | #define BTC_RF_D RF90_PATH_D |
| 37 | |
| 38 | #define BTC_SMSP SINGLEMAC_SINGLEPHY |
| 39 | #define BTC_DMDP DUALMAC_DUALPHY |
| 40 | #define BTC_DMSP DUALMAC_SINGLEPHY |
| 41 | #define BTC_MP_UNKNOWN 0xff |
| 42 | |
| 43 | #define IN |
| 44 | #define OUT |
| 45 | |
| 46 | #define BT_TMP_BUF_SIZE 100 |
| 47 | |
| 48 | #define BT_COEX_ANT_TYPE_PG 0 |
| 49 | #define BT_COEX_ANT_TYPE_ANTDIV 1 |
| 50 | #define BT_COEX_ANT_TYPE_DETECTED 2 |
| 51 | |
| 52 | #define BTC_MIMO_PS_STATIC 0 |
| 53 | #define BTC_MIMO_PS_DYNAMIC 1 |
| 54 | |
| 55 | #define BTC_RATE_DISABLE 0 |
| 56 | #define BTC_RATE_ENABLE 1 |
| 57 | |
| 58 | /* single Antenna definition */ |
| 59 | #define BTC_ANT_PATH_WIFI 0 |
| 60 | #define BTC_ANT_PATH_BT 1 |
| 61 | #define BTC_ANT_PATH_PTA 2 |
| 62 | /* dual Antenna definition */ |
| 63 | #define BTC_ANT_WIFI_AT_MAIN 0 |
| 64 | #define BTC_ANT_WIFI_AT_AUX 1 |
| 65 | /* coupler Antenna definition */ |
| 66 | #define BTC_ANT_WIFI_AT_CPL_MAIN 0 |
| 67 | #define BTC_ANT_WIFI_AT_CPL_AUX 1 |
| 68 | |
| 69 | enum btc_chip_interface { |
| 70 | BTC_INTF_UNKNOWN = 0, |
| 71 | BTC_INTF_PCI = 1, |
| 72 | BTC_INTF_USB = 2, |
| 73 | BTC_INTF_SDIO = 3, |
| 74 | BTC_INTF_GSPI = 4, |
| 75 | BTC_INTF_MAX |
| 76 | }; |
| 77 | |
| 78 | enum btc_chip_type { |
| 79 | BTC_CHIP_UNDEF = 0, |
| 80 | BTC_CHIP_CSR_BC4 = 1, |
| 81 | BTC_CHIP_CSR_BC8 = 2, |
| 82 | BTC_CHIP_RTL8723A = 3, |
| 83 | BTC_CHIP_RTL8821 = 4, |
| 84 | BTC_CHIP_RTL8723B = 5, |
| 85 | BTC_CHIP_MAX |
| 86 | }; |
| 87 | |
| 88 | enum btc_msg_type { |
| 89 | BTC_MSG_INTERFACE = 0x0, |
| 90 | BTC_MSG_ALGORITHM = 0x1, |
| 91 | BTC_MSG_MAX |
| 92 | }; |
| 93 | |
| 94 | extern u32 btc_dbg_type[]; |
| 95 | |
| 96 | /* following is for BTC_MSG_INTERFACE */ |
| 97 | #define INTF_INIT BIT0 |
| 98 | #define INTF_NOTIFY BIT2 |
| 99 | |
| 100 | /* following is for BTC_ALGORITHM */ |
| 101 | #define ALGO_BT_RSSI_STATE BIT0 |
| 102 | #define ALGO_WIFI_RSSI_STATE BIT1 |
| 103 | #define ALGO_BT_MONITOR BIT2 |
| 104 | #define ALGO_TRACE BIT3 |
| 105 | #define ALGO_TRACE_FW BIT4 |
| 106 | #define ALGO_TRACE_FW_DETAIL BIT5 |
| 107 | #define ALGO_TRACE_FW_EXEC BIT6 |
| 108 | #define ALGO_TRACE_SW BIT7 |
| 109 | #define ALGO_TRACE_SW_DETAIL BIT8 |
| 110 | #define ALGO_TRACE_SW_EXEC BIT9 |
| 111 | |
| 112 | /* following is for wifi link status */ |
| 113 | #define WIFI_STA_CONNECTED BIT0 |
| 114 | #define WIFI_AP_CONNECTED BIT1 |
| 115 | #define WIFI_HS_CONNECTED BIT2 |
| 116 | #define WIFI_P2P_GO_CONNECTED BIT3 |
| 117 | #define WIFI_P2P_GC_CONNECTED BIT4 |
| 118 | |
| 119 | #define btc_alg_dbg(dbgflag, fmt, ...) \ |
| 120 | do { \ |
| 121 | if (unlikely(btc_dbg_type[BTC_MSG_ALGORITHM] & dbgflag)) \ |
| 122 | printk(KERN_DEBUG fmt, ##__VA_ARGS__); \ |
| 123 | } while (0) |
| 124 | #define btc_iface_dbg(dbgflag, fmt, ...) \ |
| 125 | do { \ |
| 126 | if (unlikely(btc_dbg_type[BTC_MSG_INTERFACE] & dbgflag)) \ |
| 127 | printk(KERN_DEBUG fmt, ##__VA_ARGS__); \ |
| 128 | } while (0) |
| 129 | |
| 130 | |
| 131 | #define BTC_RSSI_HIGH(_rssi_) \ |
| 132 | ((_rssi_ == BTC_RSSI_STATE_HIGH || \ |
| 133 | _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false) |
| 134 | #define BTC_RSSI_MEDIUM(_rssi_) \ |
| 135 | ((_rssi_ == BTC_RSSI_STATE_MEDIUM || \ |
| 136 | _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false) |
| 137 | #define BTC_RSSI_LOW(_rssi_) \ |
| 138 | ((_rssi_ == BTC_RSSI_STATE_LOW || \ |
| 139 | _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false) |
| 140 | |
| 141 | enum btc_power_save_type { |
| 142 | BTC_PS_WIFI_NATIVE = 0, |
| 143 | BTC_PS_LPS_ON = 1, |
| 144 | BTC_PS_LPS_OFF = 2, |
| 145 | BTC_PS_LPS_MAX |
| 146 | }; |
| 147 | |
| 148 | struct btc_board_info { |
| 149 | /* The following is some board information */ |
| 150 | u8 bt_chip_type; |
| 151 | u8 pg_ant_num; /* pg ant number */ |
| 152 | u8 btdm_ant_num; /* ant number for btdm */ |
| 153 | u8 btdm_ant_pos; |
| 154 | bool bt_exist; |
| 155 | }; |
| 156 | |
| 157 | enum btc_dbg_opcode { |
| 158 | BTC_DBG_SET_COEX_NORMAL = 0x0, |
| 159 | BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, |
| 160 | BTC_DBG_SET_COEX_BT_ONLY = 0x2, |
| 161 | BTC_DBG_MAX |
| 162 | }; |
| 163 | |
| 164 | enum btc_rssi_state { |
| 165 | BTC_RSSI_STATE_HIGH = 0x0, |
| 166 | BTC_RSSI_STATE_MEDIUM = 0x1, |
| 167 | BTC_RSSI_STATE_LOW = 0x2, |
| 168 | BTC_RSSI_STATE_STAY_HIGH = 0x3, |
| 169 | BTC_RSSI_STATE_STAY_MEDIUM = 0x4, |
| 170 | BTC_RSSI_STATE_STAY_LOW = 0x5, |
| 171 | BTC_RSSI_MAX |
| 172 | }; |
| 173 | |
| 174 | enum btc_wifi_role { |
| 175 | BTC_ROLE_STATION = 0x0, |
| 176 | BTC_ROLE_AP = 0x1, |
| 177 | BTC_ROLE_IBSS = 0x2, |
| 178 | BTC_ROLE_HS_MODE = 0x3, |
| 179 | BTC_ROLE_MAX |
| 180 | }; |
| 181 | |
| 182 | enum btc_wifi_bw_mode { |
| 183 | BTC_WIFI_BW_LEGACY = 0x0, |
| 184 | BTC_WIFI_BW_HT20 = 0x1, |
| 185 | BTC_WIFI_BW_HT40 = 0x2, |
| 186 | BTC_WIFI_BW_MAX |
| 187 | }; |
| 188 | |
| 189 | enum btc_wifi_traffic_dir { |
| 190 | BTC_WIFI_TRAFFIC_TX = 0x0, |
| 191 | BTC_WIFI_TRAFFIC_RX = 0x1, |
| 192 | BTC_WIFI_TRAFFIC_MAX |
| 193 | }; |
| 194 | |
| 195 | enum btc_wifi_pnp { |
| 196 | BTC_WIFI_PNP_WAKE_UP = 0x0, |
| 197 | BTC_WIFI_PNP_SLEEP = 0x1, |
| 198 | BTC_WIFI_PNP_MAX |
| 199 | }; |
| 200 | |
| 201 | enum btc_get_type { |
| 202 | /* type bool */ |
| 203 | BTC_GET_BL_HS_OPERATION, |
| 204 | BTC_GET_BL_HS_CONNECTING, |
| 205 | BTC_GET_BL_WIFI_CONNECTED, |
| 206 | BTC_GET_BL_WIFI_BUSY, |
| 207 | BTC_GET_BL_WIFI_SCAN, |
| 208 | BTC_GET_BL_WIFI_LINK, |
| 209 | BTC_GET_BL_WIFI_DHCP, |
| 210 | BTC_GET_BL_WIFI_SOFTAP_IDLE, |
| 211 | BTC_GET_BL_WIFI_SOFTAP_LINKING, |
| 212 | BTC_GET_BL_WIFI_IN_EARLY_SUSPEND, |
| 213 | BTC_GET_BL_WIFI_ROAM, |
| 214 | BTC_GET_BL_WIFI_4_WAY_PROGRESS, |
| 215 | BTC_GET_BL_WIFI_UNDER_5G, |
| 216 | BTC_GET_BL_WIFI_AP_MODE_ENABLE, |
| 217 | BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, |
| 218 | BTC_GET_BL_WIFI_UNDER_B_MODE, |
| 219 | BTC_GET_BL_EXT_SWITCH, |
| 220 | |
| 221 | /* type s4Byte */ |
| 222 | BTC_GET_S4_WIFI_RSSI, |
| 223 | BTC_GET_S4_HS_RSSI, |
| 224 | |
| 225 | /* type u32 */ |
| 226 | BTC_GET_U4_WIFI_BW, |
| 227 | BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, |
| 228 | BTC_GET_U4_WIFI_FW_VER, |
| 229 | BTC_GET_U4_WIFI_LINK_STATUS, |
| 230 | BTC_GET_U4_BT_PATCH_VER, |
| 231 | |
| 232 | /* type u1Byte */ |
| 233 | BTC_GET_U1_WIFI_DOT11_CHNL, |
| 234 | BTC_GET_U1_WIFI_CENTRAL_CHNL, |
| 235 | BTC_GET_U1_WIFI_HS_CHNL, |
| 236 | BTC_GET_U1_MAC_PHY_MODE, |
| 237 | BTC_GET_U1_AP_NUM, |
| 238 | |
| 239 | /* for 1Ant */ |
| 240 | BTC_GET_U1_LPS_MODE, |
| 241 | BTC_GET_BL_BT_SCO_BUSY, |
| 242 | |
| 243 | /* for test mode */ |
| 244 | BTC_GET_DRIVER_TEST_CFG, |
| 245 | BTC_GET_MAX |
| 246 | }; |
| 247 | |
| 248 | enum btc_set_type { |
| 249 | /* type bool */ |
| 250 | BTC_SET_BL_BT_DISABLE, |
| 251 | BTC_SET_BL_BT_TRAFFIC_BUSY, |
| 252 | BTC_SET_BL_BT_LIMITED_DIG, |
| 253 | BTC_SET_BL_FORCE_TO_ROAM, |
| 254 | BTC_SET_BL_TO_REJ_AP_AGG_PKT, |
| 255 | BTC_SET_BL_BT_CTRL_AGG_SIZE, |
| 256 | BTC_SET_BL_INC_SCAN_DEV_NUM, |
| 257 | |
| 258 | /* type u1Byte */ |
| 259 | BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, |
| 260 | BTC_SET_UI_SCAN_SIG_COMPENSATION, |
| 261 | BTC_SET_U1_AGG_BUF_SIZE, |
| 262 | |
| 263 | /* type trigger some action */ |
| 264 | BTC_SET_ACT_GET_BT_RSSI, |
| 265 | BTC_SET_ACT_AGGREGATE_CTRL, |
| 266 | |
| 267 | /********* for 1Ant **********/ |
| 268 | /* type bool */ |
| 269 | BTC_SET_BL_BT_SCO_BUSY, |
| 270 | /* type u1Byte */ |
| 271 | BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, |
| 272 | BTC_SET_U1_LPS_VAL, |
| 273 | BTC_SET_U1_RPWM_VAL, |
| 274 | BTC_SET_U1_1ANT_LPS, |
| 275 | BTC_SET_U1_1ANT_RPWM, |
| 276 | /* type trigger some action */ |
| 277 | BTC_SET_ACT_LEAVE_LPS, |
| 278 | BTC_SET_ACT_ENTER_LPS, |
| 279 | BTC_SET_ACT_NORMAL_LPS, |
| 280 | BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT, |
| 281 | BTC_SET_ACT_DISABLE_LOW_POWER, |
| 282 | BTC_SET_ACT_UPDATE_ra_mask, |
| 283 | BTC_SET_ACT_SEND_MIMO_PS, |
| 284 | /* BT Coex related */ |
| 285 | BTC_SET_ACT_CTRL_BT_INFO, |
| 286 | BTC_SET_ACT_CTRL_BT_COEX, |
| 287 | /***************************/ |
| 288 | BTC_SET_MAX |
| 289 | }; |
| 290 | |
| 291 | enum btc_dbg_disp_type { |
| 292 | BTC_DBG_DISP_COEX_STATISTICS = 0x0, |
| 293 | BTC_DBG_DISP_BT_LINK_INFO = 0x1, |
| 294 | BTC_DBG_DISP_BT_FW_VER = 0x2, |
| 295 | BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3, |
| 296 | BTC_DBG_DISP_MAX |
| 297 | }; |
| 298 | |
| 299 | enum btc_notify_type_ips { |
| 300 | BTC_IPS_LEAVE = 0x0, |
| 301 | BTC_IPS_ENTER = 0x1, |
| 302 | BTC_IPS_MAX |
| 303 | }; |
| 304 | |
| 305 | enum btc_notify_type_lps { |
| 306 | BTC_LPS_DISABLE = 0x0, |
| 307 | BTC_LPS_ENABLE = 0x1, |
| 308 | BTC_LPS_MAX |
| 309 | }; |
| 310 | |
| 311 | enum btc_notify_type_scan { |
| 312 | BTC_SCAN_FINISH = 0x0, |
| 313 | BTC_SCAN_START = 0x1, |
| 314 | BTC_SCAN_MAX |
| 315 | }; |
| 316 | |
| 317 | enum btc_notify_type_associate { |
| 318 | BTC_ASSOCIATE_FINISH = 0x0, |
| 319 | BTC_ASSOCIATE_START = 0x1, |
| 320 | BTC_ASSOCIATE_MAX |
| 321 | }; |
| 322 | |
| 323 | enum btc_notify_type_media_status { |
| 324 | BTC_MEDIA_DISCONNECT = 0x0, |
| 325 | BTC_MEDIA_CONNECT = 0x1, |
| 326 | BTC_MEDIA_MAX |
| 327 | }; |
| 328 | |
| 329 | enum btc_notify_type_special_packet { |
| 330 | BTC_PACKET_UNKNOWN = 0x0, |
| 331 | BTC_PACKET_DHCP = 0x1, |
| 332 | BTC_PACKET_ARP = 0x2, |
| 333 | BTC_PACKET_EAPOL = 0x3, |
| 334 | BTC_PACKET_MAX |
| 335 | }; |
| 336 | |
| 337 | enum hci_ext_bt_operation { |
| 338 | HCI_BT_OP_NONE = 0x0, |
| 339 | HCI_BT_OP_INQUIRY_START = 0x1, |
| 340 | HCI_BT_OP_INQUIRY_FINISH = 0x2, |
| 341 | HCI_BT_OP_PAGING_START = 0x3, |
| 342 | HCI_BT_OP_PAGING_SUCCESS = 0x4, |
| 343 | HCI_BT_OP_PAGING_UNSUCCESS = 0x5, |
| 344 | HCI_BT_OP_PAIRING_START = 0x6, |
| 345 | HCI_BT_OP_PAIRING_FINISH = 0x7, |
| 346 | HCI_BT_OP_BT_DEV_ENABLE = 0x8, |
| 347 | HCI_BT_OP_BT_DEV_DISABLE = 0x9, |
| 348 | HCI_BT_OP_MAX |
| 349 | }; |
| 350 | |
| 351 | enum btc_notify_type_stack_operation { |
| 352 | BTC_STACK_OP_NONE = 0x0, |
| 353 | BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, |
| 354 | BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, |
| 355 | BTC_STACK_OP_MAX |
| 356 | }; |
| 357 | |
| 358 | typedef u8 (*bfp_btc_r1)(void *btc_context, u32 reg_addr); |
| 359 | |
| 360 | typedef u16 (*bfp_btc_r2)(void *btc_context, u32 reg_addr); |
| 361 | |
| 362 | typedef u32 (*bfp_btc_r4)(void *btc_context, u32 reg_addr); |
| 363 | |
| 364 | typedef void (*bfp_btc_w1)(void *btc_context, u32 reg_addr, u32 data); |
| 365 | |
| 366 | typedef void (*bfp_btc_w1_bit_mak)(void *btc_context, u32 reg_addr, |
| 367 | u32 bit_mask, u8 data1b); |
| 368 | |
| 369 | typedef void (*bfp_btc_w2)(void *btc_context, u32 reg_addr, u16 data); |
| 370 | |
| 371 | typedef void (*bfp_btc_w4)(void *btc_context, u32 reg_addr, u32 data); |
| 372 | |
| 373 | typedef void (*bfp_btc_wr_1byte_bit_mask)(void *btc_context, u32 reg_addr, |
| 374 | u8 bit_mask, u8 data); |
| 375 | |
| 376 | typedef void (*bfp_btc_set_bb_reg)(void *btc_context, u32 reg_addr, |
| 377 | u32 bit_mask, u32 data); |
| 378 | |
| 379 | typedef u32 (*bfp_btc_get_bb_reg)(void *btc_context, u32 reg_addr, |
| 380 | u32 bit_mask); |
| 381 | |
| 382 | typedef void (*bfp_btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr, |
| 383 | u32 bit_mask, u32 data); |
| 384 | |
| 385 | typedef u32 (*bfp_btc_get_rf_reg)(void *btc_context, u8 rf_path, |
| 386 | u32 reg_addr, u32 bit_mask); |
| 387 | |
| 388 | typedef void (*bfp_btc_fill_h2c)(void *btc_context, u8 element_id, |
| 389 | u32 cmd_len, u8 *cmd_buffer); |
| 390 | |
| 391 | typedef bool (*bfp_btc_get)(void *btcoexist, u8 get_type, void *out_buf); |
| 392 | |
| 393 | typedef bool (*bfp_btc_set)(void *btcoexist, u8 set_type, void *in_buf); |
| 394 | |
| 395 | typedef void (*bfp_btc_disp_dbg_msg)(void *btcoexist, u8 disp_type); |
| 396 | |
| 397 | struct btc_bt_info { |
| 398 | bool bt_disabled; |
| 399 | u8 rssi_adjust_for_agc_table_on; |
| 400 | u8 rssi_adjust_for_1ant_coex_type; |
| 401 | bool bt_busy; |
| 402 | u8 agg_buf_size; |
| 403 | bool limited_dig; |
| 404 | bool reject_agg_pkt; |
| 405 | bool bt_ctrl_buf_size; |
| 406 | bool increase_scan_dev_num; |
| 407 | u16 bt_hci_ver; |
| 408 | u16 bt_real_fw_ver; |
| 409 | u8 bt_fw_ver; |
| 410 | |
| 411 | bool bt_disable_low_pwr; |
| 412 | |
| 413 | /* the following is for 1Ant solution */ |
| 414 | bool bt_ctrl_lps; |
| 415 | bool bt_pwr_save_mode; |
| 416 | bool bt_lps_on; |
| 417 | bool force_to_roam; |
| 418 | u8 force_exec_pwr_cmd_cnt; |
| 419 | u8 lps_val; |
| 420 | u8 rpwm_val; |
| 421 | u32 ra_mask; |
| 422 | }; |
| 423 | |
| 424 | struct btc_stack_info { |
| 425 | bool profile_notified; |
| 426 | u16 hci_version; /* stack hci version */ |
| 427 | u8 num_of_link; |
| 428 | bool bt_link_exist; |
| 429 | bool sco_exist; |
| 430 | bool acl_exist; |
| 431 | bool a2dp_exist; |
| 432 | bool hid_exist; |
| 433 | u8 num_of_hid; |
| 434 | bool pan_exist; |
| 435 | bool unknown_acl_exist; |
| 436 | char min_bt_rssi; |
| 437 | }; |
| 438 | |
| 439 | struct btc_statistics { |
| 440 | u32 cnt_bind; |
| 441 | u32 cnt_init_hw_config; |
| 442 | u32 cnt_init_coex_dm; |
| 443 | u32 cnt_ips_notify; |
| 444 | u32 cnt_lps_notify; |
| 445 | u32 cnt_scan_notify; |
| 446 | u32 cnt_connect_notify; |
| 447 | u32 cnt_media_status_notify; |
| 448 | u32 cnt_special_packet_notify; |
| 449 | u32 cnt_bt_info_notify; |
| 450 | u32 cnt_periodical; |
| 451 | u32 cnt_coex_dm_switch; |
| 452 | u32 cnt_stack_operation_notify; |
| 453 | u32 cnt_dbg_ctrl; |
| 454 | }; |
| 455 | |
| 456 | struct btc_bt_link_info { |
| 457 | bool bt_link_exist; |
| 458 | bool sco_exist; |
| 459 | bool sco_only; |
| 460 | bool a2dp_exist; |
| 461 | bool a2dp_only; |
| 462 | bool hid_exist; |
| 463 | bool hid_only; |
| 464 | bool pan_exist; |
| 465 | bool pan_only; |
| 466 | }; |
| 467 | |
| 468 | enum btc_antenna_pos { |
| 469 | BTC_ANTENNA_AT_MAIN_PORT = 0x1, |
| 470 | BTC_ANTENNA_AT_AUX_PORT = 0x2, |
| 471 | }; |
| 472 | |
| 473 | struct btc_coexist { |
| 474 | /* make sure only one adapter can bind the data context */ |
| 475 | bool binded; |
| 476 | /* default adapter */ |
| 477 | void *adapter; |
| 478 | struct btc_board_info board_info; |
| 479 | /* some bt info referenced by non-bt module */ |
| 480 | struct btc_bt_info bt_info; |
| 481 | struct btc_stack_info stack_info; |
| 482 | enum btc_chip_interface chip_interface; |
| 483 | struct btc_bt_link_info bt_link_info; |
| 484 | |
| 485 | bool initilized; |
| 486 | bool stop_coex_dm; |
| 487 | bool manual_control; |
| 488 | struct btc_statistics statistics; |
| 489 | u8 pwr_mode_val[10]; |
| 490 | |
| 491 | /* function pointers - io related */ |
| 492 | bfp_btc_r1 btc_read_1byte; |
| 493 | bfp_btc_w1 btc_write_1byte; |
| 494 | bfp_btc_w1_bit_mak btc_write_1byte_bitmask; |
| 495 | bfp_btc_r2 btc_read_2byte; |
| 496 | bfp_btc_w2 btc_write_2byte; |
| 497 | bfp_btc_r4 btc_read_4byte; |
| 498 | bfp_btc_w4 btc_write_4byte; |
| 499 | |
| 500 | bfp_btc_set_bb_reg btc_set_bb_reg; |
| 501 | bfp_btc_get_bb_reg btc_get_bb_reg; |
| 502 | |
| 503 | bfp_btc_set_rf_reg btc_set_rf_reg; |
| 504 | bfp_btc_get_rf_reg btc_get_rf_reg; |
| 505 | |
| 506 | bfp_btc_fill_h2c btc_fill_h2c; |
| 507 | |
| 508 | bfp_btc_disp_dbg_msg btc_disp_dbg_msg; |
| 509 | |
| 510 | bfp_btc_get btc_get; |
| 511 | bfp_btc_set btc_set; |
| 512 | }; |
| 513 | |
| 514 | bool halbtc_is_wifi_uplink(struct rtl_priv *adapter); |
| 515 | |
| 516 | extern struct btc_coexist gl_bt_coexist; |
| 517 | |
| 518 | bool exhalbtc_initlize_variables(struct rtl_priv *adapter); |
| 519 | void exhalbtc_init_hw_config(struct btc_coexist *btcoexist); |
| 520 | void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist); |
| 521 | void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type); |
| 522 | void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type); |
| 523 | void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type); |
| 524 | void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action); |
| 525 | void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist, |
| 526 | enum rt_media_status media_status); |
| 527 | void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type); |
| 528 | void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf, |
| 529 | u8 length); |
| 530 | void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type); |
| 531 | void exhalbtc_halt_notify(struct btc_coexist *btcoexist); |
| 532 | void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state); |
| 533 | void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist); |
| 534 | void exhalbtc_periodical(struct btc_coexist *btcoexist); |
| 535 | void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len, |
| 536 | u8 *data); |
| 537 | void exhalbtc_stack_update_profile_info(void); |
| 538 | void exhalbtc_set_hci_version(u16 hci_version); |
| 539 | void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version); |
| 540 | void exhalbtc_update_min_bt_rssi(char bt_rssi); |
| 541 | void exhalbtc_set_bt_exist(bool bt_exist); |
| 542 | void exhalbtc_set_chip_type(u8 chip_type); |
| 543 | void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num); |
| 544 | void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist); |
| 545 | void exhalbtc_signal_compensation(struct btc_coexist *btcoexist, |
| 546 | u8 *rssi_wifi, u8 *rssi_bt); |
| 547 | void exhalbtc_lps_leave(struct btc_coexist *btcoexist); |
| 548 | void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist); |
| 549 | |
| 550 | #endif |