| 1 | /* |
| 2 | * File: portdrv_pci.c |
| 3 | * Purpose: PCI Express Port Bus Driver |
| 4 | * |
| 5 | * Copyright (C) 2004 Intel |
| 6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 7 | */ |
| 8 | |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/pci.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/pm.h> |
| 14 | #include <linux/pm_runtime.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/pcieport_if.h> |
| 17 | #include <linux/aer.h> |
| 18 | #include <linux/dmi.h> |
| 19 | #include <linux/pci-aspm.h> |
| 20 | |
| 21 | #include "portdrv.h" |
| 22 | #include "aer/aerdrv.h" |
| 23 | |
| 24 | /* |
| 25 | * Version Information |
| 26 | */ |
| 27 | #define DRIVER_VERSION "v1.0" |
| 28 | #define DRIVER_AUTHOR "tom.l.nguyen@intel.com" |
| 29 | #define DRIVER_DESC "PCIe Port Bus Driver" |
| 30 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 31 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 32 | MODULE_LICENSE("GPL"); |
| 33 | |
| 34 | /* If this switch is set, PCIe port native services should not be enabled. */ |
| 35 | bool pcie_ports_disabled; |
| 36 | |
| 37 | /* |
| 38 | * If this switch is set, ACPI _OSC will be used to determine whether or not to |
| 39 | * enable PCIe port native services. |
| 40 | */ |
| 41 | bool pcie_ports_auto = true; |
| 42 | |
| 43 | static int __init pcie_port_setup(char *str) |
| 44 | { |
| 45 | if (!strncmp(str, "compat", 6)) { |
| 46 | pcie_ports_disabled = true; |
| 47 | } else if (!strncmp(str, "native", 6)) { |
| 48 | pcie_ports_disabled = false; |
| 49 | pcie_ports_auto = false; |
| 50 | } else if (!strncmp(str, "auto", 4)) { |
| 51 | pcie_ports_disabled = false; |
| 52 | pcie_ports_auto = true; |
| 53 | } |
| 54 | |
| 55 | return 1; |
| 56 | } |
| 57 | __setup("pcie_ports=", pcie_port_setup); |
| 58 | |
| 59 | /* global data */ |
| 60 | |
| 61 | /** |
| 62 | * pcie_clear_root_pme_status - Clear root port PME interrupt status. |
| 63 | * @dev: PCIe root port or event collector. |
| 64 | */ |
| 65 | void pcie_clear_root_pme_status(struct pci_dev *dev) |
| 66 | { |
| 67 | pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME); |
| 68 | } |
| 69 | |
| 70 | static int pcie_portdrv_restore_config(struct pci_dev *dev) |
| 71 | { |
| 72 | int retval; |
| 73 | |
| 74 | retval = pci_enable_device(dev); |
| 75 | if (retval) |
| 76 | return retval; |
| 77 | pci_set_master(dev); |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | #ifdef CONFIG_PM |
| 82 | static int pcie_port_resume_noirq(struct device *dev) |
| 83 | { |
| 84 | struct pci_dev *pdev = to_pci_dev(dev); |
| 85 | |
| 86 | /* |
| 87 | * Some BIOSes forget to clear Root PME Status bits after system wakeup |
| 88 | * which breaks ACPI-based runtime wakeup on PCI Express, so clear those |
| 89 | * bits now just in case (shouldn't hurt). |
| 90 | */ |
| 91 | if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) |
| 92 | pcie_clear_root_pme_status(pdev); |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | static int pcie_port_runtime_suspend(struct device *dev) |
| 97 | { |
| 98 | return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY; |
| 99 | } |
| 100 | |
| 101 | static int pcie_port_runtime_resume(struct device *dev) |
| 102 | { |
| 103 | return 0; |
| 104 | } |
| 105 | |
| 106 | static int pcie_port_runtime_idle(struct device *dev) |
| 107 | { |
| 108 | /* |
| 109 | * Assume the PCI core has set bridge_d3 whenever it thinks the port |
| 110 | * should be good to go to D3. Everything else, including moving |
| 111 | * the port to D3, is handled by the PCI core. |
| 112 | */ |
| 113 | return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY; |
| 114 | } |
| 115 | |
| 116 | static const struct dev_pm_ops pcie_portdrv_pm_ops = { |
| 117 | .suspend = pcie_port_device_suspend, |
| 118 | .resume = pcie_port_device_resume, |
| 119 | .freeze = pcie_port_device_suspend, |
| 120 | .thaw = pcie_port_device_resume, |
| 121 | .poweroff = pcie_port_device_suspend, |
| 122 | .restore = pcie_port_device_resume, |
| 123 | .resume_noirq = pcie_port_resume_noirq, |
| 124 | .runtime_suspend = pcie_port_runtime_suspend, |
| 125 | .runtime_resume = pcie_port_runtime_resume, |
| 126 | .runtime_idle = pcie_port_runtime_idle, |
| 127 | }; |
| 128 | |
| 129 | #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops) |
| 130 | |
| 131 | #else /* !PM */ |
| 132 | |
| 133 | #define PCIE_PORTDRV_PM_OPS NULL |
| 134 | #endif /* !PM */ |
| 135 | |
| 136 | /* |
| 137 | * pcie_portdrv_probe - Probe PCI-Express port devices |
| 138 | * @dev: PCI-Express port device being probed |
| 139 | * |
| 140 | * If detected invokes the pcie_port_device_register() method for |
| 141 | * this port device. |
| 142 | * |
| 143 | */ |
| 144 | static int pcie_portdrv_probe(struct pci_dev *dev, |
| 145 | const struct pci_device_id *id) |
| 146 | { |
| 147 | int status; |
| 148 | |
| 149 | if (!pci_is_pcie(dev) || |
| 150 | ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && |
| 151 | (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && |
| 152 | (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) |
| 153 | return -ENODEV; |
| 154 | |
| 155 | status = pcie_port_device_register(dev); |
| 156 | if (status) |
| 157 | return status; |
| 158 | |
| 159 | pci_save_state(dev); |
| 160 | |
| 161 | /* |
| 162 | * Prevent runtime PM if the port is advertising support for PCIe |
| 163 | * hotplug. Otherwise the BIOS hotplug SMI code might not be able |
| 164 | * to enumerate devices behind this port properly (the port is |
| 165 | * powered down preventing all config space accesses to the |
| 166 | * subordinate devices). We can't be sure for native PCIe hotplug |
| 167 | * either so prevent that as well. |
| 168 | */ |
| 169 | if (!dev->is_hotplug_bridge) { |
| 170 | /* |
| 171 | * Keep the port resumed 100ms to make sure things like |
| 172 | * config space accesses from userspace (lspci) will not |
| 173 | * cause the port to repeatedly suspend and resume. |
| 174 | */ |
| 175 | pm_runtime_set_autosuspend_delay(&dev->dev, 100); |
| 176 | pm_runtime_use_autosuspend(&dev->dev); |
| 177 | pm_runtime_mark_last_busy(&dev->dev); |
| 178 | pm_runtime_put_autosuspend(&dev->dev); |
| 179 | pm_runtime_allow(&dev->dev); |
| 180 | } |
| 181 | |
| 182 | return 0; |
| 183 | } |
| 184 | |
| 185 | static void pcie_portdrv_remove(struct pci_dev *dev) |
| 186 | { |
| 187 | if (!dev->is_hotplug_bridge) { |
| 188 | pm_runtime_forbid(&dev->dev); |
| 189 | pm_runtime_get_noresume(&dev->dev); |
| 190 | pm_runtime_dont_use_autosuspend(&dev->dev); |
| 191 | } |
| 192 | |
| 193 | pcie_port_device_remove(dev); |
| 194 | } |
| 195 | |
| 196 | static int error_detected_iter(struct device *device, void *data) |
| 197 | { |
| 198 | struct pcie_device *pcie_device; |
| 199 | struct pcie_port_service_driver *driver; |
| 200 | struct aer_broadcast_data *result_data; |
| 201 | pci_ers_result_t status; |
| 202 | |
| 203 | result_data = (struct aer_broadcast_data *) data; |
| 204 | |
| 205 | if (device->bus == &pcie_port_bus_type && device->driver) { |
| 206 | driver = to_service_driver(device->driver); |
| 207 | if (!driver || |
| 208 | !driver->err_handler || |
| 209 | !driver->err_handler->error_detected) |
| 210 | return 0; |
| 211 | |
| 212 | pcie_device = to_pcie_device(device); |
| 213 | |
| 214 | /* Forward error detected message to service drivers */ |
| 215 | status = driver->err_handler->error_detected( |
| 216 | pcie_device->port, |
| 217 | result_data->state); |
| 218 | result_data->result = |
| 219 | merge_result(result_data->result, status); |
| 220 | } |
| 221 | |
| 222 | return 0; |
| 223 | } |
| 224 | |
| 225 | static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev, |
| 226 | enum pci_channel_state error) |
| 227 | { |
| 228 | struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER}; |
| 229 | |
| 230 | /* get true return value from &data */ |
| 231 | device_for_each_child(&dev->dev, &data, error_detected_iter); |
| 232 | return data.result; |
| 233 | } |
| 234 | |
| 235 | static int mmio_enabled_iter(struct device *device, void *data) |
| 236 | { |
| 237 | struct pcie_device *pcie_device; |
| 238 | struct pcie_port_service_driver *driver; |
| 239 | pci_ers_result_t status, *result; |
| 240 | |
| 241 | result = (pci_ers_result_t *) data; |
| 242 | |
| 243 | if (device->bus == &pcie_port_bus_type && device->driver) { |
| 244 | driver = to_service_driver(device->driver); |
| 245 | if (driver && |
| 246 | driver->err_handler && |
| 247 | driver->err_handler->mmio_enabled) { |
| 248 | pcie_device = to_pcie_device(device); |
| 249 | |
| 250 | /* Forward error message to service drivers */ |
| 251 | status = driver->err_handler->mmio_enabled( |
| 252 | pcie_device->port); |
| 253 | *result = merge_result(*result, status); |
| 254 | } |
| 255 | } |
| 256 | |
| 257 | return 0; |
| 258 | } |
| 259 | |
| 260 | static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev) |
| 261 | { |
| 262 | pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; |
| 263 | |
| 264 | /* get true return value from &status */ |
| 265 | device_for_each_child(&dev->dev, &status, mmio_enabled_iter); |
| 266 | return status; |
| 267 | } |
| 268 | |
| 269 | static int slot_reset_iter(struct device *device, void *data) |
| 270 | { |
| 271 | struct pcie_device *pcie_device; |
| 272 | struct pcie_port_service_driver *driver; |
| 273 | pci_ers_result_t status, *result; |
| 274 | |
| 275 | result = (pci_ers_result_t *) data; |
| 276 | |
| 277 | if (device->bus == &pcie_port_bus_type && device->driver) { |
| 278 | driver = to_service_driver(device->driver); |
| 279 | if (driver && |
| 280 | driver->err_handler && |
| 281 | driver->err_handler->slot_reset) { |
| 282 | pcie_device = to_pcie_device(device); |
| 283 | |
| 284 | /* Forward error message to service drivers */ |
| 285 | status = driver->err_handler->slot_reset( |
| 286 | pcie_device->port); |
| 287 | *result = merge_result(*result, status); |
| 288 | } |
| 289 | } |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
| 294 | static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev) |
| 295 | { |
| 296 | pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; |
| 297 | |
| 298 | /* If fatal, restore cfg space for possible link reset at upstream */ |
| 299 | if (dev->error_state == pci_channel_io_frozen) { |
| 300 | dev->state_saved = true; |
| 301 | pci_restore_state(dev); |
| 302 | pcie_portdrv_restore_config(dev); |
| 303 | pci_enable_pcie_error_reporting(dev); |
| 304 | } |
| 305 | |
| 306 | /* get true return value from &status */ |
| 307 | device_for_each_child(&dev->dev, &status, slot_reset_iter); |
| 308 | return status; |
| 309 | } |
| 310 | |
| 311 | static int resume_iter(struct device *device, void *data) |
| 312 | { |
| 313 | struct pcie_device *pcie_device; |
| 314 | struct pcie_port_service_driver *driver; |
| 315 | |
| 316 | if (device->bus == &pcie_port_bus_type && device->driver) { |
| 317 | driver = to_service_driver(device->driver); |
| 318 | if (driver && |
| 319 | driver->err_handler && |
| 320 | driver->err_handler->resume) { |
| 321 | pcie_device = to_pcie_device(device); |
| 322 | |
| 323 | /* Forward error message to service drivers */ |
| 324 | driver->err_handler->resume(pcie_device->port); |
| 325 | } |
| 326 | } |
| 327 | |
| 328 | return 0; |
| 329 | } |
| 330 | |
| 331 | static void pcie_portdrv_err_resume(struct pci_dev *dev) |
| 332 | { |
| 333 | device_for_each_child(&dev->dev, NULL, resume_iter); |
| 334 | } |
| 335 | |
| 336 | /* |
| 337 | * LINUX Device Driver Model |
| 338 | */ |
| 339 | static const struct pci_device_id port_pci_ids[] = { { |
| 340 | /* handle any PCI-Express port */ |
| 341 | PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0), |
| 342 | }, { /* end: all zeroes */ } |
| 343 | }; |
| 344 | MODULE_DEVICE_TABLE(pci, port_pci_ids); |
| 345 | |
| 346 | static const struct pci_error_handlers pcie_portdrv_err_handler = { |
| 347 | .error_detected = pcie_portdrv_error_detected, |
| 348 | .mmio_enabled = pcie_portdrv_mmio_enabled, |
| 349 | .slot_reset = pcie_portdrv_slot_reset, |
| 350 | .resume = pcie_portdrv_err_resume, |
| 351 | }; |
| 352 | |
| 353 | static struct pci_driver pcie_portdriver = { |
| 354 | .name = "pcieport", |
| 355 | .id_table = &port_pci_ids[0], |
| 356 | |
| 357 | .probe = pcie_portdrv_probe, |
| 358 | .remove = pcie_portdrv_remove, |
| 359 | |
| 360 | .err_handler = &pcie_portdrv_err_handler, |
| 361 | |
| 362 | .driver.pm = PCIE_PORTDRV_PM_OPS, |
| 363 | }; |
| 364 | |
| 365 | static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d) |
| 366 | { |
| 367 | pr_notice("%s detected: will not use MSI for PCIe PME signaling\n", |
| 368 | d->ident); |
| 369 | pcie_pme_disable_msi(); |
| 370 | return 0; |
| 371 | } |
| 372 | |
| 373 | static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = { |
| 374 | /* |
| 375 | * Boxes that should not use MSI for PCIe PME signaling. |
| 376 | */ |
| 377 | { |
| 378 | .callback = dmi_pcie_pme_disable_msi, |
| 379 | .ident = "MSI Wind U-100", |
| 380 | .matches = { |
| 381 | DMI_MATCH(DMI_SYS_VENDOR, |
| 382 | "MICRO-STAR INTERNATIONAL CO., LTD"), |
| 383 | DMI_MATCH(DMI_PRODUCT_NAME, "U-100"), |
| 384 | }, |
| 385 | }, |
| 386 | {} |
| 387 | }; |
| 388 | |
| 389 | static int __init pcie_portdrv_init(void) |
| 390 | { |
| 391 | int retval; |
| 392 | |
| 393 | if (pcie_ports_disabled) |
| 394 | return pci_register_driver(&pcie_portdriver); |
| 395 | |
| 396 | dmi_check_system(pcie_portdrv_dmi_table); |
| 397 | |
| 398 | retval = pcie_port_bus_register(); |
| 399 | if (retval) { |
| 400 | printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval); |
| 401 | goto out; |
| 402 | } |
| 403 | retval = pci_register_driver(&pcie_portdriver); |
| 404 | if (retval) |
| 405 | pcie_port_bus_unregister(); |
| 406 | out: |
| 407 | return retval; |
| 408 | } |
| 409 | |
| 410 | module_init(pcie_portdrv_init); |