| 1 | /* |
| 2 | * Regulator driver for National Semiconductors LP3971 PMIC chip |
| 3 | * |
| 4 | * Copyright (C) 2009 Samsung Electronics |
| 5 | * Author: Marek Szyprowski <m.szyprowski@samsung.com> |
| 6 | * |
| 7 | * Based on wm8350.c |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <linux/bug.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/i2c.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/regulator/driver.h> |
| 21 | #include <linux/regulator/lp3971.h> |
| 22 | #include <linux/slab.h> |
| 23 | |
| 24 | struct lp3971 { |
| 25 | struct device *dev; |
| 26 | struct mutex io_lock; |
| 27 | struct i2c_client *i2c; |
| 28 | }; |
| 29 | |
| 30 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg); |
| 31 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val); |
| 32 | |
| 33 | #define LP3971_SYS_CONTROL1_REG 0x07 |
| 34 | |
| 35 | /* System control register 1 initial value, |
| 36 | bits 4 and 5 are EPROM programmable */ |
| 37 | #define SYS_CONTROL1_INIT_VAL 0x40 |
| 38 | #define SYS_CONTROL1_INIT_MASK 0xCF |
| 39 | |
| 40 | #define LP3971_BUCK_VOL_ENABLE_REG 0x10 |
| 41 | #define LP3971_BUCK_VOL_CHANGE_REG 0x20 |
| 42 | |
| 43 | /* Voltage control registers shift: |
| 44 | LP3971_BUCK1 -> 0 |
| 45 | LP3971_BUCK2 -> 4 |
| 46 | LP3971_BUCK3 -> 6 |
| 47 | */ |
| 48 | #define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01)) |
| 49 | #define BUCK_VOL_CHANGE_FLAG_GO 0x01 |
| 50 | #define BUCK_VOL_CHANGE_FLAG_TARGET 0x02 |
| 51 | #define BUCK_VOL_CHANGE_FLAG_MASK 0x03 |
| 52 | |
| 53 | #define LP3971_BUCK1_BASE 0x23 |
| 54 | #define LP3971_BUCK2_BASE 0x29 |
| 55 | #define LP3971_BUCK3_BASE 0x32 |
| 56 | |
| 57 | static const int buck_base_addr[] = { |
| 58 | LP3971_BUCK1_BASE, |
| 59 | LP3971_BUCK2_BASE, |
| 60 | LP3971_BUCK3_BASE, |
| 61 | }; |
| 62 | |
| 63 | #define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x]) |
| 64 | #define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1) |
| 65 | |
| 66 | static const unsigned int buck_voltage_map[] = { |
| 67 | 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, |
| 68 | 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, |
| 69 | 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000, |
| 70 | 3000000, 3300000, |
| 71 | }; |
| 72 | |
| 73 | #define BUCK_TARGET_VOL_MASK 0x3f |
| 74 | |
| 75 | #define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2) |
| 76 | |
| 77 | #define LP3971_LDO_ENABLE_REG 0x12 |
| 78 | #define LP3971_LDO_VOL_CONTR_BASE 0x39 |
| 79 | |
| 80 | /* Voltage control registers: |
| 81 | LP3971_LDO1 -> LP3971_LDO_VOL_CONTR_BASE + 0 |
| 82 | LP3971_LDO2 -> LP3971_LDO_VOL_CONTR_BASE + 0 |
| 83 | LP3971_LDO3 -> LP3971_LDO_VOL_CONTR_BASE + 1 |
| 84 | LP3971_LDO4 -> LP3971_LDO_VOL_CONTR_BASE + 1 |
| 85 | LP3971_LDO5 -> LP3971_LDO_VOL_CONTR_BASE + 2 |
| 86 | */ |
| 87 | #define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1)) |
| 88 | |
| 89 | /* Voltage control registers shift: |
| 90 | LP3971_LDO1 -> 0, LP3971_LDO2 -> 4 |
| 91 | LP3971_LDO3 -> 0, LP3971_LDO4 -> 4 |
| 92 | LP3971_LDO5 -> 0 |
| 93 | */ |
| 94 | #define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2) |
| 95 | #define LDO_VOL_CONTR_MASK 0x0f |
| 96 | |
| 97 | static const unsigned int ldo45_voltage_map[] = { |
| 98 | 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, |
| 99 | 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000, |
| 100 | }; |
| 101 | |
| 102 | static const unsigned int ldo123_voltage_map[] = { |
| 103 | 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, |
| 104 | 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, |
| 105 | }; |
| 106 | |
| 107 | #define LDO_VOL_MIN_IDX 0x00 |
| 108 | #define LDO_VOL_MAX_IDX 0x0f |
| 109 | |
| 110 | static int lp3971_ldo_is_enabled(struct regulator_dev *dev) |
| 111 | { |
| 112 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 113 | int ldo = rdev_get_id(dev) - LP3971_LDO1; |
| 114 | u16 mask = 1 << (1 + ldo); |
| 115 | u16 val; |
| 116 | |
| 117 | val = lp3971_reg_read(lp3971, LP3971_LDO_ENABLE_REG); |
| 118 | return (val & mask) != 0; |
| 119 | } |
| 120 | |
| 121 | static int lp3971_ldo_enable(struct regulator_dev *dev) |
| 122 | { |
| 123 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 124 | int ldo = rdev_get_id(dev) - LP3971_LDO1; |
| 125 | u16 mask = 1 << (1 + ldo); |
| 126 | |
| 127 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, mask); |
| 128 | } |
| 129 | |
| 130 | static int lp3971_ldo_disable(struct regulator_dev *dev) |
| 131 | { |
| 132 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 133 | int ldo = rdev_get_id(dev) - LP3971_LDO1; |
| 134 | u16 mask = 1 << (1 + ldo); |
| 135 | |
| 136 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, 0); |
| 137 | } |
| 138 | |
| 139 | static int lp3971_ldo_get_voltage_sel(struct regulator_dev *dev) |
| 140 | { |
| 141 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 142 | int ldo = rdev_get_id(dev) - LP3971_LDO1; |
| 143 | u16 val, reg; |
| 144 | |
| 145 | reg = lp3971_reg_read(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo)); |
| 146 | val = (reg >> LDO_VOL_CONTR_SHIFT(ldo)) & LDO_VOL_CONTR_MASK; |
| 147 | |
| 148 | return val; |
| 149 | } |
| 150 | |
| 151 | static int lp3971_ldo_set_voltage_sel(struct regulator_dev *dev, |
| 152 | unsigned int selector) |
| 153 | { |
| 154 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 155 | int ldo = rdev_get_id(dev) - LP3971_LDO1; |
| 156 | |
| 157 | return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo), |
| 158 | LDO_VOL_CONTR_MASK << LDO_VOL_CONTR_SHIFT(ldo), |
| 159 | selector << LDO_VOL_CONTR_SHIFT(ldo)); |
| 160 | } |
| 161 | |
| 162 | static struct regulator_ops lp3971_ldo_ops = { |
| 163 | .list_voltage = regulator_list_voltage_table, |
| 164 | .map_voltage = regulator_map_voltage_ascend, |
| 165 | .is_enabled = lp3971_ldo_is_enabled, |
| 166 | .enable = lp3971_ldo_enable, |
| 167 | .disable = lp3971_ldo_disable, |
| 168 | .get_voltage_sel = lp3971_ldo_get_voltage_sel, |
| 169 | .set_voltage_sel = lp3971_ldo_set_voltage_sel, |
| 170 | }; |
| 171 | |
| 172 | static int lp3971_dcdc_is_enabled(struct regulator_dev *dev) |
| 173 | { |
| 174 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 175 | int buck = rdev_get_id(dev) - LP3971_DCDC1; |
| 176 | u16 mask = 1 << (buck * 2); |
| 177 | u16 val; |
| 178 | |
| 179 | val = lp3971_reg_read(lp3971, LP3971_BUCK_VOL_ENABLE_REG); |
| 180 | return (val & mask) != 0; |
| 181 | } |
| 182 | |
| 183 | static int lp3971_dcdc_enable(struct regulator_dev *dev) |
| 184 | { |
| 185 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 186 | int buck = rdev_get_id(dev) - LP3971_DCDC1; |
| 187 | u16 mask = 1 << (buck * 2); |
| 188 | |
| 189 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, mask); |
| 190 | } |
| 191 | |
| 192 | static int lp3971_dcdc_disable(struct regulator_dev *dev) |
| 193 | { |
| 194 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 195 | int buck = rdev_get_id(dev) - LP3971_DCDC1; |
| 196 | u16 mask = 1 << (buck * 2); |
| 197 | |
| 198 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, 0); |
| 199 | } |
| 200 | |
| 201 | static int lp3971_dcdc_get_voltage_sel(struct regulator_dev *dev) |
| 202 | { |
| 203 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 204 | int buck = rdev_get_id(dev) - LP3971_DCDC1; |
| 205 | u16 reg; |
| 206 | |
| 207 | reg = lp3971_reg_read(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck)); |
| 208 | reg &= BUCK_TARGET_VOL_MASK; |
| 209 | |
| 210 | return reg; |
| 211 | } |
| 212 | |
| 213 | static int lp3971_dcdc_set_voltage_sel(struct regulator_dev *dev, |
| 214 | unsigned int selector) |
| 215 | { |
| 216 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); |
| 217 | int buck = rdev_get_id(dev) - LP3971_DCDC1; |
| 218 | int ret; |
| 219 | |
| 220 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck), |
| 221 | BUCK_TARGET_VOL_MASK, selector); |
| 222 | if (ret) |
| 223 | return ret; |
| 224 | |
| 225 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, |
| 226 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), |
| 227 | BUCK_VOL_CHANGE_FLAG_GO << BUCK_VOL_CHANGE_SHIFT(buck)); |
| 228 | if (ret) |
| 229 | return ret; |
| 230 | |
| 231 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, |
| 232 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), |
| 233 | 0 << BUCK_VOL_CHANGE_SHIFT(buck)); |
| 234 | } |
| 235 | |
| 236 | static struct regulator_ops lp3971_dcdc_ops = { |
| 237 | .list_voltage = regulator_list_voltage_table, |
| 238 | .map_voltage = regulator_map_voltage_ascend, |
| 239 | .is_enabled = lp3971_dcdc_is_enabled, |
| 240 | .enable = lp3971_dcdc_enable, |
| 241 | .disable = lp3971_dcdc_disable, |
| 242 | .get_voltage_sel = lp3971_dcdc_get_voltage_sel, |
| 243 | .set_voltage_sel = lp3971_dcdc_set_voltage_sel, |
| 244 | }; |
| 245 | |
| 246 | static const struct regulator_desc regulators[] = { |
| 247 | { |
| 248 | .name = "LDO1", |
| 249 | .id = LP3971_LDO1, |
| 250 | .ops = &lp3971_ldo_ops, |
| 251 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), |
| 252 | .volt_table = ldo123_voltage_map, |
| 253 | .type = REGULATOR_VOLTAGE, |
| 254 | .owner = THIS_MODULE, |
| 255 | }, |
| 256 | { |
| 257 | .name = "LDO2", |
| 258 | .id = LP3971_LDO2, |
| 259 | .ops = &lp3971_ldo_ops, |
| 260 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), |
| 261 | .volt_table = ldo123_voltage_map, |
| 262 | .type = REGULATOR_VOLTAGE, |
| 263 | .owner = THIS_MODULE, |
| 264 | }, |
| 265 | { |
| 266 | .name = "LDO3", |
| 267 | .id = LP3971_LDO3, |
| 268 | .ops = &lp3971_ldo_ops, |
| 269 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), |
| 270 | .volt_table = ldo123_voltage_map, |
| 271 | .type = REGULATOR_VOLTAGE, |
| 272 | .owner = THIS_MODULE, |
| 273 | }, |
| 274 | { |
| 275 | .name = "LDO4", |
| 276 | .id = LP3971_LDO4, |
| 277 | .ops = &lp3971_ldo_ops, |
| 278 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), |
| 279 | .volt_table = ldo45_voltage_map, |
| 280 | .type = REGULATOR_VOLTAGE, |
| 281 | .owner = THIS_MODULE, |
| 282 | }, |
| 283 | { |
| 284 | .name = "LDO5", |
| 285 | .id = LP3971_LDO5, |
| 286 | .ops = &lp3971_ldo_ops, |
| 287 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), |
| 288 | .volt_table = ldo45_voltage_map, |
| 289 | .type = REGULATOR_VOLTAGE, |
| 290 | .owner = THIS_MODULE, |
| 291 | }, |
| 292 | { |
| 293 | .name = "DCDC1", |
| 294 | .id = LP3971_DCDC1, |
| 295 | .ops = &lp3971_dcdc_ops, |
| 296 | .n_voltages = ARRAY_SIZE(buck_voltage_map), |
| 297 | .volt_table = buck_voltage_map, |
| 298 | .type = REGULATOR_VOLTAGE, |
| 299 | .owner = THIS_MODULE, |
| 300 | }, |
| 301 | { |
| 302 | .name = "DCDC2", |
| 303 | .id = LP3971_DCDC2, |
| 304 | .ops = &lp3971_dcdc_ops, |
| 305 | .n_voltages = ARRAY_SIZE(buck_voltage_map), |
| 306 | .volt_table = buck_voltage_map, |
| 307 | .type = REGULATOR_VOLTAGE, |
| 308 | .owner = THIS_MODULE, |
| 309 | }, |
| 310 | { |
| 311 | .name = "DCDC3", |
| 312 | .id = LP3971_DCDC3, |
| 313 | .ops = &lp3971_dcdc_ops, |
| 314 | .n_voltages = ARRAY_SIZE(buck_voltage_map), |
| 315 | .volt_table = buck_voltage_map, |
| 316 | .type = REGULATOR_VOLTAGE, |
| 317 | .owner = THIS_MODULE, |
| 318 | }, |
| 319 | }; |
| 320 | |
| 321 | static int lp3971_i2c_read(struct i2c_client *i2c, char reg, int count, |
| 322 | u16 *dest) |
| 323 | { |
| 324 | int ret; |
| 325 | |
| 326 | if (count != 1) |
| 327 | return -EIO; |
| 328 | ret = i2c_smbus_read_byte_data(i2c, reg); |
| 329 | if (ret < 0) |
| 330 | return ret; |
| 331 | |
| 332 | *dest = ret; |
| 333 | return 0; |
| 334 | } |
| 335 | |
| 336 | static int lp3971_i2c_write(struct i2c_client *i2c, char reg, int count, |
| 337 | const u16 *src) |
| 338 | { |
| 339 | if (count != 1) |
| 340 | return -EIO; |
| 341 | return i2c_smbus_write_byte_data(i2c, reg, *src); |
| 342 | } |
| 343 | |
| 344 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg) |
| 345 | { |
| 346 | u16 val = 0; |
| 347 | |
| 348 | mutex_lock(&lp3971->io_lock); |
| 349 | |
| 350 | lp3971_i2c_read(lp3971->i2c, reg, 1, &val); |
| 351 | |
| 352 | dev_dbg(lp3971->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, |
| 353 | (unsigned)val&0xff); |
| 354 | |
| 355 | mutex_unlock(&lp3971->io_lock); |
| 356 | |
| 357 | return val & 0xff; |
| 358 | } |
| 359 | |
| 360 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val) |
| 361 | { |
| 362 | u16 tmp; |
| 363 | int ret; |
| 364 | |
| 365 | mutex_lock(&lp3971->io_lock); |
| 366 | |
| 367 | ret = lp3971_i2c_read(lp3971->i2c, reg, 1, &tmp); |
| 368 | tmp = (tmp & ~mask) | val; |
| 369 | if (ret == 0) { |
| 370 | ret = lp3971_i2c_write(lp3971->i2c, reg, 1, &tmp); |
| 371 | dev_dbg(lp3971->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, |
| 372 | (unsigned)val&0xff); |
| 373 | } |
| 374 | mutex_unlock(&lp3971->io_lock); |
| 375 | |
| 376 | return ret; |
| 377 | } |
| 378 | |
| 379 | static int setup_regulators(struct lp3971 *lp3971, |
| 380 | struct lp3971_platform_data *pdata) |
| 381 | { |
| 382 | int i, err; |
| 383 | |
| 384 | /* Instantiate the regulators */ |
| 385 | for (i = 0; i < pdata->num_regulators; i++) { |
| 386 | struct regulator_config config = { }; |
| 387 | struct lp3971_regulator_subdev *reg = &pdata->regulators[i]; |
| 388 | struct regulator_dev *rdev; |
| 389 | |
| 390 | config.dev = lp3971->dev; |
| 391 | config.init_data = reg->initdata; |
| 392 | config.driver_data = lp3971; |
| 393 | |
| 394 | rdev = devm_regulator_register(lp3971->dev, |
| 395 | ®ulators[reg->id], &config); |
| 396 | if (IS_ERR(rdev)) { |
| 397 | err = PTR_ERR(rdev); |
| 398 | dev_err(lp3971->dev, "regulator init failed: %d\n", |
| 399 | err); |
| 400 | return err; |
| 401 | } |
| 402 | } |
| 403 | |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | static int lp3971_i2c_probe(struct i2c_client *i2c, |
| 408 | const struct i2c_device_id *id) |
| 409 | { |
| 410 | struct lp3971 *lp3971; |
| 411 | struct lp3971_platform_data *pdata = dev_get_platdata(&i2c->dev); |
| 412 | int ret; |
| 413 | u16 val; |
| 414 | |
| 415 | if (!pdata) { |
| 416 | dev_dbg(&i2c->dev, "No platform init data supplied\n"); |
| 417 | return -ENODEV; |
| 418 | } |
| 419 | |
| 420 | lp3971 = devm_kzalloc(&i2c->dev, sizeof(struct lp3971), GFP_KERNEL); |
| 421 | if (lp3971 == NULL) |
| 422 | return -ENOMEM; |
| 423 | |
| 424 | lp3971->i2c = i2c; |
| 425 | lp3971->dev = &i2c->dev; |
| 426 | |
| 427 | mutex_init(&lp3971->io_lock); |
| 428 | |
| 429 | /* Detect LP3971 */ |
| 430 | ret = lp3971_i2c_read(i2c, LP3971_SYS_CONTROL1_REG, 1, &val); |
| 431 | if (ret == 0 && (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) |
| 432 | ret = -ENODEV; |
| 433 | if (ret < 0) { |
| 434 | dev_err(&i2c->dev, "failed to detect device\n"); |
| 435 | return ret; |
| 436 | } |
| 437 | |
| 438 | ret = setup_regulators(lp3971, pdata); |
| 439 | if (ret < 0) |
| 440 | return ret; |
| 441 | |
| 442 | i2c_set_clientdata(i2c, lp3971); |
| 443 | return 0; |
| 444 | } |
| 445 | |
| 446 | static const struct i2c_device_id lp3971_i2c_id[] = { |
| 447 | { "lp3971", 0 }, |
| 448 | { } |
| 449 | }; |
| 450 | MODULE_DEVICE_TABLE(i2c, lp3971_i2c_id); |
| 451 | |
| 452 | static struct i2c_driver lp3971_i2c_driver = { |
| 453 | .driver = { |
| 454 | .name = "LP3971", |
| 455 | }, |
| 456 | .probe = lp3971_i2c_probe, |
| 457 | .id_table = lp3971_i2c_id, |
| 458 | }; |
| 459 | |
| 460 | module_i2c_driver(lp3971_i2c_driver); |
| 461 | |
| 462 | MODULE_LICENSE("GPL"); |
| 463 | MODULE_AUTHOR("Marek Szyprowski <m.szyprowski@samsung.com>"); |
| 464 | MODULE_DESCRIPTION("LP3971 PMIC driver"); |