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[PATCH] libata-dev: Cleanup unused enums/functions
[deliverable/linux.git] / drivers / scsi / libata-core.c
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1/*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
51#include <linux/jiffies.h>
52#include <linux/scatterlist.h>
53#include <scsi/scsi.h>
54#include "scsi_priv.h"
55#include <scsi/scsi_cmnd.h>
56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
66static void ata_set_mode(struct ata_port *ap);
67static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
68 struct ata_device *dev);
69static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
70
71static unsigned int ata_unique_id = 1;
72static struct workqueue_struct *ata_wq;
73
74int atapi_enabled = 1;
75module_param(atapi_enabled, int, 0444);
76MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77
78int libata_fua = 0;
79module_param_named(fua, libata_fua, int, 0444);
80MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
81
82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
87
88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
174 0,
175 0,
176 0,
177 0,
178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
187};
188
189/**
190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
192 *
193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
195 *
196 * LOCKING:
197 * caller.
198 */
199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
200{
201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
203 u8 cmd;
204
205 int index, fua, lba48, write;
206
207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
210
211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
213 index = dev->multi_count ? 0 : 8;
214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
217 index = dev->multi_count ? 0 : 8;
218 } else {
219 tf->protocol = ATA_PROT_DMA;
220 index = 16;
221 }
222
223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
229}
230
231/**
232 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
233 * @pio_mask: pio_mask
234 * @mwdma_mask: mwdma_mask
235 * @udma_mask: udma_mask
236 *
237 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
238 * unsigned int xfer_mask.
239 *
240 * LOCKING:
241 * None.
242 *
243 * RETURNS:
244 * Packed xfer_mask.
245 */
246static unsigned int ata_pack_xfermask(unsigned int pio_mask,
247 unsigned int mwdma_mask,
248 unsigned int udma_mask)
249{
250 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
251 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
252 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
253}
254
255/**
256 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
257 * @xfer_mask: xfer_mask to unpack
258 * @pio_mask: resulting pio_mask
259 * @mwdma_mask: resulting mwdma_mask
260 * @udma_mask: resulting udma_mask
261 *
262 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
263 * Any NULL distination masks will be ignored.
264 */
265static void ata_unpack_xfermask(unsigned int xfer_mask,
266 unsigned int *pio_mask,
267 unsigned int *mwdma_mask,
268 unsigned int *udma_mask)
269{
270 if (pio_mask)
271 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
272 if (mwdma_mask)
273 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
274 if (udma_mask)
275 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
276}
277
278static const struct ata_xfer_ent {
279 unsigned int shift, bits;
280 u8 base;
281} ata_xfer_tbl[] = {
282 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
283 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
284 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
285 { -1, },
286};
287
288/**
289 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
290 * @xfer_mask: xfer_mask of interest
291 *
292 * Return matching XFER_* value for @xfer_mask. Only the highest
293 * bit of @xfer_mask is considered.
294 *
295 * LOCKING:
296 * None.
297 *
298 * RETURNS:
299 * Matching XFER_* value, 0 if no match found.
300 */
301static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
302{
303 int highbit = fls(xfer_mask) - 1;
304 const struct ata_xfer_ent *ent;
305
306 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
307 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
308 return ent->base + highbit - ent->shift;
309 return 0;
310}
311
312/**
313 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
314 * @xfer_mode: XFER_* of interest
315 *
316 * Return matching xfer_mask for @xfer_mode.
317 *
318 * LOCKING:
319 * None.
320 *
321 * RETURNS:
322 * Matching xfer_mask, 0 if no match found.
323 */
324static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
325{
326 const struct ata_xfer_ent *ent;
327
328 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
329 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
330 return 1 << (ent->shift + xfer_mode - ent->base);
331 return 0;
332}
333
334/**
335 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
336 * @xfer_mode: XFER_* of interest
337 *
338 * Return matching xfer_shift for @xfer_mode.
339 *
340 * LOCKING:
341 * None.
342 *
343 * RETURNS:
344 * Matching xfer_shift, -1 if no match found.
345 */
346static int ata_xfer_mode2shift(unsigned int xfer_mode)
347{
348 const struct ata_xfer_ent *ent;
349
350 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
351 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
352 return ent->shift;
353 return -1;
354}
355
356/**
357 * ata_mode_string - convert xfer_mask to string
358 * @xfer_mask: mask of bits supported; only highest bit counts.
359 *
360 * Determine string which represents the highest speed
361 * (highest bit in @modemask).
362 *
363 * LOCKING:
364 * None.
365 *
366 * RETURNS:
367 * Constant C string representing highest speed listed in
368 * @mode_mask, or the constant C string "<n/a>".
369 */
370static const char *ata_mode_string(unsigned int xfer_mask)
371{
372 static const char * const xfer_mode_str[] = {
373 "PIO0",
374 "PIO1",
375 "PIO2",
376 "PIO3",
377 "PIO4",
378 "MWDMA0",
379 "MWDMA1",
380 "MWDMA2",
381 "UDMA/16",
382 "UDMA/25",
383 "UDMA/33",
384 "UDMA/44",
385 "UDMA/66",
386 "UDMA/100",
387 "UDMA/133",
388 "UDMA7",
389 };
390 int highbit;
391
392 highbit = fls(xfer_mask) - 1;
393 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
394 return xfer_mode_str[highbit];
395 return "<n/a>";
396}
397
398static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
399{
400 if (ata_dev_present(dev)) {
401 printk(KERN_WARNING "ata%u: dev %u disabled\n",
402 ap->id, dev->devno);
403 dev->class++;
404 }
405}
406
407/**
408 * ata_pio_devchk - PATA device presence detection
409 * @ap: ATA channel to examine
410 * @device: Device to examine (starting at zero)
411 *
412 * This technique was originally described in
413 * Hale Landis's ATADRVR (www.ata-atapi.com), and
414 * later found its way into the ATA/ATAPI spec.
415 *
416 * Write a pattern to the ATA shadow registers,
417 * and if a device is present, it will respond by
418 * correctly storing and echoing back the
419 * ATA shadow register contents.
420 *
421 * LOCKING:
422 * caller.
423 */
424
425static unsigned int ata_pio_devchk(struct ata_port *ap,
426 unsigned int device)
427{
428 struct ata_ioports *ioaddr = &ap->ioaddr;
429 u8 nsect, lbal;
430
431 ap->ops->dev_select(ap, device);
432
433 outb(0x55, ioaddr->nsect_addr);
434 outb(0xaa, ioaddr->lbal_addr);
435
436 outb(0xaa, ioaddr->nsect_addr);
437 outb(0x55, ioaddr->lbal_addr);
438
439 outb(0x55, ioaddr->nsect_addr);
440 outb(0xaa, ioaddr->lbal_addr);
441
442 nsect = inb(ioaddr->nsect_addr);
443 lbal = inb(ioaddr->lbal_addr);
444
445 if ((nsect == 0x55) && (lbal == 0xaa))
446 return 1; /* we found a device */
447
448 return 0; /* nothing found */
449}
450
451/**
452 * ata_mmio_devchk - PATA device presence detection
453 * @ap: ATA channel to examine
454 * @device: Device to examine (starting at zero)
455 *
456 * This technique was originally described in
457 * Hale Landis's ATADRVR (www.ata-atapi.com), and
458 * later found its way into the ATA/ATAPI spec.
459 *
460 * Write a pattern to the ATA shadow registers,
461 * and if a device is present, it will respond by
462 * correctly storing and echoing back the
463 * ATA shadow register contents.
464 *
465 * LOCKING:
466 * caller.
467 */
468
469static unsigned int ata_mmio_devchk(struct ata_port *ap,
470 unsigned int device)
471{
472 struct ata_ioports *ioaddr = &ap->ioaddr;
473 u8 nsect, lbal;
474
475 ap->ops->dev_select(ap, device);
476
477 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
478 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
479
480 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
481 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
482
483 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
484 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
485
486 nsect = readb((void __iomem *) ioaddr->nsect_addr);
487 lbal = readb((void __iomem *) ioaddr->lbal_addr);
488
489 if ((nsect == 0x55) && (lbal == 0xaa))
490 return 1; /* we found a device */
491
492 return 0; /* nothing found */
493}
494
495/**
496 * ata_devchk - PATA device presence detection
497 * @ap: ATA channel to examine
498 * @device: Device to examine (starting at zero)
499 *
500 * Dispatch ATA device presence detection, depending
501 * on whether we are using PIO or MMIO to talk to the
502 * ATA shadow registers.
503 *
504 * LOCKING:
505 * caller.
506 */
507
508static unsigned int ata_devchk(struct ata_port *ap,
509 unsigned int device)
510{
511 if (ap->flags & ATA_FLAG_MMIO)
512 return ata_mmio_devchk(ap, device);
513 return ata_pio_devchk(ap, device);
514}
515
516/**
517 * ata_dev_classify - determine device type based on ATA-spec signature
518 * @tf: ATA taskfile register set for device to be identified
519 *
520 * Determine from taskfile register contents whether a device is
521 * ATA or ATAPI, as per "Signature and persistence" section
522 * of ATA/PI spec (volume 1, sect 5.14).
523 *
524 * LOCKING:
525 * None.
526 *
527 * RETURNS:
528 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
529 * the event of failure.
530 */
531
532unsigned int ata_dev_classify(const struct ata_taskfile *tf)
533{
534 /* Apple's open source Darwin code hints that some devices only
535 * put a proper signature into the LBA mid/high registers,
536 * So, we only check those. It's sufficient for uniqueness.
537 */
538
539 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
540 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
541 DPRINTK("found ATA device by sig\n");
542 return ATA_DEV_ATA;
543 }
544
545 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
546 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
547 DPRINTK("found ATAPI device by sig\n");
548 return ATA_DEV_ATAPI;
549 }
550
551 DPRINTK("unknown device\n");
552 return ATA_DEV_UNKNOWN;
553}
554
555/**
556 * ata_dev_try_classify - Parse returned ATA device signature
557 * @ap: ATA channel to examine
558 * @device: Device to examine (starting at zero)
559 * @r_err: Value of error register on completion
560 *
561 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
562 * an ATA/ATAPI-defined set of values is placed in the ATA
563 * shadow registers, indicating the results of device detection
564 * and diagnostics.
565 *
566 * Select the ATA device, and read the values from the ATA shadow
567 * registers. Then parse according to the Error register value,
568 * and the spec-defined values examined by ata_dev_classify().
569 *
570 * LOCKING:
571 * caller.
572 *
573 * RETURNS:
574 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
575 */
576
577static unsigned int
578ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
579{
580 struct ata_taskfile tf;
581 unsigned int class;
582 u8 err;
583
584 ap->ops->dev_select(ap, device);
585
586 memset(&tf, 0, sizeof(tf));
587
588 ap->ops->tf_read(ap, &tf);
589 err = tf.feature;
590 if (r_err)
591 *r_err = err;
592
593 /* see if device passed diags */
594 if (err == 1)
595 /* do nothing */ ;
596 else if ((device == 0) && (err == 0x81))
597 /* do nothing */ ;
598 else
599 return ATA_DEV_NONE;
600
601 /* determine if device is ATA or ATAPI */
602 class = ata_dev_classify(&tf);
603
604 if (class == ATA_DEV_UNKNOWN)
605 return ATA_DEV_NONE;
606 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
607 return ATA_DEV_NONE;
608 return class;
609}
610
611/**
612 * ata_id_string - Convert IDENTIFY DEVICE page into string
613 * @id: IDENTIFY DEVICE results we will examine
614 * @s: string into which data is output
615 * @ofs: offset into identify device page
616 * @len: length of string to return. must be an even number.
617 *
618 * The strings in the IDENTIFY DEVICE page are broken up into
619 * 16-bit chunks. Run through the string, and output each
620 * 8-bit chunk linearly, regardless of platform.
621 *
622 * LOCKING:
623 * caller.
624 */
625
626void ata_id_string(const u16 *id, unsigned char *s,
627 unsigned int ofs, unsigned int len)
628{
629 unsigned int c;
630
631 while (len > 0) {
632 c = id[ofs] >> 8;
633 *s = c;
634 s++;
635
636 c = id[ofs] & 0xff;
637 *s = c;
638 s++;
639
640 ofs++;
641 len -= 2;
642 }
643}
644
645/**
646 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
647 * @id: IDENTIFY DEVICE results we will examine
648 * @s: string into which data is output
649 * @ofs: offset into identify device page
650 * @len: length of string to return. must be an odd number.
651 *
652 * This function is identical to ata_id_string except that it
653 * trims trailing spaces and terminates the resulting string with
654 * null. @len must be actual maximum length (even number) + 1.
655 *
656 * LOCKING:
657 * caller.
658 */
659void ata_id_c_string(const u16 *id, unsigned char *s,
660 unsigned int ofs, unsigned int len)
661{
662 unsigned char *p;
663
664 WARN_ON(!(len & 1));
665
666 ata_id_string(id, s, ofs, len - 1);
667
668 p = s + strnlen(s, len - 1);
669 while (p > s && p[-1] == ' ')
670 p--;
671 *p = '\0';
672}
673
674static u64 ata_id_n_sectors(const u16 *id)
675{
676 if (ata_id_has_lba(id)) {
677 if (ata_id_has_lba48(id))
678 return ata_id_u64(id, 100);
679 else
680 return ata_id_u32(id, 60);
681 } else {
682 if (ata_id_current_chs_valid(id))
683 return ata_id_u32(id, 57);
684 else
685 return id[1] * id[3] * id[6];
686 }
687}
688
689/**
690 * ata_noop_dev_select - Select device 0/1 on ATA bus
691 * @ap: ATA channel to manipulate
692 * @device: ATA device (numbered from zero) to select
693 *
694 * This function performs no actual function.
695 *
696 * May be used as the dev_select() entry in ata_port_operations.
697 *
698 * LOCKING:
699 * caller.
700 */
701void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
702{
703}
704
705
706/**
707 * ata_std_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * Use the method defined in the ATA specification to
712 * make either device 0, or device 1, active on the
713 * ATA channel. Works with both PIO and MMIO.
714 *
715 * May be used as the dev_select() entry in ata_port_operations.
716 *
717 * LOCKING:
718 * caller.
719 */
720
721void ata_std_dev_select (struct ata_port *ap, unsigned int device)
722{
723 u8 tmp;
724
725 if (device == 0)
726 tmp = ATA_DEVICE_OBS;
727 else
728 tmp = ATA_DEVICE_OBS | ATA_DEV1;
729
730 if (ap->flags & ATA_FLAG_MMIO) {
731 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
732 } else {
733 outb(tmp, ap->ioaddr.device_addr);
734 }
735 ata_pause(ap); /* needed; also flushes, for mmio */
736}
737
738/**
739 * ata_dev_select - Select device 0/1 on ATA bus
740 * @ap: ATA channel to manipulate
741 * @device: ATA device (numbered from zero) to select
742 * @wait: non-zero to wait for Status register BSY bit to clear
743 * @can_sleep: non-zero if context allows sleeping
744 *
745 * Use the method defined in the ATA specification to
746 * make either device 0, or device 1, active on the
747 * ATA channel.
748 *
749 * This is a high-level version of ata_std_dev_select(),
750 * which additionally provides the services of inserting
751 * the proper pauses and status polling, where needed.
752 *
753 * LOCKING:
754 * caller.
755 */
756
757void ata_dev_select(struct ata_port *ap, unsigned int device,
758 unsigned int wait, unsigned int can_sleep)
759{
760 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
761 ap->id, device, wait);
762
763 if (wait)
764 ata_wait_idle(ap);
765
766 ap->ops->dev_select(ap, device);
767
768 if (wait) {
769 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
770 msleep(150);
771 ata_wait_idle(ap);
772 }
773}
774
775/**
776 * ata_dump_id - IDENTIFY DEVICE info debugging output
777 * @id: IDENTIFY DEVICE page to dump
778 *
779 * Dump selected 16-bit words from the given IDENTIFY DEVICE
780 * page.
781 *
782 * LOCKING:
783 * caller.
784 */
785
786static inline void ata_dump_id(const u16 *id)
787{
788 DPRINTK("49==0x%04x "
789 "53==0x%04x "
790 "63==0x%04x "
791 "64==0x%04x "
792 "75==0x%04x \n",
793 id[49],
794 id[53],
795 id[63],
796 id[64],
797 id[75]);
798 DPRINTK("80==0x%04x "
799 "81==0x%04x "
800 "82==0x%04x "
801 "83==0x%04x "
802 "84==0x%04x \n",
803 id[80],
804 id[81],
805 id[82],
806 id[83],
807 id[84]);
808 DPRINTK("88==0x%04x "
809 "93==0x%04x\n",
810 id[88],
811 id[93]);
812}
813
814/**
815 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
816 * @id: IDENTIFY data to compute xfer mask from
817 *
818 * Compute the xfermask for this device. This is not as trivial
819 * as it seems if we must consider early devices correctly.
820 *
821 * FIXME: pre IDE drive timing (do we care ?).
822 *
823 * LOCKING:
824 * None.
825 *
826 * RETURNS:
827 * Computed xfermask
828 */
829static unsigned int ata_id_xfermask(const u16 *id)
830{
831 unsigned int pio_mask, mwdma_mask, udma_mask;
832
833 /* Usual case. Word 53 indicates word 64 is valid */
834 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
835 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
836 pio_mask <<= 3;
837 pio_mask |= 0x7;
838 } else {
839 /* If word 64 isn't valid then Word 51 high byte holds
840 * the PIO timing number for the maximum. Turn it into
841 * a mask.
842 */
843 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
844
845 /* But wait.. there's more. Design your standards by
846 * committee and you too can get a free iordy field to
847 * process. However its the speeds not the modes that
848 * are supported... Note drivers using the timing API
849 * will get this right anyway
850 */
851 }
852
853 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
854
855 udma_mask = 0;
856 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
857 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
858
859 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
860}
861
862/**
863 * ata_port_queue_task - Queue port_task
864 * @ap: The ata_port to queue port_task for
865 *
866 * Schedule @fn(@data) for execution after @delay jiffies using
867 * port_task. There is one port_task per port and it's the
868 * user(low level driver)'s responsibility to make sure that only
869 * one task is active at any given time.
870 *
871 * libata core layer takes care of synchronization between
872 * port_task and EH. ata_port_queue_task() may be ignored for EH
873 * synchronization.
874 *
875 * LOCKING:
876 * Inherited from caller.
877 */
878void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
879 unsigned long delay)
880{
881 int rc;
882
883 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
884 return;
885
886 PREPARE_WORK(&ap->port_task, fn, data);
887
888 if (!delay)
889 rc = queue_work(ata_wq, &ap->port_task);
890 else
891 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
892
893 /* rc == 0 means that another user is using port task */
894 WARN_ON(rc == 0);
895}
896
897/**
898 * ata_port_flush_task - Flush port_task
899 * @ap: The ata_port to flush port_task for
900 *
901 * After this function completes, port_task is guranteed not to
902 * be running or scheduled.
903 *
904 * LOCKING:
905 * Kernel thread context (may sleep)
906 */
907void ata_port_flush_task(struct ata_port *ap)
908{
909 unsigned long flags;
910
911 DPRINTK("ENTER\n");
912
913 spin_lock_irqsave(&ap->host_set->lock, flags);
914 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
915 spin_unlock_irqrestore(&ap->host_set->lock, flags);
916
917 DPRINTK("flush #1\n");
918 flush_workqueue(ata_wq);
919
920 /*
921 * At this point, if a task is running, it's guaranteed to see
922 * the FLUSH flag; thus, it will never queue pio tasks again.
923 * Cancel and flush.
924 */
925 if (!cancel_delayed_work(&ap->port_task)) {
926 DPRINTK("flush #2\n");
927 flush_workqueue(ata_wq);
928 }
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
931 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("EXIT\n");
935}
936
937void ata_qc_complete_internal(struct ata_queued_cmd *qc)
938{
939 struct completion *waiting = qc->private_data;
940
941 qc->ap->ops->tf_read(qc->ap, &qc->tf);
942 complete(waiting);
943}
944
945/**
946 * ata_exec_internal - execute libata internal command
947 * @ap: Port to which the command is sent
948 * @dev: Device to which the command is sent
949 * @tf: Taskfile registers for the command and the result
950 * @dma_dir: Data tranfer direction of the command
951 * @buf: Data buffer of the command
952 * @buflen: Length of data buffer
953 *
954 * Executes libata internal command with timeout. @tf contains
955 * command on entry and result on return. Timeout and error
956 * conditions are reported via return value. No recovery action
957 * is taken after a command times out. It's caller's duty to
958 * clean up after timeout.
959 *
960 * LOCKING:
961 * None. Should be called with kernel context, might sleep.
962 */
963
964static unsigned
965ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
966 struct ata_taskfile *tf,
967 int dma_dir, void *buf, unsigned int buflen)
968{
969 u8 command = tf->command;
970 struct ata_queued_cmd *qc;
971 DECLARE_COMPLETION(wait);
972 unsigned long flags;
973 unsigned int err_mask;
974
975 spin_lock_irqsave(&ap->host_set->lock, flags);
976
977 qc = ata_qc_new_init(ap, dev);
978 BUG_ON(qc == NULL);
979
980 qc->tf = *tf;
981 qc->dma_dir = dma_dir;
982 if (dma_dir != DMA_NONE) {
983 ata_sg_init_one(qc, buf, buflen);
984 qc->nsect = buflen / ATA_SECT_SIZE;
985 }
986
987 qc->private_data = &wait;
988 qc->complete_fn = ata_qc_complete_internal;
989
990 qc->err_mask = ata_qc_issue(qc);
991 if (qc->err_mask)
992 ata_qc_complete(qc);
993
994 spin_unlock_irqrestore(&ap->host_set->lock, flags);
995
996 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
997 ata_port_flush_task(ap);
998
999 spin_lock_irqsave(&ap->host_set->lock, flags);
1000
1001 /* We're racing with irq here. If we lose, the
1002 * following test prevents us from completing the qc
1003 * again. If completion irq occurs after here but
1004 * before the caller cleans up, it will result in a
1005 * spurious interrupt. We can live with that.
1006 */
1007 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1008 qc->err_mask = AC_ERR_TIMEOUT;
1009 ata_qc_complete(qc);
1010 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1011 ap->id, command);
1012 }
1013
1014 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1015 }
1016
1017 *tf = qc->tf;
1018 err_mask = qc->err_mask;
1019
1020 ata_qc_free(qc);
1021
1022 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1023 * Until those drivers are fixed, we detect the condition
1024 * here, fail the command with AC_ERR_SYSTEM and reenable the
1025 * port.
1026 *
1027 * Note that this doesn't change any behavior as internal
1028 * command failure results in disabling the device in the
1029 * higher layer for LLDDs without new reset/EH callbacks.
1030 *
1031 * Kill the following code as soon as those drivers are fixed.
1032 */
1033 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1034 err_mask |= AC_ERR_SYSTEM;
1035 ata_port_probe(ap);
1036 }
1037
1038 return err_mask;
1039}
1040
1041/**
1042 * ata_pio_need_iordy - check if iordy needed
1043 * @adev: ATA device
1044 *
1045 * Check if the current speed of the device requires IORDY. Used
1046 * by various controllers for chip configuration.
1047 */
1048
1049unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1050{
1051 int pio;
1052 int speed = adev->pio_mode - XFER_PIO_0;
1053
1054 if (speed < 2)
1055 return 0;
1056 if (speed > 2)
1057 return 1;
1058
1059 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1060
1061 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1062 pio = adev->id[ATA_ID_EIDE_PIO];
1063 /* Is the speed faster than the drive allows non IORDY ? */
1064 if (pio) {
1065 /* This is cycle times not frequency - watch the logic! */
1066 if (pio > 240) /* PIO2 is 240nS per cycle */
1067 return 1;
1068 return 0;
1069 }
1070 }
1071 return 0;
1072}
1073
1074/**
1075 * ata_dev_read_id - Read ID data from the specified device
1076 * @ap: port on which target device resides
1077 * @dev: target device
1078 * @p_class: pointer to class of the target device (may be changed)
1079 * @post_reset: is this read ID post-reset?
1080 * @p_id: read IDENTIFY page (newly allocated)
1081 *
1082 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1083 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1084 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1085 * for pre-ATA4 drives.
1086 *
1087 * LOCKING:
1088 * Kernel thread context (may sleep)
1089 *
1090 * RETURNS:
1091 * 0 on success, -errno otherwise.
1092 */
1093static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
1094 unsigned int *p_class, int post_reset, u16 **p_id)
1095{
1096 unsigned int class = *p_class;
1097 struct ata_taskfile tf;
1098 unsigned int err_mask = 0;
1099 u16 *id;
1100 const char *reason;
1101 int rc;
1102
1103 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1104
1105 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1106
1107 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1108 if (id == NULL) {
1109 rc = -ENOMEM;
1110 reason = "out of memory";
1111 goto err_out;
1112 }
1113
1114 retry:
1115 ata_tf_init(ap, &tf, dev->devno);
1116
1117 switch (class) {
1118 case ATA_DEV_ATA:
1119 tf.command = ATA_CMD_ID_ATA;
1120 break;
1121 case ATA_DEV_ATAPI:
1122 tf.command = ATA_CMD_ID_ATAPI;
1123 break;
1124 default:
1125 rc = -ENODEV;
1126 reason = "unsupported class";
1127 goto err_out;
1128 }
1129
1130 tf.protocol = ATA_PROT_PIO;
1131
1132 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1133 id, sizeof(id[0]) * ATA_ID_WORDS);
1134 if (err_mask) {
1135 rc = -EIO;
1136 reason = "I/O error";
1137 goto err_out;
1138 }
1139
1140 swap_buf_le16(id, ATA_ID_WORDS);
1141
1142 /* sanity check */
1143 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1144 rc = -EINVAL;
1145 reason = "device reports illegal type";
1146 goto err_out;
1147 }
1148
1149 if (post_reset && class == ATA_DEV_ATA) {
1150 /*
1151 * The exact sequence expected by certain pre-ATA4 drives is:
1152 * SRST RESET
1153 * IDENTIFY
1154 * INITIALIZE DEVICE PARAMETERS
1155 * anything else..
1156 * Some drives were very specific about that exact sequence.
1157 */
1158 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1159 err_mask = ata_dev_init_params(ap, dev);
1160 if (err_mask) {
1161 rc = -EIO;
1162 reason = "INIT_DEV_PARAMS failed";
1163 goto err_out;
1164 }
1165
1166 /* current CHS translation info (id[53-58]) might be
1167 * changed. reread the identify device info.
1168 */
1169 post_reset = 0;
1170 goto retry;
1171 }
1172 }
1173
1174 *p_class = class;
1175 *p_id = id;
1176 return 0;
1177
1178 err_out:
1179 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1180 ap->id, dev->devno, reason);
1181 kfree(id);
1182 return rc;
1183}
1184
1185static inline u8 ata_dev_knobble(const struct ata_port *ap,
1186 struct ata_device *dev)
1187{
1188 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1189}
1190
1191/**
1192 * ata_dev_configure - Configure the specified ATA/ATAPI device
1193 * @ap: Port on which target device resides
1194 * @dev: Target device to configure
1195 * @print_info: Enable device info printout
1196 *
1197 * Configure @dev according to @dev->id. Generic and low-level
1198 * driver specific fixups are also applied.
1199 *
1200 * LOCKING:
1201 * Kernel thread context (may sleep)
1202 *
1203 * RETURNS:
1204 * 0 on success, -errno otherwise
1205 */
1206static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1207 int print_info)
1208{
1209 const u16 *id = dev->id;
1210 unsigned int xfer_mask;
1211 int i, rc;
1212
1213 if (!ata_dev_present(dev)) {
1214 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1215 ap->id, dev->devno);
1216 return 0;
1217 }
1218
1219 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1220
1221 /* print device capabilities */
1222 if (print_info)
1223 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1224 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1225 ap->id, dev->devno, id[49], id[82], id[83],
1226 id[84], id[85], id[86], id[87], id[88]);
1227
1228 /* initialize to-be-configured parameters */
1229 dev->flags = 0;
1230 dev->max_sectors = 0;
1231 dev->cdb_len = 0;
1232 dev->n_sectors = 0;
1233 dev->cylinders = 0;
1234 dev->heads = 0;
1235 dev->sectors = 0;
1236
1237 /*
1238 * common ATA, ATAPI feature tests
1239 */
1240
1241 /* find max transfer mode; for printk only */
1242 xfer_mask = ata_id_xfermask(id);
1243
1244 ata_dump_id(id);
1245
1246 /* ATA-specific feature tests */
1247 if (dev->class == ATA_DEV_ATA) {
1248 dev->n_sectors = ata_id_n_sectors(id);
1249
1250 if (ata_id_has_lba(id)) {
1251 const char *lba_desc;
1252
1253 lba_desc = "LBA";
1254 dev->flags |= ATA_DFLAG_LBA;
1255 if (ata_id_has_lba48(id)) {
1256 dev->flags |= ATA_DFLAG_LBA48;
1257 lba_desc = "LBA48";
1258 }
1259
1260 /* print device info to dmesg */
1261 if (print_info)
1262 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1263 "max %s, %Lu sectors: %s\n",
1264 ap->id, dev->devno,
1265 ata_id_major_version(id),
1266 ata_mode_string(xfer_mask),
1267 (unsigned long long)dev->n_sectors,
1268 lba_desc);
1269 } else {
1270 /* CHS */
1271
1272 /* Default translation */
1273 dev->cylinders = id[1];
1274 dev->heads = id[3];
1275 dev->sectors = id[6];
1276
1277 if (ata_id_current_chs_valid(id)) {
1278 /* Current CHS translation is valid. */
1279 dev->cylinders = id[54];
1280 dev->heads = id[55];
1281 dev->sectors = id[56];
1282 }
1283
1284 /* print device info to dmesg */
1285 if (print_info)
1286 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1287 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1288 ap->id, dev->devno,
1289 ata_id_major_version(id),
1290 ata_mode_string(xfer_mask),
1291 (unsigned long long)dev->n_sectors,
1292 dev->cylinders, dev->heads, dev->sectors);
1293 }
1294
1295 if (dev->id[59] & 0x100) {
1296 dev->multi_count = dev->id[59] & 0xff;
1297 DPRINTK("ata%u: dev %u multi count %u\n",
1298 ap->id, device, dev->multi_count);
1299 }
1300
1301 dev->cdb_len = 16;
1302 }
1303
1304 /* ATAPI-specific feature tests */
1305 else if (dev->class == ATA_DEV_ATAPI) {
1306 rc = atapi_cdb_len(id);
1307 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1308 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1309 rc = -EINVAL;
1310 goto err_out_nosup;
1311 }
1312 dev->cdb_len = (unsigned int) rc;
1313
1314 if (ata_id_cdb_intr(dev->id))
1315 dev->flags |= ATA_DFLAG_CDB_INTR;
1316
1317 /* print device info to dmesg */
1318 if (print_info)
1319 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1320 ap->id, dev->devno, ata_mode_string(xfer_mask));
1321 }
1322
1323 ap->host->max_cmd_len = 0;
1324 for (i = 0; i < ATA_MAX_DEVICES; i++)
1325 ap->host->max_cmd_len = max_t(unsigned int,
1326 ap->host->max_cmd_len,
1327 ap->device[i].cdb_len);
1328
1329 /* limit bridge transfers to udma5, 200 sectors */
1330 if (ata_dev_knobble(ap, dev)) {
1331 if (print_info)
1332 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1333 ap->id, dev->devno);
1334 dev->udma_mask &= ATA_UDMA5;
1335 dev->max_sectors = ATA_MAX_SECTORS;
1336 }
1337
1338 if (ap->ops->dev_config)
1339 ap->ops->dev_config(ap, dev);
1340
1341 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1342 return 0;
1343
1344err_out_nosup:
1345 DPRINTK("EXIT, err\n");
1346 return rc;
1347}
1348
1349/**
1350 * ata_bus_probe - Reset and probe ATA bus
1351 * @ap: Bus to probe
1352 *
1353 * Master ATA bus probing function. Initiates a hardware-dependent
1354 * bus reset, then attempts to identify any devices found on
1355 * the bus.
1356 *
1357 * LOCKING:
1358 * PCI/etc. bus probe sem.
1359 *
1360 * RETURNS:
1361 * Zero on success, non-zero on error.
1362 */
1363
1364static int ata_bus_probe(struct ata_port *ap)
1365{
1366 unsigned int classes[ATA_MAX_DEVICES];
1367 unsigned int i, rc, found = 0;
1368
1369 ata_port_probe(ap);
1370
1371 /* reset and determine device classes */
1372 for (i = 0; i < ATA_MAX_DEVICES; i++)
1373 classes[i] = ATA_DEV_UNKNOWN;
1374
1375 if (ap->ops->probe_reset) {
1376 rc = ap->ops->probe_reset(ap, classes);
1377 if (rc) {
1378 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1379 return rc;
1380 }
1381 } else {
1382 ap->ops->phy_reset(ap);
1383
1384 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1385 for (i = 0; i < ATA_MAX_DEVICES; i++)
1386 classes[i] = ap->device[i].class;
1387
1388 ata_port_probe(ap);
1389 }
1390
1391 for (i = 0; i < ATA_MAX_DEVICES; i++)
1392 if (classes[i] == ATA_DEV_UNKNOWN)
1393 classes[i] = ATA_DEV_NONE;
1394
1395 /* read IDENTIFY page and configure devices */
1396 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1397 struct ata_device *dev = &ap->device[i];
1398
1399 dev->class = classes[i];
1400
1401 if (!ata_dev_present(dev))
1402 continue;
1403
1404 WARN_ON(dev->id != NULL);
1405 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1406 dev->class = ATA_DEV_NONE;
1407 continue;
1408 }
1409
1410 if (ata_dev_configure(ap, dev, 1)) {
1411 ata_dev_disable(ap, dev);
1412 continue;
1413 }
1414
1415 found = 1;
1416 }
1417
1418 if (!found)
1419 goto err_out_disable;
1420
1421 ata_set_mode(ap);
1422 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1423 goto err_out_disable;
1424
1425 return 0;
1426
1427err_out_disable:
1428 ap->ops->port_disable(ap);
1429 return -1;
1430}
1431
1432/**
1433 * ata_port_probe - Mark port as enabled
1434 * @ap: Port for which we indicate enablement
1435 *
1436 * Modify @ap data structure such that the system
1437 * thinks that the entire port is enabled.
1438 *
1439 * LOCKING: host_set lock, or some other form of
1440 * serialization.
1441 */
1442
1443void ata_port_probe(struct ata_port *ap)
1444{
1445 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1446}
1447
1448/**
1449 * sata_print_link_status - Print SATA link status
1450 * @ap: SATA port to printk link status about
1451 *
1452 * This function prints link speed and status of a SATA link.
1453 *
1454 * LOCKING:
1455 * None.
1456 */
1457static void sata_print_link_status(struct ata_port *ap)
1458{
1459 u32 sstatus, tmp;
1460 const char *speed;
1461
1462 if (!ap->ops->scr_read)
1463 return;
1464
1465 sstatus = scr_read(ap, SCR_STATUS);
1466
1467 if (sata_dev_present(ap)) {
1468 tmp = (sstatus >> 4) & 0xf;
1469 if (tmp & (1 << 0))
1470 speed = "1.5";
1471 else if (tmp & (1 << 1))
1472 speed = "3.0";
1473 else
1474 speed = "<unknown>";
1475 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1476 ap->id, speed, sstatus);
1477 } else {
1478 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1479 ap->id, sstatus);
1480 }
1481}
1482
1483/**
1484 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1485 * @ap: SATA port associated with target SATA PHY.
1486 *
1487 * This function issues commands to standard SATA Sxxx
1488 * PHY registers, to wake up the phy (and device), and
1489 * clear any reset condition.
1490 *
1491 * LOCKING:
1492 * PCI/etc. bus probe sem.
1493 *
1494 */
1495void __sata_phy_reset(struct ata_port *ap)
1496{
1497 u32 sstatus;
1498 unsigned long timeout = jiffies + (HZ * 5);
1499
1500 if (ap->flags & ATA_FLAG_SATA_RESET) {
1501 /* issue phy wake/reset */
1502 scr_write_flush(ap, SCR_CONTROL, 0x301);
1503 /* Couldn't find anything in SATA I/II specs, but
1504 * AHCI-1.1 10.4.2 says at least 1 ms. */
1505 mdelay(1);
1506 }
1507 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1508
1509 /* wait for phy to become ready, if necessary */
1510 do {
1511 msleep(200);
1512 sstatus = scr_read(ap, SCR_STATUS);
1513 if ((sstatus & 0xf) != 1)
1514 break;
1515 } while (time_before(jiffies, timeout));
1516
1517 /* print link status */
1518 sata_print_link_status(ap);
1519
1520 /* TODO: phy layer with polling, timeouts, etc. */
1521 if (sata_dev_present(ap))
1522 ata_port_probe(ap);
1523 else
1524 ata_port_disable(ap);
1525
1526 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1527 return;
1528
1529 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1530 ata_port_disable(ap);
1531 return;
1532 }
1533
1534 ap->cbl = ATA_CBL_SATA;
1535}
1536
1537/**
1538 * sata_phy_reset - Reset SATA bus.
1539 * @ap: SATA port associated with target SATA PHY.
1540 *
1541 * This function resets the SATA bus, and then probes
1542 * the bus for devices.
1543 *
1544 * LOCKING:
1545 * PCI/etc. bus probe sem.
1546 *
1547 */
1548void sata_phy_reset(struct ata_port *ap)
1549{
1550 __sata_phy_reset(ap);
1551 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1552 return;
1553 ata_bus_reset(ap);
1554}
1555
1556/**
1557 * ata_dev_pair - return other device on cable
1558 * @ap: port
1559 * @adev: device
1560 *
1561 * Obtain the other device on the same cable, or if none is
1562 * present NULL is returned
1563 */
1564
1565struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1566{
1567 struct ata_device *pair = &ap->device[1 - adev->devno];
1568 if (!ata_dev_present(pair))
1569 return NULL;
1570 return pair;
1571}
1572
1573/**
1574 * ata_port_disable - Disable port.
1575 * @ap: Port to be disabled.
1576 *
1577 * Modify @ap data structure such that the system
1578 * thinks that the entire port is disabled, and should
1579 * never attempt to probe or communicate with devices
1580 * on this port.
1581 *
1582 * LOCKING: host_set lock, or some other form of
1583 * serialization.
1584 */
1585
1586void ata_port_disable(struct ata_port *ap)
1587{
1588 ap->device[0].class = ATA_DEV_NONE;
1589 ap->device[1].class = ATA_DEV_NONE;
1590 ap->flags |= ATA_FLAG_PORT_DISABLED;
1591}
1592
1593/*
1594 * This mode timing computation functionality is ported over from
1595 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1596 */
1597/*
1598 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1599 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1600 * for PIO 5, which is a nonstandard extension and UDMA6, which
1601 * is currently supported only by Maxtor drives.
1602 */
1603
1604static const struct ata_timing ata_timing[] = {
1605
1606 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1607 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1608 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1609 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1610
1611 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1612 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1613 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1614
1615/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1616
1617 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1618 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1619 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1620
1621 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1622 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1623 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1624
1625/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1626 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1627 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1628
1629 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1630 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1631 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1632
1633/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1634
1635 { 0xFF }
1636};
1637
1638#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1639#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1640
1641static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1642{
1643 q->setup = EZ(t->setup * 1000, T);
1644 q->act8b = EZ(t->act8b * 1000, T);
1645 q->rec8b = EZ(t->rec8b * 1000, T);
1646 q->cyc8b = EZ(t->cyc8b * 1000, T);
1647 q->active = EZ(t->active * 1000, T);
1648 q->recover = EZ(t->recover * 1000, T);
1649 q->cycle = EZ(t->cycle * 1000, T);
1650 q->udma = EZ(t->udma * 1000, UT);
1651}
1652
1653void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1654 struct ata_timing *m, unsigned int what)
1655{
1656 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1657 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1658 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1659 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1660 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1661 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1662 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1663 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1664}
1665
1666static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1667{
1668 const struct ata_timing *t;
1669
1670 for (t = ata_timing; t->mode != speed; t++)
1671 if (t->mode == 0xFF)
1672 return NULL;
1673 return t;
1674}
1675
1676int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1677 struct ata_timing *t, int T, int UT)
1678{
1679 const struct ata_timing *s;
1680 struct ata_timing p;
1681
1682 /*
1683 * Find the mode.
1684 */
1685
1686 if (!(s = ata_timing_find_mode(speed)))
1687 return -EINVAL;
1688
1689 memcpy(t, s, sizeof(*s));
1690
1691 /*
1692 * If the drive is an EIDE drive, it can tell us it needs extended
1693 * PIO/MW_DMA cycle timing.
1694 */
1695
1696 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1697 memset(&p, 0, sizeof(p));
1698 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1699 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1700 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1701 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1702 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1703 }
1704 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1705 }
1706
1707 /*
1708 * Convert the timing to bus clock counts.
1709 */
1710
1711 ata_timing_quantize(t, t, T, UT);
1712
1713 /*
1714 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1715 * S.M.A.R.T * and some other commands. We have to ensure that the
1716 * DMA cycle timing is slower/equal than the fastest PIO timing.
1717 */
1718
1719 if (speed > XFER_PIO_4) {
1720 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1721 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1722 }
1723
1724 /*
1725 * Lengthen active & recovery time so that cycle time is correct.
1726 */
1727
1728 if (t->act8b + t->rec8b < t->cyc8b) {
1729 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1730 t->rec8b = t->cyc8b - t->act8b;
1731 }
1732
1733 if (t->active + t->recover < t->cycle) {
1734 t->active += (t->cycle - (t->active + t->recover)) / 2;
1735 t->recover = t->cycle - t->active;
1736 }
1737
1738 return 0;
1739}
1740
1741static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1742{
1743 unsigned int err_mask;
1744 int rc;
1745
1746 if (dev->xfer_shift == ATA_SHIFT_PIO)
1747 dev->flags |= ATA_DFLAG_PIO;
1748
1749 err_mask = ata_dev_set_xfermode(ap, dev);
1750 if (err_mask) {
1751 printk(KERN_ERR
1752 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1753 ap->id, err_mask);
1754 return -EIO;
1755 }
1756
1757 rc = ata_dev_revalidate(ap, dev, 0);
1758 if (rc) {
1759 printk(KERN_ERR
1760 "ata%u: failed to revalidate after set xfermode\n",
1761 ap->id);
1762 return rc;
1763 }
1764
1765 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1766 dev->xfer_shift, (int)dev->xfer_mode);
1767
1768 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1769 ap->id, dev->devno,
1770 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1771 return 0;
1772}
1773
1774static int ata_host_set_pio(struct ata_port *ap)
1775{
1776 int i;
1777
1778 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1779 struct ata_device *dev = &ap->device[i];
1780
1781 if (!ata_dev_present(dev))
1782 continue;
1783
1784 if (!dev->pio_mode) {
1785 printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
1786 return -1;
1787 }
1788
1789 dev->xfer_mode = dev->pio_mode;
1790 dev->xfer_shift = ATA_SHIFT_PIO;
1791 if (ap->ops->set_piomode)
1792 ap->ops->set_piomode(ap, dev);
1793 }
1794
1795 return 0;
1796}
1797
1798static void ata_host_set_dma(struct ata_port *ap)
1799{
1800 int i;
1801
1802 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1803 struct ata_device *dev = &ap->device[i];
1804
1805 if (!ata_dev_present(dev) || !dev->dma_mode)
1806 continue;
1807
1808 dev->xfer_mode = dev->dma_mode;
1809 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1810 if (ap->ops->set_dmamode)
1811 ap->ops->set_dmamode(ap, dev);
1812 }
1813}
1814
1815/**
1816 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1817 * @ap: port on which timings will be programmed
1818 *
1819 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1820 *
1821 * LOCKING:
1822 * PCI/etc. bus probe sem.
1823 */
1824static void ata_set_mode(struct ata_port *ap)
1825{
1826 int i, rc;
1827
1828 /* step 1: calculate xfer_mask */
1829 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1830 struct ata_device *dev = &ap->device[i];
1831 unsigned int pio_mask, dma_mask;
1832
1833 if (!ata_dev_present(dev))
1834 continue;
1835
1836 ata_dev_xfermask(ap, dev);
1837
1838 /* TODO: let LLDD filter dev->*_mask here */
1839
1840 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1841 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1842 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1843 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
1844 }
1845
1846 /* step 2: always set host PIO timings */
1847 rc = ata_host_set_pio(ap);
1848 if (rc)
1849 goto err_out;
1850
1851 /* step 3: set host DMA timings */
1852 ata_host_set_dma(ap);
1853
1854 /* step 4: update devices' xfer mode */
1855 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1856 struct ata_device *dev = &ap->device[i];
1857
1858 if (!ata_dev_present(dev))
1859 continue;
1860
1861 if (ata_dev_set_mode(ap, dev))
1862 goto err_out;
1863 }
1864
1865 if (ap->ops->post_set_mode)
1866 ap->ops->post_set_mode(ap);
1867
1868 return;
1869
1870err_out:
1871 ata_port_disable(ap);
1872}
1873
1874/**
1875 * ata_tf_to_host - issue ATA taskfile to host controller
1876 * @ap: port to which command is being issued
1877 * @tf: ATA taskfile register set
1878 *
1879 * Issues ATA taskfile register set to ATA host controller,
1880 * with proper synchronization with interrupt handler and
1881 * other threads.
1882 *
1883 * LOCKING:
1884 * spin_lock_irqsave(host_set lock)
1885 */
1886
1887static inline void ata_tf_to_host(struct ata_port *ap,
1888 const struct ata_taskfile *tf)
1889{
1890 ap->ops->tf_load(ap, tf);
1891 ap->ops->exec_command(ap, tf);
1892}
1893
1894/**
1895 * ata_busy_sleep - sleep until BSY clears, or timeout
1896 * @ap: port containing status register to be polled
1897 * @tmout_pat: impatience timeout
1898 * @tmout: overall timeout
1899 *
1900 * Sleep until ATA Status register bit BSY clears,
1901 * or a timeout occurs.
1902 *
1903 * LOCKING: None.
1904 */
1905
1906unsigned int ata_busy_sleep (struct ata_port *ap,
1907 unsigned long tmout_pat, unsigned long tmout)
1908{
1909 unsigned long timer_start, timeout;
1910 u8 status;
1911
1912 status = ata_busy_wait(ap, ATA_BUSY, 300);
1913 timer_start = jiffies;
1914 timeout = timer_start + tmout_pat;
1915 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1916 msleep(50);
1917 status = ata_busy_wait(ap, ATA_BUSY, 3);
1918 }
1919
1920 if (status & ATA_BUSY)
1921 printk(KERN_WARNING "ata%u is slow to respond, "
1922 "please be patient\n", ap->id);
1923
1924 timeout = timer_start + tmout;
1925 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1926 msleep(50);
1927 status = ata_chk_status(ap);
1928 }
1929
1930 if (status & ATA_BUSY) {
1931 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1932 ap->id, tmout / HZ);
1933 return 1;
1934 }
1935
1936 return 0;
1937}
1938
1939static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1940{
1941 struct ata_ioports *ioaddr = &ap->ioaddr;
1942 unsigned int dev0 = devmask & (1 << 0);
1943 unsigned int dev1 = devmask & (1 << 1);
1944 unsigned long timeout;
1945
1946 /* if device 0 was found in ata_devchk, wait for its
1947 * BSY bit to clear
1948 */
1949 if (dev0)
1950 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1951
1952 /* if device 1 was found in ata_devchk, wait for
1953 * register access, then wait for BSY to clear
1954 */
1955 timeout = jiffies + ATA_TMOUT_BOOT;
1956 while (dev1) {
1957 u8 nsect, lbal;
1958
1959 ap->ops->dev_select(ap, 1);
1960 if (ap->flags & ATA_FLAG_MMIO) {
1961 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1962 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1963 } else {
1964 nsect = inb(ioaddr->nsect_addr);
1965 lbal = inb(ioaddr->lbal_addr);
1966 }
1967 if ((nsect == 1) && (lbal == 1))
1968 break;
1969 if (time_after(jiffies, timeout)) {
1970 dev1 = 0;
1971 break;
1972 }
1973 msleep(50); /* give drive a breather */
1974 }
1975 if (dev1)
1976 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1977
1978 /* is all this really necessary? */
1979 ap->ops->dev_select(ap, 0);
1980 if (dev1)
1981 ap->ops->dev_select(ap, 1);
1982 if (dev0)
1983 ap->ops->dev_select(ap, 0);
1984}
1985
1986static unsigned int ata_bus_softreset(struct ata_port *ap,
1987 unsigned int devmask)
1988{
1989 struct ata_ioports *ioaddr = &ap->ioaddr;
1990
1991 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1992
1993 /* software reset. causes dev0 to be selected */
1994 if (ap->flags & ATA_FLAG_MMIO) {
1995 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1996 udelay(20); /* FIXME: flush */
1997 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1998 udelay(20); /* FIXME: flush */
1999 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2000 } else {
2001 outb(ap->ctl, ioaddr->ctl_addr);
2002 udelay(10);
2003 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2004 udelay(10);
2005 outb(ap->ctl, ioaddr->ctl_addr);
2006 }
2007
2008 /* spec mandates ">= 2ms" before checking status.
2009 * We wait 150ms, because that was the magic delay used for
2010 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2011 * between when the ATA command register is written, and then
2012 * status is checked. Because waiting for "a while" before
2013 * checking status is fine, post SRST, we perform this magic
2014 * delay here as well.
2015 *
2016 * Old drivers/ide uses the 2mS rule and then waits for ready
2017 */
2018 msleep(150);
2019
2020
2021 /* Before we perform post reset processing we want to see if
2022 the bus shows 0xFF because the odd clown forgets the D7 pulldown
2023 resistor */
2024
2025 if (ata_check_status(ap) == 0xFF)
2026 return 1; /* Positive is failure for some reason */
2027
2028 ata_bus_post_reset(ap, devmask);
2029
2030 return 0;
2031}
2032
2033/**
2034 * ata_bus_reset - reset host port and associated ATA channel
2035 * @ap: port to reset
2036 *
2037 * This is typically the first time we actually start issuing
2038 * commands to the ATA channel. We wait for BSY to clear, then
2039 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2040 * result. Determine what devices, if any, are on the channel
2041 * by looking at the device 0/1 error register. Look at the signature
2042 * stored in each device's taskfile registers, to determine if
2043 * the device is ATA or ATAPI.
2044 *
2045 * LOCKING:
2046 * PCI/etc. bus probe sem.
2047 * Obtains host_set lock.
2048 *
2049 * SIDE EFFECTS:
2050 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2051 */
2052
2053void ata_bus_reset(struct ata_port *ap)
2054{
2055 struct ata_ioports *ioaddr = &ap->ioaddr;
2056 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2057 u8 err;
2058 unsigned int dev0, dev1 = 0, devmask = 0;
2059
2060 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2061
2062 /* determine if device 0/1 are present */
2063 if (ap->flags & ATA_FLAG_SATA_RESET)
2064 dev0 = 1;
2065 else {
2066 dev0 = ata_devchk(ap, 0);
2067 if (slave_possible)
2068 dev1 = ata_devchk(ap, 1);
2069 }
2070
2071 if (dev0)
2072 devmask |= (1 << 0);
2073 if (dev1)
2074 devmask |= (1 << 1);
2075
2076 /* select device 0 again */
2077 ap->ops->dev_select(ap, 0);
2078
2079 /* issue bus reset */
2080 if (ap->flags & ATA_FLAG_SRST)
2081 if (ata_bus_softreset(ap, devmask))
2082 goto err_out;
2083
2084 /*
2085 * determine by signature whether we have ATA or ATAPI devices
2086 */
2087 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2088 if ((slave_possible) && (err != 0x81))
2089 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2090
2091 /* re-enable interrupts */
2092 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2093 ata_irq_on(ap);
2094
2095 /* is double-select really necessary? */
2096 if (ap->device[1].class != ATA_DEV_NONE)
2097 ap->ops->dev_select(ap, 1);
2098 if (ap->device[0].class != ATA_DEV_NONE)
2099 ap->ops->dev_select(ap, 0);
2100
2101 /* if no devices were detected, disable this port */
2102 if ((ap->device[0].class == ATA_DEV_NONE) &&
2103 (ap->device[1].class == ATA_DEV_NONE))
2104 goto err_out;
2105
2106 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2107 /* set up device control for ATA_FLAG_SATA_RESET */
2108 if (ap->flags & ATA_FLAG_MMIO)
2109 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2110 else
2111 outb(ap->ctl, ioaddr->ctl_addr);
2112 }
2113
2114 DPRINTK("EXIT\n");
2115 return;
2116
2117err_out:
2118 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2119 ap->ops->port_disable(ap);
2120
2121 DPRINTK("EXIT\n");
2122}
2123
2124static int sata_phy_resume(struct ata_port *ap)
2125{
2126 unsigned long timeout = jiffies + (HZ * 5);
2127 u32 sstatus;
2128
2129 scr_write_flush(ap, SCR_CONTROL, 0x300);
2130
2131 /* Wait for phy to become ready, if necessary. */
2132 do {
2133 msleep(200);
2134 sstatus = scr_read(ap, SCR_STATUS);
2135 if ((sstatus & 0xf) != 1)
2136 return 0;
2137 } while (time_before(jiffies, timeout));
2138
2139 return -1;
2140}
2141
2142/**
2143 * ata_std_probeinit - initialize probing
2144 * @ap: port to be probed
2145 *
2146 * @ap is about to be probed. Initialize it. This function is
2147 * to be used as standard callback for ata_drive_probe_reset().
2148 *
2149 * NOTE!!! Do not use this function as probeinit if a low level
2150 * driver implements only hardreset. Just pass NULL as probeinit
2151 * in that case. Using this function is probably okay but doing
2152 * so makes reset sequence different from the original
2153 * ->phy_reset implementation and Jeff nervous. :-P
2154 */
2155extern void ata_std_probeinit(struct ata_port *ap)
2156{
2157 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
2158 sata_phy_resume(ap);
2159 if (sata_dev_present(ap))
2160 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2161 }
2162}
2163
2164/**
2165 * ata_std_softreset - reset host port via ATA SRST
2166 * @ap: port to reset
2167 * @verbose: fail verbosely
2168 * @classes: resulting classes of attached devices
2169 *
2170 * Reset host port using ATA SRST. This function is to be used
2171 * as standard callback for ata_drive_*_reset() functions.
2172 *
2173 * LOCKING:
2174 * Kernel thread context (may sleep)
2175 *
2176 * RETURNS:
2177 * 0 on success, -errno otherwise.
2178 */
2179int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2180{
2181 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2182 unsigned int devmask = 0, err_mask;
2183 u8 err;
2184
2185 DPRINTK("ENTER\n");
2186
2187 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2188 classes[0] = ATA_DEV_NONE;
2189 goto out;
2190 }
2191
2192 /* determine if device 0/1 are present */
2193 if (ata_devchk(ap, 0))
2194 devmask |= (1 << 0);
2195 if (slave_possible && ata_devchk(ap, 1))
2196 devmask |= (1 << 1);
2197
2198 /* select device 0 again */
2199 ap->ops->dev_select(ap, 0);
2200
2201 /* issue bus reset */
2202 DPRINTK("about to softreset, devmask=%x\n", devmask);
2203 err_mask = ata_bus_softreset(ap, devmask);
2204 if (err_mask) {
2205 if (verbose)
2206 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2207 ap->id, err_mask);
2208 else
2209 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2210 err_mask);
2211 return -EIO;
2212 }
2213
2214 /* determine by signature whether we have ATA or ATAPI devices */
2215 classes[0] = ata_dev_try_classify(ap, 0, &err);
2216 if (slave_possible && err != 0x81)
2217 classes[1] = ata_dev_try_classify(ap, 1, &err);
2218
2219 out:
2220 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2221 return 0;
2222}
2223
2224/**
2225 * sata_std_hardreset - reset host port via SATA phy reset
2226 * @ap: port to reset
2227 * @verbose: fail verbosely
2228 * @class: resulting class of attached device
2229 *
2230 * SATA phy-reset host port using DET bits of SControl register.
2231 * This function is to be used as standard callback for
2232 * ata_drive_*_reset().
2233 *
2234 * LOCKING:
2235 * Kernel thread context (may sleep)
2236 *
2237 * RETURNS:
2238 * 0 on success, -errno otherwise.
2239 */
2240int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2241{
2242 DPRINTK("ENTER\n");
2243
2244 /* Issue phy wake/reset */
2245 scr_write_flush(ap, SCR_CONTROL, 0x301);
2246
2247 /*
2248 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2249 * 10.4.2 says at least 1 ms.
2250 */
2251 msleep(1);
2252
2253 /* Bring phy back */
2254 sata_phy_resume(ap);
2255
2256 /* TODO: phy layer with polling, timeouts, etc. */
2257 if (!sata_dev_present(ap)) {
2258 *class = ATA_DEV_NONE;
2259 DPRINTK("EXIT, link offline\n");
2260 return 0;
2261 }
2262
2263 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2264 if (verbose)
2265 printk(KERN_ERR "ata%u: COMRESET failed "
2266 "(device not ready)\n", ap->id);
2267 else
2268 DPRINTK("EXIT, device not ready\n");
2269 return -EIO;
2270 }
2271
2272 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2273
2274 *class = ata_dev_try_classify(ap, 0, NULL);
2275
2276 DPRINTK("EXIT, class=%u\n", *class);
2277 return 0;
2278}
2279
2280/**
2281 * ata_std_postreset - standard postreset callback
2282 * @ap: the target ata_port
2283 * @classes: classes of attached devices
2284 *
2285 * This function is invoked after a successful reset. Note that
2286 * the device might have been reset more than once using
2287 * different reset methods before postreset is invoked.
2288 *
2289 * This function is to be used as standard callback for
2290 * ata_drive_*_reset().
2291 *
2292 * LOCKING:
2293 * Kernel thread context (may sleep)
2294 */
2295void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2296{
2297 DPRINTK("ENTER\n");
2298
2299 /* set cable type if it isn't already set */
2300 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2301 ap->cbl = ATA_CBL_SATA;
2302
2303 /* print link status */
2304 if (ap->cbl == ATA_CBL_SATA)
2305 sata_print_link_status(ap);
2306
2307 /* re-enable interrupts */
2308 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2309 ata_irq_on(ap);
2310
2311 /* is double-select really necessary? */
2312 if (classes[0] != ATA_DEV_NONE)
2313 ap->ops->dev_select(ap, 1);
2314 if (classes[1] != ATA_DEV_NONE)
2315 ap->ops->dev_select(ap, 0);
2316
2317 /* bail out if no device is present */
2318 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2319 DPRINTK("EXIT, no device\n");
2320 return;
2321 }
2322
2323 /* set up device control */
2324 if (ap->ioaddr.ctl_addr) {
2325 if (ap->flags & ATA_FLAG_MMIO)
2326 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2327 else
2328 outb(ap->ctl, ap->ioaddr.ctl_addr);
2329 }
2330
2331 DPRINTK("EXIT\n");
2332}
2333
2334/**
2335 * ata_std_probe_reset - standard probe reset method
2336 * @ap: prot to perform probe-reset
2337 * @classes: resulting classes of attached devices
2338 *
2339 * The stock off-the-shelf ->probe_reset method.
2340 *
2341 * LOCKING:
2342 * Kernel thread context (may sleep)
2343 *
2344 * RETURNS:
2345 * 0 on success, -errno otherwise.
2346 */
2347int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2348{
2349 ata_reset_fn_t hardreset;
2350
2351 hardreset = NULL;
2352 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
2353 hardreset = sata_std_hardreset;
2354
2355 return ata_drive_probe_reset(ap, ata_std_probeinit,
2356 ata_std_softreset, hardreset,
2357 ata_std_postreset, classes);
2358}
2359
2360static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2361 ata_postreset_fn_t postreset,
2362 unsigned int *classes)
2363{
2364 int i, rc;
2365
2366 for (i = 0; i < ATA_MAX_DEVICES; i++)
2367 classes[i] = ATA_DEV_UNKNOWN;
2368
2369 rc = reset(ap, 0, classes);
2370 if (rc)
2371 return rc;
2372
2373 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2374 * is complete and convert all ATA_DEV_UNKNOWN to
2375 * ATA_DEV_NONE.
2376 */
2377 for (i = 0; i < ATA_MAX_DEVICES; i++)
2378 if (classes[i] != ATA_DEV_UNKNOWN)
2379 break;
2380
2381 if (i < ATA_MAX_DEVICES)
2382 for (i = 0; i < ATA_MAX_DEVICES; i++)
2383 if (classes[i] == ATA_DEV_UNKNOWN)
2384 classes[i] = ATA_DEV_NONE;
2385
2386 if (postreset)
2387 postreset(ap, classes);
2388
2389 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2390}
2391
2392/**
2393 * ata_drive_probe_reset - Perform probe reset with given methods
2394 * @ap: port to reset
2395 * @probeinit: probeinit method (can be NULL)
2396 * @softreset: softreset method (can be NULL)
2397 * @hardreset: hardreset method (can be NULL)
2398 * @postreset: postreset method (can be NULL)
2399 * @classes: resulting classes of attached devices
2400 *
2401 * Reset the specified port and classify attached devices using
2402 * given methods. This function prefers softreset but tries all
2403 * possible reset sequences to reset and classify devices. This
2404 * function is intended to be used for constructing ->probe_reset
2405 * callback by low level drivers.
2406 *
2407 * Reset methods should follow the following rules.
2408 *
2409 * - Return 0 on sucess, -errno on failure.
2410 * - If classification is supported, fill classes[] with
2411 * recognized class codes.
2412 * - If classification is not supported, leave classes[] alone.
2413 * - If verbose is non-zero, print error message on failure;
2414 * otherwise, shut up.
2415 *
2416 * LOCKING:
2417 * Kernel thread context (may sleep)
2418 *
2419 * RETURNS:
2420 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2421 * if classification fails, and any error code from reset
2422 * methods.
2423 */
2424int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2425 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2426 ata_postreset_fn_t postreset, unsigned int *classes)
2427{
2428 int rc = -EINVAL;
2429
2430 if (probeinit)
2431 probeinit(ap);
2432
2433 if (softreset) {
2434 rc = do_probe_reset(ap, softreset, postreset, classes);
2435 if (rc == 0)
2436 return 0;
2437 }
2438
2439 if (!hardreset)
2440 return rc;
2441
2442 rc = do_probe_reset(ap, hardreset, postreset, classes);
2443 if (rc == 0 || rc != -ENODEV)
2444 return rc;
2445
2446 if (softreset)
2447 rc = do_probe_reset(ap, softreset, postreset, classes);
2448
2449 return rc;
2450}
2451
2452/**
2453 * ata_dev_same_device - Determine whether new ID matches configured device
2454 * @ap: port on which the device to compare against resides
2455 * @dev: device to compare against
2456 * @new_class: class of the new device
2457 * @new_id: IDENTIFY page of the new device
2458 *
2459 * Compare @new_class and @new_id against @dev and determine
2460 * whether @dev is the device indicated by @new_class and
2461 * @new_id.
2462 *
2463 * LOCKING:
2464 * None.
2465 *
2466 * RETURNS:
2467 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2468 */
2469static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2470 unsigned int new_class, const u16 *new_id)
2471{
2472 const u16 *old_id = dev->id;
2473 unsigned char model[2][41], serial[2][21];
2474 u64 new_n_sectors;
2475
2476 if (dev->class != new_class) {
2477 printk(KERN_INFO
2478 "ata%u: dev %u class mismatch %d != %d\n",
2479 ap->id, dev->devno, dev->class, new_class);
2480 return 0;
2481 }
2482
2483 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2484 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2485 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2486 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2487 new_n_sectors = ata_id_n_sectors(new_id);
2488
2489 if (strcmp(model[0], model[1])) {
2490 printk(KERN_INFO
2491 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2492 ap->id, dev->devno, model[0], model[1]);
2493 return 0;
2494 }
2495
2496 if (strcmp(serial[0], serial[1])) {
2497 printk(KERN_INFO
2498 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2499 ap->id, dev->devno, serial[0], serial[1]);
2500 return 0;
2501 }
2502
2503 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2504 printk(KERN_INFO
2505 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2506 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2507 (unsigned long long)new_n_sectors);
2508 return 0;
2509 }
2510
2511 return 1;
2512}
2513
2514/**
2515 * ata_dev_revalidate - Revalidate ATA device
2516 * @ap: port on which the device to revalidate resides
2517 * @dev: device to revalidate
2518 * @post_reset: is this revalidation after reset?
2519 *
2520 * Re-read IDENTIFY page and make sure @dev is still attached to
2521 * the port.
2522 *
2523 * LOCKING:
2524 * Kernel thread context (may sleep)
2525 *
2526 * RETURNS:
2527 * 0 on success, negative errno otherwise
2528 */
2529int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2530 int post_reset)
2531{
2532 unsigned int class;
2533 u16 *id;
2534 int rc;
2535
2536 if (!ata_dev_present(dev))
2537 return -ENODEV;
2538
2539 class = dev->class;
2540 id = NULL;
2541
2542 /* allocate & read ID data */
2543 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2544 if (rc)
2545 goto fail;
2546
2547 /* is the device still there? */
2548 if (!ata_dev_same_device(ap, dev, class, id)) {
2549 rc = -ENODEV;
2550 goto fail;
2551 }
2552
2553 kfree(dev->id);
2554 dev->id = id;
2555
2556 /* configure device according to the new ID */
2557 return ata_dev_configure(ap, dev, 0);
2558
2559 fail:
2560 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2561 ap->id, dev->devno, rc);
2562 kfree(id);
2563 return rc;
2564}
2565
2566static const char * const ata_dma_blacklist [] = {
2567 "WDC AC11000H", NULL,
2568 "WDC AC22100H", NULL,
2569 "WDC AC32500H", NULL,
2570 "WDC AC33100H", NULL,
2571 "WDC AC31600H", NULL,
2572 "WDC AC32100H", "24.09P07",
2573 "WDC AC23200L", "21.10N21",
2574 "Compaq CRD-8241B", NULL,
2575 "CRD-8400B", NULL,
2576 "CRD-8480B", NULL,
2577 "CRD-8482B", NULL,
2578 "CRD-84", NULL,
2579 "SanDisk SDP3B", NULL,
2580 "SanDisk SDP3B-64", NULL,
2581 "SANYO CD-ROM CRD", NULL,
2582 "HITACHI CDR-8", NULL,
2583 "HITACHI CDR-8335", NULL,
2584 "HITACHI CDR-8435", NULL,
2585 "Toshiba CD-ROM XM-6202B", NULL,
2586 "TOSHIBA CD-ROM XM-1702BC", NULL,
2587 "CD-532E-A", NULL,
2588 "E-IDE CD-ROM CR-840", NULL,
2589 "CD-ROM Drive/F5A", NULL,
2590 "WPI CDD-820", NULL,
2591 "SAMSUNG CD-ROM SC-148C", NULL,
2592 "SAMSUNG CD-ROM SC", NULL,
2593 "SanDisk SDP3B-64", NULL,
2594 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2595 "_NEC DV5800A", NULL,
2596 "SAMSUNG CD-ROM SN-124", "N001"
2597};
2598
2599static int ata_strim(char *s, size_t len)
2600{
2601 len = strnlen(s, len);
2602
2603 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2604 while ((len > 0) && (s[len - 1] == ' ')) {
2605 len--;
2606 s[len] = 0;
2607 }
2608 return len;
2609}
2610
2611static int ata_dma_blacklisted(const struct ata_device *dev)
2612{
2613 unsigned char model_num[40];
2614 unsigned char model_rev[16];
2615 unsigned int nlen, rlen;
2616 int i;
2617
2618 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2619 sizeof(model_num));
2620 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2621 sizeof(model_rev));
2622 nlen = ata_strim(model_num, sizeof(model_num));
2623 rlen = ata_strim(model_rev, sizeof(model_rev));
2624
2625 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2626 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2627 if (ata_dma_blacklist[i+1] == NULL)
2628 return 1;
2629 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2630 return 1;
2631 }
2632 }
2633 return 0;
2634}
2635
2636/**
2637 * ata_dev_xfermask - Compute supported xfermask of the given device
2638 * @ap: Port on which the device to compute xfermask for resides
2639 * @dev: Device to compute xfermask for
2640 *
2641 * Compute supported xfermask of @dev and store it in
2642 * dev->*_mask. This function is responsible for applying all
2643 * known limits including host controller limits, device
2644 * blacklist, etc...
2645 *
2646 * LOCKING:
2647 * None.
2648 */
2649static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
2650{
2651 unsigned long xfer_mask;
2652 int i;
2653
2654 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2655 ap->udma_mask);
2656
2657 /* use port-wide xfermask for now */
2658 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2659 struct ata_device *d = &ap->device[i];
2660 if (!ata_dev_present(d))
2661 continue;
2662 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2663 d->udma_mask);
2664 xfer_mask &= ata_id_xfermask(d->id);
2665 if (ata_dma_blacklisted(d))
2666 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2667 }
2668
2669 if (ata_dma_blacklisted(dev))
2670 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2671 "disabling DMA\n", ap->id, dev->devno);
2672
2673 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2674 &dev->udma_mask);
2675}
2676
2677/**
2678 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2679 * @ap: Port associated with device @dev
2680 * @dev: Device to which command will be sent
2681 *
2682 * Issue SET FEATURES - XFER MODE command to device @dev
2683 * on port @ap.
2684 *
2685 * LOCKING:
2686 * PCI/etc. bus probe sem.
2687 *
2688 * RETURNS:
2689 * 0 on success, AC_ERR_* mask otherwise.
2690 */
2691
2692static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2693 struct ata_device *dev)
2694{
2695 struct ata_taskfile tf;
2696 unsigned int err_mask;
2697
2698 /* set up set-features taskfile */
2699 DPRINTK("set features - xfer mode\n");
2700
2701 ata_tf_init(ap, &tf, dev->devno);
2702 tf.command = ATA_CMD_SET_FEATURES;
2703 tf.feature = SETFEATURES_XFER;
2704 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2705 tf.protocol = ATA_PROT_NODATA;
2706 tf.nsect = dev->xfer_mode;
2707
2708 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2709
2710 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2711 return err_mask;
2712}
2713
2714/**
2715 * ata_dev_init_params - Issue INIT DEV PARAMS command
2716 * @ap: Port associated with device @dev
2717 * @dev: Device to which command will be sent
2718 *
2719 * LOCKING:
2720 * Kernel thread context (may sleep)
2721 *
2722 * RETURNS:
2723 * 0 on success, AC_ERR_* mask otherwise.
2724 */
2725
2726static unsigned int ata_dev_init_params(struct ata_port *ap,
2727 struct ata_device *dev)
2728{
2729 struct ata_taskfile tf;
2730 unsigned int err_mask;
2731 u16 sectors = dev->id[6];
2732 u16 heads = dev->id[3];
2733
2734 /* Number of sectors per track 1-255. Number of heads 1-16 */
2735 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2736 return 0;
2737
2738 /* set up init dev params taskfile */
2739 DPRINTK("init dev params \n");
2740
2741 ata_tf_init(ap, &tf, dev->devno);
2742 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2743 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2744 tf.protocol = ATA_PROT_NODATA;
2745 tf.nsect = sectors;
2746 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2747
2748 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2749
2750 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2751 return err_mask;
2752}
2753
2754/**
2755 * ata_sg_clean - Unmap DMA memory associated with command
2756 * @qc: Command containing DMA memory to be released
2757 *
2758 * Unmap all mapped DMA memory associated with this command.
2759 *
2760 * LOCKING:
2761 * spin_lock_irqsave(host_set lock)
2762 */
2763
2764static void ata_sg_clean(struct ata_queued_cmd *qc)
2765{
2766 struct ata_port *ap = qc->ap;
2767 struct scatterlist *sg = qc->__sg;
2768 int dir = qc->dma_dir;
2769 void *pad_buf = NULL;
2770
2771 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2772 WARN_ON(sg == NULL);
2773
2774 if (qc->flags & ATA_QCFLAG_SINGLE)
2775 WARN_ON(qc->n_elem > 1);
2776
2777 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2778
2779 /* if we padded the buffer out to 32-bit bound, and data
2780 * xfer direction is from-device, we must copy from the
2781 * pad buffer back into the supplied buffer
2782 */
2783 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2784 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2785
2786 if (qc->flags & ATA_QCFLAG_SG) {
2787 if (qc->n_elem)
2788 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
2789 /* restore last sg */
2790 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2791 if (pad_buf) {
2792 struct scatterlist *psg = &qc->pad_sgent;
2793 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2794 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2795 kunmap_atomic(addr, KM_IRQ0);
2796 }
2797 } else {
2798 if (qc->n_elem)
2799 dma_unmap_single(ap->dev,
2800 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2801 dir);
2802 /* restore sg */
2803 sg->length += qc->pad_len;
2804 if (pad_buf)
2805 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2806 pad_buf, qc->pad_len);
2807 }
2808
2809 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2810 qc->__sg = NULL;
2811}
2812
2813/**
2814 * ata_fill_sg - Fill PCI IDE PRD table
2815 * @qc: Metadata associated with taskfile to be transferred
2816 *
2817 * Fill PCI IDE PRD (scatter-gather) table with segments
2818 * associated with the current disk command.
2819 *
2820 * LOCKING:
2821 * spin_lock_irqsave(host_set lock)
2822 *
2823 */
2824static void ata_fill_sg(struct ata_queued_cmd *qc)
2825{
2826 struct ata_port *ap = qc->ap;
2827 struct scatterlist *sg;
2828 unsigned int idx;
2829
2830 WARN_ON(qc->__sg == NULL);
2831 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
2832
2833 idx = 0;
2834 ata_for_each_sg(sg, qc) {
2835 u32 addr, offset;
2836 u32 sg_len, len;
2837
2838 /* determine if physical DMA addr spans 64K boundary.
2839 * Note h/w doesn't support 64-bit, so we unconditionally
2840 * truncate dma_addr_t to u32.
2841 */
2842 addr = (u32) sg_dma_address(sg);
2843 sg_len = sg_dma_len(sg);
2844
2845 while (sg_len) {
2846 offset = addr & 0xffff;
2847 len = sg_len;
2848 if ((offset + sg_len) > 0x10000)
2849 len = 0x10000 - offset;
2850
2851 ap->prd[idx].addr = cpu_to_le32(addr);
2852 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2853 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2854
2855 idx++;
2856 sg_len -= len;
2857 addr += len;
2858 }
2859 }
2860
2861 if (idx)
2862 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2863}
2864/**
2865 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2866 * @qc: Metadata associated with taskfile to check
2867 *
2868 * Allow low-level driver to filter ATA PACKET commands, returning
2869 * a status indicating whether or not it is OK to use DMA for the
2870 * supplied PACKET command.
2871 *
2872 * LOCKING:
2873 * spin_lock_irqsave(host_set lock)
2874 *
2875 * RETURNS: 0 when ATAPI DMA can be used
2876 * nonzero otherwise
2877 */
2878int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2879{
2880 struct ata_port *ap = qc->ap;
2881 int rc = 0; /* Assume ATAPI DMA is OK by default */
2882
2883 if (ap->ops->check_atapi_dma)
2884 rc = ap->ops->check_atapi_dma(qc);
2885
2886 return rc;
2887}
2888/**
2889 * ata_qc_prep - Prepare taskfile for submission
2890 * @qc: Metadata associated with taskfile to be prepared
2891 *
2892 * Prepare ATA taskfile for submission.
2893 *
2894 * LOCKING:
2895 * spin_lock_irqsave(host_set lock)
2896 */
2897void ata_qc_prep(struct ata_queued_cmd *qc)
2898{
2899 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2900 return;
2901
2902 ata_fill_sg(qc);
2903}
2904
2905void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2906
2907/**
2908 * ata_sg_init_one - Associate command with memory buffer
2909 * @qc: Command to be associated
2910 * @buf: Memory buffer
2911 * @buflen: Length of memory buffer, in bytes.
2912 *
2913 * Initialize the data-related elements of queued_cmd @qc
2914 * to point to a single memory buffer, @buf of byte length @buflen.
2915 *
2916 * LOCKING:
2917 * spin_lock_irqsave(host_set lock)
2918 */
2919
2920void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2921{
2922 struct scatterlist *sg;
2923
2924 qc->flags |= ATA_QCFLAG_SINGLE;
2925
2926 memset(&qc->sgent, 0, sizeof(qc->sgent));
2927 qc->__sg = &qc->sgent;
2928 qc->n_elem = 1;
2929 qc->orig_n_elem = 1;
2930 qc->buf_virt = buf;
2931
2932 sg = qc->__sg;
2933 sg_init_one(sg, buf, buflen);
2934}
2935
2936/**
2937 * ata_sg_init - Associate command with scatter-gather table.
2938 * @qc: Command to be associated
2939 * @sg: Scatter-gather table.
2940 * @n_elem: Number of elements in s/g table.
2941 *
2942 * Initialize the data-related elements of queued_cmd @qc
2943 * to point to a scatter-gather table @sg, containing @n_elem
2944 * elements.
2945 *
2946 * LOCKING:
2947 * spin_lock_irqsave(host_set lock)
2948 */
2949
2950void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2951 unsigned int n_elem)
2952{
2953 qc->flags |= ATA_QCFLAG_SG;
2954 qc->__sg = sg;
2955 qc->n_elem = n_elem;
2956 qc->orig_n_elem = n_elem;
2957}
2958
2959/**
2960 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2961 * @qc: Command with memory buffer to be mapped.
2962 *
2963 * DMA-map the memory buffer associated with queued_cmd @qc.
2964 *
2965 * LOCKING:
2966 * spin_lock_irqsave(host_set lock)
2967 *
2968 * RETURNS:
2969 * Zero on success, negative on error.
2970 */
2971
2972static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2973{
2974 struct ata_port *ap = qc->ap;
2975 int dir = qc->dma_dir;
2976 struct scatterlist *sg = qc->__sg;
2977 dma_addr_t dma_address;
2978 int trim_sg = 0;
2979
2980 /* we must lengthen transfers to end on a 32-bit boundary */
2981 qc->pad_len = sg->length & 3;
2982 if (qc->pad_len) {
2983 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2984 struct scatterlist *psg = &qc->pad_sgent;
2985
2986 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
2987
2988 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2989
2990 if (qc->tf.flags & ATA_TFLAG_WRITE)
2991 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2992 qc->pad_len);
2993
2994 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2995 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2996 /* trim sg */
2997 sg->length -= qc->pad_len;
2998 if (sg->length == 0)
2999 trim_sg = 1;
3000
3001 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3002 sg->length, qc->pad_len);
3003 }
3004
3005 if (trim_sg) {
3006 qc->n_elem--;
3007 goto skip_map;
3008 }
3009
3010 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3011 sg->length, dir);
3012 if (dma_mapping_error(dma_address)) {
3013 /* restore sg */
3014 sg->length += qc->pad_len;
3015 return -1;
3016 }
3017
3018 sg_dma_address(sg) = dma_address;
3019 sg_dma_len(sg) = sg->length;
3020
3021skip_map:
3022 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3023 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3024
3025 return 0;
3026}
3027
3028/**
3029 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3030 * @qc: Command with scatter-gather table to be mapped.
3031 *
3032 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3033 *
3034 * LOCKING:
3035 * spin_lock_irqsave(host_set lock)
3036 *
3037 * RETURNS:
3038 * Zero on success, negative on error.
3039 *
3040 */
3041
3042static int ata_sg_setup(struct ata_queued_cmd *qc)
3043{
3044 struct ata_port *ap = qc->ap;
3045 struct scatterlist *sg = qc->__sg;
3046 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3047 int n_elem, pre_n_elem, dir, trim_sg = 0;
3048
3049 VPRINTK("ENTER, ata%u\n", ap->id);
3050 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3051
3052 /* we must lengthen transfers to end on a 32-bit boundary */
3053 qc->pad_len = lsg->length & 3;
3054 if (qc->pad_len) {
3055 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3056 struct scatterlist *psg = &qc->pad_sgent;
3057 unsigned int offset;
3058
3059 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3060
3061 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3062
3063 /*
3064 * psg->page/offset are used to copy to-be-written
3065 * data in this function or read data in ata_sg_clean.
3066 */
3067 offset = lsg->offset + lsg->length - qc->pad_len;
3068 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3069 psg->offset = offset_in_page(offset);
3070
3071 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3072 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3073 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3074 kunmap_atomic(addr, KM_IRQ0);
3075 }
3076
3077 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3078 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3079 /* trim last sg */
3080 lsg->length -= qc->pad_len;
3081 if (lsg->length == 0)
3082 trim_sg = 1;
3083
3084 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3085 qc->n_elem - 1, lsg->length, qc->pad_len);
3086 }
3087
3088 pre_n_elem = qc->n_elem;
3089 if (trim_sg && pre_n_elem)
3090 pre_n_elem--;
3091
3092 if (!pre_n_elem) {
3093 n_elem = 0;
3094 goto skip_map;
3095 }
3096
3097 dir = qc->dma_dir;
3098 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3099 if (n_elem < 1) {
3100 /* restore last sg */
3101 lsg->length += qc->pad_len;
3102 return -1;
3103 }
3104
3105 DPRINTK("%d sg elements mapped\n", n_elem);
3106
3107skip_map:
3108 qc->n_elem = n_elem;
3109
3110 return 0;
3111}
3112
3113/**
3114 * ata_poll_qc_complete - turn irq back on and finish qc
3115 * @qc: Command to complete
3116 * @err_mask: ATA status register content
3117 *
3118 * LOCKING:
3119 * None. (grabs host lock)
3120 */
3121
3122void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3123{
3124 struct ata_port *ap = qc->ap;
3125 unsigned long flags;
3126
3127 spin_lock_irqsave(&ap->host_set->lock, flags);
3128 ata_irq_on(ap);
3129 ata_qc_complete(qc);
3130 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3131}
3132
3133/**
3134 * swap_buf_le16 - swap halves of 16-bit words in place
3135 * @buf: Buffer to swap
3136 * @buf_words: Number of 16-bit words in buffer.
3137 *
3138 * Swap halves of 16-bit words if needed to convert from
3139 * little-endian byte order to native cpu byte order, or
3140 * vice-versa.
3141 *
3142 * LOCKING:
3143 * Inherited from caller.
3144 */
3145void swap_buf_le16(u16 *buf, unsigned int buf_words)
3146{
3147#ifdef __BIG_ENDIAN
3148 unsigned int i;
3149
3150 for (i = 0; i < buf_words; i++)
3151 buf[i] = le16_to_cpu(buf[i]);
3152#endif /* __BIG_ENDIAN */
3153}
3154
3155/**
3156 * ata_mmio_data_xfer - Transfer data by MMIO
3157 * @ap: port to read/write
3158 * @buf: data buffer
3159 * @buflen: buffer length
3160 * @write_data: read/write
3161 *
3162 * Transfer data from/to the device data register by MMIO.
3163 *
3164 * LOCKING:
3165 * Inherited from caller.
3166 */
3167
3168static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3169 unsigned int buflen, int write_data)
3170{
3171 unsigned int i;
3172 unsigned int words = buflen >> 1;
3173 u16 *buf16 = (u16 *) buf;
3174 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3175
3176 /* Transfer multiple of 2 bytes */
3177 if (write_data) {
3178 for (i = 0; i < words; i++)
3179 writew(le16_to_cpu(buf16[i]), mmio);
3180 } else {
3181 for (i = 0; i < words; i++)
3182 buf16[i] = cpu_to_le16(readw(mmio));
3183 }
3184
3185 /* Transfer trailing 1 byte, if any. */
3186 if (unlikely(buflen & 0x01)) {
3187 u16 align_buf[1] = { 0 };
3188 unsigned char *trailing_buf = buf + buflen - 1;
3189
3190 if (write_data) {
3191 memcpy(align_buf, trailing_buf, 1);
3192 writew(le16_to_cpu(align_buf[0]), mmio);
3193 } else {
3194 align_buf[0] = cpu_to_le16(readw(mmio));
3195 memcpy(trailing_buf, align_buf, 1);
3196 }
3197 }
3198}
3199
3200/**
3201 * ata_pio_data_xfer - Transfer data by PIO
3202 * @ap: port to read/write
3203 * @buf: data buffer
3204 * @buflen: buffer length
3205 * @write_data: read/write
3206 *
3207 * Transfer data from/to the device data register by PIO.
3208 *
3209 * LOCKING:
3210 * Inherited from caller.
3211 */
3212
3213static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3214 unsigned int buflen, int write_data)
3215{
3216 unsigned int words = buflen >> 1;
3217
3218 /* Transfer multiple of 2 bytes */
3219 if (write_data)
3220 outsw(ap->ioaddr.data_addr, buf, words);
3221 else
3222 insw(ap->ioaddr.data_addr, buf, words);
3223
3224 /* Transfer trailing 1 byte, if any. */
3225 if (unlikely(buflen & 0x01)) {
3226 u16 align_buf[1] = { 0 };
3227 unsigned char *trailing_buf = buf + buflen - 1;
3228
3229 if (write_data) {
3230 memcpy(align_buf, trailing_buf, 1);
3231 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3232 } else {
3233 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3234 memcpy(trailing_buf, align_buf, 1);
3235 }
3236 }
3237}
3238
3239/**
3240 * ata_data_xfer - Transfer data from/to the data register.
3241 * @ap: port to read/write
3242 * @buf: data buffer
3243 * @buflen: buffer length
3244 * @do_write: read/write
3245 *
3246 * Transfer data from/to the device data register.
3247 *
3248 * LOCKING:
3249 * Inherited from caller.
3250 */
3251
3252static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3253 unsigned int buflen, int do_write)
3254{
3255 /* Make the crap hardware pay the costs not the good stuff */
3256 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3257 unsigned long flags;
3258 local_irq_save(flags);
3259 if (ap->flags & ATA_FLAG_MMIO)
3260 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3261 else
3262 ata_pio_data_xfer(ap, buf, buflen, do_write);
3263 local_irq_restore(flags);
3264 } else {
3265 if (ap->flags & ATA_FLAG_MMIO)
3266 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3267 else
3268 ata_pio_data_xfer(ap, buf, buflen, do_write);
3269 }
3270}
3271
3272/**
3273 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3274 * @qc: Command on going
3275 *
3276 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3277 *
3278 * LOCKING:
3279 * Inherited from caller.
3280 */
3281
3282static void ata_pio_sector(struct ata_queued_cmd *qc)
3283{
3284 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3285 struct scatterlist *sg = qc->__sg;
3286 struct ata_port *ap = qc->ap;
3287 struct page *page;
3288 unsigned int offset;
3289 unsigned char *buf;
3290
3291 if (qc->cursect == (qc->nsect - 1))
3292 ap->hsm_task_state = HSM_ST_LAST;
3293
3294 page = sg[qc->cursg].page;
3295 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3296
3297 /* get the current page and offset */
3298 page = nth_page(page, (offset >> PAGE_SHIFT));
3299 offset %= PAGE_SIZE;
3300
3301 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3302
3303 if (PageHighMem(page)) {
3304 unsigned long flags;
3305
3306 local_irq_save(flags);
3307 buf = kmap_atomic(page, KM_IRQ0);
3308
3309 /* do the actual data transfer */
3310 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3311
3312 kunmap_atomic(buf, KM_IRQ0);
3313 local_irq_restore(flags);
3314 } else {
3315 buf = page_address(page);
3316 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3317 }
3318
3319 qc->cursect++;
3320 qc->cursg_ofs++;
3321
3322 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3323 qc->cursg++;
3324 qc->cursg_ofs = 0;
3325 }
3326}
3327
3328/**
3329 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3330 * @qc: Command on going
3331 *
3332 * Transfer one or many ATA_SECT_SIZE of data from/to the
3333 * ATA device for the DRQ request.
3334 *
3335 * LOCKING:
3336 * Inherited from caller.
3337 */
3338
3339static void ata_pio_sectors(struct ata_queued_cmd *qc)
3340{
3341 if (is_multi_taskfile(&qc->tf)) {
3342 /* READ/WRITE MULTIPLE */
3343 unsigned int nsect;
3344
3345 WARN_ON(qc->dev->multi_count == 0);
3346
3347 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3348 while (nsect--)
3349 ata_pio_sector(qc);
3350 } else
3351 ata_pio_sector(qc);
3352}
3353
3354/**
3355 * atapi_send_cdb - Write CDB bytes to hardware
3356 * @ap: Port to which ATAPI device is attached.
3357 * @qc: Taskfile currently active
3358 *
3359 * When device has indicated its readiness to accept
3360 * a CDB, this function is called. Send the CDB.
3361 *
3362 * LOCKING:
3363 * caller.
3364 */
3365
3366static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3367{
3368 /* send SCSI cdb */
3369 DPRINTK("send cdb\n");
3370 WARN_ON(qc->dev->cdb_len < 12);
3371
3372 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3373 ata_altstatus(ap); /* flush */
3374
3375 switch (qc->tf.protocol) {
3376 case ATA_PROT_ATAPI:
3377 ap->hsm_task_state = HSM_ST;
3378 break;
3379 case ATA_PROT_ATAPI_NODATA:
3380 ap->hsm_task_state = HSM_ST_LAST;
3381 break;
3382 case ATA_PROT_ATAPI_DMA:
3383 ap->hsm_task_state = HSM_ST_LAST;
3384 /* initiate bmdma */
3385 ap->ops->bmdma_start(qc);
3386 break;
3387 }
3388}
3389
3390/**
3391 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3392 * @qc: Command on going
3393 * @bytes: number of bytes
3394 *
3395 * Transfer Transfer data from/to the ATAPI device.
3396 *
3397 * LOCKING:
3398 * Inherited from caller.
3399 *
3400 */
3401
3402static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3403{
3404 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3405 struct scatterlist *sg = qc->__sg;
3406 struct ata_port *ap = qc->ap;
3407 struct page *page;
3408 unsigned char *buf;
3409 unsigned int offset, count;
3410
3411 if (qc->curbytes + bytes >= qc->nbytes)
3412 ap->hsm_task_state = HSM_ST_LAST;
3413
3414next_sg:
3415 if (unlikely(qc->cursg >= qc->n_elem)) {
3416 /*
3417 * The end of qc->sg is reached and the device expects
3418 * more data to transfer. In order not to overrun qc->sg
3419 * and fulfill length specified in the byte count register,
3420 * - for read case, discard trailing data from the device
3421 * - for write case, padding zero data to the device
3422 */
3423 u16 pad_buf[1] = { 0 };
3424 unsigned int words = bytes >> 1;
3425 unsigned int i;
3426
3427 if (words) /* warning if bytes > 1 */
3428 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3429 ap->id, bytes);
3430
3431 for (i = 0; i < words; i++)
3432 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3433
3434 ap->hsm_task_state = HSM_ST_LAST;
3435 return;
3436 }
3437
3438 sg = &qc->__sg[qc->cursg];
3439
3440 page = sg->page;
3441 offset = sg->offset + qc->cursg_ofs;
3442
3443 /* get the current page and offset */
3444 page = nth_page(page, (offset >> PAGE_SHIFT));
3445 offset %= PAGE_SIZE;
3446
3447 /* don't overrun current sg */
3448 count = min(sg->length - qc->cursg_ofs, bytes);
3449
3450 /* don't cross page boundaries */
3451 count = min(count, (unsigned int)PAGE_SIZE - offset);
3452
3453 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3454
3455 if (PageHighMem(page)) {
3456 unsigned long flags;
3457
3458 local_irq_save(flags);
3459 buf = kmap_atomic(page, KM_IRQ0);
3460
3461 /* do the actual data transfer */
3462 ata_data_xfer(ap, buf + offset, count, do_write);
3463
3464 kunmap_atomic(buf, KM_IRQ0);
3465 local_irq_restore(flags);
3466 } else {
3467 buf = page_address(page);
3468 ata_data_xfer(ap, buf + offset, count, do_write);
3469 }
3470
3471 bytes -= count;
3472 qc->curbytes += count;
3473 qc->cursg_ofs += count;
3474
3475 if (qc->cursg_ofs == sg->length) {
3476 qc->cursg++;
3477 qc->cursg_ofs = 0;
3478 }
3479
3480 if (bytes)
3481 goto next_sg;
3482}
3483
3484/**
3485 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3486 * @qc: Command on going
3487 *
3488 * Transfer Transfer data from/to the ATAPI device.
3489 *
3490 * LOCKING:
3491 * Inherited from caller.
3492 */
3493
3494static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3495{
3496 struct ata_port *ap = qc->ap;
3497 struct ata_device *dev = qc->dev;
3498 unsigned int ireason, bc_lo, bc_hi, bytes;
3499 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3500
3501 ap->ops->tf_read(ap, &qc->tf);
3502 ireason = qc->tf.nsect;
3503 bc_lo = qc->tf.lbam;
3504 bc_hi = qc->tf.lbah;
3505 bytes = (bc_hi << 8) | bc_lo;
3506
3507 /* shall be cleared to zero, indicating xfer of data */
3508 if (ireason & (1 << 0))
3509 goto err_out;
3510
3511 /* make sure transfer direction matches expected */
3512 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3513 if (do_write != i_write)
3514 goto err_out;
3515
3516 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3517
3518 __atapi_pio_bytes(qc, bytes);
3519
3520 return;
3521
3522err_out:
3523 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3524 ap->id, dev->devno);
3525 qc->err_mask |= AC_ERR_HSM;
3526 ap->hsm_task_state = HSM_ST_ERR;
3527}
3528
3529/**
3530 * ata_hsm_move - move the HSM to the next state.
3531 * @ap: the target ata_port
3532 * @qc: qc on going
3533 * @status: current device status
3534 * @in_wq: 1 if called from workqueue, 0 otherwise
3535 *
3536 * RETURNS:
3537 * 1 when poll next status needed, 0 otherwise.
3538 */
3539
3540static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
3541 u8 status, int in_wq)
3542{
3543 unsigned long flags = 0;
3544 int poll_next;
3545
3546 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
3547
3548 /* Make sure ata_qc_issue_prot() does not throw things
3549 * like DMA polling into the workqueue. Notice that
3550 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
3551 */
3552 WARN_ON(in_wq != ((qc->tf.flags & ATA_TFLAG_POLLING) ||
3553 (ap->hsm_task_state == HSM_ST_FIRST &&
3554 ((qc->tf.protocol == ATA_PROT_PIO &&
3555 (qc->tf.flags & ATA_TFLAG_WRITE)) ||
3556 (is_atapi_taskfile(&qc->tf) &&
3557 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))))));
3558
3559 /* check error */
3560 if (unlikely(status & (ATA_ERR | ATA_DF))) {
3561 qc->err_mask |= AC_ERR_DEV;
3562 ap->hsm_task_state = HSM_ST_ERR;
3563 }
3564
3565fsm_start:
3566 switch (ap->hsm_task_state) {
3567 case HSM_ST_FIRST:
3568 /* Send first data block or PACKET CDB */
3569
3570 /* If polling, we will stay in the work queue after
3571 * sending the data. Otherwise, interrupt handler
3572 * takes over after sending the data.
3573 */
3574 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3575
3576 /* check device status */
3577 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
3578 /* Wrong status. Let EH handle this */
3579 qc->err_mask |= AC_ERR_HSM;
3580 ap->hsm_task_state = HSM_ST_ERR;
3581 goto fsm_start;
3582 }
3583
3584 /* Send the CDB (atapi) or the first data block (ata pio out).
3585 * During the state transition, interrupt handler shouldn't
3586 * be invoked before the data transfer is complete and
3587 * hsm_task_state is changed. Hence, the following locking.
3588 */
3589 if (in_wq)
3590 spin_lock_irqsave(&ap->host_set->lock, flags);
3591
3592 if (qc->tf.protocol == ATA_PROT_PIO) {
3593 /* PIO data out protocol.
3594 * send first data block.
3595 */
3596
3597 /* ata_pio_sectors() might change the state
3598 * to HSM_ST_LAST. so, the state is changed here
3599 * before ata_pio_sectors().
3600 */
3601 ap->hsm_task_state = HSM_ST;
3602 ata_pio_sectors(qc);
3603 ata_altstatus(ap); /* flush */
3604 } else
3605 /* send CDB */
3606 atapi_send_cdb(ap, qc);
3607
3608 if (in_wq)
3609 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3610
3611 /* if polling, ata_pio_task() handles the rest.
3612 * otherwise, interrupt handler takes over from here.
3613 */
3614 break;
3615
3616 case HSM_ST:
3617 /* complete command or read/write the data register */
3618 if (qc->tf.protocol == ATA_PROT_ATAPI) {
3619 /* ATAPI PIO protocol */
3620 if ((status & ATA_DRQ) == 0) {
3621 /* no more data to transfer */
3622 ap->hsm_task_state = HSM_ST_LAST;
3623 goto fsm_start;
3624 }
3625
3626 atapi_pio_bytes(qc);
3627
3628 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
3629 /* bad ireason reported by device */
3630 goto fsm_start;
3631
3632 } else {
3633 /* ATA PIO protocol */
3634 if (unlikely((status & ATA_DRQ) == 0)) {
3635 /* handle BSY=0, DRQ=0 as error */
3636 qc->err_mask |= AC_ERR_HSM;
3637 ap->hsm_task_state = HSM_ST_ERR;
3638 goto fsm_start;
3639 }
3640
3641 ata_pio_sectors(qc);
3642
3643 if (ap->hsm_task_state == HSM_ST_LAST &&
3644 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
3645 /* all data read */
3646 ata_altstatus(ap);
3647 status = ata_chk_status(ap);
3648 goto fsm_start;
3649 }
3650 }
3651
3652 ata_altstatus(ap); /* flush */
3653 poll_next = 1;
3654 break;
3655
3656 case HSM_ST_LAST:
3657 if (unlikely(!ata_ok(status))) {
3658 qc->err_mask |= __ac_err_mask(status);
3659 ap->hsm_task_state = HSM_ST_ERR;
3660 goto fsm_start;
3661 }
3662
3663 /* no more data to transfer */
3664 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
3665 ap->id, status);
3666
3667 WARN_ON(qc->err_mask);
3668
3669 ap->hsm_task_state = HSM_ST_IDLE;
3670
3671 /* complete taskfile transaction */
3672 if (in_wq)
3673 ata_poll_qc_complete(qc);
3674 else
3675 ata_qc_complete(qc);
3676
3677 poll_next = 0;
3678 break;
3679
3680 case HSM_ST_ERR:
3681 if (qc->tf.command != ATA_CMD_PACKET)
3682 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x\n",
3683 ap->id, status);
3684
3685 /* make sure qc->err_mask is available to
3686 * know what's wrong and recover
3687 */
3688 WARN_ON(qc->err_mask == 0);
3689
3690 ap->hsm_task_state = HSM_ST_IDLE;
3691
3692 if (in_wq)
3693 ata_poll_qc_complete(qc);
3694 else
3695 ata_qc_complete(qc);
3696
3697 poll_next = 0;
3698 break;
3699 default:
3700 poll_next = 0;
3701 BUG();
3702 }
3703
3704 return poll_next;
3705}
3706
3707static void ata_pio_task(void *_data)
3708{
3709 struct ata_port *ap = _data;
3710 struct ata_queued_cmd *qc;
3711 u8 status;
3712 int poll_next;
3713
3714fsm_start:
3715 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
3716
3717 qc = ata_qc_from_tag(ap, ap->active_tag);
3718 WARN_ON(qc == NULL);
3719
3720 /*
3721 * This is purely heuristic. This is a fast path.
3722 * Sometimes when we enter, BSY will be cleared in
3723 * a chk-status or two. If not, the drive is probably seeking
3724 * or something. Snooze for a couple msecs, then
3725 * chk-status again. If still busy, queue delayed work.
3726 */
3727 status = ata_busy_wait(ap, ATA_BUSY, 5);
3728 if (status & ATA_BUSY) {
3729 msleep(2);
3730 status = ata_busy_wait(ap, ATA_BUSY, 10);
3731 if (status & ATA_BUSY) {
3732 ata_port_queue_task(ap, ata_pio_task, ap, ATA_SHORT_PAUSE);
3733 return;
3734 }
3735 }
3736
3737 /* move the HSM */
3738 poll_next = ata_hsm_move(ap, qc, status, 1);
3739
3740 /* another command or interrupt handler
3741 * may be running at this point.
3742 */
3743 if (poll_next)
3744 goto fsm_start;
3745}
3746
3747/**
3748 * ata_qc_timeout - Handle timeout of queued command
3749 * @qc: Command that timed out
3750 *
3751 * Some part of the kernel (currently, only the SCSI layer)
3752 * has noticed that the active command on port @ap has not
3753 * completed after a specified length of time. Handle this
3754 * condition by disabling DMA (if necessary) and completing
3755 * transactions, with error if necessary.
3756 *
3757 * This also handles the case of the "lost interrupt", where
3758 * for some reason (possibly hardware bug, possibly driver bug)
3759 * an interrupt was not delivered to the driver, even though the
3760 * transaction completed successfully.
3761 *
3762 * LOCKING:
3763 * Inherited from SCSI layer (none, can sleep)
3764 */
3765
3766static void ata_qc_timeout(struct ata_queued_cmd *qc)
3767{
3768 struct ata_port *ap = qc->ap;
3769 struct ata_host_set *host_set = ap->host_set;
3770 u8 host_stat = 0, drv_stat;
3771 unsigned long flags;
3772
3773 DPRINTK("ENTER\n");
3774
3775 ap->hsm_task_state = HSM_ST_IDLE;
3776
3777 spin_lock_irqsave(&host_set->lock, flags);
3778
3779 switch (qc->tf.protocol) {
3780
3781 case ATA_PROT_DMA:
3782 case ATA_PROT_ATAPI_DMA:
3783 host_stat = ap->ops->bmdma_status(ap);
3784
3785 /* before we do anything else, clear DMA-Start bit */
3786 ap->ops->bmdma_stop(qc);
3787
3788 /* fall through */
3789
3790 default:
3791 ata_altstatus(ap);
3792 drv_stat = ata_chk_status(ap);
3793
3794 /* ack bmdma irq events */
3795 ap->ops->irq_clear(ap);
3796
3797 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3798 ap->id, qc->tf.command, drv_stat, host_stat);
3799
3800 ap->hsm_task_state = HSM_ST_IDLE;
3801
3802 /* complete taskfile transaction */
3803 qc->err_mask |= AC_ERR_TIMEOUT;
3804 break;
3805 }
3806
3807 spin_unlock_irqrestore(&host_set->lock, flags);
3808
3809 ata_eh_qc_complete(qc);
3810
3811 DPRINTK("EXIT\n");
3812}
3813
3814/**
3815 * ata_eng_timeout - Handle timeout of queued command
3816 * @ap: Port on which timed-out command is active
3817 *
3818 * Some part of the kernel (currently, only the SCSI layer)
3819 * has noticed that the active command on port @ap has not
3820 * completed after a specified length of time. Handle this
3821 * condition by disabling DMA (if necessary) and completing
3822 * transactions, with error if necessary.
3823 *
3824 * This also handles the case of the "lost interrupt", where
3825 * for some reason (possibly hardware bug, possibly driver bug)
3826 * an interrupt was not delivered to the driver, even though the
3827 * transaction completed successfully.
3828 *
3829 * LOCKING:
3830 * Inherited from SCSI layer (none, can sleep)
3831 */
3832
3833void ata_eng_timeout(struct ata_port *ap)
3834{
3835 DPRINTK("ENTER\n");
3836
3837 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
3838
3839 DPRINTK("EXIT\n");
3840}
3841
3842/**
3843 * ata_qc_new - Request an available ATA command, for queueing
3844 * @ap: Port associated with device @dev
3845 * @dev: Device from whom we request an available command structure
3846 *
3847 * LOCKING:
3848 * None.
3849 */
3850
3851static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3852{
3853 struct ata_queued_cmd *qc = NULL;
3854 unsigned int i;
3855
3856 for (i = 0; i < ATA_MAX_QUEUE; i++)
3857 if (!test_and_set_bit(i, &ap->qactive)) {
3858 qc = ata_qc_from_tag(ap, i);
3859 break;
3860 }
3861
3862 if (qc)
3863 qc->tag = i;
3864
3865 return qc;
3866}
3867
3868/**
3869 * ata_qc_new_init - Request an available ATA command, and initialize it
3870 * @ap: Port associated with device @dev
3871 * @dev: Device from whom we request an available command structure
3872 *
3873 * LOCKING:
3874 * None.
3875 */
3876
3877struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3878 struct ata_device *dev)
3879{
3880 struct ata_queued_cmd *qc;
3881
3882 qc = ata_qc_new(ap);
3883 if (qc) {
3884 qc->scsicmd = NULL;
3885 qc->ap = ap;
3886 qc->dev = dev;
3887
3888 ata_qc_reinit(qc);
3889 }
3890
3891 return qc;
3892}
3893
3894/**
3895 * ata_qc_free - free unused ata_queued_cmd
3896 * @qc: Command to complete
3897 *
3898 * Designed to free unused ata_queued_cmd object
3899 * in case something prevents using it.
3900 *
3901 * LOCKING:
3902 * spin_lock_irqsave(host_set lock)
3903 */
3904void ata_qc_free(struct ata_queued_cmd *qc)
3905{
3906 struct ata_port *ap = qc->ap;
3907 unsigned int tag;
3908
3909 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3910
3911 qc->flags = 0;
3912 tag = qc->tag;
3913 if (likely(ata_tag_valid(tag))) {
3914 if (tag == ap->active_tag)
3915 ap->active_tag = ATA_TAG_POISON;
3916 qc->tag = ATA_TAG_POISON;
3917 clear_bit(tag, &ap->qactive);
3918 }
3919}
3920
3921void __ata_qc_complete(struct ata_queued_cmd *qc)
3922{
3923 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3924 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3925
3926 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3927 ata_sg_clean(qc);
3928
3929 /* atapi: mark qc as inactive to prevent the interrupt handler
3930 * from completing the command twice later, before the error handler
3931 * is called. (when rc != 0 and atapi request sense is needed)
3932 */
3933 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3934
3935 /* call completion callback */
3936 qc->complete_fn(qc);
3937}
3938
3939static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3940{
3941 struct ata_port *ap = qc->ap;
3942
3943 switch (qc->tf.protocol) {
3944 case ATA_PROT_DMA:
3945 case ATA_PROT_ATAPI_DMA:
3946 return 1;
3947
3948 case ATA_PROT_ATAPI:
3949 case ATA_PROT_PIO:
3950 if (ap->flags & ATA_FLAG_PIO_DMA)
3951 return 1;
3952
3953 /* fall through */
3954
3955 default:
3956 return 0;
3957 }
3958
3959 /* never reached */
3960}
3961
3962/**
3963 * ata_qc_issue - issue taskfile to device
3964 * @qc: command to issue to device
3965 *
3966 * Prepare an ATA command to submission to device.
3967 * This includes mapping the data into a DMA-able
3968 * area, filling in the S/G table, and finally
3969 * writing the taskfile to hardware, starting the command.
3970 *
3971 * LOCKING:
3972 * spin_lock_irqsave(host_set lock)
3973 *
3974 * RETURNS:
3975 * Zero on success, AC_ERR_* mask on failure
3976 */
3977
3978unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
3979{
3980 struct ata_port *ap = qc->ap;
3981
3982 if (ata_should_dma_map(qc)) {
3983 if (qc->flags & ATA_QCFLAG_SG) {
3984 if (ata_sg_setup(qc))
3985 goto sg_err;
3986 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3987 if (ata_sg_setup_one(qc))
3988 goto sg_err;
3989 }
3990 } else {
3991 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3992 }
3993
3994 ap->ops->qc_prep(qc);
3995
3996 qc->ap->active_tag = qc->tag;
3997 qc->flags |= ATA_QCFLAG_ACTIVE;
3998
3999 return ap->ops->qc_issue(qc);
4000
4001sg_err:
4002 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4003 return AC_ERR_SYSTEM;
4004}
4005
4006
4007/**
4008 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4009 * @qc: command to issue to device
4010 *
4011 * Using various libata functions and hooks, this function
4012 * starts an ATA command. ATA commands are grouped into
4013 * classes called "protocols", and issuing each type of protocol
4014 * is slightly different.
4015 *
4016 * May be used as the qc_issue() entry in ata_port_operations.
4017 *
4018 * LOCKING:
4019 * spin_lock_irqsave(host_set lock)
4020 *
4021 * RETURNS:
4022 * Zero on success, AC_ERR_* mask on failure
4023 */
4024
4025unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4026{
4027 struct ata_port *ap = qc->ap;
4028
4029 /* Use polling pio if the LLD doesn't handle
4030 * interrupt driven pio and atapi CDB interrupt.
4031 */
4032 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4033 switch (qc->tf.protocol) {
4034 case ATA_PROT_PIO:
4035 case ATA_PROT_ATAPI:
4036 case ATA_PROT_ATAPI_NODATA:
4037 qc->tf.flags |= ATA_TFLAG_POLLING;
4038 break;
4039 case ATA_PROT_ATAPI_DMA:
4040 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4041 BUG();
4042 break;
4043 default:
4044 break;
4045 }
4046 }
4047
4048 /* select the device */
4049 ata_dev_select(ap, qc->dev->devno, 1, 0);
4050
4051 /* start the command */
4052 switch (qc->tf.protocol) {
4053 case ATA_PROT_NODATA:
4054 if (qc->tf.flags & ATA_TFLAG_POLLING)
4055 ata_qc_set_polling(qc);
4056
4057 ata_tf_to_host(ap, &qc->tf);
4058 ap->hsm_task_state = HSM_ST_LAST;
4059
4060 if (qc->tf.flags & ATA_TFLAG_POLLING)
4061 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4062
4063 break;
4064
4065 case ATA_PROT_DMA:
4066 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4067
4068 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4069 ap->ops->bmdma_setup(qc); /* set up bmdma */
4070 ap->ops->bmdma_start(qc); /* initiate bmdma */
4071 ap->hsm_task_state = HSM_ST_LAST;
4072 break;
4073
4074 case ATA_PROT_PIO:
4075 if (qc->tf.flags & ATA_TFLAG_POLLING)
4076 ata_qc_set_polling(qc);
4077
4078 ata_tf_to_host(ap, &qc->tf);
4079
4080 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4081 /* PIO data out protocol */
4082 ap->hsm_task_state = HSM_ST_FIRST;
4083 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4084
4085 /* always send first data block using
4086 * the ata_pio_task() codepath.
4087 */
4088 } else {
4089 /* PIO data in protocol */
4090 ap->hsm_task_state = HSM_ST;
4091
4092 if (qc->tf.flags & ATA_TFLAG_POLLING)
4093 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4094
4095 /* if polling, ata_pio_task() handles the rest.
4096 * otherwise, interrupt handler takes over from here.
4097 */
4098 }
4099
4100 break;
4101
4102 case ATA_PROT_ATAPI:
4103 case ATA_PROT_ATAPI_NODATA:
4104 if (qc->tf.flags & ATA_TFLAG_POLLING)
4105 ata_qc_set_polling(qc);
4106
4107 ata_tf_to_host(ap, &qc->tf);
4108
4109 ap->hsm_task_state = HSM_ST_FIRST;
4110
4111 /* send cdb by polling if no cdb interrupt */
4112 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4113 (qc->tf.flags & ATA_TFLAG_POLLING))
4114 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4115 break;
4116
4117 case ATA_PROT_ATAPI_DMA:
4118 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4119
4120 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4121 ap->ops->bmdma_setup(qc); /* set up bmdma */
4122 ap->hsm_task_state = HSM_ST_FIRST;
4123
4124 /* send cdb by polling if no cdb interrupt */
4125 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4126 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4127 break;
4128
4129 default:
4130 WARN_ON(1);
4131 return AC_ERR_SYSTEM;
4132 }
4133
4134 return 0;
4135}
4136
4137/**
4138 * ata_host_intr - Handle host interrupt for given (port, task)
4139 * @ap: Port on which interrupt arrived (possibly...)
4140 * @qc: Taskfile currently active in engine
4141 *
4142 * Handle host interrupt for given queued command. Currently,
4143 * only DMA interrupts are handled. All other commands are
4144 * handled via polling with interrupts disabled (nIEN bit).
4145 *
4146 * LOCKING:
4147 * spin_lock_irqsave(host_set lock)
4148 *
4149 * RETURNS:
4150 * One if interrupt was handled, zero if not (shared irq).
4151 */
4152
4153inline unsigned int ata_host_intr (struct ata_port *ap,
4154 struct ata_queued_cmd *qc)
4155{
4156 u8 status, host_stat = 0;
4157
4158 VPRINTK("ata%u: protocol %d task_state %d\n",
4159 ap->id, qc->tf.protocol, ap->hsm_task_state);
4160
4161 /* Check whether we are expecting interrupt in this state */
4162 switch (ap->hsm_task_state) {
4163 case HSM_ST_FIRST:
4164 /* Some pre-ATAPI-4 devices assert INTRQ
4165 * at this state when ready to receive CDB.
4166 */
4167
4168 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4169 * The flag was turned on only for atapi devices.
4170 * No need to check is_atapi_taskfile(&qc->tf) again.
4171 */
4172 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4173 goto idle_irq;
4174 break;
4175 case HSM_ST_LAST:
4176 if (qc->tf.protocol == ATA_PROT_DMA ||
4177 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4178 /* check status of DMA engine */
4179 host_stat = ap->ops->bmdma_status(ap);
4180 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4181
4182 /* if it's not our irq... */
4183 if (!(host_stat & ATA_DMA_INTR))
4184 goto idle_irq;
4185
4186 /* before we do anything else, clear DMA-Start bit */
4187 ap->ops->bmdma_stop(qc);
4188
4189 if (unlikely(host_stat & ATA_DMA_ERR)) {
4190 /* error when transfering data to/from memory */
4191 qc->err_mask |= AC_ERR_HOST_BUS;
4192 ap->hsm_task_state = HSM_ST_ERR;
4193 }
4194 }
4195 break;
4196 case HSM_ST:
4197 break;
4198 default:
4199 goto idle_irq;
4200 }
4201
4202 /* check altstatus */
4203 status = ata_altstatus(ap);
4204 if (status & ATA_BUSY)
4205 goto idle_irq;
4206
4207 /* check main status, clearing INTRQ */
4208 status = ata_chk_status(ap);
4209 if (unlikely(status & ATA_BUSY))
4210 goto idle_irq;
4211
4212 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4213 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4214
4215 /* ack bmdma irq events */
4216 ap->ops->irq_clear(ap);
4217
4218 ata_hsm_move(ap, qc, status, 0);
4219 return 1; /* irq handled */
4220
4221idle_irq:
4222 ap->stats.idle_irq++;
4223
4224#ifdef ATA_IRQ_TRAP
4225 if ((ap->stats.idle_irq % 1000) == 0) {
4226 ata_irq_ack(ap, 0); /* debug trap */
4227 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4228 return 1;
4229 }
4230#endif
4231 return 0; /* irq not handled */
4232}
4233
4234/**
4235 * ata_interrupt - Default ATA host interrupt handler
4236 * @irq: irq line (unused)
4237 * @dev_instance: pointer to our ata_host_set information structure
4238 * @regs: unused
4239 *
4240 * Default interrupt handler for PCI IDE devices. Calls
4241 * ata_host_intr() for each port that is not disabled.
4242 *
4243 * LOCKING:
4244 * Obtains host_set lock during operation.
4245 *
4246 * RETURNS:
4247 * IRQ_NONE or IRQ_HANDLED.
4248 */
4249
4250irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4251{
4252 struct ata_host_set *host_set = dev_instance;
4253 unsigned int i;
4254 unsigned int handled = 0;
4255 unsigned long flags;
4256
4257 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4258 spin_lock_irqsave(&host_set->lock, flags);
4259
4260 for (i = 0; i < host_set->n_ports; i++) {
4261 struct ata_port *ap;
4262
4263 ap = host_set->ports[i];
4264 if (ap &&
4265 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
4266 struct ata_queued_cmd *qc;
4267
4268 qc = ata_qc_from_tag(ap, ap->active_tag);
4269 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4270 (qc->flags & ATA_QCFLAG_ACTIVE))
4271 handled |= ata_host_intr(ap, qc);
4272 }
4273 }
4274
4275 spin_unlock_irqrestore(&host_set->lock, flags);
4276
4277 return IRQ_RETVAL(handled);
4278}
4279
4280
4281/*
4282 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4283 * without filling any other registers
4284 */
4285static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4286 u8 cmd)
4287{
4288 struct ata_taskfile tf;
4289 int err;
4290
4291 ata_tf_init(ap, &tf, dev->devno);
4292
4293 tf.command = cmd;
4294 tf.flags |= ATA_TFLAG_DEVICE;
4295 tf.protocol = ATA_PROT_NODATA;
4296
4297 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4298 if (err)
4299 printk(KERN_ERR "%s: ata command failed: %d\n",
4300 __FUNCTION__, err);
4301
4302 return err;
4303}
4304
4305static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4306{
4307 u8 cmd;
4308
4309 if (!ata_try_flush_cache(dev))
4310 return 0;
4311
4312 if (ata_id_has_flush_ext(dev->id))
4313 cmd = ATA_CMD_FLUSH_EXT;
4314 else
4315 cmd = ATA_CMD_FLUSH;
4316
4317 return ata_do_simple_cmd(ap, dev, cmd);
4318}
4319
4320static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4321{
4322 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4323}
4324
4325static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4326{
4327 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4328}
4329
4330/**
4331 * ata_device_resume - wakeup a previously suspended devices
4332 * @ap: port the device is connected to
4333 * @dev: the device to resume
4334 *
4335 * Kick the drive back into action, by sending it an idle immediate
4336 * command and making sure its transfer mode matches between drive
4337 * and host.
4338 *
4339 */
4340int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4341{
4342 if (ap->flags & ATA_FLAG_SUSPENDED) {
4343 ap->flags &= ~ATA_FLAG_SUSPENDED;
4344 ata_set_mode(ap);
4345 }
4346 if (!ata_dev_present(dev))
4347 return 0;
4348 if (dev->class == ATA_DEV_ATA)
4349 ata_start_drive(ap, dev);
4350
4351 return 0;
4352}
4353
4354/**
4355 * ata_device_suspend - prepare a device for suspend
4356 * @ap: port the device is connected to
4357 * @dev: the device to suspend
4358 *
4359 * Flush the cache on the drive, if appropriate, then issue a
4360 * standbynow command.
4361 */
4362int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
4363{
4364 if (!ata_dev_present(dev))
4365 return 0;
4366 if (dev->class == ATA_DEV_ATA)
4367 ata_flush_cache(ap, dev);
4368
4369 if (state.event != PM_EVENT_FREEZE)
4370 ata_standby_drive(ap, dev);
4371 ap->flags |= ATA_FLAG_SUSPENDED;
4372 return 0;
4373}
4374
4375/**
4376 * ata_port_start - Set port up for dma.
4377 * @ap: Port to initialize
4378 *
4379 * Called just after data structures for each port are
4380 * initialized. Allocates space for PRD table.
4381 *
4382 * May be used as the port_start() entry in ata_port_operations.
4383 *
4384 * LOCKING:
4385 * Inherited from caller.
4386 */
4387
4388int ata_port_start (struct ata_port *ap)
4389{
4390 struct device *dev = ap->dev;
4391 int rc;
4392
4393 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4394 if (!ap->prd)
4395 return -ENOMEM;
4396
4397 rc = ata_pad_alloc(ap, dev);
4398 if (rc) {
4399 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4400 return rc;
4401 }
4402
4403 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4404
4405 return 0;
4406}
4407
4408
4409/**
4410 * ata_port_stop - Undo ata_port_start()
4411 * @ap: Port to shut down
4412 *
4413 * Frees the PRD table.
4414 *
4415 * May be used as the port_stop() entry in ata_port_operations.
4416 *
4417 * LOCKING:
4418 * Inherited from caller.
4419 */
4420
4421void ata_port_stop (struct ata_port *ap)
4422{
4423 struct device *dev = ap->dev;
4424
4425 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4426 ata_pad_free(ap, dev);
4427}
4428
4429void ata_host_stop (struct ata_host_set *host_set)
4430{
4431 if (host_set->mmio_base)
4432 iounmap(host_set->mmio_base);
4433}
4434
4435
4436/**
4437 * ata_host_remove - Unregister SCSI host structure with upper layers
4438 * @ap: Port to unregister
4439 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4440 *
4441 * LOCKING:
4442 * Inherited from caller.
4443 */
4444
4445static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4446{
4447 struct Scsi_Host *sh = ap->host;
4448
4449 DPRINTK("ENTER\n");
4450
4451 if (do_unregister)
4452 scsi_remove_host(sh);
4453
4454 ap->ops->port_stop(ap);
4455}
4456
4457/**
4458 * ata_host_init - Initialize an ata_port structure
4459 * @ap: Structure to initialize
4460 * @host: associated SCSI mid-layer structure
4461 * @host_set: Collection of hosts to which @ap belongs
4462 * @ent: Probe information provided by low-level driver
4463 * @port_no: Port number associated with this ata_port
4464 *
4465 * Initialize a new ata_port structure, and its associated
4466 * scsi_host.
4467 *
4468 * LOCKING:
4469 * Inherited from caller.
4470 */
4471
4472static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4473 struct ata_host_set *host_set,
4474 const struct ata_probe_ent *ent, unsigned int port_no)
4475{
4476 unsigned int i;
4477
4478 host->max_id = 16;
4479 host->max_lun = 1;
4480 host->max_channel = 1;
4481 host->unique_id = ata_unique_id++;
4482 host->max_cmd_len = 12;
4483
4484 ap->flags = ATA_FLAG_PORT_DISABLED;
4485 ap->id = host->unique_id;
4486 ap->host = host;
4487 ap->ctl = ATA_DEVCTL_OBS;
4488 ap->host_set = host_set;
4489 ap->dev = ent->dev;
4490 ap->port_no = port_no;
4491 ap->hard_port_no =
4492 ent->legacy_mode ? ent->hard_port_no : port_no;
4493 ap->pio_mask = ent->pio_mask;
4494 ap->mwdma_mask = ent->mwdma_mask;
4495 ap->udma_mask = ent->udma_mask;
4496 ap->flags |= ent->host_flags;
4497 ap->ops = ent->port_ops;
4498 ap->cbl = ATA_CBL_NONE;
4499 ap->active_tag = ATA_TAG_POISON;
4500 ap->last_ctl = 0xFF;
4501
4502 INIT_WORK(&ap->port_task, NULL, NULL);
4503 INIT_LIST_HEAD(&ap->eh_done_q);
4504
4505 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4506 struct ata_device *dev = &ap->device[i];
4507 dev->devno = i;
4508 dev->pio_mask = UINT_MAX;
4509 dev->mwdma_mask = UINT_MAX;
4510 dev->udma_mask = UINT_MAX;
4511 }
4512
4513#ifdef ATA_IRQ_TRAP
4514 ap->stats.unhandled_irq = 1;
4515 ap->stats.idle_irq = 1;
4516#endif
4517
4518 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4519}
4520
4521/**
4522 * ata_host_add - Attach low-level ATA driver to system
4523 * @ent: Information provided by low-level driver
4524 * @host_set: Collections of ports to which we add
4525 * @port_no: Port number associated with this host
4526 *
4527 * Attach low-level ATA driver to system.
4528 *
4529 * LOCKING:
4530 * PCI/etc. bus probe sem.
4531 *
4532 * RETURNS:
4533 * New ata_port on success, for NULL on error.
4534 */
4535
4536static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4537 struct ata_host_set *host_set,
4538 unsigned int port_no)
4539{
4540 struct Scsi_Host *host;
4541 struct ata_port *ap;
4542 int rc;
4543
4544 DPRINTK("ENTER\n");
4545
4546 if (!ent->port_ops->probe_reset &&
4547 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4548 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4549 port_no);
4550 return NULL;
4551 }
4552
4553 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4554 if (!host)
4555 return NULL;
4556
4557 host->transportt = &ata_scsi_transport_template;
4558
4559 ap = (struct ata_port *) &host->hostdata[0];
4560
4561 ata_host_init(ap, host, host_set, ent, port_no);
4562
4563 rc = ap->ops->port_start(ap);
4564 if (rc)
4565 goto err_out;
4566
4567 return ap;
4568
4569err_out:
4570 scsi_host_put(host);
4571 return NULL;
4572}
4573
4574/**
4575 * ata_device_add - Register hardware device with ATA and SCSI layers
4576 * @ent: Probe information describing hardware device to be registered
4577 *
4578 * This function processes the information provided in the probe
4579 * information struct @ent, allocates the necessary ATA and SCSI
4580 * host information structures, initializes them, and registers
4581 * everything with requisite kernel subsystems.
4582 *
4583 * This function requests irqs, probes the ATA bus, and probes
4584 * the SCSI bus.
4585 *
4586 * LOCKING:
4587 * PCI/etc. bus probe sem.
4588 *
4589 * RETURNS:
4590 * Number of ports registered. Zero on error (no ports registered).
4591 */
4592
4593int ata_device_add(const struct ata_probe_ent *ent)
4594{
4595 unsigned int count = 0, i;
4596 struct device *dev = ent->dev;
4597 struct ata_host_set *host_set;
4598
4599 DPRINTK("ENTER\n");
4600 /* alloc a container for our list of ATA ports (buses) */
4601 host_set = kzalloc(sizeof(struct ata_host_set) +
4602 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4603 if (!host_set)
4604 return 0;
4605 spin_lock_init(&host_set->lock);
4606
4607 host_set->dev = dev;
4608 host_set->n_ports = ent->n_ports;
4609 host_set->irq = ent->irq;
4610 host_set->mmio_base = ent->mmio_base;
4611 host_set->private_data = ent->private_data;
4612 host_set->ops = ent->port_ops;
4613
4614 /* register each port bound to this device */
4615 for (i = 0; i < ent->n_ports; i++) {
4616 struct ata_port *ap;
4617 unsigned long xfer_mode_mask;
4618
4619 ap = ata_host_add(ent, host_set, i);
4620 if (!ap)
4621 goto err_out;
4622
4623 host_set->ports[i] = ap;
4624 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4625 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4626 (ap->pio_mask << ATA_SHIFT_PIO);
4627
4628 /* print per-port info to dmesg */
4629 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4630 "bmdma 0x%lX irq %lu\n",
4631 ap->id,
4632 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4633 ata_mode_string(xfer_mode_mask),
4634 ap->ioaddr.cmd_addr,
4635 ap->ioaddr.ctl_addr,
4636 ap->ioaddr.bmdma_addr,
4637 ent->irq);
4638
4639 ata_chk_status(ap);
4640 host_set->ops->irq_clear(ap);
4641 count++;
4642 }
4643
4644 if (!count)
4645 goto err_free_ret;
4646
4647 /* obtain irq, that is shared between channels */
4648 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4649 DRV_NAME, host_set))
4650 goto err_out;
4651
4652 /* perform each probe synchronously */
4653 DPRINTK("probe begin\n");
4654 for (i = 0; i < count; i++) {
4655 struct ata_port *ap;
4656 int rc;
4657
4658 ap = host_set->ports[i];
4659
4660 DPRINTK("ata%u: bus probe begin\n", ap->id);
4661 rc = ata_bus_probe(ap);
4662 DPRINTK("ata%u: bus probe end\n", ap->id);
4663
4664 if (rc) {
4665 /* FIXME: do something useful here?
4666 * Current libata behavior will
4667 * tear down everything when
4668 * the module is removed
4669 * or the h/w is unplugged.
4670 */
4671 }
4672
4673 rc = scsi_add_host(ap->host, dev);
4674 if (rc) {
4675 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4676 ap->id);
4677 /* FIXME: do something useful here */
4678 /* FIXME: handle unconditional calls to
4679 * scsi_scan_host and ata_host_remove, below,
4680 * at the very least
4681 */
4682 }
4683 }
4684
4685 /* probes are done, now scan each port's disk(s) */
4686 DPRINTK("host probe begin\n");
4687 for (i = 0; i < count; i++) {
4688 struct ata_port *ap = host_set->ports[i];
4689
4690 ata_scsi_scan_host(ap);
4691 }
4692
4693 dev_set_drvdata(dev, host_set);
4694
4695 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4696 return ent->n_ports; /* success */
4697
4698err_out:
4699 for (i = 0; i < count; i++) {
4700 ata_host_remove(host_set->ports[i], 1);
4701 scsi_host_put(host_set->ports[i]->host);
4702 }
4703err_free_ret:
4704 kfree(host_set);
4705 VPRINTK("EXIT, returning 0\n");
4706 return 0;
4707}
4708
4709/**
4710 * ata_host_set_remove - PCI layer callback for device removal
4711 * @host_set: ATA host set that was removed
4712 *
4713 * Unregister all objects associated with this host set. Free those
4714 * objects.
4715 *
4716 * LOCKING:
4717 * Inherited from calling layer (may sleep).
4718 */
4719
4720void ata_host_set_remove(struct ata_host_set *host_set)
4721{
4722 struct ata_port *ap;
4723 unsigned int i;
4724
4725 for (i = 0; i < host_set->n_ports; i++) {
4726 ap = host_set->ports[i];
4727 scsi_remove_host(ap->host);
4728 }
4729
4730 free_irq(host_set->irq, host_set);
4731
4732 for (i = 0; i < host_set->n_ports; i++) {
4733 ap = host_set->ports[i];
4734
4735 ata_scsi_release(ap->host);
4736
4737 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4738 struct ata_ioports *ioaddr = &ap->ioaddr;
4739
4740 if (ioaddr->cmd_addr == 0x1f0)
4741 release_region(0x1f0, 8);
4742 else if (ioaddr->cmd_addr == 0x170)
4743 release_region(0x170, 8);
4744 }
4745
4746 scsi_host_put(ap->host);
4747 }
4748
4749 if (host_set->ops->host_stop)
4750 host_set->ops->host_stop(host_set);
4751
4752 kfree(host_set);
4753}
4754
4755/**
4756 * ata_scsi_release - SCSI layer callback hook for host unload
4757 * @host: libata host to be unloaded
4758 *
4759 * Performs all duties necessary to shut down a libata port...
4760 * Kill port kthread, disable port, and release resources.
4761 *
4762 * LOCKING:
4763 * Inherited from SCSI layer.
4764 *
4765 * RETURNS:
4766 * One.
4767 */
4768
4769int ata_scsi_release(struct Scsi_Host *host)
4770{
4771 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4772 int i;
4773
4774 DPRINTK("ENTER\n");
4775
4776 ap->ops->port_disable(ap);
4777 ata_host_remove(ap, 0);
4778 for (i = 0; i < ATA_MAX_DEVICES; i++)
4779 kfree(ap->device[i].id);
4780
4781 DPRINTK("EXIT\n");
4782 return 1;
4783}
4784
4785/**
4786 * ata_std_ports - initialize ioaddr with standard port offsets.
4787 * @ioaddr: IO address structure to be initialized
4788 *
4789 * Utility function which initializes data_addr, error_addr,
4790 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4791 * device_addr, status_addr, and command_addr to standard offsets
4792 * relative to cmd_addr.
4793 *
4794 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4795 */
4796
4797void ata_std_ports(struct ata_ioports *ioaddr)
4798{
4799 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4800 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4801 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4802 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4803 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4804 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4805 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4806 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4807 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4808 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4809}
4810
4811
4812#ifdef CONFIG_PCI
4813
4814void ata_pci_host_stop (struct ata_host_set *host_set)
4815{
4816 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4817
4818 pci_iounmap(pdev, host_set->mmio_base);
4819}
4820
4821/**
4822 * ata_pci_remove_one - PCI layer callback for device removal
4823 * @pdev: PCI device that was removed
4824 *
4825 * PCI layer indicates to libata via this hook that
4826 * hot-unplug or module unload event has occurred.
4827 * Handle this by unregistering all objects associated
4828 * with this PCI device. Free those objects. Then finally
4829 * release PCI resources and disable device.
4830 *
4831 * LOCKING:
4832 * Inherited from PCI layer (may sleep).
4833 */
4834
4835void ata_pci_remove_one (struct pci_dev *pdev)
4836{
4837 struct device *dev = pci_dev_to_dev(pdev);
4838 struct ata_host_set *host_set = dev_get_drvdata(dev);
4839
4840 ata_host_set_remove(host_set);
4841 pci_release_regions(pdev);
4842 pci_disable_device(pdev);
4843 dev_set_drvdata(dev, NULL);
4844}
4845
4846/* move to PCI subsystem */
4847int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4848{
4849 unsigned long tmp = 0;
4850
4851 switch (bits->width) {
4852 case 1: {
4853 u8 tmp8 = 0;
4854 pci_read_config_byte(pdev, bits->reg, &tmp8);
4855 tmp = tmp8;
4856 break;
4857 }
4858 case 2: {
4859 u16 tmp16 = 0;
4860 pci_read_config_word(pdev, bits->reg, &tmp16);
4861 tmp = tmp16;
4862 break;
4863 }
4864 case 4: {
4865 u32 tmp32 = 0;
4866 pci_read_config_dword(pdev, bits->reg, &tmp32);
4867 tmp = tmp32;
4868 break;
4869 }
4870
4871 default:
4872 return -EINVAL;
4873 }
4874
4875 tmp &= bits->mask;
4876
4877 return (tmp == bits->val) ? 1 : 0;
4878}
4879
4880int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4881{
4882 pci_save_state(pdev);
4883 pci_disable_device(pdev);
4884 pci_set_power_state(pdev, PCI_D3hot);
4885 return 0;
4886}
4887
4888int ata_pci_device_resume(struct pci_dev *pdev)
4889{
4890 pci_set_power_state(pdev, PCI_D0);
4891 pci_restore_state(pdev);
4892 pci_enable_device(pdev);
4893 pci_set_master(pdev);
4894 return 0;
4895}
4896#endif /* CONFIG_PCI */
4897
4898
4899static int __init ata_init(void)
4900{
4901 ata_wq = create_workqueue("ata");
4902 if (!ata_wq)
4903 return -ENOMEM;
4904
4905 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4906 return 0;
4907}
4908
4909static void __exit ata_exit(void)
4910{
4911 destroy_workqueue(ata_wq);
4912}
4913
4914module_init(ata_init);
4915module_exit(ata_exit);
4916
4917static unsigned long ratelimit_time;
4918static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4919
4920int ata_ratelimit(void)
4921{
4922 int rc;
4923 unsigned long flags;
4924
4925 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4926
4927 if (time_after(jiffies, ratelimit_time)) {
4928 rc = 1;
4929 ratelimit_time = jiffies + (HZ/5);
4930 } else
4931 rc = 0;
4932
4933 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4934
4935 return rc;
4936}
4937
4938/*
4939 * libata is essentially a library of internal helper functions for
4940 * low-level ATA host controller drivers. As such, the API/ABI is
4941 * likely to change as new drivers are added and updated.
4942 * Do not depend on ABI/API stability.
4943 */
4944
4945EXPORT_SYMBOL_GPL(ata_std_bios_param);
4946EXPORT_SYMBOL_GPL(ata_std_ports);
4947EXPORT_SYMBOL_GPL(ata_device_add);
4948EXPORT_SYMBOL_GPL(ata_host_set_remove);
4949EXPORT_SYMBOL_GPL(ata_sg_init);
4950EXPORT_SYMBOL_GPL(ata_sg_init_one);
4951EXPORT_SYMBOL_GPL(__ata_qc_complete);
4952EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4953EXPORT_SYMBOL_GPL(ata_eng_timeout);
4954EXPORT_SYMBOL_GPL(ata_tf_load);
4955EXPORT_SYMBOL_GPL(ata_tf_read);
4956EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4957EXPORT_SYMBOL_GPL(ata_std_dev_select);
4958EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4959EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4960EXPORT_SYMBOL_GPL(ata_check_status);
4961EXPORT_SYMBOL_GPL(ata_altstatus);
4962EXPORT_SYMBOL_GPL(ata_exec_command);
4963EXPORT_SYMBOL_GPL(ata_port_start);
4964EXPORT_SYMBOL_GPL(ata_port_stop);
4965EXPORT_SYMBOL_GPL(ata_host_stop);
4966EXPORT_SYMBOL_GPL(ata_interrupt);
4967EXPORT_SYMBOL_GPL(ata_qc_prep);
4968EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
4969EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4970EXPORT_SYMBOL_GPL(ata_bmdma_start);
4971EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4972EXPORT_SYMBOL_GPL(ata_bmdma_status);
4973EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4974EXPORT_SYMBOL_GPL(ata_port_probe);
4975EXPORT_SYMBOL_GPL(sata_phy_reset);
4976EXPORT_SYMBOL_GPL(__sata_phy_reset);
4977EXPORT_SYMBOL_GPL(ata_bus_reset);
4978EXPORT_SYMBOL_GPL(ata_std_probeinit);
4979EXPORT_SYMBOL_GPL(ata_std_softreset);
4980EXPORT_SYMBOL_GPL(sata_std_hardreset);
4981EXPORT_SYMBOL_GPL(ata_std_postreset);
4982EXPORT_SYMBOL_GPL(ata_std_probe_reset);
4983EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
4984EXPORT_SYMBOL_GPL(ata_dev_revalidate);
4985EXPORT_SYMBOL_GPL(ata_dev_classify);
4986EXPORT_SYMBOL_GPL(ata_dev_pair);
4987EXPORT_SYMBOL_GPL(ata_port_disable);
4988EXPORT_SYMBOL_GPL(ata_ratelimit);
4989EXPORT_SYMBOL_GPL(ata_busy_sleep);
4990EXPORT_SYMBOL_GPL(ata_port_queue_task);
4991EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4992EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4993EXPORT_SYMBOL_GPL(ata_scsi_error);
4994EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4995EXPORT_SYMBOL_GPL(ata_scsi_release);
4996EXPORT_SYMBOL_GPL(ata_host_intr);
4997EXPORT_SYMBOL_GPL(ata_id_string);
4998EXPORT_SYMBOL_GPL(ata_id_c_string);
4999EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5000EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5001EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5002
5003EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5004EXPORT_SYMBOL_GPL(ata_timing_compute);
5005EXPORT_SYMBOL_GPL(ata_timing_merge);
5006
5007#ifdef CONFIG_PCI
5008EXPORT_SYMBOL_GPL(pci_test_config_bits);
5009EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5010EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5011EXPORT_SYMBOL_GPL(ata_pci_init_one);
5012EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5013EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5014EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5015EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5016EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5017#endif /* CONFIG_PCI */
5018
5019EXPORT_SYMBOL_GPL(ata_device_suspend);
5020EXPORT_SYMBOL_GPL(ata_device_resume);
5021EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5022EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux kernel - Deliverables
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