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spi_mpc8xxx: Factor out SPI mode change steps into a call
[deliverable/linux.git] / drivers / spi / spi_mpc8xxx.c
... / ...
CommitLineData
1/*
2 * MPC8xxx SPI controller driver.
3 *
4 * Maintainer: Kumar Gala
5 *
6 * Copyright (C) 2006 Polycom, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/bug.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <linux/completion.h>
22#include <linux/interrupt.h>
23#include <linux/delay.h>
24#include <linux/irq.h>
25#include <linux/device.h>
26#include <linux/spi/spi.h>
27#include <linux/spi/spi_bitbang.h>
28#include <linux/platform_device.h>
29#include <linux/fsl_devices.h>
30#include <linux/of.h>
31#include <linux/of_platform.h>
32#include <linux/gpio.h>
33#include <linux/of_gpio.h>
34#include <linux/of_spi.h>
35
36#include <sysdev/fsl_soc.h>
37#include <asm/irq.h>
38
39/* SPI Controller registers */
40struct mpc8xxx_spi_reg {
41 u8 res1[0x20];
42 __be32 mode;
43 __be32 event;
44 __be32 mask;
45 __be32 command;
46 __be32 transmit;
47 __be32 receive;
48};
49
50/* SPI Controller mode register definitions */
51#define SPMODE_LOOP (1 << 30)
52#define SPMODE_CI_INACTIVEHIGH (1 << 29)
53#define SPMODE_CP_BEGIN_EDGECLK (1 << 28)
54#define SPMODE_DIV16 (1 << 27)
55#define SPMODE_REV (1 << 26)
56#define SPMODE_MS (1 << 25)
57#define SPMODE_ENABLE (1 << 24)
58#define SPMODE_LEN(x) ((x) << 20)
59#define SPMODE_PM(x) ((x) << 16)
60#define SPMODE_OP (1 << 14)
61#define SPMODE_CG(x) ((x) << 7)
62
63/*
64 * Default for SPI Mode:
65 * SPI MODE 0 (inactive low, phase middle, MSB, 8-bit length, slow clk
66 */
67#define SPMODE_INIT_VAL (SPMODE_CI_INACTIVEHIGH | SPMODE_DIV16 | SPMODE_REV | \
68 SPMODE_MS | SPMODE_LEN(7) | SPMODE_PM(0xf))
69
70/* SPIE register values */
71#define SPIE_NE 0x00000200 /* Not empty */
72#define SPIE_NF 0x00000100 /* Not full */
73
74/* SPIM register values */
75#define SPIM_NE 0x00000200 /* Not empty */
76#define SPIM_NF 0x00000100 /* Not full */
77
78/* SPI Controller driver's private data. */
79struct mpc8xxx_spi {
80 struct mpc8xxx_spi_reg __iomem *base;
81
82 /* rx & tx bufs from the spi_transfer */
83 const void *tx;
84 void *rx;
85
86 /* functions to deal with different sized buffers */
87 void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
88 u32(*get_tx) (struct mpc8xxx_spi *);
89
90 unsigned int count;
91 unsigned int irq;
92
93 unsigned nsecs; /* (clock cycle time)/2 */
94
95 u32 spibrg; /* SPIBRG input clock */
96 u32 rx_shift; /* RX data reg shift when in qe mode */
97 u32 tx_shift; /* TX data reg shift when in qe mode */
98
99 bool qe_mode;
100
101 struct workqueue_struct *workqueue;
102 struct work_struct work;
103
104 struct list_head queue;
105 spinlock_t lock;
106
107 struct completion done;
108};
109
110struct spi_mpc8xxx_cs {
111 /* functions to deal with different sized buffers */
112 void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
113 u32 (*get_tx) (struct mpc8xxx_spi *);
114 u32 rx_shift; /* RX data reg shift when in qe mode */
115 u32 tx_shift; /* TX data reg shift when in qe mode */
116 u32 hw_mode; /* Holds HW mode register settings */
117};
118
119static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
120{
121 out_be32(reg, val);
122}
123
124static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
125{
126 return in_be32(reg);
127}
128
129#define MPC83XX_SPI_RX_BUF(type) \
130static \
131void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
132{ \
133 type *rx = mpc8xxx_spi->rx; \
134 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
135 mpc8xxx_spi->rx = rx; \
136}
137
138#define MPC83XX_SPI_TX_BUF(type) \
139static \
140u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
141{ \
142 u32 data; \
143 const type *tx = mpc8xxx_spi->tx; \
144 if (!tx) \
145 return 0; \
146 data = *tx++ << mpc8xxx_spi->tx_shift; \
147 mpc8xxx_spi->tx = tx; \
148 return data; \
149}
150
151MPC83XX_SPI_RX_BUF(u8)
152MPC83XX_SPI_RX_BUF(u16)
153MPC83XX_SPI_RX_BUF(u32)
154MPC83XX_SPI_TX_BUF(u8)
155MPC83XX_SPI_TX_BUF(u16)
156MPC83XX_SPI_TX_BUF(u32)
157
158static void mpc8xxx_spi_change_mode(struct spi_device *spi)
159{
160 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
161 struct spi_mpc8xxx_cs *cs = spi->controller_state;
162 __be32 __iomem *mode = &mspi->base->mode;
163 unsigned long flags;
164
165 if (cs->hw_mode == mpc8xxx_spi_read_reg(mode))
166 return;
167
168 /* Turn off IRQs locally to minimize time that SPI is disabled. */
169 local_irq_save(flags);
170
171 /* Turn off SPI unit prior changing mode */
172 mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE);
173 mpc8xxx_spi_write_reg(mode, cs->hw_mode);
174
175 local_irq_restore(flags);
176}
177
178static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
179{
180 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
181 struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data;
182 bool pol = spi->mode & SPI_CS_HIGH;
183 struct spi_mpc8xxx_cs *cs = spi->controller_state;
184
185 if (value == BITBANG_CS_INACTIVE) {
186 if (pdata->cs_control)
187 pdata->cs_control(spi, !pol);
188 }
189
190 if (value == BITBANG_CS_ACTIVE) {
191 mpc8xxx_spi->rx_shift = cs->rx_shift;
192 mpc8xxx_spi->tx_shift = cs->tx_shift;
193 mpc8xxx_spi->get_rx = cs->get_rx;
194 mpc8xxx_spi->get_tx = cs->get_tx;
195
196 mpc8xxx_spi_change_mode(spi);
197
198 if (pdata->cs_control)
199 pdata->cs_control(spi, pol);
200 }
201}
202
203static
204int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
205{
206 struct mpc8xxx_spi *mpc8xxx_spi;
207 u8 bits_per_word, pm;
208 u32 hz;
209 struct spi_mpc8xxx_cs *cs = spi->controller_state;
210
211 mpc8xxx_spi = spi_master_get_devdata(spi->master);
212
213 if (t) {
214 bits_per_word = t->bits_per_word;
215 hz = t->speed_hz;
216 } else {
217 bits_per_word = 0;
218 hz = 0;
219 }
220
221 /* spi_transfer level calls that work per-word */
222 if (!bits_per_word)
223 bits_per_word = spi->bits_per_word;
224
225 /* Make sure its a bit width we support [4..16, 32] */
226 if ((bits_per_word < 4)
227 || ((bits_per_word > 16) && (bits_per_word != 32)))
228 return -EINVAL;
229
230 if (!hz)
231 hz = spi->max_speed_hz;
232
233 cs->rx_shift = 0;
234 cs->tx_shift = 0;
235 if (bits_per_word <= 8) {
236 cs->get_rx = mpc8xxx_spi_rx_buf_u8;
237 cs->get_tx = mpc8xxx_spi_tx_buf_u8;
238 if (mpc8xxx_spi->qe_mode) {
239 cs->rx_shift = 16;
240 cs->tx_shift = 24;
241 }
242 } else if (bits_per_word <= 16) {
243 cs->get_rx = mpc8xxx_spi_rx_buf_u16;
244 cs->get_tx = mpc8xxx_spi_tx_buf_u16;
245 if (mpc8xxx_spi->qe_mode) {
246 cs->rx_shift = 16;
247 cs->tx_shift = 16;
248 }
249 } else if (bits_per_word <= 32) {
250 cs->get_rx = mpc8xxx_spi_rx_buf_u32;
251 cs->get_tx = mpc8xxx_spi_tx_buf_u32;
252 } else
253 return -EINVAL;
254
255 if (mpc8xxx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
256 cs->tx_shift = 0;
257 if (bits_per_word <= 8)
258 cs->rx_shift = 8;
259 else
260 cs->rx_shift = 0;
261 }
262
263 mpc8xxx_spi->rx_shift = cs->rx_shift;
264 mpc8xxx_spi->tx_shift = cs->tx_shift;
265 mpc8xxx_spi->get_rx = cs->get_rx;
266 mpc8xxx_spi->get_tx = cs->get_tx;
267
268 if (bits_per_word == 32)
269 bits_per_word = 0;
270 else
271 bits_per_word = bits_per_word - 1;
272
273 /* mask out bits we are going to set */
274 cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16
275 | SPMODE_PM(0xF));
276
277 cs->hw_mode |= SPMODE_LEN(bits_per_word);
278
279 if ((mpc8xxx_spi->spibrg / hz) > 64) {
280 cs->hw_mode |= SPMODE_DIV16;
281 pm = mpc8xxx_spi->spibrg / (hz * 64);
282
283 WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
284 "Will use %d Hz instead.\n", dev_name(&spi->dev),
285 hz, mpc8xxx_spi->spibrg / 1024);
286 if (pm > 16)
287 pm = 16;
288 } else
289 pm = mpc8xxx_spi->spibrg / (hz * 4);
290 if (pm)
291 pm--;
292
293 cs->hw_mode |= SPMODE_PM(pm);
294
295 mpc8xxx_spi_change_mode(spi);
296 return 0;
297}
298
299static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
300{
301 struct mpc8xxx_spi *mpc8xxx_spi;
302 u32 word, len, bits_per_word;
303
304 mpc8xxx_spi = spi_master_get_devdata(spi->master);
305
306 mpc8xxx_spi->tx = t->tx_buf;
307 mpc8xxx_spi->rx = t->rx_buf;
308 bits_per_word = spi->bits_per_word;
309 if (t->bits_per_word)
310 bits_per_word = t->bits_per_word;
311 len = t->len;
312 if (bits_per_word > 8) {
313 /* invalid length? */
314 if (len & 1)
315 return -EINVAL;
316 len /= 2;
317 }
318 if (bits_per_word > 16) {
319 /* invalid length? */
320 if (len & 1)
321 return -EINVAL;
322 len /= 2;
323 }
324 mpc8xxx_spi->count = len;
325
326 INIT_COMPLETION(mpc8xxx_spi->done);
327
328 /* enable rx ints */
329 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, SPIM_NE);
330
331 /* transmit word */
332 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
333 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
334
335 wait_for_completion(&mpc8xxx_spi->done);
336
337 /* disable rx ints */
338 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
339
340 return mpc8xxx_spi->count;
341}
342
343static void mpc8xxx_spi_do_one_msg(struct spi_message *m)
344{
345 struct spi_device *spi = m->spi;
346 struct spi_transfer *t;
347 unsigned int cs_change;
348 const int nsecs = 50;
349 int status;
350
351 cs_change = 1;
352 status = 0;
353 list_for_each_entry(t, &m->transfers, transfer_list) {
354 if (t->bits_per_word || t->speed_hz) {
355 /* Don't allow changes if CS is active */
356 status = -EINVAL;
357
358 if (cs_change)
359 status = mpc8xxx_spi_setup_transfer(spi, t);
360 if (status < 0)
361 break;
362 }
363
364 if (cs_change) {
365 mpc8xxx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
366 ndelay(nsecs);
367 }
368 cs_change = t->cs_change;
369 if (t->len)
370 status = mpc8xxx_spi_bufs(spi, t);
371 if (status) {
372 status = -EMSGSIZE;
373 break;
374 }
375 m->actual_length += t->len;
376
377 if (t->delay_usecs)
378 udelay(t->delay_usecs);
379
380 if (cs_change) {
381 ndelay(nsecs);
382 mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
383 ndelay(nsecs);
384 }
385 }
386
387 m->status = status;
388 m->complete(m->context);
389
390 if (status || !cs_change) {
391 ndelay(nsecs);
392 mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
393 }
394
395 mpc8xxx_spi_setup_transfer(spi, NULL);
396}
397
398static void mpc8xxx_spi_work(struct work_struct *work)
399{
400 struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
401 work);
402
403 spin_lock_irq(&mpc8xxx_spi->lock);
404 while (!list_empty(&mpc8xxx_spi->queue)) {
405 struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
406 struct spi_message, queue);
407
408 list_del_init(&m->queue);
409 spin_unlock_irq(&mpc8xxx_spi->lock);
410
411 mpc8xxx_spi_do_one_msg(m);
412
413 spin_lock_irq(&mpc8xxx_spi->lock);
414 }
415 spin_unlock_irq(&mpc8xxx_spi->lock);
416}
417
418static int mpc8xxx_spi_setup(struct spi_device *spi)
419{
420 struct mpc8xxx_spi *mpc8xxx_spi;
421 int retval;
422 u32 hw_mode;
423 struct spi_mpc8xxx_cs *cs = spi->controller_state;
424
425 if (!spi->max_speed_hz)
426 return -EINVAL;
427
428 if (!cs) {
429 cs = kzalloc(sizeof *cs, GFP_KERNEL);
430 if (!cs)
431 return -ENOMEM;
432 spi->controller_state = cs;
433 }
434 mpc8xxx_spi = spi_master_get_devdata(spi->master);
435
436 hw_mode = cs->hw_mode; /* Save orginal settings */
437 cs->hw_mode = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
438 /* mask out bits we are going to set */
439 cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH
440 | SPMODE_REV | SPMODE_LOOP);
441
442 if (spi->mode & SPI_CPHA)
443 cs->hw_mode |= SPMODE_CP_BEGIN_EDGECLK;
444 if (spi->mode & SPI_CPOL)
445 cs->hw_mode |= SPMODE_CI_INACTIVEHIGH;
446 if (!(spi->mode & SPI_LSB_FIRST))
447 cs->hw_mode |= SPMODE_REV;
448 if (spi->mode & SPI_LOOP)
449 cs->hw_mode |= SPMODE_LOOP;
450
451 retval = mpc8xxx_spi_setup_transfer(spi, NULL);
452 if (retval < 0) {
453 cs->hw_mode = hw_mode; /* Restore settings */
454 return retval;
455 }
456 return 0;
457}
458
459static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
460{
461 struct mpc8xxx_spi *mpc8xxx_spi = context_data;
462 u32 event;
463 irqreturn_t ret = IRQ_NONE;
464
465 /* Get interrupt events(tx/rx) */
466 event = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event);
467
468 /* We need handle RX first */
469 if (event & SPIE_NE) {
470 u32 rx_data = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->receive);
471
472 if (mpc8xxx_spi->rx)
473 mpc8xxx_spi->get_rx(rx_data, mpc8xxx_spi);
474
475 ret = IRQ_HANDLED;
476 }
477
478 if ((event & SPIE_NF) == 0)
479 /* spin until TX is done */
480 while (((event =
481 mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event)) &
482 SPIE_NF) == 0)
483 cpu_relax();
484
485 mpc8xxx_spi->count -= 1;
486 if (mpc8xxx_spi->count) {
487 u32 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
488 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
489 } else {
490 complete(&mpc8xxx_spi->done);
491 }
492
493 /* Clear the events */
494 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, event);
495
496 return ret;
497}
498static int mpc8xxx_spi_transfer(struct spi_device *spi,
499 struct spi_message *m)
500{
501 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
502 unsigned long flags;
503
504 m->actual_length = 0;
505 m->status = -EINPROGRESS;
506
507 spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
508 list_add_tail(&m->queue, &mpc8xxx_spi->queue);
509 queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
510 spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
511
512 return 0;
513}
514
515
516static void mpc8xxx_spi_cleanup(struct spi_device *spi)
517{
518 kfree(spi->controller_state);
519}
520
521static struct spi_master * __devinit
522mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
523{
524 struct fsl_spi_platform_data *pdata = dev->platform_data;
525 struct spi_master *master;
526 struct mpc8xxx_spi *mpc8xxx_spi;
527 u32 regval;
528 int ret = 0;
529
530 master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
531 if (master == NULL) {
532 ret = -ENOMEM;
533 goto err;
534 }
535
536 dev_set_drvdata(dev, master);
537
538 /* the spi->mode bits understood by this driver: */
539 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
540 | SPI_LSB_FIRST | SPI_LOOP;
541
542 master->setup = mpc8xxx_spi_setup;
543 master->transfer = mpc8xxx_spi_transfer;
544 master->cleanup = mpc8xxx_spi_cleanup;
545
546 mpc8xxx_spi = spi_master_get_devdata(master);
547 mpc8xxx_spi->qe_mode = pdata->qe_mode;
548 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
549 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
550 mpc8xxx_spi->spibrg = pdata->sysclk;
551
552 mpc8xxx_spi->rx_shift = 0;
553 mpc8xxx_spi->tx_shift = 0;
554 if (mpc8xxx_spi->qe_mode) {
555 mpc8xxx_spi->rx_shift = 16;
556 mpc8xxx_spi->tx_shift = 24;
557 }
558
559 init_completion(&mpc8xxx_spi->done);
560
561 mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
562 if (mpc8xxx_spi->base == NULL) {
563 ret = -ENOMEM;
564 goto put_master;
565 }
566
567 mpc8xxx_spi->irq = irq;
568
569 /* Register for SPI Interrupt */
570 ret = request_irq(mpc8xxx_spi->irq, mpc8xxx_spi_irq,
571 0, "mpc8xxx_spi", mpc8xxx_spi);
572
573 if (ret != 0)
574 goto unmap_io;
575
576 master->bus_num = pdata->bus_num;
577 master->num_chipselect = pdata->max_chipselect;
578
579 /* SPI controller initializations */
580 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, 0);
581 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
582 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->command, 0);
583 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, 0xffffffff);
584
585 /* Enable SPI interface */
586 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
587 if (pdata->qe_mode)
588 regval |= SPMODE_OP;
589
590 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
591 spin_lock_init(&mpc8xxx_spi->lock);
592 init_completion(&mpc8xxx_spi->done);
593 INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
594 INIT_LIST_HEAD(&mpc8xxx_spi->queue);
595
596 mpc8xxx_spi->workqueue = create_singlethread_workqueue(
597 dev_name(master->dev.parent));
598 if (mpc8xxx_spi->workqueue == NULL) {
599 ret = -EBUSY;
600 goto free_irq;
601 }
602
603 ret = spi_register_master(master);
604 if (ret < 0)
605 goto unreg_master;
606
607 printk(KERN_INFO
608 "%s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n",
609 dev_name(dev), mpc8xxx_spi->base, mpc8xxx_spi->irq);
610
611 return master;
612
613unreg_master:
614 destroy_workqueue(mpc8xxx_spi->workqueue);
615free_irq:
616 free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
617unmap_io:
618 iounmap(mpc8xxx_spi->base);
619put_master:
620 spi_master_put(master);
621err:
622 return ERR_PTR(ret);
623}
624
625static int __devexit mpc8xxx_spi_remove(struct device *dev)
626{
627 struct mpc8xxx_spi *mpc8xxx_spi;
628 struct spi_master *master;
629
630 master = dev_get_drvdata(dev);
631 mpc8xxx_spi = spi_master_get_devdata(master);
632
633 flush_workqueue(mpc8xxx_spi->workqueue);
634 destroy_workqueue(mpc8xxx_spi->workqueue);
635 spi_unregister_master(master);
636
637 free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
638 iounmap(mpc8xxx_spi->base);
639
640 return 0;
641}
642
643struct mpc8xxx_spi_probe_info {
644 struct fsl_spi_platform_data pdata;
645 int *gpios;
646 bool *alow_flags;
647};
648
649static struct mpc8xxx_spi_probe_info *
650to_of_pinfo(struct fsl_spi_platform_data *pdata)
651{
652 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
653}
654
655static void mpc8xxx_spi_cs_control(struct spi_device *spi, bool on)
656{
657 struct device *dev = spi->dev.parent;
658 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
659 u16 cs = spi->chip_select;
660 int gpio = pinfo->gpios[cs];
661 bool alow = pinfo->alow_flags[cs];
662
663 gpio_set_value(gpio, on ^ alow);
664}
665
666static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
667{
668 struct device_node *np = dev_archdata_get_node(&dev->archdata);
669 struct fsl_spi_platform_data *pdata = dev->platform_data;
670 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
671 unsigned int ngpios;
672 int i = 0;
673 int ret;
674
675 ngpios = of_gpio_count(np);
676 if (!ngpios) {
677 /*
678 * SPI w/o chip-select line. One SPI device is still permitted
679 * though.
680 */
681 pdata->max_chipselect = 1;
682 return 0;
683 }
684
685 pinfo->gpios = kmalloc(ngpios * sizeof(*pinfo->gpios), GFP_KERNEL);
686 if (!pinfo->gpios)
687 return -ENOMEM;
688 memset(pinfo->gpios, -1, ngpios * sizeof(*pinfo->gpios));
689
690 pinfo->alow_flags = kzalloc(ngpios * sizeof(*pinfo->alow_flags),
691 GFP_KERNEL);
692 if (!pinfo->alow_flags) {
693 ret = -ENOMEM;
694 goto err_alloc_flags;
695 }
696
697 for (; i < ngpios; i++) {
698 int gpio;
699 enum of_gpio_flags flags;
700
701 gpio = of_get_gpio_flags(np, i, &flags);
702 if (!gpio_is_valid(gpio)) {
703 dev_err(dev, "invalid gpio #%d: %d\n", i, gpio);
704 ret = gpio;
705 goto err_loop;
706 }
707
708 ret = gpio_request(gpio, dev_name(dev));
709 if (ret) {
710 dev_err(dev, "can't request gpio #%d: %d\n", i, ret);
711 goto err_loop;
712 }
713
714 pinfo->gpios[i] = gpio;
715 pinfo->alow_flags[i] = flags & OF_GPIO_ACTIVE_LOW;
716
717 ret = gpio_direction_output(pinfo->gpios[i],
718 pinfo->alow_flags[i]);
719 if (ret) {
720 dev_err(dev, "can't set output direction for gpio "
721 "#%d: %d\n", i, ret);
722 goto err_loop;
723 }
724 }
725
726 pdata->max_chipselect = ngpios;
727 pdata->cs_control = mpc8xxx_spi_cs_control;
728
729 return 0;
730
731err_loop:
732 while (i >= 0) {
733 if (gpio_is_valid(pinfo->gpios[i]))
734 gpio_free(pinfo->gpios[i]);
735 i--;
736 }
737
738 kfree(pinfo->alow_flags);
739 pinfo->alow_flags = NULL;
740err_alloc_flags:
741 kfree(pinfo->gpios);
742 pinfo->gpios = NULL;
743 return ret;
744}
745
746static int of_mpc8xxx_spi_free_chipselects(struct device *dev)
747{
748 struct fsl_spi_platform_data *pdata = dev->platform_data;
749 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
750 int i;
751
752 if (!pinfo->gpios)
753 return 0;
754
755 for (i = 0; i < pdata->max_chipselect; i++) {
756 if (gpio_is_valid(pinfo->gpios[i]))
757 gpio_free(pinfo->gpios[i]);
758 }
759
760 kfree(pinfo->gpios);
761 kfree(pinfo->alow_flags);
762 return 0;
763}
764
765static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
766 const struct of_device_id *ofid)
767{
768 struct device *dev = &ofdev->dev;
769 struct device_node *np = ofdev->node;
770 struct mpc8xxx_spi_probe_info *pinfo;
771 struct fsl_spi_platform_data *pdata;
772 struct spi_master *master;
773 struct resource mem;
774 struct resource irq;
775 const void *prop;
776 int ret = -ENOMEM;
777
778 pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL);
779 if (!pinfo)
780 return -ENOMEM;
781
782 pdata = &pinfo->pdata;
783 dev->platform_data = pdata;
784
785 /* Allocate bus num dynamically. */
786 pdata->bus_num = -1;
787
788 /* SPI controller is either clocked from QE or SoC clock. */
789 pdata->sysclk = get_brgfreq();
790 if (pdata->sysclk == -1) {
791 pdata->sysclk = fsl_get_sys_freq();
792 if (pdata->sysclk == -1) {
793 ret = -ENODEV;
794 goto err_clk;
795 }
796 }
797
798 prop = of_get_property(np, "mode", NULL);
799 if (prop && !strcmp(prop, "cpu-qe"))
800 pdata->qe_mode = 1;
801
802 ret = of_mpc8xxx_spi_get_chipselects(dev);
803 if (ret)
804 goto err;
805
806 ret = of_address_to_resource(np, 0, &mem);
807 if (ret)
808 goto err;
809
810 ret = of_irq_to_resource(np, 0, &irq);
811 if (!ret) {
812 ret = -EINVAL;
813 goto err;
814 }
815
816 master = mpc8xxx_spi_probe(dev, &mem, irq.start);
817 if (IS_ERR(master)) {
818 ret = PTR_ERR(master);
819 goto err;
820 }
821
822 of_register_spi_devices(master, np);
823
824 return 0;
825
826err:
827 of_mpc8xxx_spi_free_chipselects(dev);
828err_clk:
829 kfree(pinfo);
830 return ret;
831}
832
833static int __devexit of_mpc8xxx_spi_remove(struct of_device *ofdev)
834{
835 int ret;
836
837 ret = mpc8xxx_spi_remove(&ofdev->dev);
838 if (ret)
839 return ret;
840 of_mpc8xxx_spi_free_chipselects(&ofdev->dev);
841 return 0;
842}
843
844static const struct of_device_id of_mpc8xxx_spi_match[] = {
845 { .compatible = "fsl,spi" },
846 {},
847};
848MODULE_DEVICE_TABLE(of, of_mpc8xxx_spi_match);
849
850static struct of_platform_driver of_mpc8xxx_spi_driver = {
851 .name = "mpc8xxx_spi",
852 .match_table = of_mpc8xxx_spi_match,
853 .probe = of_mpc8xxx_spi_probe,
854 .remove = __devexit_p(of_mpc8xxx_spi_remove),
855};
856
857#ifdef CONFIG_MPC832x_RDB
858/*
859 * XXX XXX XXX
860 * This is "legacy" platform driver, was used by the MPC8323E-RDB boards
861 * only. The driver should go away soon, since newer MPC8323E-RDB's device
862 * tree can work with OpenFirmware driver. But for now we support old trees
863 * as well.
864 */
865static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev)
866{
867 struct resource *mem;
868 unsigned int irq;
869 struct spi_master *master;
870
871 if (!pdev->dev.platform_data)
872 return -EINVAL;
873
874 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
875 if (!mem)
876 return -EINVAL;
877
878 irq = platform_get_irq(pdev, 0);
879 if (!irq)
880 return -EINVAL;
881
882 master = mpc8xxx_spi_probe(&pdev->dev, mem, irq);
883 if (IS_ERR(master))
884 return PTR_ERR(master);
885 return 0;
886}
887
888static int __devexit plat_mpc8xxx_spi_remove(struct platform_device *pdev)
889{
890 return mpc8xxx_spi_remove(&pdev->dev);
891}
892
893MODULE_ALIAS("platform:mpc8xxx_spi");
894static struct platform_driver mpc8xxx_spi_driver = {
895 .probe = plat_mpc8xxx_spi_probe,
896 .remove = __exit_p(plat_mpc8xxx_spi_remove),
897 .driver = {
898 .name = "mpc8xxx_spi",
899 .owner = THIS_MODULE,
900 },
901};
902
903static bool legacy_driver_failed;
904
905static void __init legacy_driver_register(void)
906{
907 legacy_driver_failed = platform_driver_register(&mpc8xxx_spi_driver);
908}
909
910static void __exit legacy_driver_unregister(void)
911{
912 if (legacy_driver_failed)
913 return;
914 platform_driver_unregister(&mpc8xxx_spi_driver);
915}
916#else
917static void __init legacy_driver_register(void) {}
918static void __exit legacy_driver_unregister(void) {}
919#endif /* CONFIG_MPC832x_RDB */
920
921static int __init mpc8xxx_spi_init(void)
922{
923 legacy_driver_register();
924 return of_register_platform_driver(&of_mpc8xxx_spi_driver);
925}
926
927static void __exit mpc8xxx_spi_exit(void)
928{
929 of_unregister_platform_driver(&of_mpc8xxx_spi_driver);
930 legacy_driver_unregister();
931}
932
933module_init(mpc8xxx_spi_init);
934module_exit(mpc8xxx_spi_exit);
935
936MODULE_AUTHOR("Kumar Gala");
937MODULE_DESCRIPTION("Simple MPC8xxx SPI Driver");
938MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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