| 1 | /****************************************************************************** |
| 2 | * rtl8712_xmit.c |
| 3 | * |
| 4 | * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. |
| 5 | * Linux device driver for RTL8192SU |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of version 2 of the GNU General Public License as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 19 | * |
| 20 | * Modifications for inclusion into the Linux staging tree are |
| 21 | * Copyright(c) 2010 Larry Finger. All rights reserved. |
| 22 | * |
| 23 | * Contact information: |
| 24 | * WLAN FAE <wlanfae@realtek.com> |
| 25 | * Larry Finger <Larry.Finger@lwfinger.net> |
| 26 | * |
| 27 | ******************************************************************************/ |
| 28 | |
| 29 | #define _RTL8712_XMIT_C_ |
| 30 | |
| 31 | #include "osdep_service.h" |
| 32 | #include "drv_types.h" |
| 33 | #include "wifi.h" |
| 34 | #include "osdep_intf.h" |
| 35 | #include "usb_ops.h" |
| 36 | |
| 37 | static void dump_xframe(struct _adapter *padapter, |
| 38 | struct xmit_frame *pxmitframe); |
| 39 | static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz); |
| 40 | |
| 41 | sint _r8712_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag) |
| 42 | { |
| 43 | phw_txqueue->ac_tag = ac_tag; |
| 44 | switch (ac_tag) { |
| 45 | case BE_QUEUE_INX: |
| 46 | phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ; |
| 47 | break; |
| 48 | case BK_QUEUE_INX: |
| 49 | phw_txqueue->ff_hwaddr = RTL8712_DMA_BKQ; |
| 50 | break; |
| 51 | case VI_QUEUE_INX: |
| 52 | phw_txqueue->ff_hwaddr = RTL8712_DMA_VIQ; |
| 53 | break; |
| 54 | case VO_QUEUE_INX: |
| 55 | phw_txqueue->ff_hwaddr = RTL8712_DMA_VOQ; |
| 56 | break; |
| 57 | case BMC_QUEUE_INX: |
| 58 | phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ; |
| 59 | break; |
| 60 | } |
| 61 | return _SUCCESS; |
| 62 | } |
| 63 | |
| 64 | int r8712_txframes_sta_ac_pending(struct _adapter *padapter, |
| 65 | struct pkt_attrib *pattrib) |
| 66 | { |
| 67 | struct sta_info *psta; |
| 68 | struct tx_servq *ptxservq; |
| 69 | int priority = pattrib->priority; |
| 70 | |
| 71 | psta = pattrib->psta; |
| 72 | switch (priority) { |
| 73 | case 1: |
| 74 | case 2: |
| 75 | ptxservq = &(psta->sta_xmitpriv.bk_q); |
| 76 | break; |
| 77 | case 4: |
| 78 | case 5: |
| 79 | ptxservq = &(psta->sta_xmitpriv.vi_q); |
| 80 | break; |
| 81 | case 6: |
| 82 | case 7: |
| 83 | ptxservq = &(psta->sta_xmitpriv.vo_q); |
| 84 | break; |
| 85 | case 0: |
| 86 | case 3: |
| 87 | default: |
| 88 | ptxservq = &(psta->sta_xmitpriv.be_q); |
| 89 | break; |
| 90 | } |
| 91 | return ptxservq->qcnt; |
| 92 | } |
| 93 | |
| 94 | static u32 get_ff_hwaddr(struct xmit_frame *pxmitframe) |
| 95 | { |
| 96 | u32 addr = 0; |
| 97 | struct pkt_attrib *pattrib = &pxmitframe->attrib; |
| 98 | struct _adapter *padapter = pxmitframe->padapter; |
| 99 | struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; |
| 100 | |
| 101 | if (pxmitframe->frame_tag == TXAGG_FRAMETAG) |
| 102 | addr = RTL8712_DMA_H2CCMD; |
| 103 | else if (pxmitframe->frame_tag == MGNT_FRAMETAG) |
| 104 | addr = RTL8712_DMA_MGTQ; |
| 105 | else if (pdvobj->nr_endpoint == 6) { |
| 106 | switch (pattrib->priority) { |
| 107 | case 0: |
| 108 | case 3: |
| 109 | addr = RTL8712_DMA_BEQ; |
| 110 | break; |
| 111 | case 1: |
| 112 | case 2: |
| 113 | addr = RTL8712_DMA_BKQ; |
| 114 | break; |
| 115 | case 4: |
| 116 | case 5: |
| 117 | addr = RTL8712_DMA_VIQ; |
| 118 | break; |
| 119 | case 6: |
| 120 | case 7: |
| 121 | addr = RTL8712_DMA_VOQ; |
| 122 | break; |
| 123 | case 0x10: |
| 124 | case 0x11: |
| 125 | case 0x12: |
| 126 | case 0x13: |
| 127 | addr = RTL8712_DMA_H2CCMD; |
| 128 | break; |
| 129 | default: |
| 130 | addr = RTL8712_DMA_BEQ; |
| 131 | break; |
| 132 | } |
| 133 | } else if (pdvobj->nr_endpoint == 4) { |
| 134 | switch (pattrib->qsel) { |
| 135 | case 0: |
| 136 | case 3: |
| 137 | case 1: |
| 138 | case 2: |
| 139 | addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/ |
| 140 | break; |
| 141 | case 4: |
| 142 | case 5: |
| 143 | case 6: |
| 144 | case 7: |
| 145 | addr = RTL8712_DMA_VOQ;/*RTL8712_EP_HI;*/ |
| 146 | break; |
| 147 | case 0x10: |
| 148 | case 0x11: |
| 149 | case 0x12: |
| 150 | case 0x13: |
| 151 | addr = RTL8712_DMA_H2CCMD; |
| 152 | break; |
| 153 | default: |
| 154 | addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/ |
| 155 | break; |
| 156 | } |
| 157 | } |
| 158 | return addr; |
| 159 | } |
| 160 | |
| 161 | static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, |
| 162 | struct hw_xmit *phwxmit, |
| 163 | struct tx_servq *ptxservq, |
| 164 | struct __queue *pframe_queue) |
| 165 | { |
| 166 | struct list_head *xmitframe_plist, *xmitframe_phead; |
| 167 | struct xmit_frame *pxmitframe = NULL; |
| 168 | |
| 169 | xmitframe_phead = get_list_head(pframe_queue); |
| 170 | xmitframe_plist = get_next(xmitframe_phead); |
| 171 | if ((end_of_queue_search(xmitframe_phead, xmitframe_plist)) == false) { |
| 172 | pxmitframe = LIST_CONTAINOR(xmitframe_plist, |
| 173 | struct xmit_frame, list); |
| 174 | list_delete(&pxmitframe->list); |
| 175 | ptxservq->qcnt--; |
| 176 | phwxmit->txcmdcnt++; |
| 177 | } |
| 178 | return pxmitframe; |
| 179 | } |
| 180 | |
| 181 | static struct xmit_frame *dequeue_xframe_ex(struct xmit_priv *pxmitpriv, |
| 182 | struct hw_xmit *phwxmit_i, sint entry) |
| 183 | { |
| 184 | unsigned long irqL0; |
| 185 | struct list_head *sta_plist, *sta_phead; |
| 186 | struct hw_xmit *phwxmit; |
| 187 | struct tx_servq *ptxservq = NULL; |
| 188 | struct __queue *pframe_queue = NULL; |
| 189 | struct xmit_frame *pxmitframe = NULL; |
| 190 | int i, inx[4]; |
| 191 | int j, tmp, acirp_cnt[4]; |
| 192 | |
| 193 | /*entry indx: 0->vo, 1->vi, 2->be, 3->bk.*/ |
| 194 | inx[0] = 0; acirp_cnt[0] = pxmitpriv->voq_cnt; |
| 195 | inx[1] = 1; acirp_cnt[1] = pxmitpriv->viq_cnt; |
| 196 | inx[2] = 2; acirp_cnt[2] = pxmitpriv->beq_cnt; |
| 197 | inx[3] = 3; acirp_cnt[3] = pxmitpriv->bkq_cnt; |
| 198 | for (i = 0; i < 4; i++) { |
| 199 | for (j = i + 1; j < 4; j++) { |
| 200 | if (acirp_cnt[j] < acirp_cnt[i]) { |
| 201 | tmp = acirp_cnt[i]; |
| 202 | acirp_cnt[i] = acirp_cnt[j]; |
| 203 | acirp_cnt[j] = tmp; |
| 204 | tmp = inx[i]; |
| 205 | inx[i] = inx[j]; |
| 206 | inx[j] = tmp; |
| 207 | } |
| 208 | } |
| 209 | } |
| 210 | spin_lock_irqsave(&pxmitpriv->lock, irqL0); |
| 211 | for (i = 0; i < entry; i++) { |
| 212 | phwxmit = phwxmit_i + inx[i]; |
| 213 | sta_phead = get_list_head(phwxmit->sta_queue); |
| 214 | sta_plist = get_next(sta_phead); |
| 215 | while ((end_of_queue_search(sta_phead, sta_plist)) == false) { |
| 216 | ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, |
| 217 | tx_pending); |
| 218 | pframe_queue = &ptxservq->sta_pending; |
| 219 | pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, |
| 220 | ptxservq, pframe_queue); |
| 221 | if (pxmitframe) { |
| 222 | phwxmit->accnt--; |
| 223 | goto exit_dequeue_xframe_ex; |
| 224 | } |
| 225 | sta_plist = get_next(sta_plist); |
| 226 | /*Remove sta node when there are no pending packets.*/ |
| 227 | if (_queue_empty(pframe_queue)) { |
| 228 | /*must be done after get_next and before break*/ |
| 229 | list_delete(&ptxservq->tx_pending); |
| 230 | } |
| 231 | } |
| 232 | } |
| 233 | exit_dequeue_xframe_ex: |
| 234 | spin_unlock_irqrestore(&pxmitpriv->lock, irqL0); |
| 235 | return pxmitframe; |
| 236 | } |
| 237 | |
| 238 | void r8712_do_queue_select(struct _adapter *padapter, |
| 239 | struct pkt_attrib *pattrib) |
| 240 | { |
| 241 | unsigned int qsel = 0; |
| 242 | struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; |
| 243 | |
| 244 | if (pdvobj->nr_endpoint == 6) |
| 245 | qsel = (unsigned int) pattrib->priority; |
| 246 | else if (pdvobj->nr_endpoint == 4) { |
| 247 | qsel = (unsigned int) pattrib->priority; |
| 248 | if (qsel == 0 || qsel == 3) |
| 249 | qsel = 3; |
| 250 | else if (qsel == 1 || qsel == 2) |
| 251 | qsel = 1; |
| 252 | else if (qsel == 4 || qsel == 5) |
| 253 | qsel = 5; |
| 254 | else if (qsel == 6 || qsel == 7) |
| 255 | qsel = 7; |
| 256 | else |
| 257 | qsel = 3; |
| 258 | } |
| 259 | pattrib->qsel = qsel; |
| 260 | } |
| 261 | |
| 262 | #ifdef CONFIG_R8712_TX_AGGR |
| 263 | u8 r8712_construct_txaggr_cmd_desc(struct xmit_buf *pxmitbuf) |
| 264 | { |
| 265 | struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf; |
| 266 | |
| 267 | /* Fill up TxCmd Descriptor according as USB FW Tx Aaggregation info.*/ |
| 268 | /* dw0 */ |
| 269 | ptx_desc->txdw0 = cpu_to_le32(CMD_HDR_SZ&0xffff); |
| 270 | ptx_desc->txdw0 |= |
| 271 | cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); |
| 272 | ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); |
| 273 | |
| 274 | /* dw1 */ |
| 275 | ptx_desc->txdw1 |= cpu_to_le32((0x13<<QSEL_SHT)&0x00001f00); |
| 276 | |
| 277 | return _SUCCESS; |
| 278 | } |
| 279 | |
| 280 | u8 r8712_construct_txaggr_cmd_hdr(struct xmit_buf *pxmitbuf) |
| 281 | { |
| 282 | struct xmit_frame *pxmitframe = (struct xmit_frame *) |
| 283 | pxmitbuf->priv_data; |
| 284 | struct _adapter *padapter = pxmitframe->padapter; |
| 285 | struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); |
| 286 | struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *) |
| 287 | (pxmitbuf->pbuf + TXDESC_SIZE); |
| 288 | |
| 289 | /* Fill up Cmd Header for USB FW Tx Aggregation.*/ |
| 290 | /* dw0 */ |
| 291 | pcmd_hdr->cmd_dw0 = cpu_to_le32((GEN_CMD_CODE(_AMSDU_TO_AMPDU) << 16) | |
| 292 | (pcmdpriv->cmd_seq << 24)); |
| 293 | pcmdpriv->cmd_seq++; |
| 294 | |
| 295 | return _SUCCESS; |
| 296 | } |
| 297 | |
| 298 | u8 r8712_append_mpdu_unit(struct xmit_buf *pxmitbuf, |
| 299 | struct xmit_frame *pxmitframe) |
| 300 | { |
| 301 | struct _adapter *padapter = pxmitframe->padapter; |
| 302 | struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf; |
| 303 | int last_txcmdsz = 0; |
| 304 | int padding_sz = 0; |
| 305 | |
| 306 | /* 802.3->802.11 convertor */ |
| 307 | r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); |
| 308 | /* free skb struct */ |
| 309 | r8712_xmit_complete(padapter, pxmitframe); |
| 310 | if (pxmitframe->attrib.ether_type != 0x0806) { |
| 311 | if ((pxmitframe->attrib.ether_type != 0x888e) && |
| 312 | (pxmitframe->attrib.dhcp_pkt != 1)) { |
| 313 | r8712_issue_addbareq_cmd(padapter, |
| 314 | pxmitframe->attrib.priority); |
| 315 | } |
| 316 | } |
| 317 | pxmitframe->last[0] = 1; |
| 318 | update_txdesc(pxmitframe, (uint *)(pxmitframe->buf_addr), |
| 319 | pxmitframe->attrib.last_txcmdsz); |
| 320 | /*padding zero */ |
| 321 | last_txcmdsz = pxmitframe->attrib.last_txcmdsz; |
| 322 | padding_sz = (8 - (last_txcmdsz % 8)); |
| 323 | if ((last_txcmdsz % 8) != 0) { |
| 324 | int i; |
| 325 | for (i = 0; i < padding_sz; i++) |
| 326 | *(pxmitframe->buf_addr+TXDESC_SIZE+last_txcmdsz+i) = 0; |
| 327 | } |
| 328 | /* Add the new mpdu's length */ |
| 329 | ptx_desc->txdw0 = cpu_to_le32((ptx_desc->txdw0&0xffff0000) | |
| 330 | ((ptx_desc->txdw0&0x0000ffff)+ |
| 331 | ((TXDESC_SIZE+last_txcmdsz+padding_sz)&0x0000ffff))); |
| 332 | |
| 333 | return _SUCCESS; |
| 334 | } |
| 335 | |
| 336 | |
| 337 | u8 r8712_xmitframe_aggr_1st(struct xmit_buf *pxmitbuf, |
| 338 | struct xmit_frame *pxmitframe) |
| 339 | { |
| 340 | /* linux complete context doesnt need to protect */ |
| 341 | pxmitframe->pxmitbuf = pxmitbuf; |
| 342 | pxmitbuf->priv_data = pxmitframe; |
| 343 | pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0]; |
| 344 | /* buffer addr assoc */ |
| 345 | pxmitframe->buf_addr = pxmitbuf->pbuf+TXDESC_SIZE+CMD_HDR_SZ; |
| 346 | /*RTL8712_DMA_H2CCMD */ |
| 347 | r8712_construct_txaggr_cmd_desc(pxmitbuf); |
| 348 | r8712_construct_txaggr_cmd_hdr(pxmitbuf); |
| 349 | if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS) |
| 350 | pxmitbuf->aggr_nr = 1; |
| 351 | |
| 352 | return _SUCCESS; |
| 353 | } |
| 354 | |
| 355 | u16 r8712_xmitframe_aggr_next(struct xmit_buf *pxmitbuf, |
| 356 | struct xmit_frame *pxmitframe) |
| 357 | { |
| 358 | pxmitframe->pxmitbuf = pxmitbuf; |
| 359 | pxmitbuf->priv_data = pxmitframe; |
| 360 | pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0]; |
| 361 | /* buffer addr assoc */ |
| 362 | pxmitframe->buf_addr = pxmitbuf->pbuf + TXDESC_SIZE + |
| 363 | (((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff); |
| 364 | if (r8712_append_mpdu_unit(pxmitbuf, pxmitframe) == _SUCCESS) { |
| 365 | r8712_free_xmitframe_ex(&pxmitframe->padapter->xmitpriv, |
| 366 | pxmitframe); |
| 367 | pxmitbuf->aggr_nr++; |
| 368 | } |
| 369 | |
| 370 | return TXDESC_SIZE + |
| 371 | (((struct tx_desc *)pxmitbuf->pbuf)->txdw0 & 0x0000ffff); |
| 372 | } |
| 373 | |
| 374 | u8 r8712_dump_aggr_xframe(struct xmit_buf *pxmitbuf, |
| 375 | struct xmit_frame *pxmitframe) |
| 376 | { |
| 377 | struct _adapter *padapter = pxmitframe->padapter; |
| 378 | struct dvobj_priv *pdvobj = (struct dvobj_priv *) &padapter->dvobjpriv; |
| 379 | struct tx_desc *ptxdesc = (struct tx_desc *)pxmitbuf->pbuf; |
| 380 | struct cmd_hdr *pcmd_hdr = (struct cmd_hdr *) |
| 381 | (pxmitbuf->pbuf + TXDESC_SIZE); |
| 382 | u16 total_length = (u16) (ptxdesc->txdw0 & 0xffff); |
| 383 | |
| 384 | /* use 1st xmitframe as media */ |
| 385 | xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf); |
| 386 | pcmd_hdr->cmd_dw0 = cpu_to_le32(((total_length-CMD_HDR_SZ)&0x0000ffff)| |
| 387 | (pcmd_hdr->cmd_dw0&0xffff0000)); |
| 388 | |
| 389 | /* urb length in cmd_dw1 */ |
| 390 | pcmd_hdr->cmd_dw1 = cpu_to_le32((pxmitbuf->aggr_nr & 0xff)| |
| 391 | ((total_length+TXDESC_SIZE) << 16)); |
| 392 | pxmitframe->last[0] = 1; |
| 393 | pxmitframe->bpending[0] = false; |
| 394 | pxmitframe->mem_addr = pxmitbuf->pbuf; |
| 395 | |
| 396 | if ((pdvobj->ishighspeed && ((total_length+TXDESC_SIZE)%0x200) == 0) || |
| 397 | ((!pdvobj->ishighspeed && |
| 398 | ((total_length+TXDESC_SIZE)%0x40) == 0))) { |
| 399 | ptxdesc->txdw0 |= cpu_to_le32 |
| 400 | (((TXDESC_SIZE+OFFSET_SZ+8)<<OFFSET_SHT)&0x00ff0000); |
| 401 | /*32 bytes for TX Desc + 8 bytes pending*/ |
| 402 | } else { |
| 403 | ptxdesc->txdw0 |= cpu_to_le32 |
| 404 | (((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); |
| 405 | /*default = 32 bytes for TX Desc*/ |
| 406 | } |
| 407 | r8712_write_port(pxmitframe->padapter, RTL8712_DMA_H2CCMD, |
| 408 | total_length+TXDESC_SIZE, (u8 *)pxmitframe); |
| 409 | |
| 410 | return _SUCCESS; |
| 411 | } |
| 412 | |
| 413 | #endif |
| 414 | |
| 415 | static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz) |
| 416 | { |
| 417 | uint qsel; |
| 418 | struct _adapter *padapter = pxmitframe->padapter; |
| 419 | struct mlme_priv *pmlmepriv = &padapter->mlmepriv; |
| 420 | struct qos_priv *pqospriv = &pmlmepriv->qospriv; |
| 421 | struct security_priv *psecuritypriv = &padapter->securitypriv; |
| 422 | struct pkt_attrib *pattrib = &pxmitframe->attrib; |
| 423 | struct tx_desc *ptxdesc = (struct tx_desc *)pmem; |
| 424 | struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; |
| 425 | #ifdef CONFIG_R8712_TX_AGGR |
| 426 | struct cmd_priv *pcmdpriv = (struct cmd_priv *)&padapter->cmdpriv; |
| 427 | #endif |
| 428 | u8 blnSetTxDescOffset; |
| 429 | sint bmcst = IS_MCAST(pattrib->ra); |
| 430 | struct ht_priv *phtpriv = &pmlmepriv->htpriv; |
| 431 | struct tx_desc txdesc_mp; |
| 432 | |
| 433 | memcpy(&txdesc_mp, ptxdesc, sizeof(struct tx_desc)); |
| 434 | memset(ptxdesc, 0, sizeof(struct tx_desc)); |
| 435 | /* offset 0 */ |
| 436 | ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff); |
| 437 | if (pdvobj->ishighspeed) { |
| 438 | if (((sz + TXDESC_SIZE) % 512) == 0) |
| 439 | blnSetTxDescOffset = 1; |
| 440 | else |
| 441 | blnSetTxDescOffset = 0; |
| 442 | } else { |
| 443 | if (((sz + TXDESC_SIZE) % 64) == 0) |
| 444 | blnSetTxDescOffset = 1; |
| 445 | else |
| 446 | blnSetTxDescOffset = 0; |
| 447 | } |
| 448 | if (blnSetTxDescOffset) { |
| 449 | /* 32 bytes for TX Desc + 8 bytes pending */ |
| 450 | ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ + 8) << |
| 451 | OFFSET_SHT) & 0x00ff0000); |
| 452 | } else { |
| 453 | /* default = 32 bytes for TX Desc */ |
| 454 | ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ) << |
| 455 | OFFSET_SHT) & 0x00ff0000); |
| 456 | } |
| 457 | ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); |
| 458 | if (pxmitframe->frame_tag == DATA_FRAMETAG) { |
| 459 | /* offset 4 */ |
| 460 | ptxdesc->txdw1 |= cpu_to_le32((pattrib->mac_id)&0x1f); |
| 461 | |
| 462 | #ifdef CONFIG_R8712_TX_AGGR |
| 463 | /* dirty workaround, need to check if it is aggr cmd. */ |
| 464 | if ((u8 *)pmem != (u8 *)pxmitframe->pxmitbuf->pbuf) { |
| 465 | ptxdesc->txdw0 |= cpu_to_le32 |
| 466 | ((0x3 << TYPE_SHT)&TYPE_MSK); |
| 467 | qsel = (uint)(pattrib->qsel & 0x0000001f); |
| 468 | if (qsel == 2) |
| 469 | qsel = 0; |
| 470 | ptxdesc->txdw1 |= cpu_to_le32 |
| 471 | ((qsel << QSEL_SHT) & 0x00001f00); |
| 472 | ptxdesc->txdw2 = cpu_to_le32 |
| 473 | ((qsel << RTS_RC_SHT)&0x001f0000); |
| 474 | ptxdesc->txdw6 |= cpu_to_le32 |
| 475 | ((0x5 << RSVD6_SHT)&RSVD6_MSK); |
| 476 | } else { |
| 477 | ptxdesc->txdw0 |= cpu_to_le32 |
| 478 | ((0x3 << TYPE_SHT)&TYPE_MSK); |
| 479 | ptxdesc->txdw1 |= cpu_to_le32 |
| 480 | ((0x13 << QSEL_SHT) & 0x00001f00); |
| 481 | qsel = (uint)(pattrib->qsel & 0x0000001f); |
| 482 | if (qsel == 2) |
| 483 | qsel = 0; |
| 484 | ptxdesc->txdw2 = cpu_to_le32 |
| 485 | ((qsel << RTS_RC_SHT)&0x0001f000); |
| 486 | ptxdesc->txdw7 |= cpu_to_le32 |
| 487 | (pcmdpriv->cmd_seq << 24); |
| 488 | pcmdpriv->cmd_seq++; |
| 489 | } |
| 490 | pattrib->qsel = 0x13; |
| 491 | #else |
| 492 | qsel = (uint)(pattrib->qsel & 0x0000001f); |
| 493 | ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); |
| 494 | #endif |
| 495 | if (!pqospriv->qos_option) |
| 496 | ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/*Non-QoS*/ |
| 497 | if ((pattrib->encrypt > 0) && !pattrib->bswenc) { |
| 498 | switch (pattrib->encrypt) { /*SEC_TYPE*/ |
| 499 | case _WEP40_: |
| 500 | case _WEP104_: |
| 501 | ptxdesc->txdw1 |= cpu_to_le32((0x01 << 22) & |
| 502 | 0x00c00000); |
| 503 | /*KEY_ID when WEP is used;*/ |
| 504 | ptxdesc->txdw1 |= cpu_to_le32((psecuritypriv-> |
| 505 | PrivacyKeyIndex << 17) & |
| 506 | 0x00060000); |
| 507 | break; |
| 508 | case _TKIP_: |
| 509 | case _TKIP_WTMIC_: |
| 510 | ptxdesc->txdw1 |= cpu_to_le32((0x02 << 22) & |
| 511 | 0x00c00000); |
| 512 | break; |
| 513 | case _AES_: |
| 514 | ptxdesc->txdw1 |= cpu_to_le32((0x03 << 22) & |
| 515 | 0x00c00000); |
| 516 | break; |
| 517 | case _NO_PRIVACY_: |
| 518 | default: |
| 519 | break; |
| 520 | } |
| 521 | } |
| 522 | /*offset 8*/ |
| 523 | if (bmcst) |
| 524 | ptxdesc->txdw2 |= cpu_to_le32(BMC); |
| 525 | |
| 526 | /*offset 12*/ |
| 527 | /* f/w will increase the seqnum by itself, driver pass the |
| 528 | * correct priority to fw |
| 529 | * fw will check the correct priority for increasing the |
| 530 | * seqnum per tid. about usb using 4-endpoint, qsel points out |
| 531 | * the correct mapping between AC&Endpoint, |
| 532 | * the purpose is that correct mapping lets the MAC release |
| 533 | * the AC Queue list correctly. */ |
| 534 | ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) & |
| 535 | 0x0fff0000); |
| 536 | if ((pattrib->ether_type != 0x888e) && |
| 537 | (pattrib->ether_type != 0x0806) && |
| 538 | (pattrib->dhcp_pkt != 1)) { |
| 539 | /*Not EAP & ARP type data packet*/ |
| 540 | if (phtpriv->ht_option == 1) { /*B/G/N Mode*/ |
| 541 | if (phtpriv->ampdu_enable != true) |
| 542 | ptxdesc->txdw2 |= cpu_to_le32(BK); |
| 543 | } |
| 544 | } else { |
| 545 | /* EAP data packet and ARP packet. |
| 546 | * Use the 1M data rate to send the EAP/ARP packet. |
| 547 | * This will maybe make the handshake smooth. |
| 548 | */ |
| 549 | /*driver uses data rate*/ |
| 550 | ptxdesc->txdw4 = cpu_to_le32(0x80000000); |
| 551 | ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/*1M*/ |
| 552 | } |
| 553 | if (pattrib->pctrl == 1) { /* mp tx packets */ |
| 554 | struct tx_desc *ptxdesc_mp; |
| 555 | ptxdesc_mp = &txdesc_mp; |
| 556 | /* offset 8 */ |
| 557 | ptxdesc->txdw2 = cpu_to_le32(ptxdesc_mp->txdw2); |
| 558 | if (bmcst) |
| 559 | ptxdesc->txdw2 |= cpu_to_le32(BMC); |
| 560 | ptxdesc->txdw2 |= cpu_to_le32(BK); |
| 561 | /* offset 16 */ |
| 562 | ptxdesc->txdw4 = cpu_to_le32(ptxdesc_mp->txdw4); |
| 563 | /* offset 20 */ |
| 564 | ptxdesc->txdw5 = cpu_to_le32(ptxdesc_mp->txdw5); |
| 565 | pattrib->pctrl = 0;/* reset to zero; */ |
| 566 | } |
| 567 | } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) { |
| 568 | /* offset 4 */ |
| 569 | ptxdesc->txdw1 |= (0x05) & 0x1f;/*CAM_ID(MAC_ID), default=5;*/ |
| 570 | qsel = (uint)(pattrib->qsel & 0x0000001f); |
| 571 | ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); |
| 572 | ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/* Non-QoS */ |
| 573 | /* offset 8 */ |
| 574 | if (bmcst) |
| 575 | ptxdesc->txdw2 |= cpu_to_le32(BMC); |
| 576 | /* offset 12 */ |
| 577 | /* f/w will increase the seqnum by itself, driver pass the |
| 578 | * correct priority to fw |
| 579 | * fw will check the correct priority for increasing the seqnum |
| 580 | * per tid. about usb using 4-endpoint, qsel points out the |
| 581 | * correct mapping between AC&Endpoint, |
| 582 | * the purpose is that correct mapping let the MAC releases |
| 583 | * the AC Queue list correctly. */ |
| 584 | ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) & |
| 585 | 0x0fff0000); |
| 586 | /* offset 16 */ |
| 587 | ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/ |
| 588 | /* offset 20 */ |
| 589 | ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/* gtest 1M */ |
| 590 | } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) { |
| 591 | /* offset 4 */ |
| 592 | qsel = 0x13; |
| 593 | ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); |
| 594 | } else { |
| 595 | /* offset 4 */ |
| 596 | qsel = (uint)(pattrib->priority&0x0000001f); |
| 597 | ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); |
| 598 | /*offset 8*/ |
| 599 | /*offset 12*/ |
| 600 | ptxdesc->txdw3 = cpu_to_le32((pattrib->seqnum << SEQ_SHT) & |
| 601 | 0x0fff0000); |
| 602 | /*offset 16*/ |
| 603 | ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/ |
| 604 | /*offset 20*/ |
| 605 | ptxdesc->txdw5 = cpu_to_le32(0x001f9600);/*gtest*/ |
| 606 | } |
| 607 | } |
| 608 | |
| 609 | int r8712_xmitframe_complete(struct _adapter *padapter, |
| 610 | struct xmit_priv *pxmitpriv, |
| 611 | struct xmit_buf *pxmitbuf) |
| 612 | { |
| 613 | struct hw_xmit *phwxmits; |
| 614 | sint hwentry; |
| 615 | struct xmit_frame *pxmitframe = NULL; |
| 616 | #ifdef CONFIG_R8712_TX_AGGR |
| 617 | struct xmit_frame *p2ndxmitframe = NULL; |
| 618 | #else |
| 619 | int res = _SUCCESS, xcnt = 0; |
| 620 | #endif |
| 621 | |
| 622 | phwxmits = pxmitpriv->hwxmits; |
| 623 | hwentry = pxmitpriv->hwxmit_entry; |
| 624 | if (pxmitbuf == NULL) { |
| 625 | pxmitbuf = r8712_alloc_xmitbuf(pxmitpriv); |
| 626 | if (!pxmitbuf) |
| 627 | return false; |
| 628 | #ifdef CONFIG_R8712_TX_AGGR |
| 629 | pxmitbuf->aggr_nr = 0; |
| 630 | #endif |
| 631 | } |
| 632 | /* 1st frame dequeued */ |
| 633 | pxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits, hwentry); |
| 634 | /* need to remember the 1st frame */ |
| 635 | if (pxmitframe != NULL) { |
| 636 | |
| 637 | #ifdef CONFIG_R8712_TX_AGGR |
| 638 | /* 1. dequeue 2nd frame |
| 639 | * 2. aggr if 2nd xframe is dequeued, else dump directly |
| 640 | */ |
| 641 | if (AGGR_NR_HIGH_BOUND > 1) |
| 642 | p2ndxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits, |
| 643 | hwentry); |
| 644 | if (pxmitframe->frame_tag != DATA_FRAMETAG) { |
| 645 | r8712_free_xmitbuf(pxmitpriv, pxmitbuf); |
| 646 | return false; |
| 647 | } |
| 648 | if (p2ndxmitframe != NULL) |
| 649 | if (p2ndxmitframe->frame_tag != DATA_FRAMETAG) { |
| 650 | r8712_free_xmitbuf(pxmitpriv, pxmitbuf); |
| 651 | return false; |
| 652 | } |
| 653 | r8712_xmitframe_aggr_1st(pxmitbuf, pxmitframe); |
| 654 | if (p2ndxmitframe != NULL) { |
| 655 | u16 total_length; |
| 656 | total_length = r8712_xmitframe_aggr_next( |
| 657 | pxmitbuf, p2ndxmitframe); |
| 658 | do { |
| 659 | p2ndxmitframe = dequeue_xframe_ex( |
| 660 | pxmitpriv, phwxmits, hwentry); |
| 661 | if (p2ndxmitframe != NULL) |
| 662 | total_length = |
| 663 | r8712_xmitframe_aggr_next( |
| 664 | pxmitbuf, |
| 665 | p2ndxmitframe); |
| 666 | else |
| 667 | break; |
| 668 | } while (total_length <= 0x1800 && |
| 669 | pxmitbuf->aggr_nr <= AGGR_NR_HIGH_BOUND); |
| 670 | } |
| 671 | if (pxmitbuf->aggr_nr > 0) |
| 672 | r8712_dump_aggr_xframe(pxmitbuf, pxmitframe); |
| 673 | |
| 674 | #else |
| 675 | |
| 676 | xmitframe_xmitbuf_attach(pxmitframe, pxmitbuf); |
| 677 | if (pxmitframe->frame_tag == DATA_FRAMETAG) { |
| 678 | if (pxmitframe->attrib.priority <= 15) |
| 679 | res = r8712_xmitframe_coalesce(padapter, |
| 680 | pxmitframe->pkt, pxmitframe); |
| 681 | /* always return ndis_packet after |
| 682 | * r8712_xmitframe_coalesce */ |
| 683 | r8712_xmit_complete(padapter, pxmitframe); |
| 684 | } |
| 685 | if (res == _SUCCESS) |
| 686 | dump_xframe(padapter, pxmitframe); |
| 687 | else |
| 688 | r8712_free_xmitframe_ex(pxmitpriv, pxmitframe); |
| 689 | xcnt++; |
| 690 | #endif |
| 691 | |
| 692 | } else { /* pxmitframe == NULL && p2ndxmitframe == NULL */ |
| 693 | r8712_free_xmitbuf(pxmitpriv, pxmitbuf); |
| 694 | return false; |
| 695 | } |
| 696 | return true; |
| 697 | } |
| 698 | |
| 699 | static void dump_xframe(struct _adapter *padapter, |
| 700 | struct xmit_frame *pxmitframe) |
| 701 | { |
| 702 | int t, sz, w_sz; |
| 703 | u8 *mem_addr; |
| 704 | u32 ff_hwaddr; |
| 705 | struct pkt_attrib *pattrib = &pxmitframe->attrib; |
| 706 | struct xmit_priv *pxmitpriv = &padapter->xmitpriv; |
| 707 | struct security_priv *psecuritypriv = &padapter->securitypriv; |
| 708 | |
| 709 | if (pxmitframe->attrib.ether_type != 0x0806) { |
| 710 | if (pxmitframe->attrib.ether_type != 0x888e) |
| 711 | r8712_issue_addbareq_cmd(padapter, pattrib->priority); |
| 712 | } |
| 713 | mem_addr = pxmitframe->buf_addr; |
| 714 | for (t = 0; t < pattrib->nr_frags; t++) { |
| 715 | if (t != (pattrib->nr_frags - 1)) { |
| 716 | sz = pxmitpriv->frag_len; |
| 717 | sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : |
| 718 | pattrib->icv_len); |
| 719 | pxmitframe->last[t] = 0; |
| 720 | } else { |
| 721 | sz = pattrib->last_txcmdsz; |
| 722 | pxmitframe->last[t] = 1; |
| 723 | } |
| 724 | update_txdesc(pxmitframe, (uint *)mem_addr, sz); |
| 725 | w_sz = sz + TXDESC_SIZE; |
| 726 | pxmitframe->mem_addr = mem_addr; |
| 727 | pxmitframe->bpending[t] = false; |
| 728 | ff_hwaddr = get_ff_hwaddr(pxmitframe); |
| 729 | #ifdef CONFIG_R8712_TX_AGGR |
| 730 | r8712_write_port(padapter, RTL8712_DMA_H2CCMD, w_sz, |
| 731 | (unsigned char *)pxmitframe); |
| 732 | #else |
| 733 | r8712_write_port(padapter, ff_hwaddr, w_sz, |
| 734 | (unsigned char *)pxmitframe); |
| 735 | #endif |
| 736 | mem_addr += w_sz; |
| 737 | mem_addr = (u8 *)RND4(((addr_t)(mem_addr))); |
| 738 | } |
| 739 | } |
| 740 | |
| 741 | int r8712_xmit_direct(struct _adapter *padapter, struct xmit_frame *pxmitframe) |
| 742 | { |
| 743 | int res = _SUCCESS; |
| 744 | |
| 745 | res = r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); |
| 746 | pxmitframe->pkt = NULL; |
| 747 | if (res == _SUCCESS) |
| 748 | dump_xframe(padapter, pxmitframe); |
| 749 | return res; |
| 750 | } |
| 751 | |
| 752 | int r8712_xmit_enqueue(struct _adapter *padapter, struct xmit_frame *pxmitframe) |
| 753 | { |
| 754 | if (r8712_xmit_classifier(padapter, pxmitframe) == _FAIL) { |
| 755 | pxmitframe->pkt = NULL; |
| 756 | return _FAIL; |
| 757 | } |
| 758 | return _SUCCESS; |
| 759 | } |