| 1 | /* |
| 2 | * exynos_tmu.h - Samsung EXYNOS TMU (Thermal Management Unit) |
| 3 | * |
| 4 | * Copyright (C) 2011 Samsung Electronics |
| 5 | * Donggeun Kim <dg77.kim@samsung.com> |
| 6 | * Amit Daniel Kachhap <amit.daniel@samsung.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #ifndef _EXYNOS_TMU_H |
| 24 | #define _EXYNOS_TMU_H |
| 25 | #include <linux/cpu_cooling.h> |
| 26 | |
| 27 | #include "exynos_thermal_common.h" |
| 28 | |
| 29 | enum calibration_type { |
| 30 | TYPE_ONE_POINT_TRIMMING, |
| 31 | TYPE_ONE_POINT_TRIMMING_25, |
| 32 | TYPE_ONE_POINT_TRIMMING_85, |
| 33 | TYPE_TWO_POINT_TRIMMING, |
| 34 | TYPE_NONE, |
| 35 | }; |
| 36 | |
| 37 | enum soc_type { |
| 38 | SOC_ARCH_EXYNOS3250 = 1, |
| 39 | SOC_ARCH_EXYNOS4210, |
| 40 | SOC_ARCH_EXYNOS4412, |
| 41 | SOC_ARCH_EXYNOS5250, |
| 42 | SOC_ARCH_EXYNOS5260, |
| 43 | SOC_ARCH_EXYNOS5420, |
| 44 | SOC_ARCH_EXYNOS5420_TRIMINFO, |
| 45 | SOC_ARCH_EXYNOS5440, |
| 46 | }; |
| 47 | |
| 48 | /** |
| 49 | * EXYNOS TMU supported features. |
| 50 | * TMU_SUPPORT_EMULATION - This features is used to set user defined |
| 51 | * temperature to the TMU controller. |
| 52 | * TMU_SUPPORT_MULTI_INST - This features denotes that the soc |
| 53 | * has many instances of TMU. |
| 54 | * TMU_SUPPORT_FALLING_TRIP - This features shows that interrupt can |
| 55 | * be registered for falling trips also. |
| 56 | * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation |
| 57 | * sample time. |
| 58 | * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU |
| 59 | * sensors shares some common registers. |
| 60 | * TMU_SUPPORT - macro to compare the above features with the supplied. |
| 61 | */ |
| 62 | #define TMU_SUPPORT_EMULATION BIT(0) |
| 63 | #define TMU_SUPPORT_MULTI_INST BIT(1) |
| 64 | #define TMU_SUPPORT_FALLING_TRIP BIT(2) |
| 65 | #define TMU_SUPPORT_EMUL_TIME BIT(3) |
| 66 | #define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(4) |
| 67 | |
| 68 | #define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b) |
| 69 | |
| 70 | /** |
| 71 | * struct exynos_tmu_register - register descriptors to access registers. |
| 72 | * The register validity may vary slightly across different exynos SOC's. |
| 73 | * @tmu_intstat: Register containing the interrupt status values. |
| 74 | * @tmu_intclear: Register for clearing the raised interrupt status. |
| 75 | */ |
| 76 | struct exynos_tmu_registers { |
| 77 | u32 tmu_intstat; |
| 78 | u32 tmu_intclear; |
| 79 | }; |
| 80 | |
| 81 | /** |
| 82 | * struct exynos_tmu_platform_data |
| 83 | * @threshold: basic temperature for generating interrupt |
| 84 | * 25 <= threshold <= 125 [unit: degree Celsius] |
| 85 | * @threshold_falling: differntial value for setting threshold |
| 86 | * of temperature falling interrupt. |
| 87 | * @trigger_levels: array for each interrupt levels |
| 88 | * [unit: degree Celsius] |
| 89 | * 0: temperature for trigger_level0 interrupt |
| 90 | * condition for trigger_level0 interrupt: |
| 91 | * current temperature > threshold + trigger_levels[0] |
| 92 | * 1: temperature for trigger_level1 interrupt |
| 93 | * condition for trigger_level1 interrupt: |
| 94 | * current temperature > threshold + trigger_levels[1] |
| 95 | * 2: temperature for trigger_level2 interrupt |
| 96 | * condition for trigger_level2 interrupt: |
| 97 | * current temperature > threshold + trigger_levels[2] |
| 98 | * 3: temperature for trigger_level3 interrupt |
| 99 | * condition for trigger_level3 interrupt: |
| 100 | * current temperature > threshold + trigger_levels[3] |
| 101 | * @trigger_type: defines the type of trigger. Possible values are, |
| 102 | * THROTTLE_ACTIVE trigger type |
| 103 | * THROTTLE_PASSIVE trigger type |
| 104 | * SW_TRIP trigger type |
| 105 | * HW_TRIP |
| 106 | * @trigger_enable[]: array to denote which trigger levels are enabled. |
| 107 | * 1 = enable trigger_level[] interrupt, |
| 108 | * 0 = disable trigger_level[] interrupt |
| 109 | * @max_trigger_level: max trigger level supported by the TMU |
| 110 | * @non_hw_trigger_levels: number of defined non-hardware trigger levels |
| 111 | * @gain: gain of amplifier in the positive-TC generator block |
| 112 | * 0 < gain <= 15 |
| 113 | * @reference_voltage: reference voltage of amplifier |
| 114 | * in the positive-TC generator block |
| 115 | * 0 < reference_voltage <= 31 |
| 116 | * @noise_cancel_mode: noise cancellation mode |
| 117 | * 000, 100, 101, 110 and 111 can be different modes |
| 118 | * @type: determines the type of SOC |
| 119 | * @efuse_value: platform defined fuse value |
| 120 | * @min_efuse_value: minimum valid trimming data |
| 121 | * @max_efuse_value: maximum valid trimming data |
| 122 | * @first_point_trim: temp value of the first point trimming |
| 123 | * @second_point_trim: temp value of the second point trimming |
| 124 | * @default_temp_offset: default temperature offset in case of no trimming |
| 125 | * @test_mux; information if SoC supports test MUX |
| 126 | * @cal_type: calibration type for temperature |
| 127 | * @freq_clip_table: Table representing frequency reduction percentage. |
| 128 | * @freq_tab_count: Count of the above table as frequency reduction may |
| 129 | * applicable to only some of the trigger levels. |
| 130 | * @registers: Pointer to structure containing all the TMU controller registers |
| 131 | * and bitfields shifts and masks. |
| 132 | * @features: a bitfield value indicating the features supported in SOC like |
| 133 | * emulation, multi instance etc |
| 134 | * |
| 135 | * This structure is required for configuration of exynos_tmu driver. |
| 136 | */ |
| 137 | struct exynos_tmu_platform_data { |
| 138 | u8 threshold; |
| 139 | u8 threshold_falling; |
| 140 | u8 trigger_levels[MAX_TRIP_COUNT]; |
| 141 | enum trigger_type trigger_type[MAX_TRIP_COUNT]; |
| 142 | bool trigger_enable[MAX_TRIP_COUNT]; |
| 143 | u8 max_trigger_level; |
| 144 | u8 non_hw_trigger_levels; |
| 145 | u8 gain; |
| 146 | u8 reference_voltage; |
| 147 | u8 noise_cancel_mode; |
| 148 | |
| 149 | u32 efuse_value; |
| 150 | u32 min_efuse_value; |
| 151 | u32 max_efuse_value; |
| 152 | u8 first_point_trim; |
| 153 | u8 second_point_trim; |
| 154 | u8 default_temp_offset; |
| 155 | u8 test_mux; |
| 156 | |
| 157 | enum calibration_type cal_type; |
| 158 | enum soc_type type; |
| 159 | struct freq_clip_table freq_tab[4]; |
| 160 | unsigned int freq_tab_count; |
| 161 | const struct exynos_tmu_registers *registers; |
| 162 | unsigned int features; |
| 163 | }; |
| 164 | |
| 165 | /** |
| 166 | * struct exynos_tmu_init_data |
| 167 | * @tmu_count: number of TMU instances. |
| 168 | * @tmu_data: platform data of all TMU instances. |
| 169 | * This structure is required to store data for multi-instance exynos tmu |
| 170 | * driver. |
| 171 | */ |
| 172 | struct exynos_tmu_init_data { |
| 173 | int tmu_count; |
| 174 | struct exynos_tmu_platform_data tmu_data[]; |
| 175 | }; |
| 176 | |
| 177 | #endif /* _EXYNOS_TMU_H */ |