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1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22#include "as.h"
23#include "safe-ctype.h"
24#include "subsegs.h"
25#include "dw2gencfi.h"
26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
30#include "elf/ppc64.h"
31#include "dwarf2dbg.h"
32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
54#define TARGET_REG_NAMES_P TRUE
55#else
56#define TARGET_REG_NAMES_P FALSE
57#endif
58#endif
59
60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
87
88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
93
94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
95
96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100static void ppc_tc (int);
101static void ppc_machine (int);
102#endif
103
104#ifdef OBJ_XCOFF
105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
116static void ppc_dwsect (int);
117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
121static void ppc_ref (int);
122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
129#endif
130
131#ifdef OBJ_ELF
132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
134static void ppc_elf_localentry (int);
135static void ppc_elf_abiversion (int);
136static void ppc_elf_gnu_attribute (int);
137#endif
138
139#ifdef TE_PE
140static void ppc_previous (int);
141static void ppc_pdata (int);
142static void ppc_ydata (int);
143static void ppc_reldata (int);
144static void ppc_rdata (int);
145static void ppc_ualong (int);
146static void ppc_znop (int);
147static void ppc_pe_comm (int);
148static void ppc_pe_section (int);
149static void ppc_pe_function (int);
150static void ppc_pe_tocd (int);
151#endif
152\f
153/* Generic assembler global variables which must be defined by all
154 targets. */
155
156#ifdef OBJ_ELF
157/* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161static const char ppc_solaris_comment_chars[] = "#!";
162static const char ppc_eabi_comment_chars[] = "#";
163
164#ifdef TARGET_SOLARIS_COMMENT
165const char *ppc_comment_chars = ppc_solaris_comment_chars;
166#else
167const char *ppc_comment_chars = ppc_eabi_comment_chars;
168#endif
169#else
170const char comment_chars[] = "#";
171#endif
172
173/* Characters which start a comment at the beginning of a line. */
174const char line_comment_chars[] = "#";
175
176/* Characters which may be used to separate multiple commands on a
177 single line. */
178const char line_separator_chars[] = ";";
179
180/* Characters which are used to indicate an exponent in a floating
181 point number. */
182const char EXP_CHARS[] = "eE";
183
184/* Characters which mean that a number is a floating point constant,
185 as in 0d1.0. */
186const char FLT_CHARS[] = "dD";
187
188/* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190const char ppc_symbol_chars[] = "%[";
191
192/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193int ppc_cie_data_alignment;
194
195/* The dwarf2 minimum instruction length. */
196int ppc_dwarf2_line_min_insn_length;
197
198/* More than this number of nops in an alignment op gets a branch
199 instead. */
200unsigned long nop_limit = 4;
201
202/* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204ppc_cpu_t ppc_cpu = 0;
205ppc_cpu_t sticky = 0;
206
207/* Value for ELF e_flags EF_PPC64_ABI. */
208unsigned int ppc_abiversion = 0;
209
210#ifdef OBJ_ELF
211/* Flags set on encountering toc relocs. */
212static enum {
213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
215} toc_reloc_types;
216#endif
217
218/* Warn on emitting data to code sections. */
219int warn_476;
220uint64_t last_insn;
221segT last_seg;
222subsegT last_subseg;
223\f
224/* The target specific pseudo-ops which we support. */
225
226const pseudo_typeS md_pseudo_table[] =
227{
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte, 0 },
230
231#ifdef OBJ_XCOFF
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm, 0 },
237 { "lcomm", ppc_comm, 1 },
238 { "bb", ppc_bb, 0 },
239 { "bc", ppc_bc, 0 },
240 { "bf", ppc_bf, 0 },
241 { "bi", ppc_biei, 0 },
242 { "bs", ppc_bs, 0 },
243 { "csect", ppc_csect, 0 },
244 { "dwsect", ppc_dwsect, 0 },
245 { "data", ppc_section, 'd' },
246 { "eb", ppc_eb, 0 },
247 { "ec", ppc_ec, 0 },
248 { "ef", ppc_ef, 0 },
249 { "ei", ppc_biei, 1 },
250 { "es", ppc_es, 0 },
251 { "extern", ppc_extern, 0 },
252 { "function", ppc_function, 0 },
253 { "lglobl", ppc_lglobl, 0 },
254 { "ref", ppc_ref, 0 },
255 { "rename", ppc_rename, 0 },
256 { "section", ppc_named_section, 0 },
257 { "stabx", ppc_stabx, 0 },
258 { "text", ppc_section, 't' },
259 { "toc", ppc_toc, 0 },
260 { "long", ppc_xcoff_cons, 2 },
261 { "llong", ppc_xcoff_cons, 3 },
262 { "word", ppc_xcoff_cons, 1 },
263 { "short", ppc_xcoff_cons, 1 },
264 { "vbyte", ppc_vbyte, 0 },
265#endif
266
267#ifdef OBJ_ELF
268 { "llong", cons, 8 },
269 { "rdata", ppc_elf_rdata, 0 },
270 { "rodata", ppc_elf_rdata, 0 },
271 { "lcomm", ppc_elf_lcomm, 0 },
272 { "localentry", ppc_elf_localentry, 0 },
273 { "abiversion", ppc_elf_abiversion, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute, 0},
275#endif
276
277#ifdef TE_PE
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous, 0 },
280 { "pdata", ppc_pdata, 0 },
281 { "ydata", ppc_ydata, 0 },
282 { "reldata", ppc_reldata, 0 },
283 { "rdata", ppc_rdata, 0 },
284 { "ualong", ppc_ualong, 0 },
285 { "znop", ppc_znop, 0 },
286 { "comm", ppc_pe_comm, 0 },
287 { "lcomm", ppc_pe_comm, 1 },
288 { "section", ppc_pe_section, 0 },
289 { "function", ppc_pe_function,0 },
290 { "tocd", ppc_pe_tocd, 0 },
291#endif
292
293#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
294 { "tc", ppc_tc, 0 },
295 { "machine", ppc_machine, 0 },
296#endif
297
298 { NULL, NULL, 0 }
299};
300
301\f
302/* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
305
306/* Structure to hold information about predefined registers. */
307struct pd_reg
308 {
309 const char *name;
310 unsigned short value;
311 unsigned short flags;
312 };
313
314/* List of registers that are pre-defined:
315
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
319
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
323
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
327
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
331
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
335 xer has the value 1
336 lr has the value 8
337 ctr has the value 9
338 dar has the value 19
339 dsisr has the value 18
340 dec has the value 22
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
344
345 The table is sorted. Suitable for searching by a binary search. */
346
347static const struct pd_reg pre_defined_registers[] =
348{
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG },
351 { "cr.1", 1, PPC_OPERAND_CR_REG },
352 { "cr.2", 2, PPC_OPERAND_CR_REG },
353 { "cr.3", 3, PPC_OPERAND_CR_REG },
354 { "cr.4", 4, PPC_OPERAND_CR_REG },
355 { "cr.5", 5, PPC_OPERAND_CR_REG },
356 { "cr.6", 6, PPC_OPERAND_CR_REG },
357 { "cr.7", 7, PPC_OPERAND_CR_REG },
358
359 { "cr0", 0, PPC_OPERAND_CR_REG },
360 { "cr1", 1, PPC_OPERAND_CR_REG },
361 { "cr2", 2, PPC_OPERAND_CR_REG },
362 { "cr3", 3, PPC_OPERAND_CR_REG },
363 { "cr4", 4, PPC_OPERAND_CR_REG },
364 { "cr5", 5, PPC_OPERAND_CR_REG },
365 { "cr6", 6, PPC_OPERAND_CR_REG },
366 { "cr7", 7, PPC_OPERAND_CR_REG },
367
368 { "ctr", 9, PPC_OPERAND_SPR },
369 { "dar", 19, PPC_OPERAND_SPR },
370 { "dec", 22, PPC_OPERAND_SPR },
371 { "dsisr", 18, PPC_OPERAND_SPR },
372
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR },
375 { "f.1", 1, PPC_OPERAND_FPR },
376 { "f.10", 10, PPC_OPERAND_FPR },
377 { "f.11", 11, PPC_OPERAND_FPR },
378 { "f.12", 12, PPC_OPERAND_FPR },
379 { "f.13", 13, PPC_OPERAND_FPR },
380 { "f.14", 14, PPC_OPERAND_FPR },
381 { "f.15", 15, PPC_OPERAND_FPR },
382 { "f.16", 16, PPC_OPERAND_FPR },
383 { "f.17", 17, PPC_OPERAND_FPR },
384 { "f.18", 18, PPC_OPERAND_FPR },
385 { "f.19", 19, PPC_OPERAND_FPR },
386 { "f.2", 2, PPC_OPERAND_FPR },
387 { "f.20", 20, PPC_OPERAND_FPR },
388 { "f.21", 21, PPC_OPERAND_FPR },
389 { "f.22", 22, PPC_OPERAND_FPR },
390 { "f.23", 23, PPC_OPERAND_FPR },
391 { "f.24", 24, PPC_OPERAND_FPR },
392 { "f.25", 25, PPC_OPERAND_FPR },
393 { "f.26", 26, PPC_OPERAND_FPR },
394 { "f.27", 27, PPC_OPERAND_FPR },
395 { "f.28", 28, PPC_OPERAND_FPR },
396 { "f.29", 29, PPC_OPERAND_FPR },
397 { "f.3", 3, PPC_OPERAND_FPR },
398 { "f.30", 30, PPC_OPERAND_FPR },
399 { "f.31", 31, PPC_OPERAND_FPR },
400 { "f.32", 32, PPC_OPERAND_VSR },
401 { "f.33", 33, PPC_OPERAND_VSR },
402 { "f.34", 34, PPC_OPERAND_VSR },
403 { "f.35", 35, PPC_OPERAND_VSR },
404 { "f.36", 36, PPC_OPERAND_VSR },
405 { "f.37", 37, PPC_OPERAND_VSR },
406 { "f.38", 38, PPC_OPERAND_VSR },
407 { "f.39", 39, PPC_OPERAND_VSR },
408 { "f.4", 4, PPC_OPERAND_FPR },
409 { "f.40", 40, PPC_OPERAND_VSR },
410 { "f.41", 41, PPC_OPERAND_VSR },
411 { "f.42", 42, PPC_OPERAND_VSR },
412 { "f.43", 43, PPC_OPERAND_VSR },
413 { "f.44", 44, PPC_OPERAND_VSR },
414 { "f.45", 45, PPC_OPERAND_VSR },
415 { "f.46", 46, PPC_OPERAND_VSR },
416 { "f.47", 47, PPC_OPERAND_VSR },
417 { "f.48", 48, PPC_OPERAND_VSR },
418 { "f.49", 49, PPC_OPERAND_VSR },
419 { "f.5", 5, PPC_OPERAND_FPR },
420 { "f.50", 50, PPC_OPERAND_VSR },
421 { "f.51", 51, PPC_OPERAND_VSR },
422 { "f.52", 52, PPC_OPERAND_VSR },
423 { "f.53", 53, PPC_OPERAND_VSR },
424 { "f.54", 54, PPC_OPERAND_VSR },
425 { "f.55", 55, PPC_OPERAND_VSR },
426 { "f.56", 56, PPC_OPERAND_VSR },
427 { "f.57", 57, PPC_OPERAND_VSR },
428 { "f.58", 58, PPC_OPERAND_VSR },
429 { "f.59", 59, PPC_OPERAND_VSR },
430 { "f.6", 6, PPC_OPERAND_FPR },
431 { "f.60", 60, PPC_OPERAND_VSR },
432 { "f.61", 61, PPC_OPERAND_VSR },
433 { "f.62", 62, PPC_OPERAND_VSR },
434 { "f.63", 63, PPC_OPERAND_VSR },
435 { "f.7", 7, PPC_OPERAND_FPR },
436 { "f.8", 8, PPC_OPERAND_FPR },
437 { "f.9", 9, PPC_OPERAND_FPR },
438
439 { "f0", 0, PPC_OPERAND_FPR },
440 { "f1", 1, PPC_OPERAND_FPR },
441 { "f10", 10, PPC_OPERAND_FPR },
442 { "f11", 11, PPC_OPERAND_FPR },
443 { "f12", 12, PPC_OPERAND_FPR },
444 { "f13", 13, PPC_OPERAND_FPR },
445 { "f14", 14, PPC_OPERAND_FPR },
446 { "f15", 15, PPC_OPERAND_FPR },
447 { "f16", 16, PPC_OPERAND_FPR },
448 { "f17", 17, PPC_OPERAND_FPR },
449 { "f18", 18, PPC_OPERAND_FPR },
450 { "f19", 19, PPC_OPERAND_FPR },
451 { "f2", 2, PPC_OPERAND_FPR },
452 { "f20", 20, PPC_OPERAND_FPR },
453 { "f21", 21, PPC_OPERAND_FPR },
454 { "f22", 22, PPC_OPERAND_FPR },
455 { "f23", 23, PPC_OPERAND_FPR },
456 { "f24", 24, PPC_OPERAND_FPR },
457 { "f25", 25, PPC_OPERAND_FPR },
458 { "f26", 26, PPC_OPERAND_FPR },
459 { "f27", 27, PPC_OPERAND_FPR },
460 { "f28", 28, PPC_OPERAND_FPR },
461 { "f29", 29, PPC_OPERAND_FPR },
462 { "f3", 3, PPC_OPERAND_FPR },
463 { "f30", 30, PPC_OPERAND_FPR },
464 { "f31", 31, PPC_OPERAND_FPR },
465 { "f32", 32, PPC_OPERAND_VSR },
466 { "f33", 33, PPC_OPERAND_VSR },
467 { "f34", 34, PPC_OPERAND_VSR },
468 { "f35", 35, PPC_OPERAND_VSR },
469 { "f36", 36, PPC_OPERAND_VSR },
470 { "f37", 37, PPC_OPERAND_VSR },
471 { "f38", 38, PPC_OPERAND_VSR },
472 { "f39", 39, PPC_OPERAND_VSR },
473 { "f4", 4, PPC_OPERAND_FPR },
474 { "f40", 40, PPC_OPERAND_VSR },
475 { "f41", 41, PPC_OPERAND_VSR },
476 { "f42", 42, PPC_OPERAND_VSR },
477 { "f43", 43, PPC_OPERAND_VSR },
478 { "f44", 44, PPC_OPERAND_VSR },
479 { "f45", 45, PPC_OPERAND_VSR },
480 { "f46", 46, PPC_OPERAND_VSR },
481 { "f47", 47, PPC_OPERAND_VSR },
482 { "f48", 48, PPC_OPERAND_VSR },
483 { "f49", 49, PPC_OPERAND_VSR },
484 { "f5", 5, PPC_OPERAND_FPR },
485 { "f50", 50, PPC_OPERAND_VSR },
486 { "f51", 51, PPC_OPERAND_VSR },
487 { "f52", 52, PPC_OPERAND_VSR },
488 { "f53", 53, PPC_OPERAND_VSR },
489 { "f54", 54, PPC_OPERAND_VSR },
490 { "f55", 55, PPC_OPERAND_VSR },
491 { "f56", 56, PPC_OPERAND_VSR },
492 { "f57", 57, PPC_OPERAND_VSR },
493 { "f58", 58, PPC_OPERAND_VSR },
494 { "f59", 59, PPC_OPERAND_VSR },
495 { "f6", 6, PPC_OPERAND_FPR },
496 { "f60", 60, PPC_OPERAND_VSR },
497 { "f61", 61, PPC_OPERAND_VSR },
498 { "f62", 62, PPC_OPERAND_VSR },
499 { "f63", 63, PPC_OPERAND_VSR },
500 { "f7", 7, PPC_OPERAND_FPR },
501 { "f8", 8, PPC_OPERAND_FPR },
502 { "f9", 9, PPC_OPERAND_FPR },
503
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR },
506 { "gqr.1", 1, PPC_OPERAND_GQR },
507 { "gqr.2", 2, PPC_OPERAND_GQR },
508 { "gqr.3", 3, PPC_OPERAND_GQR },
509 { "gqr.4", 4, PPC_OPERAND_GQR },
510 { "gqr.5", 5, PPC_OPERAND_GQR },
511 { "gqr.6", 6, PPC_OPERAND_GQR },
512 { "gqr.7", 7, PPC_OPERAND_GQR },
513 { "gqr0", 0, PPC_OPERAND_GQR },
514 { "gqr1", 1, PPC_OPERAND_GQR },
515 { "gqr2", 2, PPC_OPERAND_GQR },
516 { "gqr3", 3, PPC_OPERAND_GQR },
517 { "gqr4", 4, PPC_OPERAND_GQR },
518 { "gqr5", 5, PPC_OPERAND_GQR },
519 { "gqr6", 6, PPC_OPERAND_GQR },
520 { "gqr7", 7, PPC_OPERAND_GQR },
521
522 { "lr", 8, PPC_OPERAND_SPR },
523
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR },
526 { "r.1", 1, PPC_OPERAND_GPR },
527 { "r.10", 10, PPC_OPERAND_GPR },
528 { "r.11", 11, PPC_OPERAND_GPR },
529 { "r.12", 12, PPC_OPERAND_GPR },
530 { "r.13", 13, PPC_OPERAND_GPR },
531 { "r.14", 14, PPC_OPERAND_GPR },
532 { "r.15", 15, PPC_OPERAND_GPR },
533 { "r.16", 16, PPC_OPERAND_GPR },
534 { "r.17", 17, PPC_OPERAND_GPR },
535 { "r.18", 18, PPC_OPERAND_GPR },
536 { "r.19", 19, PPC_OPERAND_GPR },
537 { "r.2", 2, PPC_OPERAND_GPR },
538 { "r.20", 20, PPC_OPERAND_GPR },
539 { "r.21", 21, PPC_OPERAND_GPR },
540 { "r.22", 22, PPC_OPERAND_GPR },
541 { "r.23", 23, PPC_OPERAND_GPR },
542 { "r.24", 24, PPC_OPERAND_GPR },
543 { "r.25", 25, PPC_OPERAND_GPR },
544 { "r.26", 26, PPC_OPERAND_GPR },
545 { "r.27", 27, PPC_OPERAND_GPR },
546 { "r.28", 28, PPC_OPERAND_GPR },
547 { "r.29", 29, PPC_OPERAND_GPR },
548 { "r.3", 3, PPC_OPERAND_GPR },
549 { "r.30", 30, PPC_OPERAND_GPR },
550 { "r.31", 31, PPC_OPERAND_GPR },
551 { "r.4", 4, PPC_OPERAND_GPR },
552 { "r.5", 5, PPC_OPERAND_GPR },
553 { "r.6", 6, PPC_OPERAND_GPR },
554 { "r.7", 7, PPC_OPERAND_GPR },
555 { "r.8", 8, PPC_OPERAND_GPR },
556 { "r.9", 9, PPC_OPERAND_GPR },
557
558 { "r.sp", 1, PPC_OPERAND_GPR },
559
560 { "r.toc", 2, PPC_OPERAND_GPR },
561
562 { "r0", 0, PPC_OPERAND_GPR },
563 { "r1", 1, PPC_OPERAND_GPR },
564 { "r10", 10, PPC_OPERAND_GPR },
565 { "r11", 11, PPC_OPERAND_GPR },
566 { "r12", 12, PPC_OPERAND_GPR },
567 { "r13", 13, PPC_OPERAND_GPR },
568 { "r14", 14, PPC_OPERAND_GPR },
569 { "r15", 15, PPC_OPERAND_GPR },
570 { "r16", 16, PPC_OPERAND_GPR },
571 { "r17", 17, PPC_OPERAND_GPR },
572 { "r18", 18, PPC_OPERAND_GPR },
573 { "r19", 19, PPC_OPERAND_GPR },
574 { "r2", 2, PPC_OPERAND_GPR },
575 { "r20", 20, PPC_OPERAND_GPR },
576 { "r21", 21, PPC_OPERAND_GPR },
577 { "r22", 22, PPC_OPERAND_GPR },
578 { "r23", 23, PPC_OPERAND_GPR },
579 { "r24", 24, PPC_OPERAND_GPR },
580 { "r25", 25, PPC_OPERAND_GPR },
581 { "r26", 26, PPC_OPERAND_GPR },
582 { "r27", 27, PPC_OPERAND_GPR },
583 { "r28", 28, PPC_OPERAND_GPR },
584 { "r29", 29, PPC_OPERAND_GPR },
585 { "r3", 3, PPC_OPERAND_GPR },
586 { "r30", 30, PPC_OPERAND_GPR },
587 { "r31", 31, PPC_OPERAND_GPR },
588 { "r4", 4, PPC_OPERAND_GPR },
589 { "r5", 5, PPC_OPERAND_GPR },
590 { "r6", 6, PPC_OPERAND_GPR },
591 { "r7", 7, PPC_OPERAND_GPR },
592 { "r8", 8, PPC_OPERAND_GPR },
593 { "r9", 9, PPC_OPERAND_GPR },
594
595 { "rtoc", 2, PPC_OPERAND_GPR },
596
597 { "sdr1", 25, PPC_OPERAND_SPR },
598
599 { "sp", 1, PPC_OPERAND_GPR },
600
601 { "srr0", 26, PPC_OPERAND_SPR },
602 { "srr1", 27, PPC_OPERAND_SPR },
603
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR },
606 { "v.1", 1, PPC_OPERAND_VR },
607 { "v.10", 10, PPC_OPERAND_VR },
608 { "v.11", 11, PPC_OPERAND_VR },
609 { "v.12", 12, PPC_OPERAND_VR },
610 { "v.13", 13, PPC_OPERAND_VR },
611 { "v.14", 14, PPC_OPERAND_VR },
612 { "v.15", 15, PPC_OPERAND_VR },
613 { "v.16", 16, PPC_OPERAND_VR },
614 { "v.17", 17, PPC_OPERAND_VR },
615 { "v.18", 18, PPC_OPERAND_VR },
616 { "v.19", 19, PPC_OPERAND_VR },
617 { "v.2", 2, PPC_OPERAND_VR },
618 { "v.20", 20, PPC_OPERAND_VR },
619 { "v.21", 21, PPC_OPERAND_VR },
620 { "v.22", 22, PPC_OPERAND_VR },
621 { "v.23", 23, PPC_OPERAND_VR },
622 { "v.24", 24, PPC_OPERAND_VR },
623 { "v.25", 25, PPC_OPERAND_VR },
624 { "v.26", 26, PPC_OPERAND_VR },
625 { "v.27", 27, PPC_OPERAND_VR },
626 { "v.28", 28, PPC_OPERAND_VR },
627 { "v.29", 29, PPC_OPERAND_VR },
628 { "v.3", 3, PPC_OPERAND_VR },
629 { "v.30", 30, PPC_OPERAND_VR },
630 { "v.31", 31, PPC_OPERAND_VR },
631 { "v.4", 4, PPC_OPERAND_VR },
632 { "v.5", 5, PPC_OPERAND_VR },
633 { "v.6", 6, PPC_OPERAND_VR },
634 { "v.7", 7, PPC_OPERAND_VR },
635 { "v.8", 8, PPC_OPERAND_VR },
636 { "v.9", 9, PPC_OPERAND_VR },
637
638 { "v0", 0, PPC_OPERAND_VR },
639 { "v1", 1, PPC_OPERAND_VR },
640 { "v10", 10, PPC_OPERAND_VR },
641 { "v11", 11, PPC_OPERAND_VR },
642 { "v12", 12, PPC_OPERAND_VR },
643 { "v13", 13, PPC_OPERAND_VR },
644 { "v14", 14, PPC_OPERAND_VR },
645 { "v15", 15, PPC_OPERAND_VR },
646 { "v16", 16, PPC_OPERAND_VR },
647 { "v17", 17, PPC_OPERAND_VR },
648 { "v18", 18, PPC_OPERAND_VR },
649 { "v19", 19, PPC_OPERAND_VR },
650 { "v2", 2, PPC_OPERAND_VR },
651 { "v20", 20, PPC_OPERAND_VR },
652 { "v21", 21, PPC_OPERAND_VR },
653 { "v22", 22, PPC_OPERAND_VR },
654 { "v23", 23, PPC_OPERAND_VR },
655 { "v24", 24, PPC_OPERAND_VR },
656 { "v25", 25, PPC_OPERAND_VR },
657 { "v26", 26, PPC_OPERAND_VR },
658 { "v27", 27, PPC_OPERAND_VR },
659 { "v28", 28, PPC_OPERAND_VR },
660 { "v29", 29, PPC_OPERAND_VR },
661 { "v3", 3, PPC_OPERAND_VR },
662 { "v30", 30, PPC_OPERAND_VR },
663 { "v31", 31, PPC_OPERAND_VR },
664 { "v4", 4, PPC_OPERAND_VR },
665 { "v5", 5, PPC_OPERAND_VR },
666 { "v6", 6, PPC_OPERAND_VR },
667 { "v7", 7, PPC_OPERAND_VR },
668 { "v8", 8, PPC_OPERAND_VR },
669 { "v9", 9, PPC_OPERAND_VR },
670
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR },
673 { "vs.1", 1, PPC_OPERAND_VSR },
674 { "vs.10", 10, PPC_OPERAND_VSR },
675 { "vs.11", 11, PPC_OPERAND_VSR },
676 { "vs.12", 12, PPC_OPERAND_VSR },
677 { "vs.13", 13, PPC_OPERAND_VSR },
678 { "vs.14", 14, PPC_OPERAND_VSR },
679 { "vs.15", 15, PPC_OPERAND_VSR },
680 { "vs.16", 16, PPC_OPERAND_VSR },
681 { "vs.17", 17, PPC_OPERAND_VSR },
682 { "vs.18", 18, PPC_OPERAND_VSR },
683 { "vs.19", 19, PPC_OPERAND_VSR },
684 { "vs.2", 2, PPC_OPERAND_VSR },
685 { "vs.20", 20, PPC_OPERAND_VSR },
686 { "vs.21", 21, PPC_OPERAND_VSR },
687 { "vs.22", 22, PPC_OPERAND_VSR },
688 { "vs.23", 23, PPC_OPERAND_VSR },
689 { "vs.24", 24, PPC_OPERAND_VSR },
690 { "vs.25", 25, PPC_OPERAND_VSR },
691 { "vs.26", 26, PPC_OPERAND_VSR },
692 { "vs.27", 27, PPC_OPERAND_VSR },
693 { "vs.28", 28, PPC_OPERAND_VSR },
694 { "vs.29", 29, PPC_OPERAND_VSR },
695 { "vs.3", 3, PPC_OPERAND_VSR },
696 { "vs.30", 30, PPC_OPERAND_VSR },
697 { "vs.31", 31, PPC_OPERAND_VSR },
698 { "vs.32", 32, PPC_OPERAND_VSR },
699 { "vs.33", 33, PPC_OPERAND_VSR },
700 { "vs.34", 34, PPC_OPERAND_VSR },
701 { "vs.35", 35, PPC_OPERAND_VSR },
702 { "vs.36", 36, PPC_OPERAND_VSR },
703 { "vs.37", 37, PPC_OPERAND_VSR },
704 { "vs.38", 38, PPC_OPERAND_VSR },
705 { "vs.39", 39, PPC_OPERAND_VSR },
706 { "vs.4", 4, PPC_OPERAND_VSR },
707 { "vs.40", 40, PPC_OPERAND_VSR },
708 { "vs.41", 41, PPC_OPERAND_VSR },
709 { "vs.42", 42, PPC_OPERAND_VSR },
710 { "vs.43", 43, PPC_OPERAND_VSR },
711 { "vs.44", 44, PPC_OPERAND_VSR },
712 { "vs.45", 45, PPC_OPERAND_VSR },
713 { "vs.46", 46, PPC_OPERAND_VSR },
714 { "vs.47", 47, PPC_OPERAND_VSR },
715 { "vs.48", 48, PPC_OPERAND_VSR },
716 { "vs.49", 49, PPC_OPERAND_VSR },
717 { "vs.5", 5, PPC_OPERAND_VSR },
718 { "vs.50", 50, PPC_OPERAND_VSR },
719 { "vs.51", 51, PPC_OPERAND_VSR },
720 { "vs.52", 52, PPC_OPERAND_VSR },
721 { "vs.53", 53, PPC_OPERAND_VSR },
722 { "vs.54", 54, PPC_OPERAND_VSR },
723 { "vs.55", 55, PPC_OPERAND_VSR },
724 { "vs.56", 56, PPC_OPERAND_VSR },
725 { "vs.57", 57, PPC_OPERAND_VSR },
726 { "vs.58", 58, PPC_OPERAND_VSR },
727 { "vs.59", 59, PPC_OPERAND_VSR },
728 { "vs.6", 6, PPC_OPERAND_VSR },
729 { "vs.60", 60, PPC_OPERAND_VSR },
730 { "vs.61", 61, PPC_OPERAND_VSR },
731 { "vs.62", 62, PPC_OPERAND_VSR },
732 { "vs.63", 63, PPC_OPERAND_VSR },
733 { "vs.7", 7, PPC_OPERAND_VSR },
734 { "vs.8", 8, PPC_OPERAND_VSR },
735 { "vs.9", 9, PPC_OPERAND_VSR },
736
737 { "vs0", 0, PPC_OPERAND_VSR },
738 { "vs1", 1, PPC_OPERAND_VSR },
739 { "vs10", 10, PPC_OPERAND_VSR },
740 { "vs11", 11, PPC_OPERAND_VSR },
741 { "vs12", 12, PPC_OPERAND_VSR },
742 { "vs13", 13, PPC_OPERAND_VSR },
743 { "vs14", 14, PPC_OPERAND_VSR },
744 { "vs15", 15, PPC_OPERAND_VSR },
745 { "vs16", 16, PPC_OPERAND_VSR },
746 { "vs17", 17, PPC_OPERAND_VSR },
747 { "vs18", 18, PPC_OPERAND_VSR },
748 { "vs19", 19, PPC_OPERAND_VSR },
749 { "vs2", 2, PPC_OPERAND_VSR },
750 { "vs20", 20, PPC_OPERAND_VSR },
751 { "vs21", 21, PPC_OPERAND_VSR },
752 { "vs22", 22, PPC_OPERAND_VSR },
753 { "vs23", 23, PPC_OPERAND_VSR },
754 { "vs24", 24, PPC_OPERAND_VSR },
755 { "vs25", 25, PPC_OPERAND_VSR },
756 { "vs26", 26, PPC_OPERAND_VSR },
757 { "vs27", 27, PPC_OPERAND_VSR },
758 { "vs28", 28, PPC_OPERAND_VSR },
759 { "vs29", 29, PPC_OPERAND_VSR },
760 { "vs3", 3, PPC_OPERAND_VSR },
761 { "vs30", 30, PPC_OPERAND_VSR },
762 { "vs31", 31, PPC_OPERAND_VSR },
763 { "vs32", 32, PPC_OPERAND_VSR },
764 { "vs33", 33, PPC_OPERAND_VSR },
765 { "vs34", 34, PPC_OPERAND_VSR },
766 { "vs35", 35, PPC_OPERAND_VSR },
767 { "vs36", 36, PPC_OPERAND_VSR },
768 { "vs37", 37, PPC_OPERAND_VSR },
769 { "vs38", 38, PPC_OPERAND_VSR },
770 { "vs39", 39, PPC_OPERAND_VSR },
771 { "vs4", 4, PPC_OPERAND_VSR },
772 { "vs40", 40, PPC_OPERAND_VSR },
773 { "vs41", 41, PPC_OPERAND_VSR },
774 { "vs42", 42, PPC_OPERAND_VSR },
775 { "vs43", 43, PPC_OPERAND_VSR },
776 { "vs44", 44, PPC_OPERAND_VSR },
777 { "vs45", 45, PPC_OPERAND_VSR },
778 { "vs46", 46, PPC_OPERAND_VSR },
779 { "vs47", 47, PPC_OPERAND_VSR },
780 { "vs48", 48, PPC_OPERAND_VSR },
781 { "vs49", 49, PPC_OPERAND_VSR },
782 { "vs5", 5, PPC_OPERAND_VSR },
783 { "vs50", 50, PPC_OPERAND_VSR },
784 { "vs51", 51, PPC_OPERAND_VSR },
785 { "vs52", 52, PPC_OPERAND_VSR },
786 { "vs53", 53, PPC_OPERAND_VSR },
787 { "vs54", 54, PPC_OPERAND_VSR },
788 { "vs55", 55, PPC_OPERAND_VSR },
789 { "vs56", 56, PPC_OPERAND_VSR },
790 { "vs57", 57, PPC_OPERAND_VSR },
791 { "vs58", 58, PPC_OPERAND_VSR },
792 { "vs59", 59, PPC_OPERAND_VSR },
793 { "vs6", 6, PPC_OPERAND_VSR },
794 { "vs60", 60, PPC_OPERAND_VSR },
795 { "vs61", 61, PPC_OPERAND_VSR },
796 { "vs62", 62, PPC_OPERAND_VSR },
797 { "vs63", 63, PPC_OPERAND_VSR },
798 { "vs7", 7, PPC_OPERAND_VSR },
799 { "vs8", 8, PPC_OPERAND_VSR },
800 { "vs9", 9, PPC_OPERAND_VSR },
801
802 { "xer", 1, PPC_OPERAND_SPR }
803};
804
805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
810static const struct pd_reg *
811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return &regs[middle];
829 }
830 while (low <= high);
831
832 return NULL;
833}
834
835/*
836 * Summary of register_name.
837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
847static bfd_boolean
848register_name (expressionS *expressionP)
849{
850 const struct pd_reg *reg;
851 char *name;
852 char *start;
853 char c;
854
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
859
860 else if (!reg_names_p || !ISALPHA (name[0]))
861 return FALSE;
862
863 c = get_symbol_name (&name);
864 reg = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
869 /* Look to see if it's in the register table. */
870 if (reg != NULL)
871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg->value;
874 expressionP->X_md = reg->flags;
875
876 /* Make the rest nice. */
877 expressionP->X_add_symbol = NULL;
878 expressionP->X_op_symbol = NULL;
879 return TRUE;
880 }
881
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer = start;
884 return FALSE;
885}
886\f
887/* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
890
891/* Whether to do the special parsing. */
892static bfd_boolean cr_operand;
893
894/* Names to recognize in a condition code. This table is sorted. */
895static const struct pd_reg cr_names[] =
896{
897 { "cr0", 0, PPC_OPERAND_CR_REG },
898 { "cr1", 1, PPC_OPERAND_CR_REG },
899 { "cr2", 2, PPC_OPERAND_CR_REG },
900 { "cr3", 3, PPC_OPERAND_CR_REG },
901 { "cr4", 4, PPC_OPERAND_CR_REG },
902 { "cr5", 5, PPC_OPERAND_CR_REG },
903 { "cr6", 6, PPC_OPERAND_CR_REG },
904 { "cr7", 7, PPC_OPERAND_CR_REG },
905 { "eq", 2, PPC_OPERAND_CR_BIT },
906 { "gt", 1, PPC_OPERAND_CR_BIT },
907 { "lt", 0, PPC_OPERAND_CR_BIT },
908 { "so", 3, PPC_OPERAND_CR_BIT },
909 { "un", 3, PPC_OPERAND_CR_BIT }
910};
911
912/* Parsing function. This returns non-zero if it recognized an
913 expression. */
914
915int
916ppc_parse_name (const char *name, expressionS *exp)
917{
918 const struct pd_reg *reg;
919
920 if (! cr_operand)
921 return 0;
922
923 if (*name == '%')
924 ++name;
925 reg = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
926 name);
927 if (reg == NULL)
928 return 0;
929
930 exp->X_op = O_register;
931 exp->X_add_number = reg->value;
932 exp->X_md = reg->flags;
933
934 return 1;
935}
936
937/* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
939
940int
941ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right)
942{
943 /* Accept 4*cr<n> and cr<n>*4. */
944 if (op == O_multiply
945 && ((right->X_op == O_register
946 && right->X_md == PPC_OPERAND_CR_REG
947 && left->X_op == O_constant
948 && left->X_add_number == 4)
949 || (left->X_op == O_register
950 && left->X_md == PPC_OPERAND_CR_REG
951 && right->X_op == O_constant
952 && right->X_add_number == 4)))
953 {
954 left->X_op = O_register;
955 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT;
956 left->X_add_number *= right->X_add_number;
957 return 1;
958 }
959
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right->X_op == O_register
962 && left->X_op == O_register
963 && op == O_add
964 && ((right->X_md == PPC_OPERAND_CR_BIT
965 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT))
966 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)
967 && left->X_md == PPC_OPERAND_CR_BIT)))
968 {
969 left->X_md = PPC_OPERAND_CR_BIT;
970 right->X_op = O_constant;
971 return 0;
972 }
973
974 /* Accept reg +/- constant. */
975 if (left->X_op == O_register
976 && !((op == O_add || op == O_subtract) && right->X_op == O_constant))
977 as_warn (_("invalid register expression"));
978
979 /* Accept constant + reg. */
980 if (right->X_op == O_register)
981 {
982 if (op == O_add && left->X_op == O_constant)
983 left->X_md = right->X_md;
984 else
985 as_warn (_("invalid register expression"));
986 }
987
988 return 0;
989}
990\f
991/* Local variables. */
992
993/* Whether to target xcoff64/elf64. */
994static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
995
996/* Opcode hash table. */
997static struct hash_control *ppc_hash;
998
999/* Macro hash table. */
1000static struct hash_control *ppc_macro_hash;
1001
1002#ifdef OBJ_ELF
1003/* What type of shared library support to use. */
1004static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
1005
1006/* Flags to set in the elf header. */
1007static flagword ppc_flags = 0;
1008
1009/* Whether this is Solaris or not. */
1010#ifdef TARGET_SOLARIS_COMMENT
1011#define SOLARIS_P TRUE
1012#else
1013#define SOLARIS_P FALSE
1014#endif
1015
1016static bfd_boolean msolaris = SOLARIS_P;
1017#endif
1018
1019#ifdef OBJ_XCOFF
1020
1021/* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1026
1027/* Next subsegment to allocate within the .text segment. */
1028static subsegT ppc_text_subsegment = 2;
1029
1030/* Linked list of csects in the text section. */
1031static symbolS *ppc_text_csects;
1032
1033/* Next subsegment to allocate within the .data segment. */
1034static subsegT ppc_data_subsegment = 2;
1035
1036/* Linked list of csects in the data section. */
1037static symbolS *ppc_data_csects;
1038
1039/* The current csect. */
1040static symbolS *ppc_current_csect;
1041
1042/* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047static symbolS *ppc_toc_csect;
1048
1049/* The first frag in the TOC subsegment. */
1050static fragS *ppc_toc_frag;
1051
1052/* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054static fragS *ppc_after_toc_frag;
1055
1056/* The current static block. */
1057static symbolS *ppc_current_block;
1058
1059/* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062static asection *ppc_coff_debug_section;
1063
1064/* Structure to set the length field of the dwarf sections. */
1065struct dw_subsection {
1066 /* Subsections are simply linked. */
1067 struct dw_subsection *link;
1068
1069 /* The subsection number. */
1070 subsegT subseg;
1071
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp;
1074};
1075
1076static struct dw_section {
1077 /* Corresponding section. */
1078 segT sect;
1079
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection *list_subseg;
1082
1083 /* The anonymous subsection. */
1084 struct dw_subsection *anon_subseg;
1085} dw_sections[XCOFF_DWSECT_NBR_NAMES];
1086#endif /* OBJ_XCOFF */
1087
1088#ifdef TE_PE
1089
1090/* Various sections that we need for PE coff support. */
1091static segT ydata_section;
1092static segT pdata_section;
1093static segT reldata_section;
1094static segT rdata_section;
1095static segT tocdata_section;
1096
1097/* The current section and the previous section. See ppc_previous. */
1098static segT ppc_previous_section;
1099static segT ppc_current_section;
1100
1101#endif /* TE_PE */
1102
1103#ifdef OBJ_ELF
1104symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105unsigned long *ppc_apuinfo_list;
1106unsigned int ppc_apuinfo_num;
1107unsigned int ppc_apuinfo_num_alloc;
1108#endif /* OBJ_ELF */
1109\f
1110#ifdef OBJ_ELF
1111const char *const md_shortopts = "b:l:usm:K:VQ:";
1112#else
1113const char *const md_shortopts = "um:";
1114#endif
1115#define OPTION_NOPS (OPTION_MD_BASE + 0)
1116const struct option md_longopts[] = {
1117 {"nops", required_argument, NULL, OPTION_NOPS},
1118 {"ppc476-workaround", no_argument, &warn_476, 1},
1119 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1120 {NULL, no_argument, NULL, 0}
1121};
1122const size_t md_longopts_size = sizeof (md_longopts);
1123
1124int
1125md_parse_option (int c, const char *arg)
1126{
1127 ppc_cpu_t new_cpu;
1128
1129 switch (c)
1130 {
1131 case 'u':
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1134 break;
1135
1136#ifdef OBJ_ELF
1137 case 'l':
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg, "e") == 0)
1141 {
1142 target_big_endian = 0;
1143 set_target_endian = 1;
1144 if (ppc_cpu & PPC_OPCODE_VLE)
1145 as_bad (_("the use of -mvle requires big endian."));
1146 }
1147 else
1148 return 0;
1149
1150 break;
1151
1152 case 'b':
1153 if (strcmp (arg, "e") == 0)
1154 {
1155 target_big_endian = 1;
1156 set_target_endian = 1;
1157 }
1158 else
1159 return 0;
1160
1161 break;
1162
1163 case 'K':
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1166 {
1167 shlib = SHLIB_PIC;
1168 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1169 }
1170 else
1171 return 0;
1172
1173 break;
1174#endif
1175
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1177 case 'a':
1178 if (strcmp (arg, "64") == 0)
1179 {
1180#ifdef BFD64
1181 ppc_obj64 = 1;
1182 if (ppc_cpu & PPC_OPCODE_VLE)
1183 as_bad (_("the use of -mvle requires -a32."));
1184#else
1185 as_fatal (_("%s unsupported"), "-a64");
1186#endif
1187 }
1188 else if (strcmp (arg, "32") == 0)
1189 ppc_obj64 = 0;
1190 else
1191 return 0;
1192 break;
1193
1194 case 'm':
1195 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0)
1198 {
1199 ppc_cpu = new_cpu;
1200 if (strcmp (arg, "vle") == 0)
1201 {
1202 if (set_target_endian && target_big_endian == 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1204 if (ppc_obj64)
1205 as_bad (_("the use of -mvle requires -a32."));
1206 }
1207 }
1208
1209 else if (strcmp (arg, "no-vle") == 0)
1210 {
1211 sticky &= ~PPC_OPCODE_VLE;
1212
1213 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke");
1214 new_cpu &= ~PPC_OPCODE_VLE;
1215
1216 ppc_cpu = new_cpu;
1217 }
1218
1219 else if (strcmp (arg, "regnames") == 0)
1220 reg_names_p = TRUE;
1221
1222 else if (strcmp (arg, "no-regnames") == 0)
1223 reg_names_p = FALSE;
1224
1225#ifdef OBJ_ELF
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg, "relocatable") == 0)
1229 {
1230 shlib = SHLIB_MRELOCATABLE;
1231 ppc_flags |= EF_PPC_RELOCATABLE;
1232 }
1233
1234 else if (strcmp (arg, "relocatable-lib") == 0)
1235 {
1236 shlib = SHLIB_MRELOCATABLE;
1237 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1238 }
1239
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg, "emb") == 0)
1242 ppc_flags |= EF_PPC_EMB;
1243
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg, "little") == 0
1246 || strcmp (arg, "little-endian") == 0)
1247 {
1248 target_big_endian = 0;
1249 set_target_endian = 1;
1250 if (ppc_cpu & PPC_OPCODE_VLE)
1251 as_bad (_("the use of -mvle requires big endian."));
1252 }
1253
1254 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1255 {
1256 target_big_endian = 1;
1257 set_target_endian = 1;
1258 }
1259
1260 else if (strcmp (arg, "solaris") == 0)
1261 {
1262 msolaris = TRUE;
1263 ppc_comment_chars = ppc_solaris_comment_chars;
1264 }
1265
1266 else if (strcmp (arg, "no-solaris") == 0)
1267 {
1268 msolaris = FALSE;
1269 ppc_comment_chars = ppc_eabi_comment_chars;
1270 }
1271 else if (strcmp (arg, "spe2") == 0)
1272 {
1273 ppc_cpu |= PPC_OPCODE_SPE2;
1274 }
1275#endif
1276 else
1277 {
1278 as_bad (_("invalid switch -m%s"), arg);
1279 return 0;
1280 }
1281 break;
1282
1283#ifdef OBJ_ELF
1284 /* -V: SVR4 argument to print version ID. */
1285 case 'V':
1286 print_version_id ();
1287 break;
1288
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1291 case 'Q':
1292 break;
1293
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1297 case 's':
1298 if (arg)
1299 return 0;
1300
1301 break;
1302#endif
1303
1304 case OPTION_NOPS:
1305 {
1306 char *end;
1307 nop_limit = strtoul (optarg, &end, 0);
1308 if (*end)
1309 as_bad (_("--nops needs a numeric argument"));
1310 }
1311 break;
1312
1313 case 0:
1314 break;
1315
1316 default:
1317 return 0;
1318 }
1319
1320 return 1;
1321}
1322
1323void
1324md_show_usage (FILE *stream)
1325{
1326 fprintf (stream, _("\
1327PowerPC options:\n\
1328-a32 generate ELF32/XCOFF32\n\
1329-a64 generate ELF64/XCOFF64\n\
1330-u ignored\n\
1331-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332-mpwr generate code for POWER (RIOS1)\n\
1333-m601 generate code for PowerPC 601\n\
1334-mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336-m403 generate code for PowerPC 403\n\
1337-m405 generate code for PowerPC 405\n\
1338-m440 generate code for PowerPC 440\n\
1339-m464 generate code for PowerPC 464\n\
1340-m476 generate code for PowerPC 476\n\
1341-m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343-m750cl generate code for PowerPC 750cl\n\
1344-m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1345 fprintf (stream, _("\
1346-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1347-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1348-mbooke generate code for 32-bit PowerPC BookE\n\
1349-ma2 generate code for A2 architecture\n\
1350-mpower4, -mpwr4 generate code for Power4 architecture\n\
1351-mpower5, -mpwr5, -mpwr5x\n\
1352 generate code for Power5 architecture\n\
1353-mpower6, -mpwr6 generate code for Power6 architecture\n\
1354-mpower7, -mpwr7 generate code for Power7 architecture\n\
1355-mpower8, -mpwr8 generate code for Power8 architecture\n\
1356-mpower9, -mpwr9 generate code for Power9 architecture\n\
1357-mcell generate code for Cell Broadband Engine architecture\n\
1358-mcom generate code for Power/PowerPC common instructions\n\
1359-many generate code for any architecture (PWR/PWRX/PPC)\n"));
1360 fprintf (stream, _("\
1361-maltivec generate code for AltiVec\n\
1362-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1363-me300 generate code for PowerPC e300 family\n\
1364-me500, -me500x2 generate code for Motorola e500 core complex\n\
1365-me500mc, generate code for Freescale e500mc core complex\n\
1366-me500mc64, generate code for Freescale e500mc64 core complex\n\
1367-me5500, generate code for Freescale e5500 core complex\n\
1368-me6500, generate code for Freescale e6500 core complex\n\
1369-mspe generate code for Motorola SPE instructions\n\
1370-mspe2 generate code for Freescale SPE2 instructions\n\
1371-mvle generate code for Freescale VLE instructions\n\
1372-mtitan generate code for AppliedMicro Titan core complex\n\
1373-mregnames Allow symbolic names for registers\n\
1374-mno-regnames Do not allow symbolic names for registers\n"));
1375#ifdef OBJ_ELF
1376 fprintf (stream, _("\
1377-mrelocatable support for GCC's -mrelocatble option\n\
1378-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1379-memb set PPC_EMB bit in ELF flags\n\
1380-mlittle, -mlittle-endian, -le\n\
1381 generate code for a little endian machine\n\
1382-mbig, -mbig-endian, -be\n\
1383 generate code for a big endian machine\n\
1384-msolaris generate code for Solaris\n\
1385-mno-solaris do not generate code for Solaris\n\
1386-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1387-V print assembler version number\n\
1388-Qy, -Qn ignored\n"));
1389#endif
1390 fprintf (stream, _("\
1391-nops=count when aligning, more than COUNT nops uses a branch\n\
1392-ppc476-workaround warn if emitting data to code sections\n"));
1393}
1394\f
1395/* Set ppc_cpu if it is not already set. */
1396
1397static void
1398ppc_set_cpu (void)
1399{
1400 const char *default_os = TARGET_OS;
1401 const char *default_cpu = TARGET_CPU;
1402
1403 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1404 {
1405 if (ppc_obj64)
1406 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1407 else if (strncmp (default_os, "aix", 3) == 0
1408 && default_os[3] >= '4' && default_os[3] <= '9')
1409 ppc_cpu |= PPC_OPCODE_COMMON;
1410 else if (strncmp (default_os, "aix3", 4) == 0)
1411 ppc_cpu |= PPC_OPCODE_POWER;
1412 else if (strcmp (default_cpu, "rs6000") == 0)
1413 ppc_cpu |= PPC_OPCODE_POWER;
1414 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1415 ppc_cpu |= PPC_OPCODE_PPC;
1416 else
1417 as_fatal (_("unknown default cpu = %s, os = %s"),
1418 default_cpu, default_os);
1419 }
1420}
1421
1422/* Figure out the BFD architecture to use. This function and ppc_mach
1423 are called well before md_begin, when the output file is opened. */
1424
1425enum bfd_architecture
1426ppc_arch (void)
1427{
1428 const char *default_cpu = TARGET_CPU;
1429 ppc_set_cpu ();
1430
1431 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1432 return bfd_arch_powerpc;
1433 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1434 return bfd_arch_powerpc;
1435 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1436 return bfd_arch_rs6000;
1437 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1438 {
1439 if (strcmp (default_cpu, "rs6000") == 0)
1440 return bfd_arch_rs6000;
1441 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1442 return bfd_arch_powerpc;
1443 }
1444
1445 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1446 return bfd_arch_unknown;
1447}
1448
1449unsigned long
1450ppc_mach (void)
1451{
1452 if (ppc_obj64)
1453 return bfd_mach_ppc64;
1454 else if (ppc_arch () == bfd_arch_rs6000)
1455 return bfd_mach_rs6k;
1456 else if (ppc_cpu & PPC_OPCODE_TITAN)
1457 return bfd_mach_ppc_titan;
1458 else if (ppc_cpu & PPC_OPCODE_VLE)
1459 return bfd_mach_ppc_vle;
1460 else
1461 return bfd_mach_ppc;
1462}
1463
1464extern const char*
1465ppc_target_format (void)
1466{
1467#ifdef OBJ_COFF
1468#ifdef TE_PE
1469 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1470#elif TE_POWERMAC
1471 return "xcoff-powermac";
1472#else
1473# ifdef TE_AIX5
1474 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1475# else
1476 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1477# endif
1478#endif
1479#endif
1480#ifdef OBJ_ELF
1481# ifdef TE_FreeBSD
1482 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1483# elif defined (TE_VXWORKS)
1484 return "elf32-powerpc-vxworks";
1485# else
1486 return (target_big_endian
1487 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1488 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1489# endif
1490#endif
1491}
1492
1493/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1494 Return TRUE if there's a problem, otherwise FALSE. */
1495
1496static bfd_boolean
1497insn_validate (const struct powerpc_opcode *op)
1498{
1499 const unsigned char *o;
1500 uint64_t omask = op->mask;
1501
1502 /* The mask had better not trim off opcode bits. */
1503 if ((op->opcode & omask) != op->opcode)
1504 {
1505 as_bad (_("mask trims opcode bits for %s"), op->name);
1506 return TRUE;
1507 }
1508
1509 /* The operands must not overlap the opcode or each other. */
1510 for (o = op->operands; *o; ++o)
1511 {
1512 if (*o >= num_powerpc_operands)
1513 {
1514 as_bad (_("operand index error for %s"), op->name);
1515 return TRUE;
1516 }
1517 else
1518 {
1519 const struct powerpc_operand *operand = &powerpc_operands[*o];
1520 if (operand->shift != (int) PPC_OPSHIFT_INV)
1521 {
1522 uint64_t mask;
1523
1524 if (operand->shift >= 0)
1525 mask = operand->bitm << operand->shift;
1526 else
1527 mask = operand->bitm >> -operand->shift;
1528 if (omask & mask)
1529 {
1530 as_bad (_("operand %d overlap in %s"),
1531 (int) (o - op->operands), op->name);
1532 return TRUE;
1533 }
1534 omask |= mask;
1535 }
1536 }
1537 }
1538 return FALSE;
1539}
1540
1541/* Insert opcodes and macros into hash tables. Called at startup and
1542 for .machine pseudo. */
1543
1544static void
1545ppc_setup_opcodes (void)
1546{
1547 const struct powerpc_opcode *op;
1548 const struct powerpc_opcode *op_end;
1549 const struct powerpc_macro *macro;
1550 const struct powerpc_macro *macro_end;
1551 bfd_boolean bad_insn = FALSE;
1552
1553 if (ppc_hash != NULL)
1554 hash_die (ppc_hash);
1555 if (ppc_macro_hash != NULL)
1556 hash_die (ppc_macro_hash);
1557
1558 /* Insert the opcodes into a hash table. */
1559 ppc_hash = hash_new ();
1560
1561 if (ENABLE_CHECKING)
1562 {
1563 unsigned int i;
1564
1565 /* An index into powerpc_operands is stored in struct fix
1566 fx_pcrel_adjust which is 8 bits wide. */
1567 gas_assert (num_powerpc_operands < 256);
1568
1569 /* Check operand masks. Code here and in the disassembler assumes
1570 all the 1's in the mask are contiguous. */
1571 for (i = 0; i < num_powerpc_operands; ++i)
1572 {
1573 uint64_t mask = powerpc_operands[i].bitm;
1574 uint64_t right_bit;
1575 unsigned int j;
1576
1577 right_bit = mask & -mask;
1578 mask += right_bit;
1579 right_bit = mask & -mask;
1580 if (mask != right_bit)
1581 {
1582 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1583 bad_insn = TRUE;
1584 }
1585 for (j = i + 1; j < num_powerpc_operands; ++j)
1586 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1587 sizeof (powerpc_operands[0])) == 0)
1588 {
1589 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1590 j, i);
1591 bad_insn = TRUE;
1592 }
1593 }
1594 }
1595
1596 op_end = powerpc_opcodes + powerpc_num_opcodes;
1597 for (op = powerpc_opcodes; op < op_end; op++)
1598 {
1599 if (ENABLE_CHECKING)
1600 {
1601 if (op != powerpc_opcodes)
1602 {
1603 int old_opcode = PPC_OP (op[-1].opcode);
1604 int new_opcode = PPC_OP (op[0].opcode);
1605
1606#ifdef PRINT_OPCODE_TABLE
1607 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1608 op->name, (unsigned int) (op - powerpc_opcodes),
1609 (unsigned int) new_opcode, (unsigned long long) op->opcode,
1610 (unsigned long long) op->mask, (unsigned long long) op->flags);
1611#endif
1612
1613 /* The major opcodes had better be sorted. Code in the
1614 disassembler assumes the insns are sorted according to
1615 major opcode. */
1616 if (new_opcode < old_opcode)
1617 {
1618 as_bad (_("major opcode is not sorted for %s"),
1619 op->name);
1620 bad_insn = TRUE;
1621 }
1622 }
1623 if ((op->flags & PPC_OPCODE_VLE) != 0)
1624 {
1625 as_bad (_("%s is enabled by vle flag"), op->name);
1626 bad_insn = TRUE;
1627 }
1628 if (PPC_OP (op->opcode) != 4
1629 && PPC_OP (op->opcode) != 31
1630 && (op->deprecated & PPC_OPCODE_VLE) == 0)
1631 {
1632 as_bad (_("%s not disabled by vle flag"), op->name);
1633 bad_insn = TRUE;
1634 }
1635 bad_insn |= insn_validate (op);
1636 }
1637
1638 if ((ppc_cpu & op->flags) != 0
1639 && !(ppc_cpu & op->deprecated))
1640 {
1641 const char *retval;
1642
1643 retval = hash_insert (ppc_hash, op->name, (void *) op);
1644 if (retval != NULL)
1645 {
1646 as_bad (_("duplicate instruction %s"),
1647 op->name);
1648 bad_insn = TRUE;
1649 }
1650 }
1651 }
1652
1653 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1654 for (op = powerpc_opcodes; op < op_end; op++)
1655 hash_insert (ppc_hash, op->name, (void *) op);
1656
1657 op_end = vle_opcodes + vle_num_opcodes;
1658 for (op = vle_opcodes; op < op_end; op++)
1659 {
1660 if (ENABLE_CHECKING)
1661 {
1662 if (op != vle_opcodes)
1663 {
1664 unsigned old_seg, new_seg;
1665
1666 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1667 old_seg = VLE_OP_TO_SEG (old_seg);
1668 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1669 new_seg = VLE_OP_TO_SEG (new_seg);
1670
1671#ifdef PRINT_OPCODE_TABLE
1672 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1673 op->name, (unsigned int) (op - powerpc_opcodes),
1674 (unsigned int) new_seg, (unsigned long long) op->opcode,
1675 (unsigned long long) op->mask, (unsigned long long) op->flags);
1676#endif
1677 /* The major opcodes had better be sorted. Code in the
1678 disassembler assumes the insns are sorted according to
1679 major opcode. */
1680 if (new_seg < old_seg)
1681 {
1682 as_bad (_("major opcode is not sorted for %s"),
1683 op->name);
1684 bad_insn = TRUE;
1685 }
1686 }
1687
1688 bad_insn |= insn_validate (op);
1689 }
1690
1691 if ((ppc_cpu & op->flags) != 0
1692 && !(ppc_cpu & op->deprecated))
1693 {
1694 const char *retval;
1695
1696 retval = hash_insert (ppc_hash, op->name, (void *) op);
1697 if (retval != NULL)
1698 {
1699 as_bad (_("duplicate instruction %s"),
1700 op->name);
1701 bad_insn = TRUE;
1702 }
1703 }
1704 }
1705
1706 /* SPE2 instructions */
1707 if ((ppc_cpu & PPC_OPCODE_SPE2) == PPC_OPCODE_SPE2)
1708 {
1709 op_end = spe2_opcodes + spe2_num_opcodes;
1710 for (op = spe2_opcodes; op < op_end; op++)
1711 {
1712 if (ENABLE_CHECKING)
1713 {
1714 if (op != spe2_opcodes)
1715 {
1716 unsigned old_seg, new_seg;
1717
1718 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1719 old_seg = VLE_OP_TO_SEG (old_seg);
1720 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1721 new_seg = VLE_OP_TO_SEG (new_seg);
1722
1723 /* The major opcodes had better be sorted. Code in the
1724 disassembler assumes the insns are sorted according to
1725 major opcode. */
1726 if (new_seg < old_seg)
1727 {
1728 as_bad (_("major opcode is not sorted for %s"), op->name);
1729 bad_insn = TRUE;
1730 }
1731 }
1732
1733 bad_insn |= insn_validate (op);
1734 }
1735
1736 if ((ppc_cpu & op->flags) != 0 && !(ppc_cpu & op->deprecated))
1737 {
1738 const char *retval;
1739
1740 retval = hash_insert (ppc_hash, op->name, (void *) op);
1741 if (retval != NULL)
1742 {
1743 as_bad (_("duplicate instruction %s"),
1744 op->name);
1745 bad_insn = TRUE;
1746 }
1747 }
1748 }
1749
1750 for (op = spe2_opcodes; op < op_end; op++)
1751 hash_insert (ppc_hash, op->name, (void *) op);
1752 }
1753
1754 /* Insert the macros into a hash table. */
1755 ppc_macro_hash = hash_new ();
1756
1757 macro_end = powerpc_macros + powerpc_num_macros;
1758 for (macro = powerpc_macros; macro < macro_end; macro++)
1759 {
1760 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1761 {
1762 const char *retval;
1763
1764 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1765 if (retval != (const char *) NULL)
1766 {
1767 as_bad (_("duplicate macro %s"), macro->name);
1768 bad_insn = TRUE;
1769 }
1770 }
1771 }
1772
1773 if (bad_insn)
1774 abort ();
1775}
1776
1777/* This function is called when the assembler starts up. It is called
1778 after the options have been parsed and the output file has been
1779 opened. */
1780
1781void
1782md_begin (void)
1783{
1784 ppc_set_cpu ();
1785
1786 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1787 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1788
1789#ifdef OBJ_ELF
1790 /* Set the ELF flags if desired. */
1791 if (ppc_flags && !msolaris)
1792 bfd_set_private_flags (stdoutput, ppc_flags);
1793#endif
1794
1795 ppc_setup_opcodes ();
1796
1797 /* Tell the main code what the endianness is if it is not overridden
1798 by the user. */
1799 if (!set_target_endian)
1800 {
1801 set_target_endian = 1;
1802 target_big_endian = PPC_BIG_ENDIAN;
1803 }
1804
1805#ifdef OBJ_XCOFF
1806 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1807
1808 /* Create dummy symbols to serve as initial csects. This forces the
1809 text csects to precede the data csects. These symbols will not
1810 be output. */
1811 ppc_text_csects = symbol_make ("dummy\001");
1812 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1813 ppc_data_csects = symbol_make ("dummy\001");
1814 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1815#endif
1816
1817#ifdef TE_PE
1818
1819 ppc_current_section = text_section;
1820 ppc_previous_section = 0;
1821
1822#endif
1823}
1824
1825void
1826ppc_cleanup (void)
1827{
1828#ifdef OBJ_ELF
1829 if (ppc_apuinfo_list == NULL)
1830 return;
1831
1832 /* Ok, so write the section info out. We have this layout:
1833
1834 byte data what
1835 ---- ---- ----
1836 0 8 length of "APUinfo\0"
1837 4 (n*4) number of APU's (4 bytes each)
1838 8 2 note type 2
1839 12 "APUinfo\0" name
1840 20 APU#1 first APU's info
1841 24 APU#2 second APU's info
1842 ... ...
1843 */
1844 {
1845 char *p;
1846 asection *seg = now_seg;
1847 subsegT subseg = now_subseg;
1848 asection *apuinfo_secp = (asection *) NULL;
1849 unsigned int i;
1850
1851 /* Create the .PPC.EMB.apuinfo section. */
1852 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
1853 bfd_set_section_flags (stdoutput,
1854 apuinfo_secp,
1855 SEC_HAS_CONTENTS | SEC_READONLY);
1856
1857 p = frag_more (4);
1858 md_number_to_chars (p, (valueT) 8, 4);
1859
1860 p = frag_more (4);
1861 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1862
1863 p = frag_more (4);
1864 md_number_to_chars (p, (valueT) 2, 4);
1865
1866 p = frag_more (8);
1867 strcpy (p, APUINFO_LABEL);
1868
1869 for (i = 0; i < ppc_apuinfo_num; i++)
1870 {
1871 p = frag_more (4);
1872 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1873 }
1874
1875 frag_align (2, 0, 0);
1876
1877 /* We probably can't restore the current segment, for there likely
1878 isn't one yet... */
1879 if (seg && subseg)
1880 subseg_set (seg, subseg);
1881 }
1882#endif
1883}
1884
1885/* Insert an operand value into an instruction. */
1886
1887static uint64_t
1888ppc_insert_operand (uint64_t insn,
1889 const struct powerpc_operand *operand,
1890 int64_t val,
1891 ppc_cpu_t cpu,
1892 const char *file,
1893 unsigned int line)
1894{
1895 int64_t min, max, right;
1896
1897 max = operand->bitm;
1898 right = max & -max;
1899 min = 0;
1900
1901 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1902 {
1903 /* Extend the allowed range for addis to [-32768, 65535].
1904 Similarly for cmpli and some VLE high part insns. For 64-bit
1905 it would be good to disable this for signed fields since the
1906 value is sign extended into the high 32 bits of the register.
1907 If the value is, say, an address, then we might care about
1908 the high bits. However, gcc as of 2014-06 uses unsigned
1909 values when loading the high part of 64-bit constants using
1910 lis. */
1911 min = ~(max >> 1) & -right;
1912 }
1913 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1914 {
1915 max = (max >> 1) & -right;
1916 min = ~max & -right;
1917 }
1918
1919 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1920 max++;
1921
1922 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1923 {
1924 int64_t tmp = min;
1925 min = -max;
1926 max = -tmp;
1927 }
1928
1929 if (min <= max)
1930 {
1931 /* Some people write constants with the sign extension done by
1932 hand but only up to 32 bits. This shouldn't really be valid,
1933 but, to permit this code to assemble on a 64-bit host, we
1934 sign extend the 32-bit value to 64 bits if so doing makes the
1935 value valid. */
1936 if (val > max
1937 && (val - (1LL << 32)) >= min
1938 && (val - (1LL << 32)) <= max
1939 && ((val - (1LL << 32)) & (right - 1)) == 0)
1940 val = val - (1LL << 32);
1941
1942 /* Similarly, people write expressions like ~(1<<15), and expect
1943 this to be OK for a 32-bit unsigned value. */
1944 else if (val < min
1945 && (val + (1LL << 32)) >= min
1946 && (val + (1LL << 32)) <= max
1947 && ((val + (1LL << 32)) & (right - 1)) == 0)
1948 val = val + (1LL << 32);
1949
1950 else if (val < min
1951 || val > max
1952 || (val & (right - 1)) != 0)
1953 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1954 }
1955
1956 if (operand->insert)
1957 {
1958 const char *errmsg;
1959
1960 errmsg = NULL;
1961 insn = (*operand->insert) (insn, val, cpu, &errmsg);
1962 if (errmsg != (const char *) NULL)
1963 as_bad_where (file, line, "%s", errmsg);
1964 }
1965 else if (operand->shift >= 0)
1966 insn |= (val & operand->bitm) << operand->shift;
1967 else
1968 insn |= (val & operand->bitm) >> -operand->shift;
1969
1970 return insn;
1971}
1972
1973\f
1974#ifdef OBJ_ELF
1975/* Parse @got, etc. and return the desired relocation. */
1976static bfd_reloc_code_real_type
1977ppc_elf_suffix (char **str_p, expressionS *exp_p)
1978{
1979 struct map_bfd {
1980 const char *string;
1981 unsigned int length : 8;
1982 unsigned int valid32 : 1;
1983 unsigned int valid64 : 1;
1984 unsigned int reloc;
1985 };
1986
1987 char ident[20];
1988 char *str = *str_p;
1989 char *str2;
1990 int ch;
1991 int len;
1992 const struct map_bfd *ptr;
1993
1994#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1995#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1996#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1997
1998 static const struct map_bfd mapping[] = {
1999 MAP ("l", BFD_RELOC_LO16),
2000 MAP ("h", BFD_RELOC_HI16),
2001 MAP ("ha", BFD_RELOC_HI16_S),
2002 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
2003 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
2004 MAP ("got", BFD_RELOC_16_GOTOFF),
2005 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
2006 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
2007 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
2008 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
2009 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
2010 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
2011 MAP ("copy", BFD_RELOC_PPC_COPY),
2012 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
2013 MAP ("sectoff", BFD_RELOC_16_BASEREL),
2014 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
2015 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
2016 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
2017 MAP ("tls", BFD_RELOC_PPC_TLS),
2018 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
2019 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
2020 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
2021 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
2022 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
2023 MAP ("tprel", BFD_RELOC_PPC_TPREL),
2024 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
2025 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
2026 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
2027 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
2028 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
2029 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
2030 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
2031 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
2032 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
2033 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
2034 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
2035 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
2036 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
2037 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
2038 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
2039 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
2040 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
2041 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
2042 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
2043 MAP32 ("fixup", BFD_RELOC_CTOR),
2044 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
2045 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
2046 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
2047 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
2048 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
2049 MAP32 ("sdarel", BFD_RELOC_GPREL16),
2050 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
2051 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
2052 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
2053 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
2054 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
2055 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
2056 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
2057 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
2058 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
2059 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
2060 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
2061 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
2062 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
2063 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
2064 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
2065 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
2066 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
2067 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
2068 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
2069 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
2070 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
2071 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
2072 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
2073 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
2074 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
2075 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
2076 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
2077 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
2078 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
2079 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
2080 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
2081 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
2082 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
2083 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
2084 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
2085 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
2086 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
2087 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
2088 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
2089 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
2090 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
2091 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
2092 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
2093 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
2094 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
2095 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
2096 };
2097
2098 if (*str++ != '@')
2099 return BFD_RELOC_NONE;
2100
2101 for (ch = *str, str2 = ident;
2102 (str2 < ident + sizeof (ident) - 1
2103 && (ISALNUM (ch) || ch == '@'));
2104 ch = *++str)
2105 {
2106 *str2++ = TOLOWER (ch);
2107 }
2108
2109 *str2 = '\0';
2110 len = str2 - ident;
2111
2112 ch = ident[0];
2113 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2114 if (ch == ptr->string[0]
2115 && len == ptr->length
2116 && memcmp (ident, ptr->string, ptr->length) == 0
2117 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2118 {
2119 int reloc = ptr->reloc;
2120
2121 if (!ppc_obj64 && exp_p->X_add_number != 0)
2122 {
2123 switch (reloc)
2124 {
2125 case BFD_RELOC_16_GOTOFF:
2126 case BFD_RELOC_LO16_GOTOFF:
2127 case BFD_RELOC_HI16_GOTOFF:
2128 case BFD_RELOC_HI16_S_GOTOFF:
2129 as_warn (_("identifier+constant@got means "
2130 "identifier@got+constant"));
2131 break;
2132
2133 case BFD_RELOC_PPC_GOT_TLSGD16:
2134 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2135 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2136 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2137 case BFD_RELOC_PPC_GOT_TLSLD16:
2138 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2139 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2140 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2141 case BFD_RELOC_PPC_GOT_DTPREL16:
2142 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2143 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2144 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2145 case BFD_RELOC_PPC_GOT_TPREL16:
2146 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2147 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2148 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2149 as_bad (_("symbol+offset not supported for got tls"));
2150 break;
2151 }
2152 }
2153
2154 /* Now check for identifier@suffix+constant. */
2155 if (*str == '-' || *str == '+')
2156 {
2157 char *orig_line = input_line_pointer;
2158 expressionS new_exp;
2159
2160 input_line_pointer = str;
2161 expression (&new_exp);
2162 if (new_exp.X_op == O_constant)
2163 {
2164 exp_p->X_add_number += new_exp.X_add_number;
2165 str = input_line_pointer;
2166 }
2167
2168 if (&input_line_pointer != str_p)
2169 input_line_pointer = orig_line;
2170 }
2171 *str_p = str;
2172
2173 if (reloc == (int) BFD_RELOC_PPC64_TOC
2174 && exp_p->X_op == O_symbol
2175 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2176 {
2177 /* Change the symbol so that the dummy .TOC. symbol can be
2178 omitted from the object file. */
2179 exp_p->X_add_symbol = &abs_symbol;
2180 }
2181
2182 return (bfd_reloc_code_real_type) reloc;
2183 }
2184
2185 return BFD_RELOC_NONE;
2186}
2187
2188/* Support @got, etc. on constants emitted via .short, .int etc. */
2189
2190bfd_reloc_code_real_type
2191ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2192{
2193 expression (exp);
2194 if (nbytes >= 2 && *input_line_pointer == '@')
2195 return ppc_elf_suffix (&input_line_pointer, exp);
2196 return BFD_RELOC_NONE;
2197}
2198
2199/* Warn when emitting data to code sections, unless we are emitting
2200 a relocation that ld --ppc476-workaround uses to recognise data
2201 *and* there was an unconditional branch prior to the data. */
2202
2203void
2204ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2205 unsigned int nbytes, fixS *fix)
2206{
2207 if (warn_476
2208 && (now_seg->flags & SEC_CODE) != 0
2209 && (nbytes != 4
2210 || fix == NULL
2211 || !(fix->fx_r_type == BFD_RELOC_32
2212 || fix->fx_r_type == BFD_RELOC_CTOR
2213 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2214 || !(last_seg == now_seg && last_subseg == now_subseg)
2215 || !((last_insn & (0x3f << 26)) == (18u << 26)
2216 || ((last_insn & (0x3f << 26)) == (16u << 26)
2217 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2218 || ((last_insn & (0x3f << 26)) == (19u << 26)
2219 && (last_insn & (0x3ff << 1)) == (16u << 1)
2220 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2221 {
2222 /* Flag that we've warned. */
2223 if (fix != NULL)
2224 fix->fx_tcbit = 1;
2225
2226 as_warn (_("data in executable section"));
2227 }
2228}
2229
2230/* Solaris pseduo op to change to the .rodata section. */
2231static void
2232ppc_elf_rdata (int xxx)
2233{
2234 char *save_line = input_line_pointer;
2235 static char section[] = ".rodata\n";
2236
2237 /* Just pretend this is .section .rodata */
2238 input_line_pointer = section;
2239 obj_elf_section (xxx);
2240
2241 input_line_pointer = save_line;
2242}
2243
2244/* Pseudo op to make file scope bss items. */
2245static void
2246ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2247{
2248 char *name;
2249 char c;
2250 char *p;
2251 offsetT size;
2252 symbolS *symbolP;
2253 offsetT align;
2254 segT old_sec;
2255 int old_subsec;
2256 char *pfrag;
2257 int align2;
2258
2259 c = get_symbol_name (&name);
2260
2261 /* Just after name is now '\0'. */
2262 p = input_line_pointer;
2263 *p = c;
2264 SKIP_WHITESPACE_AFTER_NAME ();
2265 if (*input_line_pointer != ',')
2266 {
2267 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2268 ignore_rest_of_line ();
2269 return;
2270 }
2271
2272 input_line_pointer++; /* skip ',' */
2273 if ((size = get_absolute_expression ()) < 0)
2274 {
2275 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2276 ignore_rest_of_line ();
2277 return;
2278 }
2279
2280 /* The third argument to .lcomm is the alignment. */
2281 if (*input_line_pointer != ',')
2282 align = 8;
2283 else
2284 {
2285 ++input_line_pointer;
2286 align = get_absolute_expression ();
2287 if (align <= 0)
2288 {
2289 as_warn (_("ignoring bad alignment"));
2290 align = 8;
2291 }
2292 }
2293
2294 *p = 0;
2295 symbolP = symbol_find_or_make (name);
2296 *p = c;
2297
2298 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2299 {
2300 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2301 S_GET_NAME (symbolP));
2302 ignore_rest_of_line ();
2303 return;
2304 }
2305
2306 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2307 {
2308 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2309 S_GET_NAME (symbolP),
2310 (long) S_GET_VALUE (symbolP),
2311 (long) size);
2312
2313 ignore_rest_of_line ();
2314 return;
2315 }
2316
2317 /* Allocate_bss. */
2318 old_sec = now_seg;
2319 old_subsec = now_subseg;
2320 if (align)
2321 {
2322 /* Convert to a power of 2 alignment. */
2323 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2324 if (align != 1)
2325 {
2326 as_bad (_("common alignment not a power of 2"));
2327 ignore_rest_of_line ();
2328 return;
2329 }
2330 }
2331 else
2332 align2 = 0;
2333
2334 record_alignment (bss_section, align2);
2335 subseg_set (bss_section, 1);
2336 if (align2)
2337 frag_align (align2, 0, 0);
2338 if (S_GET_SEGMENT (symbolP) == bss_section)
2339 symbol_get_frag (symbolP)->fr_symbol = 0;
2340 symbol_set_frag (symbolP, frag_now);
2341 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2342 (char *) 0);
2343 *pfrag = 0;
2344 S_SET_SIZE (symbolP, size);
2345 S_SET_SEGMENT (symbolP, bss_section);
2346 subseg_set (old_sec, old_subsec);
2347 demand_empty_rest_of_line ();
2348}
2349
2350/* Pseudo op to set symbol local entry point. */
2351static void
2352ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2353{
2354 char *name;
2355 char c = get_symbol_name (&name);
2356 char *p;
2357 expressionS exp;
2358 symbolS *sym;
2359 asymbol *bfdsym;
2360 elf_symbol_type *elfsym;
2361
2362 p = input_line_pointer;
2363 *p = c;
2364 SKIP_WHITESPACE_AFTER_NAME ();
2365 if (*input_line_pointer != ',')
2366 {
2367 *p = 0;
2368 as_bad (_("expected comma after name `%s' in .localentry directive"),
2369 name);
2370 *p = c;
2371 ignore_rest_of_line ();
2372 return;
2373 }
2374 input_line_pointer++;
2375 expression (&exp);
2376 if (exp.X_op == O_absent)
2377 {
2378 as_bad (_("missing expression in .localentry directive"));
2379 exp.X_op = O_constant;
2380 exp.X_add_number = 0;
2381 }
2382 *p = 0;
2383 sym = symbol_find_or_make (name);
2384 *p = c;
2385
2386 if (resolve_expression (&exp)
2387 && exp.X_op == O_constant)
2388 {
2389 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2390
2391 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2392 as_bad (_(".localentry expression for `%s' "
2393 "is not a valid power of 2"), S_GET_NAME (sym));
2394 else
2395 {
2396 bfdsym = symbol_get_bfdsym (sym);
2397 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2398 gas_assert (elfsym);
2399 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2400 elfsym->internal_elf_sym.st_other |= encoded;
2401 if (ppc_abiversion == 0)
2402 ppc_abiversion = 2;
2403 }
2404 }
2405 else
2406 as_bad (_(".localentry expression for `%s' "
2407 "does not evaluate to a constant"), S_GET_NAME (sym));
2408
2409 demand_empty_rest_of_line ();
2410}
2411
2412/* Pseudo op to set ABI version. */
2413static void
2414ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2415{
2416 expressionS exp;
2417
2418 expression (&exp);
2419 if (exp.X_op == O_absent)
2420 {
2421 as_bad (_("missing expression in .abiversion directive"));
2422 exp.X_op = O_constant;
2423 exp.X_add_number = 0;
2424 }
2425
2426 if (resolve_expression (&exp)
2427 && exp.X_op == O_constant)
2428 ppc_abiversion = exp.X_add_number;
2429 else
2430 as_bad (_(".abiversion expression does not evaluate to a constant"));
2431 demand_empty_rest_of_line ();
2432}
2433
2434/* Parse a .gnu_attribute directive. */
2435static void
2436ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED)
2437{
2438 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU);
2439
2440 /* Check validity of defined powerpc tags. */
2441 if (tag == Tag_GNU_Power_ABI_FP
2442 || tag == Tag_GNU_Power_ABI_Vector
2443 || tag == Tag_GNU_Power_ABI_Struct_Return)
2444 {
2445 unsigned int val;
2446
2447 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag);
2448
2449 if ((tag == Tag_GNU_Power_ABI_FP && val > 15)
2450 || (tag == Tag_GNU_Power_ABI_Vector && val > 3)
2451 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2))
2452 as_warn (_("unknown .gnu_attribute value"));
2453 }
2454}
2455
2456/* Set ABI version in output file. */
2457void
2458ppc_elf_end (void)
2459{
2460 if (ppc_obj64 && ppc_abiversion != 0)
2461 {
2462 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2463 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2464 }
2465}
2466
2467/* Validate any relocations emitted for -mrelocatable, possibly adding
2468 fixups for word relocations in writable segments, so we can adjust
2469 them at runtime. */
2470static void
2471ppc_elf_validate_fix (fixS *fixp, segT seg)
2472{
2473 if (fixp->fx_done || fixp->fx_pcrel)
2474 return;
2475
2476 switch (shlib)
2477 {
2478 case SHLIB_NONE:
2479 case SHLIB_PIC:
2480 return;
2481
2482 case SHLIB_MRELOCATABLE:
2483 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2484 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2485 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2486 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2487 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2488 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2489 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2490 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2491 && (seg->flags & SEC_LOAD) != 0
2492 && strcmp (segment_name (seg), ".got2") != 0
2493 && strcmp (segment_name (seg), ".dtors") != 0
2494 && strcmp (segment_name (seg), ".ctors") != 0
2495 && strcmp (segment_name (seg), ".fixup") != 0
2496 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2497 && strcmp (segment_name (seg), ".eh_frame") != 0
2498 && strcmp (segment_name (seg), ".ex_shared") != 0)
2499 {
2500 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2501 || fixp->fx_r_type != BFD_RELOC_CTOR)
2502 {
2503 as_bad_where (fixp->fx_file, fixp->fx_line,
2504 _("relocation cannot be done when using -mrelocatable"));
2505 }
2506 }
2507 return;
2508 }
2509}
2510
2511/* Prevent elf_frob_file_before_adjust removing a weak undefined
2512 function descriptor sym if the corresponding code sym is used. */
2513
2514void
2515ppc_frob_file_before_adjust (void)
2516{
2517 symbolS *symp;
2518 asection *toc;
2519
2520 if (!ppc_obj64)
2521 return;
2522
2523 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2524 {
2525 const char *name;
2526 char *dotname;
2527 symbolS *dotsym;
2528
2529 name = S_GET_NAME (symp);
2530 if (name[0] == '.')
2531 continue;
2532
2533 if (! S_IS_WEAK (symp)
2534 || S_IS_DEFINED (symp))
2535 continue;
2536
2537 dotname = concat (".", name, (char *) NULL);
2538 dotsym = symbol_find_noref (dotname, 1);
2539 free (dotname);
2540 if (dotsym != NULL && (symbol_used_p (dotsym)
2541 || symbol_used_in_reloc_p (dotsym)))
2542 symbol_mark_used (symp);
2543
2544 }
2545
2546 toc = bfd_get_section_by_name (stdoutput, ".toc");
2547 if (toc != NULL
2548 && toc_reloc_types != has_large_toc_reloc
2549 && bfd_section_size (stdoutput, toc) > 0x10000)
2550 as_warn (_("TOC section size exceeds 64k"));
2551}
2552
2553/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2554 emitted. Other uses of .TOC. will cause the symbol to be marked
2555 with BSF_KEEP in md_apply_fix. */
2556
2557void
2558ppc_elf_adjust_symtab (void)
2559{
2560 if (ppc_obj64)
2561 {
2562 symbolS *symp;
2563 symp = symbol_find (".TOC.");
2564 if (symp != NULL)
2565 {
2566 asymbol *bsym = symbol_get_bfdsym (symp);
2567 if ((bsym->flags & BSF_KEEP) == 0)
2568 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2569 }
2570 }
2571}
2572#endif /* OBJ_ELF */
2573\f
2574#ifdef TE_PE
2575
2576/*
2577 * Summary of parse_toc_entry.
2578 *
2579 * in: Input_line_pointer points to the '[' in one of:
2580 *
2581 * [toc] [tocv] [toc32] [toc64]
2582 *
2583 * Anything else is an error of one kind or another.
2584 *
2585 * out:
2586 * return value: success or failure
2587 * toc_kind: kind of toc reference
2588 * input_line_pointer:
2589 * success: first char after the ']'
2590 * failure: unchanged
2591 *
2592 * settings:
2593 *
2594 * [toc] - rv == success, toc_kind = default_toc
2595 * [tocv] - rv == success, toc_kind = data_in_toc
2596 * [toc32] - rv == success, toc_kind = must_be_32
2597 * [toc64] - rv == success, toc_kind = must_be_64
2598 *
2599 */
2600
2601enum toc_size_qualifier
2602{
2603 default_toc, /* The toc cell constructed should be the system default size */
2604 data_in_toc, /* This is a direct reference to a toc cell */
2605 must_be_32, /* The toc cell constructed must be 32 bits wide */
2606 must_be_64 /* The toc cell constructed must be 64 bits wide */
2607};
2608
2609static int
2610parse_toc_entry (enum toc_size_qualifier *toc_kind)
2611{
2612 char *start;
2613 char *toc_spec;
2614 char c;
2615 enum toc_size_qualifier t;
2616
2617 /* Save the input_line_pointer. */
2618 start = input_line_pointer;
2619
2620 /* Skip over the '[' , and whitespace. */
2621 ++input_line_pointer;
2622 SKIP_WHITESPACE ();
2623
2624 /* Find the spelling of the operand. */
2625 c = get_symbol_name (&toc_spec);
2626
2627 if (strcmp (toc_spec, "toc") == 0)
2628 {
2629 t = default_toc;
2630 }
2631 else if (strcmp (toc_spec, "tocv") == 0)
2632 {
2633 t = data_in_toc;
2634 }
2635 else if (strcmp (toc_spec, "toc32") == 0)
2636 {
2637 t = must_be_32;
2638 }
2639 else if (strcmp (toc_spec, "toc64") == 0)
2640 {
2641 t = must_be_64;
2642 }
2643 else
2644 {
2645 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2646 *input_line_pointer = c;
2647 input_line_pointer = start;
2648 return 0;
2649 }
2650
2651 /* Now find the ']'. */
2652 *input_line_pointer = c;
2653
2654 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2655 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2656
2657 if (c != ']')
2658 {
2659 as_bad (_("syntax error: expected `]', found `%c'"), c);
2660 input_line_pointer = start;
2661 return 0;
2662 }
2663
2664 *toc_kind = t;
2665 return 1;
2666}
2667#endif
2668
2669#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2670/* See whether a symbol is in the TOC section. */
2671
2672static int
2673ppc_is_toc_sym (symbolS *sym)
2674{
2675#ifdef OBJ_XCOFF
2676 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2677 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2678#endif
2679#ifdef OBJ_ELF
2680 const char *sname = segment_name (S_GET_SEGMENT (sym));
2681 if (ppc_obj64)
2682 return strcmp (sname, ".toc") == 0;
2683 else
2684 return strcmp (sname, ".got") == 0;
2685#endif
2686}
2687#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2688\f
2689
2690#ifdef OBJ_ELF
2691#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2692static void
2693ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2694{
2695 unsigned int i;
2696
2697 /* Check we don't already exist. */
2698 for (i = 0; i < ppc_apuinfo_num; i++)
2699 if (ppc_apuinfo_list[i] == APUID (apu, version))
2700 return;
2701
2702 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2703 {
2704 if (ppc_apuinfo_num_alloc == 0)
2705 {
2706 ppc_apuinfo_num_alloc = 4;
2707 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2708 }
2709 else
2710 {
2711 ppc_apuinfo_num_alloc += 4;
2712 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2713 ppc_apuinfo_num_alloc);
2714 }
2715 }
2716 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2717}
2718#undef APUID
2719#endif
2720\f
2721
2722/* We need to keep a list of fixups. We can't simply generate them as
2723 we go, because that would require us to first create the frag, and
2724 that would screw up references to ``.''. */
2725
2726struct ppc_fixup
2727{
2728 expressionS exp;
2729 int opindex;
2730 bfd_reloc_code_real_type reloc;
2731};
2732
2733#define MAX_INSN_FIXUPS (5)
2734
2735/* This routine is called for each instruction to be assembled. */
2736
2737void
2738md_assemble (char *str)
2739{
2740 char *s;
2741 const struct powerpc_opcode *opcode;
2742 uint64_t insn;
2743 const unsigned char *opindex_ptr;
2744 int skip_optional;
2745 int need_paren;
2746 int next_opindex;
2747 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2748 int fc;
2749 char *f;
2750 int addr_mask;
2751 int i;
2752 unsigned int insn_length;
2753
2754 /* Get the opcode. */
2755 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2756 ;
2757 if (*s != '\0')
2758 *s++ = '\0';
2759
2760 /* Look up the opcode in the hash table. */
2761 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2762 if (opcode == (const struct powerpc_opcode *) NULL)
2763 {
2764 const struct powerpc_macro *macro;
2765
2766 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2767 if (macro == (const struct powerpc_macro *) NULL)
2768 as_bad (_("unrecognized opcode: `%s'"), str);
2769 else
2770 ppc_macro (s, macro);
2771
2772 return;
2773 }
2774
2775 insn = opcode->opcode;
2776
2777 str = s;
2778 while (ISSPACE (*str))
2779 ++str;
2780
2781 /* PowerPC operands are just expressions. The only real issue is
2782 that a few operand types are optional. All cases which might use
2783 an optional operand separate the operands only with commas (in some
2784 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2785 have optional operands). Most instructions with optional operands
2786 have only one. Those that have more than one optional operand can
2787 take either all their operands or none. So, before we start seriously
2788 parsing the operands, we check to see if we have optional operands,
2789 and if we do, we count the number of commas to see which operands
2790 have been omitted. */
2791 skip_optional = 0;
2792 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2793 {
2794 const struct powerpc_operand *operand;
2795
2796 operand = &powerpc_operands[*opindex_ptr];
2797 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2798 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64))
2799 {
2800 unsigned int opcount;
2801 unsigned int num_operands_expected;
2802
2803 /* There is an optional operand. Count the number of
2804 commas in the input line. */
2805 if (*str == '\0')
2806 opcount = 0;
2807 else
2808 {
2809 opcount = 1;
2810 s = str;
2811 while ((s = strchr (s, ',')) != (char *) NULL)
2812 {
2813 ++opcount;
2814 ++s;
2815 }
2816 }
2817
2818 /* Compute the number of expected operands.
2819 Do not count fake operands. */
2820 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2821 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2822 ++ num_operands_expected;
2823
2824 /* If there are fewer operands in the line then are called
2825 for by the instruction, we want to skip the optional
2826 operands. */
2827 if (opcount < num_operands_expected)
2828 skip_optional = 1;
2829
2830 break;
2831 }
2832 }
2833
2834 /* Gather the operands. */
2835 need_paren = 0;
2836 next_opindex = 0;
2837 fc = 0;
2838 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2839 {
2840 const struct powerpc_operand *operand;
2841 const char *errmsg;
2842 char *hold;
2843 expressionS ex;
2844 char endc;
2845
2846 if (next_opindex == 0)
2847 operand = &powerpc_operands[*opindex_ptr];
2848 else
2849 {
2850 operand = &powerpc_operands[next_opindex];
2851 next_opindex = 0;
2852 }
2853 errmsg = NULL;
2854
2855 /* If this is a fake operand, then we do not expect anything
2856 from the input. */
2857 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2858 {
2859 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2860 if (errmsg != (const char *) NULL)
2861 as_bad ("%s", errmsg);
2862 continue;
2863 }
2864
2865 /* If this is an optional operand, and we are skipping it, just
2866 insert a zero. */
2867 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2868 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)
2869 && skip_optional)
2870 {
2871 int64_t val = ppc_optional_operand_value (operand);
2872 if (operand->insert)
2873 {
2874 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2875 if (errmsg != (const char *) NULL)
2876 as_bad ("%s", errmsg);
2877 }
2878 else if (operand->shift >= 0)
2879 insn |= (val & operand->bitm) << operand->shift;
2880 else
2881 insn |= (val & operand->bitm) >> -operand->shift;
2882
2883 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2884 next_opindex = *opindex_ptr + 1;
2885 continue;
2886 }
2887
2888 /* Gather the operand. */
2889 hold = input_line_pointer;
2890 input_line_pointer = str;
2891
2892#ifdef TE_PE
2893 if (*input_line_pointer == '[')
2894 {
2895 /* We are expecting something like the second argument here:
2896 *
2897 * lwz r4,[toc].GS.0.static_int(rtoc)
2898 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2899 * The argument following the `]' must be a symbol name, and the
2900 * register must be the toc register: 'rtoc' or '2'
2901 *
2902 * The effect is to 0 as the displacement field
2903 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2904 * the appropriate variation) reloc against it based on the symbol.
2905 * The linker will build the toc, and insert the resolved toc offset.
2906 *
2907 * Note:
2908 * o The size of the toc entry is currently assumed to be
2909 * 32 bits. This should not be assumed to be a hard coded
2910 * number.
2911 * o In an effort to cope with a change from 32 to 64 bits,
2912 * there are also toc entries that are specified to be
2913 * either 32 or 64 bits:
2914 * lwz r4,[toc32].GS.0.static_int(rtoc)
2915 * lwz r4,[toc64].GS.0.static_int(rtoc)
2916 * These demand toc entries of the specified size, and the
2917 * instruction probably requires it.
2918 */
2919
2920 int valid_toc;
2921 enum toc_size_qualifier toc_kind;
2922 bfd_reloc_code_real_type toc_reloc;
2923
2924 /* Go parse off the [tocXX] part. */
2925 valid_toc = parse_toc_entry (&toc_kind);
2926
2927 if (!valid_toc)
2928 {
2929 ignore_rest_of_line ();
2930 break;
2931 }
2932
2933 /* Now get the symbol following the ']'. */
2934 expression (&ex);
2935
2936 switch (toc_kind)
2937 {
2938 case default_toc:
2939 /* In this case, we may not have seen the symbol yet,
2940 since it is allowed to appear on a .extern or .globl
2941 or just be a label in the .data section. */
2942 toc_reloc = BFD_RELOC_PPC_TOC16;
2943 break;
2944 case data_in_toc:
2945 /* 1. The symbol must be defined and either in the toc
2946 section, or a global.
2947 2. The reloc generated must have the TOCDEFN flag set
2948 in upper bit mess of the reloc type.
2949 FIXME: It's a little confusing what the tocv
2950 qualifier can be used for. At the very least, I've
2951 seen three uses, only one of which I'm sure I can
2952 explain. */
2953 if (ex.X_op == O_symbol)
2954 {
2955 gas_assert (ex.X_add_symbol != NULL);
2956 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2957 != tocdata_section)
2958 {
2959 as_bad (_("[tocv] symbol is not a toc symbol"));
2960 }
2961 }
2962
2963 toc_reloc = BFD_RELOC_PPC_TOC16;
2964 break;
2965 case must_be_32:
2966 /* FIXME: these next two specifically specify 32/64 bit
2967 toc entries. We don't support them today. Is this
2968 the right way to say that? */
2969 toc_reloc = BFD_RELOC_NONE;
2970 as_bad (_("unimplemented toc32 expression modifier"));
2971 break;
2972 case must_be_64:
2973 /* FIXME: see above. */
2974 toc_reloc = BFD_RELOC_NONE;
2975 as_bad (_("unimplemented toc64 expression modifier"));
2976 break;
2977 default:
2978 fprintf (stderr,
2979 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2980 toc_kind);
2981 abort ();
2982 break;
2983 }
2984
2985 /* We need to generate a fixup for this expression. */
2986 if (fc >= MAX_INSN_FIXUPS)
2987 as_fatal (_("too many fixups"));
2988
2989 fixups[fc].reloc = toc_reloc;
2990 fixups[fc].exp = ex;
2991 fixups[fc].opindex = *opindex_ptr;
2992 ++fc;
2993
2994 /* Ok. We've set up the fixup for the instruction. Now make it
2995 look like the constant 0 was found here. */
2996 ex.X_unsigned = 1;
2997 ex.X_op = O_constant;
2998 ex.X_add_number = 0;
2999 ex.X_add_symbol = NULL;
3000 ex.X_op_symbol = NULL;
3001 }
3002
3003 else
3004#endif /* TE_PE */
3005 {
3006 if ((reg_names_p
3007 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
3008 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
3009 || !register_name (&ex))
3010 {
3011 char save_lex = lex_type['%'];
3012
3013 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
3014 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
3015 {
3016 cr_operand = TRUE;
3017 lex_type['%'] |= LEX_BEGIN_NAME;
3018 }
3019 expression (&ex);
3020 cr_operand = FALSE;
3021 lex_type['%'] = save_lex;
3022 }
3023 }
3024
3025 str = input_line_pointer;
3026 input_line_pointer = hold;
3027
3028 if (ex.X_op == O_illegal)
3029 as_bad (_("illegal operand"));
3030 else if (ex.X_op == O_absent)
3031 as_bad (_("missing operand"));
3032 else if (ex.X_op == O_register)
3033 {
3034 if ((ex.X_md
3035 & ~operand->flags
3036 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR
3037 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG
3038 | PPC_OPERAND_SPR | PPC_OPERAND_GQR)) != 0
3039 && !((ex.X_md & PPC_OPERAND_GPR) != 0
3040 && ex.X_add_number != 0
3041 && (operand->flags & PPC_OPERAND_GPR_0) != 0))
3042 as_warn (_("invalid register expression"));
3043 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3044 ppc_cpu, (char *) NULL, 0);
3045 }
3046 else if (ex.X_op == O_constant)
3047 {
3048#ifdef OBJ_ELF
3049 /* Allow @HA, @L, @H on constants. */
3050 bfd_reloc_code_real_type reloc;
3051 char *orig_str = str;
3052
3053 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3054 switch (reloc)
3055 {
3056 default:
3057 str = orig_str;
3058 break;
3059
3060 case BFD_RELOC_LO16:
3061 ex.X_add_number &= 0xffff;
3062 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3063 ex.X_add_number = SEX16 (ex.X_add_number);
3064 break;
3065
3066 case BFD_RELOC_HI16:
3067 if (REPORT_OVERFLOW_HI && ppc_obj64)
3068 {
3069 /* PowerPC64 @h is tested for overflow. */
3070 ex.X_add_number = (addressT) ex.X_add_number >> 16;
3071 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3072 {
3073 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3074 ex.X_add_number
3075 = ((addressT) ex.X_add_number ^ sign) - sign;
3076 }
3077 break;
3078 }
3079 /* Fallthru */
3080
3081 case BFD_RELOC_PPC64_ADDR16_HIGH:
3082 ex.X_add_number = PPC_HI (ex.X_add_number);
3083 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3084 ex.X_add_number = SEX16 (ex.X_add_number);
3085 break;
3086
3087 case BFD_RELOC_HI16_S:
3088 if (REPORT_OVERFLOW_HI && ppc_obj64)
3089 {
3090 /* PowerPC64 @ha is tested for overflow. */
3091 ex.X_add_number
3092 = ((addressT) ex.X_add_number + 0x8000) >> 16;
3093 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3094 {
3095 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3096 ex.X_add_number
3097 = ((addressT) ex.X_add_number ^ sign) - sign;
3098 }
3099 break;
3100 }
3101 /* Fallthru */
3102
3103 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3104 ex.X_add_number = PPC_HA (ex.X_add_number);
3105 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3106 ex.X_add_number = SEX16 (ex.X_add_number);
3107 break;
3108
3109 case BFD_RELOC_PPC64_HIGHER:
3110 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
3111 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3112 ex.X_add_number = SEX16 (ex.X_add_number);
3113 break;
3114
3115 case BFD_RELOC_PPC64_HIGHER_S:
3116 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
3117 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3118 ex.X_add_number = SEX16 (ex.X_add_number);
3119 break;
3120
3121 case BFD_RELOC_PPC64_HIGHEST:
3122 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
3123 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3124 ex.X_add_number = SEX16 (ex.X_add_number);
3125 break;
3126
3127 case BFD_RELOC_PPC64_HIGHEST_S:
3128 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3129 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3130 ex.X_add_number = SEX16 (ex.X_add_number);
3131 break;
3132 }
3133#endif /* OBJ_ELF */
3134 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3135 ppc_cpu, (char *) NULL, 0);
3136 }
3137 else
3138 {
3139 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3140#ifdef OBJ_ELF
3141 if (ex.X_op == O_symbol && str[0] == '(')
3142 {
3143 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3144 if (sym_name[0] == '.')
3145 ++sym_name;
3146
3147 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3148 {
3149 expressionS tls_exp;
3150
3151 hold = input_line_pointer;
3152 input_line_pointer = str + 1;
3153 expression (&tls_exp);
3154 if (tls_exp.X_op == O_symbol)
3155 {
3156 reloc = BFD_RELOC_NONE;
3157 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3158 {
3159 reloc = BFD_RELOC_PPC_TLSGD;
3160 input_line_pointer += 7;
3161 }
3162 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3163 {
3164 reloc = BFD_RELOC_PPC_TLSLD;
3165 input_line_pointer += 7;
3166 }
3167 if (reloc != BFD_RELOC_NONE)
3168 {
3169 SKIP_WHITESPACE ();
3170 str = input_line_pointer;
3171
3172 if (fc >= MAX_INSN_FIXUPS)
3173 as_fatal (_("too many fixups"));
3174 fixups[fc].exp = tls_exp;
3175 fixups[fc].opindex = *opindex_ptr;
3176 fixups[fc].reloc = reloc;
3177 ++fc;
3178 }
3179 }
3180 input_line_pointer = hold;
3181 }
3182 }
3183
3184 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3185 {
3186 /* Some TLS tweaks. */
3187 switch (reloc)
3188 {
3189 default:
3190 break;
3191
3192 case BFD_RELOC_PPC_TLS:
3193 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3194 as_bad (_("@tls may not be used with \"%s\" operands"),
3195 opcode->name);
3196 else if (operand->shift != 11)
3197 as_bad (_("@tls may only be used in last operand"));
3198 else
3199 insn = ppc_insert_operand (insn, operand,
3200 ppc_obj64 ? 13 : 2,
3201 ppc_cpu, (char *) NULL, 0);
3202 break;
3203
3204 /* We'll only use the 32 (or 64) bit form of these relocations
3205 in constants. Instructions get the 16 bit form. */
3206 case BFD_RELOC_PPC_DTPREL:
3207 reloc = BFD_RELOC_PPC_DTPREL16;
3208 break;
3209 case BFD_RELOC_PPC_TPREL:
3210 reloc = BFD_RELOC_PPC_TPREL16;
3211 break;
3212 }
3213
3214 /* addpcis. */
3215 if (opcode->opcode == (19 << 26) + (2 << 1)
3216 && reloc == BFD_RELOC_HI16_S)
3217 reloc = BFD_RELOC_PPC_16DX_HA;
3218
3219 /* If VLE-mode convert LO/HI/HA relocations. */
3220 if (opcode->flags & PPC_OPCODE_VLE)
3221 {
3222 uint64_t tmp_insn = insn & opcode->mask;
3223
3224 int use_a_reloc = (tmp_insn == E_OR2I_INSN
3225 || tmp_insn == E_AND2I_DOT_INSN
3226 || tmp_insn == E_OR2IS_INSN
3227 || tmp_insn == E_LIS_INSN
3228 || tmp_insn == E_AND2IS_DOT_INSN);
3229
3230
3231 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3232 || tmp_insn == E_ADD2IS_INSN
3233 || tmp_insn == E_CMP16I_INSN
3234 || tmp_insn == E_MULL2I_INSN
3235 || tmp_insn == E_CMPL16I_INSN
3236 || tmp_insn == E_CMPH16I_INSN
3237 || tmp_insn == E_CMPHL16I_INSN);
3238
3239 switch (reloc)
3240 {
3241 default:
3242 break;
3243
3244 case BFD_RELOC_PPC_EMB_SDA21:
3245 reloc = BFD_RELOC_PPC_VLE_SDA21;
3246 break;
3247
3248 case BFD_RELOC_LO16:
3249 if (use_d_reloc)
3250 reloc = BFD_RELOC_PPC_VLE_LO16D;
3251 else if (use_a_reloc)
3252 reloc = BFD_RELOC_PPC_VLE_LO16A;
3253 break;
3254
3255 case BFD_RELOC_HI16:
3256 if (use_d_reloc)
3257 reloc = BFD_RELOC_PPC_VLE_HI16D;
3258 else if (use_a_reloc)
3259 reloc = BFD_RELOC_PPC_VLE_HI16A;
3260 break;
3261
3262 case BFD_RELOC_HI16_S:
3263 if (use_d_reloc)
3264 reloc = BFD_RELOC_PPC_VLE_HA16D;
3265 else if (use_a_reloc)
3266 reloc = BFD_RELOC_PPC_VLE_HA16A;
3267 break;
3268
3269 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3270 if (use_d_reloc)
3271 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3272 break;
3273
3274 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3275 if (use_d_reloc)
3276 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3277 break;
3278
3279 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3280 if (use_d_reloc)
3281 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3282 break;
3283 }
3284 }
3285 }
3286#endif /* OBJ_ELF */
3287
3288 if (reloc != BFD_RELOC_NONE)
3289 ;
3290 /* Determine a BFD reloc value based on the operand information.
3291 We are only prepared to turn a few of the operands into
3292 relocs. */
3293 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3294 | PPC_OPERAND_ABSOLUTE)) != 0
3295 && operand->bitm == 0x3fffffc
3296 && operand->shift == 0)
3297 reloc = BFD_RELOC_PPC_B26;
3298 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3299 | PPC_OPERAND_ABSOLUTE)) != 0
3300 && operand->bitm == 0xfffc
3301 && operand->shift == 0)
3302 reloc = BFD_RELOC_PPC_B16;
3303 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3304 && operand->bitm == 0x1fe
3305 && operand->shift == -1)
3306 reloc = BFD_RELOC_PPC_VLE_REL8;
3307 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3308 && operand->bitm == 0xfffe
3309 && operand->shift == 0)
3310 reloc = BFD_RELOC_PPC_VLE_REL15;
3311 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3312 && operand->bitm == 0x1fffffe
3313 && operand->shift == 0)
3314 reloc = BFD_RELOC_PPC_VLE_REL24;
3315 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3316 && (operand->bitm & 0xfff0) == 0xfff0
3317 && operand->shift == 0)
3318 {
3319 reloc = BFD_RELOC_16;
3320#if defined OBJ_XCOFF || defined OBJ_ELF
3321 /* Note: the symbol may be not yet defined. */
3322 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3323 && ppc_is_toc_sym (ex.X_add_symbol))
3324 {
3325 reloc = BFD_RELOC_PPC_TOC16;
3326#ifdef OBJ_ELF
3327 as_warn (_("assuming %s on symbol"),
3328 ppc_obj64 ? "@toc" : "@xgot");
3329#endif
3330 }
3331#endif
3332 }
3333
3334 /* For the absolute forms of branches, convert the PC
3335 relative form back into the absolute. */
3336 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3337 {
3338 switch (reloc)
3339 {
3340 case BFD_RELOC_PPC_B26:
3341 reloc = BFD_RELOC_PPC_BA26;
3342 break;
3343 case BFD_RELOC_PPC_B16:
3344 reloc = BFD_RELOC_PPC_BA16;
3345 break;
3346#ifdef OBJ_ELF
3347 case BFD_RELOC_PPC_B16_BRTAKEN:
3348 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3349 break;
3350 case BFD_RELOC_PPC_B16_BRNTAKEN:
3351 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3352 break;
3353#endif
3354 default:
3355 break;
3356 }
3357 }
3358
3359#ifdef OBJ_ELF
3360 switch (reloc)
3361 {
3362 case BFD_RELOC_PPC_TOC16:
3363 toc_reloc_types |= has_small_toc_reloc;
3364 break;
3365 case BFD_RELOC_PPC64_TOC16_LO:
3366 case BFD_RELOC_PPC64_TOC16_HI:
3367 case BFD_RELOC_PPC64_TOC16_HA:
3368 toc_reloc_types |= has_large_toc_reloc;
3369 break;
3370 default:
3371 break;
3372 }
3373
3374 if (ppc_obj64
3375 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3376 {
3377 switch (reloc)
3378 {
3379 case BFD_RELOC_16:
3380 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3381 break;
3382 case BFD_RELOC_LO16:
3383 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3384 break;
3385 case BFD_RELOC_16_GOTOFF:
3386 reloc = BFD_RELOC_PPC64_GOT16_DS;
3387 break;
3388 case BFD_RELOC_LO16_GOTOFF:
3389 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3390 break;
3391 case BFD_RELOC_LO16_PLTOFF:
3392 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3393 break;
3394 case BFD_RELOC_16_BASEREL:
3395 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3396 break;
3397 case BFD_RELOC_LO16_BASEREL:
3398 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3399 break;
3400 case BFD_RELOC_PPC_TOC16:
3401 reloc = BFD_RELOC_PPC64_TOC16_DS;
3402 break;
3403 case BFD_RELOC_PPC64_TOC16_LO:
3404 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3405 break;
3406 case BFD_RELOC_PPC64_PLTGOT16:
3407 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3408 break;
3409 case BFD_RELOC_PPC64_PLTGOT16_LO:
3410 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3411 break;
3412 case BFD_RELOC_PPC_DTPREL16:
3413 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3414 break;
3415 case BFD_RELOC_PPC_DTPREL16_LO:
3416 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3417 break;
3418 case BFD_RELOC_PPC_TPREL16:
3419 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3420 break;
3421 case BFD_RELOC_PPC_TPREL16_LO:
3422 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3423 break;
3424 case BFD_RELOC_PPC_GOT_DTPREL16:
3425 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3426 case BFD_RELOC_PPC_GOT_TPREL16:
3427 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3428 break;
3429 default:
3430 as_bad (_("unsupported relocation for DS offset field"));
3431 break;
3432 }
3433 }
3434#endif
3435
3436 /* We need to generate a fixup for this expression. */
3437 if (fc >= MAX_INSN_FIXUPS)
3438 as_fatal (_("too many fixups"));
3439 fixups[fc].exp = ex;
3440 fixups[fc].opindex = *opindex_ptr;
3441 fixups[fc].reloc = reloc;
3442 ++fc;
3443 }
3444
3445 if (need_paren)
3446 {
3447 endc = ')';
3448 need_paren = 0;
3449 /* If expecting more operands, then we want to see "),". */
3450 if (*str == endc && opindex_ptr[1] != 0)
3451 {
3452 do
3453 ++str;
3454 while (ISSPACE (*str));
3455 endc = ',';
3456 }
3457 }
3458 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3459 {
3460 endc = '(';
3461 need_paren = 1;
3462 }
3463 else
3464 endc = ',';
3465
3466 /* The call to expression should have advanced str past any
3467 whitespace. */
3468 if (*str != endc
3469 && (endc != ',' || *str != '\0'))
3470 {
3471 if (*str == '\0')
3472 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3473 else
3474 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3475 break;
3476 }
3477
3478 if (*str != '\0')
3479 ++str;
3480 }
3481
3482 while (ISSPACE (*str))
3483 ++str;
3484
3485 if (*str != '\0')
3486 as_bad (_("junk at end of line: `%s'"), str);
3487
3488#ifdef OBJ_ELF
3489 /* Do we need/want an APUinfo section? */
3490 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3491 && !ppc_obj64)
3492 {
3493 /* These are all version "1". */
3494 if (opcode->flags & PPC_OPCODE_SPE)
3495 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3496 if (opcode->flags & PPC_OPCODE_ISEL)
3497 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3498 if (opcode->flags & PPC_OPCODE_EFS)
3499 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3500 if (opcode->flags & PPC_OPCODE_BRLOCK)
3501 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3502 if (opcode->flags & PPC_OPCODE_PMR)
3503 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3504 if (opcode->flags & PPC_OPCODE_CACHELCK)
3505 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3506 if (opcode->flags & PPC_OPCODE_RFMCI)
3507 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3508 /* Only set the VLE flag if the instruction has been pulled via
3509 the VLE instruction set. This way the flag is guaranteed to
3510 be set for VLE-only instructions or for VLE-only processors,
3511 however it'll remain clear for dual-mode instructions on
3512 dual-mode and, more importantly, standard-mode processors. */
3513 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3514 {
3515 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3516 if (elf_section_data (now_seg) != NULL)
3517 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE;
3518 }
3519 }
3520#endif
3521
3522 /* Write out the instruction. */
3523
3524 addr_mask = 3;
3525 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
3526 /* All instructions can start on a 2 byte boundary for VLE. */
3527 addr_mask = 1;
3528
3529 if (frag_now->insn_addr != addr_mask)
3530 {
3531 /* Don't emit instructions to a frag started for data, or for a
3532 CPU differing in VLE mode. Data is allowed to be misaligned,
3533 and it's possible to start a new frag in the middle of
3534 misaligned data. */
3535 frag_wane (frag_now);
3536 frag_new (0);
3537 }
3538
3539 /* Check that insns within the frag are aligned. ppc_frag_check
3540 will ensure that the frag start address is aligned. */
3541 if ((frag_now_fix () & addr_mask) != 0)
3542 as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1);
3543
3544 /* Differentiate between two and four byte insns. */
3545 insn_length = 4;
3546 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn))
3547 insn_length = 2;
3548
3549 f = frag_more (insn_length);
3550 frag_now->insn_addr = addr_mask;
3551 md_number_to_chars (f, insn, insn_length);
3552 last_insn = insn;
3553 last_seg = now_seg;
3554 last_subseg = now_subseg;
3555
3556#ifdef OBJ_ELF
3557 dwarf2_emit_insn (insn_length);
3558#endif
3559
3560 /* Create any fixups. */
3561 for (i = 0; i < fc; i++)
3562 {
3563 fixS *fixP;
3564 if (fixups[i].reloc != BFD_RELOC_NONE)
3565 {
3566 reloc_howto_type *reloc_howto;
3567 int size;
3568 int offset;
3569
3570 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3571 if (!reloc_howto)
3572 abort ();
3573
3574 size = bfd_get_reloc_size (reloc_howto);
3575 offset = target_big_endian ? (insn_length - size) : 0;
3576
3577 fixP = fix_new_exp (frag_now,
3578 f - frag_now->fr_literal + offset,
3579 size,
3580 &fixups[i].exp,
3581 reloc_howto->pc_relative,
3582 fixups[i].reloc);
3583 }
3584 else
3585 {
3586 const struct powerpc_operand *operand;
3587
3588 operand = &powerpc_operands[fixups[i].opindex];
3589 fixP = fix_new_exp (frag_now,
3590 f - frag_now->fr_literal,
3591 insn_length,
3592 &fixups[i].exp,
3593 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3594 BFD_RELOC_NONE);
3595 }
3596 fixP->fx_pcrel_adjust = fixups[i].opindex;
3597 }
3598}
3599
3600/* Handle a macro. Gather all the operands, transform them as
3601 described by the macro, and call md_assemble recursively. All the
3602 operands are separated by commas; we don't accept parentheses
3603 around operands here. */
3604
3605static void
3606ppc_macro (char *str, const struct powerpc_macro *macro)
3607{
3608 char *operands[10];
3609 unsigned int count;
3610 char *s;
3611 unsigned int len;
3612 const char *format;
3613 unsigned int arg;
3614 char *send;
3615 char *complete;
3616
3617 /* Gather the users operands into the operands array. */
3618 count = 0;
3619 s = str;
3620 while (1)
3621 {
3622 if (count >= sizeof operands / sizeof operands[0])
3623 break;
3624 operands[count++] = s;
3625 s = strchr (s, ',');
3626 if (s == (char *) NULL)
3627 break;
3628 *s++ = '\0';
3629 }
3630
3631 if (count != macro->operands)
3632 {
3633 as_bad (_("wrong number of operands"));
3634 return;
3635 }
3636
3637 /* Work out how large the string must be (the size is unbounded
3638 because it includes user input). */
3639 len = 0;
3640 format = macro->format;
3641 while (*format != '\0')
3642 {
3643 if (*format != '%')
3644 {
3645 ++len;
3646 ++format;
3647 }
3648 else
3649 {
3650 arg = strtol (format + 1, &send, 10);
3651 know (send != format && arg < count);
3652 len += strlen (operands[arg]);
3653 format = send;
3654 }
3655 }
3656
3657 /* Put the string together. */
3658 complete = s = XNEWVEC (char, len + 1);
3659 format = macro->format;
3660 while (*format != '\0')
3661 {
3662 if (*format != '%')
3663 *s++ = *format++;
3664 else
3665 {
3666 arg = strtol (format + 1, &send, 10);
3667 strcpy (s, operands[arg]);
3668 s += strlen (s);
3669 format = send;
3670 }
3671 }
3672 *s = '\0';
3673
3674 /* Assemble the constructed instruction. */
3675 md_assemble (complete);
3676 free (complete);
3677}
3678\f
3679#ifdef OBJ_ELF
3680/* For ELF, add support for SHT_ORDERED. */
3681
3682int
3683ppc_section_type (char *str, size_t len)
3684{
3685 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3686 return SHT_ORDERED;
3687
3688 return -1;
3689}
3690
3691int
3692ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3693{
3694 if (type == SHT_ORDERED)
3695 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3696
3697 return flags;
3698}
3699
3700bfd_vma
3701ppc_elf_section_letter (int letter, const char **ptrmsg)
3702{
3703 if (letter == 'v')
3704 return SHF_PPC_VLE;
3705
3706 *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3707 return -1;
3708}
3709#endif /* OBJ_ELF */
3710
3711\f
3712/* Pseudo-op handling. */
3713
3714/* The .byte pseudo-op. This is similar to the normal .byte
3715 pseudo-op, but it can also take a single ASCII string. */
3716
3717static void
3718ppc_byte (int ignore ATTRIBUTE_UNUSED)
3719{
3720 int count = 0;
3721
3722 if (*input_line_pointer != '\"')
3723 {
3724 cons (1);
3725 return;
3726 }
3727
3728 /* Gather characters. A real double quote is doubled. Unusual
3729 characters are not permitted. */
3730 ++input_line_pointer;
3731 while (1)
3732 {
3733 char c;
3734
3735 c = *input_line_pointer++;
3736
3737 if (c == '\"')
3738 {
3739 if (*input_line_pointer != '\"')
3740 break;
3741 ++input_line_pointer;
3742 }
3743
3744 FRAG_APPEND_1_CHAR (c);
3745 ++count;
3746 }
3747
3748 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3749 as_warn (_("data in executable section"));
3750 demand_empty_rest_of_line ();
3751}
3752\f
3753#ifdef OBJ_XCOFF
3754
3755/* XCOFF specific pseudo-op handling. */
3756
3757/* This is set if we are creating a .stabx symbol, since we don't want
3758 to handle symbol suffixes for such symbols. */
3759static bfd_boolean ppc_stab_symbol;
3760
3761/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3762 symbols in the .bss segment as though they were local common
3763 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3764 aligns .comm and .lcomm to 4 bytes. */
3765
3766static void
3767ppc_comm (int lcomm)
3768{
3769 asection *current_seg = now_seg;
3770 subsegT current_subseg = now_subseg;
3771 char *name;
3772 char endc;
3773 char *end_name;
3774 offsetT size;
3775 offsetT align;
3776 symbolS *lcomm_sym = NULL;
3777 symbolS *sym;
3778 char *pfrag;
3779
3780 endc = get_symbol_name (&name);
3781 end_name = input_line_pointer;
3782 (void) restore_line_pointer (endc);
3783
3784 if (*input_line_pointer != ',')
3785 {
3786 as_bad (_("missing size"));
3787 ignore_rest_of_line ();
3788 return;
3789 }
3790 ++input_line_pointer;
3791
3792 size = get_absolute_expression ();
3793 if (size < 0)
3794 {
3795 as_bad (_("negative size"));
3796 ignore_rest_of_line ();
3797 return;
3798 }
3799
3800 if (! lcomm)
3801 {
3802 /* The third argument to .comm is the alignment. */
3803 if (*input_line_pointer != ',')
3804 align = 2;
3805 else
3806 {
3807 ++input_line_pointer;
3808 align = get_absolute_expression ();
3809 if (align <= 0)
3810 {
3811 as_warn (_("ignoring bad alignment"));
3812 align = 2;
3813 }
3814 }
3815 }
3816 else
3817 {
3818 char *lcomm_name;
3819 char lcomm_endc;
3820
3821 /* The third argument to .lcomm appears to be the real local
3822 common symbol to create. References to the symbol named in
3823 the first argument are turned into references to the third
3824 argument. */
3825 if (*input_line_pointer != ',')
3826 {
3827 as_bad (_("missing real symbol name"));
3828 ignore_rest_of_line ();
3829 return;
3830 }
3831 ++input_line_pointer;
3832
3833 lcomm_endc = get_symbol_name (&lcomm_name);
3834
3835 lcomm_sym = symbol_find_or_make (lcomm_name);
3836
3837 (void) restore_line_pointer (lcomm_endc);
3838
3839 /* The fourth argument to .lcomm is the alignment. */
3840 if (*input_line_pointer != ',')
3841 {
3842 if (size <= 4)
3843 align = 2;
3844 else
3845 align = 3;
3846 }
3847 else
3848 {
3849 ++input_line_pointer;
3850 align = get_absolute_expression ();
3851 if (align <= 0)
3852 {
3853 as_warn (_("ignoring bad alignment"));
3854 align = 2;
3855 }
3856 }
3857 }
3858
3859 *end_name = '\0';
3860 sym = symbol_find_or_make (name);
3861 *end_name = endc;
3862
3863 if (S_IS_DEFINED (sym)
3864 || S_GET_VALUE (sym) != 0)
3865 {
3866 as_bad (_("attempt to redefine symbol"));
3867 ignore_rest_of_line ();
3868 return;
3869 }
3870
3871 record_alignment (bss_section, align);
3872
3873 if (! lcomm
3874 || ! S_IS_DEFINED (lcomm_sym))
3875 {
3876 symbolS *def_sym;
3877 offsetT def_size;
3878
3879 if (! lcomm)
3880 {
3881 def_sym = sym;
3882 def_size = size;
3883 S_SET_EXTERNAL (sym);
3884 }
3885 else
3886 {
3887 symbol_get_tc (lcomm_sym)->output = 1;
3888 def_sym = lcomm_sym;
3889 def_size = 0;
3890 }
3891
3892 subseg_set (bss_section, 1);
3893 frag_align (align, 0, 0);
3894
3895 symbol_set_frag (def_sym, frag_now);
3896 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3897 def_size, (char *) NULL);
3898 *pfrag = 0;
3899 S_SET_SEGMENT (def_sym, bss_section);
3900 symbol_get_tc (def_sym)->align = align;
3901 }
3902 else if (lcomm)
3903 {
3904 /* Align the size of lcomm_sym. */
3905 symbol_get_frag (lcomm_sym)->fr_offset =
3906 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3907 &~ ((1 << align) - 1));
3908 if (align > symbol_get_tc (lcomm_sym)->align)
3909 symbol_get_tc (lcomm_sym)->align = align;
3910 }
3911
3912 if (lcomm)
3913 {
3914 /* Make sym an offset from lcomm_sym. */
3915 S_SET_SEGMENT (sym, bss_section);
3916 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3917 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3918 symbol_get_frag (lcomm_sym)->fr_offset += size;
3919 }
3920
3921 subseg_set (current_seg, current_subseg);
3922
3923 demand_empty_rest_of_line ();
3924}
3925
3926/* The .csect pseudo-op. This switches us into a different
3927 subsegment. The first argument is a symbol whose value is the
3928 start of the .csect. In COFF, csect symbols get special aux
3929 entries defined by the x_csect field of union internal_auxent. The
3930 optional second argument is the alignment (the default is 2). */
3931
3932static void
3933ppc_csect (int ignore ATTRIBUTE_UNUSED)
3934{
3935 char *name;
3936 char endc;
3937 symbolS *sym;
3938 offsetT align;
3939
3940 endc = get_symbol_name (&name);
3941
3942 sym = symbol_find_or_make (name);
3943
3944 (void) restore_line_pointer (endc);
3945
3946 if (S_GET_NAME (sym)[0] == '\0')
3947 {
3948 /* An unnamed csect is assumed to be [PR]. */
3949 symbol_get_tc (sym)->symbol_class = XMC_PR;
3950 }
3951
3952 align = 2;
3953 if (*input_line_pointer == ',')
3954 {
3955 ++input_line_pointer;
3956 align = get_absolute_expression ();
3957 }
3958
3959 ppc_change_csect (sym, align);
3960
3961 demand_empty_rest_of_line ();
3962}
3963
3964/* Change to a different csect. */
3965
3966static void
3967ppc_change_csect (symbolS *sym, offsetT align)
3968{
3969 if (S_IS_DEFINED (sym))
3970 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3971 else
3972 {
3973 symbolS **list_ptr;
3974 int after_toc;
3975 int hold_chunksize;
3976 symbolS *list;
3977 int is_code;
3978 segT sec;
3979
3980 /* This is a new csect. We need to look at the symbol class to
3981 figure out whether it should go in the text section or the
3982 data section. */
3983 after_toc = 0;
3984 is_code = 0;
3985 switch (symbol_get_tc (sym)->symbol_class)
3986 {
3987 case XMC_PR:
3988 case XMC_RO:
3989 case XMC_DB:
3990 case XMC_GL:
3991 case XMC_XO:
3992 case XMC_SV:
3993 case XMC_TI:
3994 case XMC_TB:
3995 S_SET_SEGMENT (sym, text_section);
3996 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3997 ++ppc_text_subsegment;
3998 list_ptr = &ppc_text_csects;
3999 is_code = 1;
4000 break;
4001 case XMC_RW:
4002 case XMC_TC0:
4003 case XMC_TC:
4004 case XMC_DS:
4005 case XMC_UA:
4006 case XMC_BS:
4007 case XMC_UC:
4008 if (ppc_toc_csect != NULL
4009 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
4010 == ppc_data_subsegment))
4011 after_toc = 1;
4012 S_SET_SEGMENT (sym, data_section);
4013 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
4014 ++ppc_data_subsegment;
4015 list_ptr = &ppc_data_csects;
4016 break;
4017 default:
4018 abort ();
4019 }
4020
4021 /* We set the obstack chunk size to a small value before
4022 changing subsegments, so that we don't use a lot of memory
4023 space for what may be a small section. */
4024 hold_chunksize = chunksize;
4025 chunksize = 64;
4026
4027 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
4028 symbol_get_tc (sym)->subseg);
4029
4030 chunksize = hold_chunksize;
4031
4032 if (after_toc)
4033 ppc_after_toc_frag = frag_now;
4034
4035 record_alignment (sec, align);
4036 if (is_code)
4037 frag_align_code (align, 0);
4038 else
4039 frag_align (align, 0, 0);
4040
4041 symbol_set_frag (sym, frag_now);
4042 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4043
4044 symbol_get_tc (sym)->align = align;
4045 symbol_get_tc (sym)->output = 1;
4046 symbol_get_tc (sym)->within = sym;
4047
4048 for (list = *list_ptr;
4049 symbol_get_tc (list)->next != (symbolS *) NULL;
4050 list = symbol_get_tc (list)->next)
4051 ;
4052 symbol_get_tc (list)->next = sym;
4053
4054 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4055 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4056 &symbol_lastP);
4057 }
4058
4059 ppc_current_csect = sym;
4060}
4061
4062static void
4063ppc_change_debug_section (unsigned int idx, subsegT subseg)
4064{
4065 segT sec;
4066 flagword oldflags;
4067 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
4068
4069 sec = subseg_new (dw->name, subseg);
4070 oldflags = bfd_get_section_flags (stdoutput, sec);
4071 if (oldflags == SEC_NO_FLAGS)
4072 {
4073 /* Just created section. */
4074 gas_assert (dw_sections[idx].sect == NULL);
4075
4076 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
4077 bfd_set_section_alignment (stdoutput, sec, 0);
4078 dw_sections[idx].sect = sec;
4079 }
4080
4081 /* Not anymore in a csect. */
4082 ppc_current_csect = NULL;
4083}
4084
4085/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4086 .dwsect flag [, opt-label ]
4087*/
4088
4089static void
4090ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
4091{
4092 offsetT flag;
4093 symbolS *opt_label;
4094 const struct xcoff_dwsect_name *dw;
4095 struct dw_subsection *subseg;
4096 struct dw_section *dws;
4097 int i;
4098
4099 /* Find section. */
4100 flag = get_absolute_expression ();
4101 dw = NULL;
4102 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4103 if (xcoff_dwsect_names[i].flag == flag)
4104 {
4105 dw = &xcoff_dwsect_names[i];
4106 break;
4107 }
4108
4109 /* Parse opt-label. */
4110 if (*input_line_pointer == ',')
4111 {
4112 char *label;
4113 char c;
4114
4115 ++input_line_pointer;
4116
4117 c = get_symbol_name (&label);
4118 opt_label = symbol_find_or_make (label);
4119 (void) restore_line_pointer (c);
4120 }
4121 else
4122 opt_label = NULL;
4123
4124 demand_empty_rest_of_line ();
4125
4126 /* Return now in case of unknown subsection. */
4127 if (dw == NULL)
4128 {
4129 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4130 (unsigned)flag);
4131 return;
4132 }
4133
4134 /* Find the subsection. */
4135 dws = &dw_sections[i];
4136 subseg = NULL;
4137 if (opt_label != NULL && S_IS_DEFINED (opt_label))
4138 {
4139 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4140 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
4141 {
4142 as_bad (_("label %s was not defined in this dwarf section"),
4143 S_GET_NAME (opt_label));
4144 subseg = dws->anon_subseg;
4145 opt_label = NULL;
4146 }
4147 else
4148 subseg = symbol_get_tc (opt_label)->u.dw;
4149 }
4150
4151 if (subseg != NULL)
4152 {
4153 /* Switch to the subsection. */
4154 ppc_change_debug_section (i, subseg->subseg);
4155 }
4156 else
4157 {
4158 /* Create a new dw subsection. */
4159 subseg = XNEW (struct dw_subsection);
4160
4161 if (opt_label == NULL)
4162 {
4163 /* The anonymous one. */
4164 subseg->subseg = 0;
4165 subseg->link = NULL;
4166 dws->anon_subseg = subseg;
4167 }
4168 else
4169 {
4170 /* A named one. */
4171 if (dws->list_subseg != NULL)
4172 subseg->subseg = dws->list_subseg->subseg + 1;
4173 else
4174 subseg->subseg = 1;
4175
4176 subseg->link = dws->list_subseg;
4177 dws->list_subseg = subseg;
4178 symbol_get_tc (opt_label)->u.dw = subseg;
4179 }
4180
4181 ppc_change_debug_section (i, subseg->subseg);
4182
4183 if (dw->def_size)
4184 {
4185 /* Add the length field. */
4186 expressionS *exp = &subseg->end_exp;
4187 int sz;
4188
4189 if (opt_label != NULL)
4190 symbol_set_value_now (opt_label);
4191
4192 /* Add the length field. Note that according to the AIX assembler
4193 manual, the size of the length field is 4 for powerpc32 but
4194 12 for powerpc64. */
4195 if (ppc_obj64)
4196 {
4197 /* Write the 64bit marker. */
4198 md_number_to_chars (frag_more (4), -1, 4);
4199 }
4200
4201 exp->X_op = O_subtract;
4202 exp->X_op_symbol = symbol_temp_new_now ();
4203 exp->X_add_symbol = symbol_temp_make ();
4204
4205 sz = ppc_obj64 ? 8 : 4;
4206 exp->X_add_number = -sz;
4207 emit_expr (exp, sz);
4208 }
4209 }
4210}
4211
4212/* This function handles the .text and .data pseudo-ops. These
4213 pseudo-ops aren't really used by XCOFF; we implement them for the
4214 convenience of people who aren't used to XCOFF. */
4215
4216static void
4217ppc_section (int type)
4218{
4219 const char *name;
4220 symbolS *sym;
4221
4222 if (type == 't')
4223 name = ".text[PR]";
4224 else if (type == 'd')
4225 name = ".data[RW]";
4226 else
4227 abort ();
4228
4229 sym = symbol_find_or_make (name);
4230
4231 ppc_change_csect (sym, 2);
4232
4233 demand_empty_rest_of_line ();
4234}
4235
4236/* This function handles the .section pseudo-op. This is mostly to
4237 give an error, since XCOFF only supports .text, .data and .bss, but
4238 we do permit the user to name the text or data section. */
4239
4240static void
4241ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4242{
4243 char *user_name;
4244 const char *real_name;
4245 char c;
4246 symbolS *sym;
4247
4248 c = get_symbol_name (&user_name);
4249
4250 if (strcmp (user_name, ".text") == 0)
4251 real_name = ".text[PR]";
4252 else if (strcmp (user_name, ".data") == 0)
4253 real_name = ".data[RW]";
4254 else
4255 {
4256 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4257 (void) restore_line_pointer (c);
4258 ignore_rest_of_line ();
4259 return;
4260 }
4261
4262 (void) restore_line_pointer (c);
4263
4264 sym = symbol_find_or_make (real_name);
4265
4266 ppc_change_csect (sym, 2);
4267
4268 demand_empty_rest_of_line ();
4269}
4270
4271/* The .extern pseudo-op. We create an undefined symbol. */
4272
4273static void
4274ppc_extern (int ignore ATTRIBUTE_UNUSED)
4275{
4276 char *name;
4277 char endc;
4278
4279 endc = get_symbol_name (&name);
4280
4281 (void) symbol_find_or_make (name);
4282
4283 (void) restore_line_pointer (endc);
4284
4285 demand_empty_rest_of_line ();
4286}
4287
4288/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4289
4290static void
4291ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4292{
4293 char *name;
4294 char endc;
4295 symbolS *sym;
4296
4297 endc = get_symbol_name (&name);
4298
4299 sym = symbol_find_or_make (name);
4300
4301 (void) restore_line_pointer (endc);
4302
4303 symbol_get_tc (sym)->output = 1;
4304
4305 demand_empty_rest_of_line ();
4306}
4307
4308/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4309 relocations at the beginning of the current csect.
4310
4311 (In principle, there's no reason why the relocations _have_ to be at
4312 the beginning. Anywhere in the csect would do. However, inserting
4313 at the beginning is what the native assembler does, and it helps to
4314 deal with cases where the .ref statements follow the section contents.)
4315
4316 ??? .refs don't work for empty .csects. However, the native assembler
4317 doesn't report an error in this case, and neither yet do we. */
4318
4319static void
4320ppc_ref (int ignore ATTRIBUTE_UNUSED)
4321{
4322 char *name;
4323 char c;
4324
4325 if (ppc_current_csect == NULL)
4326 {
4327 as_bad (_(".ref outside .csect"));
4328 ignore_rest_of_line ();
4329 return;
4330 }
4331
4332 do
4333 {
4334 c = get_symbol_name (&name);
4335
4336 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4337 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4338
4339 *input_line_pointer = c;
4340 SKIP_WHITESPACE_AFTER_NAME ();
4341 c = *input_line_pointer;
4342 if (c == ',')
4343 {
4344 input_line_pointer++;
4345 SKIP_WHITESPACE ();
4346 if (is_end_of_line[(unsigned char) *input_line_pointer])
4347 {
4348 as_bad (_("missing symbol name"));
4349 ignore_rest_of_line ();
4350 return;
4351 }
4352 }
4353 }
4354 while (c == ',');
4355
4356 demand_empty_rest_of_line ();
4357}
4358
4359/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4360 although I don't know why it bothers. */
4361
4362static void
4363ppc_rename (int ignore ATTRIBUTE_UNUSED)
4364{
4365 char *name;
4366 char endc;
4367 symbolS *sym;
4368 int len;
4369
4370 endc = get_symbol_name (&name);
4371
4372 sym = symbol_find_or_make (name);
4373
4374 (void) restore_line_pointer (endc);
4375
4376 if (*input_line_pointer != ',')
4377 {
4378 as_bad (_("missing rename string"));
4379 ignore_rest_of_line ();
4380 return;
4381 }
4382 ++input_line_pointer;
4383
4384 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4385
4386 demand_empty_rest_of_line ();
4387}
4388
4389/* The .stabx pseudo-op. This is similar to a normal .stabs
4390 pseudo-op, but slightly different. A sample is
4391 .stabx "main:F-1",.main,142,0
4392 The first argument is the symbol name to create. The second is the
4393 value, and the third is the storage class. The fourth seems to be
4394 always zero, and I am assuming it is the type. */
4395
4396static void
4397ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4398{
4399 char *name;
4400 int len;
4401 symbolS *sym;
4402 expressionS exp;
4403
4404 name = demand_copy_C_string (&len);
4405
4406 if (*input_line_pointer != ',')
4407 {
4408 as_bad (_("missing value"));
4409 return;
4410 }
4411 ++input_line_pointer;
4412
4413 ppc_stab_symbol = TRUE;
4414 sym = symbol_make (name);
4415 ppc_stab_symbol = FALSE;
4416
4417 symbol_get_tc (sym)->real_name = name;
4418
4419 (void) expression (&exp);
4420
4421 switch (exp.X_op)
4422 {
4423 case O_illegal:
4424 case O_absent:
4425 case O_big:
4426 as_bad (_("illegal .stabx expression; zero assumed"));
4427 exp.X_add_number = 0;
4428 /* Fall through. */
4429 case O_constant:
4430 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4431 symbol_set_frag (sym, &zero_address_frag);
4432 break;
4433
4434 case O_symbol:
4435 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4436 symbol_set_value_expression (sym, &exp);
4437 else
4438 {
4439 S_SET_VALUE (sym,
4440 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4441 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4442 }
4443 break;
4444
4445 default:
4446 /* The value is some complex expression. This will probably
4447 fail at some later point, but this is probably the right
4448 thing to do here. */
4449 symbol_set_value_expression (sym, &exp);
4450 break;
4451 }
4452
4453 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4454 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4455
4456 if (*input_line_pointer != ',')
4457 {
4458 as_bad (_("missing class"));
4459 return;
4460 }
4461 ++input_line_pointer;
4462
4463 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4464
4465 if (*input_line_pointer != ',')
4466 {
4467 as_bad (_("missing type"));
4468 return;
4469 }
4470 ++input_line_pointer;
4471
4472 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4473
4474 symbol_get_tc (sym)->output = 1;
4475
4476 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4477 {
4478 /* In this case :
4479
4480 .bs name
4481 .stabx "z",arrays_,133,0
4482 .es
4483
4484 .comm arrays_,13768,3
4485
4486 resolve_symbol_value will copy the exp's "within" into sym's when the
4487 offset is 0. Since this seems to be corner case problem,
4488 only do the correction for storage class C_STSYM. A better solution
4489 would be to have the tc field updated in ppc_symbol_new_hook. */
4490
4491 if (exp.X_op == O_symbol)
4492 {
4493 if (ppc_current_block == NULL)
4494 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4495
4496 symbol_get_tc (sym)->within = ppc_current_block;
4497 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4498 }
4499 }
4500
4501 if (exp.X_op != O_symbol
4502 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4503 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4504 ppc_frob_label (sym);
4505 else
4506 {
4507 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4508 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4509 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4510 symbol_get_tc (ppc_current_csect)->within = sym;
4511 }
4512
4513 demand_empty_rest_of_line ();
4514}
4515
4516/* The .function pseudo-op. This takes several arguments. The first
4517 argument seems to be the external name of the symbol. The second
4518 argument seems to be the label for the start of the function. gcc
4519 uses the same name for both. I have no idea what the third and
4520 fourth arguments are meant to be. The optional fifth argument is
4521 an expression for the size of the function. In COFF this symbol
4522 gets an aux entry like that used for a csect. */
4523
4524static void
4525ppc_function (int ignore ATTRIBUTE_UNUSED)
4526{
4527 char *name;
4528 char endc;
4529 char *s;
4530 symbolS *ext_sym;
4531 symbolS *lab_sym;
4532
4533 endc = get_symbol_name (&name);
4534
4535 /* Ignore any [PR] suffix. */
4536 name = ppc_canonicalize_symbol_name (name);
4537 s = strchr (name, '[');
4538 if (s != (char *) NULL
4539 && strcmp (s + 1, "PR]") == 0)
4540 *s = '\0';
4541
4542 ext_sym = symbol_find_or_make (name);
4543
4544 (void) restore_line_pointer (endc);
4545
4546 if (*input_line_pointer != ',')
4547 {
4548 as_bad (_("missing symbol name"));
4549 ignore_rest_of_line ();
4550 return;
4551 }
4552 ++input_line_pointer;
4553
4554 endc = get_symbol_name (&name);
4555
4556 lab_sym = symbol_find_or_make (name);
4557
4558 (void) restore_line_pointer (endc);
4559
4560 if (ext_sym != lab_sym)
4561 {
4562 expressionS exp;
4563
4564 exp.X_op = O_symbol;
4565 exp.X_add_symbol = lab_sym;
4566 exp.X_op_symbol = NULL;
4567 exp.X_add_number = 0;
4568 exp.X_unsigned = 0;
4569 symbol_set_value_expression (ext_sym, &exp);
4570 }
4571
4572 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4573 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4574 symbol_get_tc (ext_sym)->output = 1;
4575
4576 if (*input_line_pointer == ',')
4577 {
4578 expressionS exp;
4579
4580 /* Ignore the third argument. */
4581 ++input_line_pointer;
4582 expression (& exp);
4583 if (*input_line_pointer == ',')
4584 {
4585 /* Ignore the fourth argument. */
4586 ++input_line_pointer;
4587 expression (& exp);
4588 if (*input_line_pointer == ',')
4589 {
4590 /* The fifth argument is the function size. */
4591 ++input_line_pointer;
4592 symbol_get_tc (ext_sym)->u.size = symbol_new
4593 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4594 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4595 }
4596 }
4597 }
4598
4599 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4600 SF_SET_FUNCTION (ext_sym);
4601 SF_SET_PROCESS (ext_sym);
4602 coff_add_linesym (ext_sym);
4603
4604 demand_empty_rest_of_line ();
4605}
4606
4607/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4608 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4609 with the correct line number */
4610
4611static symbolS *saved_bi_sym = 0;
4612
4613static void
4614ppc_bf (int ignore ATTRIBUTE_UNUSED)
4615{
4616 symbolS *sym;
4617
4618 sym = symbol_make (".bf");
4619 S_SET_SEGMENT (sym, text_section);
4620 symbol_set_frag (sym, frag_now);
4621 S_SET_VALUE (sym, frag_now_fix ());
4622 S_SET_STORAGE_CLASS (sym, C_FCN);
4623
4624 coff_line_base = get_absolute_expression ();
4625
4626 S_SET_NUMBER_AUXILIARY (sym, 1);
4627 SA_SET_SYM_LNNO (sym, coff_line_base);
4628
4629 /* Line number for bi. */
4630 if (saved_bi_sym)
4631 {
4632 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4633 saved_bi_sym = 0;
4634 }
4635
4636
4637 symbol_get_tc (sym)->output = 1;
4638
4639 ppc_frob_label (sym);
4640
4641 demand_empty_rest_of_line ();
4642}
4643
4644/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4645 ".ef", except that the line number is absolute, not relative to the
4646 most recent ".bf" symbol. */
4647
4648static void
4649ppc_ef (int ignore ATTRIBUTE_UNUSED)
4650{
4651 symbolS *sym;
4652
4653 sym = symbol_make (".ef");
4654 S_SET_SEGMENT (sym, text_section);
4655 symbol_set_frag (sym, frag_now);
4656 S_SET_VALUE (sym, frag_now_fix ());
4657 S_SET_STORAGE_CLASS (sym, C_FCN);
4658 S_SET_NUMBER_AUXILIARY (sym, 1);
4659 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4660 symbol_get_tc (sym)->output = 1;
4661
4662 ppc_frob_label (sym);
4663
4664 demand_empty_rest_of_line ();
4665}
4666
4667/* The .bi and .ei pseudo-ops. These take a string argument and
4668 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4669 the symbol list. The value of .bi will be know when the next .bf
4670 is encountered. */
4671
4672static void
4673ppc_biei (int ei)
4674{
4675 static symbolS *last_biei;
4676
4677 char *name;
4678 int len;
4679 symbolS *sym;
4680 symbolS *look;
4681
4682 name = demand_copy_C_string (&len);
4683
4684 /* The value of these symbols is actually file offset. Here we set
4685 the value to the index into the line number entries. In
4686 ppc_frob_symbols we set the fix_line field, which will cause BFD
4687 to do the right thing. */
4688
4689 sym = symbol_make (name);
4690 /* obj-coff.c currently only handles line numbers correctly in the
4691 .text section. */
4692 S_SET_SEGMENT (sym, text_section);
4693 S_SET_VALUE (sym, coff_n_line_nos);
4694 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4695
4696 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4697 symbol_get_tc (sym)->output = 1;
4698
4699 /* Save bi. */
4700 if (ei)
4701 saved_bi_sym = 0;
4702 else
4703 saved_bi_sym = sym;
4704
4705 for (look = last_biei ? last_biei : symbol_rootP;
4706 (look != (symbolS *) NULL
4707 && (S_GET_STORAGE_CLASS (look) == C_FILE
4708 || S_GET_STORAGE_CLASS (look) == C_BINCL
4709 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4710 look = symbol_next (look))
4711 ;
4712 if (look != (symbolS *) NULL)
4713 {
4714 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4715 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4716 last_biei = sym;
4717 }
4718
4719 demand_empty_rest_of_line ();
4720}
4721
4722/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4723 There is one argument, which is a csect symbol. The value of the
4724 .bs symbol is the index of this csect symbol. */
4725
4726static void
4727ppc_bs (int ignore ATTRIBUTE_UNUSED)
4728{
4729 char *name;
4730 char endc;
4731 symbolS *csect;
4732 symbolS *sym;
4733
4734 if (ppc_current_block != NULL)
4735 as_bad (_("nested .bs blocks"));
4736
4737 endc = get_symbol_name (&name);
4738
4739 csect = symbol_find_or_make (name);
4740
4741 (void) restore_line_pointer (endc);
4742
4743 sym = symbol_make (".bs");
4744 S_SET_SEGMENT (sym, now_seg);
4745 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4746 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4747 symbol_get_tc (sym)->output = 1;
4748
4749 symbol_get_tc (sym)->within = csect;
4750
4751 ppc_frob_label (sym);
4752
4753 ppc_current_block = sym;
4754
4755 demand_empty_rest_of_line ();
4756}
4757
4758/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4759
4760static void
4761ppc_es (int ignore ATTRIBUTE_UNUSED)
4762{
4763 symbolS *sym;
4764
4765 if (ppc_current_block == NULL)
4766 as_bad (_(".es without preceding .bs"));
4767
4768 sym = symbol_make (".es");
4769 S_SET_SEGMENT (sym, now_seg);
4770 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4771 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4772 symbol_get_tc (sym)->output = 1;
4773
4774 ppc_frob_label (sym);
4775
4776 ppc_current_block = NULL;
4777
4778 demand_empty_rest_of_line ();
4779}
4780
4781/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4782 line number. */
4783
4784static void
4785ppc_bb (int ignore ATTRIBUTE_UNUSED)
4786{
4787 symbolS *sym;
4788
4789 sym = symbol_make (".bb");
4790 S_SET_SEGMENT (sym, text_section);
4791 symbol_set_frag (sym, frag_now);
4792 S_SET_VALUE (sym, frag_now_fix ());
4793 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4794
4795 S_SET_NUMBER_AUXILIARY (sym, 1);
4796 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4797
4798 symbol_get_tc (sym)->output = 1;
4799
4800 SF_SET_PROCESS (sym);
4801
4802 ppc_frob_label (sym);
4803
4804 demand_empty_rest_of_line ();
4805}
4806
4807/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4808 line number. */
4809
4810static void
4811ppc_eb (int ignore ATTRIBUTE_UNUSED)
4812{
4813 symbolS *sym;
4814
4815 sym = symbol_make (".eb");
4816 S_SET_SEGMENT (sym, text_section);
4817 symbol_set_frag (sym, frag_now);
4818 S_SET_VALUE (sym, frag_now_fix ());
4819 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4820 S_SET_NUMBER_AUXILIARY (sym, 1);
4821 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4822 symbol_get_tc (sym)->output = 1;
4823
4824 SF_SET_PROCESS (sym);
4825
4826 ppc_frob_label (sym);
4827
4828 demand_empty_rest_of_line ();
4829}
4830
4831/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4832 specified name. */
4833
4834static void
4835ppc_bc (int ignore ATTRIBUTE_UNUSED)
4836{
4837 char *name;
4838 int len;
4839 symbolS *sym;
4840
4841 name = demand_copy_C_string (&len);
4842 sym = symbol_make (name);
4843 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4844 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4845 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4846 S_SET_VALUE (sym, 0);
4847 symbol_get_tc (sym)->output = 1;
4848
4849 ppc_frob_label (sym);
4850
4851 demand_empty_rest_of_line ();
4852}
4853
4854/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4855
4856static void
4857ppc_ec (int ignore ATTRIBUTE_UNUSED)
4858{
4859 symbolS *sym;
4860
4861 sym = symbol_make (".ec");
4862 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4863 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4864 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4865 S_SET_VALUE (sym, 0);
4866 symbol_get_tc (sym)->output = 1;
4867
4868 ppc_frob_label (sym);
4869
4870 demand_empty_rest_of_line ();
4871}
4872
4873/* The .toc pseudo-op. Switch to the .toc subsegment. */
4874
4875static void
4876ppc_toc (int ignore ATTRIBUTE_UNUSED)
4877{
4878 if (ppc_toc_csect != (symbolS *) NULL)
4879 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4880 else
4881 {
4882 subsegT subseg;
4883 symbolS *sym;
4884 symbolS *list;
4885
4886 subseg = ppc_data_subsegment;
4887 ++ppc_data_subsegment;
4888
4889 subseg_new (segment_name (data_section), subseg);
4890 ppc_toc_frag = frag_now;
4891
4892 sym = symbol_find_or_make ("TOC[TC0]");
4893 symbol_set_frag (sym, frag_now);
4894 S_SET_SEGMENT (sym, data_section);
4895 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4896 symbol_get_tc (sym)->subseg = subseg;
4897 symbol_get_tc (sym)->output = 1;
4898 symbol_get_tc (sym)->within = sym;
4899
4900 ppc_toc_csect = sym;
4901
4902 for (list = ppc_data_csects;
4903 symbol_get_tc (list)->next != (symbolS *) NULL;
4904 list = symbol_get_tc (list)->next)
4905 ;
4906 symbol_get_tc (list)->next = sym;
4907
4908 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4909 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4910 &symbol_lastP);
4911 }
4912
4913 ppc_current_csect = ppc_toc_csect;
4914
4915 demand_empty_rest_of_line ();
4916}
4917
4918/* The AIX assembler automatically aligns the operands of a .long or
4919 .short pseudo-op, and we want to be compatible. */
4920
4921static void
4922ppc_xcoff_cons (int log_size)
4923{
4924 frag_align (log_size, 0, 0);
4925 record_alignment (now_seg, log_size);
4926 cons (1 << log_size);
4927}
4928
4929static void
4930ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4931{
4932 expressionS exp;
4933 int byte_count;
4934
4935 (void) expression (&exp);
4936
4937 if (exp.X_op != O_constant)
4938 {
4939 as_bad (_("non-constant byte count"));
4940 return;
4941 }
4942
4943 byte_count = exp.X_add_number;
4944
4945 if (*input_line_pointer != ',')
4946 {
4947 as_bad (_("missing value"));
4948 return;
4949 }
4950
4951 ++input_line_pointer;
4952 cons (byte_count);
4953}
4954
4955void
4956ppc_xcoff_end (void)
4957{
4958 int i;
4959
4960 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4961 {
4962 struct dw_section *dws = &dw_sections[i];
4963 struct dw_subsection *dwss;
4964
4965 if (dws->anon_subseg)
4966 {
4967 dwss = dws->anon_subseg;
4968 dwss->link = dws->list_subseg;
4969 }
4970 else
4971 dwss = dws->list_subseg;
4972
4973 for (; dwss != NULL; dwss = dwss->link)
4974 if (dwss->end_exp.X_add_symbol != NULL)
4975 {
4976 subseg_set (dws->sect, dwss->subseg);
4977 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4978 }
4979 }
4980}
4981
4982#endif /* OBJ_XCOFF */
4983#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4984\f
4985/* The .tc pseudo-op. This is used when generating either XCOFF or
4986 ELF. This takes two or more arguments.
4987
4988 When generating XCOFF output, the first argument is the name to
4989 give to this location in the toc; this will be a symbol with class
4990 TC. The rest of the arguments are N-byte values to actually put at
4991 this location in the TOC; often there is just one more argument, a
4992 relocatable symbol reference. The size of the value to store
4993 depends on target word size. A 32-bit target uses 4-byte values, a
4994 64-bit target uses 8-byte values.
4995
4996 When not generating XCOFF output, the arguments are the same, but
4997 the first argument is simply ignored. */
4998
4999static void
5000ppc_tc (int ignore ATTRIBUTE_UNUSED)
5001{
5002#ifdef OBJ_XCOFF
5003
5004 /* Define the TOC symbol name. */
5005 {
5006 char *name;
5007 char endc;
5008 symbolS *sym;
5009
5010 if (ppc_toc_csect == (symbolS *) NULL
5011 || ppc_toc_csect != ppc_current_csect)
5012 {
5013 as_bad (_(".tc not in .toc section"));
5014 ignore_rest_of_line ();
5015 return;
5016 }
5017
5018 endc = get_symbol_name (&name);
5019
5020 sym = symbol_find_or_make (name);
5021
5022 (void) restore_line_pointer (endc);
5023
5024 if (S_IS_DEFINED (sym))
5025 {
5026 symbolS *label;
5027
5028 label = symbol_get_tc (ppc_current_csect)->within;
5029 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
5030 {
5031 as_bad (_(".tc with no label"));
5032 ignore_rest_of_line ();
5033 return;
5034 }
5035
5036 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
5037 symbol_set_frag (label, symbol_get_frag (sym));
5038 S_SET_VALUE (label, S_GET_VALUE (sym));
5039
5040 while (! is_end_of_line[(unsigned char) *input_line_pointer])
5041 ++input_line_pointer;
5042
5043 return;
5044 }
5045
5046 S_SET_SEGMENT (sym, now_seg);
5047 symbol_set_frag (sym, frag_now);
5048 S_SET_VALUE (sym, (valueT) frag_now_fix ());
5049 symbol_get_tc (sym)->symbol_class = XMC_TC;
5050 symbol_get_tc (sym)->output = 1;
5051
5052 ppc_frob_label (sym);
5053 }
5054
5055#endif /* OBJ_XCOFF */
5056#ifdef OBJ_ELF
5057 int align;
5058
5059 /* Skip the TOC symbol name. */
5060 while (is_part_of_name (*input_line_pointer)
5061 || *input_line_pointer == ' '
5062 || *input_line_pointer == '['
5063 || *input_line_pointer == ']'
5064 || *input_line_pointer == '{'
5065 || *input_line_pointer == '}')
5066 ++input_line_pointer;
5067
5068 /* Align to a four/eight byte boundary. */
5069 align = ppc_obj64 ? 3 : 2;
5070 frag_align (align, 0, 0);
5071 record_alignment (now_seg, align);
5072#endif /* OBJ_ELF */
5073
5074 if (*input_line_pointer != ',')
5075 demand_empty_rest_of_line ();
5076 else
5077 {
5078 ++input_line_pointer;
5079 cons (ppc_obj64 ? 8 : 4);
5080 }
5081}
5082
5083/* Pseudo-op .machine. */
5084
5085static void
5086ppc_machine (int ignore ATTRIBUTE_UNUSED)
5087{
5088 char c;
5089 char *cpu_string;
5090#define MAX_HISTORY 100
5091 static ppc_cpu_t *cpu_history;
5092 static int curr_hist;
5093
5094 SKIP_WHITESPACE ();
5095
5096 c = get_symbol_name (&cpu_string);
5097 cpu_string = xstrdup (cpu_string);
5098 (void) restore_line_pointer (c);
5099
5100 if (cpu_string != NULL)
5101 {
5102 ppc_cpu_t old_cpu = ppc_cpu;
5103 ppc_cpu_t new_cpu;
5104 char *p;
5105
5106 for (p = cpu_string; *p != 0; p++)
5107 *p = TOLOWER (*p);
5108
5109 if (strcmp (cpu_string, "push") == 0)
5110 {
5111 if (cpu_history == NULL)
5112 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
5113
5114 if (curr_hist >= MAX_HISTORY)
5115 as_bad (_(".machine stack overflow"));
5116 else
5117 cpu_history[curr_hist++] = ppc_cpu;
5118 }
5119 else if (strcmp (cpu_string, "pop") == 0)
5120 {
5121 if (curr_hist <= 0)
5122 as_bad (_(".machine stack underflow"));
5123 else
5124 ppc_cpu = cpu_history[--curr_hist];
5125 }
5126 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
5127 ppc_cpu = new_cpu;
5128 else
5129 as_bad (_("invalid machine `%s'"), cpu_string);
5130
5131 if (ppc_cpu != old_cpu)
5132 ppc_setup_opcodes ();
5133 }
5134
5135 demand_empty_rest_of_line ();
5136}
5137#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5138\f
5139#ifdef TE_PE
5140
5141/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5142
5143/* Set the current section. */
5144static void
5145ppc_set_current_section (segT new)
5146{
5147 ppc_previous_section = ppc_current_section;
5148 ppc_current_section = new;
5149}
5150
5151/* pseudo-op: .previous
5152 behaviour: toggles the current section with the previous section.
5153 errors: None
5154 warnings: "No previous section" */
5155
5156static void
5157ppc_previous (int ignore ATTRIBUTE_UNUSED)
5158{
5159 if (ppc_previous_section == NULL)
5160 {
5161 as_warn (_("no previous section to return to, ignored."));
5162 return;
5163 }
5164
5165 subseg_set (ppc_previous_section, 0);
5166
5167 ppc_set_current_section (ppc_previous_section);
5168}
5169
5170/* pseudo-op: .pdata
5171 behaviour: predefined read only data section
5172 double word aligned
5173 errors: None
5174 warnings: None
5175 initial: .section .pdata "adr3"
5176 a - don't know -- maybe a misprint
5177 d - initialized data
5178 r - readable
5179 3 - double word aligned (that would be 4 byte boundary)
5180
5181 commentary:
5182 Tag index tables (also known as the function table) for exception
5183 handling, debugging, etc. */
5184
5185static void
5186ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5187{
5188 if (pdata_section == 0)
5189 {
5190 pdata_section = subseg_new (".pdata", 0);
5191
5192 bfd_set_section_flags (stdoutput, pdata_section,
5193 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5194 | SEC_READONLY | SEC_DATA ));
5195
5196 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5197 }
5198 else
5199 {
5200 pdata_section = subseg_new (".pdata", 0);
5201 }
5202 ppc_set_current_section (pdata_section);
5203}
5204
5205/* pseudo-op: .ydata
5206 behaviour: predefined read only data section
5207 double word aligned
5208 errors: None
5209 warnings: None
5210 initial: .section .ydata "drw3"
5211 a - don't know -- maybe a misprint
5212 d - initialized data
5213 r - readable
5214 3 - double word aligned (that would be 4 byte boundary)
5215 commentary:
5216 Tag tables (also known as the scope table) for exception handling,
5217 debugging, etc. */
5218
5219static void
5220ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5221{
5222 if (ydata_section == 0)
5223 {
5224 ydata_section = subseg_new (".ydata", 0);
5225 bfd_set_section_flags (stdoutput, ydata_section,
5226 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5227 | SEC_READONLY | SEC_DATA ));
5228
5229 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5230 }
5231 else
5232 {
5233 ydata_section = subseg_new (".ydata", 0);
5234 }
5235 ppc_set_current_section (ydata_section);
5236}
5237
5238/* pseudo-op: .reldata
5239 behaviour: predefined read write data section
5240 double word aligned (4-byte)
5241 FIXME: relocation is applied to it
5242 FIXME: what's the difference between this and .data?
5243 errors: None
5244 warnings: None
5245 initial: .section .reldata "drw3"
5246 d - initialized data
5247 r - readable
5248 w - writable
5249 3 - double word aligned (that would be 8 byte boundary)
5250
5251 commentary:
5252 Like .data, but intended to hold data subject to relocation, such as
5253 function descriptors, etc. */
5254
5255static void
5256ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5257{
5258 if (reldata_section == 0)
5259 {
5260 reldata_section = subseg_new (".reldata", 0);
5261
5262 bfd_set_section_flags (stdoutput, reldata_section,
5263 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5264 | SEC_DATA));
5265
5266 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5267 }
5268 else
5269 {
5270 reldata_section = subseg_new (".reldata", 0);
5271 }
5272 ppc_set_current_section (reldata_section);
5273}
5274
5275/* pseudo-op: .rdata
5276 behaviour: predefined read only data section
5277 double word aligned
5278 errors: None
5279 warnings: None
5280 initial: .section .rdata "dr3"
5281 d - initialized data
5282 r - readable
5283 3 - double word aligned (that would be 4 byte boundary) */
5284
5285static void
5286ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5287{
5288 if (rdata_section == 0)
5289 {
5290 rdata_section = subseg_new (".rdata", 0);
5291 bfd_set_section_flags (stdoutput, rdata_section,
5292 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5293 | SEC_READONLY | SEC_DATA ));
5294
5295 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5296 }
5297 else
5298 {
5299 rdata_section = subseg_new (".rdata", 0);
5300 }
5301 ppc_set_current_section (rdata_section);
5302}
5303
5304/* pseudo-op: .ualong
5305 behaviour: much like .int, with the exception that no alignment is
5306 performed.
5307 FIXME: test the alignment statement
5308 errors: None
5309 warnings: None */
5310
5311static void
5312ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5313{
5314 /* Try for long. */
5315 cons (4);
5316}
5317
5318/* pseudo-op: .znop <symbol name>
5319 behaviour: Issue a nop instruction
5320 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5321 the supplied symbol name.
5322 errors: None
5323 warnings: Missing symbol name */
5324
5325static void
5326ppc_znop (int ignore ATTRIBUTE_UNUSED)
5327{
5328 unsigned long insn;
5329 const struct powerpc_opcode *opcode;
5330 char *f;
5331 symbolS *sym;
5332 char *symbol_name;
5333 char c;
5334 char *name;
5335
5336 /* Strip out the symbol name. */
5337 c = get_symbol_name (&symbol_name);
5338
5339 name = xstrdup (symbol_name);
5340
5341 sym = symbol_find_or_make (name);
5342
5343 *input_line_pointer = c;
5344
5345 SKIP_WHITESPACE_AFTER_NAME ();
5346
5347 /* Look up the opcode in the hash table. */
5348 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5349
5350 /* Stick in the nop. */
5351 insn = opcode->opcode;
5352
5353 /* Write out the instruction. */
5354 f = frag_more (4);
5355 md_number_to_chars (f, insn, 4);
5356 fix_new (frag_now,
5357 f - frag_now->fr_literal,
5358 4,
5359 sym,
5360 0,
5361 0,
5362 BFD_RELOC_16_GOT_PCREL);
5363
5364}
5365
5366/* pseudo-op:
5367 behaviour:
5368 errors:
5369 warnings: */
5370
5371static void
5372ppc_pe_comm (int lcomm)
5373{
5374 char *name;
5375 char c;
5376 char *p;
5377 offsetT temp;
5378 symbolS *symbolP;
5379 offsetT align;
5380
5381 c = get_symbol_name (&name);
5382
5383 /* just after name is now '\0'. */
5384 p = input_line_pointer;
5385 *p = c;
5386 SKIP_WHITESPACE_AFTER_NAME ();
5387 if (*input_line_pointer != ',')
5388 {
5389 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5390 ignore_rest_of_line ();
5391 return;
5392 }
5393
5394 input_line_pointer++; /* skip ',' */
5395 if ((temp = get_absolute_expression ()) < 0)
5396 {
5397 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5398 ignore_rest_of_line ();
5399 return;
5400 }
5401
5402 if (! lcomm)
5403 {
5404 /* The third argument to .comm is the alignment. */
5405 if (*input_line_pointer != ',')
5406 align = 3;
5407 else
5408 {
5409 ++input_line_pointer;
5410 align = get_absolute_expression ();
5411 if (align <= 0)
5412 {
5413 as_warn (_("ignoring bad alignment"));
5414 align = 3;
5415 }
5416 }
5417 }
5418
5419 *p = 0;
5420 symbolP = symbol_find_or_make (name);
5421
5422 *p = c;
5423 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5424 {
5425 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5426 S_GET_NAME (symbolP));
5427 ignore_rest_of_line ();
5428 return;
5429 }
5430
5431 if (S_GET_VALUE (symbolP))
5432 {
5433 if (S_GET_VALUE (symbolP) != (valueT) temp)
5434 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5435 S_GET_NAME (symbolP),
5436 (long) S_GET_VALUE (symbolP),
5437 (long) temp);
5438 }
5439 else
5440 {
5441 S_SET_VALUE (symbolP, (valueT) temp);
5442 S_SET_EXTERNAL (symbolP);
5443 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5444 }
5445
5446 demand_empty_rest_of_line ();
5447}
5448
5449/*
5450 * implement the .section pseudo op:
5451 * .section name {, "flags"}
5452 * ^ ^
5453 * | +--- optional flags: 'b' for bss
5454 * | 'i' for info
5455 * +-- section name 'l' for lib
5456 * 'n' for noload
5457 * 'o' for over
5458 * 'w' for data
5459 * 'd' (apparently m88k for data)
5460 * 'x' for text
5461 * But if the argument is not a quoted string, treat it as a
5462 * subsegment number.
5463 *
5464 * FIXME: this is a copy of the section processing from obj-coff.c, with
5465 * additions/changes for the moto-pas assembler support. There are three
5466 * categories:
5467 *
5468 * FIXME: I just noticed this. This doesn't work at all really. It it
5469 * setting bits that bfd probably neither understands or uses. The
5470 * correct approach (?) will have to incorporate extra fields attached
5471 * to the section to hold the system specific stuff. (krk)
5472 *
5473 * Section Contents:
5474 * 'a' - unknown - referred to in documentation, but no definition supplied
5475 * 'c' - section has code
5476 * 'd' - section has initialized data
5477 * 'u' - section has uninitialized data
5478 * 'i' - section contains directives (info)
5479 * 'n' - section can be discarded
5480 * 'R' - remove section at link time
5481 *
5482 * Section Protection:
5483 * 'r' - section is readable
5484 * 'w' - section is writable
5485 * 'x' - section is executable
5486 * 's' - section is sharable
5487 *
5488 * Section Alignment:
5489 * '0' - align to byte boundary
5490 * '1' - align to halfword boundary
5491 * '2' - align to word boundary
5492 * '3' - align to doubleword boundary
5493 * '4' - align to quadword boundary
5494 * '5' - align to 32 byte boundary
5495 * '6' - align to 64 byte boundary
5496 *
5497 */
5498
5499void
5500ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5501{
5502 /* Strip out the section name. */
5503 char *section_name;
5504 char c;
5505 char *name;
5506 unsigned int exp;
5507 flagword flags;
5508 segT sec;
5509 int align;
5510
5511 c = get_symbol_name (&section_name);
5512
5513 name = xstrdup (section_name);
5514
5515 *input_line_pointer = c;
5516
5517 SKIP_WHITESPACE_AFTER_NAME ();
5518
5519 exp = 0;
5520 flags = SEC_NO_FLAGS;
5521
5522 if (strcmp (name, ".idata$2") == 0)
5523 {
5524 align = 0;
5525 }
5526 else if (strcmp (name, ".idata$3") == 0)
5527 {
5528 align = 0;
5529 }
5530 else if (strcmp (name, ".idata$4") == 0)
5531 {
5532 align = 2;
5533 }
5534 else if (strcmp (name, ".idata$5") == 0)
5535 {
5536 align = 2;
5537 }
5538 else if (strcmp (name, ".idata$6") == 0)
5539 {
5540 align = 1;
5541 }
5542 else
5543 /* Default alignment to 16 byte boundary. */
5544 align = 4;
5545
5546 if (*input_line_pointer == ',')
5547 {
5548 ++input_line_pointer;
5549 SKIP_WHITESPACE ();
5550 if (*input_line_pointer != '"')
5551 exp = get_absolute_expression ();
5552 else
5553 {
5554 ++input_line_pointer;
5555 while (*input_line_pointer != '"'
5556 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5557 {
5558 switch (*input_line_pointer)
5559 {
5560 /* Section Contents */
5561 case 'a': /* unknown */
5562 as_bad (_("unsupported section attribute -- 'a'"));
5563 break;
5564 case 'c': /* code section */
5565 flags |= SEC_CODE;
5566 break;
5567 case 'd': /* section has initialized data */
5568 flags |= SEC_DATA;
5569 break;
5570 case 'u': /* section has uninitialized data */
5571 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5572 in winnt.h */
5573 flags |= SEC_ROM;
5574 break;
5575 case 'i': /* section contains directives (info) */
5576 /* FIXME: This is IMAGE_SCN_LNK_INFO
5577 in winnt.h */
5578 flags |= SEC_HAS_CONTENTS;
5579 break;
5580 case 'n': /* section can be discarded */
5581 flags &=~ SEC_LOAD;
5582 break;
5583 case 'R': /* Remove section at link time */
5584 flags |= SEC_NEVER_LOAD;
5585 break;
5586#if IFLICT_BRAIN_DAMAGE
5587 /* Section Protection */
5588 case 'r': /* section is readable */
5589 flags |= IMAGE_SCN_MEM_READ;
5590 break;
5591 case 'w': /* section is writable */
5592 flags |= IMAGE_SCN_MEM_WRITE;
5593 break;
5594 case 'x': /* section is executable */
5595 flags |= IMAGE_SCN_MEM_EXECUTE;
5596 break;
5597 case 's': /* section is sharable */
5598 flags |= IMAGE_SCN_MEM_SHARED;
5599 break;
5600
5601 /* Section Alignment */
5602 case '0': /* align to byte boundary */
5603 flags |= IMAGE_SCN_ALIGN_1BYTES;
5604 align = 0;
5605 break;
5606 case '1': /* align to halfword boundary */
5607 flags |= IMAGE_SCN_ALIGN_2BYTES;
5608 align = 1;
5609 break;
5610 case '2': /* align to word boundary */
5611 flags |= IMAGE_SCN_ALIGN_4BYTES;
5612 align = 2;
5613 break;
5614 case '3': /* align to doubleword boundary */
5615 flags |= IMAGE_SCN_ALIGN_8BYTES;
5616 align = 3;
5617 break;
5618 case '4': /* align to quadword boundary */
5619 flags |= IMAGE_SCN_ALIGN_16BYTES;
5620 align = 4;
5621 break;
5622 case '5': /* align to 32 byte boundary */
5623 flags |= IMAGE_SCN_ALIGN_32BYTES;
5624 align = 5;
5625 break;
5626 case '6': /* align to 64 byte boundary */
5627 flags |= IMAGE_SCN_ALIGN_64BYTES;
5628 align = 6;
5629 break;
5630#endif
5631 default:
5632 as_bad (_("unknown section attribute '%c'"),
5633 *input_line_pointer);
5634 break;
5635 }
5636 ++input_line_pointer;
5637 }
5638 if (*input_line_pointer == '"')
5639 ++input_line_pointer;
5640 }
5641 }
5642
5643 sec = subseg_new (name, (subsegT) exp);
5644
5645 ppc_set_current_section (sec);
5646
5647 if (flags != SEC_NO_FLAGS)
5648 {
5649 if (! bfd_set_section_flags (stdoutput, sec, flags))
5650 as_bad (_("error setting flags for \"%s\": %s"),
5651 bfd_section_name (stdoutput, sec),
5652 bfd_errmsg (bfd_get_error ()));
5653 }
5654
5655 bfd_set_section_alignment (stdoutput, sec, align);
5656}
5657
5658static void
5659ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5660{
5661 char *name;
5662 char endc;
5663 symbolS *ext_sym;
5664
5665 endc = get_symbol_name (&name);
5666
5667 ext_sym = symbol_find_or_make (name);
5668
5669 (void) restore_line_pointer (endc);
5670
5671 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5672 SF_SET_FUNCTION (ext_sym);
5673 SF_SET_PROCESS (ext_sym);
5674 coff_add_linesym (ext_sym);
5675
5676 demand_empty_rest_of_line ();
5677}
5678
5679static void
5680ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5681{
5682 if (tocdata_section == 0)
5683 {
5684 tocdata_section = subseg_new (".tocd", 0);
5685 /* FIXME: section flags won't work. */
5686 bfd_set_section_flags (stdoutput, tocdata_section,
5687 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5688 | SEC_READONLY | SEC_DATA));
5689
5690 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5691 }
5692 else
5693 {
5694 rdata_section = subseg_new (".tocd", 0);
5695 }
5696
5697 ppc_set_current_section (tocdata_section);
5698
5699 demand_empty_rest_of_line ();
5700}
5701
5702/* Don't adjust TOC relocs to use the section symbol. */
5703
5704int
5705ppc_pe_fix_adjustable (fixS *fix)
5706{
5707 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5708}
5709
5710#endif
5711\f
5712#ifdef OBJ_XCOFF
5713
5714/* XCOFF specific symbol and file handling. */
5715
5716/* Canonicalize the symbol name. We use the to force the suffix, if
5717 any, to use square brackets, and to be in upper case. */
5718
5719char *
5720ppc_canonicalize_symbol_name (char *name)
5721{
5722 char *s;
5723
5724 if (ppc_stab_symbol)
5725 return name;
5726
5727 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5728 ;
5729 if (*s != '\0')
5730 {
5731 char brac;
5732
5733 if (*s == '[')
5734 brac = ']';
5735 else
5736 {
5737 *s = '[';
5738 brac = '}';
5739 }
5740
5741 for (s++; *s != '\0' && *s != brac; s++)
5742 *s = TOUPPER (*s);
5743
5744 if (*s == '\0' || s[1] != '\0')
5745 as_bad (_("bad symbol suffix"));
5746
5747 *s = ']';
5748 }
5749
5750 return name;
5751}
5752
5753/* Set the class of a symbol based on the suffix, if any. This is
5754 called whenever a new symbol is created. */
5755
5756void
5757ppc_symbol_new_hook (symbolS *sym)
5758{
5759 struct ppc_tc_sy *tc;
5760 const char *s;
5761
5762 tc = symbol_get_tc (sym);
5763 tc->next = NULL;
5764 tc->output = 0;
5765 tc->symbol_class = -1;
5766 tc->real_name = NULL;
5767 tc->subseg = 0;
5768 tc->align = 0;
5769 tc->u.size = NULL;
5770 tc->u.dw = NULL;
5771 tc->within = NULL;
5772
5773 if (ppc_stab_symbol)
5774 return;
5775
5776 s = strchr (S_GET_NAME (sym), '[');
5777 if (s == (const char *) NULL)
5778 {
5779 /* There is no suffix. */
5780 return;
5781 }
5782
5783 ++s;
5784
5785 switch (s[0])
5786 {
5787 case 'B':
5788 if (strcmp (s, "BS]") == 0)
5789 tc->symbol_class = XMC_BS;
5790 break;
5791 case 'D':
5792 if (strcmp (s, "DB]") == 0)
5793 tc->symbol_class = XMC_DB;
5794 else if (strcmp (s, "DS]") == 0)
5795 tc->symbol_class = XMC_DS;
5796 break;
5797 case 'G':
5798 if (strcmp (s, "GL]") == 0)
5799 tc->symbol_class = XMC_GL;
5800 break;
5801 case 'P':
5802 if (strcmp (s, "PR]") == 0)
5803 tc->symbol_class = XMC_PR;
5804 break;
5805 case 'R':
5806 if (strcmp (s, "RO]") == 0)
5807 tc->symbol_class = XMC_RO;
5808 else if (strcmp (s, "RW]") == 0)
5809 tc->symbol_class = XMC_RW;
5810 break;
5811 case 'S':
5812 if (strcmp (s, "SV]") == 0)
5813 tc->symbol_class = XMC_SV;
5814 break;
5815 case 'T':
5816 if (strcmp (s, "TC]") == 0)
5817 tc->symbol_class = XMC_TC;
5818 else if (strcmp (s, "TI]") == 0)
5819 tc->symbol_class = XMC_TI;
5820 else if (strcmp (s, "TB]") == 0)
5821 tc->symbol_class = XMC_TB;
5822 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5823 tc->symbol_class = XMC_TC0;
5824 break;
5825 case 'U':
5826 if (strcmp (s, "UA]") == 0)
5827 tc->symbol_class = XMC_UA;
5828 else if (strcmp (s, "UC]") == 0)
5829 tc->symbol_class = XMC_UC;
5830 break;
5831 case 'X':
5832 if (strcmp (s, "XO]") == 0)
5833 tc->symbol_class = XMC_XO;
5834 break;
5835 }
5836
5837 if (tc->symbol_class == -1)
5838 as_bad (_("unrecognized symbol suffix"));
5839}
5840
5841/* Set the class of a label based on where it is defined. This
5842 handles symbols without suffixes. Also, move the symbol so that it
5843 follows the csect symbol. */
5844
5845void
5846ppc_frob_label (symbolS *sym)
5847{
5848 if (ppc_current_csect != (symbolS *) NULL)
5849 {
5850 if (symbol_get_tc (sym)->symbol_class == -1)
5851 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5852
5853 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5854 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5855 &symbol_rootP, &symbol_lastP);
5856 symbol_get_tc (ppc_current_csect)->within = sym;
5857 symbol_get_tc (sym)->within = ppc_current_csect;
5858 }
5859
5860#ifdef OBJ_ELF
5861 dwarf2_emit_label (sym);
5862#endif
5863}
5864
5865/* This variable is set by ppc_frob_symbol if any absolute symbols are
5866 seen. It tells ppc_adjust_symtab whether it needs to look through
5867 the symbols. */
5868
5869static bfd_boolean ppc_saw_abs;
5870
5871/* Change the name of a symbol just before writing it out. Set the
5872 real name if the .rename pseudo-op was used. Otherwise, remove any
5873 class suffix. Return 1 if the symbol should not be included in the
5874 symbol table. */
5875
5876int
5877ppc_frob_symbol (symbolS *sym)
5878{
5879 static symbolS *ppc_last_function;
5880 static symbolS *set_end;
5881
5882 /* Discard symbols that should not be included in the output symbol
5883 table. */
5884 if (! symbol_used_in_reloc_p (sym)
5885 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5886 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5887 && ! symbol_get_tc (sym)->output
5888 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5889 return 1;
5890
5891 /* This one will disappear anyway. Don't make a csect sym for it. */
5892 if (sym == abs_section_sym)
5893 return 1;
5894
5895 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5896 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5897 else
5898 {
5899 const char *name;
5900 const char *s;
5901
5902 name = S_GET_NAME (sym);
5903 s = strchr (name, '[');
5904 if (s != (char *) NULL)
5905 {
5906 unsigned int len;
5907 char *snew;
5908
5909 len = s - name;
5910 snew = xstrndup (name, len);
5911
5912 S_SET_NAME (sym, snew);
5913 }
5914 }
5915
5916 if (set_end != (symbolS *) NULL)
5917 {
5918 SA_SET_SYM_ENDNDX (set_end, sym);
5919 set_end = NULL;
5920 }
5921
5922 if (SF_GET_FUNCTION (sym))
5923 {
5924 if (ppc_last_function != (symbolS *) NULL)
5925 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5926 ppc_last_function = sym;
5927 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5928 {
5929 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5930 SA_SET_SYM_FSIZE (sym,
5931 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5932 }
5933 }
5934 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5935 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5936 {
5937 if (ppc_last_function == (symbolS *) NULL)
5938 as_bad (_(".ef with no preceding .function"));
5939 else
5940 {
5941 set_end = ppc_last_function;
5942 ppc_last_function = NULL;
5943
5944 /* We don't have a C_EFCN symbol, but we need to force the
5945 COFF backend to believe that it has seen one. */
5946 coff_last_function = NULL;
5947 }
5948 }
5949
5950 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5951 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5952 && S_GET_STORAGE_CLASS (sym) != C_FILE
5953 && S_GET_STORAGE_CLASS (sym) != C_FCN
5954 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5955 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5956 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5957 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5958 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5959 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5960 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5961
5962 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5963 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5964 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5965 {
5966 int i;
5967 union internal_auxent *a;
5968
5969 /* Create a csect aux. */
5970 i = S_GET_NUMBER_AUXILIARY (sym);
5971 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5972 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5973 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5974 {
5975 /* This is the TOC table. */
5976 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5977 a->x_csect.x_scnlen.l = 0;
5978 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5979 }
5980 else if (symbol_get_tc (sym)->subseg != 0)
5981 {
5982 /* This is a csect symbol. x_scnlen is the size of the
5983 csect. */
5984 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5985 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5986 S_GET_SEGMENT (sym))
5987 - S_GET_VALUE (sym));
5988 else
5989 {
5990 resolve_symbol_value (symbol_get_tc (sym)->next);
5991 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5992 - S_GET_VALUE (sym));
5993 }
5994 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5995 }
5996 else if (S_GET_SEGMENT (sym) == bss_section)
5997 {
5998 /* This is a common symbol. */
5999 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
6000 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
6001 if (S_IS_EXTERNAL (sym))
6002 symbol_get_tc (sym)->symbol_class = XMC_RW;
6003 else
6004 symbol_get_tc (sym)->symbol_class = XMC_BS;
6005 }
6006 else if (S_GET_SEGMENT (sym) == absolute_section)
6007 {
6008 /* This is an absolute symbol. The csect will be created by
6009 ppc_adjust_symtab. */
6010 ppc_saw_abs = TRUE;
6011 a->x_csect.x_smtyp = XTY_LD;
6012 if (symbol_get_tc (sym)->symbol_class == -1)
6013 symbol_get_tc (sym)->symbol_class = XMC_XO;
6014 }
6015 else if (! S_IS_DEFINED (sym))
6016 {
6017 /* This is an external symbol. */
6018 a->x_csect.x_scnlen.l = 0;
6019 a->x_csect.x_smtyp = XTY_ER;
6020 }
6021 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
6022 {
6023 symbolS *next;
6024
6025 /* This is a TOC definition. x_scnlen is the size of the
6026 TOC entry. */
6027 next = symbol_next (sym);
6028 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
6029 next = symbol_next (next);
6030 if (next == (symbolS *) NULL
6031 || symbol_get_tc (next)->symbol_class != XMC_TC)
6032 {
6033 if (ppc_after_toc_frag == (fragS *) NULL)
6034 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
6035 data_section)
6036 - S_GET_VALUE (sym));
6037 else
6038 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
6039 - S_GET_VALUE (sym));
6040 }
6041 else
6042 {
6043 resolve_symbol_value (next);
6044 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
6045 - S_GET_VALUE (sym));
6046 }
6047 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
6048 }
6049 else
6050 {
6051 symbolS *csect;
6052
6053 /* This is a normal symbol definition. x_scnlen is the
6054 symbol index of the containing csect. */
6055 if (S_GET_SEGMENT (sym) == text_section)
6056 csect = ppc_text_csects;
6057 else if (S_GET_SEGMENT (sym) == data_section)
6058 csect = ppc_data_csects;
6059 else
6060 abort ();
6061
6062 /* Skip the initial dummy symbol. */
6063 csect = symbol_get_tc (csect)->next;
6064
6065 if (csect == (symbolS *) NULL)
6066 {
6067 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
6068 a->x_csect.x_scnlen.l = 0;
6069 }
6070 else
6071 {
6072 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
6073 {
6074 resolve_symbol_value (symbol_get_tc (csect)->next);
6075 if (S_GET_VALUE (symbol_get_tc (csect)->next)
6076 > S_GET_VALUE (sym))
6077 break;
6078 csect = symbol_get_tc (csect)->next;
6079 }
6080
6081 a->x_csect.x_scnlen.p =
6082 coffsymbol (symbol_get_bfdsym (csect))->native;
6083 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
6084 1;
6085 }
6086 a->x_csect.x_smtyp = XTY_LD;
6087 }
6088
6089 a->x_csect.x_parmhash = 0;
6090 a->x_csect.x_snhash = 0;
6091 if (symbol_get_tc (sym)->symbol_class == -1)
6092 a->x_csect.x_smclas = XMC_PR;
6093 else
6094 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
6095 a->x_csect.x_stab = 0;
6096 a->x_csect.x_snstab = 0;
6097
6098 /* Don't let the COFF backend resort these symbols. */
6099 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
6100 }
6101 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
6102 {
6103 /* We want the value to be the symbol index of the referenced
6104 csect symbol. BFD will do that for us if we set the right
6105 flags. */
6106 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
6107 combined_entry_type *c = coffsymbol (bsym)->native;
6108
6109 S_SET_VALUE (sym, (valueT) (size_t) c);
6110 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
6111 }
6112 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
6113 {
6114 symbolS *block;
6115 valueT base;
6116
6117 block = symbol_get_tc (sym)->within;
6118 if (block)
6119 {
6120 /* The value is the offset from the enclosing csect. */
6121 symbolS *csect;
6122
6123 csect = symbol_get_tc (block)->within;
6124 resolve_symbol_value (csect);
6125 base = S_GET_VALUE (csect);
6126 }
6127 else
6128 base = 0;
6129
6130 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
6131 }
6132 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6133 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6134 {
6135 /* We want the value to be a file offset into the line numbers.
6136 BFD will do that for us if we set the right flags. We have
6137 already set the value correctly. */
6138 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
6139 }
6140
6141 return 0;
6142}
6143
6144/* Adjust the symbol table. This creates csect symbols for all
6145 absolute symbols. */
6146
6147void
6148ppc_adjust_symtab (void)
6149{
6150 symbolS *sym;
6151
6152 if (! ppc_saw_abs)
6153 return;
6154
6155 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6156 {
6157 symbolS *csect;
6158 int i;
6159 union internal_auxent *a;
6160
6161 if (S_GET_SEGMENT (sym) != absolute_section)
6162 continue;
6163
6164 csect = symbol_create (".abs[XO]", absolute_section,
6165 S_GET_VALUE (sym), &zero_address_frag);
6166 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6167 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6168 i = S_GET_NUMBER_AUXILIARY (csect);
6169 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6170 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6171 a->x_csect.x_scnlen.l = 0;
6172 a->x_csect.x_smtyp = XTY_SD;
6173 a->x_csect.x_parmhash = 0;
6174 a->x_csect.x_snhash = 0;
6175 a->x_csect.x_smclas = XMC_XO;
6176 a->x_csect.x_stab = 0;
6177 a->x_csect.x_snstab = 0;
6178
6179 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6180
6181 i = S_GET_NUMBER_AUXILIARY (sym);
6182 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6183 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6184 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6185 }
6186
6187 ppc_saw_abs = FALSE;
6188}
6189
6190/* Set the VMA for a section. This is called on all the sections in
6191 turn. */
6192
6193void
6194ppc_frob_section (asection *sec)
6195{
6196 static bfd_vma vma = 0;
6197
6198 /* Dwarf sections start at 0. */
6199 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6200 return;
6201
6202 vma = md_section_align (sec, vma);
6203 bfd_set_section_vma (stdoutput, sec, vma);
6204 vma += bfd_section_size (stdoutput, sec);
6205}
6206
6207#endif /* OBJ_XCOFF */
6208\f
6209const char *
6210md_atof (int type, char *litp, int *sizep)
6211{
6212 return ieee_md_atof (type, litp, sizep, target_big_endian);
6213}
6214
6215/* Write a value out to the object file, using the appropriate
6216 endianness. */
6217
6218void
6219md_number_to_chars (char *buf, valueT val, int n)
6220{
6221 if (target_big_endian)
6222 number_to_chars_bigendian (buf, val, n);
6223 else
6224 number_to_chars_littleendian (buf, val, n);
6225}
6226
6227/* Align a section (I don't know why this is machine dependent). */
6228
6229valueT
6230md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6231{
6232#ifdef OBJ_ELF
6233 return addr;
6234#else
6235 int align = bfd_get_section_alignment (stdoutput, seg);
6236
6237 return ((addr + (1 << align) - 1) & -(1 << align));
6238#endif
6239}
6240
6241/* We don't have any form of relaxing. */
6242
6243int
6244md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6245 asection *seg ATTRIBUTE_UNUSED)
6246{
6247 abort ();
6248 return 0;
6249}
6250
6251/* Convert a machine dependent frag. We never generate these. */
6252
6253void
6254md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6255 asection *sec ATTRIBUTE_UNUSED,
6256 fragS *fragp ATTRIBUTE_UNUSED)
6257{
6258 abort ();
6259}
6260
6261/* We have no need to default values of symbols. */
6262
6263symbolS *
6264md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6265{
6266 return 0;
6267}
6268\f
6269/* Functions concerning relocs. */
6270
6271/* The location from which a PC relative jump should be calculated,
6272 given a PC relative reloc. */
6273
6274long
6275md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6276{
6277 return fixp->fx_frag->fr_address + fixp->fx_where;
6278}
6279
6280#ifdef OBJ_XCOFF
6281
6282/* This is called to see whether a fixup should be adjusted to use a
6283 section symbol. We take the opportunity to change a fixup against
6284 a symbol in the TOC subsegment into a reloc against the
6285 corresponding .tc symbol. */
6286
6287int
6288ppc_fix_adjustable (fixS *fix)
6289{
6290 valueT val = resolve_symbol_value (fix->fx_addsy);
6291 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6292 TC_SYMFIELD_TYPE *tc;
6293
6294 if (symseg == absolute_section)
6295 return 0;
6296
6297 /* Always adjust symbols in debugging sections. */
6298 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6299 return 1;
6300
6301 if (ppc_toc_csect != (symbolS *) NULL
6302 && fix->fx_addsy != ppc_toc_csect
6303 && symseg == data_section
6304 && val >= ppc_toc_frag->fr_address
6305 && (ppc_after_toc_frag == (fragS *) NULL
6306 || val < ppc_after_toc_frag->fr_address))
6307 {
6308 symbolS *sy;
6309
6310 for (sy = symbol_next (ppc_toc_csect);
6311 sy != (symbolS *) NULL;
6312 sy = symbol_next (sy))
6313 {
6314 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6315
6316 if (sy_tc->symbol_class == XMC_TC0)
6317 continue;
6318 if (sy_tc->symbol_class != XMC_TC)
6319 break;
6320 if (val == resolve_symbol_value (sy))
6321 {
6322 fix->fx_addsy = sy;
6323 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6324 return 0;
6325 }
6326 }
6327
6328 as_bad_where (fix->fx_file, fix->fx_line,
6329 _("symbol in .toc does not match any .tc"));
6330 }
6331
6332 /* Possibly adjust the reloc to be against the csect. */
6333 tc = symbol_get_tc (fix->fx_addsy);
6334 if (tc->subseg == 0
6335 && tc->symbol_class != XMC_TC0
6336 && tc->symbol_class != XMC_TC
6337 && symseg != bss_section
6338 /* Don't adjust if this is a reloc in the toc section. */
6339 && (symseg != data_section
6340 || ppc_toc_csect == NULL
6341 || val < ppc_toc_frag->fr_address
6342 || (ppc_after_toc_frag != NULL
6343 && val >= ppc_after_toc_frag->fr_address)))
6344 {
6345 symbolS *csect = tc->within;
6346
6347 /* If the symbol was not declared by a label (eg: a section symbol),
6348 use the section instead of the csect. This doesn't happen in
6349 normal AIX assembly code. */
6350 if (csect == NULL)
6351 csect = seg_info (symseg)->sym;
6352
6353 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6354 fix->fx_addsy = csect;
6355
6356 return 0;
6357 }
6358
6359 /* Adjust a reloc against a .lcomm symbol to be against the base
6360 .lcomm. */
6361 if (symseg == bss_section
6362 && ! S_IS_EXTERNAL (fix->fx_addsy))
6363 {
6364 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6365
6366 fix->fx_offset += val - resolve_symbol_value (sy);
6367 fix->fx_addsy = sy;
6368 }
6369
6370 return 0;
6371}
6372
6373/* A reloc from one csect to another must be kept. The assembler
6374 will, of course, keep relocs between sections, and it will keep
6375 absolute relocs, but we need to force it to keep PC relative relocs
6376 between two csects in the same section. */
6377
6378int
6379ppc_force_relocation (fixS *fix)
6380{
6381 /* At this point fix->fx_addsy should already have been converted to
6382 a csect symbol. If the csect does not include the fragment, then
6383 we need to force the relocation. */
6384 if (fix->fx_pcrel
6385 && fix->fx_addsy != NULL
6386 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6387 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6388 > fix->fx_frag->fr_address)
6389 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6390 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6391 <= fix->fx_frag->fr_address))))
6392 return 1;
6393
6394 return generic_force_reloc (fix);
6395}
6396
6397void
6398ppc_new_dot_label (symbolS *sym)
6399{
6400 /* Anchor this label to the current csect for relocations. */
6401 symbol_get_tc (sym)->within = ppc_current_csect;
6402}
6403
6404#endif /* OBJ_XCOFF */
6405
6406#ifdef OBJ_ELF
6407/* If this function returns non-zero, it guarantees that a relocation
6408 will be emitted for a fixup. */
6409
6410int
6411ppc_force_relocation (fixS *fix)
6412{
6413 /* Branch prediction relocations must force a relocation, as must
6414 the vtable description relocs. */
6415 switch (fix->fx_r_type)
6416 {
6417 case BFD_RELOC_PPC_B16_BRTAKEN:
6418 case BFD_RELOC_PPC_B16_BRNTAKEN:
6419 case BFD_RELOC_PPC_BA16_BRTAKEN:
6420 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6421 case BFD_RELOC_24_PLT_PCREL:
6422 case BFD_RELOC_PPC64_TOC:
6423 return 1;
6424 case BFD_RELOC_PPC_B26:
6425 case BFD_RELOC_PPC_BA26:
6426 case BFD_RELOC_PPC_B16:
6427 case BFD_RELOC_PPC_BA16:
6428 /* All branch fixups targeting a localentry symbol must
6429 force a relocation. */
6430 if (fix->fx_addsy)
6431 {
6432 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6433 elf_symbol_type *elfsym
6434 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6435 gas_assert (elfsym);
6436 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6437 return 1;
6438 }
6439 break;
6440 default:
6441 break;
6442 }
6443
6444 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6445 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6446 return 1;
6447
6448 return generic_force_reloc (fix);
6449}
6450
6451int
6452ppc_fix_adjustable (fixS *fix)
6453{
6454 switch (fix->fx_r_type)
6455 {
6456 /* All branch fixups targeting a localentry symbol must
6457 continue using the symbol. */
6458 case BFD_RELOC_PPC_B26:
6459 case BFD_RELOC_PPC_BA26:
6460 case BFD_RELOC_PPC_B16:
6461 case BFD_RELOC_PPC_BA16:
6462 case BFD_RELOC_PPC_B16_BRTAKEN:
6463 case BFD_RELOC_PPC_B16_BRNTAKEN:
6464 case BFD_RELOC_PPC_BA16_BRTAKEN:
6465 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6466 if (fix->fx_addsy)
6467 {
6468 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6469 elf_symbol_type *elfsym
6470 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6471 gas_assert (elfsym);
6472 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6473 return 0;
6474 }
6475 break;
6476 default:
6477 break;
6478 }
6479
6480 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6481 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6482 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6483 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6484 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6485 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6486 && fix->fx_r_type != BFD_RELOC_GPREL16
6487 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6488 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6489 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6490 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6491}
6492#endif
6493
6494void
6495ppc_frag_check (struct frag *fragP)
6496{
6497 if ((fragP->fr_address & fragP->insn_addr) != 0)
6498 as_bad_where (fragP->fr_file, fragP->fr_line,
6499 _("instruction address is not a multiple of %d"),
6500 fragP->insn_addr + 1);
6501}
6502
6503/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6504 rs_align_code frag. */
6505
6506void
6507ppc_handle_align (struct frag *fragP)
6508{
6509 valueT count = (fragP->fr_next->fr_address
6510 - (fragP->fr_address + fragP->fr_fix));
6511
6512 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
6513 {
6514 char *dest = fragP->fr_literal + fragP->fr_fix;
6515
6516 fragP->fr_var = 2;
6517 md_number_to_chars (dest, 0x4400, 2);
6518 }
6519 else if (count != 0 && (count & 3) == 0)
6520 {
6521 char *dest = fragP->fr_literal + fragP->fr_fix;
6522
6523 fragP->fr_var = 4;
6524
6525 if (count > 4 * nop_limit && count < 0x2000000)
6526 {
6527 struct frag *rest;
6528
6529 /* Make a branch, then follow with nops. Insert another
6530 frag to handle the nops. */
6531 md_number_to_chars (dest, 0x48000000 + count, 4);
6532 count -= 4;
6533 if (count == 0)
6534 return;
6535
6536 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6537 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6538 fragP->fr_next = rest;
6539 fragP = rest;
6540 rest->fr_address += rest->fr_fix + 4;
6541 rest->fr_fix = 0;
6542 /* If we leave the next frag as rs_align_code we'll come here
6543 again, resulting in a bunch of branches rather than a
6544 branch followed by nops. */
6545 rest->fr_type = rs_align;
6546 dest = rest->fr_literal;
6547 }
6548
6549 md_number_to_chars (dest, 0x60000000, 4);
6550
6551 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6552 && (ppc_cpu & PPC_OPCODE_POWER9) == 0)
6553 {
6554 /* For power6, power7, and power8, we want the last nop to
6555 be a group terminating one. Do this by inserting an
6556 rs_fill frag immediately after this one, with its address
6557 set to the last nop location. This will automatically
6558 reduce the number of nops in the current frag by one. */
6559 if (count > 4)
6560 {
6561 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6562
6563 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6564 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6565 group_nop->fr_fix = 0;
6566 group_nop->fr_offset = 1;
6567 group_nop->fr_type = rs_fill;
6568 fragP->fr_next = group_nop;
6569 dest = group_nop->fr_literal;
6570 }
6571
6572 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6573 {
6574 if (ppc_cpu & PPC_OPCODE_E500MC)
6575 /* e500mc group terminating nop: "ori 0,0,0". */
6576 md_number_to_chars (dest, 0x60000000, 4);
6577 else
6578 /* power7/power8 group terminating nop: "ori 2,2,0". */
6579 md_number_to_chars (dest, 0x60420000, 4);
6580 }
6581 else
6582 /* power6 group terminating nop: "ori 1,1,0". */
6583 md_number_to_chars (dest, 0x60210000, 4);
6584 }
6585 }
6586}
6587
6588/* Apply a fixup to the object code. This is called for all the
6589 fixups we generated by the calls to fix_new_exp, above. */
6590
6591void
6592md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6593{
6594 valueT value = * valP;
6595 offsetT fieldval;
6596 const struct powerpc_operand *operand;
6597
6598#ifdef OBJ_ELF
6599 if (fixP->fx_addsy != NULL)
6600 {
6601 /* Hack around bfd_install_relocation brain damage. */
6602 if (fixP->fx_pcrel)
6603 value += fixP->fx_frag->fr_address + fixP->fx_where;
6604
6605 if (fixP->fx_addsy == abs_section_sym)
6606 fixP->fx_done = 1;
6607 }
6608 else
6609 fixP->fx_done = 1;
6610#else
6611 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6612 the symbol values. If we are doing this relocation the code in
6613 write.c is going to call bfd_install_relocation, which is also
6614 going to use the symbol value. That means that if the reloc is
6615 fully resolved we want to use *valP since bfd_install_relocation is
6616 not being used.
6617 However, if the reloc is not fully resolved we do not want to
6618 use *valP, and must use fx_offset instead. If the relocation
6619 is PC-relative, we then need to re-apply md_pcrel_from_section
6620 to this new relocation value. */
6621 if (fixP->fx_addsy == (symbolS *) NULL)
6622 fixP->fx_done = 1;
6623
6624 else
6625 {
6626 value = fixP->fx_offset;
6627 if (fixP->fx_pcrel)
6628 value -= md_pcrel_from_section (fixP, seg);
6629 }
6630#endif
6631
6632 /* We are only able to convert some relocs to pc-relative. */
6633 if (fixP->fx_pcrel)
6634 {
6635 switch (fixP->fx_r_type)
6636 {
6637 case BFD_RELOC_LO16:
6638 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6639 break;
6640
6641 case BFD_RELOC_HI16:
6642 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6643 break;
6644
6645 case BFD_RELOC_HI16_S:
6646 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6647 break;
6648
6649 case BFD_RELOC_64:
6650 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6651 break;
6652
6653 case BFD_RELOC_32:
6654 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6655 break;
6656
6657 case BFD_RELOC_16:
6658 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6659 break;
6660
6661 case BFD_RELOC_PPC_16DX_HA:
6662 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6663 break;
6664
6665 default:
6666 break;
6667 }
6668 }
6669 else if (!fixP->fx_done
6670 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA)
6671 {
6672 /* addpcis is relative to next insn address. */
6673 value -= 4;
6674 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6675 fixP->fx_pcrel = 1;
6676 }
6677
6678 operand = NULL;
6679 if (fixP->fx_pcrel_adjust != 0)
6680 {
6681 /* This is a fixup on an instruction. */
6682 int opindex = fixP->fx_pcrel_adjust & 0xff;
6683
6684 operand = &powerpc_operands[opindex];
6685#ifdef OBJ_XCOFF
6686 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6687 does not generate a reloc. It uses the offset of `sym' within its
6688 csect. Other usages, such as `.long sym', generate relocs. This
6689 is the documented behaviour of non-TOC symbols. */
6690 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6691 && (operand->bitm & 0xfff0) == 0xfff0
6692 && operand->shift == 0
6693 && (operand->insert == NULL || ppc_obj64)
6694 && fixP->fx_addsy != NULL
6695 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6696 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6697 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6698 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6699 {
6700 value = fixP->fx_offset;
6701 fixP->fx_done = 1;
6702 }
6703
6704 /* During parsing of instructions, a TOC16 reloc is generated for
6705 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6706 in the toc. But at parse time, SYM may be not yet defined, so
6707 check again here. */
6708 if (fixP->fx_r_type == BFD_RELOC_16
6709 && fixP->fx_addsy != NULL
6710 && ppc_is_toc_sym (fixP->fx_addsy))
6711 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6712#endif
6713 }
6714
6715 /* Calculate value to be stored in field. */
6716 fieldval = value;
6717 switch (fixP->fx_r_type)
6718 {
6719#ifdef OBJ_ELF
6720 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6721 case BFD_RELOC_PPC_VLE_LO16A:
6722 case BFD_RELOC_PPC_VLE_LO16D:
6723#endif
6724 case BFD_RELOC_LO16:
6725 case BFD_RELOC_LO16_PCREL:
6726 fieldval = value & 0xffff;
6727 sign_extend_16:
6728 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6729 fieldval = SEX16 (fieldval);
6730 fixP->fx_no_overflow = 1;
6731 break;
6732
6733 case BFD_RELOC_HI16:
6734 case BFD_RELOC_HI16_PCREL:
6735#ifdef OBJ_ELF
6736 if (REPORT_OVERFLOW_HI && ppc_obj64)
6737 {
6738 fieldval = value >> 16;
6739 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6740 {
6741 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6742 fieldval = ((valueT) fieldval ^ sign) - sign;
6743 }
6744 break;
6745 }
6746 /* Fallthru */
6747
6748 case BFD_RELOC_PPC_VLE_HI16A:
6749 case BFD_RELOC_PPC_VLE_HI16D:
6750 case BFD_RELOC_PPC64_ADDR16_HIGH:
6751#endif
6752 fieldval = PPC_HI (value);
6753 goto sign_extend_16;
6754
6755 case BFD_RELOC_HI16_S:
6756 case BFD_RELOC_HI16_S_PCREL:
6757 case BFD_RELOC_PPC_16DX_HA:
6758 case BFD_RELOC_PPC_REL16DX_HA:
6759#ifdef OBJ_ELF
6760 if (REPORT_OVERFLOW_HI && ppc_obj64)
6761 {
6762 fieldval = (value + 0x8000) >> 16;
6763 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6764 {
6765 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6766 fieldval = ((valueT) fieldval ^ sign) - sign;
6767 }
6768 break;
6769 }
6770 /* Fallthru */
6771
6772 case BFD_RELOC_PPC_VLE_HA16A:
6773 case BFD_RELOC_PPC_VLE_HA16D:
6774 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6775#endif
6776 fieldval = PPC_HA (value);
6777 goto sign_extend_16;
6778
6779#ifdef OBJ_ELF
6780 case BFD_RELOC_PPC64_HIGHER:
6781 fieldval = PPC_HIGHER (value);
6782 goto sign_extend_16;
6783
6784 case BFD_RELOC_PPC64_HIGHER_S:
6785 fieldval = PPC_HIGHERA (value);
6786 goto sign_extend_16;
6787
6788 case BFD_RELOC_PPC64_HIGHEST:
6789 fieldval = PPC_HIGHEST (value);
6790 goto sign_extend_16;
6791
6792 case BFD_RELOC_PPC64_HIGHEST_S:
6793 fieldval = PPC_HIGHESTA (value);
6794 goto sign_extend_16;
6795#endif
6796
6797 default:
6798 break;
6799 }
6800
6801 if (operand != NULL)
6802 {
6803 /* Handle relocs in an insn. */
6804 switch (fixP->fx_r_type)
6805 {
6806#ifdef OBJ_ELF
6807 /* The following relocs can't be calculated by the assembler.
6808 Leave the field zero. */
6809 case BFD_RELOC_PPC_TPREL16:
6810 case BFD_RELOC_PPC_TPREL16_LO:
6811 case BFD_RELOC_PPC_TPREL16_HI:
6812 case BFD_RELOC_PPC_TPREL16_HA:
6813 case BFD_RELOC_PPC_DTPREL16:
6814 case BFD_RELOC_PPC_DTPREL16_LO:
6815 case BFD_RELOC_PPC_DTPREL16_HI:
6816 case BFD_RELOC_PPC_DTPREL16_HA:
6817 case BFD_RELOC_PPC_GOT_TLSGD16:
6818 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6819 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6820 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6821 case BFD_RELOC_PPC_GOT_TLSLD16:
6822 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6823 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6824 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6825 case BFD_RELOC_PPC_GOT_TPREL16:
6826 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6827 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6828 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6829 case BFD_RELOC_PPC_GOT_DTPREL16:
6830 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6831 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6832 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6833 case BFD_RELOC_PPC64_TPREL16_DS:
6834 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6835 case BFD_RELOC_PPC64_TPREL16_HIGH:
6836 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6837 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6838 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6839 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6840 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6841 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6842 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6843 case BFD_RELOC_PPC64_DTPREL16_DS:
6844 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6845 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6846 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6847 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6848 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6849 gas_assert (fixP->fx_addsy != NULL);
6850 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6851 fieldval = 0;
6852 break;
6853
6854 /* These also should leave the field zero for the same
6855 reason. Note that older versions of gas wrote values
6856 here. If we want to go back to the old behaviour, then
6857 all _LO and _LO_DS cases will need to be treated like
6858 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6859 case BFD_RELOC_16_GOTOFF:
6860 case BFD_RELOC_LO16_GOTOFF:
6861 case BFD_RELOC_HI16_GOTOFF:
6862 case BFD_RELOC_HI16_S_GOTOFF:
6863 case BFD_RELOC_LO16_PLTOFF:
6864 case BFD_RELOC_HI16_PLTOFF:
6865 case BFD_RELOC_HI16_S_PLTOFF:
6866 case BFD_RELOC_GPREL16:
6867 case BFD_RELOC_16_BASEREL:
6868 case BFD_RELOC_LO16_BASEREL:
6869 case BFD_RELOC_HI16_BASEREL:
6870 case BFD_RELOC_HI16_S_BASEREL:
6871 case BFD_RELOC_PPC_TOC16:
6872 case BFD_RELOC_PPC64_TOC16_LO:
6873 case BFD_RELOC_PPC64_TOC16_HI:
6874 case BFD_RELOC_PPC64_TOC16_HA:
6875 case BFD_RELOC_PPC64_PLTGOT16:
6876 case BFD_RELOC_PPC64_PLTGOT16_LO:
6877 case BFD_RELOC_PPC64_PLTGOT16_HI:
6878 case BFD_RELOC_PPC64_PLTGOT16_HA:
6879 case BFD_RELOC_PPC64_GOT16_DS:
6880 case BFD_RELOC_PPC64_GOT16_LO_DS:
6881 case BFD_RELOC_PPC64_PLT16_LO_DS:
6882 case BFD_RELOC_PPC64_SECTOFF_DS:
6883 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6884 case BFD_RELOC_PPC64_TOC16_DS:
6885 case BFD_RELOC_PPC64_TOC16_LO_DS:
6886 case BFD_RELOC_PPC64_PLTGOT16_DS:
6887 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6888 case BFD_RELOC_PPC_EMB_NADDR16:
6889 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6890 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6891 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6892 case BFD_RELOC_PPC_EMB_SDAI16:
6893 case BFD_RELOC_PPC_EMB_SDA2I16:
6894 case BFD_RELOC_PPC_EMB_SDA2REL:
6895 case BFD_RELOC_PPC_EMB_SDA21:
6896 case BFD_RELOC_PPC_EMB_MRKREF:
6897 case BFD_RELOC_PPC_EMB_RELSEC16:
6898 case BFD_RELOC_PPC_EMB_RELST_LO:
6899 case BFD_RELOC_PPC_EMB_RELST_HI:
6900 case BFD_RELOC_PPC_EMB_RELST_HA:
6901 case BFD_RELOC_PPC_EMB_BIT_FLD:
6902 case BFD_RELOC_PPC_EMB_RELSDA:
6903 case BFD_RELOC_PPC_VLE_SDA21:
6904 case BFD_RELOC_PPC_VLE_SDA21_LO:
6905 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6906 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6907 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6908 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6909 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6910 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6911 gas_assert (fixP->fx_addsy != NULL);
6912 /* Fallthru */
6913
6914 case BFD_RELOC_PPC_TLS:
6915 case BFD_RELOC_PPC_TLSGD:
6916 case BFD_RELOC_PPC_TLSLD:
6917 fieldval = 0;
6918 break;
6919#endif
6920
6921#ifdef OBJ_XCOFF
6922 case BFD_RELOC_PPC_B16:
6923 /* Adjust the offset to the instruction boundary. */
6924 fieldval += 2;
6925 break;
6926#endif
6927
6928 case BFD_RELOC_VTABLE_INHERIT:
6929 case BFD_RELOC_VTABLE_ENTRY:
6930 case BFD_RELOC_PPC_DTPMOD:
6931 case BFD_RELOC_PPC_TPREL:
6932 case BFD_RELOC_PPC_DTPREL:
6933 case BFD_RELOC_PPC_COPY:
6934 case BFD_RELOC_PPC_GLOB_DAT:
6935 case BFD_RELOC_32_PLT_PCREL:
6936 case BFD_RELOC_PPC_EMB_NADDR32:
6937 case BFD_RELOC_PPC64_TOC:
6938 case BFD_RELOC_CTOR:
6939 case BFD_RELOC_32:
6940 case BFD_RELOC_32_PCREL:
6941 case BFD_RELOC_RVA:
6942 case BFD_RELOC_64:
6943 case BFD_RELOC_64_PCREL:
6944 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6945 as_bad_where (fixP->fx_file, fixP->fx_line,
6946 _("%s unsupported as instruction fixup"),
6947 bfd_get_reloc_code_name (fixP->fx_r_type));
6948 fixP->fx_done = 1;
6949 return;
6950
6951 default:
6952 break;
6953 }
6954
6955#ifdef OBJ_ELF
6956/* powerpc uses RELA style relocs, so if emitting a reloc the field
6957 contents can stay at zero. */
6958#define APPLY_RELOC fixP->fx_done
6959#else
6960#define APPLY_RELOC 1
6961#endif
6962 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6963 {
6964 unsigned long insn;
6965 unsigned char *where;
6966
6967 /* Fetch the instruction, insert the fully resolved operand
6968 value, and stuff the instruction back again. */
6969 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6970 if (target_big_endian)
6971 {
6972 if (fixP->fx_size == 4)
6973 insn = bfd_getb32 (where);
6974 else
6975 insn = bfd_getb16 (where);
6976 }
6977 else
6978 {
6979 if (fixP->fx_size == 4)
6980 insn = bfd_getl32 (where);
6981 else
6982 insn = bfd_getl16 (where);
6983 }
6984 insn = ppc_insert_operand (insn, operand, fieldval,
6985 fixP->tc_fix_data.ppc_cpu,
6986 fixP->fx_file, fixP->fx_line);
6987 if (target_big_endian)
6988 {
6989 if (fixP->fx_size == 4)
6990 bfd_putb32 (insn, where);
6991 else
6992 bfd_putb16 (insn, where);
6993 }
6994 else
6995 {
6996 if (fixP->fx_size == 4)
6997 bfd_putl32 (insn, where);
6998 else
6999 bfd_putl16 (insn, where);
7000 }
7001 }
7002
7003 if (fixP->fx_done)
7004 /* Nothing else to do here. */
7005 return;
7006
7007 gas_assert (fixP->fx_addsy != NULL);
7008 if (fixP->fx_r_type == BFD_RELOC_NONE)
7009 {
7010 const char *sfile;
7011 unsigned int sline;
7012
7013 /* Use expr_symbol_where to see if this is an expression
7014 symbol. */
7015 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7016 as_bad_where (fixP->fx_file, fixP->fx_line,
7017 _("unresolved expression that must be resolved"));
7018 else
7019 as_bad_where (fixP->fx_file, fixP->fx_line,
7020 _("unsupported relocation against %s"),
7021 S_GET_NAME (fixP->fx_addsy));
7022 fixP->fx_done = 1;
7023 return;
7024 }
7025 }
7026 else
7027 {
7028 /* Handle relocs in data. */
7029 switch (fixP->fx_r_type)
7030 {
7031 case BFD_RELOC_VTABLE_INHERIT:
7032 if (fixP->fx_addsy
7033 && !S_IS_DEFINED (fixP->fx_addsy)
7034 && !S_IS_WEAK (fixP->fx_addsy))
7035 S_SET_WEAK (fixP->fx_addsy);
7036 /* Fallthru */
7037
7038 case BFD_RELOC_VTABLE_ENTRY:
7039 fixP->fx_done = 0;
7040 break;
7041
7042#ifdef OBJ_ELF
7043 /* These can appear with @l etc. in data. */
7044 case BFD_RELOC_LO16:
7045 case BFD_RELOC_LO16_PCREL:
7046 case BFD_RELOC_HI16:
7047 case BFD_RELOC_HI16_PCREL:
7048 case BFD_RELOC_HI16_S:
7049 case BFD_RELOC_HI16_S_PCREL:
7050 case BFD_RELOC_PPC64_HIGHER:
7051 case BFD_RELOC_PPC64_HIGHER_S:
7052 case BFD_RELOC_PPC64_HIGHEST:
7053 case BFD_RELOC_PPC64_HIGHEST_S:
7054 case BFD_RELOC_PPC64_ADDR16_HIGH:
7055 case BFD_RELOC_PPC64_ADDR16_HIGHA:
7056 case BFD_RELOC_PPC64_ADDR64_LOCAL:
7057 break;
7058
7059 case BFD_RELOC_PPC_DTPMOD:
7060 case BFD_RELOC_PPC_TPREL:
7061 case BFD_RELOC_PPC_DTPREL:
7062 S_SET_THREAD_LOCAL (fixP->fx_addsy);
7063 break;
7064
7065 /* Just punt all of these to the linker. */
7066 case BFD_RELOC_PPC_B16_BRTAKEN:
7067 case BFD_RELOC_PPC_B16_BRNTAKEN:
7068 case BFD_RELOC_16_GOTOFF:
7069 case BFD_RELOC_LO16_GOTOFF:
7070 case BFD_RELOC_HI16_GOTOFF:
7071 case BFD_RELOC_HI16_S_GOTOFF:
7072 case BFD_RELOC_LO16_PLTOFF:
7073 case BFD_RELOC_HI16_PLTOFF:
7074 case BFD_RELOC_HI16_S_PLTOFF:
7075 case BFD_RELOC_PPC_COPY:
7076 case BFD_RELOC_PPC_GLOB_DAT:
7077 case BFD_RELOC_16_BASEREL:
7078 case BFD_RELOC_LO16_BASEREL:
7079 case BFD_RELOC_HI16_BASEREL:
7080 case BFD_RELOC_HI16_S_BASEREL:
7081 case BFD_RELOC_PPC_TLS:
7082 case BFD_RELOC_PPC_DTPREL16_LO:
7083 case BFD_RELOC_PPC_DTPREL16_HI:
7084 case BFD_RELOC_PPC_DTPREL16_HA:
7085 case BFD_RELOC_PPC_TPREL16_LO:
7086 case BFD_RELOC_PPC_TPREL16_HI:
7087 case BFD_RELOC_PPC_TPREL16_HA:
7088 case BFD_RELOC_PPC_GOT_TLSGD16:
7089 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
7090 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
7091 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
7092 case BFD_RELOC_PPC_GOT_TLSLD16:
7093 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
7094 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
7095 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
7096 case BFD_RELOC_PPC_GOT_DTPREL16:
7097 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
7098 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
7099 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
7100 case BFD_RELOC_PPC_GOT_TPREL16:
7101 case BFD_RELOC_PPC_GOT_TPREL16_LO:
7102 case BFD_RELOC_PPC_GOT_TPREL16_HI:
7103 case BFD_RELOC_PPC_GOT_TPREL16_HA:
7104 case BFD_RELOC_24_PLT_PCREL:
7105 case BFD_RELOC_PPC_LOCAL24PC:
7106 case BFD_RELOC_32_PLT_PCREL:
7107 case BFD_RELOC_GPREL16:
7108 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
7109 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
7110 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
7111 case BFD_RELOC_PPC_EMB_NADDR32:
7112 case BFD_RELOC_PPC_EMB_NADDR16:
7113 case BFD_RELOC_PPC_EMB_NADDR16_LO:
7114 case BFD_RELOC_PPC_EMB_NADDR16_HI:
7115 case BFD_RELOC_PPC_EMB_NADDR16_HA:
7116 case BFD_RELOC_PPC_EMB_SDAI16:
7117 case BFD_RELOC_PPC_EMB_SDA2REL:
7118 case BFD_RELOC_PPC_EMB_SDA2I16:
7119 case BFD_RELOC_PPC_EMB_SDA21:
7120 case BFD_RELOC_PPC_VLE_SDA21_LO:
7121 case BFD_RELOC_PPC_EMB_MRKREF:
7122 case BFD_RELOC_PPC_EMB_RELSEC16:
7123 case BFD_RELOC_PPC_EMB_RELST_LO:
7124 case BFD_RELOC_PPC_EMB_RELST_HI:
7125 case BFD_RELOC_PPC_EMB_RELST_HA:
7126 case BFD_RELOC_PPC_EMB_BIT_FLD:
7127 case BFD_RELOC_PPC_EMB_RELSDA:
7128 case BFD_RELOC_PPC64_TOC:
7129 case BFD_RELOC_PPC_TOC16:
7130 case BFD_RELOC_PPC64_TOC16_LO:
7131 case BFD_RELOC_PPC64_TOC16_HI:
7132 case BFD_RELOC_PPC64_TOC16_HA:
7133 case BFD_RELOC_PPC64_DTPREL16_HIGH:
7134 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
7135 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
7136 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
7137 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
7138 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7139 case BFD_RELOC_PPC64_TPREL16_HIGH:
7140 case BFD_RELOC_PPC64_TPREL16_HIGHA:
7141 case BFD_RELOC_PPC64_TPREL16_HIGHER:
7142 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
7143 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
7144 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
7145 fixP->fx_done = 0;
7146 break;
7147#endif
7148
7149#ifdef OBJ_XCOFF
7150 case BFD_RELOC_NONE:
7151#endif
7152 case BFD_RELOC_CTOR:
7153 case BFD_RELOC_32:
7154 case BFD_RELOC_32_PCREL:
7155 case BFD_RELOC_RVA:
7156 case BFD_RELOC_64:
7157 case BFD_RELOC_64_PCREL:
7158 case BFD_RELOC_16:
7159 case BFD_RELOC_16_PCREL:
7160 case BFD_RELOC_8:
7161 break;
7162
7163 default:
7164 fprintf (stderr,
7165 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
7166 fflush (stderr);
7167 abort ();
7168 }
7169
7170 if (fixP->fx_size && APPLY_RELOC)
7171 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7172 fieldval, fixP->fx_size);
7173 if (warn_476
7174 && (seg->flags & SEC_CODE) != 0
7175 && fixP->fx_size == 4
7176 && fixP->fx_done
7177 && !fixP->fx_tcbit
7178 && (fixP->fx_r_type == BFD_RELOC_32
7179 || fixP->fx_r_type == BFD_RELOC_CTOR
7180 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7181 as_warn_where (fixP->fx_file, fixP->fx_line,
7182 _("data in executable section"));
7183 }
7184
7185#ifdef OBJ_ELF
7186 ppc_elf_validate_fix (fixP, seg);
7187 fixP->fx_addnumber = value;
7188
7189 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7190 from the section contents. If we are going to be emitting a reloc
7191 then the section contents are immaterial, so don't warn if they
7192 happen to overflow. Leave such warnings to ld. */
7193 if (!fixP->fx_done)
7194 {
7195 fixP->fx_no_overflow = 1;
7196
7197 /* Arrange to emit .TOC. as a normal symbol if used in anything
7198 but .TOC.@tocbase. */
7199 if (ppc_obj64
7200 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7201 && fixP->fx_addsy != NULL
7202 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7203 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7204 }
7205#else
7206 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7207 fixP->fx_addnumber = 0;
7208 else
7209 {
7210#ifdef TE_PE
7211 fixP->fx_addnumber = 0;
7212#else
7213 /* We want to use the offset within the toc, not the actual VMA
7214 of the symbol. */
7215 fixP->fx_addnumber =
7216 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7217 - S_GET_VALUE (ppc_toc_csect);
7218 /* Set *valP to avoid errors. */
7219 *valP = value;
7220#endif
7221 }
7222#endif
7223}
7224
7225/* Generate a reloc for a fixup. */
7226
7227arelent *
7228tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7229{
7230 arelent *reloc;
7231
7232 reloc = XNEW (arelent);
7233
7234 reloc->sym_ptr_ptr = XNEW (asymbol *);
7235 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7236 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7237 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7238 if (reloc->howto == (reloc_howto_type *) NULL)
7239 {
7240 as_bad_where (fixp->fx_file, fixp->fx_line,
7241 _("reloc %d not supported by object file format"),
7242 (int) fixp->fx_r_type);
7243 return NULL;
7244 }
7245 reloc->addend = fixp->fx_addnumber;
7246
7247 return reloc;
7248}
7249
7250void
7251ppc_cfi_frame_initial_instructions (void)
7252{
7253 cfi_add_CFA_def_cfa (1, 0);
7254}
7255
7256int
7257tc_ppc_regname_to_dw2regnum (char *regname)
7258{
7259 unsigned int regnum = -1;
7260 unsigned int i;
7261 const char *p;
7262 char *q;
7263 static struct { const char *name; int dw2regnum; } regnames[] =
7264 {
7265 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7266 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7267 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7268 { "spe_acc", 111 }, { "spefscr", 112 }
7269 };
7270
7271 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7272 if (strcmp (regnames[i].name, regname) == 0)
7273 return regnames[i].dw2regnum;
7274
7275 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7276 {
7277 p = regname + 1 + (regname[1] == '.');
7278 regnum = strtoul (p, &q, 10);
7279 if (p == q || *q || regnum >= 32)
7280 return -1;
7281 if (regname[0] == 'f')
7282 regnum += 32;
7283 else if (regname[0] == 'v')
7284 regnum += 77;
7285 }
7286 else if (regname[0] == 'c' && regname[1] == 'r')
7287 {
7288 p = regname + 2 + (regname[2] == '.');
7289 if (p[0] < '0' || p[0] > '7' || p[1])
7290 return -1;
7291 regnum = p[0] - '0' + 68;
7292 }
7293 return regnum;
7294}
GDB Binutils - Deliverables
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