| 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
| 2 | Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation. |
| 3 | |
| 4 | This file is part of GAS, the GNU Assembler. |
| 5 | |
| 6 | GAS is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2, or (at your option) |
| 9 | any later version. |
| 10 | |
| 11 | GAS is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with GAS; see the file COPYING. If not, write to |
| 18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
| 19 | Boston, MA 02111-1307, USA. */ |
| 20 | |
| 21 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
| 22 | |
| 23 | #include <stdio.h> |
| 24 | #include "as.h" |
| 25 | #include "bfd.h" |
| 26 | #include "subsegs.h" |
| 27 | #define DEFINE_TABLE |
| 28 | #include "opcodes/sh-opc.h" |
| 29 | #include <ctype.h> |
| 30 | #include "struc-symbol.h" |
| 31 | |
| 32 | #ifdef OBJ_ELF |
| 33 | #include "elf/sh.h" |
| 34 | #endif |
| 35 | |
| 36 | #include "dwarf2dbg.h" |
| 37 | struct dwarf2_line_info debug_line; |
| 38 | |
| 39 | const char comment_chars[] = "!"; |
| 40 | const char line_separator_chars[] = ";"; |
| 41 | const char line_comment_chars[] = "!#"; |
| 42 | |
| 43 | static void s_uses PARAMS ((int)); |
| 44 | |
| 45 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); |
| 46 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); |
| 47 | |
| 48 | void cons (); |
| 49 | void s_align_bytes (); |
| 50 | static void s_uacons PARAMS ((int)); |
| 51 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
| 52 | static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *)); |
| 53 | |
| 54 | #ifdef OBJ_ELF |
| 55 | static void sh_elf_cons PARAMS ((int)); |
| 56 | |
| 57 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
| 58 | #endif |
| 59 | |
| 60 | int shl = 0; |
| 61 | |
| 62 | static void |
| 63 | little (ignore) |
| 64 | int ignore ATTRIBUTE_UNUSED; |
| 65 | { |
| 66 | shl = 1; |
| 67 | target_big_endian = 0; |
| 68 | } |
| 69 | |
| 70 | /* This table describes all the machine specific pseudo-ops the assembler |
| 71 | has to support. The fields are: |
| 72 | pseudo-op name without dot |
| 73 | function to call to execute this pseudo-op |
| 74 | Integer arg to pass to the function. */ |
| 75 | |
| 76 | const pseudo_typeS md_pseudo_table[] = |
| 77 | { |
| 78 | #ifdef OBJ_ELF |
| 79 | {"long", sh_elf_cons, 4}, |
| 80 | {"int", sh_elf_cons, 4}, |
| 81 | {"word", sh_elf_cons, 2}, |
| 82 | {"short", sh_elf_cons, 2}, |
| 83 | #else |
| 84 | {"int", cons, 4}, |
| 85 | {"word", cons, 2}, |
| 86 | #endif /* OBJ_ELF */ |
| 87 | {"form", listing_psize, 0}, |
| 88 | {"little", little, 0}, |
| 89 | {"heading", listing_title, 0}, |
| 90 | {"import", s_ignore, 0}, |
| 91 | {"page", listing_eject, 0}, |
| 92 | {"program", s_ignore, 0}, |
| 93 | {"uses", s_uses, 0}, |
| 94 | {"uaword", s_uacons, 2}, |
| 95 | {"ualong", s_uacons, 4}, |
| 96 | { "file", dwarf2_directive_file, 0 }, |
| 97 | { "loc", dwarf2_directive_loc, 0 }, |
| 98 | {0, 0, 0} |
| 99 | }; |
| 100 | |
| 101 | /*int md_reloc_size; */ |
| 102 | |
| 103 | int sh_relax; /* set if -relax seen */ |
| 104 | |
| 105 | /* Whether -small was seen. */ |
| 106 | |
| 107 | int sh_small; |
| 108 | |
| 109 | /* Whether -dsp was seen. */ |
| 110 | |
| 111 | static int sh_dsp; |
| 112 | |
| 113 | /* The bit mask of architectures that could |
| 114 | accomodate the insns seen so far. */ |
| 115 | static int valid_arch; |
| 116 | |
| 117 | const char EXP_CHARS[] = "eE"; |
| 118 | |
| 119 | /* Chars that mean this number is a floating point constant. */ |
| 120 | /* As in 0f12.456 */ |
| 121 | /* or 0d1.2345e12 */ |
| 122 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
| 123 | |
| 124 | #define C(a,b) ENCODE_RELAX(a,b) |
| 125 | |
| 126 | #define JREG 14 /* Register used as a temp when relaxing */ |
| 127 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
| 128 | #define GET_WHAT(x) ((x>>4)) |
| 129 | |
| 130 | /* These are the three types of relaxable instrction. */ |
| 131 | #define COND_JUMP 1 |
| 132 | #define COND_JUMP_DELAY 2 |
| 133 | #define UNCOND_JUMP 3 |
| 134 | #define END 4 |
| 135 | |
| 136 | #define UNDEF_DISP 0 |
| 137 | #define COND8 1 |
| 138 | #define COND12 2 |
| 139 | #define COND32 3 |
| 140 | #define UNCOND12 1 |
| 141 | #define UNCOND32 2 |
| 142 | #define UNDEF_WORD_DISP 4 |
| 143 | |
| 144 | #define UNCOND12 1 |
| 145 | #define UNCOND32 2 |
| 146 | |
| 147 | /* Branch displacements are from the address of the branch plus |
| 148 | four, thus all minimum and maximum values have 4 added to them. */ |
| 149 | #define COND8_F 258 |
| 150 | #define COND8_M -252 |
| 151 | #define COND8_LENGTH 2 |
| 152 | |
| 153 | /* There is one extra instruction before the branch, so we must add |
| 154 | two more bytes to account for it. */ |
| 155 | #define COND12_F 4100 |
| 156 | #define COND12_M -4090 |
| 157 | #define COND12_LENGTH 6 |
| 158 | |
| 159 | #define COND12_DELAY_LENGTH 4 |
| 160 | |
| 161 | /* ??? The minimum and maximum values are wrong, but this does not matter |
| 162 | since this relocation type is not supported yet. */ |
| 163 | #define COND32_F (1<<30) |
| 164 | #define COND32_M -(1<<30) |
| 165 | #define COND32_LENGTH 14 |
| 166 | |
| 167 | #define UNCOND12_F 4098 |
| 168 | #define UNCOND12_M -4092 |
| 169 | #define UNCOND12_LENGTH 2 |
| 170 | |
| 171 | /* ??? The minimum and maximum values are wrong, but this does not matter |
| 172 | since this relocation type is not supported yet. */ |
| 173 | #define UNCOND32_F (1<<30) |
| 174 | #define UNCOND32_M -(1<<30) |
| 175 | #define UNCOND32_LENGTH 14 |
| 176 | |
| 177 | #define EMPTY { 0, 0, 0, 0 } |
| 178 | |
| 179 | const relax_typeS md_relax_table[C (END, 0)] = { |
| 180 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
| 181 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
| 182 | |
| 183 | EMPTY, |
| 184 | /* C (COND_JUMP, COND8) */ |
| 185 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, |
| 186 | /* C (COND_JUMP, COND12) */ |
| 187 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, |
| 188 | /* C (COND_JUMP, COND32) */ |
| 189 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, |
| 190 | EMPTY, EMPTY, EMPTY, EMPTY, |
| 191 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
| 192 | |
| 193 | EMPTY, |
| 194 | /* C (COND_JUMP_DELAY, COND8) */ |
| 195 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, |
| 196 | /* C (COND_JUMP_DELAY, COND12) */ |
| 197 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, |
| 198 | /* C (COND_JUMP_DELAY, COND32) */ |
| 199 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, |
| 200 | EMPTY, EMPTY, EMPTY, EMPTY, |
| 201 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
| 202 | |
| 203 | EMPTY, |
| 204 | /* C (UNCOND_JUMP, UNCOND12) */ |
| 205 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, |
| 206 | /* C (UNCOND_JUMP, UNCOND32) */ |
| 207 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, |
| 208 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
| 209 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
| 210 | }; |
| 211 | |
| 212 | #undef EMPTY |
| 213 | |
| 214 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
| 215 | |
| 216 | \f |
| 217 | #ifdef OBJ_ELF |
| 218 | /* Parse @got, etc. and return the desired relocation. |
| 219 | If we have additional arithmetic expression, then we fill in new_exp_p. */ |
| 220 | static bfd_reloc_code_real_type |
| 221 | sh_elf_suffix (str_p, exp_p, new_exp_p) |
| 222 | char **str_p; |
| 223 | expressionS *exp_p, *new_exp_p; |
| 224 | { |
| 225 | struct map_bfd { |
| 226 | char *string; |
| 227 | int length; |
| 228 | bfd_reloc_code_real_type reloc; |
| 229 | }; |
| 230 | |
| 231 | char ident[20]; |
| 232 | char *str = *str_p; |
| 233 | char *str2; |
| 234 | int ch; |
| 235 | int len; |
| 236 | struct map_bfd *ptr; |
| 237 | |
| 238 | #define MAP(str,reloc) { str, sizeof(str)-1, reloc } |
| 239 | |
| 240 | static struct map_bfd mapping[] = { |
| 241 | MAP ("got", BFD_RELOC_32_GOT_PCREL), |
| 242 | MAP ("plt", BFD_RELOC_32_PLT_PCREL), |
| 243 | MAP ("gotoff", BFD_RELOC_32_GOTOFF), |
| 244 | { (char *)0, 0, BFD_RELOC_UNUSED } |
| 245 | }; |
| 246 | |
| 247 | if (*str++ != '@') |
| 248 | return BFD_RELOC_UNUSED; |
| 249 | |
| 250 | for (ch = *str, str2 = ident; |
| 251 | (str2 < ident + sizeof (ident) - 1 |
| 252 | && (isalnum (ch) || ch == '@')); |
| 253 | ch = *++str) |
| 254 | { |
| 255 | *str2++ = (islower (ch)) ? ch : tolower (ch); |
| 256 | } |
| 257 | |
| 258 | *str2 = '\0'; |
| 259 | len = str2 - ident; |
| 260 | |
| 261 | ch = ident[0]; |
| 262 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) |
| 263 | if (ch == ptr->string[0] |
| 264 | && len == ptr->length |
| 265 | && memcmp (ident, ptr->string, ptr->length) == 0) |
| 266 | { |
| 267 | /* Now check for identifier@suffix+constant */ |
| 268 | if (*str == '-' || *str == '+') |
| 269 | { |
| 270 | char *orig_line = input_line_pointer; |
| 271 | |
| 272 | input_line_pointer = str; |
| 273 | expression (new_exp_p); |
| 274 | if (new_exp_p->X_op == O_constant) |
| 275 | { |
| 276 | exp_p->X_add_number += new_exp_p->X_add_number; |
| 277 | str = input_line_pointer; |
| 278 | } |
| 279 | if (new_exp_p->X_op == O_subtract) |
| 280 | str = input_line_pointer; |
| 281 | |
| 282 | if (&input_line_pointer != str_p) |
| 283 | input_line_pointer = orig_line; |
| 284 | } |
| 285 | |
| 286 | *str_p = str; |
| 287 | return ptr->reloc; |
| 288 | } |
| 289 | |
| 290 | return BFD_RELOC_UNUSED; |
| 291 | } |
| 292 | |
| 293 | /* The regular cons() function, that reads constants, doesn't support |
| 294 | suffixes such as @GOT, @GOTOFF and @PLT, that generate |
| 295 | machine-specific relocation types. So we must define it here. */ |
| 296 | /* Clobbers input_line_pointer, checks end-of-line. */ |
| 297 | static void |
| 298 | sh_elf_cons (nbytes) |
| 299 | register int nbytes; /* 1=.byte, 2=.word, 4=.long */ |
| 300 | { |
| 301 | expressionS exp, new_exp; |
| 302 | bfd_reloc_code_real_type reloc; |
| 303 | const char *name; |
| 304 | |
| 305 | if (is_it_end_of_statement ()) |
| 306 | { |
| 307 | demand_empty_rest_of_line (); |
| 308 | return; |
| 309 | } |
| 310 | |
| 311 | do |
| 312 | { |
| 313 | expression (&exp); |
| 314 | new_exp.X_op = O_absent; |
| 315 | new_exp.X_add_symbol = new_exp.X_op_symbol = NULL; |
| 316 | /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet, |
| 317 | use the name of the symbol to tell whether it's the |
| 318 | _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is |
| 319 | sufficient. */ |
| 320 | if (! GOT_symbol && exp.X_add_symbol) |
| 321 | name = S_GET_NAME (exp.X_add_symbol); |
| 322 | else |
| 323 | name = NULL; |
| 324 | /* Check whether this expression involves the |
| 325 | _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a |
| 326 | difference of two other symbols. */ |
| 327 | if (((GOT_symbol && GOT_symbol == exp.X_add_symbol) |
| 328 | || (! GOT_symbol && name |
| 329 | && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)) |
| 330 | && (exp.X_op == O_symbol |
| 331 | || (exp.X_op == O_add |
| 332 | && ((symbol_get_value_expression (exp.X_op_symbol)->X_op) |
| 333 | == O_subtract)))) |
| 334 | { |
| 335 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, |
| 336 | BFD_RELOC_32); |
| 337 | int size = bfd_get_reloc_size (reloc_howto); |
| 338 | |
| 339 | if (GOT_symbol == NULL) |
| 340 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); |
| 341 | |
| 342 | if (size > nbytes) |
| 343 | as_bad (_("%s relocations do not fit in %d bytes\n"), |
| 344 | reloc_howto->name, nbytes); |
| 345 | else |
| 346 | { |
| 347 | register char *p = frag_more ((int) nbytes); |
| 348 | int offset = nbytes - size; |
| 349 | |
| 350 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, |
| 351 | size, &exp, 0, TC_RELOC_GLOBAL_OFFSET_TABLE); |
| 352 | } |
| 353 | } |
| 354 | /* Check if this symbol involves one of the magic suffixes, such |
| 355 | as @GOT, @GOTOFF or @PLT, and determine which relocation type |
| 356 | to use. */ |
| 357 | else if ((exp.X_op == O_symbol || (exp.X_op == O_add && exp.X_op_symbol)) |
| 358 | && *input_line_pointer == '@' |
| 359 | && ((reloc = sh_elf_suffix (&input_line_pointer, &exp, &new_exp)) |
| 360 | != BFD_RELOC_UNUSED)) |
| 361 | { |
| 362 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, |
| 363 | reloc); |
| 364 | int size = bfd_get_reloc_size (reloc_howto); |
| 365 | |
| 366 | /* Force a GOT to be generated. */ |
| 367 | if (GOT_symbol == NULL) |
| 368 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); |
| 369 | |
| 370 | if (size > nbytes) |
| 371 | as_bad (_("%s relocations do not fit in %d bytes\n"), |
| 372 | reloc_howto->name, nbytes); |
| 373 | else |
| 374 | { |
| 375 | register char *p = frag_more ((int) nbytes); |
| 376 | int offset = nbytes - size; |
| 377 | |
| 378 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
| 379 | &exp, 0, reloc); |
| 380 | if (new_exp.X_op != O_absent) |
| 381 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
| 382 | &new_exp, 0, BFD_RELOC_32); |
| 383 | } |
| 384 | } |
| 385 | else |
| 386 | emit_expr (&exp, (unsigned int) nbytes); |
| 387 | } |
| 388 | while (*input_line_pointer++ == ','); |
| 389 | |
| 390 | input_line_pointer--; /* Put terminator back into stream. */ |
| 391 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
| 392 | { |
| 393 | while (! is_end_of_line[*input_line_pointer++]); |
| 394 | } |
| 395 | else |
| 396 | demand_empty_rest_of_line (); |
| 397 | } |
| 398 | #endif /* OBJ_ELF */ |
| 399 | |
| 400 | \f |
| 401 | /* This function is called once, at assembler startup time. This should |
| 402 | set up all the tables, etc that the MD part of the assembler needs. */ |
| 403 | |
| 404 | void |
| 405 | md_begin () |
| 406 | { |
| 407 | sh_opcode_info *opcode; |
| 408 | char *prev_name = ""; |
| 409 | int target_arch; |
| 410 | |
| 411 | #ifdef TE_PE |
| 412 | /* The WinCE OS only supports little endian executables. */ |
| 413 | target_big_endian = 0; |
| 414 | #else |
| 415 | if (! shl) |
| 416 | target_big_endian = 1; |
| 417 | #endif |
| 418 | |
| 419 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
| 420 | valid_arch = target_arch; |
| 421 | |
| 422 | opcode_hash_control = hash_new (); |
| 423 | |
| 424 | /* Insert unique names into hash table. */ |
| 425 | for (opcode = sh_table; opcode->name; opcode++) |
| 426 | { |
| 427 | if (strcmp (prev_name, opcode->name)) |
| 428 | { |
| 429 | if (! (opcode->arch & target_arch)) |
| 430 | continue; |
| 431 | prev_name = opcode->name; |
| 432 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); |
| 433 | } |
| 434 | else |
| 435 | { |
| 436 | /* Make all the opcodes with the same name point to the same |
| 437 | string. */ |
| 438 | opcode->name = prev_name; |
| 439 | } |
| 440 | } |
| 441 | } |
| 442 | |
| 443 | static int reg_m; |
| 444 | static int reg_n; |
| 445 | static int reg_x, reg_y; |
| 446 | static int reg_efg; |
| 447 | static int reg_b; |
| 448 | |
| 449 | typedef struct |
| 450 | { |
| 451 | sh_arg_type type; |
| 452 | int reg; |
| 453 | expressionS immediate; |
| 454 | } |
| 455 | sh_operand_info; |
| 456 | |
| 457 | #define IDENT_CHAR(c) (isalnum (c) || (c) == '_') |
| 458 | |
| 459 | /* Try to parse a reg name. Return the number of chars consumed. */ |
| 460 | |
| 461 | static int |
| 462 | parse_reg (src, mode, reg) |
| 463 | char *src; |
| 464 | int *mode; |
| 465 | int *reg; |
| 466 | { |
| 467 | /* We use ! IDENT_CHAR for the next character after the register name, to |
| 468 | make sure that we won't accidentally recognize a symbol name such as |
| 469 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
| 470 | |
| 471 | if (src[0] == 'r') |
| 472 | { |
| 473 | if (src[1] == '1') |
| 474 | { |
| 475 | if (src[2] >= '0' && src[2] <= '5' |
| 476 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 477 | { |
| 478 | *mode = A_REG_N; |
| 479 | *reg = 10 + src[2] - '0'; |
| 480 | return 3; |
| 481 | } |
| 482 | } |
| 483 | if (src[1] >= '0' && src[1] <= '9' |
| 484 | && ! IDENT_CHAR ((unsigned char) src[2])) |
| 485 | { |
| 486 | *mode = A_REG_N; |
| 487 | *reg = (src[1] - '0'); |
| 488 | return 2; |
| 489 | } |
| 490 | if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0 |
| 491 | && ! IDENT_CHAR ((unsigned char) src[7])) |
| 492 | { |
| 493 | *mode = A_REG_B; |
| 494 | *reg = (src[1] - '0'); |
| 495 | return 7; |
| 496 | } |
| 497 | |
| 498 | if (src[1] == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
| 499 | { |
| 500 | *mode = A_RE; |
| 501 | return 2; |
| 502 | } |
| 503 | if (src[1] == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
| 504 | { |
| 505 | *mode = A_RS; |
| 506 | return 2; |
| 507 | } |
| 508 | } |
| 509 | |
| 510 | if (src[0] == 'a') |
| 511 | { |
| 512 | if (src[1] == '0') |
| 513 | { |
| 514 | if (! IDENT_CHAR ((unsigned char) src[2])) |
| 515 | { |
| 516 | *mode = DSP_REG_N; |
| 517 | *reg = A_A0_NUM; |
| 518 | return 2; |
| 519 | } |
| 520 | if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
| 521 | { |
| 522 | *mode = DSP_REG_N; |
| 523 | *reg = A_A0G_NUM; |
| 524 | return 3; |
| 525 | } |
| 526 | } |
| 527 | if (src[1] == '1') |
| 528 | { |
| 529 | if (! IDENT_CHAR ((unsigned char) src[2])) |
| 530 | { |
| 531 | *mode = DSP_REG_N; |
| 532 | *reg = A_A1_NUM; |
| 533 | return 2; |
| 534 | } |
| 535 | if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
| 536 | { |
| 537 | *mode = DSP_REG_N; |
| 538 | *reg = A_A1G_NUM; |
| 539 | return 3; |
| 540 | } |
| 541 | } |
| 542 | |
| 543 | if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1' |
| 544 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 545 | { |
| 546 | *mode = A_REG_N; |
| 547 | *reg = 4 + (src[1] - '0'); |
| 548 | return 3; |
| 549 | } |
| 550 | if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1' |
| 551 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 552 | { |
| 553 | *mode = A_REG_N; |
| 554 | *reg = 6 + (src[1] - '0'); |
| 555 | return 3; |
| 556 | } |
| 557 | if (src[1] == 's' && src[2] >= '0' && src[2] <= '3' |
| 558 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 559 | { |
| 560 | int n = src[1] - '0'; |
| 561 | |
| 562 | *mode = A_REG_N; |
| 563 | *reg = n | ((~n & 2) << 1); |
| 564 | return 3; |
| 565 | } |
| 566 | } |
| 567 | |
| 568 | if (src[0] == 'i' && src[1] && ! IDENT_CHAR ((unsigned char) src[3])) |
| 569 | { |
| 570 | if (src[1] == 's') |
| 571 | { |
| 572 | *mode = A_REG_N; |
| 573 | *reg = 8; |
| 574 | return 2; |
| 575 | } |
| 576 | if (src[1] == 'x') |
| 577 | { |
| 578 | *mode = A_REG_N; |
| 579 | *reg = 8; |
| 580 | return 2; |
| 581 | } |
| 582 | if (src[1] == 'y') |
| 583 | { |
| 584 | *mode = A_REG_N; |
| 585 | *reg = 9; |
| 586 | return 2; |
| 587 | } |
| 588 | } |
| 589 | |
| 590 | if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1' |
| 591 | && ! IDENT_CHAR ((unsigned char) src[2])) |
| 592 | { |
| 593 | *mode = DSP_REG_N; |
| 594 | *reg = A_X0_NUM + src[1] - '0'; |
| 595 | return 2; |
| 596 | } |
| 597 | |
| 598 | if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1' |
| 599 | && ! IDENT_CHAR ((unsigned char) src[2])) |
| 600 | { |
| 601 | *mode = DSP_REG_N; |
| 602 | *reg = A_Y0_NUM + src[1] - '0'; |
| 603 | return 2; |
| 604 | } |
| 605 | |
| 606 | if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1' |
| 607 | && ! IDENT_CHAR ((unsigned char) src[2])) |
| 608 | { |
| 609 | *mode = DSP_REG_N; |
| 610 | *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM; |
| 611 | return 2; |
| 612 | } |
| 613 | |
| 614 | if (src[0] == 's' |
| 615 | && src[1] == 's' |
| 616 | && src[2] == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
| 617 | { |
| 618 | *mode = A_SSR; |
| 619 | return 3; |
| 620 | } |
| 621 | |
| 622 | if (src[0] == 's' && src[1] == 'p' && src[2] == 'c' |
| 623 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 624 | { |
| 625 | *mode = A_SPC; |
| 626 | return 3; |
| 627 | } |
| 628 | |
| 629 | if (src[0] == 's' && src[1] == 'g' && src[2] == 'r' |
| 630 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 631 | { |
| 632 | *mode = A_SGR; |
| 633 | return 3; |
| 634 | } |
| 635 | |
| 636 | if (src[0] == 'd' && src[1] == 's' && src[2] == 'r' |
| 637 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 638 | { |
| 639 | *mode = A_DSR; |
| 640 | return 3; |
| 641 | } |
| 642 | |
| 643 | if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r' |
| 644 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 645 | { |
| 646 | *mode = A_DBR; |
| 647 | return 3; |
| 648 | } |
| 649 | |
| 650 | if (src[0] == 's' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
| 651 | { |
| 652 | *mode = A_SR; |
| 653 | return 2; |
| 654 | } |
| 655 | |
| 656 | if (src[0] == 's' && src[1] == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
| 657 | { |
| 658 | *mode = A_REG_N; |
| 659 | *reg = 15; |
| 660 | return 2; |
| 661 | } |
| 662 | |
| 663 | if (src[0] == 'p' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
| 664 | { |
| 665 | *mode = A_PR; |
| 666 | return 2; |
| 667 | } |
| 668 | if (src[0] == 'p' && src[1] == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
| 669 | { |
| 670 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
| 671 | and use an uninitialized immediate. */ |
| 672 | *mode = A_PC; |
| 673 | return 2; |
| 674 | } |
| 675 | if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r' |
| 676 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 677 | { |
| 678 | *mode = A_GBR; |
| 679 | return 3; |
| 680 | } |
| 681 | if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r' |
| 682 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 683 | { |
| 684 | *mode = A_VBR; |
| 685 | return 3; |
| 686 | } |
| 687 | |
| 688 | if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c' |
| 689 | && ! IDENT_CHAR ((unsigned char) src[4])) |
| 690 | { |
| 691 | if (src[3] == 'l') |
| 692 | { |
| 693 | *mode = A_MACL; |
| 694 | return 4; |
| 695 | } |
| 696 | if (src[3] == 'h') |
| 697 | { |
| 698 | *mode = A_MACH; |
| 699 | return 4; |
| 700 | } |
| 701 | } |
| 702 | if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd' |
| 703 | && ! IDENT_CHAR ((unsigned char) src[4])) |
| 704 | { |
| 705 | *mode = A_MOD; |
| 706 | return 3; |
| 707 | } |
| 708 | if (src[0] == 'f' && src[1] == 'r') |
| 709 | { |
| 710 | if (src[2] == '1') |
| 711 | { |
| 712 | if (src[3] >= '0' && src[3] <= '5' |
| 713 | && ! IDENT_CHAR ((unsigned char) src[4])) |
| 714 | { |
| 715 | *mode = F_REG_N; |
| 716 | *reg = 10 + src[3] - '0'; |
| 717 | return 4; |
| 718 | } |
| 719 | } |
| 720 | if (src[2] >= '0' && src[2] <= '9' |
| 721 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 722 | { |
| 723 | *mode = F_REG_N; |
| 724 | *reg = (src[2] - '0'); |
| 725 | return 3; |
| 726 | } |
| 727 | } |
| 728 | if (src[0] == 'd' && src[1] == 'r') |
| 729 | { |
| 730 | if (src[2] == '1') |
| 731 | { |
| 732 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) |
| 733 | && ! IDENT_CHAR ((unsigned char) src[4])) |
| 734 | { |
| 735 | *mode = D_REG_N; |
| 736 | *reg = 10 + src[3] - '0'; |
| 737 | return 4; |
| 738 | } |
| 739 | } |
| 740 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) |
| 741 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 742 | { |
| 743 | *mode = D_REG_N; |
| 744 | *reg = (src[2] - '0'); |
| 745 | return 3; |
| 746 | } |
| 747 | } |
| 748 | if (src[0] == 'x' && src[1] == 'd') |
| 749 | { |
| 750 | if (src[2] == '1') |
| 751 | { |
| 752 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) |
| 753 | && ! IDENT_CHAR ((unsigned char) src[4])) |
| 754 | { |
| 755 | *mode = X_REG_N; |
| 756 | *reg = 11 + src[3] - '0'; |
| 757 | return 4; |
| 758 | } |
| 759 | } |
| 760 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) |
| 761 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 762 | { |
| 763 | *mode = X_REG_N; |
| 764 | *reg = (src[2] - '0') + 1; |
| 765 | return 3; |
| 766 | } |
| 767 | } |
| 768 | if (src[0] == 'f' && src[1] == 'v') |
| 769 | { |
| 770 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
| 771 | { |
| 772 | *mode = V_REG_N; |
| 773 | *reg = 12; |
| 774 | return 4; |
| 775 | } |
| 776 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') |
| 777 | && ! IDENT_CHAR ((unsigned char) src[3])) |
| 778 | { |
| 779 | *mode = V_REG_N; |
| 780 | *reg = (src[2] - '0'); |
| 781 | return 3; |
| 782 | } |
| 783 | } |
| 784 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l' |
| 785 | && ! IDENT_CHAR ((unsigned char) src[4])) |
| 786 | { |
| 787 | *mode = FPUL_N; |
| 788 | return 4; |
| 789 | } |
| 790 | |
| 791 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c' |
| 792 | && src[4] == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) |
| 793 | { |
| 794 | *mode = FPSCR_N; |
| 795 | return 5; |
| 796 | } |
| 797 | |
| 798 | if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r' |
| 799 | && src[4] == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) |
| 800 | { |
| 801 | *mode = XMTRX_M4; |
| 802 | return 5; |
| 803 | } |
| 804 | |
| 805 | return 0; |
| 806 | } |
| 807 | |
| 808 | static symbolS * |
| 809 | dot () |
| 810 | { |
| 811 | const char *fake; |
| 812 | |
| 813 | /* JF: '.' is pseudo symbol with value of current location |
| 814 | in current segment. */ |
| 815 | fake = FAKE_LABEL_NAME; |
| 816 | return symbol_new (fake, |
| 817 | now_seg, |
| 818 | (valueT) frag_now_fix (), |
| 819 | frag_now); |
| 820 | } |
| 821 | |
| 822 | static char * |
| 823 | parse_exp (s, op) |
| 824 | char *s; |
| 825 | sh_operand_info *op; |
| 826 | { |
| 827 | char *save; |
| 828 | char *new; |
| 829 | |
| 830 | save = input_line_pointer; |
| 831 | input_line_pointer = s; |
| 832 | expression (&op->immediate); |
| 833 | if (op->immediate.X_op == O_absent) |
| 834 | as_bad (_("missing operand")); |
| 835 | new = input_line_pointer; |
| 836 | input_line_pointer = save; |
| 837 | return new; |
| 838 | } |
| 839 | |
| 840 | /* The many forms of operand: |
| 841 | |
| 842 | Rn Register direct |
| 843 | @Rn Register indirect |
| 844 | @Rn+ Autoincrement |
| 845 | @-Rn Autodecrement |
| 846 | @(disp:4,Rn) |
| 847 | @(disp:8,GBR) |
| 848 | @(disp:8,PC) |
| 849 | |
| 850 | @(R0,Rn) |
| 851 | @(R0,GBR) |
| 852 | |
| 853 | disp:8 |
| 854 | disp:12 |
| 855 | #imm8 |
| 856 | pr, gbr, vbr, macl, mach |
| 857 | */ |
| 858 | |
| 859 | static char * |
| 860 | parse_at (src, op) |
| 861 | char *src; |
| 862 | sh_operand_info *op; |
| 863 | { |
| 864 | int len; |
| 865 | int mode; |
| 866 | src++; |
| 867 | if (src[0] == '-') |
| 868 | { |
| 869 | /* Must be predecrement. */ |
| 870 | src++; |
| 871 | |
| 872 | len = parse_reg (src, &mode, &(op->reg)); |
| 873 | if (mode != A_REG_N) |
| 874 | as_bad (_("illegal register after @-")); |
| 875 | |
| 876 | op->type = A_DEC_N; |
| 877 | src += len; |
| 878 | } |
| 879 | else if (src[0] == '(') |
| 880 | { |
| 881 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or |
| 882 | @(r0, rn) */ |
| 883 | src++; |
| 884 | len = parse_reg (src, &mode, &(op->reg)); |
| 885 | if (len && mode == A_REG_N) |
| 886 | { |
| 887 | src += len; |
| 888 | if (op->reg != 0) |
| 889 | { |
| 890 | as_bad (_("must be @(r0,...)")); |
| 891 | } |
| 892 | if (src[0] == ',') |
| 893 | src++; |
| 894 | /* Now can be rn or gbr */ |
| 895 | len = parse_reg (src, &mode, &(op->reg)); |
| 896 | if (mode == A_GBR) |
| 897 | { |
| 898 | op->type = A_R0_GBR; |
| 899 | } |
| 900 | else if (mode == A_REG_N) |
| 901 | { |
| 902 | op->type = A_IND_R0_REG_N; |
| 903 | } |
| 904 | else |
| 905 | { |
| 906 | as_bad (_("syntax error in @(r0,...)")); |
| 907 | } |
| 908 | } |
| 909 | else |
| 910 | { |
| 911 | /* Must be an @(disp,.. thing) */ |
| 912 | src = parse_exp (src, op); |
| 913 | if (src[0] == ',') |
| 914 | src++; |
| 915 | /* Now can be rn, gbr or pc */ |
| 916 | len = parse_reg (src, &mode, &op->reg); |
| 917 | if (len) |
| 918 | { |
| 919 | if (mode == A_REG_N) |
| 920 | { |
| 921 | op->type = A_DISP_REG_N; |
| 922 | } |
| 923 | else if (mode == A_GBR) |
| 924 | { |
| 925 | op->type = A_DISP_GBR; |
| 926 | } |
| 927 | else if (mode == A_PC) |
| 928 | { |
| 929 | /* Turn a plain @(4,pc) into @(.+4,pc). */ |
| 930 | if (op->immediate.X_op == O_constant) |
| 931 | { |
| 932 | op->immediate.X_add_symbol = dot(); |
| 933 | op->immediate.X_op = O_symbol; |
| 934 | } |
| 935 | op->type = A_DISP_PC; |
| 936 | } |
| 937 | else |
| 938 | { |
| 939 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); |
| 940 | } |
| 941 | } |
| 942 | else |
| 943 | { |
| 944 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); |
| 945 | } |
| 946 | } |
| 947 | src += len; |
| 948 | if (src[0] != ')') |
| 949 | as_bad (_("expecting )")); |
| 950 | else |
| 951 | src++; |
| 952 | } |
| 953 | else |
| 954 | { |
| 955 | src += parse_reg (src, &mode, &(op->reg)); |
| 956 | if (mode != A_REG_N) |
| 957 | { |
| 958 | as_bad (_("illegal register after @")); |
| 959 | } |
| 960 | if (src[0] == '+') |
| 961 | { |
| 962 | src++; |
| 963 | if ((src[0] == 'r' && src[1] == '8') |
| 964 | || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's'))) |
| 965 | { |
| 966 | src += 2; |
| 967 | op->type = A_PMOD_N; |
| 968 | } |
| 969 | if ((src[0] == 'r' && src[1] == '9') |
| 970 | || (src[0] == 'i' && src[1] == 'y')) |
| 971 | { |
| 972 | src += 2; |
| 973 | op->type = A_PMODY_N; |
| 974 | } |
| 975 | else |
| 976 | op->type = A_INC_N; |
| 977 | } |
| 978 | else |
| 979 | { |
| 980 | op->type = A_IND_N; |
| 981 | } |
| 982 | } |
| 983 | return src; |
| 984 | } |
| 985 | |
| 986 | static void |
| 987 | get_operand (ptr, op) |
| 988 | char **ptr; |
| 989 | sh_operand_info *op; |
| 990 | { |
| 991 | char *src = *ptr; |
| 992 | int mode = -1; |
| 993 | unsigned int len; |
| 994 | |
| 995 | if (src[0] == '#') |
| 996 | { |
| 997 | src++; |
| 998 | *ptr = parse_exp (src, op); |
| 999 | op->type = A_IMM; |
| 1000 | return; |
| 1001 | } |
| 1002 | |
| 1003 | else if (src[0] == '@') |
| 1004 | { |
| 1005 | *ptr = parse_at (src, op); |
| 1006 | return; |
| 1007 | } |
| 1008 | len = parse_reg (src, &mode, &(op->reg)); |
| 1009 | if (len) |
| 1010 | { |
| 1011 | *ptr = src + len; |
| 1012 | op->type = mode; |
| 1013 | return; |
| 1014 | } |
| 1015 | else |
| 1016 | { |
| 1017 | /* Not a reg, the only thing left is a displacement. */ |
| 1018 | *ptr = parse_exp (src, op); |
| 1019 | op->type = A_DISP_PC; |
| 1020 | return; |
| 1021 | } |
| 1022 | } |
| 1023 | |
| 1024 | static char * |
| 1025 | get_operands (info, args, operand) |
| 1026 | sh_opcode_info *info; |
| 1027 | char *args; |
| 1028 | sh_operand_info *operand; |
| 1029 | { |
| 1030 | char *ptr = args; |
| 1031 | if (info->arg[0]) |
| 1032 | { |
| 1033 | /* The pre-processor will eliminate whitespace in front of '@' |
| 1034 | after the first argument; we may be called multiple times |
| 1035 | from assemble_ppi, so don't insist on finding whitespace here. */ |
| 1036 | if (*ptr == ' ') |
| 1037 | ptr++; |
| 1038 | |
| 1039 | get_operand (&ptr, operand + 0); |
| 1040 | if (info->arg[1]) |
| 1041 | { |
| 1042 | if (*ptr == ',') |
| 1043 | { |
| 1044 | ptr++; |
| 1045 | } |
| 1046 | get_operand (&ptr, operand + 1); |
| 1047 | /* ??? Hack: psha/pshl have a varying operand number depending on |
| 1048 | the type of the first operand. We handle this by having the |
| 1049 | three-operand version first and reducing the number of operands |
| 1050 | parsed to two if we see that the first operand is an immediate. |
| 1051 | This works because no insn with three operands has an immediate |
| 1052 | as first operand. */ |
| 1053 | if (info->arg[2] && operand[0].type != A_IMM) |
| 1054 | { |
| 1055 | if (*ptr == ',') |
| 1056 | { |
| 1057 | ptr++; |
| 1058 | } |
| 1059 | get_operand (&ptr, operand + 2); |
| 1060 | } |
| 1061 | else |
| 1062 | { |
| 1063 | operand[2].type = 0; |
| 1064 | } |
| 1065 | } |
| 1066 | else |
| 1067 | { |
| 1068 | operand[1].type = 0; |
| 1069 | operand[2].type = 0; |
| 1070 | } |
| 1071 | } |
| 1072 | else |
| 1073 | { |
| 1074 | operand[0].type = 0; |
| 1075 | operand[1].type = 0; |
| 1076 | operand[2].type = 0; |
| 1077 | } |
| 1078 | return ptr; |
| 1079 | } |
| 1080 | |
| 1081 | /* Passed a pointer to a list of opcodes which use different |
| 1082 | addressing modes, return the opcode which matches the opcodes |
| 1083 | provided. */ |
| 1084 | |
| 1085 | static sh_opcode_info * |
| 1086 | get_specific (opcode, operands) |
| 1087 | sh_opcode_info *opcode; |
| 1088 | sh_operand_info *operands; |
| 1089 | { |
| 1090 | sh_opcode_info *this_try = opcode; |
| 1091 | char *name = opcode->name; |
| 1092 | int n = 0; |
| 1093 | |
| 1094 | while (opcode->name) |
| 1095 | { |
| 1096 | this_try = opcode++; |
| 1097 | if (this_try->name != name) |
| 1098 | { |
| 1099 | /* We've looked so far down the table that we've run out of |
| 1100 | opcodes with the same name. */ |
| 1101 | return 0; |
| 1102 | } |
| 1103 | |
| 1104 | /* Look at both operands needed by the opcodes and provided by |
| 1105 | the user - since an arg test will often fail on the same arg |
| 1106 | again and again, we'll try and test the last failing arg the |
| 1107 | first on each opcode try. */ |
| 1108 | for (n = 0; this_try->arg[n]; n++) |
| 1109 | { |
| 1110 | sh_operand_info *user = operands + n; |
| 1111 | sh_arg_type arg = this_try->arg[n]; |
| 1112 | |
| 1113 | switch (arg) |
| 1114 | { |
| 1115 | case A_IMM: |
| 1116 | case A_BDISP12: |
| 1117 | case A_BDISP8: |
| 1118 | case A_DISP_GBR: |
| 1119 | case A_DISP_PC: |
| 1120 | case A_MACH: |
| 1121 | case A_PR: |
| 1122 | case A_MACL: |
| 1123 | if (user->type != arg) |
| 1124 | goto fail; |
| 1125 | break; |
| 1126 | case A_R0: |
| 1127 | /* opcode needs r0 */ |
| 1128 | if (user->type != A_REG_N || user->reg != 0) |
| 1129 | goto fail; |
| 1130 | break; |
| 1131 | case A_R0_GBR: |
| 1132 | if (user->type != A_R0_GBR || user->reg != 0) |
| 1133 | goto fail; |
| 1134 | break; |
| 1135 | case F_FR0: |
| 1136 | if (user->type != F_REG_N || user->reg != 0) |
| 1137 | goto fail; |
| 1138 | break; |
| 1139 | |
| 1140 | case A_REG_N: |
| 1141 | case A_INC_N: |
| 1142 | case A_DEC_N: |
| 1143 | case A_IND_N: |
| 1144 | case A_IND_R0_REG_N: |
| 1145 | case A_DISP_REG_N: |
| 1146 | case F_REG_N: |
| 1147 | case D_REG_N: |
| 1148 | case X_REG_N: |
| 1149 | case V_REG_N: |
| 1150 | case FPUL_N: |
| 1151 | case FPSCR_N: |
| 1152 | case A_PMOD_N: |
| 1153 | case A_PMODY_N: |
| 1154 | case DSP_REG_N: |
| 1155 | /* Opcode needs rn */ |
| 1156 | if (user->type != arg) |
| 1157 | goto fail; |
| 1158 | reg_n = user->reg; |
| 1159 | break; |
| 1160 | case DX_REG_N: |
| 1161 | if (user->type != D_REG_N && user->type != X_REG_N) |
| 1162 | goto fail; |
| 1163 | reg_n = user->reg; |
| 1164 | break; |
| 1165 | case A_GBR: |
| 1166 | case A_SR: |
| 1167 | case A_VBR: |
| 1168 | case A_DSR: |
| 1169 | case A_MOD: |
| 1170 | case A_RE: |
| 1171 | case A_RS: |
| 1172 | case A_SSR: |
| 1173 | case A_SPC: |
| 1174 | case A_SGR: |
| 1175 | case A_DBR: |
| 1176 | if (user->type != arg) |
| 1177 | goto fail; |
| 1178 | break; |
| 1179 | |
| 1180 | case A_REG_B: |
| 1181 | if (user->type != arg) |
| 1182 | goto fail; |
| 1183 | reg_b = user->reg; |
| 1184 | break; |
| 1185 | |
| 1186 | case A_REG_M: |
| 1187 | case A_INC_M: |
| 1188 | case A_DEC_M: |
| 1189 | case A_IND_M: |
| 1190 | case A_IND_R0_REG_M: |
| 1191 | case A_DISP_REG_M: |
| 1192 | case DSP_REG_M: |
| 1193 | /* Opcode needs rn */ |
| 1194 | if (user->type != arg - A_REG_M + A_REG_N) |
| 1195 | goto fail; |
| 1196 | reg_m = user->reg; |
| 1197 | break; |
| 1198 | |
| 1199 | case DSP_REG_X: |
| 1200 | if (user->type != DSP_REG_N) |
| 1201 | goto fail; |
| 1202 | switch (user->reg) |
| 1203 | { |
| 1204 | case A_X0_NUM: |
| 1205 | reg_x = 0; |
| 1206 | break; |
| 1207 | case A_X1_NUM: |
| 1208 | reg_x = 1; |
| 1209 | break; |
| 1210 | case A_A0_NUM: |
| 1211 | reg_x = 2; |
| 1212 | break; |
| 1213 | case A_A1_NUM: |
| 1214 | reg_x = 3; |
| 1215 | break; |
| 1216 | default: |
| 1217 | goto fail; |
| 1218 | } |
| 1219 | break; |
| 1220 | |
| 1221 | case DSP_REG_Y: |
| 1222 | if (user->type != DSP_REG_N) |
| 1223 | goto fail; |
| 1224 | switch (user->reg) |
| 1225 | { |
| 1226 | case A_Y0_NUM: |
| 1227 | reg_y = 0; |
| 1228 | break; |
| 1229 | case A_Y1_NUM: |
| 1230 | reg_y = 1; |
| 1231 | break; |
| 1232 | case A_M0_NUM: |
| 1233 | reg_y = 2; |
| 1234 | break; |
| 1235 | case A_M1_NUM: |
| 1236 | reg_y = 3; |
| 1237 | break; |
| 1238 | default: |
| 1239 | goto fail; |
| 1240 | } |
| 1241 | break; |
| 1242 | |
| 1243 | case DSP_REG_E: |
| 1244 | if (user->type != DSP_REG_N) |
| 1245 | goto fail; |
| 1246 | switch (user->reg) |
| 1247 | { |
| 1248 | case A_X0_NUM: |
| 1249 | reg_efg = 0 << 10; |
| 1250 | break; |
| 1251 | case A_X1_NUM: |
| 1252 | reg_efg = 1 << 10; |
| 1253 | break; |
| 1254 | case A_Y0_NUM: |
| 1255 | reg_efg = 2 << 10; |
| 1256 | break; |
| 1257 | case A_A1_NUM: |
| 1258 | reg_efg = 3 << 10; |
| 1259 | break; |
| 1260 | default: |
| 1261 | goto fail; |
| 1262 | } |
| 1263 | break; |
| 1264 | |
| 1265 | case DSP_REG_F: |
| 1266 | if (user->type != DSP_REG_N) |
| 1267 | goto fail; |
| 1268 | switch (user->reg) |
| 1269 | { |
| 1270 | case A_Y0_NUM: |
| 1271 | reg_efg |= 0 << 8; |
| 1272 | break; |
| 1273 | case A_Y1_NUM: |
| 1274 | reg_efg |= 1 << 8; |
| 1275 | break; |
| 1276 | case A_X0_NUM: |
| 1277 | reg_efg |= 2 << 8; |
| 1278 | break; |
| 1279 | case A_A1_NUM: |
| 1280 | reg_efg |= 3 << 8; |
| 1281 | break; |
| 1282 | default: |
| 1283 | goto fail; |
| 1284 | } |
| 1285 | break; |
| 1286 | |
| 1287 | case DSP_REG_G: |
| 1288 | if (user->type != DSP_REG_N) |
| 1289 | goto fail; |
| 1290 | switch (user->reg) |
| 1291 | { |
| 1292 | case A_M0_NUM: |
| 1293 | reg_efg |= 0 << 2; |
| 1294 | break; |
| 1295 | case A_M1_NUM: |
| 1296 | reg_efg |= 1 << 2; |
| 1297 | break; |
| 1298 | case A_A0_NUM: |
| 1299 | reg_efg |= 2 << 2; |
| 1300 | break; |
| 1301 | case A_A1_NUM: |
| 1302 | reg_efg |= 3 << 2; |
| 1303 | break; |
| 1304 | default: |
| 1305 | goto fail; |
| 1306 | } |
| 1307 | break; |
| 1308 | |
| 1309 | case A_A0: |
| 1310 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) |
| 1311 | goto fail; |
| 1312 | break; |
| 1313 | case A_X0: |
| 1314 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) |
| 1315 | goto fail; |
| 1316 | break; |
| 1317 | case A_X1: |
| 1318 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) |
| 1319 | goto fail; |
| 1320 | break; |
| 1321 | case A_Y0: |
| 1322 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) |
| 1323 | goto fail; |
| 1324 | break; |
| 1325 | case A_Y1: |
| 1326 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) |
| 1327 | goto fail; |
| 1328 | break; |
| 1329 | |
| 1330 | case F_REG_M: |
| 1331 | case D_REG_M: |
| 1332 | case X_REG_M: |
| 1333 | case V_REG_M: |
| 1334 | case FPUL_M: |
| 1335 | case FPSCR_M: |
| 1336 | /* Opcode needs rn */ |
| 1337 | if (user->type != arg - F_REG_M + F_REG_N) |
| 1338 | goto fail; |
| 1339 | reg_m = user->reg; |
| 1340 | break; |
| 1341 | case DX_REG_M: |
| 1342 | if (user->type != D_REG_N && user->type != X_REG_N) |
| 1343 | goto fail; |
| 1344 | reg_m = user->reg; |
| 1345 | break; |
| 1346 | case XMTRX_M4: |
| 1347 | if (user->type != XMTRX_M4) |
| 1348 | goto fail; |
| 1349 | reg_m = 4; |
| 1350 | break; |
| 1351 | |
| 1352 | default: |
| 1353 | printf (_("unhandled %d\n"), arg); |
| 1354 | goto fail; |
| 1355 | } |
| 1356 | } |
| 1357 | if ( !(valid_arch & this_try->arch)) |
| 1358 | goto fail; |
| 1359 | valid_arch &= this_try->arch; |
| 1360 | return this_try; |
| 1361 | fail: |
| 1362 | ; |
| 1363 | } |
| 1364 | |
| 1365 | return 0; |
| 1366 | } |
| 1367 | |
| 1368 | int |
| 1369 | check (operand, low, high) |
| 1370 | expressionS *operand; |
| 1371 | int low; |
| 1372 | int high; |
| 1373 | { |
| 1374 | if (operand->X_op != O_constant |
| 1375 | || operand->X_add_number < low |
| 1376 | || operand->X_add_number > high) |
| 1377 | { |
| 1378 | as_bad (_("operand must be absolute in range %d..%d"), low, high); |
| 1379 | } |
| 1380 | return operand->X_add_number; |
| 1381 | } |
| 1382 | |
| 1383 | static void |
| 1384 | insert (where, how, pcrel, op) |
| 1385 | char *where; |
| 1386 | int how; |
| 1387 | int pcrel; |
| 1388 | sh_operand_info *op; |
| 1389 | { |
| 1390 | fix_new_exp (frag_now, |
| 1391 | where - frag_now->fr_literal, |
| 1392 | 2, |
| 1393 | &op->immediate, |
| 1394 | pcrel, |
| 1395 | how); |
| 1396 | } |
| 1397 | |
| 1398 | static void |
| 1399 | build_relax (opcode, op) |
| 1400 | sh_opcode_info *opcode; |
| 1401 | sh_operand_info *op; |
| 1402 | { |
| 1403 | int high_byte = target_big_endian ? 0 : 1; |
| 1404 | char *p; |
| 1405 | |
| 1406 | if (opcode->arg[0] == A_BDISP8) |
| 1407 | { |
| 1408 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; |
| 1409 | p = frag_var (rs_machine_dependent, |
| 1410 | md_relax_table[C (what, COND32)].rlx_length, |
| 1411 | md_relax_table[C (what, COND8)].rlx_length, |
| 1412 | C (what, 0), |
| 1413 | op->immediate.X_add_symbol, |
| 1414 | op->immediate.X_add_number, |
| 1415 | 0); |
| 1416 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); |
| 1417 | } |
| 1418 | else if (opcode->arg[0] == A_BDISP12) |
| 1419 | { |
| 1420 | p = frag_var (rs_machine_dependent, |
| 1421 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, |
| 1422 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, |
| 1423 | C (UNCOND_JUMP, 0), |
| 1424 | op->immediate.X_add_symbol, |
| 1425 | op->immediate.X_add_number, |
| 1426 | 0); |
| 1427 | p[high_byte] = (opcode->nibbles[0] << 4); |
| 1428 | } |
| 1429 | |
| 1430 | } |
| 1431 | |
| 1432 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
| 1433 | |
| 1434 | static char * |
| 1435 | insert_loop_bounds (output, operand) |
| 1436 | char *output; |
| 1437 | sh_operand_info *operand; |
| 1438 | { |
| 1439 | char *name; |
| 1440 | symbolS *end_sym; |
| 1441 | |
| 1442 | /* Since the low byte of the opcode will be overwritten by the reloc, we |
| 1443 | can just stash the high byte into both bytes and ignore endianness. */ |
| 1444 | output[0] = 0x8c; |
| 1445 | output[1] = 0x8c; |
| 1446 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); |
| 1447 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); |
| 1448 | |
| 1449 | if (sh_relax) |
| 1450 | { |
| 1451 | static int count = 0; |
| 1452 | |
| 1453 | /* If the last loop insn is a two-byte-insn, it is in danger of being |
| 1454 | swapped with the insn after it. To prevent this, create a new |
| 1455 | symbol - complete with SH_LABEL reloc - after the last loop insn. |
| 1456 | If the last loop insn is four bytes long, the symbol will be |
| 1457 | right in the middle, but four byte insns are not swapped anyways. */ |
| 1458 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. |
| 1459 | Hence a 9 digit number should be enough to count all REPEATs. */ |
| 1460 | name = alloca (11); |
| 1461 | sprintf (name, "_R%x", count++ & 0x3fffffff); |
| 1462 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
| 1463 | /* Make this a local symbol. */ |
| 1464 | #ifdef OBJ_COFF |
| 1465 | SF_SET_LOCAL (end_sym); |
| 1466 | #endif /* OBJ_COFF */ |
| 1467 | symbol_table_insert (end_sym); |
| 1468 | end_sym->sy_value = operand[1].immediate; |
| 1469 | end_sym->sy_value.X_add_number += 2; |
| 1470 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); |
| 1471 | } |
| 1472 | |
| 1473 | output = frag_more (2); |
| 1474 | output[0] = 0x8e; |
| 1475 | output[1] = 0x8e; |
| 1476 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); |
| 1477 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); |
| 1478 | |
| 1479 | return frag_more (2); |
| 1480 | } |
| 1481 | |
| 1482 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
| 1483 | |
| 1484 | static unsigned int |
| 1485 | build_Mytes (opcode, operand) |
| 1486 | sh_opcode_info *opcode; |
| 1487 | sh_operand_info *operand; |
| 1488 | |
| 1489 | { |
| 1490 | int index; |
| 1491 | char nbuf[4]; |
| 1492 | char *output = frag_more (2); |
| 1493 | unsigned int size = 2; |
| 1494 | int low_byte = target_big_endian ? 1 : 0; |
| 1495 | nbuf[0] = 0; |
| 1496 | nbuf[1] = 0; |
| 1497 | nbuf[2] = 0; |
| 1498 | nbuf[3] = 0; |
| 1499 | |
| 1500 | for (index = 0; index < 4; index++) |
| 1501 | { |
| 1502 | sh_nibble_type i = opcode->nibbles[index]; |
| 1503 | if (i < 16) |
| 1504 | { |
| 1505 | nbuf[index] = i; |
| 1506 | } |
| 1507 | else |
| 1508 | { |
| 1509 | switch (i) |
| 1510 | { |
| 1511 | case REG_N: |
| 1512 | nbuf[index] = reg_n; |
| 1513 | break; |
| 1514 | case REG_M: |
| 1515 | nbuf[index] = reg_m; |
| 1516 | break; |
| 1517 | case SDT_REG_N: |
| 1518 | if (reg_n < 2 || reg_n > 5) |
| 1519 | as_bad (_("Invalid register: 'r%d'"), reg_n); |
| 1520 | nbuf[index] = (reg_n & 3) | 4; |
| 1521 | break; |
| 1522 | case REG_NM: |
| 1523 | nbuf[index] = reg_n | (reg_m >> 2); |
| 1524 | break; |
| 1525 | case REG_B: |
| 1526 | nbuf[index] = reg_b | 0x08; |
| 1527 | break; |
| 1528 | case IMM0_4BY4: |
| 1529 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); |
| 1530 | break; |
| 1531 | case IMM0_4BY2: |
| 1532 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); |
| 1533 | break; |
| 1534 | case IMM0_4: |
| 1535 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); |
| 1536 | break; |
| 1537 | case IMM1_4BY4: |
| 1538 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); |
| 1539 | break; |
| 1540 | case IMM1_4BY2: |
| 1541 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); |
| 1542 | break; |
| 1543 | case IMM1_4: |
| 1544 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); |
| 1545 | break; |
| 1546 | case IMM0_8BY4: |
| 1547 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); |
| 1548 | break; |
| 1549 | case IMM0_8BY2: |
| 1550 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); |
| 1551 | break; |
| 1552 | case IMM0_8: |
| 1553 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); |
| 1554 | break; |
| 1555 | case IMM1_8BY4: |
| 1556 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); |
| 1557 | break; |
| 1558 | case IMM1_8BY2: |
| 1559 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); |
| 1560 | break; |
| 1561 | case IMM1_8: |
| 1562 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); |
| 1563 | break; |
| 1564 | case PCRELIMM_8BY4: |
| 1565 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand); |
| 1566 | break; |
| 1567 | case PCRELIMM_8BY2: |
| 1568 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand); |
| 1569 | break; |
| 1570 | case REPEAT: |
| 1571 | output = insert_loop_bounds (output, operand); |
| 1572 | nbuf[index] = opcode->nibbles[3]; |
| 1573 | operand += 2; |
| 1574 | break; |
| 1575 | default: |
| 1576 | printf (_("failed for %d\n"), i); |
| 1577 | } |
| 1578 | } |
| 1579 | } |
| 1580 | if (!target_big_endian) |
| 1581 | { |
| 1582 | output[1] = (nbuf[0] << 4) | (nbuf[1]); |
| 1583 | output[0] = (nbuf[2] << 4) | (nbuf[3]); |
| 1584 | } |
| 1585 | else |
| 1586 | { |
| 1587 | output[0] = (nbuf[0] << 4) | (nbuf[1]); |
| 1588 | output[1] = (nbuf[2] << 4) | (nbuf[3]); |
| 1589 | } |
| 1590 | return size; |
| 1591 | } |
| 1592 | |
| 1593 | /* Find an opcode at the start of *STR_P in the hash table, and set |
| 1594 | *STR_P to the first character after the last one read. */ |
| 1595 | |
| 1596 | static sh_opcode_info * |
| 1597 | find_cooked_opcode (str_p) |
| 1598 | char **str_p; |
| 1599 | { |
| 1600 | char *str = *str_p; |
| 1601 | unsigned char *op_start; |
| 1602 | unsigned char *op_end; |
| 1603 | char name[20]; |
| 1604 | int nlen = 0; |
| 1605 | |
| 1606 | /* Drop leading whitespace. */ |
| 1607 | while (*str == ' ') |
| 1608 | str++; |
| 1609 | |
| 1610 | /* Find the op code end. |
| 1611 | The pre-processor will eliminate whitespace in front of |
| 1612 | any '@' after the first argument; we may be called from |
| 1613 | assemble_ppi, so the opcode might be terminated by an '@'. */ |
| 1614 | for (op_start = op_end = (unsigned char *) (str); |
| 1615 | *op_end |
| 1616 | && nlen < 20 |
| 1617 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
| 1618 | op_end++) |
| 1619 | { |
| 1620 | unsigned char c = op_start[nlen]; |
| 1621 | |
| 1622 | /* The machine independent code will convert CMP/EQ into cmp/EQ |
| 1623 | because it thinks the '/' is the end of the symbol. Moreover, |
| 1624 | all but the first sub-insn is a parallel processing insn won't |
| 1625 | be capitailzed. Instead of hacking up the machine independent |
| 1626 | code, we just deal with it here. */ |
| 1627 | c = isupper (c) ? tolower (c) : c; |
| 1628 | name[nlen] = c; |
| 1629 | nlen++; |
| 1630 | } |
| 1631 | |
| 1632 | name[nlen] = 0; |
| 1633 | *str_p = op_end; |
| 1634 | |
| 1635 | if (nlen == 0) |
| 1636 | as_bad (_("can't find opcode ")); |
| 1637 | |
| 1638 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
| 1639 | } |
| 1640 | |
| 1641 | /* Assemble a parallel processing insn. */ |
| 1642 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ |
| 1643 | |
| 1644 | static unsigned int |
| 1645 | assemble_ppi (op_end, opcode) |
| 1646 | char *op_end; |
| 1647 | sh_opcode_info *opcode; |
| 1648 | { |
| 1649 | int movx = 0; |
| 1650 | int movy = 0; |
| 1651 | int cond = 0; |
| 1652 | int field_b = 0; |
| 1653 | char *output; |
| 1654 | int move_code; |
| 1655 | unsigned int size; |
| 1656 | |
| 1657 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
| 1658 | Make sure we encode a defined insn pattern. */ |
| 1659 | reg_x = 0; |
| 1660 | reg_y = 0; |
| 1661 | |
| 1662 | for (;;) |
| 1663 | { |
| 1664 | sh_operand_info operand[3]; |
| 1665 | |
| 1666 | if (opcode->arg[0] != A_END) |
| 1667 | op_end = get_operands (opcode, op_end, operand); |
| 1668 | opcode = get_specific (opcode, operand); |
| 1669 | if (opcode == 0) |
| 1670 | { |
| 1671 | /* Couldn't find an opcode which matched the operands. */ |
| 1672 | char *where = frag_more (2); |
| 1673 | size = 2; |
| 1674 | |
| 1675 | where[0] = 0x0; |
| 1676 | where[1] = 0x0; |
| 1677 | as_bad (_("invalid operands for opcode")); |
| 1678 | return size; |
| 1679 | } |
| 1680 | |
| 1681 | if (opcode->nibbles[0] != PPI) |
| 1682 | as_bad (_("insn can't be combined with parallel processing insn")); |
| 1683 | |
| 1684 | switch (opcode->nibbles[1]) |
| 1685 | { |
| 1686 | |
| 1687 | case NOPX: |
| 1688 | if (movx) |
| 1689 | as_bad (_("multiple movx specifications")); |
| 1690 | movx = DDT_BASE; |
| 1691 | break; |
| 1692 | case NOPY: |
| 1693 | if (movy) |
| 1694 | as_bad (_("multiple movy specifications")); |
| 1695 | movy = DDT_BASE; |
| 1696 | break; |
| 1697 | |
| 1698 | case MOVX: |
| 1699 | if (movx) |
| 1700 | as_bad (_("multiple movx specifications")); |
| 1701 | if (reg_n < 4 || reg_n > 5) |
| 1702 | as_bad (_("invalid movx address register")); |
| 1703 | if (opcode->nibbles[2] & 8) |
| 1704 | { |
| 1705 | if (reg_m == A_A1_NUM) |
| 1706 | movx = 1 << 7; |
| 1707 | else if (reg_m != A_A0_NUM) |
| 1708 | as_bad (_("invalid movx dsp register")); |
| 1709 | } |
| 1710 | else |
| 1711 | { |
| 1712 | if (reg_x > 1) |
| 1713 | as_bad (_("invalid movx dsp register")); |
| 1714 | movx = reg_x << 7; |
| 1715 | } |
| 1716 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; |
| 1717 | break; |
| 1718 | |
| 1719 | case MOVY: |
| 1720 | if (movy) |
| 1721 | as_bad (_("multiple movy specifications")); |
| 1722 | if (opcode->nibbles[2] & 8) |
| 1723 | { |
| 1724 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, |
| 1725 | so add 8 more. */ |
| 1726 | movy = 8; |
| 1727 | if (reg_m == A_A1_NUM) |
| 1728 | movy += 1 << 6; |
| 1729 | else if (reg_m != A_A0_NUM) |
| 1730 | as_bad (_("invalid movy dsp register")); |
| 1731 | } |
| 1732 | else |
| 1733 | { |
| 1734 | if (reg_y > 1) |
| 1735 | as_bad (_("invalid movy dsp register")); |
| 1736 | movy = reg_y << 6; |
| 1737 | } |
| 1738 | if (reg_n < 6 || reg_n > 7) |
| 1739 | as_bad (_("invalid movy address register")); |
| 1740 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; |
| 1741 | break; |
| 1742 | |
| 1743 | case PSH: |
| 1744 | if (operand[0].immediate.X_op != O_constant) |
| 1745 | as_bad (_("dsp immediate shift value not constant")); |
| 1746 | field_b = ((opcode->nibbles[2] << 12) |
| 1747 | | (operand[0].immediate.X_add_number & 127) << 4 |
| 1748 | | reg_n); |
| 1749 | break; |
| 1750 | case PPI3: |
| 1751 | if (field_b) |
| 1752 | as_bad (_("multiple parallel processing specifications")); |
| 1753 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) |
| 1754 | + (reg_x << 6) + (reg_y << 4) + reg_n); |
| 1755 | break; |
| 1756 | case PDC: |
| 1757 | if (cond) |
| 1758 | as_bad (_("multiple condition specifications")); |
| 1759 | cond = opcode->nibbles[2] << 8; |
| 1760 | if (*op_end) |
| 1761 | goto skip_cond_check; |
| 1762 | break; |
| 1763 | case PPIC: |
| 1764 | if (field_b) |
| 1765 | as_bad (_("multiple parallel processing specifications")); |
| 1766 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) |
| 1767 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); |
| 1768 | cond = 0; |
| 1769 | break; |
| 1770 | case PMUL: |
| 1771 | if (field_b) |
| 1772 | { |
| 1773 | if ((field_b & 0xef00) != 0xa100) |
| 1774 | as_bad (_("insn cannot be combined with pmuls")); |
| 1775 | field_b -= 0x8100; |
| 1776 | switch (field_b & 0xf) |
| 1777 | { |
| 1778 | case A_X0_NUM: |
| 1779 | field_b += 0 - A_X0_NUM; |
| 1780 | break; |
| 1781 | case A_Y0_NUM: |
| 1782 | field_b += 1 - A_Y0_NUM; |
| 1783 | break; |
| 1784 | case A_A0_NUM: |
| 1785 | field_b += 2 - A_A0_NUM; |
| 1786 | break; |
| 1787 | case A_A1_NUM: |
| 1788 | field_b += 3 - A_A1_NUM; |
| 1789 | break; |
| 1790 | default: |
| 1791 | as_bad (_("bad padd / psub pmuls output operand")); |
| 1792 | } |
| 1793 | } |
| 1794 | field_b += 0x4000 + reg_efg; |
| 1795 | break; |
| 1796 | default: |
| 1797 | abort (); |
| 1798 | } |
| 1799 | if (cond) |
| 1800 | { |
| 1801 | as_bad (_("condition not followed by conditionalizable insn")); |
| 1802 | cond = 0; |
| 1803 | } |
| 1804 | if (! *op_end) |
| 1805 | break; |
| 1806 | skip_cond_check: |
| 1807 | opcode = find_cooked_opcode (&op_end); |
| 1808 | if (opcode == NULL) |
| 1809 | { |
| 1810 | (as_bad |
| 1811 | (_("unrecognized characters at end of parallel processing insn"))); |
| 1812 | break; |
| 1813 | } |
| 1814 | } |
| 1815 | |
| 1816 | move_code = movx | movy; |
| 1817 | if (field_b) |
| 1818 | { |
| 1819 | /* Parallel processing insn. */ |
| 1820 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; |
| 1821 | |
| 1822 | output = frag_more (4); |
| 1823 | size = 4; |
| 1824 | if (! target_big_endian) |
| 1825 | { |
| 1826 | output[3] = ppi_code >> 8; |
| 1827 | output[2] = ppi_code; |
| 1828 | } |
| 1829 | else |
| 1830 | { |
| 1831 | output[2] = ppi_code >> 8; |
| 1832 | output[3] = ppi_code; |
| 1833 | } |
| 1834 | move_code |= 0xf800; |
| 1835 | } |
| 1836 | else |
| 1837 | { |
| 1838 | /* Just a double data transfer. */ |
| 1839 | output = frag_more (2); |
| 1840 | size = 2; |
| 1841 | } |
| 1842 | if (! target_big_endian) |
| 1843 | { |
| 1844 | output[1] = move_code >> 8; |
| 1845 | output[0] = move_code; |
| 1846 | } |
| 1847 | else |
| 1848 | { |
| 1849 | output[0] = move_code >> 8; |
| 1850 | output[1] = move_code; |
| 1851 | } |
| 1852 | return size; |
| 1853 | } |
| 1854 | |
| 1855 | /* This is the guts of the machine-dependent assembler. STR points to a |
| 1856 | machine dependent instruction. This function is supposed to emit |
| 1857 | the frags/bytes it assembles to. */ |
| 1858 | |
| 1859 | void |
| 1860 | md_assemble (str) |
| 1861 | char *str; |
| 1862 | { |
| 1863 | unsigned char *op_end; |
| 1864 | sh_operand_info operand[3]; |
| 1865 | sh_opcode_info *opcode; |
| 1866 | unsigned int size; |
| 1867 | |
| 1868 | opcode = find_cooked_opcode (&str); |
| 1869 | op_end = str; |
| 1870 | |
| 1871 | if (opcode == NULL) |
| 1872 | { |
| 1873 | as_bad (_("unknown opcode")); |
| 1874 | return; |
| 1875 | } |
| 1876 | |
| 1877 | if (sh_relax |
| 1878 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) |
| 1879 | { |
| 1880 | /* Output a CODE reloc to tell the linker that the following |
| 1881 | bytes are instructions, not data. */ |
| 1882 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, |
| 1883 | BFD_RELOC_SH_CODE); |
| 1884 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; |
| 1885 | } |
| 1886 | |
| 1887 | if (opcode->nibbles[0] == PPI) |
| 1888 | { |
| 1889 | size = assemble_ppi (op_end, opcode); |
| 1890 | } |
| 1891 | else |
| 1892 | { |
| 1893 | if (opcode->arg[0] == A_BDISP12 |
| 1894 | || opcode->arg[0] == A_BDISP8) |
| 1895 | { |
| 1896 | parse_exp (op_end + 1, &operand[0]); |
| 1897 | build_relax (opcode, &operand[0]); |
| 1898 | } |
| 1899 | else |
| 1900 | { |
| 1901 | if (opcode->arg[0] == A_END) |
| 1902 | { |
| 1903 | /* Ignore trailing whitespace. If there is any, it has already |
| 1904 | been compressed to a single space. */ |
| 1905 | if (*op_end == ' ') |
| 1906 | op_end++; |
| 1907 | } |
| 1908 | else |
| 1909 | { |
| 1910 | op_end = get_operands (opcode, op_end, operand); |
| 1911 | } |
| 1912 | opcode = get_specific (opcode, operand); |
| 1913 | |
| 1914 | if (opcode == 0) |
| 1915 | { |
| 1916 | /* Couldn't find an opcode which matched the operands. */ |
| 1917 | char *where = frag_more (2); |
| 1918 | size = 2; |
| 1919 | |
| 1920 | where[0] = 0x0; |
| 1921 | where[1] = 0x0; |
| 1922 | as_bad (_("invalid operands for opcode")); |
| 1923 | } |
| 1924 | else |
| 1925 | { |
| 1926 | if (*op_end) |
| 1927 | as_bad (_("excess operands: '%s'"), op_end); |
| 1928 | |
| 1929 | size = build_Mytes (opcode, operand); |
| 1930 | } |
| 1931 | } |
| 1932 | } |
| 1933 | |
| 1934 | |
| 1935 | if (debug_type == DEBUG_DWARF2) |
| 1936 | { |
| 1937 | bfd_vma addr; |
| 1938 | |
| 1939 | /* First update the notion of the current source line. */ |
| 1940 | dwarf2_where (&debug_line); |
| 1941 | |
| 1942 | /* We want the offset of the start of this instruction within the |
| 1943 | the current frag. may be used later */ |
| 1944 | addr = frag_now->fr_address + frag_now_fix () - size; |
| 1945 | |
| 1946 | |
| 1947 | /* And record the information. */ |
| 1948 | dwarf2_gen_line_info (addr, &debug_line); |
| 1949 | } |
| 1950 | } |
| 1951 | |
| 1952 | /* This routine is called each time a label definition is seen. It |
| 1953 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ |
| 1954 | |
| 1955 | void |
| 1956 | sh_frob_label () |
| 1957 | { |
| 1958 | static fragS *last_label_frag; |
| 1959 | static int last_label_offset; |
| 1960 | |
| 1961 | if (sh_relax |
| 1962 | && seg_info (now_seg)->tc_segment_info_data.in_code) |
| 1963 | { |
| 1964 | int offset; |
| 1965 | |
| 1966 | offset = frag_now_fix (); |
| 1967 | if (frag_now != last_label_frag |
| 1968 | || offset != last_label_offset) |
| 1969 | { |
| 1970 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
| 1971 | last_label_frag = frag_now; |
| 1972 | last_label_offset = offset; |
| 1973 | } |
| 1974 | } |
| 1975 | } |
| 1976 | |
| 1977 | /* This routine is called when the assembler is about to output some |
| 1978 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ |
| 1979 | |
| 1980 | void |
| 1981 | sh_flush_pending_output () |
| 1982 | { |
| 1983 | if (sh_relax |
| 1984 | && seg_info (now_seg)->tc_segment_info_data.in_code) |
| 1985 | { |
| 1986 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, |
| 1987 | BFD_RELOC_SH_DATA); |
| 1988 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; |
| 1989 | } |
| 1990 | } |
| 1991 | |
| 1992 | symbolS * |
| 1993 | md_undefined_symbol (name) |
| 1994 | char *name; |
| 1995 | { |
| 1996 | #ifdef OBJ_ELF |
| 1997 | /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we |
| 1998 | have no need to default values of symbols. */ |
| 1999 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) |
| 2000 | { |
| 2001 | if (!GOT_symbol) |
| 2002 | { |
| 2003 | if (symbol_find (name)) |
| 2004 | as_bad ("GOT already in the symbol table"); |
| 2005 | |
| 2006 | GOT_symbol = symbol_new (name, undefined_section, |
| 2007 | (valueT)0, & zero_address_frag); |
| 2008 | } |
| 2009 | |
| 2010 | return GOT_symbol; |
| 2011 | } |
| 2012 | #endif /* OBJ_ELF */ |
| 2013 | |
| 2014 | return 0; |
| 2015 | } |
| 2016 | |
| 2017 | #ifdef OBJ_COFF |
| 2018 | #ifndef BFD_ASSEMBLER |
| 2019 | |
| 2020 | void |
| 2021 | tc_crawl_symbol_chain (headers) |
| 2022 | object_headers *headers; |
| 2023 | { |
| 2024 | printf (_("call to tc_crawl_symbol_chain \n")); |
| 2025 | } |
| 2026 | |
| 2027 | void |
| 2028 | tc_headers_hook (headers) |
| 2029 | object_headers *headers; |
| 2030 | { |
| 2031 | printf (_("call to tc_headers_hook \n")); |
| 2032 | } |
| 2033 | |
| 2034 | #endif |
| 2035 | #endif |
| 2036 | |
| 2037 | /* Various routines to kill one day. */ |
| 2038 | /* Equal to MAX_PRECISION in atof-ieee.c. */ |
| 2039 | #define MAX_LITTLENUMS 6 |
| 2040 | |
| 2041 | /* Turn a string in input_line_pointer into a floating point constant |
| 2042 | of type TYPE, and store the appropriate bytes in *LITP. The number |
| 2043 | of LITTLENUMS emitted is stored in *SIZEP . An error message is |
| 2044 | returned, or NULL on OK. */ |
| 2045 | |
| 2046 | char * |
| 2047 | md_atof (type, litP, sizeP) |
| 2048 | int type; |
| 2049 | char *litP; |
| 2050 | int *sizeP; |
| 2051 | { |
| 2052 | int prec; |
| 2053 | LITTLENUM_TYPE words[4]; |
| 2054 | char *t; |
| 2055 | int i; |
| 2056 | |
| 2057 | switch (type) |
| 2058 | { |
| 2059 | case 'f': |
| 2060 | prec = 2; |
| 2061 | break; |
| 2062 | |
| 2063 | case 'd': |
| 2064 | prec = 4; |
| 2065 | break; |
| 2066 | |
| 2067 | default: |
| 2068 | *sizeP = 0; |
| 2069 | return _("bad call to md_atof"); |
| 2070 | } |
| 2071 | |
| 2072 | t = atof_ieee (input_line_pointer, type, words); |
| 2073 | if (t) |
| 2074 | input_line_pointer = t; |
| 2075 | |
| 2076 | *sizeP = prec * 2; |
| 2077 | |
| 2078 | if (! target_big_endian) |
| 2079 | { |
| 2080 | for (i = prec - 1; i >= 0; i--) |
| 2081 | { |
| 2082 | md_number_to_chars (litP, (valueT) words[i], 2); |
| 2083 | litP += 2; |
| 2084 | } |
| 2085 | } |
| 2086 | else |
| 2087 | { |
| 2088 | for (i = 0; i < prec; i++) |
| 2089 | { |
| 2090 | md_number_to_chars (litP, (valueT) words[i], 2); |
| 2091 | litP += 2; |
| 2092 | } |
| 2093 | } |
| 2094 | |
| 2095 | return NULL; |
| 2096 | } |
| 2097 | |
| 2098 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a |
| 2099 | call instruction. It refers to a label of the instruction which |
| 2100 | loads the register which the call uses. We use it to generate a |
| 2101 | special reloc for the linker. */ |
| 2102 | |
| 2103 | static void |
| 2104 | s_uses (ignore) |
| 2105 | int ignore ATTRIBUTE_UNUSED; |
| 2106 | { |
| 2107 | expressionS ex; |
| 2108 | |
| 2109 | if (! sh_relax) |
| 2110 | as_warn (_(".uses pseudo-op seen when not relaxing")); |
| 2111 | |
| 2112 | expression (&ex); |
| 2113 | |
| 2114 | if (ex.X_op != O_symbol || ex.X_add_number != 0) |
| 2115 | { |
| 2116 | as_bad (_("bad .uses format")); |
| 2117 | ignore_rest_of_line (); |
| 2118 | return; |
| 2119 | } |
| 2120 | |
| 2121 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); |
| 2122 | |
| 2123 | demand_empty_rest_of_line (); |
| 2124 | } |
| 2125 | \f |
| 2126 | CONST char *md_shortopts = ""; |
| 2127 | struct option md_longopts[] = |
| 2128 | { |
| 2129 | #define OPTION_RELAX (OPTION_MD_BASE) |
| 2130 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) |
| 2131 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
| 2132 | #define OPTION_DSP (OPTION_SMALL + 1) |
| 2133 | |
| 2134 | {"relax", no_argument, NULL, OPTION_RELAX}, |
| 2135 | {"little", no_argument, NULL, OPTION_LITTLE}, |
| 2136 | {"small", no_argument, NULL, OPTION_SMALL}, |
| 2137 | {"dsp", no_argument, NULL, OPTION_DSP}, |
| 2138 | {NULL, no_argument, NULL, 0} |
| 2139 | }; |
| 2140 | size_t md_longopts_size = sizeof (md_longopts); |
| 2141 | |
| 2142 | int |
| 2143 | md_parse_option (c, arg) |
| 2144 | int c; |
| 2145 | char *arg ATTRIBUTE_UNUSED; |
| 2146 | { |
| 2147 | switch (c) |
| 2148 | { |
| 2149 | case OPTION_RELAX: |
| 2150 | sh_relax = 1; |
| 2151 | break; |
| 2152 | |
| 2153 | case OPTION_LITTLE: |
| 2154 | shl = 1; |
| 2155 | target_big_endian = 0; |
| 2156 | break; |
| 2157 | |
| 2158 | case OPTION_SMALL: |
| 2159 | sh_small = 1; |
| 2160 | break; |
| 2161 | |
| 2162 | case OPTION_DSP: |
| 2163 | sh_dsp = 1; |
| 2164 | break; |
| 2165 | |
| 2166 | default: |
| 2167 | return 0; |
| 2168 | } |
| 2169 | |
| 2170 | return 1; |
| 2171 | } |
| 2172 | |
| 2173 | void |
| 2174 | md_show_usage (stream) |
| 2175 | FILE *stream; |
| 2176 | { |
| 2177 | fprintf (stream, _("\ |
| 2178 | SH options:\n\ |
| 2179 | -little generate little endian code\n\ |
| 2180 | -relax alter jump instructions for long displacements\n\ |
| 2181 | -small align sections to 4 byte boundaries, not 16\n\ |
| 2182 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); |
| 2183 | } |
| 2184 | \f |
| 2185 | void |
| 2186 | tc_Nout_fix_to_chars () |
| 2187 | { |
| 2188 | printf (_("call to tc_Nout_fix_to_chars \n")); |
| 2189 | abort (); |
| 2190 | } |
| 2191 | |
| 2192 | /* This struct is used to pass arguments to sh_count_relocs through |
| 2193 | bfd_map_over_sections. */ |
| 2194 | |
| 2195 | struct sh_count_relocs |
| 2196 | { |
| 2197 | /* Symbol we are looking for. */ |
| 2198 | symbolS *sym; |
| 2199 | /* Count of relocs found. */ |
| 2200 | int count; |
| 2201 | }; |
| 2202 | |
| 2203 | /* Count the number of fixups in a section which refer to a particular |
| 2204 | symbol. When using BFD_ASSEMBLER, this is called via |
| 2205 | bfd_map_over_sections. */ |
| 2206 | |
| 2207 | static void |
| 2208 | sh_count_relocs (abfd, sec, data) |
| 2209 | bfd *abfd ATTRIBUTE_UNUSED; |
| 2210 | segT sec; |
| 2211 | PTR data; |
| 2212 | { |
| 2213 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; |
| 2214 | segment_info_type *seginfo; |
| 2215 | symbolS *sym; |
| 2216 | fixS *fix; |
| 2217 | |
| 2218 | seginfo = seg_info (sec); |
| 2219 | if (seginfo == NULL) |
| 2220 | return; |
| 2221 | |
| 2222 | sym = info->sym; |
| 2223 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
| 2224 | { |
| 2225 | if (fix->fx_addsy == sym) |
| 2226 | { |
| 2227 | ++info->count; |
| 2228 | fix->fx_tcbit = 1; |
| 2229 | } |
| 2230 | } |
| 2231 | } |
| 2232 | |
| 2233 | /* Handle the count relocs for a particular section. When using |
| 2234 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ |
| 2235 | |
| 2236 | static void |
| 2237 | sh_frob_section (abfd, sec, ignore) |
| 2238 | bfd *abfd ATTRIBUTE_UNUSED; |
| 2239 | segT sec; |
| 2240 | PTR ignore ATTRIBUTE_UNUSED; |
| 2241 | { |
| 2242 | segment_info_type *seginfo; |
| 2243 | fixS *fix; |
| 2244 | |
| 2245 | seginfo = seg_info (sec); |
| 2246 | if (seginfo == NULL) |
| 2247 | return; |
| 2248 | |
| 2249 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
| 2250 | { |
| 2251 | symbolS *sym; |
| 2252 | bfd_vma val; |
| 2253 | fixS *fscan; |
| 2254 | struct sh_count_relocs info; |
| 2255 | |
| 2256 | if (fix->fx_r_type != BFD_RELOC_SH_USES) |
| 2257 | continue; |
| 2258 | |
| 2259 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local |
| 2260 | symbol in the same section. */ |
| 2261 | sym = fix->fx_addsy; |
| 2262 | if (sym == NULL |
| 2263 | || fix->fx_subsy != NULL |
| 2264 | || fix->fx_addnumber != 0 |
| 2265 | || S_GET_SEGMENT (sym) != sec |
| 2266 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) |
| 2267 | || S_GET_STORAGE_CLASS (sym) == C_EXT |
| 2268 | #endif |
| 2269 | || S_IS_EXTERNAL (sym)) |
| 2270 | { |
| 2271 | as_warn_where (fix->fx_file, fix->fx_line, |
| 2272 | _(".uses does not refer to a local symbol in the same section")); |
| 2273 | continue; |
| 2274 | } |
| 2275 | |
| 2276 | /* Look through the fixups again, this time looking for one |
| 2277 | at the same location as sym. */ |
| 2278 | val = S_GET_VALUE (sym); |
| 2279 | for (fscan = seginfo->fix_root; |
| 2280 | fscan != NULL; |
| 2281 | fscan = fscan->fx_next) |
| 2282 | if (val == fscan->fx_frag->fr_address + fscan->fx_where |
| 2283 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN |
| 2284 | && fscan->fx_r_type != BFD_RELOC_SH_CODE |
| 2285 | && fscan->fx_r_type != BFD_RELOC_SH_DATA |
| 2286 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) |
| 2287 | break; |
| 2288 | if (fscan == NULL) |
| 2289 | { |
| 2290 | as_warn_where (fix->fx_file, fix->fx_line, |
| 2291 | _("can't find fixup pointed to by .uses")); |
| 2292 | continue; |
| 2293 | } |
| 2294 | |
| 2295 | if (fscan->fx_tcbit) |
| 2296 | { |
| 2297 | /* We've already done this one. */ |
| 2298 | continue; |
| 2299 | } |
| 2300 | |
| 2301 | /* The variable fscan should also be a fixup to a local symbol |
| 2302 | in the same section. */ |
| 2303 | sym = fscan->fx_addsy; |
| 2304 | if (sym == NULL |
| 2305 | || fscan->fx_subsy != NULL |
| 2306 | || fscan->fx_addnumber != 0 |
| 2307 | || S_GET_SEGMENT (sym) != sec |
| 2308 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) |
| 2309 | || S_GET_STORAGE_CLASS (sym) == C_EXT |
| 2310 | #endif |
| 2311 | || S_IS_EXTERNAL (sym)) |
| 2312 | { |
| 2313 | as_warn_where (fix->fx_file, fix->fx_line, |
| 2314 | _(".uses target does not refer to a local symbol in the same section")); |
| 2315 | continue; |
| 2316 | } |
| 2317 | |
| 2318 | /* Now we look through all the fixups of all the sections, |
| 2319 | counting the number of times we find a reference to sym. */ |
| 2320 | info.sym = sym; |
| 2321 | info.count = 0; |
| 2322 | #ifdef BFD_ASSEMBLER |
| 2323 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); |
| 2324 | #else |
| 2325 | { |
| 2326 | int iscan; |
| 2327 | |
| 2328 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) |
| 2329 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); |
| 2330 | } |
| 2331 | #endif |
| 2332 | |
| 2333 | if (info.count < 1) |
| 2334 | abort (); |
| 2335 | |
| 2336 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. |
| 2337 | We have already adjusted the value of sym to include the |
| 2338 | fragment address, so we undo that adjustment here. */ |
| 2339 | subseg_change (sec, 0); |
| 2340 | fix_new (symbol_get_frag (sym), |
| 2341 | S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address, |
| 2342 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
| 2343 | } |
| 2344 | } |
| 2345 | |
| 2346 | /* This function is called after the symbol table has been completed, |
| 2347 | but before the relocs or section contents have been written out. |
| 2348 | If we have seen any .uses pseudo-ops, they point to an instruction |
| 2349 | which loads a register with the address of a function. We look |
| 2350 | through the fixups to find where the function address is being |
| 2351 | loaded from. We then generate a COUNT reloc giving the number of |
| 2352 | times that function address is referred to. The linker uses this |
| 2353 | information when doing relaxing, to decide when it can eliminate |
| 2354 | the stored function address entirely. */ |
| 2355 | |
| 2356 | void |
| 2357 | sh_frob_file () |
| 2358 | { |
| 2359 | if (! sh_relax) |
| 2360 | return; |
| 2361 | |
| 2362 | #ifdef BFD_ASSEMBLER |
| 2363 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); |
| 2364 | #else |
| 2365 | { |
| 2366 | int iseg; |
| 2367 | |
| 2368 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) |
| 2369 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); |
| 2370 | } |
| 2371 | #endif |
| 2372 | } |
| 2373 | |
| 2374 | /* Called after relaxing. Set the correct sizes of the fragments, and |
| 2375 | create relocs so that md_apply_fix will fill in the correct values. */ |
| 2376 | |
| 2377 | void |
| 2378 | md_convert_frag (headers, seg, fragP) |
| 2379 | #ifdef BFD_ASSEMBLER |
| 2380 | bfd *headers ATTRIBUTE_UNUSED; |
| 2381 | #else |
| 2382 | object_headers *headers; |
| 2383 | #endif |
| 2384 | segT seg; |
| 2385 | fragS *fragP; |
| 2386 | { |
| 2387 | int donerelax = 0; |
| 2388 | |
| 2389 | switch (fragP->fr_subtype) |
| 2390 | { |
| 2391 | case C (COND_JUMP, COND8): |
| 2392 | case C (COND_JUMP_DELAY, COND8): |
| 2393 | subseg_change (seg, 0); |
| 2394 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, |
| 2395 | 1, BFD_RELOC_SH_PCDISP8BY2); |
| 2396 | fragP->fr_fix += 2; |
| 2397 | fragP->fr_var = 0; |
| 2398 | break; |
| 2399 | |
| 2400 | case C (UNCOND_JUMP, UNCOND12): |
| 2401 | subseg_change (seg, 0); |
| 2402 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, |
| 2403 | 1, BFD_RELOC_SH_PCDISP12BY2); |
| 2404 | fragP->fr_fix += 2; |
| 2405 | fragP->fr_var = 0; |
| 2406 | break; |
| 2407 | |
| 2408 | case C (UNCOND_JUMP, UNCOND32): |
| 2409 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
| 2410 | if (fragP->fr_symbol == NULL) |
| 2411 | as_bad (_("at 0x%lx, displacement overflows 12-bit field"), |
| 2412 | (unsigned long) fragP->fr_address); |
| 2413 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
| 2414 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"), |
| 2415 | (unsigned long) fragP->fr_address, |
| 2416 | S_GET_NAME (fragP->fr_symbol)); |
| 2417 | else |
| 2418 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"), |
| 2419 | (unsigned long) fragP->fr_address, |
| 2420 | S_GET_NAME (fragP->fr_symbol)); |
| 2421 | |
| 2422 | #if 0 |
| 2423 | /* This code works, but generates poor code and the compiler |
| 2424 | should never produce a sequence that requires it to be used. */ |
| 2425 | |
| 2426 | /* A jump wont fit in 12 bits, make code which looks like |
| 2427 | bra foo |
| 2428 | mov.w @(0, PC), r14 |
| 2429 | .long disp |
| 2430 | foo: bra @r14 |
| 2431 | */ |
| 2432 | int t = buffer[0] & 0x10; |
| 2433 | |
| 2434 | buffer[highbyte ] = 0xa0; /* branch over move and disp */ |
| 2435 | buffer[lowbyte ] = 3; |
| 2436 | buffer[highbyte + 2] = 0xd0 | JREG; /* Build mov insn */ |
| 2437 | buffer[lowbyte + 2] = 0x00; |
| 2438 | |
| 2439 | buffer[highbyte + 4] = 0; /* space for 32 bit jump disp */ |
| 2440 | buffer[lowbyte + 4] = 0; |
| 2441 | buffer[highbyte + 6] = 0; |
| 2442 | buffer[lowbyte + 6] = 0; |
| 2443 | |
| 2444 | buffer[highbyte + 8] = 0x40 | JREG; /* Build jmp @JREG */ |
| 2445 | buffer[lowbyte + 8] = t ? 0xb : 0x2b; |
| 2446 | |
| 2447 | buffer[highbyte + 10] = 0x20; /* build nop */ |
| 2448 | buffer[lowbyte + 10] = 0x0b; |
| 2449 | |
| 2450 | /* Make reloc for the long disp. */ |
| 2451 | fix_new (fragP, |
| 2452 | fragP->fr_fix + 4, |
| 2453 | 4, |
| 2454 | fragP->fr_symbol, |
| 2455 | fragP->fr_offset, |
| 2456 | 0, |
| 2457 | BFD_RELOC_32); |
| 2458 | fragP->fr_fix += UNCOND32_LENGTH; |
| 2459 | fragP->fr_var = 0; |
| 2460 | donerelax = 1; |
| 2461 | #endif |
| 2462 | |
| 2463 | break; |
| 2464 | |
| 2465 | case C (COND_JUMP, COND12): |
| 2466 | case C (COND_JUMP_DELAY, COND12): |
| 2467 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
| 2468 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
| 2469 | was due to gas incorrectly relaxing an out-of-range conditional |
| 2470 | branch with delay slot. It turned: |
| 2471 | bf.s L6 (slot mov.l r12,@(44,r0)) |
| 2472 | into: |
| 2473 | |
| 2474 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
| 2475 | 30: 00 09 nop |
| 2476 | 32: 10 cb mov.l r12,@(44,r0) |
| 2477 | Therefore, branches with delay slots have to be handled |
| 2478 | differently from ones without delay slots. */ |
| 2479 | { |
| 2480 | unsigned char *buffer = |
| 2481 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); |
| 2482 | int highbyte = target_big_endian ? 0 : 1; |
| 2483 | int lowbyte = target_big_endian ? 1 : 0; |
| 2484 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); |
| 2485 | |
| 2486 | /* Toggle the true/false bit of the bcond. */ |
| 2487 | buffer[highbyte] ^= 0x2; |
| 2488 | |
| 2489 | /* If this is a dalayed branch, we may not put the the bra in the |
| 2490 | slot. So we change it to a non-delayed branch, like that: |
| 2491 | b! cond slot_label; bra disp; slot_label: slot_insn |
| 2492 | ??? We should try if swapping the conditional branch and |
| 2493 | its delay-slot insn already makes the branch reach. */ |
| 2494 | |
| 2495 | /* Build a relocation to six / four bytes farther on. */ |
| 2496 | subseg_change (seg, 0); |
| 2497 | fix_new (fragP, fragP->fr_fix, 2, |
| 2498 | #ifdef BFD_ASSEMBLER |
| 2499 | section_symbol (seg), |
| 2500 | #else |
| 2501 | seg_info (seg)->dot, |
| 2502 | #endif |
| 2503 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), |
| 2504 | 1, BFD_RELOC_SH_PCDISP8BY2); |
| 2505 | |
| 2506 | /* Set up a jump instruction. */ |
| 2507 | buffer[highbyte + 2] = 0xa0; |
| 2508 | buffer[lowbyte + 2] = 0; |
| 2509 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, |
| 2510 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); |
| 2511 | |
| 2512 | if (delay) |
| 2513 | { |
| 2514 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ |
| 2515 | fragP->fr_fix += 4; |
| 2516 | } |
| 2517 | else |
| 2518 | { |
| 2519 | /* Fill in a NOP instruction. */ |
| 2520 | buffer[highbyte + 4] = 0x0; |
| 2521 | buffer[lowbyte + 4] = 0x9; |
| 2522 | |
| 2523 | fragP->fr_fix += 6; |
| 2524 | } |
| 2525 | fragP->fr_var = 0; |
| 2526 | donerelax = 1; |
| 2527 | } |
| 2528 | break; |
| 2529 | |
| 2530 | case C (COND_JUMP, COND32): |
| 2531 | case C (COND_JUMP_DELAY, COND32): |
| 2532 | case C (COND_JUMP, UNDEF_WORD_DISP): |
| 2533 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
| 2534 | if (fragP->fr_symbol == NULL) |
| 2535 | as_bad (_("at 0x%lx, displacement overflows 8-bit field"), |
| 2536 | (unsigned long) fragP->fr_address); |
| 2537 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
| 2538 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "), |
| 2539 | (unsigned long) fragP->fr_address, |
| 2540 | S_GET_NAME (fragP->fr_symbol)); |
| 2541 | else |
| 2542 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "), |
| 2543 | (unsigned long) fragP->fr_address, |
| 2544 | S_GET_NAME (fragP->fr_symbol)); |
| 2545 | |
| 2546 | #if 0 |
| 2547 | /* This code works, but generates poor code, and the compiler |
| 2548 | should never produce a sequence that requires it to be used. */ |
| 2549 | |
| 2550 | /* A bcond won't fit and it won't go into a 12 bit |
| 2551 | displacement either, the code sequence looks like: |
| 2552 | b!cond foop |
| 2553 | mov.w @(n, PC), r14 |
| 2554 | jmp @r14 |
| 2555 | nop |
| 2556 | .long where |
| 2557 | foop: |
| 2558 | */ |
| 2559 | |
| 2560 | buffer[0] ^= 0x2; /* Toggle T/F bit */ |
| 2561 | #define JREG 14 |
| 2562 | buffer[1] = 5; /* branch over mov, jump, nop and ptr */ |
| 2563 | buffer[2] = 0xd0 | JREG; /* Build mov insn */ |
| 2564 | buffer[3] = 0x2; |
| 2565 | buffer[4] = 0x40 | JREG; /* Build jmp @JREG */ |
| 2566 | buffer[5] = 0x0b; |
| 2567 | buffer[6] = 0x20; /* build nop */ |
| 2568 | buffer[7] = 0x0b; |
| 2569 | buffer[8] = 0; /* space for 32 bit jump disp */ |
| 2570 | buffer[9] = 0; |
| 2571 | buffer[10] = 0; |
| 2572 | buffer[11] = 0; |
| 2573 | buffer[12] = 0; |
| 2574 | buffer[13] = 0; |
| 2575 | /* Make reloc for the long disp */ |
| 2576 | fix_new (fragP, |
| 2577 | fragP->fr_fix + 8, |
| 2578 | 4, |
| 2579 | fragP->fr_symbol, |
| 2580 | fragP->fr_offset, |
| 2581 | 0, |
| 2582 | BFD_RELOC_32); |
| 2583 | fragP->fr_fix += COND32_LENGTH; |
| 2584 | fragP->fr_var = 0; |
| 2585 | donerelax = 1; |
| 2586 | #endif |
| 2587 | |
| 2588 | break; |
| 2589 | |
| 2590 | default: |
| 2591 | abort (); |
| 2592 | } |
| 2593 | |
| 2594 | if (donerelax && !sh_relax) |
| 2595 | as_warn_where (fragP->fr_file, fragP->fr_line, |
| 2596 | _("overflow in branch to %s; converted into longer instruction sequence"), |
| 2597 | (fragP->fr_symbol != NULL |
| 2598 | ? S_GET_NAME (fragP->fr_symbol) |
| 2599 | : "")); |
| 2600 | } |
| 2601 | |
| 2602 | valueT |
| 2603 | md_section_align (seg, size) |
| 2604 | segT seg; |
| 2605 | valueT size; |
| 2606 | { |
| 2607 | #ifdef BFD_ASSEMBLER |
| 2608 | #ifdef OBJ_ELF |
| 2609 | return size; |
| 2610 | #else /* ! OBJ_ELF */ |
| 2611 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) |
| 2612 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); |
| 2613 | #endif /* ! OBJ_ELF */ |
| 2614 | #else /* ! BFD_ASSEMBLER */ |
| 2615 | return ((size + (1 << section_alignment[(int) seg]) - 1) |
| 2616 | & (-1 << section_alignment[(int) seg])); |
| 2617 | #endif /* ! BFD_ASSEMBLER */ |
| 2618 | } |
| 2619 | |
| 2620 | /* This static variable is set by s_uacons to tell sh_cons_align that |
| 2621 | the expession does not need to be aligned. */ |
| 2622 | |
| 2623 | static int sh_no_align_cons = 0; |
| 2624 | |
| 2625 | /* This handles the unaligned space allocation pseudo-ops, such as |
| 2626 | .uaword. .uaword is just like .word, but the value does not need |
| 2627 | to be aligned. */ |
| 2628 | |
| 2629 | static void |
| 2630 | s_uacons (bytes) |
| 2631 | int bytes; |
| 2632 | { |
| 2633 | /* Tell sh_cons_align not to align this value. */ |
| 2634 | sh_no_align_cons = 1; |
| 2635 | cons (bytes); |
| 2636 | } |
| 2637 | |
| 2638 | /* If a .word, et. al., pseud-op is seen, warn if the value is not |
| 2639 | aligned correctly. Note that this can cause warnings to be issued |
| 2640 | when assembling initialized structured which were declared with the |
| 2641 | packed attribute. FIXME: Perhaps we should require an option to |
| 2642 | enable this warning? */ |
| 2643 | |
| 2644 | void |
| 2645 | sh_cons_align (nbytes) |
| 2646 | int nbytes; |
| 2647 | { |
| 2648 | int nalign; |
| 2649 | char *p; |
| 2650 | |
| 2651 | if (sh_no_align_cons) |
| 2652 | { |
| 2653 | /* This is an unaligned pseudo-op. */ |
| 2654 | sh_no_align_cons = 0; |
| 2655 | return; |
| 2656 | } |
| 2657 | |
| 2658 | nalign = 0; |
| 2659 | while ((nbytes & 1) == 0) |
| 2660 | { |
| 2661 | ++nalign; |
| 2662 | nbytes >>= 1; |
| 2663 | } |
| 2664 | |
| 2665 | if (nalign == 0) |
| 2666 | return; |
| 2667 | |
| 2668 | if (now_seg == absolute_section) |
| 2669 | { |
| 2670 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) |
| 2671 | as_warn (_("misaligned data")); |
| 2672 | return; |
| 2673 | } |
| 2674 | |
| 2675 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, |
| 2676 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
| 2677 | |
| 2678 | record_alignment (now_seg, nalign); |
| 2679 | } |
| 2680 | |
| 2681 | /* When relaxing, we need to output a reloc for any .align directive |
| 2682 | that requests alignment to a four byte boundary or larger. This is |
| 2683 | also where we check for misaligned data. */ |
| 2684 | |
| 2685 | void |
| 2686 | sh_handle_align (frag) |
| 2687 | fragS *frag; |
| 2688 | { |
| 2689 | if (sh_relax |
| 2690 | && frag->fr_type == rs_align |
| 2691 | && frag->fr_address + frag->fr_fix > 0 |
| 2692 | && frag->fr_offset > 1 |
| 2693 | && now_seg != bss_section) |
| 2694 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, |
| 2695 | BFD_RELOC_SH_ALIGN); |
| 2696 | |
| 2697 | if (frag->fr_type == rs_align_code |
| 2698 | && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0) |
| 2699 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); |
| 2700 | } |
| 2701 | |
| 2702 | /* This macro decides whether a particular reloc is an entry in a |
| 2703 | switch table. It is used when relaxing, because the linker needs |
| 2704 | to know about all such entries so that it can adjust them if |
| 2705 | necessary. */ |
| 2706 | |
| 2707 | #ifdef BFD_ASSEMBLER |
| 2708 | #define SWITCH_TABLE_CONS(fix) (0) |
| 2709 | #else |
| 2710 | #define SWITCH_TABLE_CONS(fix) \ |
| 2711 | ((fix)->fx_r_type == 0 \ |
| 2712 | && ((fix)->fx_size == 2 \ |
| 2713 | || (fix)->fx_size == 1 \ |
| 2714 | || (fix)->fx_size == 4)) |
| 2715 | #endif |
| 2716 | |
| 2717 | #define SWITCH_TABLE(fix) \ |
| 2718 | ((fix)->fx_addsy != NULL \ |
| 2719 | && (fix)->fx_subsy != NULL \ |
| 2720 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ |
| 2721 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ |
| 2722 | && ((fix)->fx_r_type == BFD_RELOC_32 \ |
| 2723 | || (fix)->fx_r_type == BFD_RELOC_16 \ |
| 2724 | || (fix)->fx_r_type == BFD_RELOC_8 \ |
| 2725 | || SWITCH_TABLE_CONS (fix))) |
| 2726 | |
| 2727 | /* See whether we need to force a relocation into the output file. |
| 2728 | This is used to force out switch and PC relative relocations when |
| 2729 | relaxing. */ |
| 2730 | |
| 2731 | int |
| 2732 | sh_force_relocation (fix) |
| 2733 | fixS *fix; |
| 2734 | { |
| 2735 | |
| 2736 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
| 2737 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
| 2738 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
| 2739 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END) |
| 2740 | return 1; |
| 2741 | |
| 2742 | if (! sh_relax) |
| 2743 | return 0; |
| 2744 | |
| 2745 | return (fix->fx_pcrel |
| 2746 | || SWITCH_TABLE (fix) |
| 2747 | || fix->fx_r_type == BFD_RELOC_SH_COUNT |
| 2748 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN |
| 2749 | || fix->fx_r_type == BFD_RELOC_SH_CODE |
| 2750 | || fix->fx_r_type == BFD_RELOC_SH_DATA |
| 2751 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
| 2752 | } |
| 2753 | |
| 2754 | #ifdef OBJ_ELF |
| 2755 | boolean |
| 2756 | sh_fix_adjustable (fixP) |
| 2757 | fixS *fixP; |
| 2758 | { |
| 2759 | |
| 2760 | if (fixP->fx_addsy == NULL) |
| 2761 | return 1; |
| 2762 | |
| 2763 | if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 |
| 2764 | || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 |
| 2765 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 |
| 2766 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 |
| 2767 | || fixP->fx_r_type == BFD_RELOC_8_PCREL |
| 2768 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16 |
| 2769 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32) |
| 2770 | return 1; |
| 2771 | |
| 2772 | if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP) |
| 2773 | || fixP->fx_r_type == BFD_RELOC_32_GOTOFF |
| 2774 | || fixP->fx_r_type == BFD_RELOC_RVA) |
| 2775 | return 0; |
| 2776 | |
| 2777 | /* We need the symbol name for the VTABLE entries */ |
| 2778 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
| 2779 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
| 2780 | return 0; |
| 2781 | |
| 2782 | return 1; |
| 2783 | } |
| 2784 | |
| 2785 | void |
| 2786 | sh_elf_final_processing () |
| 2787 | { |
| 2788 | int val; |
| 2789 | |
| 2790 | /* Set file-specific flags to indicate if this code needs |
| 2791 | a processor with the sh-dsp / sh3e ISA to execute. */ |
| 2792 | if (valid_arch & arch_sh1) |
| 2793 | val = EF_SH1; |
| 2794 | else if (valid_arch & arch_sh2) |
| 2795 | val = EF_SH2; |
| 2796 | else if (valid_arch & arch_sh_dsp) |
| 2797 | val = EF_SH_DSP; |
| 2798 | else if (valid_arch & arch_sh3) |
| 2799 | val = EF_SH3; |
| 2800 | else if (valid_arch & arch_sh3_dsp) |
| 2801 | val = EF_SH_DSP; |
| 2802 | else if (valid_arch & arch_sh3e) |
| 2803 | val = EF_SH3E; |
| 2804 | else if (valid_arch & arch_sh4) |
| 2805 | val = EF_SH4; |
| 2806 | else |
| 2807 | abort (); |
| 2808 | |
| 2809 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; |
| 2810 | elf_elfheader (stdoutput)->e_flags |= val; |
| 2811 | } |
| 2812 | #endif |
| 2813 | |
| 2814 | /* Apply a fixup to the object file. */ |
| 2815 | |
| 2816 | #ifdef BFD_ASSEMBLER |
| 2817 | int |
| 2818 | md_apply_fix (fixP, valp) |
| 2819 | fixS *fixP; |
| 2820 | valueT *valp; |
| 2821 | #else |
| 2822 | void |
| 2823 | md_apply_fix (fixP, val) |
| 2824 | fixS *fixP; |
| 2825 | long val; |
| 2826 | #endif |
| 2827 | { |
| 2828 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
| 2829 | int lowbyte = target_big_endian ? 1 : 0; |
| 2830 | int highbyte = target_big_endian ? 0 : 1; |
| 2831 | #ifdef BFD_ASSEMBLER |
| 2832 | long val = *valp; |
| 2833 | #endif |
| 2834 | long max, min; |
| 2835 | int shift; |
| 2836 | |
| 2837 | #ifdef BFD_ASSEMBLER |
| 2838 | /* A difference between two symbols, the second of which is in the |
| 2839 | current section, is transformed in a PC-relative relocation to |
| 2840 | the other symbol. We have to adjust the relocation type here. */ |
| 2841 | if (fixP->fx_pcrel) |
| 2842 | { |
| 2843 | switch (fixP->fx_r_type) |
| 2844 | { |
| 2845 | default: |
| 2846 | break; |
| 2847 | |
| 2848 | case BFD_RELOC_32: |
| 2849 | fixP->fx_r_type = BFD_RELOC_32_PCREL; |
| 2850 | break; |
| 2851 | |
| 2852 | /* Currently, we only support 32-bit PCREL relocations. |
| 2853 | We'd need a new reloc type to handle 16_PCREL, and |
| 2854 | 8_PCREL is already taken for R_SH_SWITCH8, which |
| 2855 | apparently does something completely different than what |
| 2856 | we need. FIXME. */ |
| 2857 | case BFD_RELOC_16: |
| 2858 | bfd_set_error (bfd_error_bad_value); |
| 2859 | return false; |
| 2860 | |
| 2861 | case BFD_RELOC_8: |
| 2862 | bfd_set_error (bfd_error_bad_value); |
| 2863 | return false; |
| 2864 | } |
| 2865 | } |
| 2866 | |
| 2867 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
| 2868 | symbol into a reloc against a section, but bfd_install_relocation |
| 2869 | will screw up if the symbol is defined, so we have to adjust val here |
| 2870 | to avoid the screw up later. */ |
| 2871 | if (fixP->fx_addsy != NULL |
| 2872 | && S_IS_WEAK (fixP->fx_addsy)) |
| 2873 | val -= S_GET_VALUE (fixP->fx_addsy); |
| 2874 | #endif |
| 2875 | |
| 2876 | #ifndef BFD_ASSEMBLER |
| 2877 | if (fixP->fx_r_type == 0) |
| 2878 | { |
| 2879 | if (fixP->fx_size == 2) |
| 2880 | fixP->fx_r_type = BFD_RELOC_16; |
| 2881 | else if (fixP->fx_size == 4) |
| 2882 | fixP->fx_r_type = BFD_RELOC_32; |
| 2883 | else if (fixP->fx_size == 1) |
| 2884 | fixP->fx_r_type = BFD_RELOC_8; |
| 2885 | else |
| 2886 | abort (); |
| 2887 | } |
| 2888 | #endif |
| 2889 | |
| 2890 | max = min = 0; |
| 2891 | shift = 0; |
| 2892 | switch (fixP->fx_r_type) |
| 2893 | { |
| 2894 | case BFD_RELOC_SH_IMM4: |
| 2895 | max = 0xf; |
| 2896 | *buf = (*buf & 0xf0) | (val & 0xf); |
| 2897 | break; |
| 2898 | |
| 2899 | case BFD_RELOC_SH_IMM4BY2: |
| 2900 | max = 0xf; |
| 2901 | shift = 1; |
| 2902 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); |
| 2903 | break; |
| 2904 | |
| 2905 | case BFD_RELOC_SH_IMM4BY4: |
| 2906 | max = 0xf; |
| 2907 | shift = 2; |
| 2908 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); |
| 2909 | break; |
| 2910 | |
| 2911 | case BFD_RELOC_SH_IMM8BY2: |
| 2912 | max = 0xff; |
| 2913 | shift = 1; |
| 2914 | *buf = val >> 1; |
| 2915 | break; |
| 2916 | |
| 2917 | case BFD_RELOC_SH_IMM8BY4: |
| 2918 | max = 0xff; |
| 2919 | shift = 2; |
| 2920 | *buf = val >> 2; |
| 2921 | break; |
| 2922 | |
| 2923 | case BFD_RELOC_8: |
| 2924 | case BFD_RELOC_SH_IMM8: |
| 2925 | /* Sometimes the 8 bit value is sign extended (e.g., add) and |
| 2926 | sometimes it is not (e.g., and). We permit any 8 bit value. |
| 2927 | Note that adding further restrictions may invalidate |
| 2928 | reasonable looking assembly code, such as ``and -0x1,r0''. */ |
| 2929 | max = 0xff; |
| 2930 | min = -0xff; |
| 2931 | *buf++ = val; |
| 2932 | break; |
| 2933 | |
| 2934 | case BFD_RELOC_SH_PCRELIMM8BY4: |
| 2935 | /* The lower two bits of the PC are cleared before the |
| 2936 | displacement is added in. We can assume that the destination |
| 2937 | is on a 4 byte bounday. If this instruction is also on a 4 |
| 2938 | byte boundary, then we want |
| 2939 | (target - here) / 4 |
| 2940 | and target - here is a multiple of 4. |
| 2941 | Otherwise, we are on a 2 byte boundary, and we want |
| 2942 | (target - (here - 2)) / 4 |
| 2943 | and target - here is not a multiple of 4. Computing |
| 2944 | (target - (here - 2)) / 4 == (target - here + 2) / 4 |
| 2945 | works for both cases, since in the first case the addition of |
| 2946 | 2 will be removed by the division. target - here is in the |
| 2947 | variable val. */ |
| 2948 | val = (val + 2) / 4; |
| 2949 | if (val & ~0xff) |
| 2950 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
| 2951 | buf[lowbyte] = val; |
| 2952 | break; |
| 2953 | |
| 2954 | case BFD_RELOC_SH_PCRELIMM8BY2: |
| 2955 | val /= 2; |
| 2956 | if (val & ~0xff) |
| 2957 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
| 2958 | buf[lowbyte] = val; |
| 2959 | break; |
| 2960 | |
| 2961 | case BFD_RELOC_SH_PCDISP8BY2: |
| 2962 | val /= 2; |
| 2963 | if (val < -0x80 || val > 0x7f) |
| 2964 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
| 2965 | buf[lowbyte] = val; |
| 2966 | break; |
| 2967 | |
| 2968 | case BFD_RELOC_SH_PCDISP12BY2: |
| 2969 | val /= 2; |
| 2970 | if (val < -0x800 || val >= 0x7ff) |
| 2971 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
| 2972 | buf[lowbyte] = val & 0xff; |
| 2973 | buf[highbyte] |= (val >> 8) & 0xf; |
| 2974 | break; |
| 2975 | |
| 2976 | case BFD_RELOC_32: |
| 2977 | case BFD_RELOC_32_PCREL: |
| 2978 | md_number_to_chars (buf, val, 4); |
| 2979 | break; |
| 2980 | |
| 2981 | case BFD_RELOC_16: |
| 2982 | md_number_to_chars (buf, val, 2); |
| 2983 | break; |
| 2984 | |
| 2985 | case BFD_RELOC_SH_USES: |
| 2986 | /* Pass the value into sh_coff_reloc_mangle. */ |
| 2987 | fixP->fx_addnumber = val; |
| 2988 | break; |
| 2989 | |
| 2990 | case BFD_RELOC_SH_COUNT: |
| 2991 | case BFD_RELOC_SH_ALIGN: |
| 2992 | case BFD_RELOC_SH_CODE: |
| 2993 | case BFD_RELOC_SH_DATA: |
| 2994 | case BFD_RELOC_SH_LABEL: |
| 2995 | /* Nothing to do here. */ |
| 2996 | break; |
| 2997 | |
| 2998 | case BFD_RELOC_SH_LOOP_START: |
| 2999 | case BFD_RELOC_SH_LOOP_END: |
| 3000 | |
| 3001 | case BFD_RELOC_VTABLE_INHERIT: |
| 3002 | case BFD_RELOC_VTABLE_ENTRY: |
| 3003 | fixP->fx_done = 0; |
| 3004 | #ifdef BFD_ASSEMBLER |
| 3005 | return 0; |
| 3006 | #else |
| 3007 | return; |
| 3008 | #endif |
| 3009 | |
| 3010 | #ifdef OBJ_ELF |
| 3011 | case BFD_RELOC_32_PLT_PCREL: |
| 3012 | /* Make the jump instruction point to the address of the operand. At |
| 3013 | runtime we merely add the offset to the actual PLT entry. */ |
| 3014 | *valp = 0xfffffffc; |
| 3015 | break; |
| 3016 | |
| 3017 | case BFD_RELOC_SH_GOTPC: |
| 3018 | /* This is tough to explain. We end up with this one if we have |
| 3019 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". |
| 3020 | The goal here is to obtain the absolute address of the GOT, |
| 3021 | and it is strongly preferable from a performance point of |
| 3022 | view to avoid using a runtime relocation for this. There are |
| 3023 | cases where you have something like: |
| 3024 | |
| 3025 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
| 3026 | |
| 3027 | and here no correction would be required. Internally in the |
| 3028 | assembler we treat operands of this form as not being pcrel |
| 3029 | since the '.' is explicitly mentioned, and I wonder whether |
| 3030 | it would simplify matters to do it this way. Who knows. In |
| 3031 | earlier versions of the PIC patches, the pcrel_adjust field |
| 3032 | was used to store the correction, but since the expression is |
| 3033 | not pcrel, I felt it would be confusing to do it this way. */ |
| 3034 | *valp -= 1; |
| 3035 | md_number_to_chars (buf, val, 4); |
| 3036 | break; |
| 3037 | |
| 3038 | case BFD_RELOC_32_GOT_PCREL: |
| 3039 | *valp = 0; /* Fully resolved at runtime. No addend. */ |
| 3040 | md_number_to_chars (buf, 0, 4); |
| 3041 | break; |
| 3042 | |
| 3043 | case BFD_RELOC_32_GOTOFF: |
| 3044 | break; |
| 3045 | #endif |
| 3046 | |
| 3047 | default: |
| 3048 | abort (); |
| 3049 | } |
| 3050 | |
| 3051 | if (shift != 0) |
| 3052 | { |
| 3053 | if ((val & ((1 << shift) - 1)) != 0) |
| 3054 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); |
| 3055 | if (val >= 0) |
| 3056 | val >>= shift; |
| 3057 | else |
| 3058 | val = ((val >> shift) |
| 3059 | | ((long) -1 & ~ ((long) -1 >> shift))); |
| 3060 | } |
| 3061 | if (max != 0 && (val < min || val > max)) |
| 3062 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); |
| 3063 | |
| 3064 | #ifdef BFD_ASSEMBLER |
| 3065 | return 0; |
| 3066 | #endif |
| 3067 | } |
| 3068 | |
| 3069 | /* Called just before address relaxation. Return the length |
| 3070 | by which a fragment must grow to reach it's destination. */ |
| 3071 | |
| 3072 | int |
| 3073 | md_estimate_size_before_relax (fragP, segment_type) |
| 3074 | register fragS *fragP; |
| 3075 | register segT segment_type; |
| 3076 | { |
| 3077 | switch (fragP->fr_subtype) |
| 3078 | { |
| 3079 | case C (UNCOND_JUMP, UNDEF_DISP): |
| 3080 | /* Used to be a branch to somewhere which was unknown. */ |
| 3081 | if (!fragP->fr_symbol) |
| 3082 | { |
| 3083 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); |
| 3084 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; |
| 3085 | } |
| 3086 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) |
| 3087 | { |
| 3088 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); |
| 3089 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; |
| 3090 | } |
| 3091 | else |
| 3092 | { |
| 3093 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); |
| 3094 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; |
| 3095 | return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; |
| 3096 | } |
| 3097 | break; |
| 3098 | |
| 3099 | default: |
| 3100 | abort (); |
| 3101 | case C (COND_JUMP, UNDEF_DISP): |
| 3102 | case C (COND_JUMP_DELAY, UNDEF_DISP): |
| 3103 | /* Used to be a branch to somewhere which was unknown. */ |
| 3104 | if (fragP->fr_symbol |
| 3105 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) |
| 3106 | { |
| 3107 | int what = GET_WHAT (fragP->fr_subtype); |
| 3108 | /* Got a symbol and it's defined in this segment, become byte |
| 3109 | sized - maybe it will fix up. */ |
| 3110 | fragP->fr_subtype = C (what, COND8); |
| 3111 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; |
| 3112 | } |
| 3113 | else if (fragP->fr_symbol) |
| 3114 | { |
| 3115 | int what = GET_WHAT (fragP->fr_subtype); |
| 3116 | /* Its got a segment, but its not ours, so it will always be long. */ |
| 3117 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
| 3118 | fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length; |
| 3119 | return md_relax_table[C (what, COND32)].rlx_length; |
| 3120 | } |
| 3121 | else |
| 3122 | { |
| 3123 | int what = GET_WHAT (fragP->fr_subtype); |
| 3124 | /* We know the abs value. */ |
| 3125 | fragP->fr_subtype = C (what, COND8); |
| 3126 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; |
| 3127 | } |
| 3128 | |
| 3129 | break; |
| 3130 | } |
| 3131 | return fragP->fr_var; |
| 3132 | } |
| 3133 | |
| 3134 | /* Put number into target byte order. */ |
| 3135 | |
| 3136 | void |
| 3137 | md_number_to_chars (ptr, use, nbytes) |
| 3138 | char *ptr; |
| 3139 | valueT use; |
| 3140 | int nbytes; |
| 3141 | { |
| 3142 | if (! target_big_endian) |
| 3143 | number_to_chars_littleendian (ptr, use, nbytes); |
| 3144 | else |
| 3145 | number_to_chars_bigendian (ptr, use, nbytes); |
| 3146 | } |
| 3147 | |
| 3148 | long |
| 3149 | md_pcrel_from (fixP) |
| 3150 | fixS *fixP; |
| 3151 | { |
| 3152 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; |
| 3153 | } |
| 3154 | |
| 3155 | #ifdef OBJ_COFF |
| 3156 | |
| 3157 | int |
| 3158 | tc_coff_sizemachdep (frag) |
| 3159 | fragS *frag; |
| 3160 | { |
| 3161 | return md_relax_table[frag->fr_subtype].rlx_length; |
| 3162 | } |
| 3163 | |
| 3164 | #endif /* OBJ_COFF */ |
| 3165 | |
| 3166 | /* When we align the .text section, insert the correct NOP pattern. */ |
| 3167 | |
| 3168 | int |
| 3169 | sh_do_align (n, fill, len, max) |
| 3170 | int n; |
| 3171 | const char *fill; |
| 3172 | int len ATTRIBUTE_UNUSED; |
| 3173 | int max; |
| 3174 | { |
| 3175 | if (fill == NULL |
| 3176 | && subseg_text_p (now_seg) |
| 3177 | && n > 1) |
| 3178 | { |
| 3179 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; |
| 3180 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; |
| 3181 | |
| 3182 | /* First align to a 2 byte boundary, in case there is an odd |
| 3183 | .byte. */ |
| 3184 | frag_align (1, 0, 0); |
| 3185 | if (target_big_endian) |
| 3186 | frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max); |
| 3187 | else |
| 3188 | frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern, |
| 3189 | max); |
| 3190 | return 1; |
| 3191 | } |
| 3192 | |
| 3193 | return 0; |
| 3194 | } |
| 3195 | |
| 3196 | #ifndef BFD_ASSEMBLER |
| 3197 | #ifdef OBJ_COFF |
| 3198 | |
| 3199 | /* Map BFD relocs to SH COFF relocs. */ |
| 3200 | |
| 3201 | struct reloc_map |
| 3202 | { |
| 3203 | bfd_reloc_code_real_type bfd_reloc; |
| 3204 | int sh_reloc; |
| 3205 | }; |
| 3206 | |
| 3207 | static const struct reloc_map coff_reloc_map[] = |
| 3208 | { |
| 3209 | { BFD_RELOC_32, R_SH_IMM32 }, |
| 3210 | { BFD_RELOC_16, R_SH_IMM16 }, |
| 3211 | { BFD_RELOC_8, R_SH_IMM8 }, |
| 3212 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, |
| 3213 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, |
| 3214 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, |
| 3215 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, |
| 3216 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, |
| 3217 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, |
| 3218 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, |
| 3219 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, |
| 3220 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, |
| 3221 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, |
| 3222 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, |
| 3223 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, |
| 3224 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, |
| 3225 | { BFD_RELOC_SH_USES, R_SH_USES }, |
| 3226 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, |
| 3227 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, |
| 3228 | { BFD_RELOC_SH_CODE, R_SH_CODE }, |
| 3229 | { BFD_RELOC_SH_DATA, R_SH_DATA }, |
| 3230 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, |
| 3231 | { BFD_RELOC_UNUSED, 0 } |
| 3232 | }; |
| 3233 | |
| 3234 | /* Adjust a reloc for the SH. This is similar to the generic code, |
| 3235 | but does some minor tweaking. */ |
| 3236 | |
| 3237 | void |
| 3238 | sh_coff_reloc_mangle (seg, fix, intr, paddr) |
| 3239 | segment_info_type *seg; |
| 3240 | fixS *fix; |
| 3241 | struct internal_reloc *intr; |
| 3242 | unsigned int paddr; |
| 3243 | { |
| 3244 | symbolS *symbol_ptr = fix->fx_addsy; |
| 3245 | symbolS *dot; |
| 3246 | |
| 3247 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; |
| 3248 | |
| 3249 | if (! SWITCH_TABLE (fix)) |
| 3250 | { |
| 3251 | const struct reloc_map *rm; |
| 3252 | |
| 3253 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) |
| 3254 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) |
| 3255 | break; |
| 3256 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) |
| 3257 | as_bad_where (fix->fx_file, fix->fx_line, |
| 3258 | _("Can not represent %s relocation in this object file format"), |
| 3259 | bfd_get_reloc_code_name (fix->fx_r_type)); |
| 3260 | intr->r_type = rm->sh_reloc; |
| 3261 | intr->r_offset = 0; |
| 3262 | } |
| 3263 | else |
| 3264 | { |
| 3265 | know (sh_relax); |
| 3266 | |
| 3267 | if (fix->fx_r_type == BFD_RELOC_16) |
| 3268 | intr->r_type = R_SH_SWITCH16; |
| 3269 | else if (fix->fx_r_type == BFD_RELOC_8) |
| 3270 | intr->r_type = R_SH_SWITCH8; |
| 3271 | else if (fix->fx_r_type == BFD_RELOC_32) |
| 3272 | intr->r_type = R_SH_SWITCH32; |
| 3273 | else |
| 3274 | abort (); |
| 3275 | |
| 3276 | /* For a switch reloc, we set r_offset to the difference between |
| 3277 | the reloc address and the subtrahend. When the linker is |
| 3278 | doing relaxing, it can use the determine the starting and |
| 3279 | ending points of the switch difference expression. */ |
| 3280 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); |
| 3281 | } |
| 3282 | |
| 3283 | /* PC relative relocs are always against the current section. */ |
| 3284 | if (symbol_ptr == NULL) |
| 3285 | { |
| 3286 | switch (fix->fx_r_type) |
| 3287 | { |
| 3288 | case BFD_RELOC_SH_PCRELIMM8BY2: |
| 3289 | case BFD_RELOC_SH_PCRELIMM8BY4: |
| 3290 | case BFD_RELOC_SH_PCDISP8BY2: |
| 3291 | case BFD_RELOC_SH_PCDISP12BY2: |
| 3292 | case BFD_RELOC_SH_USES: |
| 3293 | symbol_ptr = seg->dot; |
| 3294 | break; |
| 3295 | default: |
| 3296 | break; |
| 3297 | } |
| 3298 | } |
| 3299 | |
| 3300 | if (fix->fx_r_type == BFD_RELOC_SH_USES) |
| 3301 | { |
| 3302 | /* We can't store the offset in the object file, since this |
| 3303 | reloc does not take up any space, so we store it in r_offset. |
| 3304 | The fx_addnumber field was set in md_apply_fix. */ |
| 3305 | intr->r_offset = fix->fx_addnumber; |
| 3306 | } |
| 3307 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) |
| 3308 | { |
| 3309 | /* We can't store the count in the object file, since this reloc |
| 3310 | does not take up any space, so we store it in r_offset. The |
| 3311 | fx_offset field was set when the fixup was created in |
| 3312 | sh_coff_frob_file. */ |
| 3313 | intr->r_offset = fix->fx_offset; |
| 3314 | /* This reloc is always absolute. */ |
| 3315 | symbol_ptr = NULL; |
| 3316 | } |
| 3317 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) |
| 3318 | { |
| 3319 | /* Store the alignment in the r_offset field. */ |
| 3320 | intr->r_offset = fix->fx_offset; |
| 3321 | /* This reloc is always absolute. */ |
| 3322 | symbol_ptr = NULL; |
| 3323 | } |
| 3324 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE |
| 3325 | || fix->fx_r_type == BFD_RELOC_SH_DATA |
| 3326 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) |
| 3327 | { |
| 3328 | /* These relocs are always absolute. */ |
| 3329 | symbol_ptr = NULL; |
| 3330 | } |
| 3331 | |
| 3332 | /* Turn the segment of the symbol into an offset. */ |
| 3333 | if (symbol_ptr != NULL) |
| 3334 | { |
| 3335 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; |
| 3336 | if (dot != NULL) |
| 3337 | intr->r_symndx = dot->sy_number; |
| 3338 | else |
| 3339 | intr->r_symndx = symbol_ptr->sy_number; |
| 3340 | } |
| 3341 | else |
| 3342 | intr->r_symndx = -1; |
| 3343 | } |
| 3344 | |
| 3345 | #endif /* OBJ_COFF */ |
| 3346 | #endif /* ! BFD_ASSEMBLER */ |
| 3347 | |
| 3348 | #ifdef BFD_ASSEMBLER |
| 3349 | |
| 3350 | /* Create a reloc. */ |
| 3351 | |
| 3352 | arelent * |
| 3353 | tc_gen_reloc (section, fixp) |
| 3354 | asection *section ATTRIBUTE_UNUSED; |
| 3355 | fixS *fixp; |
| 3356 | { |
| 3357 | arelent *rel; |
| 3358 | bfd_reloc_code_real_type r_type; |
| 3359 | |
| 3360 | rel = (arelent *) xmalloc (sizeof (arelent)); |
| 3361 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
| 3362 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
| 3363 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
| 3364 | |
| 3365 | r_type = fixp->fx_r_type; |
| 3366 | |
| 3367 | if (SWITCH_TABLE (fixp)) |
| 3368 | { |
| 3369 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); |
| 3370 | if (r_type == BFD_RELOC_16) |
| 3371 | r_type = BFD_RELOC_SH_SWITCH16; |
| 3372 | else if (r_type == BFD_RELOC_8) |
| 3373 | r_type = BFD_RELOC_8_PCREL; |
| 3374 | else if (r_type == BFD_RELOC_32) |
| 3375 | r_type = BFD_RELOC_SH_SWITCH32; |
| 3376 | else |
| 3377 | abort (); |
| 3378 | } |
| 3379 | else if (r_type == BFD_RELOC_SH_USES) |
| 3380 | rel->addend = fixp->fx_addnumber; |
| 3381 | else if (r_type == BFD_RELOC_SH_COUNT) |
| 3382 | rel->addend = fixp->fx_offset; |
| 3383 | else if (r_type == BFD_RELOC_SH_ALIGN) |
| 3384 | rel->addend = fixp->fx_offset; |
| 3385 | else if (r_type == BFD_RELOC_VTABLE_INHERIT |
| 3386 | || r_type == BFD_RELOC_VTABLE_ENTRY) |
| 3387 | rel->addend = fixp->fx_offset; |
| 3388 | else if (r_type == BFD_RELOC_SH_LOOP_START |
| 3389 | || r_type == BFD_RELOC_SH_LOOP_END) |
| 3390 | rel->addend = fixp->fx_offset; |
| 3391 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) |
| 3392 | { |
| 3393 | rel->addend = 0; |
| 3394 | rel->address = rel->addend = fixp->fx_offset; |
| 3395 | } |
| 3396 | else if (fixp->fx_pcrel) |
| 3397 | rel->addend = fixp->fx_addnumber; |
| 3398 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
| 3399 | rel->addend = fixp->fx_addnumber; |
| 3400 | else |
| 3401 | rel->addend = 0; |
| 3402 | |
| 3403 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); |
| 3404 | if (rel->howto == NULL) |
| 3405 | { |
| 3406 | as_bad_where (fixp->fx_file, fixp->fx_line, |
| 3407 | _("Cannot represent relocation type %s"), |
| 3408 | bfd_get_reloc_code_name (r_type)); |
| 3409 | /* Set howto to a garbage value so that we can keep going. */ |
| 3410 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); |
| 3411 | assert (rel->howto != NULL); |
| 3412 | } |
| 3413 | |
| 3414 | return rel; |
| 3415 | } |
| 3416 | |
| 3417 | #endif /* BFD_ASSEMBLER */ |
| 3418 | |
| 3419 | void |
| 3420 | sh_finalize () |
| 3421 | { |
| 3422 | if (debug_type == DEBUG_DWARF2) |
| 3423 | dwarf2_finish (); |
| 3424 | } |