| 1 | /* tc-tic80.c -- Assemble for the TI TMS320C80 (MV) |
| 2 | Copyright 1996, 1997, 2000 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GAS, the GNU Assembler. |
| 5 | |
| 6 | GAS is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2, or (at your option) |
| 9 | any later version. |
| 10 | |
| 11 | GAS is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with GAS; see the file COPYING. If not, write to the Free |
| 18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
| 19 | 02111-1307, USA. */ |
| 20 | |
| 21 | #include "as.h" |
| 22 | #include "opcode/tic80.h" |
| 23 | |
| 24 | #define internal_error(what) \ |
| 25 | as_fatal (_("internal error:%s:%d: %s\n"), __FILE__, __LINE__, what) |
| 26 | |
| 27 | #define internal_error_a(what,arg) \ |
| 28 | as_fatal (_("internal error:%s:%d: %s %d\n"), __FILE__, __LINE__, what, arg) |
| 29 | \f |
| 30 | /* Generic assembler global variables which must be defined by all |
| 31 | targets. */ |
| 32 | |
| 33 | /* Characters which always start a comment. */ |
| 34 | const char comment_chars[] = ";"; |
| 35 | |
| 36 | /* Characters which start a comment at the beginning of a line. */ |
| 37 | const char line_comment_chars[] = ";*#"; |
| 38 | |
| 39 | /* Characters which may be used to separate multiple commands on a single |
| 40 | line. The semicolon is such a character by default and should not be |
| 41 | explicitly listed. */ |
| 42 | const char line_separator_chars[] = ""; |
| 43 | |
| 44 | /* Characters which are used to indicate an exponent in a floating |
| 45 | point number. */ |
| 46 | const char EXP_CHARS[] = "eE"; |
| 47 | |
| 48 | /* Characters which mean that a number is a floating point constant, |
| 49 | as in 0f1.0. */ |
| 50 | const char FLT_CHARS[] = "fF"; |
| 51 | |
| 52 | /* This table describes all the machine specific pseudo-ops the assembler |
| 53 | has to support. The fields are: |
| 54 | |
| 55 | pseudo-op name without dot |
| 56 | function to call to execute this pseudo-op |
| 57 | integer arg to pass to the function */ |
| 58 | |
| 59 | extern void obj_coff_section (); |
| 60 | |
| 61 | const pseudo_typeS md_pseudo_table[] = { |
| 62 | { "align", s_align_bytes, 4 }, /* Do byte alignment, default is a 4 byte boundary */ |
| 63 | { "word", cons, 4 }, /* FIXME: Should this be machine independent? */ |
| 64 | { "bss", s_lcomm_bytes, 1 }, |
| 65 | { "sect", obj_coff_section, 0}, /* For compatibility with TI tools */ |
| 66 | { "section", obj_coff_section, 0}, /* Standard COFF .section pseudo-op */ |
| 67 | { NULL, NULL, 0 } |
| 68 | }; |
| 69 | |
| 70 | /* Opcode hash table. */ |
| 71 | static struct hash_control *tic80_hash; |
| 72 | |
| 73 | static struct tic80_opcode * find_opcode PARAMS ((struct tic80_opcode *, expressionS [])); |
| 74 | static void build_insn PARAMS ((struct tic80_opcode *, expressionS *)); |
| 75 | static int get_operands PARAMS ((expressionS exp[])); |
| 76 | static int const_overflow PARAMS ((unsigned long num, int bits, int flags)); |
| 77 | |
| 78 | /* Replace short PC relative instructions with long form when |
| 79 | necessary. Currently this is off by default or when given the |
| 80 | -no-relax option. Turning it on by using the -relax option forces |
| 81 | all PC relative instructions to use the long form, which is why it |
| 82 | is currently not the default. */ |
| 83 | static int tic80_relax = 0; |
| 84 | \f |
| 85 | int |
| 86 | md_estimate_size_before_relax (fragP, segment_type) |
| 87 | fragS *fragP; |
| 88 | segT segment_type; |
| 89 | { |
| 90 | internal_error (_("Relaxation is a luxury we can't afford")); |
| 91 | return (-1); |
| 92 | } |
| 93 | |
| 94 | /* We have no need to default values of symbols. */ |
| 95 | |
| 96 | symbolS * |
| 97 | md_undefined_symbol (name) |
| 98 | char *name; |
| 99 | { |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | /* Turn a string in input_line_pointer into a floating point constant |
| 104 | of type TYPE, and store the appropriate bytes in *LITP. The number |
| 105 | of LITTLENUMS emitted is stored in *SIZEP. An error message is |
| 106 | returned, or NULL on OK. */ |
| 107 | |
| 108 | #define MAX_LITTLENUMS 4 |
| 109 | |
| 110 | char * |
| 111 | md_atof (type, litP, sizeP) |
| 112 | int type; |
| 113 | char *litP; |
| 114 | int *sizeP; |
| 115 | { |
| 116 | int prec; |
| 117 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; |
| 118 | LITTLENUM_TYPE *wordP; |
| 119 | char *t; |
| 120 | char *atof_ieee (); |
| 121 | |
| 122 | switch (type) |
| 123 | { |
| 124 | case 'f': |
| 125 | case 'F': |
| 126 | case 's': |
| 127 | case 'S': |
| 128 | prec = 2; |
| 129 | break; |
| 130 | |
| 131 | case 'd': |
| 132 | case 'D': |
| 133 | case 'r': |
| 134 | case 'R': |
| 135 | prec = 4; |
| 136 | break; |
| 137 | |
| 138 | default: |
| 139 | *sizeP = 0; |
| 140 | return _("bad call to md_atof ()"); |
| 141 | } |
| 142 | |
| 143 | t = atof_ieee (input_line_pointer, type, words); |
| 144 | if (t) |
| 145 | { |
| 146 | input_line_pointer = t; |
| 147 | } |
| 148 | |
| 149 | *sizeP = prec * sizeof (LITTLENUM_TYPE); |
| 150 | |
| 151 | for (wordP = words; prec--;) |
| 152 | { |
| 153 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
| 154 | litP += sizeof (LITTLENUM_TYPE); |
| 155 | } |
| 156 | return (NULL); |
| 157 | } |
| 158 | |
| 159 | /* Check to see if the constant value in NUM will fit in a field of |
| 160 | width BITS if it has flags FLAGS. */ |
| 161 | |
| 162 | static int |
| 163 | const_overflow (num, bits, flags) |
| 164 | unsigned long num; |
| 165 | int bits; |
| 166 | int flags; |
| 167 | { |
| 168 | long min, max; |
| 169 | int retval = 0; |
| 170 | |
| 171 | /* Only need to check fields less than 32 bits wide. */ |
| 172 | if (bits < 32) |
| 173 | if (flags & TIC80_OPERAND_SIGNED) |
| 174 | { |
| 175 | max = (1 << (bits - 1)) - 1; |
| 176 | min = - (1 << (bits - 1)); |
| 177 | retval = ((long) num > max) || ((long) num < min); |
| 178 | } |
| 179 | else |
| 180 | { |
| 181 | max = (1 << bits) - 1; |
| 182 | min = 0; |
| 183 | retval = (num > max) || (num < min); |
| 184 | } |
| 185 | return (retval); |
| 186 | } |
| 187 | |
| 188 | /* get_operands () parses a string of operands and fills in a passed |
| 189 | array of expressions in EXP. |
| 190 | |
| 191 | Note that we use O_absent expressions to record additional information |
| 192 | about the previous non-O_absent expression, such as ":m" or ":s" |
| 193 | modifiers or register numbers enclosed in parens like "(r10)". |
| 194 | |
| 195 | Returns the number of expressions that were placed in EXP. */ |
| 196 | |
| 197 | static int |
| 198 | get_operands (exp) |
| 199 | expressionS exp[]; |
| 200 | { |
| 201 | char *p = input_line_pointer; |
| 202 | int numexp = 0; |
| 203 | int mflag = 0; |
| 204 | int sflag = 0; |
| 205 | int parens = 0; |
| 206 | |
| 207 | while (*p) |
| 208 | { |
| 209 | /* Skip leading whitespace. */ |
| 210 | while (*p == ' ' || *p == '\t' || *p == ',') |
| 211 | p++; |
| 212 | |
| 213 | /* Check to see if we have any operands left to parse. */ |
| 214 | if (*p == 0 || *p == '\n' || *p == '\r') |
| 215 | break; |
| 216 | |
| 217 | /* Notice scaling or direct memory operand modifiers and save them in |
| 218 | an O_absent expression after the expression that they modify. */ |
| 219 | |
| 220 | if (*p == ':') |
| 221 | { |
| 222 | p++; |
| 223 | exp[numexp].X_op = O_absent; |
| 224 | if (*p == 'm') |
| 225 | { |
| 226 | p++; |
| 227 | /* This is a ":m" modifier. */ |
| 228 | exp[numexp].X_add_number = TIC80_OPERAND_M_SI | TIC80_OPERAND_M_LI; |
| 229 | } |
| 230 | else if (*p == 's') |
| 231 | { |
| 232 | p++; |
| 233 | /* This is a ":s" modifier. */ |
| 234 | exp[numexp].X_add_number = TIC80_OPERAND_SCALED; |
| 235 | } |
| 236 | else |
| 237 | { |
| 238 | as_bad (_("':' not followed by 'm' or 's'")); |
| 239 | } |
| 240 | numexp++; |
| 241 | continue; |
| 242 | } |
| 243 | |
| 244 | /* Handle leading '(' on operands that use them, by recording that we |
| 245 | have entered a paren nesting level and then continuing. We complain |
| 246 | about multiple nesting. */ |
| 247 | |
| 248 | if (*p == '(') |
| 249 | { |
| 250 | if (++parens != 1) |
| 251 | as_bad (_("paren nesting")); |
| 252 | |
| 253 | p++; |
| 254 | continue; |
| 255 | } |
| 256 | |
| 257 | /* Handle trailing ')' on operands that use them, by reducing the |
| 258 | nesting level and then continuing. We complain if there were too |
| 259 | many closures. */ |
| 260 | |
| 261 | if (*p == ')') |
| 262 | { |
| 263 | /* Record that we have left a paren group and continue. */ |
| 264 | if (--parens < 0) |
| 265 | as_bad (_("mismatched parenthesis")); |
| 266 | |
| 267 | p++; |
| 268 | continue; |
| 269 | } |
| 270 | |
| 271 | /* Begin operand parsing at the current scan point. */ |
| 272 | |
| 273 | input_line_pointer = p; |
| 274 | expression (&exp[numexp]); |
| 275 | |
| 276 | if (exp[numexp].X_op == O_illegal) |
| 277 | { |
| 278 | as_bad (_("illegal operand")); |
| 279 | } |
| 280 | else if (exp[numexp].X_op == O_absent) |
| 281 | { |
| 282 | as_bad (_("missing operand")); |
| 283 | } |
| 284 | |
| 285 | numexp++; |
| 286 | p = input_line_pointer; |
| 287 | } |
| 288 | |
| 289 | if (parens) |
| 290 | { |
| 291 | exp[numexp].X_op = O_absent; |
| 292 | exp[numexp++].X_add_number = TIC80_OPERAND_PARENS; |
| 293 | } |
| 294 | |
| 295 | /* Mark the end of the valid operands with an illegal expression. */ |
| 296 | exp[numexp].X_op = O_illegal; |
| 297 | |
| 298 | return (numexp); |
| 299 | } |
| 300 | |
| 301 | /* find_opcode() gets a pointer to the entry in the opcode table that |
| 302 | matches the instruction being assembled, or returns NULL if no such match |
| 303 | is found. |
| 304 | |
| 305 | First it parses all the operands and save them as expressions. Note that |
| 306 | we use O_absent expressions to record additional information about the |
| 307 | previous non-O_absent expression, such as ":m" or ":s" modifiers or |
| 308 | register numbers enclosed in parens like "(r10)". |
| 309 | |
| 310 | It then looks at all opcodes with the same name and uses the operands to |
| 311 | choose the correct opcode. */ |
| 312 | |
| 313 | static struct tic80_opcode * |
| 314 | find_opcode (opcode, myops) |
| 315 | struct tic80_opcode *opcode; |
| 316 | expressionS myops[]; |
| 317 | { |
| 318 | int numexp; /* Number of expressions from parsing operands */ |
| 319 | int expi; /* Index of current expression to match */ |
| 320 | int opi; /* Index of current operand to match */ |
| 321 | int match = 0; /* Set to 1 when an operand match is found */ |
| 322 | struct tic80_opcode *opc = opcode; /* Pointer to current opcode table entry */ |
| 323 | const struct tic80_opcode *end; /* Pointer to end of opcode table */ |
| 324 | |
| 325 | /* First parse all the operands so we only have to do it once. There may |
| 326 | be more expressions generated than there are operands. */ |
| 327 | |
| 328 | numexp = get_operands (myops); |
| 329 | |
| 330 | /* For each opcode with the same name, try to match it against the parsed |
| 331 | operands. */ |
| 332 | |
| 333 | end = tic80_opcodes + tic80_num_opcodes; |
| 334 | while (!match && (opc < end) && (strcmp (opc->name, opcode->name) == 0)) |
| 335 | { |
| 336 | /* Start off assuming a match. If we find a mismatch, then this is |
| 337 | reset and the operand/expr matching loop terminates with match |
| 338 | equal to zero, which allows us to try the next opcode. */ |
| 339 | |
| 340 | match = 1; |
| 341 | |
| 342 | /* For each expression, try to match it against the current operand |
| 343 | for the current opcode. Upon any mismatch, we abandon further |
| 344 | matching for the current opcode table entry. */ |
| 345 | |
| 346 | for (expi = 0, opi = -1; (expi < numexp) && match; expi++) |
| 347 | { |
| 348 | int bits, flags, X_op, num; |
| 349 | |
| 350 | X_op = myops[expi].X_op; |
| 351 | num = myops[expi].X_add_number; |
| 352 | |
| 353 | /* The O_absent expressions apply to the same operand as the most |
| 354 | recent non O_absent expression. So only increment the operand |
| 355 | index when the current expression is not one of these special |
| 356 | expressions. */ |
| 357 | |
| 358 | if (X_op != O_absent) |
| 359 | { |
| 360 | opi++; |
| 361 | } |
| 362 | |
| 363 | flags = tic80_operands[opc->operands[opi]].flags; |
| 364 | bits = tic80_operands[opc->operands[opi]].bits; |
| 365 | |
| 366 | switch (X_op) |
| 367 | { |
| 368 | case O_register: |
| 369 | /* Also check that registers that are supposed to be |
| 370 | even actually are even. */ |
| 371 | if (((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) || |
| 372 | ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) || |
| 373 | ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR)) || |
| 374 | ((flags & TIC80_OPERAND_EVEN) && (num & 1)) || |
| 375 | const_overflow (num & ~TIC80_OPERAND_MASK, bits, flags)) |
| 376 | { |
| 377 | match = 0; |
| 378 | } |
| 379 | break; |
| 380 | case O_constant: |
| 381 | if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32)) |
| 382 | { |
| 383 | /* Endmask values of 0 and 32 give identical |
| 384 | results. */ |
| 385 | num = 0; |
| 386 | } |
| 387 | if ((flags & (TIC80_OPERAND_FPA | TIC80_OPERAND_GPR)) || |
| 388 | const_overflow (num, bits, flags)) |
| 389 | { |
| 390 | match = 0; |
| 391 | } |
| 392 | break; |
| 393 | case O_symbol: |
| 394 | if ((bits < 32) && (flags & TIC80_OPERAND_PCREL) |
| 395 | && !tic80_relax) |
| 396 | { |
| 397 | /* The default is to prefer the short form of PC |
| 398 | relative relocations. This is the only form that |
| 399 | the TI assembler supports. If the -relax option |
| 400 | is given, we never use the short forms. |
| 401 | FIXME: Should be able to choose "best-fit". */ |
| 402 | } |
| 403 | else if ((bits == 32) |
| 404 | #if 0 |
| 405 | && (flags & TIC80_OPERAND_BASEREL) |
| 406 | #endif |
| 407 | ) |
| 408 | { |
| 409 | /* The default is to prefer the long form of base |
| 410 | relative relocations. This is the only form that |
| 411 | the TI assembler supports. If the -no-relax |
| 412 | option is given, we always use the long form of |
| 413 | PC relative relocations. |
| 414 | FIXME: Should be able to choose "best-fit". */ |
| 415 | } |
| 416 | else |
| 417 | { |
| 418 | /* Symbols that don't match one of the above cases are |
| 419 | rejected as an operand. */ |
| 420 | match = 0; |
| 421 | } |
| 422 | break; |
| 423 | case O_absent: |
| 424 | /* If this is an O_absent expression, then it may be an |
| 425 | expression that supplies additional information about |
| 426 | the operand, such as ":m" or ":s" modifiers. Check to |
| 427 | see that the operand matches this requirement. */ |
| 428 | if (!((num & TIC80_OPERAND_M_SI) && (flags & TIC80_OPERAND_M_SI) |
| 429 | || (num & TIC80_OPERAND_M_LI) && (flags & TIC80_OPERAND_M_LI) |
| 430 | || (num & TIC80_OPERAND_SCALED) && (flags & TIC80_OPERAND_SCALED))) |
| 431 | { |
| 432 | match = 0; |
| 433 | } |
| 434 | break; |
| 435 | case O_big: |
| 436 | if ((num > 0) || !(flags & TIC80_OPERAND_FLOAT)) |
| 437 | { |
| 438 | match = 0; |
| 439 | } |
| 440 | break; |
| 441 | case O_illegal: |
| 442 | case O_symbol_rva: |
| 443 | case O_uminus: |
| 444 | case O_bit_not: |
| 445 | case O_logical_not: |
| 446 | case O_multiply: |
| 447 | case O_divide: |
| 448 | case O_modulus: |
| 449 | case O_left_shift: |
| 450 | case O_right_shift: |
| 451 | case O_bit_inclusive_or: |
| 452 | case O_bit_or_not: |
| 453 | case O_bit_exclusive_or: |
| 454 | case O_bit_and: |
| 455 | case O_add: |
| 456 | case O_subtract: |
| 457 | case O_eq: |
| 458 | case O_ne: |
| 459 | case O_lt: |
| 460 | case O_le: |
| 461 | case O_ge: |
| 462 | case O_gt: |
| 463 | case O_logical_and: |
| 464 | case O_logical_or: |
| 465 | case O_max: |
| 466 | default: |
| 467 | internal_error_a (_("unhandled expression type"), X_op); |
| 468 | } |
| 469 | } |
| 470 | if (!match) |
| 471 | opc++; |
| 472 | } |
| 473 | |
| 474 | return (match ? opc : NULL); |
| 475 | |
| 476 | #if 0 |
| 477 | /* Now search the opcode table table for one with operands that |
| 478 | matches what we've got. */ |
| 479 | |
| 480 | while (!match) |
| 481 | { |
| 482 | match = 1; |
| 483 | for (i = 0; opcode->operands[i]; i++) |
| 484 | { |
| 485 | int flags = tic80_operands[opcode->operands[i]].flags; |
| 486 | int X_op = myops[i].X_op; |
| 487 | int num = myops[i].X_add_number; |
| 488 | |
| 489 | if (X_op == 0) |
| 490 | { |
| 491 | match = 0; |
| 492 | break; |
| 493 | } |
| 494 | |
| 495 | if (flags |
| 496 | & (TIC80_OPERAND_GPR | TIC80_OPERAND_FPA | TIC80_OPERAND_CR)) |
| 497 | { |
| 498 | if ((X_op != O_register) || |
| 499 | ((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) || |
| 500 | ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) || |
| 501 | ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR))) |
| 502 | { |
| 503 | match = 0; |
| 504 | break; |
| 505 | } |
| 506 | } |
| 507 | |
| 508 | if (((flags & TIC80_OPERAND_MINUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_MINUS))) || |
| 509 | ((flags & TIC80_OPERAND_PLUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_PLUS))) || |
| 510 | ((flags & TIC80_OPERAND_ATMINUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATMINUS))) || |
| 511 | ((flags & TIC80_OPERAND_ATPAR) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATPAR))) || |
| 512 | ((flags & TIC80_OPERAND_ATSIGN) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATSIGN)))) |
| 513 | { |
| 514 | match = 0; |
| 515 | break; |
| 516 | } |
| 517 | } |
| 518 | /* We're only done if the operands matched so far AND there |
| 519 | are no more to check. */ |
| 520 | if (match && myops[i].X_op == 0) |
| 521 | break; |
| 522 | else |
| 523 | match = 0; |
| 524 | |
| 525 | next_opcode = opcode + 1; |
| 526 | if (next_opcode->opcode == 0) |
| 527 | break; |
| 528 | if (strcmp (next_opcode->name, opcode->name)) |
| 529 | break; |
| 530 | opcode = next_opcode; |
| 531 | } |
| 532 | |
| 533 | if (!match) |
| 534 | { |
| 535 | as_bad (_("bad opcode or operands")); |
| 536 | return (0); |
| 537 | } |
| 538 | |
| 539 | /* Check that all registers that are required to be even are. |
| 540 | Also, if any operands were marked as registers, but were really |
| 541 | symbols, fix that here. */ |
| 542 | for (i = 0; opcode->operands[i]; i++) |
| 543 | { |
| 544 | if ((tic80_operands[opcode->operands[i]].flags & TIC80_OPERAND_EVEN) |
| 545 | && (myops[i].X_add_number & 1)) |
| 546 | as_fatal (_("Register number must be EVEN")); |
| 547 | if (myops[i].X_op == O_register) |
| 548 | { |
| 549 | if (!(tic80_operands[opcode->operands[i]].flags & TIC80_OPERAND_REG)) |
| 550 | { |
| 551 | myops[i].X_op = O_symbol; |
| 552 | myops[i].X_add_symbol = |
| 553 | symbol_find_or_make ((char *) myops[i].X_op_symbol); |
| 554 | myops[i].X_add_number = 0; |
| 555 | myops[i].X_op_symbol = NULL; |
| 556 | } |
| 557 | } |
| 558 | } |
| 559 | #endif |
| 560 | } |
| 561 | |
| 562 | /* build_insn takes a pointer to the opcode entry in the opcode table |
| 563 | and the array of operand expressions and writes out the instruction. |
| 564 | |
| 565 | Note that the opcode word and extended word may be written to different |
| 566 | frags, with the opcode at the end of one frag and the extension at the |
| 567 | beginning of the next. */ |
| 568 | |
| 569 | static void |
| 570 | build_insn (opcode, opers) |
| 571 | struct tic80_opcode *opcode; |
| 572 | expressionS *opers; |
| 573 | { |
| 574 | int expi; /* Index of current expression to match */ |
| 575 | int opi; /* Index of current operand to match */ |
| 576 | unsigned long insn[2]; /* Instruction and long immediate (if any) */ |
| 577 | char *f; /* Pointer to frag location for insn[0] */ |
| 578 | fragS *ffrag; /* Frag containing location f */ |
| 579 | char *fx = NULL; /* Pointer to frag location for insn[1] */ |
| 580 | fragS *fxfrag; /* Frag containing location fx */ |
| 581 | |
| 582 | /* Start with the raw opcode bits from the opcode table. */ |
| 583 | insn[0] = opcode->opcode; |
| 584 | |
| 585 | /* We are going to insert at least one 32 bit opcode so get the |
| 586 | frag now. */ |
| 587 | |
| 588 | f = frag_more (4); |
| 589 | ffrag = frag_now; |
| 590 | |
| 591 | /* For each operand expression, insert the appropriate bits into the |
| 592 | instruction. */ |
| 593 | for (expi = 0, opi = -1; opers[expi].X_op != O_illegal; expi++) |
| 594 | { |
| 595 | int bits, shift, flags, X_op, num; |
| 596 | |
| 597 | X_op = opers[expi].X_op; |
| 598 | num = opers[expi].X_add_number; |
| 599 | |
| 600 | /* The O_absent expressions apply to the same operand as the most |
| 601 | recent non O_absent expression. So only increment the operand |
| 602 | index when the current expression is not one of these special |
| 603 | expressions. */ |
| 604 | |
| 605 | if (X_op != O_absent) |
| 606 | { |
| 607 | opi++; |
| 608 | } |
| 609 | |
| 610 | flags = tic80_operands[opcode->operands[opi]].flags; |
| 611 | bits = tic80_operands[opcode->operands[opi]].bits; |
| 612 | shift = tic80_operands[opcode->operands[opi]].shift; |
| 613 | |
| 614 | switch (X_op) |
| 615 | { |
| 616 | case O_register: |
| 617 | num &= ~TIC80_OPERAND_MASK; |
| 618 | insn[0] = insn[0] | (num << shift); |
| 619 | break; |
| 620 | case O_constant: |
| 621 | if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32)) |
| 622 | { |
| 623 | /* Endmask values of 0 and 32 give identical results. */ |
| 624 | num = 0; |
| 625 | } |
| 626 | else if ((flags & TIC80_OPERAND_BITNUM)) |
| 627 | { |
| 628 | /* BITNUM values are stored in one's complement form. */ |
| 629 | num = (~num & 0x1F); |
| 630 | } |
| 631 | /* Mask off upper bits, just it case it is signed and is |
| 632 | negative. */ |
| 633 | if (bits < 32) |
| 634 | { |
| 635 | num &= (1 << bits) - 1; |
| 636 | insn[0] = insn[0] | (num << shift); |
| 637 | } |
| 638 | else |
| 639 | { |
| 640 | fx = frag_more (4); |
| 641 | fxfrag = frag_now; |
| 642 | insn[1] = num; |
| 643 | } |
| 644 | break; |
| 645 | case O_symbol: |
| 646 | if (bits == 32) |
| 647 | { |
| 648 | fx = frag_more (4); |
| 649 | fxfrag = frag_now; |
| 650 | insn[1] = 0; |
| 651 | if (flags & TIC80_OPERAND_PCREL) |
| 652 | { |
| 653 | fix_new_exp (fxfrag, |
| 654 | fx - (fxfrag->fr_literal), |
| 655 | 4, |
| 656 | &opers[expi], |
| 657 | 1, |
| 658 | R_MPPCR); |
| 659 | } |
| 660 | else |
| 661 | { |
| 662 | fix_new_exp (fxfrag, |
| 663 | fx - (fxfrag->fr_literal), |
| 664 | 4, |
| 665 | &opers[expi], |
| 666 | 0, |
| 667 | R_RELLONGX); |
| 668 | } |
| 669 | } |
| 670 | else if (flags & TIC80_OPERAND_PCREL) |
| 671 | { |
| 672 | fix_new_exp (ffrag, |
| 673 | f - (ffrag->fr_literal), |
| 674 | 4, /* FIXME! how is this used? */ |
| 675 | &opers[expi], |
| 676 | 1, |
| 677 | R_MPPCR15W); |
| 678 | } |
| 679 | else |
| 680 | { |
| 681 | internal_error (_("symbol reloc that is not PC relative or 32 bits")); |
| 682 | } |
| 683 | break; |
| 684 | case O_absent: |
| 685 | /* Each O_absent expression can indicate exactly one |
| 686 | possible modifier. */ |
| 687 | if ((num & TIC80_OPERAND_M_SI) |
| 688 | && (flags & TIC80_OPERAND_M_SI)) |
| 689 | { |
| 690 | insn[0] = insn[0] | (1 << 17); |
| 691 | } |
| 692 | else if ((num & TIC80_OPERAND_M_LI) |
| 693 | && (flags & TIC80_OPERAND_M_LI)) |
| 694 | { |
| 695 | insn[0] = insn[0] | (1 << 15); |
| 696 | } |
| 697 | else if ((num & TIC80_OPERAND_SCALED) |
| 698 | && (flags & TIC80_OPERAND_SCALED)) |
| 699 | { |
| 700 | insn[0] = insn[0] | (1 << 11); |
| 701 | } |
| 702 | else if ((num & TIC80_OPERAND_PARENS) |
| 703 | && (flags & TIC80_OPERAND_PARENS)) |
| 704 | { |
| 705 | /* No code to generate, just accept and discard this |
| 706 | expression. */ |
| 707 | } |
| 708 | else |
| 709 | { |
| 710 | internal_error_a (_("unhandled operand modifier"), |
| 711 | opers[expi].X_add_number); |
| 712 | } |
| 713 | break; |
| 714 | case O_big: |
| 715 | fx = frag_more (4); |
| 716 | fxfrag = frag_now; |
| 717 | { |
| 718 | int precision = 2; |
| 719 | long exponent_bits = 8L; |
| 720 | LITTLENUM_TYPE words[2]; |
| 721 | /* Value is still in generic_floating_point_number. */ |
| 722 | gen_to_words (words, precision, exponent_bits); |
| 723 | insn[1] = (words[0] << 16) | words[1]; |
| 724 | } |
| 725 | break; |
| 726 | case O_illegal: |
| 727 | case O_symbol_rva: |
| 728 | case O_uminus: |
| 729 | case O_bit_not: |
| 730 | case O_logical_not: |
| 731 | case O_multiply: |
| 732 | case O_divide: |
| 733 | case O_modulus: |
| 734 | case O_left_shift: |
| 735 | case O_right_shift: |
| 736 | case O_bit_inclusive_or: |
| 737 | case O_bit_or_not: |
| 738 | case O_bit_exclusive_or: |
| 739 | case O_bit_and: |
| 740 | case O_add: |
| 741 | case O_subtract: |
| 742 | case O_eq: |
| 743 | case O_ne: |
| 744 | case O_lt: |
| 745 | case O_le: |
| 746 | case O_ge: |
| 747 | case O_gt: |
| 748 | case O_logical_and: |
| 749 | case O_logical_or: |
| 750 | case O_max: |
| 751 | default: |
| 752 | internal_error_a (_("unhandled expression"), X_op); |
| 753 | break; |
| 754 | } |
| 755 | } |
| 756 | |
| 757 | /* Write out the instruction, either 4 or 8 bytes. */ |
| 758 | |
| 759 | md_number_to_chars (f, insn[0], 4); |
| 760 | if (fx != NULL) |
| 761 | { |
| 762 | md_number_to_chars (fx, insn[1], 4); |
| 763 | } |
| 764 | } |
| 765 | |
| 766 | /* This is the main entry point for the machine-dependent assembler. Gas |
| 767 | calls this function for each input line which does not contain a |
| 768 | pseudoop. |
| 769 | |
| 770 | STR points to a NULL terminated machine dependent instruction. This |
| 771 | function is supposed to emit the frags/bytes it assembles to. */ |
| 772 | |
| 773 | void |
| 774 | md_assemble (str) |
| 775 | char *str; |
| 776 | { |
| 777 | char *scan; |
| 778 | unsigned char *input_line_save; |
| 779 | struct tic80_opcode *opcode; |
| 780 | expressionS myops[16]; |
| 781 | unsigned long insn; |
| 782 | |
| 783 | /* Ensure there is something there to assemble. */ |
| 784 | assert (str); |
| 785 | |
| 786 | /* Drop any leading whitespace. */ |
| 787 | while (isspace (*str)) |
| 788 | str++; |
| 789 | |
| 790 | /* Isolate the mnemonic from the rest of the string by finding the first |
| 791 | whitespace character and zapping it to a null byte. */ |
| 792 | for (scan = str; *scan != '\000' && !isspace (*scan); scan++) |
| 793 | ; |
| 794 | |
| 795 | if (*scan != '\000') |
| 796 | *scan++ = '\000'; |
| 797 | |
| 798 | /* Try to find this mnemonic in the hash table. */ |
| 799 | if ((opcode = (struct tic80_opcode *) hash_find (tic80_hash, str)) == NULL) |
| 800 | { |
| 801 | as_bad (_("Invalid mnemonic: '%s'"), str); |
| 802 | return; |
| 803 | } |
| 804 | |
| 805 | str = scan; |
| 806 | while (isspace (*scan)) |
| 807 | scan++; |
| 808 | |
| 809 | input_line_save = input_line_pointer; |
| 810 | input_line_pointer = str; |
| 811 | |
| 812 | opcode = find_opcode (opcode, myops); |
| 813 | if (opcode == NULL) |
| 814 | as_bad (_("Invalid operands: '%s'"), input_line_save); |
| 815 | |
| 816 | input_line_pointer = input_line_save; |
| 817 | build_insn (opcode, myops); |
| 818 | } |
| 819 | |
| 820 | /* This function is called once at the start of assembly, after the command |
| 821 | line arguments have been parsed and all the machine independent |
| 822 | initializations have been completed. |
| 823 | |
| 824 | It should set up all the tables, etc., that the machine dependent part of |
| 825 | the assembler will need. */ |
| 826 | |
| 827 | void |
| 828 | md_begin () |
| 829 | { |
| 830 | char *prev_name = ""; |
| 831 | register const struct tic80_opcode *op; |
| 832 | register const struct tic80_opcode *op_end; |
| 833 | const struct predefined_symbol *pdsp; |
| 834 | extern int coff_flags; /* Defined in obj-coff.c */ |
| 835 | |
| 836 | /* Set F_AR32WR in coff_flags, which will end up in the file header |
| 837 | f_flags field. */ |
| 838 | |
| 839 | coff_flags |= F_AR32WR; /* TIc80 is 32 bit little endian. */ |
| 840 | |
| 841 | /* Insert unique names into hash table. The TIc80 instruction set |
| 842 | has many identical opcode names that have different opcodes based |
| 843 | on the operands. This hash table then provides a quick index to |
| 844 | the first opcode with a particular name in the opcode table. */ |
| 845 | |
| 846 | tic80_hash = hash_new (); |
| 847 | op_end = tic80_opcodes + tic80_num_opcodes; |
| 848 | for (op = tic80_opcodes; op < op_end; op++) |
| 849 | { |
| 850 | if (strcmp (prev_name, op->name) != 0) |
| 851 | { |
| 852 | prev_name = (char *) op->name; |
| 853 | hash_insert (tic80_hash, op->name, (char *) op); |
| 854 | } |
| 855 | } |
| 856 | |
| 857 | /* Insert the predefined symbols into the symbol table. We use |
| 858 | symbol_create rather than symbol_new so that these symbols don't |
| 859 | end up in the object files' symbol table. Note that the values |
| 860 | of the predefined symbols include some upper bits that |
| 861 | distinguish the type of the symbol (register, bitnum, condition |
| 862 | code, etc) and these bits must be masked away before actually |
| 863 | inserting the values into the instruction stream. For registers |
| 864 | we put these bits in the symbol table since we use them later and |
| 865 | there is no question that they aren't part of the register |
| 866 | number. For constants we can't do that since the constant can be |
| 867 | any value, so they are masked off before putting them into the |
| 868 | symbol table. */ |
| 869 | |
| 870 | pdsp = NULL; |
| 871 | while ((pdsp = tic80_next_predefined_symbol (pdsp)) != NULL) |
| 872 | { |
| 873 | segT segment; |
| 874 | valueT valu; |
| 875 | int symtype; |
| 876 | |
| 877 | symtype = PDS_VALUE (pdsp) & TIC80_OPERAND_MASK; |
| 878 | switch (symtype) |
| 879 | { |
| 880 | case TIC80_OPERAND_GPR: |
| 881 | case TIC80_OPERAND_FPA: |
| 882 | case TIC80_OPERAND_CR: |
| 883 | segment = reg_section; |
| 884 | valu = PDS_VALUE (pdsp); |
| 885 | break; |
| 886 | case TIC80_OPERAND_CC: |
| 887 | case TIC80_OPERAND_BITNUM: |
| 888 | segment = absolute_section; |
| 889 | valu = PDS_VALUE (pdsp) & ~TIC80_OPERAND_MASK; |
| 890 | break; |
| 891 | default: |
| 892 | internal_error_a (_("unhandled predefined symbol bits"), symtype); |
| 893 | break; |
| 894 | } |
| 895 | symbol_table_insert (symbol_create (PDS_NAME (pdsp), segment, valu, |
| 896 | &zero_address_frag)); |
| 897 | } |
| 898 | } |
| 899 | \f |
| 900 | /* The assembler adds md_shortopts to the string passed to getopt. */ |
| 901 | |
| 902 | CONST char *md_shortopts = ""; |
| 903 | |
| 904 | /* The assembler adds md_longopts to the machine independent long options |
| 905 | that are passed to getopt. */ |
| 906 | |
| 907 | struct option md_longopts[] = { |
| 908 | |
| 909 | #define OPTION_RELAX (OPTION_MD_BASE) |
| 910 | {"relax", no_argument, NULL, OPTION_RELAX}, |
| 911 | |
| 912 | #define OPTION_NO_RELAX (OPTION_RELAX + 1) |
| 913 | {"no-relax", no_argument, NULL, OPTION_NO_RELAX}, |
| 914 | |
| 915 | {NULL, no_argument, NULL, 0} |
| 916 | }; |
| 917 | |
| 918 | size_t md_longopts_size = sizeof (md_longopts); |
| 919 | |
| 920 | /* The md_parse_option function will be called whenever getopt returns an |
| 921 | unrecognized code, presumably indicating a special code value which |
| 922 | appears in md_longopts for machine specific command line options. */ |
| 923 | |
| 924 | int |
| 925 | md_parse_option (c, arg) |
| 926 | int c; |
| 927 | char *arg; |
| 928 | { |
| 929 | switch (c) |
| 930 | { |
| 931 | case OPTION_RELAX: |
| 932 | tic80_relax = 1; |
| 933 | break; |
| 934 | case OPTION_NO_RELAX: |
| 935 | tic80_relax = 0; |
| 936 | break; |
| 937 | default: |
| 938 | return (0); |
| 939 | } |
| 940 | return (1); |
| 941 | } |
| 942 | |
| 943 | /* The md_show_usage function will be called whenever a usage message is |
| 944 | printed. It should print a description of the machine specific options |
| 945 | found in md_longopts. */ |
| 946 | |
| 947 | void |
| 948 | md_show_usage (stream) |
| 949 | FILE *stream; |
| 950 | { |
| 951 | fprintf (stream, "\ |
| 952 | TIc80 options:\n\ |
| 953 | -relax alter PC relative branch instructions to use long form when needed\n\ |
| 954 | -no-relax always use short PC relative branch instructions, error on overflow\n"); |
| 955 | } |
| 956 | \f |
| 957 | /* Attempt to simplify or even eliminate a fixup. The return value is |
| 958 | ignored; perhaps it was once meaningful, but now it is historical. |
| 959 | To indicate that a fixup has been eliminated, set fixP->fx_done. */ |
| 960 | |
| 961 | void |
| 962 | md_apply_fix (fixP, val) |
| 963 | fixS *fixP; |
| 964 | long val; |
| 965 | { |
| 966 | char *dest = fixP->fx_frag->fr_literal + fixP->fx_where; |
| 967 | int overflow; |
| 968 | |
| 969 | switch (fixP->fx_r_type) |
| 970 | { |
| 971 | case R_RELLONGX: |
| 972 | md_number_to_chars (dest, (valueT) val, 4); |
| 973 | break; |
| 974 | case R_MPPCR: |
| 975 | val >>= 2; |
| 976 | val += 1; /* Target address computed from inst start */ |
| 977 | md_number_to_chars (dest, (valueT) val, 4); |
| 978 | break; |
| 979 | case R_MPPCR15W: |
| 980 | overflow = (val < -65536L) || (val > 65532L); |
| 981 | if (overflow) |
| 982 | { |
| 983 | as_bad_where (fixP->fx_file, fixP->fx_line, |
| 984 | _("PC offset 0x%lx outside range 0x%lx-0x%lx"), |
| 985 | val, -65536L, 65532L); |
| 986 | } |
| 987 | else |
| 988 | { |
| 989 | val >>= 2; |
| 990 | *dest++ = val & 0xFF; |
| 991 | val >>= 8; |
| 992 | *dest = (*dest & 0x80) | (val & 0x7F); |
| 993 | } |
| 994 | break; |
| 995 | case R_ABS: |
| 996 | md_number_to_chars (dest, (valueT) val, fixP->fx_size); |
| 997 | break; |
| 998 | default: |
| 999 | internal_error_a (_("unhandled relocation type in fixup"), |
| 1000 | fixP->fx_r_type); |
| 1001 | break; |
| 1002 | } |
| 1003 | } |
| 1004 | \f |
| 1005 | /* Functions concerning relocs. */ |
| 1006 | |
| 1007 | /* The location from which a PC relative jump should be calculated, |
| 1008 | given a PC relative reloc. |
| 1009 | |
| 1010 | For the TIc80, this is the address of the 32 bit opcode containing |
| 1011 | the PC relative field. */ |
| 1012 | |
| 1013 | long |
| 1014 | md_pcrel_from (fixP) |
| 1015 | fixS *fixP; |
| 1016 | { |
| 1017 | return (fixP->fx_frag->fr_address + fixP->fx_where); |
| 1018 | } |
| 1019 | |
| 1020 | /* Called after relax() is finished. |
| 1021 | * In: Address of frag. |
| 1022 | * fr_type == rs_machine_dependent. |
| 1023 | * fr_subtype is what the address relaxed to. |
| 1024 | * |
| 1025 | * Out: Any fixSs and constants are set up. |
| 1026 | * Caller will turn frag into a ".space 0". |
| 1027 | */ |
| 1028 | |
| 1029 | void |
| 1030 | md_convert_frag (headers, seg, fragP) |
| 1031 | object_headers *headers; |
| 1032 | segT seg; |
| 1033 | fragS *fragP; |
| 1034 | { |
| 1035 | internal_error (_("md_convert_frag() not implemented yet")); |
| 1036 | abort (); |
| 1037 | } |
| 1038 | \f |
| 1039 | void |
| 1040 | tc_coff_symbol_emit_hook (ignore) |
| 1041 | symbolS *ignore; |
| 1042 | { |
| 1043 | } |
| 1044 | |
| 1045 | #if defined OBJ_COFF |
| 1046 | |
| 1047 | short |
| 1048 | tc_coff_fix2rtype (fixP) |
| 1049 | fixS *fixP; |
| 1050 | { |
| 1051 | return (fixP->fx_r_type); |
| 1052 | } |
| 1053 | |
| 1054 | #endif /* OBJ_COFF */ |