| 1 | /* tc-xtensa.c -- Assemble Xtensa instructions. |
| 2 | Copyright 2003 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GAS, the GNU Assembler. |
| 5 | |
| 6 | GAS is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2, or (at your option) |
| 9 | any later version. |
| 10 | |
| 11 | GAS is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with GAS; see the file COPYING. If not, write to |
| 18 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, |
| 19 | MA 02111-1307, USA. */ |
| 20 | |
| 21 | #include <string.h> |
| 22 | #include "as.h" |
| 23 | #include "sb.h" |
| 24 | #include "safe-ctype.h" |
| 25 | #include "tc-xtensa.h" |
| 26 | #include "frags.h" |
| 27 | #include "subsegs.h" |
| 28 | #include "xtensa-relax.h" |
| 29 | #include "xtensa-istack.h" |
| 30 | #include "struc-symbol.h" |
| 31 | #include "xtensa-config.h" |
| 32 | |
| 33 | #ifndef uint32 |
| 34 | #define uint32 unsigned int |
| 35 | #endif |
| 36 | #ifndef int32 |
| 37 | #define int32 signed int |
| 38 | #endif |
| 39 | |
| 40 | /* Notes: |
| 41 | |
| 42 | There are 3 forms for instructions, |
| 43 | 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction |
| 44 | 2) the TInsn -- handles instructions/labels and literals; |
| 45 | all operands are assumed to be expressions |
| 46 | 3) the IStack -- a stack of TInsn. this allows us to |
| 47 | reason about the generated expansion instructions |
| 48 | |
| 49 | Naming conventions (used somewhat inconsistently): |
| 50 | The xtensa_ functions are exported |
| 51 | The xg_ functions are internal |
| 52 | |
| 53 | We also have a couple of different extensibility mechanisms. |
| 54 | 1) The idiom replacement: |
| 55 | This is used when a line is first parsed to |
| 56 | replace an instruction pattern with another instruction |
| 57 | It is currently limited to replacements of instructions |
| 58 | with constant operands. |
| 59 | 2) The xtensa-relax.c mechanism that has stronger instruction |
| 60 | replacement patterns. When an instruction's immediate field |
| 61 | does not fit the next instruction sequence is attempted. |
| 62 | In addition, "narrow" opcodes are supported this way. */ |
| 63 | |
| 64 | |
| 65 | /* Define characters with special meanings to GAS. */ |
| 66 | const char comment_chars[] = "#"; |
| 67 | const char line_comment_chars[] = "#"; |
| 68 | const char line_separator_chars[] = ";"; |
| 69 | const char EXP_CHARS[] = "eE"; |
| 70 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
| 71 | |
| 72 | |
| 73 | /* Flag to indicate whether the hardware supports the density option. |
| 74 | If not, enabling density instructions (via directives or --density flag) |
| 75 | is illegal. */ |
| 76 | |
| 77 | #if STATIC_LIBISA |
| 78 | bfd_boolean density_supported = XCHAL_HAVE_DENSITY; |
| 79 | #else |
| 80 | bfd_boolean density_supported = TRUE; |
| 81 | #endif |
| 82 | |
| 83 | #define XTENSA_FETCH_WIDTH 4 |
| 84 | |
| 85 | /* Flags for properties of the last instruction in a segment. */ |
| 86 | #define FLAG_IS_A0_WRITER 0x1 |
| 87 | #define FLAG_IS_BAD_LOOPEND 0x2 |
| 88 | |
| 89 | |
| 90 | /* We define a special segment names ".literal" to place literals |
| 91 | into. The .fini and .init sections are special because they |
| 92 | contain code that is moved together by the linker. We give them |
| 93 | their own special .fini.literal and .init.literal sections. */ |
| 94 | |
| 95 | #define LITERAL_SECTION_NAME xtensa_section_rename (".literal") |
| 96 | #define FINI_SECTION_NAME xtensa_section_rename (".fini") |
| 97 | #define INIT_SECTION_NAME xtensa_section_rename (".init") |
| 98 | #define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal") |
| 99 | #define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal") |
| 100 | |
| 101 | |
| 102 | /* This type is used for the directive_stack to keep track of the |
| 103 | state of the literal collection pools. */ |
| 104 | |
| 105 | typedef struct lit_state_struct |
| 106 | { |
| 107 | const char *lit_seg_name; |
| 108 | const char *init_lit_seg_name; |
| 109 | const char *fini_lit_seg_name; |
| 110 | segT lit_seg; |
| 111 | segT init_lit_seg; |
| 112 | segT fini_lit_seg; |
| 113 | } lit_state; |
| 114 | |
| 115 | static lit_state default_lit_sections; |
| 116 | |
| 117 | |
| 118 | /* We keep lists of literal segments. The seg_list type is the node |
| 119 | for such a list. The *_literal_head locals are the heads of the |
| 120 | various lists. All of these lists have a dummy node at the start. */ |
| 121 | |
| 122 | typedef struct seg_list_struct |
| 123 | { |
| 124 | struct seg_list_struct *next; |
| 125 | segT seg; |
| 126 | } seg_list; |
| 127 | |
| 128 | static seg_list literal_head_h; |
| 129 | static seg_list *literal_head = &literal_head_h; |
| 130 | static seg_list init_literal_head_h; |
| 131 | static seg_list *init_literal_head = &init_literal_head_h; |
| 132 | static seg_list fini_literal_head_h; |
| 133 | static seg_list *fini_literal_head = &fini_literal_head_h; |
| 134 | |
| 135 | |
| 136 | /* Lists of symbols. We keep a list of symbols that label the current |
| 137 | instruction, so that we can adjust the symbols when inserting alignment |
| 138 | for various instructions. We also keep a list of all the symbols on |
| 139 | literals, so that we can fix up those symbols when the literals are |
| 140 | later moved into the text sections. */ |
| 141 | |
| 142 | typedef struct sym_list_struct |
| 143 | { |
| 144 | struct sym_list_struct *next; |
| 145 | symbolS *sym; |
| 146 | } sym_list; |
| 147 | |
| 148 | static sym_list *insn_labels = NULL; |
| 149 | static sym_list *free_insn_labels = NULL; |
| 150 | static sym_list *saved_insn_labels = NULL; |
| 151 | |
| 152 | static sym_list *literal_syms; |
| 153 | |
| 154 | |
| 155 | /* Global flag to indicate when we are emitting literals. */ |
| 156 | int generating_literals = 0; |
| 157 | |
| 158 | |
| 159 | /* Structure for saving the current state before emitting literals. */ |
| 160 | typedef struct emit_state_struct |
| 161 | { |
| 162 | const char *name; |
| 163 | segT now_seg; |
| 164 | subsegT now_subseg; |
| 165 | int generating_literals; |
| 166 | } emit_state; |
| 167 | |
| 168 | |
| 169 | /* Directives. */ |
| 170 | |
| 171 | typedef enum |
| 172 | { |
| 173 | directive_none = 0, |
| 174 | directive_literal, |
| 175 | directive_density, |
| 176 | directive_generics, |
| 177 | directive_relax, |
| 178 | directive_freeregs, |
| 179 | directive_longcalls, |
| 180 | directive_literal_prefix |
| 181 | } directiveE; |
| 182 | |
| 183 | typedef struct |
| 184 | { |
| 185 | const char *name; |
| 186 | bfd_boolean can_be_negated; |
| 187 | } directive_infoS; |
| 188 | |
| 189 | const directive_infoS directive_info[] = |
| 190 | { |
| 191 | {"none", FALSE}, |
| 192 | {"literal", FALSE}, |
| 193 | {"density", TRUE}, |
| 194 | {"generics", TRUE}, |
| 195 | {"relax", TRUE}, |
| 196 | {"freeregs", FALSE}, |
| 197 | {"longcalls", TRUE}, |
| 198 | {"literal_prefix", FALSE} |
| 199 | }; |
| 200 | |
| 201 | bfd_boolean directive_state[] = |
| 202 | { |
| 203 | FALSE, /* none */ |
| 204 | FALSE, /* literal */ |
| 205 | #if STATIC_LIBISA && !XCHAL_HAVE_DENSITY |
| 206 | FALSE, /* density */ |
| 207 | #else |
| 208 | TRUE, /* density */ |
| 209 | #endif |
| 210 | TRUE, /* generics */ |
| 211 | TRUE, /* relax */ |
| 212 | FALSE, /* freeregs */ |
| 213 | FALSE, /* longcalls */ |
| 214 | FALSE /* literal_prefix */ |
| 215 | }; |
| 216 | |
| 217 | |
| 218 | enum xtensa_relax_statesE |
| 219 | { |
| 220 | RELAX_ALIGN_NEXT_OPCODE, |
| 221 | /* Use the first opcode of the next fragment to determine the |
| 222 | alignment requirements. This is ONLY used for LOOPS |
| 223 | currently. */ |
| 224 | |
| 225 | RELAX_DESIRE_ALIGN_IF_TARGET, |
| 226 | /* These are placed in front of labels. They will all be converted |
| 227 | to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before |
| 228 | relaxation begins. */ |
| 229 | |
| 230 | RELAX_ADD_NOP_IF_A0_B_RETW, |
| 231 | /* These are placed in front of conditional branches. It will be |
| 232 | turned into a NOP (using a1) if the branch is immediately |
| 233 | followed by a RETW or RETW.N. Otherwise it will be turned into |
| 234 | an rs_fill of 0 before relaxation begins. */ |
| 235 | |
| 236 | RELAX_ADD_NOP_IF_PRE_LOOP_END, |
| 237 | /* These are placed after JX instructions. It will be turned into a |
| 238 | NOP if there is one instruction before a loop end label. |
| 239 | Otherwise it will be turned into an rs_fill of 0 before |
| 240 | relaxation begins. This is used to avoid a hardware TIE |
| 241 | interlock issue prior to T1040. */ |
| 242 | |
| 243 | RELAX_ADD_NOP_IF_SHORT_LOOP, |
| 244 | /* These are placed after LOOP instructions. It will be turned into |
| 245 | a NOP when: (1) there are less than 3 instructions in the loop; |
| 246 | we place 2 of these in a row to add up to 2 NOPS in short loops; |
| 247 | or (2) The instructions in the loop do not include a branch or |
| 248 | jump. Otherwise it will be turned into an rs_fill of 0 before |
| 249 | relaxation begins. This is used to avoid hardware bug |
| 250 | PR3830. */ |
| 251 | |
| 252 | RELAX_ADD_NOP_IF_CLOSE_LOOP_END, |
| 253 | /* These are placed after LOOP instructions. It will be turned into |
| 254 | a NOP if there are less than 12 bytes to the end of some other |
| 255 | loop's end. Otherwise it will be turned into an rs_fill of 0 |
| 256 | before relaxation begins. This is used to avoid hardware bug |
| 257 | PR3830. */ |
| 258 | |
| 259 | RELAX_DESIRE_ALIGN, |
| 260 | /* The next fragment like its first instruction to NOT cross a |
| 261 | 4-byte boundary. */ |
| 262 | |
| 263 | RELAX_LOOP_END, |
| 264 | /* This will be turned into a NOP or NOP.N if the previous |
| 265 | instruction is expanded to negate a loop. */ |
| 266 | |
| 267 | RELAX_LOOP_END_ADD_NOP, |
| 268 | /* When the code density option is available, this will generate a |
| 269 | NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill |
| 270 | fragment with a NOP in it. */ |
| 271 | |
| 272 | RELAX_LITERAL, |
| 273 | /* Another fragment could generate an expansion here but has not yet. */ |
| 274 | |
| 275 | RELAX_LITERAL_NR, |
| 276 | /* Expansion has been generated by an instruction that generates a |
| 277 | literal. However, the stretch has NOT been reported yet in this |
| 278 | fragment. */ |
| 279 | |
| 280 | RELAX_LITERAL_FINAL, |
| 281 | /* Expansion has been generated by an instruction that generates a |
| 282 | literal. */ |
| 283 | |
| 284 | RELAX_LITERAL_POOL_BEGIN, |
| 285 | RELAX_LITERAL_POOL_END, |
| 286 | /* Technically these are not relaxations at all, but mark a location |
| 287 | to store literals later. Note that fr_var stores the frchain for |
| 288 | BEGIN frags and fr_var stores now_seg for END frags. */ |
| 289 | |
| 290 | RELAX_NARROW, |
| 291 | /* The last instruction in this fragment (at->fr_opcode) can be |
| 292 | freely replaced with a single wider instruction if a future |
| 293 | alignment desires or needs it. */ |
| 294 | |
| 295 | RELAX_IMMED, |
| 296 | /* The last instruction in this fragment (at->fr_opcode) contains |
| 297 | the value defined by fr_symbol (fr_offset = 0). If the value |
| 298 | does not fit, use the specified expansion. This is similar to |
| 299 | "NARROW", except that these may not be expanded in order to align |
| 300 | code. */ |
| 301 | |
| 302 | RELAX_IMMED_STEP1, |
| 303 | /* The last instruction in this fragment (at->fr_opcode) contains a |
| 304 | literal. It has already been expanded at least 1 step. */ |
| 305 | |
| 306 | RELAX_IMMED_STEP2 |
| 307 | /* The last instruction in this fragment (at->fr_opcode) contains a |
| 308 | literal. It has already been expanded at least 2 steps. */ |
| 309 | }; |
| 310 | |
| 311 | /* This is used as a stopper to bound the number of steps that |
| 312 | can be taken. */ |
| 313 | #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED) |
| 314 | |
| 315 | |
| 316 | typedef bfd_boolean (*frag_predicate) (const fragS *); |
| 317 | |
| 318 | |
| 319 | /* Directive functions. */ |
| 320 | |
| 321 | static bfd_boolean use_generics |
| 322 | PARAMS ((void)); |
| 323 | static bfd_boolean use_longcalls |
| 324 | PARAMS ((void)); |
| 325 | static bfd_boolean code_density_available |
| 326 | PARAMS ((void)); |
| 327 | static bfd_boolean can_relax |
| 328 | PARAMS ((void)); |
| 329 | static void directive_push |
| 330 | PARAMS ((directiveE, bfd_boolean, const void *)); |
| 331 | static void directive_pop |
| 332 | PARAMS ((directiveE *, bfd_boolean *, const char **, |
| 333 | unsigned int *, const void **)); |
| 334 | static void directive_balance |
| 335 | PARAMS ((void)); |
| 336 | static bfd_boolean inside_directive |
| 337 | PARAMS ((directiveE)); |
| 338 | static void get_directive |
| 339 | PARAMS ((directiveE *, bfd_boolean *)); |
| 340 | static void xtensa_begin_directive |
| 341 | PARAMS ((int)); |
| 342 | static void xtensa_end_directive |
| 343 | PARAMS ((int)); |
| 344 | static void xtensa_literal_prefix |
| 345 | PARAMS ((char const *, int)); |
| 346 | static void xtensa_literal_position |
| 347 | PARAMS ((int)); |
| 348 | static void xtensa_literal_pseudo |
| 349 | PARAMS ((int)); |
| 350 | |
| 351 | /* Parsing and Idiom Translation Functions. */ |
| 352 | |
| 353 | static const char *expression_end |
| 354 | PARAMS ((const char *)); |
| 355 | static unsigned tc_get_register |
| 356 | PARAMS ((const char *)); |
| 357 | static void expression_maybe_register |
| 358 | PARAMS ((xtensa_operand, expressionS *)); |
| 359 | static int tokenize_arguments |
| 360 | PARAMS ((char **, char *)); |
| 361 | static bfd_boolean parse_arguments |
| 362 | PARAMS ((TInsn *, int, char **)); |
| 363 | static int xg_translate_idioms |
| 364 | PARAMS ((char **, int *, char **)); |
| 365 | static int xg_translate_sysreg_op |
| 366 | PARAMS ((char **, int *, char **)); |
| 367 | static void xg_reverse_shift_count |
| 368 | PARAMS ((char **)); |
| 369 | static int xg_arg_is_constant |
| 370 | PARAMS ((char *, offsetT *)); |
| 371 | static void xg_replace_opname |
| 372 | PARAMS ((char **, char *)); |
| 373 | static int xg_check_num_args |
| 374 | PARAMS ((int *, int, char *, char **)); |
| 375 | |
| 376 | /* Functions for dealing with the Xtensa ISA. */ |
| 377 | |
| 378 | static bfd_boolean operand_is_immed |
| 379 | PARAMS ((xtensa_operand)); |
| 380 | static bfd_boolean operand_is_pcrel_label |
| 381 | PARAMS ((xtensa_operand)); |
| 382 | static int get_relaxable_immed |
| 383 | PARAMS ((xtensa_opcode)); |
| 384 | static xtensa_opcode get_opcode_from_buf |
| 385 | PARAMS ((const char *)); |
| 386 | static bfd_boolean is_direct_call_opcode |
| 387 | PARAMS ((xtensa_opcode)); |
| 388 | static bfd_boolean is_call_opcode |
| 389 | PARAMS ((xtensa_opcode)); |
| 390 | static bfd_boolean is_entry_opcode |
| 391 | PARAMS ((xtensa_opcode)); |
| 392 | static bfd_boolean is_loop_opcode |
| 393 | PARAMS ((xtensa_opcode)); |
| 394 | static bfd_boolean is_the_loop_opcode |
| 395 | PARAMS ((xtensa_opcode)); |
| 396 | static bfd_boolean is_jx_opcode |
| 397 | PARAMS ((xtensa_opcode)); |
| 398 | static bfd_boolean is_windowed_return_opcode |
| 399 | PARAMS ((xtensa_opcode)); |
| 400 | static bfd_boolean is_conditional_branch_opcode |
| 401 | PARAMS ((xtensa_opcode)); |
| 402 | static bfd_boolean is_branch_or_jump_opcode |
| 403 | PARAMS ((xtensa_opcode)); |
| 404 | static bfd_reloc_code_real_type opnum_to_reloc |
| 405 | PARAMS ((int)); |
| 406 | static int reloc_to_opnum |
| 407 | PARAMS ((bfd_reloc_code_real_type)); |
| 408 | static void xtensa_insnbuf_set_operand |
| 409 | PARAMS ((xtensa_insnbuf, xtensa_opcode, xtensa_operand, int32, |
| 410 | const char *, unsigned int)); |
| 411 | static uint32 xtensa_insnbuf_get_operand |
| 412 | PARAMS ((xtensa_insnbuf, xtensa_opcode, int)); |
| 413 | static void xtensa_insnbuf_set_immediate_field |
| 414 | PARAMS ((xtensa_opcode, xtensa_insnbuf, int32, const char *, |
| 415 | unsigned int)); |
| 416 | static bfd_boolean is_negatable_branch |
| 417 | PARAMS ((TInsn *)); |
| 418 | |
| 419 | /* Various Other Internal Functions. */ |
| 420 | |
| 421 | static bfd_boolean is_unique_insn_expansion |
| 422 | PARAMS ((TransitionRule *)); |
| 423 | static int xg_get_insn_size |
| 424 | PARAMS ((TInsn *)); |
| 425 | static int xg_get_build_instr_size |
| 426 | PARAMS ((BuildInstr *)); |
| 427 | static bfd_boolean xg_is_narrow_insn |
| 428 | PARAMS ((TInsn *)); |
| 429 | static bfd_boolean xg_is_single_relaxable_insn |
| 430 | PARAMS ((TInsn *)); |
| 431 | static int xg_get_max_narrow_insn_size |
| 432 | PARAMS ((xtensa_opcode)); |
| 433 | static int xg_get_max_insn_widen_size |
| 434 | PARAMS ((xtensa_opcode)); |
| 435 | static int xg_get_max_insn_widen_literal_size |
| 436 | PARAMS ((xtensa_opcode)); |
| 437 | static bfd_boolean xg_is_relaxable_insn |
| 438 | PARAMS ((TInsn *, int)); |
| 439 | static symbolS *get_special_literal_symbol |
| 440 | PARAMS ((void)); |
| 441 | static symbolS *get_special_label_symbol |
| 442 | PARAMS ((void)); |
| 443 | static bfd_boolean xg_build_to_insn |
| 444 | PARAMS ((TInsn *, TInsn *, BuildInstr *)); |
| 445 | static bfd_boolean xg_build_to_stack |
| 446 | PARAMS ((IStack *, TInsn *, BuildInstr *)); |
| 447 | static bfd_boolean xg_expand_to_stack |
| 448 | PARAMS ((IStack *, TInsn *, int)); |
| 449 | static bfd_boolean xg_expand_narrow |
| 450 | PARAMS ((TInsn *, TInsn *)); |
| 451 | static bfd_boolean xg_immeds_fit |
| 452 | PARAMS ((const TInsn *)); |
| 453 | static bfd_boolean xg_symbolic_immeds_fit |
| 454 | PARAMS ((const TInsn *, segT, fragS *, offsetT, long)); |
| 455 | static bfd_boolean xg_check_operand |
| 456 | PARAMS ((int32, xtensa_operand)); |
| 457 | static int is_dnrange |
| 458 | PARAMS ((fragS *, symbolS *, long)); |
| 459 | static int xg_assembly_relax |
| 460 | PARAMS ((IStack *, TInsn *, segT, fragS *, offsetT, int, long)); |
| 461 | static void xg_force_frag_space |
| 462 | PARAMS ((int)); |
| 463 | static void xg_finish_frag |
| 464 | PARAMS ((char *, enum xtensa_relax_statesE, int, bfd_boolean)); |
| 465 | static bfd_boolean is_branch_jmp_to_next |
| 466 | PARAMS ((TInsn *, fragS *)); |
| 467 | static void xg_add_branch_and_loop_targets |
| 468 | PARAMS ((TInsn *)); |
| 469 | static bfd_boolean xg_instruction_matches_rule |
| 470 | PARAMS ((TInsn *, TransitionRule *)); |
| 471 | static TransitionRule *xg_instruction_match |
| 472 | PARAMS ((TInsn *)); |
| 473 | static bfd_boolean xg_build_token_insn |
| 474 | PARAMS ((BuildInstr *, TInsn *, TInsn *)); |
| 475 | static bfd_boolean xg_simplify_insn |
| 476 | PARAMS ((TInsn *, TInsn *)); |
| 477 | static bfd_boolean xg_expand_assembly_insn |
| 478 | PARAMS ((IStack *, TInsn *)); |
| 479 | static symbolS *xg_assemble_literal |
| 480 | PARAMS ((TInsn *)); |
| 481 | static void xg_assemble_literal_space |
| 482 | PARAMS ((int)); |
| 483 | static symbolS *xtensa_create_literal_symbol |
| 484 | PARAMS ((segT, fragS *)); |
| 485 | static void xtensa_add_literal_sym |
| 486 | PARAMS ((symbolS *)); |
| 487 | static void xtensa_add_insn_label |
| 488 | PARAMS ((symbolS *)); |
| 489 | static void xtensa_clear_insn_labels |
| 490 | PARAMS ((void)); |
| 491 | static bfd_boolean get_is_linkonce_section |
| 492 | PARAMS ((bfd *, segT)); |
| 493 | static bfd_boolean xg_emit_insn |
| 494 | PARAMS ((TInsn *, bfd_boolean)); |
| 495 | static bfd_boolean xg_emit_insn_to_buf |
| 496 | PARAMS ((TInsn *, char *, fragS *, offsetT, bfd_boolean)); |
| 497 | static bfd_boolean xg_add_opcode_fix |
| 498 | PARAMS ((xtensa_opcode, int, expressionS *, fragS *, offsetT)); |
| 499 | static void xg_resolve_literals |
| 500 | PARAMS ((TInsn *, symbolS *)); |
| 501 | static void xg_resolve_labels |
| 502 | PARAMS ((TInsn *, symbolS *)); |
| 503 | static void xg_assemble_tokens |
| 504 | PARAMS ((TInsn *)); |
| 505 | static bfd_boolean is_register_writer |
| 506 | PARAMS ((const TInsn *, const char *, int)); |
| 507 | static bfd_boolean is_bad_loopend_opcode |
| 508 | PARAMS ((const TInsn *)); |
| 509 | static bfd_boolean is_unaligned_label |
| 510 | PARAMS ((symbolS *)); |
| 511 | static fragS *next_non_empty_frag |
| 512 | PARAMS ((const fragS *)); |
| 513 | static xtensa_opcode next_frag_opcode |
| 514 | PARAMS ((const fragS *)); |
| 515 | static void update_next_frag_nop_state |
| 516 | PARAMS ((fragS *)); |
| 517 | static bfd_boolean next_frag_is_branch_target |
| 518 | PARAMS ((const fragS *)); |
| 519 | static bfd_boolean next_frag_is_loop_target |
| 520 | PARAMS ((const fragS *)); |
| 521 | static addressT next_frag_pre_opcode_bytes |
| 522 | PARAMS ((const fragS *)); |
| 523 | static bfd_boolean is_next_frag_target |
| 524 | PARAMS ((const fragS *, const fragS *)); |
| 525 | static void xtensa_mark_literal_pool_location |
| 526 | PARAMS ((void)); |
| 527 | static void xtensa_move_labels |
| 528 | PARAMS ((fragS *, valueT, bfd_boolean)); |
| 529 | static void assemble_nop |
| 530 | PARAMS ((size_t, char *)); |
| 531 | static addressT get_expanded_loop_offset |
| 532 | PARAMS ((xtensa_opcode)); |
| 533 | static fragS *get_literal_pool_location |
| 534 | PARAMS ((segT)); |
| 535 | static void set_literal_pool_location |
| 536 | PARAMS ((segT, fragS *)); |
| 537 | |
| 538 | /* Helpers for xtensa_end(). */ |
| 539 | |
| 540 | static void xtensa_cleanup_align_frags |
| 541 | PARAMS ((void)); |
| 542 | static void xtensa_fix_target_frags |
| 543 | PARAMS ((void)); |
| 544 | static bfd_boolean frag_can_negate_branch |
| 545 | PARAMS ((fragS *)); |
| 546 | static void xtensa_fix_a0_b_retw_frags |
| 547 | PARAMS ((void)); |
| 548 | static bfd_boolean next_instrs_are_b_retw |
| 549 | PARAMS ((fragS *)); |
| 550 | static void xtensa_fix_b_j_loop_end_frags |
| 551 | PARAMS ((void)); |
| 552 | static bfd_boolean next_instr_is_loop_end |
| 553 | PARAMS ((fragS *)); |
| 554 | static void xtensa_fix_close_loop_end_frags |
| 555 | PARAMS ((void)); |
| 556 | static size_t min_bytes_to_other_loop_end |
| 557 | PARAMS ((fragS *, fragS *, offsetT, size_t)); |
| 558 | static size_t unrelaxed_frag_min_size |
| 559 | PARAMS ((fragS *)); |
| 560 | static void xtensa_fix_short_loop_frags |
| 561 | PARAMS ((void)); |
| 562 | static size_t count_insns_to_loop_end |
| 563 | PARAMS ((fragS *, bfd_boolean, size_t)); |
| 564 | static size_t unrelaxed_frag_min_insn_count |
| 565 | PARAMS ((fragS *)); |
| 566 | static bfd_boolean branch_before_loop_end |
| 567 | PARAMS ((fragS *)); |
| 568 | static bfd_boolean unrelaxed_frag_has_b_j |
| 569 | PARAMS ((fragS *)); |
| 570 | static void xtensa_sanity_check |
| 571 | PARAMS ((void)); |
| 572 | static bfd_boolean is_empty_loop |
| 573 | PARAMS ((const TInsn *, fragS *)); |
| 574 | static bfd_boolean is_local_forward_loop |
| 575 | PARAMS ((const TInsn *, fragS *)); |
| 576 | |
| 577 | /* Alignment Functions. */ |
| 578 | |
| 579 | static size_t get_text_align_power |
| 580 | PARAMS ((int)); |
| 581 | static addressT get_text_align_max_fill_size |
| 582 | PARAMS ((int, bfd_boolean, bfd_boolean)); |
| 583 | static addressT get_text_align_fill_size |
| 584 | PARAMS ((addressT, int, int, bfd_boolean, bfd_boolean)); |
| 585 | static size_t get_text_align_nop_count |
| 586 | PARAMS ((size_t, bfd_boolean)); |
| 587 | static size_t get_text_align_nth_nop_size |
| 588 | PARAMS ((size_t, size_t, bfd_boolean)); |
| 589 | static addressT get_noop_aligned_address |
| 590 | PARAMS ((fragS *, addressT)); |
| 591 | static addressT get_widen_aligned_address |
| 592 | PARAMS ((fragS *, addressT)); |
| 593 | |
| 594 | /* Helpers for xtensa_relax_frag(). */ |
| 595 | |
| 596 | static long relax_frag_text_align |
| 597 | PARAMS ((fragS *, long)); |
| 598 | static long relax_frag_add_nop |
| 599 | PARAMS ((fragS *)); |
| 600 | static long relax_frag_narrow |
| 601 | PARAMS ((fragS *, long)); |
| 602 | static bfd_boolean future_alignment_required |
| 603 | PARAMS ((fragS *, long)); |
| 604 | static long relax_frag_immed |
| 605 | PARAMS ((segT, fragS *, long, int, int *)); |
| 606 | |
| 607 | /* Helpers for md_convert_frag(). */ |
| 608 | |
| 609 | static void convert_frag_align_next_opcode |
| 610 | PARAMS ((fragS *)); |
| 611 | static void convert_frag_narrow |
| 612 | PARAMS ((fragS *)); |
| 613 | static void convert_frag_immed |
| 614 | PARAMS ((segT, fragS *, int)); |
| 615 | static fixS *fix_new_exp_in_seg |
| 616 | PARAMS ((segT, subsegT, fragS *, int, int, expressionS *, int, |
| 617 | bfd_reloc_code_real_type)); |
| 618 | static void convert_frag_immed_finish_loop |
| 619 | PARAMS ((segT, fragS *, TInsn *)); |
| 620 | static offsetT get_expression_value |
| 621 | PARAMS ((segT, expressionS *)); |
| 622 | |
| 623 | /* Flags for the Last Instruction in Each Subsegment. */ |
| 624 | |
| 625 | static unsigned get_last_insn_flags |
| 626 | PARAMS ((segT, subsegT)); |
| 627 | static void set_last_insn_flags |
| 628 | PARAMS ((segT, subsegT, unsigned, bfd_boolean)); |
| 629 | |
| 630 | /* Segment list functions. */ |
| 631 | |
| 632 | static void xtensa_remove_section |
| 633 | PARAMS ((segT)); |
| 634 | static void xtensa_insert_section |
| 635 | PARAMS ((segT, segT)); |
| 636 | static void xtensa_move_seg_list_to_beginning |
| 637 | PARAMS ((seg_list *)); |
| 638 | static void xtensa_move_literals |
| 639 | PARAMS ((void)); |
| 640 | static void xtensa_reorder_seg_list |
| 641 | PARAMS ((seg_list *, segT)); |
| 642 | static void xtensa_reorder_segments |
| 643 | PARAMS ((void)); |
| 644 | static segT get_last_sec |
| 645 | PARAMS ((void)); |
| 646 | static void xtensa_switch_to_literal_fragment |
| 647 | PARAMS ((emit_state *)); |
| 648 | static void xtensa_switch_section_emit_state |
| 649 | PARAMS ((emit_state *, segT, subsegT)); |
| 650 | static void xtensa_restore_emit_state |
| 651 | PARAMS ((emit_state *)); |
| 652 | static void cache_literal_section |
| 653 | PARAMS ((seg_list *, const char *, segT *)); |
| 654 | static segT retrieve_literal_seg |
| 655 | PARAMS ((seg_list *, const char *)); |
| 656 | static segT seg_present |
| 657 | PARAMS ((const char *)); |
| 658 | static void add_seg_list |
| 659 | PARAMS ((seg_list *, segT)); |
| 660 | |
| 661 | /* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */ |
| 662 | |
| 663 | static void xtensa_create_property_segments |
| 664 | PARAMS ((frag_predicate, const char *, xt_section_type)); |
| 665 | static segment_info_type *retrieve_segment_info |
| 666 | PARAMS ((segT)); |
| 667 | static segT retrieve_xtensa_section |
| 668 | PARAMS ((char *)); |
| 669 | static bfd_boolean section_has_property |
| 670 | PARAMS ((segT sec, frag_predicate)); |
| 671 | static void add_xt_block_frags |
| 672 | PARAMS ((segT, segT, xtensa_block_info **, frag_predicate)); |
| 673 | static bfd_boolean get_frag_is_literal |
| 674 | PARAMS ((const fragS *)); |
| 675 | static bfd_boolean get_frag_is_insn |
| 676 | PARAMS ((const fragS *)); |
| 677 | |
| 678 | /* Import from elf32-xtensa.c in BFD library. */ |
| 679 | extern char *xtensa_get_property_section_name |
| 680 | PARAMS ((bfd *, asection *, const char *)); |
| 681 | |
| 682 | /* TInsn and IStack functions. */ |
| 683 | static bfd_boolean tinsn_has_symbolic_operands |
| 684 | PARAMS ((const TInsn *)); |
| 685 | static bfd_boolean tinsn_has_invalid_symbolic_operands |
| 686 | PARAMS ((const TInsn *)); |
| 687 | static bfd_boolean tinsn_has_complex_operands |
| 688 | PARAMS ((const TInsn *)); |
| 689 | static bfd_boolean tinsn_to_insnbuf |
| 690 | PARAMS ((TInsn *, xtensa_insnbuf)); |
| 691 | static bfd_boolean tinsn_check_arguments |
| 692 | PARAMS ((const TInsn *)); |
| 693 | static void tinsn_from_chars |
| 694 | PARAMS ((TInsn *, char *)); |
| 695 | static void tinsn_immed_from_frag |
| 696 | PARAMS ((TInsn *, fragS *)); |
| 697 | static int get_num_stack_text_bytes |
| 698 | PARAMS ((IStack *)); |
| 699 | static int get_num_stack_literal_bytes |
| 700 | PARAMS ((IStack *)); |
| 701 | |
| 702 | /* Expression Utilities. */ |
| 703 | bfd_boolean expr_is_const |
| 704 | PARAMS ((const expressionS *)); |
| 705 | offsetT get_expr_const |
| 706 | PARAMS ((const expressionS *)); |
| 707 | void set_expr_const |
| 708 | PARAMS ((expressionS *, offsetT)); |
| 709 | void set_expr_symbol_offset |
| 710 | PARAMS ((expressionS *, symbolS *, offsetT)); |
| 711 | bfd_boolean expr_is_equal |
| 712 | PARAMS ((expressionS *, expressionS *)); |
| 713 | static void copy_expr |
| 714 | PARAMS ((expressionS *, const expressionS *)); |
| 715 | |
| 716 | #ifdef XTENSA_SECTION_RENAME |
| 717 | static void build_section_rename |
| 718 | PARAMS ((const char *)); |
| 719 | static void add_section_rename |
| 720 | PARAMS ((char *, char *)); |
| 721 | #endif |
| 722 | |
| 723 | |
| 724 | /* ISA imported from bfd. */ |
| 725 | extern xtensa_isa xtensa_default_isa; |
| 726 | |
| 727 | extern int target_big_endian; |
| 728 | |
| 729 | static xtensa_opcode xtensa_addi_opcode; |
| 730 | static xtensa_opcode xtensa_addmi_opcode; |
| 731 | static xtensa_opcode xtensa_call0_opcode; |
| 732 | static xtensa_opcode xtensa_call4_opcode; |
| 733 | static xtensa_opcode xtensa_call8_opcode; |
| 734 | static xtensa_opcode xtensa_call12_opcode; |
| 735 | static xtensa_opcode xtensa_callx0_opcode; |
| 736 | static xtensa_opcode xtensa_callx4_opcode; |
| 737 | static xtensa_opcode xtensa_callx8_opcode; |
| 738 | static xtensa_opcode xtensa_callx12_opcode; |
| 739 | static xtensa_opcode xtensa_entry_opcode; |
| 740 | static xtensa_opcode xtensa_isync_opcode; |
| 741 | static xtensa_opcode xtensa_j_opcode; |
| 742 | static xtensa_opcode xtensa_jx_opcode; |
| 743 | static xtensa_opcode xtensa_loop_opcode; |
| 744 | static xtensa_opcode xtensa_loopnez_opcode; |
| 745 | static xtensa_opcode xtensa_loopgtz_opcode; |
| 746 | static xtensa_opcode xtensa_nop_n_opcode; |
| 747 | static xtensa_opcode xtensa_or_opcode; |
| 748 | static xtensa_opcode xtensa_ret_opcode; |
| 749 | static xtensa_opcode xtensa_ret_n_opcode; |
| 750 | static xtensa_opcode xtensa_retw_opcode; |
| 751 | static xtensa_opcode xtensa_retw_n_opcode; |
| 752 | static xtensa_opcode xtensa_rsr_opcode; |
| 753 | static xtensa_opcode xtensa_waiti_opcode; |
| 754 | |
| 755 | \f |
| 756 | /* Command-line Options. */ |
| 757 | |
| 758 | bfd_boolean use_literal_section = TRUE; |
| 759 | static bfd_boolean align_targets = TRUE; |
| 760 | static bfd_boolean align_only_targets = FALSE; |
| 761 | static bfd_boolean software_a0_b_retw_interlock = TRUE; |
| 762 | static bfd_boolean has_a0_b_retw = FALSE; |
| 763 | static bfd_boolean workaround_a0_b_retw = TRUE; |
| 764 | |
| 765 | static bfd_boolean software_avoid_b_j_loop_end = TRUE; |
| 766 | static bfd_boolean workaround_b_j_loop_end = TRUE; |
| 767 | static bfd_boolean maybe_has_b_j_loop_end = FALSE; |
| 768 | |
| 769 | static bfd_boolean software_avoid_short_loop = TRUE; |
| 770 | static bfd_boolean workaround_short_loop = TRUE; |
| 771 | static bfd_boolean maybe_has_short_loop = FALSE; |
| 772 | |
| 773 | static bfd_boolean software_avoid_close_loop_end = TRUE; |
| 774 | static bfd_boolean workaround_close_loop_end = TRUE; |
| 775 | static bfd_boolean maybe_has_close_loop_end = FALSE; |
| 776 | |
| 777 | /* When avoid_short_loops is true, all loops with early exits must |
| 778 | have at least 3 instructions. avoid_all_short_loops is a modifier |
| 779 | to the avoid_short_loop flag. In addition to the avoid_short_loop |
| 780 | actions, all straightline loopgtz and loopnez must have at least 3 |
| 781 | instructions. */ |
| 782 | |
| 783 | static bfd_boolean software_avoid_all_short_loops = TRUE; |
| 784 | static bfd_boolean workaround_all_short_loops = TRUE; |
| 785 | |
| 786 | /* This is on a per-instruction basis. */ |
| 787 | static bfd_boolean specific_opcode = FALSE; |
| 788 | |
| 789 | enum |
| 790 | { |
| 791 | option_density = OPTION_MD_BASE, |
| 792 | option_no_density, |
| 793 | |
| 794 | option_relax, |
| 795 | option_no_relax, |
| 796 | |
| 797 | option_generics, |
| 798 | option_no_generics, |
| 799 | |
| 800 | option_text_section_literals, |
| 801 | option_no_text_section_literals, |
| 802 | |
| 803 | option_align_targets, |
| 804 | option_no_align_targets, |
| 805 | |
| 806 | option_align_only_targets, |
| 807 | option_no_align_only_targets, |
| 808 | |
| 809 | option_longcalls, |
| 810 | option_no_longcalls, |
| 811 | |
| 812 | option_workaround_a0_b_retw, |
| 813 | option_no_workaround_a0_b_retw, |
| 814 | |
| 815 | option_workaround_b_j_loop_end, |
| 816 | option_no_workaround_b_j_loop_end, |
| 817 | |
| 818 | option_workaround_short_loop, |
| 819 | option_no_workaround_short_loop, |
| 820 | |
| 821 | option_workaround_all_short_loops, |
| 822 | option_no_workaround_all_short_loops, |
| 823 | |
| 824 | option_workaround_close_loop_end, |
| 825 | option_no_workaround_close_loop_end, |
| 826 | |
| 827 | option_no_workarounds, |
| 828 | |
| 829 | #ifdef XTENSA_SECTION_RENAME |
| 830 | option_literal_section_name, |
| 831 | option_text_section_name, |
| 832 | option_data_section_name, |
| 833 | option_bss_section_name, |
| 834 | option_rename_section_name, |
| 835 | #endif |
| 836 | |
| 837 | option_eb, |
| 838 | option_el |
| 839 | }; |
| 840 | |
| 841 | const char *md_shortopts = ""; |
| 842 | |
| 843 | struct option md_longopts[] = |
| 844 | { |
| 845 | {"density", no_argument, NULL, option_density}, |
| 846 | {"no-density", no_argument, NULL, option_no_density}, |
| 847 | /* At least as early as alameda, --[no-]relax didn't work as |
| 848 | documented, so as of albany, --[no-]relax is equivalent to |
| 849 | --[no-]generics. Both of these will be deprecated in |
| 850 | BearValley. */ |
| 851 | {"relax", no_argument, NULL, option_generics}, |
| 852 | {"no-relax", no_argument, NULL, option_no_generics}, |
| 853 | {"generics", no_argument, NULL, option_generics}, |
| 854 | {"no-generics", no_argument, NULL, option_no_generics}, |
| 855 | {"text-section-literals", no_argument, NULL, option_text_section_literals}, |
| 856 | {"no-text-section-literals", no_argument, NULL, |
| 857 | option_no_text_section_literals}, |
| 858 | /* This option was changed from -align-target to -target-align |
| 859 | because it conflicted with the "-al" option. */ |
| 860 | {"target-align", no_argument, NULL, option_align_targets}, |
| 861 | {"no-target-align", no_argument, NULL, |
| 862 | option_no_align_targets}, |
| 863 | #if 0 |
| 864 | /* This option should do a better job aligning targets because |
| 865 | it will only attempt to align targets that are the target of a |
| 866 | branch. */ |
| 867 | { "target-align-only", no_argument, NULL, option_align_only_targets }, |
| 868 | { "no-target-align-only", no_argument, NULL, option_no_align_only_targets }, |
| 869 | #endif /* 0 */ |
| 870 | {"longcalls", no_argument, NULL, option_longcalls}, |
| 871 | {"no-longcalls", no_argument, NULL, option_no_longcalls}, |
| 872 | |
| 873 | {"no-workaround-a0-b-retw", no_argument, NULL, |
| 874 | option_no_workaround_a0_b_retw}, |
| 875 | {"workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw}, |
| 876 | |
| 877 | {"no-workaround-b-j-loop-end", no_argument, NULL, |
| 878 | option_no_workaround_b_j_loop_end}, |
| 879 | {"workaround-b-j-loop-end", no_argument, NULL, |
| 880 | option_workaround_b_j_loop_end}, |
| 881 | |
| 882 | {"no-workaround-short-loops", no_argument, NULL, |
| 883 | option_no_workaround_short_loop}, |
| 884 | {"workaround-short-loops", no_argument, NULL, option_workaround_short_loop}, |
| 885 | |
| 886 | {"no-workaround-all-short-loops", no_argument, NULL, |
| 887 | option_no_workaround_all_short_loops}, |
| 888 | {"workaround-all-short-loop", no_argument, NULL, |
| 889 | option_workaround_all_short_loops}, |
| 890 | |
| 891 | {"no-workaround-close-loop-end", no_argument, NULL, |
| 892 | option_no_workaround_close_loop_end}, |
| 893 | {"workaround-close-loop-end", no_argument, NULL, |
| 894 | option_workaround_close_loop_end}, |
| 895 | |
| 896 | {"no-workarounds", no_argument, NULL, option_no_workarounds}, |
| 897 | |
| 898 | #ifdef XTENSA_SECTION_RENAME |
| 899 | {"literal-section-name", required_argument, NULL, |
| 900 | option_literal_section_name}, |
| 901 | {"text-section-name", required_argument, NULL, |
| 902 | option_text_section_name}, |
| 903 | {"data-section-name", required_argument, NULL, |
| 904 | option_data_section_name}, |
| 905 | {"rename-section", required_argument, NULL, |
| 906 | option_rename_section_name}, |
| 907 | {"bss-section-name", required_argument, NULL, |
| 908 | option_bss_section_name}, |
| 909 | #endif /* XTENSA_SECTION_RENAME */ |
| 910 | |
| 911 | {NULL, no_argument, NULL, 0} |
| 912 | }; |
| 913 | |
| 914 | size_t md_longopts_size = sizeof md_longopts; |
| 915 | |
| 916 | |
| 917 | int |
| 918 | md_parse_option (c, arg) |
| 919 | int c; |
| 920 | char *arg; |
| 921 | { |
| 922 | switch (c) |
| 923 | { |
| 924 | case option_density: |
| 925 | if (!density_supported) |
| 926 | { |
| 927 | as_bad (_("'--density' option not supported in this Xtensa " |
| 928 | "configuration")); |
| 929 | return 0; |
| 930 | } |
| 931 | directive_state[directive_density] = TRUE; |
| 932 | return 1; |
| 933 | case option_no_density: |
| 934 | directive_state[directive_density] = FALSE; |
| 935 | return 1; |
| 936 | case option_generics: |
| 937 | directive_state[directive_generics] = TRUE; |
| 938 | return 1; |
| 939 | case option_no_generics: |
| 940 | directive_state[directive_generics] = FALSE; |
| 941 | return 1; |
| 942 | case option_longcalls: |
| 943 | directive_state[directive_longcalls] = TRUE; |
| 944 | return 1; |
| 945 | case option_no_longcalls: |
| 946 | directive_state[directive_longcalls] = FALSE; |
| 947 | return 1; |
| 948 | case option_text_section_literals: |
| 949 | use_literal_section = FALSE; |
| 950 | return 1; |
| 951 | case option_no_text_section_literals: |
| 952 | use_literal_section = TRUE; |
| 953 | return 1; |
| 954 | case option_workaround_a0_b_retw: |
| 955 | workaround_a0_b_retw = TRUE; |
| 956 | software_a0_b_retw_interlock = TRUE; |
| 957 | return 1; |
| 958 | case option_no_workaround_a0_b_retw: |
| 959 | workaround_a0_b_retw = FALSE; |
| 960 | software_a0_b_retw_interlock = FALSE; |
| 961 | return 1; |
| 962 | case option_workaround_b_j_loop_end: |
| 963 | workaround_b_j_loop_end = TRUE; |
| 964 | software_avoid_b_j_loop_end = TRUE; |
| 965 | return 1; |
| 966 | case option_no_workaround_b_j_loop_end: |
| 967 | workaround_b_j_loop_end = FALSE; |
| 968 | software_avoid_b_j_loop_end = FALSE; |
| 969 | return 1; |
| 970 | |
| 971 | case option_workaround_short_loop: |
| 972 | workaround_short_loop = TRUE; |
| 973 | software_avoid_short_loop = TRUE; |
| 974 | return 1; |
| 975 | case option_no_workaround_short_loop: |
| 976 | workaround_short_loop = FALSE; |
| 977 | software_avoid_short_loop = FALSE; |
| 978 | return 1; |
| 979 | |
| 980 | case option_workaround_all_short_loops: |
| 981 | workaround_all_short_loops = TRUE; |
| 982 | software_avoid_all_short_loops = TRUE; |
| 983 | return 1; |
| 984 | case option_no_workaround_all_short_loops: |
| 985 | workaround_all_short_loops = FALSE; |
| 986 | software_avoid_all_short_loops = FALSE; |
| 987 | return 1; |
| 988 | |
| 989 | case option_workaround_close_loop_end: |
| 990 | workaround_close_loop_end = TRUE; |
| 991 | software_avoid_close_loop_end = TRUE; |
| 992 | return 1; |
| 993 | case option_no_workaround_close_loop_end: |
| 994 | workaround_close_loop_end = FALSE; |
| 995 | software_avoid_close_loop_end = FALSE; |
| 996 | return 1; |
| 997 | |
| 998 | case option_no_workarounds: |
| 999 | workaround_a0_b_retw = FALSE; |
| 1000 | software_a0_b_retw_interlock = FALSE; |
| 1001 | workaround_b_j_loop_end = FALSE; |
| 1002 | software_avoid_b_j_loop_end = FALSE; |
| 1003 | workaround_short_loop = FALSE; |
| 1004 | software_avoid_short_loop = FALSE; |
| 1005 | workaround_all_short_loops = FALSE; |
| 1006 | software_avoid_all_short_loops = FALSE; |
| 1007 | workaround_close_loop_end = FALSE; |
| 1008 | software_avoid_close_loop_end = FALSE; |
| 1009 | return 1; |
| 1010 | |
| 1011 | case option_align_targets: |
| 1012 | align_targets = TRUE; |
| 1013 | return 1; |
| 1014 | case option_no_align_targets: |
| 1015 | align_targets = FALSE; |
| 1016 | return 1; |
| 1017 | |
| 1018 | case option_align_only_targets: |
| 1019 | align_only_targets = TRUE; |
| 1020 | return 1; |
| 1021 | case option_no_align_only_targets: |
| 1022 | align_only_targets = FALSE; |
| 1023 | return 1; |
| 1024 | |
| 1025 | #ifdef XTENSA_SECTION_RENAME |
| 1026 | case option_literal_section_name: |
| 1027 | add_section_rename (".literal", arg); |
| 1028 | as_warn (_("'--literal-section-name' is deprecated; " |
| 1029 | "use '--rename-section .literal=NEWNAME'")); |
| 1030 | return 1; |
| 1031 | |
| 1032 | case option_text_section_name: |
| 1033 | add_section_rename (".text", arg); |
| 1034 | as_warn (_("'--text-section-name' is deprecated; " |
| 1035 | "use '--rename-section .text=NEWNAME'")); |
| 1036 | return 1; |
| 1037 | |
| 1038 | case option_data_section_name: |
| 1039 | add_section_rename (".data", arg); |
| 1040 | as_warn (_("'--data-section-name' is deprecated; " |
| 1041 | "use '--rename-section .data=NEWNAME'")); |
| 1042 | return 1; |
| 1043 | |
| 1044 | case option_bss_section_name: |
| 1045 | add_section_rename (".bss", arg); |
| 1046 | as_warn (_("'--bss-section-name' is deprecated; " |
| 1047 | "use '--rename-section .bss=NEWNAME'")); |
| 1048 | return 1; |
| 1049 | |
| 1050 | case option_rename_section_name: |
| 1051 | build_section_rename (arg); |
| 1052 | return 1; |
| 1053 | #endif /* XTENSA_SECTION_RENAME */ |
| 1054 | |
| 1055 | case 'Q': |
| 1056 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section |
| 1057 | should be emitted or not. FIXME: Not implemented. */ |
| 1058 | return 1; |
| 1059 | |
| 1060 | default: |
| 1061 | return 0; |
| 1062 | } |
| 1063 | } |
| 1064 | |
| 1065 | |
| 1066 | void |
| 1067 | md_show_usage (stream) |
| 1068 | FILE *stream; |
| 1069 | { |
| 1070 | fputs ("\nXtensa options:\n" |
| 1071 | "--[no-]density [Do not] emit density instructions\n" |
| 1072 | "--[no-]relax [Do not] perform branch relaxation\n" |
| 1073 | "--[no-]generics [Do not] transform instructions\n" |
| 1074 | "--[no-]longcalls [Do not] emit 32-bit call sequences\n" |
| 1075 | "--[no-]target-align [Do not] try to align branch targets\n" |
| 1076 | "--[no-]text-section-literals\n" |
| 1077 | " [Do not] put literals in the text section\n" |
| 1078 | "--no-workarounds Do not use any Xtensa workarounds\n" |
| 1079 | #ifdef XTENSA_SECTION_RENAME |
| 1080 | "--rename-section old=new(:old1=new1)*\n" |
| 1081 | " Rename section 'old' to 'new'\n" |
| 1082 | "\nThe following Xtensa options are deprecated\n" |
| 1083 | "--literal-section-name Name of literal section (default .literal)\n" |
| 1084 | "--text-section-name Name of text section (default .text)\n" |
| 1085 | "--data-section-name Name of data section (default .data)\n" |
| 1086 | "--bss-section-name Name of bss section (default .bss)\n" |
| 1087 | #endif |
| 1088 | , stream); |
| 1089 | } |
| 1090 | |
| 1091 | \f |
| 1092 | /* Directive data and functions. */ |
| 1093 | |
| 1094 | typedef struct state_stackS_struct |
| 1095 | { |
| 1096 | directiveE directive; |
| 1097 | bfd_boolean negated; |
| 1098 | bfd_boolean old_state; |
| 1099 | const char *file; |
| 1100 | unsigned int line; |
| 1101 | const void *datum; |
| 1102 | struct state_stackS_struct *prev; |
| 1103 | } state_stackS; |
| 1104 | |
| 1105 | state_stackS *directive_state_stack; |
| 1106 | |
| 1107 | const pseudo_typeS md_pseudo_table[] = |
| 1108 | { |
| 1109 | {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */ |
| 1110 | {"literal_position", xtensa_literal_position, 0}, |
| 1111 | {"frame", s_ignore, 0}, /* formerly used for STABS debugging */ |
| 1112 | {"word", cons, 4}, |
| 1113 | {"begin", xtensa_begin_directive, 0}, |
| 1114 | {"end", xtensa_end_directive, 0}, |
| 1115 | {"literal", xtensa_literal_pseudo, 0}, |
| 1116 | {NULL, 0, 0}, |
| 1117 | }; |
| 1118 | |
| 1119 | |
| 1120 | bfd_boolean |
| 1121 | use_generics () |
| 1122 | { |
| 1123 | return directive_state[directive_generics]; |
| 1124 | } |
| 1125 | |
| 1126 | |
| 1127 | bfd_boolean |
| 1128 | use_longcalls () |
| 1129 | { |
| 1130 | return directive_state[directive_longcalls]; |
| 1131 | } |
| 1132 | |
| 1133 | |
| 1134 | bfd_boolean |
| 1135 | code_density_available () |
| 1136 | { |
| 1137 | return directive_state[directive_density]; |
| 1138 | } |
| 1139 | |
| 1140 | |
| 1141 | bfd_boolean |
| 1142 | can_relax () |
| 1143 | { |
| 1144 | return use_generics (); |
| 1145 | } |
| 1146 | |
| 1147 | |
| 1148 | static void |
| 1149 | directive_push (directive, negated, datum) |
| 1150 | directiveE directive; |
| 1151 | bfd_boolean negated; |
| 1152 | const void *datum; |
| 1153 | { |
| 1154 | char *file; |
| 1155 | unsigned int line; |
| 1156 | state_stackS *stack = (state_stackS *) xmalloc (sizeof (state_stackS)); |
| 1157 | |
| 1158 | as_where (&file, &line); |
| 1159 | |
| 1160 | stack->directive = directive; |
| 1161 | stack->negated = negated; |
| 1162 | stack->old_state = directive_state[directive]; |
| 1163 | stack->file = file; |
| 1164 | stack->line = line; |
| 1165 | stack->datum = datum; |
| 1166 | stack->prev = directive_state_stack; |
| 1167 | directive_state_stack = stack; |
| 1168 | |
| 1169 | directive_state[directive] = !negated; |
| 1170 | } |
| 1171 | |
| 1172 | static void |
| 1173 | directive_pop (directive, negated, file, line, datum) |
| 1174 | directiveE *directive; |
| 1175 | bfd_boolean *negated; |
| 1176 | const char **file; |
| 1177 | unsigned int *line; |
| 1178 | const void **datum; |
| 1179 | { |
| 1180 | state_stackS *top = directive_state_stack; |
| 1181 | |
| 1182 | if (!directive_state_stack) |
| 1183 | { |
| 1184 | as_bad (_("unmatched end directive")); |
| 1185 | *directive = directive_none; |
| 1186 | return; |
| 1187 | } |
| 1188 | |
| 1189 | directive_state[directive_state_stack->directive] = top->old_state; |
| 1190 | *directive = top->directive; |
| 1191 | *negated = top->negated; |
| 1192 | *file = top->file; |
| 1193 | *line = top->line; |
| 1194 | *datum = top->datum; |
| 1195 | directive_state_stack = top->prev; |
| 1196 | free (top); |
| 1197 | } |
| 1198 | |
| 1199 | |
| 1200 | static void |
| 1201 | directive_balance () |
| 1202 | { |
| 1203 | while (directive_state_stack) |
| 1204 | { |
| 1205 | directiveE directive; |
| 1206 | bfd_boolean negated; |
| 1207 | const char *file; |
| 1208 | unsigned int line; |
| 1209 | const void *datum; |
| 1210 | |
| 1211 | directive_pop (&directive, &negated, &file, &line, &datum); |
| 1212 | as_warn_where ((char *) file, line, |
| 1213 | _(".begin directive with no matching .end directive")); |
| 1214 | } |
| 1215 | } |
| 1216 | |
| 1217 | |
| 1218 | static bfd_boolean |
| 1219 | inside_directive (dir) |
| 1220 | directiveE dir; |
| 1221 | { |
| 1222 | state_stackS *top = directive_state_stack; |
| 1223 | |
| 1224 | while (top && top->directive != dir) |
| 1225 | top = top->prev; |
| 1226 | |
| 1227 | return (top != NULL); |
| 1228 | } |
| 1229 | |
| 1230 | |
| 1231 | static void |
| 1232 | get_directive (directive, negated) |
| 1233 | directiveE *directive; |
| 1234 | bfd_boolean *negated; |
| 1235 | { |
| 1236 | int len; |
| 1237 | unsigned i; |
| 1238 | |
| 1239 | if (strncmp (input_line_pointer, "no-", 3) != 0) |
| 1240 | *negated = FALSE; |
| 1241 | else |
| 1242 | { |
| 1243 | *negated = TRUE; |
| 1244 | input_line_pointer += 3; |
| 1245 | } |
| 1246 | |
| 1247 | len = strspn (input_line_pointer, |
| 1248 | "abcdefghijklmnopqrstuvwxyz_/0123456789."); |
| 1249 | |
| 1250 | for (i = 0; i < sizeof (directive_info) / sizeof (*directive_info); ++i) |
| 1251 | { |
| 1252 | if (strncmp (input_line_pointer, directive_info[i].name, len) == 0) |
| 1253 | { |
| 1254 | input_line_pointer += len; |
| 1255 | *directive = (directiveE) i; |
| 1256 | if (*negated && !directive_info[i].can_be_negated) |
| 1257 | as_bad (_("directive %s can't be negated"), |
| 1258 | directive_info[i].name); |
| 1259 | return; |
| 1260 | } |
| 1261 | } |
| 1262 | |
| 1263 | as_bad (_("unknown directive")); |
| 1264 | *directive = (directiveE) XTENSA_UNDEFINED; |
| 1265 | } |
| 1266 | |
| 1267 | |
| 1268 | static void |
| 1269 | xtensa_begin_directive (ignore) |
| 1270 | int ignore ATTRIBUTE_UNUSED; |
| 1271 | { |
| 1272 | directiveE directive; |
| 1273 | bfd_boolean negated; |
| 1274 | emit_state *state; |
| 1275 | int len; |
| 1276 | lit_state *ls; |
| 1277 | |
| 1278 | md_flush_pending_output (); |
| 1279 | |
| 1280 | get_directive (&directive, &negated); |
| 1281 | if (directive == (directiveE) XTENSA_UNDEFINED) |
| 1282 | { |
| 1283 | discard_rest_of_line (); |
| 1284 | return; |
| 1285 | } |
| 1286 | |
| 1287 | switch (directive) |
| 1288 | { |
| 1289 | case directive_literal: |
| 1290 | if (!inside_directive (directive_literal)) |
| 1291 | { |
| 1292 | /* Previous labels go with whatever follows this directive, not with |
| 1293 | the literal, so save them now. */ |
| 1294 | saved_insn_labels = insn_labels; |
| 1295 | insn_labels = NULL; |
| 1296 | } |
| 1297 | state = (emit_state *) xmalloc (sizeof (emit_state)); |
| 1298 | xtensa_switch_to_literal_fragment (state); |
| 1299 | directive_push (directive_literal, negated, state); |
| 1300 | break; |
| 1301 | |
| 1302 | case directive_literal_prefix: |
| 1303 | /* Check to see if the current fragment is a literal |
| 1304 | fragment. If it is, then this operation is not allowed. */ |
| 1305 | if (frag_now->tc_frag_data.is_literal) |
| 1306 | { |
| 1307 | as_bad (_("cannot set literal_prefix inside literal fragment")); |
| 1308 | return; |
| 1309 | } |
| 1310 | |
| 1311 | /* Allocate the literal state for this section and push |
| 1312 | onto the directive stack. */ |
| 1313 | ls = xmalloc (sizeof (lit_state)); |
| 1314 | assert (ls); |
| 1315 | |
| 1316 | *ls = default_lit_sections; |
| 1317 | |
| 1318 | directive_push (directive_literal_prefix, negated, ls); |
| 1319 | |
| 1320 | /* Parse the new prefix from the input_line_pointer. */ |
| 1321 | SKIP_WHITESPACE (); |
| 1322 | len = strspn (input_line_pointer, |
| 1323 | "ABCDEFGHIJKLMNOPQRSTUVWXYZ" |
| 1324 | "abcdefghijklmnopqrstuvwxyz_/0123456789.$"); |
| 1325 | |
| 1326 | /* Process the new prefix. */ |
| 1327 | xtensa_literal_prefix (input_line_pointer, len); |
| 1328 | |
| 1329 | /* Skip the name in the input line. */ |
| 1330 | input_line_pointer += len; |
| 1331 | break; |
| 1332 | |
| 1333 | case directive_freeregs: |
| 1334 | /* This information is currently unused, but we'll accept the statement |
| 1335 | and just discard the rest of the line. This won't check the syntax, |
| 1336 | but it will accept every correct freeregs directive. */ |
| 1337 | input_line_pointer += strcspn (input_line_pointer, "\n"); |
| 1338 | directive_push (directive_freeregs, negated, 0); |
| 1339 | break; |
| 1340 | |
| 1341 | case directive_density: |
| 1342 | if (!density_supported && !negated) |
| 1343 | { |
| 1344 | as_warn (_("Xtensa density option not supported; ignored")); |
| 1345 | break; |
| 1346 | } |
| 1347 | /* fall through */ |
| 1348 | |
| 1349 | default: |
| 1350 | directive_push (directive, negated, 0); |
| 1351 | break; |
| 1352 | } |
| 1353 | |
| 1354 | demand_empty_rest_of_line (); |
| 1355 | } |
| 1356 | |
| 1357 | |
| 1358 | static void |
| 1359 | xtensa_end_directive (ignore) |
| 1360 | int ignore ATTRIBUTE_UNUSED; |
| 1361 | { |
| 1362 | directiveE begin_directive, end_directive; |
| 1363 | bfd_boolean begin_negated, end_negated; |
| 1364 | const char *file; |
| 1365 | unsigned int line; |
| 1366 | emit_state *state; |
| 1367 | lit_state *s; |
| 1368 | |
| 1369 | md_flush_pending_output (); |
| 1370 | |
| 1371 | get_directive (&end_directive, &end_negated); |
| 1372 | if (end_directive == (directiveE) XTENSA_UNDEFINED) |
| 1373 | { |
| 1374 | discard_rest_of_line (); |
| 1375 | return; |
| 1376 | } |
| 1377 | |
| 1378 | if (end_directive == directive_density && !density_supported && !end_negated) |
| 1379 | { |
| 1380 | as_warn (_("Xtensa density option not supported; ignored")); |
| 1381 | demand_empty_rest_of_line (); |
| 1382 | return; |
| 1383 | } |
| 1384 | |
| 1385 | directive_pop (&begin_directive, &begin_negated, &file, &line, |
| 1386 | (const void **) &state); |
| 1387 | |
| 1388 | if (begin_directive != directive_none) |
| 1389 | { |
| 1390 | if (begin_directive != end_directive || begin_negated != end_negated) |
| 1391 | { |
| 1392 | as_bad (_("does not match begin %s%s at %s:%d"), |
| 1393 | begin_negated ? "no-" : "", |
| 1394 | directive_info[begin_directive].name, file, line); |
| 1395 | } |
| 1396 | else |
| 1397 | { |
| 1398 | switch (end_directive) |
| 1399 | { |
| 1400 | case directive_literal: |
| 1401 | frag_var (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 1402 | xtensa_restore_emit_state (state); |
| 1403 | free (state); |
| 1404 | if (!inside_directive (directive_literal)) |
| 1405 | { |
| 1406 | /* Restore the list of current labels. */ |
| 1407 | xtensa_clear_insn_labels (); |
| 1408 | insn_labels = saved_insn_labels; |
| 1409 | } |
| 1410 | break; |
| 1411 | |
| 1412 | case directive_freeregs: |
| 1413 | break; |
| 1414 | |
| 1415 | case directive_literal_prefix: |
| 1416 | /* Restore the default collection sections from saved state. */ |
| 1417 | s = (lit_state *) state; |
| 1418 | assert (s); |
| 1419 | |
| 1420 | if (use_literal_section) |
| 1421 | default_lit_sections = *s; |
| 1422 | |
| 1423 | /* free the state storage */ |
| 1424 | free (s); |
| 1425 | break; |
| 1426 | |
| 1427 | default: |
| 1428 | break; |
| 1429 | } |
| 1430 | } |
| 1431 | } |
| 1432 | |
| 1433 | demand_empty_rest_of_line (); |
| 1434 | } |
| 1435 | |
| 1436 | |
| 1437 | /* Place an aligned literal fragment at the current location. */ |
| 1438 | |
| 1439 | static void |
| 1440 | xtensa_literal_position (ignore) |
| 1441 | int ignore ATTRIBUTE_UNUSED; |
| 1442 | { |
| 1443 | if (inside_directive (directive_literal)) |
| 1444 | as_warn (_(".literal_position inside literal directive; ignoring")); |
| 1445 | else if (!use_literal_section) |
| 1446 | xtensa_mark_literal_pool_location (); |
| 1447 | |
| 1448 | demand_empty_rest_of_line (); |
| 1449 | xtensa_clear_insn_labels (); |
| 1450 | } |
| 1451 | |
| 1452 | |
| 1453 | /* Support .literal label, value@plt + offset. */ |
| 1454 | |
| 1455 | static void |
| 1456 | xtensa_literal_pseudo (ignored) |
| 1457 | int ignored ATTRIBUTE_UNUSED; |
| 1458 | { |
| 1459 | emit_state state; |
| 1460 | char *p, *base_name; |
| 1461 | char c; |
| 1462 | expressionS expP; |
| 1463 | segT dest_seg; |
| 1464 | |
| 1465 | if (inside_directive (directive_literal)) |
| 1466 | { |
| 1467 | as_bad (_(".literal not allowed inside .begin literal region")); |
| 1468 | ignore_rest_of_line (); |
| 1469 | return; |
| 1470 | } |
| 1471 | |
| 1472 | /* Previous labels go with whatever follows this directive, not with |
| 1473 | the literal, so save them now. */ |
| 1474 | saved_insn_labels = insn_labels; |
| 1475 | insn_labels = NULL; |
| 1476 | |
| 1477 | /* If we are using text-section literals, then this is the right value... */ |
| 1478 | dest_seg = now_seg; |
| 1479 | |
| 1480 | base_name = input_line_pointer; |
| 1481 | |
| 1482 | xtensa_switch_to_literal_fragment (&state); |
| 1483 | |
| 1484 | /* ...but if we aren't using text-section-literals, then we |
| 1485 | need to put them in the section we just switched to. */ |
| 1486 | if (use_literal_section) |
| 1487 | dest_seg = now_seg; |
| 1488 | |
| 1489 | /* All literals are aligned to four-byte boundaries |
| 1490 | which is handled by switch to literal fragment. */ |
| 1491 | /* frag_align (2, 0, 0); */ |
| 1492 | |
| 1493 | c = get_symbol_end (); |
| 1494 | /* Just after name is now '\0'. */ |
| 1495 | p = input_line_pointer; |
| 1496 | *p = c; |
| 1497 | SKIP_WHITESPACE (); |
| 1498 | |
| 1499 | if (*input_line_pointer != ',' && *input_line_pointer != ':') |
| 1500 | { |
| 1501 | as_bad (_("expected comma or colon after symbol name; " |
| 1502 | "rest of line ignored")); |
| 1503 | ignore_rest_of_line (); |
| 1504 | xtensa_restore_emit_state (&state); |
| 1505 | return; |
| 1506 | } |
| 1507 | *p = 0; |
| 1508 | |
| 1509 | colon (base_name); |
| 1510 | |
| 1511 | do |
| 1512 | { |
| 1513 | input_line_pointer++; /* skip ',' or ':' */ |
| 1514 | |
| 1515 | expr (0, &expP); |
| 1516 | |
| 1517 | /* We only support 4-byte literals with .literal. */ |
| 1518 | emit_expr (&expP, 4); |
| 1519 | } |
| 1520 | while (*input_line_pointer == ','); |
| 1521 | |
| 1522 | *p = c; |
| 1523 | |
| 1524 | demand_empty_rest_of_line (); |
| 1525 | |
| 1526 | xtensa_restore_emit_state (&state); |
| 1527 | |
| 1528 | /* Restore the list of current labels. */ |
| 1529 | xtensa_clear_insn_labels (); |
| 1530 | insn_labels = saved_insn_labels; |
| 1531 | } |
| 1532 | |
| 1533 | |
| 1534 | static void |
| 1535 | xtensa_literal_prefix (start, len) |
| 1536 | char const *start; |
| 1537 | int len; |
| 1538 | { |
| 1539 | segT s_now; /* Storage for the current seg and subseg. */ |
| 1540 | subsegT ss_now; |
| 1541 | char *name; /* Pointer to the name itself. */ |
| 1542 | char *newname; |
| 1543 | |
| 1544 | if (!use_literal_section) |
| 1545 | return; |
| 1546 | |
| 1547 | /* Store away the current section and subsection. */ |
| 1548 | s_now = now_seg; |
| 1549 | ss_now = now_subseg; |
| 1550 | |
| 1551 | /* Get a null-terminated copy of the name. */ |
| 1552 | name = xmalloc (len + 1); |
| 1553 | assert (name); |
| 1554 | |
| 1555 | strncpy (name, start, len); |
| 1556 | name[len] = 0; |
| 1557 | |
| 1558 | /* Allocate the sections (interesting note: the memory pointing to |
| 1559 | the name is actually used for the name by the new section). */ |
| 1560 | newname = xmalloc (len + strlen (".literal") + 1); |
| 1561 | strcpy (newname, name); |
| 1562 | strcpy (newname + len, ".literal"); |
| 1563 | |
| 1564 | /* Note that retrieve_literal_seg does not create a segment if |
| 1565 | it already exists. */ |
| 1566 | default_lit_sections.lit_seg = NULL; /* retrieved on demand */ |
| 1567 | |
| 1568 | /* Canonicalizing section names allows renaming literal |
| 1569 | sections to occur correctly. */ |
| 1570 | default_lit_sections.lit_seg_name = |
| 1571 | tc_canonicalize_symbol_name (newname); |
| 1572 | |
| 1573 | free (name); |
| 1574 | |
| 1575 | /* Restore the current section and subsection and set the |
| 1576 | generation into the old segment. */ |
| 1577 | subseg_set (s_now, ss_now); |
| 1578 | } |
| 1579 | |
| 1580 | \f |
| 1581 | /* Parsing and Idiom Translation. */ |
| 1582 | |
| 1583 | static const char * |
| 1584 | expression_end (name) |
| 1585 | const char *name; |
| 1586 | { |
| 1587 | while (1) |
| 1588 | { |
| 1589 | switch (*name) |
| 1590 | { |
| 1591 | case ';': |
| 1592 | case '\0': |
| 1593 | case ',': |
| 1594 | return name; |
| 1595 | case ' ': |
| 1596 | case '\t': |
| 1597 | ++name; |
| 1598 | continue; |
| 1599 | default: |
| 1600 | return 0; |
| 1601 | } |
| 1602 | } |
| 1603 | } |
| 1604 | |
| 1605 | |
| 1606 | #define ERROR_REG_NUM ((unsigned) -1) |
| 1607 | |
| 1608 | static unsigned |
| 1609 | tc_get_register (prefix) |
| 1610 | const char *prefix; |
| 1611 | { |
| 1612 | unsigned reg; |
| 1613 | const char *next_expr; |
| 1614 | const char *old_line_pointer; |
| 1615 | |
| 1616 | SKIP_WHITESPACE (); |
| 1617 | old_line_pointer = input_line_pointer; |
| 1618 | |
| 1619 | if (*input_line_pointer == '$') |
| 1620 | ++input_line_pointer; |
| 1621 | |
| 1622 | /* Accept "sp" as a synonym for "a1". */ |
| 1623 | if (input_line_pointer[0] == 's' && input_line_pointer[1] == 'p' |
| 1624 | && expression_end (input_line_pointer + 2)) |
| 1625 | { |
| 1626 | input_line_pointer += 2; |
| 1627 | return 1; /* AR[1] */ |
| 1628 | } |
| 1629 | |
| 1630 | while (*input_line_pointer++ == *prefix++) |
| 1631 | ; |
| 1632 | --input_line_pointer; |
| 1633 | --prefix; |
| 1634 | |
| 1635 | if (*prefix) |
| 1636 | { |
| 1637 | as_bad (_("bad register name: %s"), old_line_pointer); |
| 1638 | return ERROR_REG_NUM; |
| 1639 | } |
| 1640 | |
| 1641 | if (!ISDIGIT ((unsigned char) *input_line_pointer)) |
| 1642 | { |
| 1643 | as_bad (_("bad register number: %s"), input_line_pointer); |
| 1644 | return ERROR_REG_NUM; |
| 1645 | } |
| 1646 | |
| 1647 | reg = 0; |
| 1648 | |
| 1649 | while (ISDIGIT ((int) *input_line_pointer)) |
| 1650 | reg = reg * 10 + *input_line_pointer++ - '0'; |
| 1651 | |
| 1652 | if (!(next_expr = expression_end (input_line_pointer))) |
| 1653 | { |
| 1654 | as_bad (_("bad register name: %s"), old_line_pointer); |
| 1655 | return ERROR_REG_NUM; |
| 1656 | } |
| 1657 | |
| 1658 | input_line_pointer = (char *) next_expr; |
| 1659 | |
| 1660 | return reg; |
| 1661 | } |
| 1662 | |
| 1663 | |
| 1664 | #define PLT_SUFFIX "@PLT" |
| 1665 | #define plt_suffix "@plt" |
| 1666 | |
| 1667 | static void |
| 1668 | expression_maybe_register (opnd, tok) |
| 1669 | xtensa_operand opnd; |
| 1670 | expressionS *tok; |
| 1671 | { |
| 1672 | char *kind = xtensa_operand_kind (opnd); |
| 1673 | |
| 1674 | if ((strlen (kind) == 1) |
| 1675 | && (*kind == 'l' || *kind == 'L' || *kind == 'i' || *kind == 'r')) |
| 1676 | { |
| 1677 | segT t = expression (tok); |
| 1678 | if (t == absolute_section && operand_is_pcrel_label (opnd)) |
| 1679 | { |
| 1680 | assert (tok->X_op == O_constant); |
| 1681 | tok->X_op = O_symbol; |
| 1682 | tok->X_add_symbol = &abs_symbol; |
| 1683 | } |
| 1684 | if (tok->X_op == O_symbol |
| 1685 | && (!strncmp (input_line_pointer, PLT_SUFFIX, |
| 1686 | strlen (PLT_SUFFIX) - 1) |
| 1687 | || !strncmp (input_line_pointer, plt_suffix, |
| 1688 | strlen (plt_suffix) - 1))) |
| 1689 | { |
| 1690 | symbol_get_tc (tok->X_add_symbol)->plt = 1; |
| 1691 | input_line_pointer += strlen (plt_suffix); |
| 1692 | } |
| 1693 | } |
| 1694 | else |
| 1695 | { |
| 1696 | unsigned reg = tc_get_register (kind); |
| 1697 | |
| 1698 | if (reg != ERROR_REG_NUM) /* Already errored */ |
| 1699 | { |
| 1700 | uint32 buf = reg; |
| 1701 | if ((xtensa_operand_encode (opnd, &buf) != xtensa_encode_result_ok) |
| 1702 | || (reg != xtensa_operand_decode (opnd, buf))) |
| 1703 | as_bad (_("register number out of range")); |
| 1704 | } |
| 1705 | |
| 1706 | tok->X_op = O_register; |
| 1707 | tok->X_add_symbol = 0; |
| 1708 | tok->X_add_number = reg; |
| 1709 | } |
| 1710 | } |
| 1711 | |
| 1712 | |
| 1713 | /* Split up the arguments for an opcode or pseudo-op. */ |
| 1714 | |
| 1715 | static int |
| 1716 | tokenize_arguments (args, str) |
| 1717 | char **args; |
| 1718 | char *str; |
| 1719 | { |
| 1720 | char *old_input_line_pointer; |
| 1721 | bfd_boolean saw_comma = FALSE; |
| 1722 | bfd_boolean saw_arg = FALSE; |
| 1723 | int num_args = 0; |
| 1724 | char *arg_end, *arg; |
| 1725 | int arg_len; |
| 1726 | |
| 1727 | /* Save and restore input_line_pointer around this function. */ |
| 1728 | old_input_line_pointer = input_line_pointer; |
| 1729 | input_line_pointer = str; |
| 1730 | |
| 1731 | while (*input_line_pointer) |
| 1732 | { |
| 1733 | SKIP_WHITESPACE (); |
| 1734 | switch (*input_line_pointer) |
| 1735 | { |
| 1736 | case '\0': |
| 1737 | goto fini; |
| 1738 | |
| 1739 | case ',': |
| 1740 | input_line_pointer++; |
| 1741 | if (saw_comma || !saw_arg) |
| 1742 | goto err; |
| 1743 | saw_comma = TRUE; |
| 1744 | break; |
| 1745 | |
| 1746 | default: |
| 1747 | if (!saw_comma && saw_arg) |
| 1748 | goto err; |
| 1749 | |
| 1750 | arg_end = input_line_pointer + 1; |
| 1751 | while (!expression_end (arg_end)) |
| 1752 | arg_end += 1; |
| 1753 | |
| 1754 | arg_len = arg_end - input_line_pointer; |
| 1755 | arg = (char *) xmalloc (arg_len + 1); |
| 1756 | args[num_args] = arg; |
| 1757 | |
| 1758 | strncpy (arg, input_line_pointer, arg_len); |
| 1759 | arg[arg_len] = '\0'; |
| 1760 | |
| 1761 | input_line_pointer = arg_end; |
| 1762 | num_args += 1; |
| 1763 | saw_comma = FALSE; |
| 1764 | saw_arg = TRUE; |
| 1765 | break; |
| 1766 | } |
| 1767 | } |
| 1768 | |
| 1769 | fini: |
| 1770 | if (saw_comma) |
| 1771 | goto err; |
| 1772 | input_line_pointer = old_input_line_pointer; |
| 1773 | return num_args; |
| 1774 | |
| 1775 | err: |
| 1776 | input_line_pointer = old_input_line_pointer; |
| 1777 | return -1; |
| 1778 | } |
| 1779 | |
| 1780 | |
| 1781 | /* Parse the arguments to an opcode. Return true on error. */ |
| 1782 | |
| 1783 | static bfd_boolean |
| 1784 | parse_arguments (insn, num_args, arg_strings) |
| 1785 | TInsn *insn; |
| 1786 | int num_args; |
| 1787 | char **arg_strings; |
| 1788 | { |
| 1789 | expressionS *tok = insn->tok; |
| 1790 | xtensa_opcode opcode = insn->opcode; |
| 1791 | bfd_boolean had_error = TRUE; |
| 1792 | xtensa_isa isa = xtensa_default_isa; |
| 1793 | int n; |
| 1794 | int opcode_operand_count; |
| 1795 | int actual_operand_count = 0; |
| 1796 | xtensa_operand opnd = NULL; |
| 1797 | char *old_input_line_pointer; |
| 1798 | |
| 1799 | if (insn->insn_type == ITYPE_LITERAL) |
| 1800 | opcode_operand_count = 1; |
| 1801 | else |
| 1802 | opcode_operand_count = xtensa_num_operands (isa, opcode); |
| 1803 | |
| 1804 | memset (tok, 0, sizeof (*tok) * MAX_INSN_ARGS); |
| 1805 | |
| 1806 | /* Save and restore input_line_pointer around this function. */ |
| 1807 | old_input_line_pointer = input_line_pointer; |
| 1808 | |
| 1809 | for (n = 0; n < num_args; n++) |
| 1810 | { |
| 1811 | input_line_pointer = arg_strings[n]; |
| 1812 | |
| 1813 | if (actual_operand_count >= opcode_operand_count) |
| 1814 | { |
| 1815 | as_warn (_("too many arguments")); |
| 1816 | goto err; |
| 1817 | } |
| 1818 | assert (actual_operand_count < MAX_INSN_ARGS); |
| 1819 | |
| 1820 | opnd = xtensa_get_operand (isa, opcode, actual_operand_count); |
| 1821 | expression_maybe_register (opnd, tok); |
| 1822 | |
| 1823 | if (tok->X_op == O_illegal || tok->X_op == O_absent) |
| 1824 | goto err; |
| 1825 | actual_operand_count++; |
| 1826 | tok++; |
| 1827 | } |
| 1828 | |
| 1829 | insn->ntok = tok - insn->tok; |
| 1830 | had_error = FALSE; |
| 1831 | |
| 1832 | err: |
| 1833 | input_line_pointer = old_input_line_pointer; |
| 1834 | return had_error; |
| 1835 | } |
| 1836 | |
| 1837 | |
| 1838 | static void |
| 1839 | xg_reverse_shift_count (cnt_argp) |
| 1840 | char **cnt_argp; |
| 1841 | { |
| 1842 | char *cnt_arg, *new_arg; |
| 1843 | cnt_arg = *cnt_argp; |
| 1844 | |
| 1845 | /* replace the argument with "31-(argument)" */ |
| 1846 | new_arg = (char *) xmalloc (strlen (cnt_arg) + 6); |
| 1847 | sprintf (new_arg, "31-(%s)", cnt_arg); |
| 1848 | |
| 1849 | free (cnt_arg); |
| 1850 | *cnt_argp = new_arg; |
| 1851 | } |
| 1852 | |
| 1853 | |
| 1854 | /* If "arg" is a constant expression, return non-zero with the value |
| 1855 | in *valp. */ |
| 1856 | |
| 1857 | static int |
| 1858 | xg_arg_is_constant (arg, valp) |
| 1859 | char *arg; |
| 1860 | offsetT *valp; |
| 1861 | { |
| 1862 | expressionS exp; |
| 1863 | char *save_ptr = input_line_pointer; |
| 1864 | |
| 1865 | input_line_pointer = arg; |
| 1866 | expression (&exp); |
| 1867 | input_line_pointer = save_ptr; |
| 1868 | |
| 1869 | if (exp.X_op == O_constant) |
| 1870 | { |
| 1871 | *valp = exp.X_add_number; |
| 1872 | return 1; |
| 1873 | } |
| 1874 | |
| 1875 | return 0; |
| 1876 | } |
| 1877 | |
| 1878 | |
| 1879 | static void |
| 1880 | xg_replace_opname (popname, newop) |
| 1881 | char **popname; |
| 1882 | char *newop; |
| 1883 | { |
| 1884 | free (*popname); |
| 1885 | *popname = (char *) xmalloc (strlen (newop) + 1); |
| 1886 | strcpy (*popname, newop); |
| 1887 | } |
| 1888 | |
| 1889 | |
| 1890 | static int |
| 1891 | xg_check_num_args (pnum_args, expected_num, opname, arg_strings) |
| 1892 | int *pnum_args; |
| 1893 | int expected_num; |
| 1894 | char *opname; |
| 1895 | char **arg_strings; |
| 1896 | { |
| 1897 | int num_args = *pnum_args; |
| 1898 | |
| 1899 | if (num_args < expected_num) |
| 1900 | { |
| 1901 | as_bad (_("not enough operands (%d) for '%s'; expected %d"), |
| 1902 | num_args, opname, expected_num); |
| 1903 | return -1; |
| 1904 | } |
| 1905 | |
| 1906 | if (num_args > expected_num) |
| 1907 | { |
| 1908 | as_warn (_("too many operands (%d) for '%s'; expected %d"), |
| 1909 | num_args, opname, expected_num); |
| 1910 | while (num_args-- > expected_num) |
| 1911 | { |
| 1912 | free (arg_strings[num_args]); |
| 1913 | arg_strings[num_args] = 0; |
| 1914 | } |
| 1915 | *pnum_args = expected_num; |
| 1916 | return -1; |
| 1917 | } |
| 1918 | |
| 1919 | return 0; |
| 1920 | } |
| 1921 | |
| 1922 | |
| 1923 | static int |
| 1924 | xg_translate_sysreg_op (popname, pnum_args, arg_strings) |
| 1925 | char **popname; |
| 1926 | int *pnum_args; |
| 1927 | char **arg_strings; |
| 1928 | { |
| 1929 | char *opname, *new_opname; |
| 1930 | offsetT val; |
| 1931 | bfd_boolean has_underbar = FALSE; |
| 1932 | |
| 1933 | opname = *popname; |
| 1934 | if (*opname == '_') |
| 1935 | { |
| 1936 | has_underbar = TRUE; |
| 1937 | opname += 1; |
| 1938 | } |
| 1939 | |
| 1940 | /* Opname == [rw]ur... */ |
| 1941 | |
| 1942 | if (opname[3] == '\0') |
| 1943 | { |
| 1944 | /* If the register is not specified as part of the opcode, |
| 1945 | then get it from the operand and move it to the opcode. */ |
| 1946 | |
| 1947 | if (xg_check_num_args (pnum_args, 2, opname, arg_strings)) |
| 1948 | return -1; |
| 1949 | |
| 1950 | if (!xg_arg_is_constant (arg_strings[1], &val)) |
| 1951 | { |
| 1952 | as_bad (_("register number for `%s' is not a constant"), opname); |
| 1953 | return -1; |
| 1954 | } |
| 1955 | if ((unsigned) val > 255) |
| 1956 | { |
| 1957 | as_bad (_("register number (%ld) for `%s' is out of range"), |
| 1958 | val, opname); |
| 1959 | return -1; |
| 1960 | } |
| 1961 | |
| 1962 | /* Remove the last argument, which is now part of the opcode. */ |
| 1963 | free (arg_strings[1]); |
| 1964 | arg_strings[1] = 0; |
| 1965 | *pnum_args = 1; |
| 1966 | |
| 1967 | /* Translate the opcode. */ |
| 1968 | new_opname = (char *) xmalloc (8); |
| 1969 | sprintf (new_opname, "%s%cur%u", (has_underbar ? "_" : ""), |
| 1970 | opname[0], (unsigned) val); |
| 1971 | free (*popname); |
| 1972 | *popname = new_opname; |
| 1973 | } |
| 1974 | |
| 1975 | return 0; |
| 1976 | } |
| 1977 | |
| 1978 | |
| 1979 | /* If the instruction is an idiom (i.e., a built-in macro), translate it. |
| 1980 | Returns non-zero if an error was found. */ |
| 1981 | |
| 1982 | static int |
| 1983 | xg_translate_idioms (popname, pnum_args, arg_strings) |
| 1984 | char **popname; |
| 1985 | int *pnum_args; |
| 1986 | char **arg_strings; |
| 1987 | { |
| 1988 | char *opname = *popname; |
| 1989 | bfd_boolean has_underbar = FALSE; |
| 1990 | |
| 1991 | if (*opname == '_') |
| 1992 | { |
| 1993 | has_underbar = TRUE; |
| 1994 | opname += 1; |
| 1995 | } |
| 1996 | |
| 1997 | if (strcmp (opname, "mov") == 0) |
| 1998 | { |
| 1999 | if (!has_underbar && code_density_available ()) |
| 2000 | xg_replace_opname (popname, "mov.n"); |
| 2001 | else |
| 2002 | { |
| 2003 | if (xg_check_num_args (pnum_args, 2, opname, arg_strings)) |
| 2004 | return -1; |
| 2005 | xg_replace_opname (popname, (has_underbar ? "_or" : "or")); |
| 2006 | arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1); |
| 2007 | strcpy (arg_strings[2], arg_strings[1]); |
| 2008 | *pnum_args = 3; |
| 2009 | } |
| 2010 | return 0; |
| 2011 | } |
| 2012 | |
| 2013 | if (strcmp (opname, "bbsi.l") == 0) |
| 2014 | { |
| 2015 | if (xg_check_num_args (pnum_args, 3, opname, arg_strings)) |
| 2016 | return -1; |
| 2017 | xg_replace_opname (popname, (has_underbar ? "_bbsi" : "bbsi")); |
| 2018 | if (target_big_endian) |
| 2019 | xg_reverse_shift_count (&arg_strings[1]); |
| 2020 | return 0; |
| 2021 | } |
| 2022 | |
| 2023 | if (strcmp (opname, "bbci.l") == 0) |
| 2024 | { |
| 2025 | if (xg_check_num_args (pnum_args, 3, opname, arg_strings)) |
| 2026 | return -1; |
| 2027 | xg_replace_opname (popname, (has_underbar ? "_bbci" : "bbci")); |
| 2028 | if (target_big_endian) |
| 2029 | xg_reverse_shift_count (&arg_strings[1]); |
| 2030 | return 0; |
| 2031 | } |
| 2032 | |
| 2033 | if (strcmp (opname, "nop") == 0) |
| 2034 | { |
| 2035 | if (!has_underbar && code_density_available ()) |
| 2036 | xg_replace_opname (popname, "nop.n"); |
| 2037 | else |
| 2038 | { |
| 2039 | if (xg_check_num_args (pnum_args, 0, opname, arg_strings)) |
| 2040 | return -1; |
| 2041 | xg_replace_opname (popname, (has_underbar ? "_or" : "or")); |
| 2042 | arg_strings[0] = (char *) xmalloc (3); |
| 2043 | arg_strings[1] = (char *) xmalloc (3); |
| 2044 | arg_strings[2] = (char *) xmalloc (3); |
| 2045 | strcpy (arg_strings[0], "a1"); |
| 2046 | strcpy (arg_strings[1], "a1"); |
| 2047 | strcpy (arg_strings[2], "a1"); |
| 2048 | *pnum_args = 3; |
| 2049 | } |
| 2050 | return 0; |
| 2051 | } |
| 2052 | |
| 2053 | if ((opname[0] == 'r' || opname[0] == 'w') |
| 2054 | && opname[1] == 'u' |
| 2055 | && opname[2] == 'r') |
| 2056 | return xg_translate_sysreg_op (popname, pnum_args, arg_strings); |
| 2057 | |
| 2058 | |
| 2059 | /* WIDENING DENSITY OPCODES |
| 2060 | |
| 2061 | questionable relaxations (widening) from old "tai" idioms: |
| 2062 | |
| 2063 | ADD.N --> ADD |
| 2064 | BEQZ.N --> BEQZ |
| 2065 | RET.N --> RET |
| 2066 | RETW.N --> RETW |
| 2067 | MOVI.N --> MOVI |
| 2068 | MOV.N --> MOV |
| 2069 | NOP.N --> NOP |
| 2070 | |
| 2071 | Note: this incomplete list was imported to match the "tai" |
| 2072 | behavior; other density opcodes are not handled. |
| 2073 | |
| 2074 | The xtensa-relax code may know how to do these but it doesn't do |
| 2075 | anything when these density opcodes appear inside a no-density |
| 2076 | region. Somehow GAS should either print an error when that happens |
| 2077 | or do the widening. The old "tai" behavior was to do the widening. |
| 2078 | For now, I'll make it widen but print a warning. |
| 2079 | |
| 2080 | FIXME: GAS needs to detect density opcodes inside no-density |
| 2081 | regions and treat them as errors. This code should be removed |
| 2082 | when that is done. */ |
| 2083 | |
| 2084 | if (use_generics () |
| 2085 | && !has_underbar |
| 2086 | && density_supported |
| 2087 | && !code_density_available ()) |
| 2088 | { |
| 2089 | if (strcmp (opname, "add.n") == 0) |
| 2090 | xg_replace_opname (popname, "add"); |
| 2091 | |
| 2092 | else if (strcmp (opname, "beqz.n") == 0) |
| 2093 | xg_replace_opname (popname, "beqz"); |
| 2094 | |
| 2095 | else if (strcmp (opname, "ret.n") == 0) |
| 2096 | xg_replace_opname (popname, "ret"); |
| 2097 | |
| 2098 | else if (strcmp (opname, "retw.n") == 0) |
| 2099 | xg_replace_opname (popname, "retw"); |
| 2100 | |
| 2101 | else if (strcmp (opname, "movi.n") == 0) |
| 2102 | xg_replace_opname (popname, "movi"); |
| 2103 | |
| 2104 | else if (strcmp (opname, "mov.n") == 0) |
| 2105 | { |
| 2106 | if (xg_check_num_args (pnum_args, 2, opname, arg_strings)) |
| 2107 | return -1; |
| 2108 | xg_replace_opname (popname, "or"); |
| 2109 | arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1); |
| 2110 | strcpy (arg_strings[2], arg_strings[1]); |
| 2111 | *pnum_args = 3; |
| 2112 | } |
| 2113 | |
| 2114 | else if (strcmp (opname, "nop.n") == 0) |
| 2115 | { |
| 2116 | if (xg_check_num_args (pnum_args, 0, opname, arg_strings)) |
| 2117 | return -1; |
| 2118 | xg_replace_opname (popname, "or"); |
| 2119 | arg_strings[0] = (char *) xmalloc (3); |
| 2120 | arg_strings[1] = (char *) xmalloc (3); |
| 2121 | arg_strings[2] = (char *) xmalloc (3); |
| 2122 | strcpy (arg_strings[0], "a1"); |
| 2123 | strcpy (arg_strings[1], "a1"); |
| 2124 | strcpy (arg_strings[2], "a1"); |
| 2125 | *pnum_args = 3; |
| 2126 | } |
| 2127 | } |
| 2128 | |
| 2129 | return 0; |
| 2130 | } |
| 2131 | |
| 2132 | \f |
| 2133 | /* Functions for dealing with the Xtensa ISA. */ |
| 2134 | |
| 2135 | /* Return true if the given operand is an immed or target instruction, |
| 2136 | i.e., has a reloc associated with it. Currently, this is only true |
| 2137 | if the operand kind is "i, "l" or "L". */ |
| 2138 | |
| 2139 | static bfd_boolean |
| 2140 | operand_is_immed (opnd) |
| 2141 | xtensa_operand opnd; |
| 2142 | { |
| 2143 | const char *opkind = xtensa_operand_kind (opnd); |
| 2144 | if (opkind[0] == '\0' || opkind[1] != '\0') |
| 2145 | return FALSE; |
| 2146 | switch (opkind[0]) |
| 2147 | { |
| 2148 | case 'i': |
| 2149 | case 'l': |
| 2150 | case 'L': |
| 2151 | return TRUE; |
| 2152 | } |
| 2153 | return FALSE; |
| 2154 | } |
| 2155 | |
| 2156 | |
| 2157 | /* Return true if the given operand is a pc-relative label. This is |
| 2158 | true for "l", "L", and "r" operand kinds. */ |
| 2159 | |
| 2160 | bfd_boolean |
| 2161 | operand_is_pcrel_label (opnd) |
| 2162 | xtensa_operand opnd; |
| 2163 | { |
| 2164 | const char *opkind = xtensa_operand_kind (opnd); |
| 2165 | if (opkind[0] == '\0' || opkind[1] != '\0') |
| 2166 | return FALSE; |
| 2167 | switch (opkind[0]) |
| 2168 | { |
| 2169 | case 'r': |
| 2170 | case 'l': |
| 2171 | case 'L': |
| 2172 | return TRUE; |
| 2173 | } |
| 2174 | return FALSE; |
| 2175 | } |
| 2176 | |
| 2177 | |
| 2178 | /* Currently the assembler only allows us to use a single target per |
| 2179 | fragment. Because of this, only one operand for a given |
| 2180 | instruction may be symbolic. If there is an operand of kind "lrL", |
| 2181 | the last one is chosen. Otherwise, the result is the number of the |
| 2182 | last operand of type "i", and if there are none of those, we fail |
| 2183 | and return -1. */ |
| 2184 | |
| 2185 | int |
| 2186 | get_relaxable_immed (opcode) |
| 2187 | xtensa_opcode opcode; |
| 2188 | { |
| 2189 | int last_immed = -1; |
| 2190 | int noperands, opi; |
| 2191 | xtensa_operand operand; |
| 2192 | |
| 2193 | if (opcode == XTENSA_UNDEFINED) |
| 2194 | return -1; |
| 2195 | |
| 2196 | noperands = xtensa_num_operands (xtensa_default_isa, opcode); |
| 2197 | for (opi = noperands - 1; opi >= 0; opi--) |
| 2198 | { |
| 2199 | operand = xtensa_get_operand (xtensa_default_isa, opcode, opi); |
| 2200 | if (operand_is_pcrel_label (operand)) |
| 2201 | return opi; |
| 2202 | if (last_immed == -1 && operand_is_immed (operand)) |
| 2203 | last_immed = opi; |
| 2204 | } |
| 2205 | return last_immed; |
| 2206 | } |
| 2207 | |
| 2208 | |
| 2209 | xtensa_opcode |
| 2210 | get_opcode_from_buf (buf) |
| 2211 | const char *buf; |
| 2212 | { |
| 2213 | static xtensa_insnbuf insnbuf = NULL; |
| 2214 | xtensa_opcode opcode; |
| 2215 | xtensa_isa isa = xtensa_default_isa; |
| 2216 | if (!insnbuf) |
| 2217 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 2218 | |
| 2219 | xtensa_insnbuf_from_chars (isa, insnbuf, buf); |
| 2220 | opcode = xtensa_decode_insn (isa, insnbuf); |
| 2221 | return opcode; |
| 2222 | } |
| 2223 | |
| 2224 | |
| 2225 | static bfd_boolean |
| 2226 | is_direct_call_opcode (opcode) |
| 2227 | xtensa_opcode opcode; |
| 2228 | { |
| 2229 | if (opcode == XTENSA_UNDEFINED) |
| 2230 | return FALSE; |
| 2231 | |
| 2232 | return (opcode == xtensa_call0_opcode |
| 2233 | || opcode == xtensa_call4_opcode |
| 2234 | || opcode == xtensa_call8_opcode |
| 2235 | || opcode == xtensa_call12_opcode); |
| 2236 | } |
| 2237 | |
| 2238 | |
| 2239 | static bfd_boolean |
| 2240 | is_call_opcode (opcode) |
| 2241 | xtensa_opcode opcode; |
| 2242 | { |
| 2243 | if (is_direct_call_opcode (opcode)) |
| 2244 | return TRUE; |
| 2245 | |
| 2246 | if (opcode == XTENSA_UNDEFINED) |
| 2247 | return FALSE; |
| 2248 | |
| 2249 | return (opcode == xtensa_callx0_opcode |
| 2250 | || opcode == xtensa_callx4_opcode |
| 2251 | || opcode == xtensa_callx8_opcode |
| 2252 | || opcode == xtensa_callx12_opcode); |
| 2253 | } |
| 2254 | |
| 2255 | |
| 2256 | /* Return true if the opcode is an entry opcode. This is used because |
| 2257 | "entry" adds an implicit ".align 4" and also the entry instruction |
| 2258 | has an extra check for an operand value. */ |
| 2259 | |
| 2260 | static bfd_boolean |
| 2261 | is_entry_opcode (opcode) |
| 2262 | xtensa_opcode opcode; |
| 2263 | { |
| 2264 | if (opcode == XTENSA_UNDEFINED) |
| 2265 | return FALSE; |
| 2266 | |
| 2267 | return (opcode == xtensa_entry_opcode); |
| 2268 | } |
| 2269 | |
| 2270 | |
| 2271 | /* Return true if it is one of the loop opcodes. Loops are special |
| 2272 | because they need automatic alignment and they have a relaxation so |
| 2273 | complex that we hard-coded it. */ |
| 2274 | |
| 2275 | static bfd_boolean |
| 2276 | is_loop_opcode (opcode) |
| 2277 | xtensa_opcode opcode; |
| 2278 | { |
| 2279 | if (opcode == XTENSA_UNDEFINED) |
| 2280 | return FALSE; |
| 2281 | |
| 2282 | return (opcode == xtensa_loop_opcode |
| 2283 | || opcode == xtensa_loopnez_opcode |
| 2284 | || opcode == xtensa_loopgtz_opcode); |
| 2285 | } |
| 2286 | |
| 2287 | |
| 2288 | static bfd_boolean |
| 2289 | is_the_loop_opcode (opcode) |
| 2290 | xtensa_opcode opcode; |
| 2291 | { |
| 2292 | if (opcode == XTENSA_UNDEFINED) |
| 2293 | return FALSE; |
| 2294 | |
| 2295 | return (opcode == xtensa_loop_opcode); |
| 2296 | } |
| 2297 | |
| 2298 | |
| 2299 | static bfd_boolean |
| 2300 | is_jx_opcode (opcode) |
| 2301 | xtensa_opcode opcode; |
| 2302 | { |
| 2303 | if (opcode == XTENSA_UNDEFINED) |
| 2304 | return FALSE; |
| 2305 | |
| 2306 | return (opcode == xtensa_jx_opcode); |
| 2307 | } |
| 2308 | |
| 2309 | |
| 2310 | /* Return true if the opcode is a retw or retw.n. |
| 2311 | Needed to add nops to avoid a hardware interlock issue. */ |
| 2312 | |
| 2313 | static bfd_boolean |
| 2314 | is_windowed_return_opcode (opcode) |
| 2315 | xtensa_opcode opcode; |
| 2316 | { |
| 2317 | if (opcode == XTENSA_UNDEFINED) |
| 2318 | return FALSE; |
| 2319 | |
| 2320 | return (opcode == xtensa_retw_opcode || opcode == xtensa_retw_n_opcode); |
| 2321 | } |
| 2322 | |
| 2323 | |
| 2324 | /* Return true if the opcode type is "l" and the opcode is NOT a jump. */ |
| 2325 | |
| 2326 | static bfd_boolean |
| 2327 | is_conditional_branch_opcode (opcode) |
| 2328 | xtensa_opcode opcode; |
| 2329 | { |
| 2330 | xtensa_isa isa = xtensa_default_isa; |
| 2331 | int num_ops, i; |
| 2332 | |
| 2333 | if (opcode == xtensa_j_opcode && opcode != XTENSA_UNDEFINED) |
| 2334 | return FALSE; |
| 2335 | |
| 2336 | num_ops = xtensa_num_operands (isa, opcode); |
| 2337 | for (i = 0; i < num_ops; i++) |
| 2338 | { |
| 2339 | xtensa_operand operand = xtensa_get_operand (isa, opcode, i); |
| 2340 | if (strcmp (xtensa_operand_kind (operand), "l") == 0) |
| 2341 | return TRUE; |
| 2342 | } |
| 2343 | return FALSE; |
| 2344 | } |
| 2345 | |
| 2346 | |
| 2347 | /* Return true if the given opcode is a conditional branch |
| 2348 | instruction, i.e., currently this is true if the instruction |
| 2349 | is a jx or has an operand with 'l' type and is not a loop. */ |
| 2350 | |
| 2351 | bfd_boolean |
| 2352 | is_branch_or_jump_opcode (opcode) |
| 2353 | xtensa_opcode opcode; |
| 2354 | { |
| 2355 | int opn, op_count; |
| 2356 | |
| 2357 | if (opcode == XTENSA_UNDEFINED) |
| 2358 | return FALSE; |
| 2359 | |
| 2360 | if (is_loop_opcode (opcode)) |
| 2361 | return FALSE; |
| 2362 | |
| 2363 | if (is_jx_opcode (opcode)) |
| 2364 | return TRUE; |
| 2365 | |
| 2366 | op_count = xtensa_num_operands (xtensa_default_isa, opcode); |
| 2367 | for (opn = 0; opn < op_count; opn++) |
| 2368 | { |
| 2369 | xtensa_operand opnd = |
| 2370 | xtensa_get_operand (xtensa_default_isa, opcode, opn); |
| 2371 | const char *opkind = xtensa_operand_kind (opnd); |
| 2372 | if (opkind && opkind[0] == 'l' && opkind[1] == '\0') |
| 2373 | return TRUE; |
| 2374 | } |
| 2375 | return FALSE; |
| 2376 | } |
| 2377 | |
| 2378 | |
| 2379 | /* Convert from operand numbers to BFD relocation type code. |
| 2380 | Return BFD_RELOC_NONE on failure. */ |
| 2381 | |
| 2382 | bfd_reloc_code_real_type |
| 2383 | opnum_to_reloc (opnum) |
| 2384 | int opnum; |
| 2385 | { |
| 2386 | switch (opnum) |
| 2387 | { |
| 2388 | case 0: |
| 2389 | return BFD_RELOC_XTENSA_OP0; |
| 2390 | case 1: |
| 2391 | return BFD_RELOC_XTENSA_OP1; |
| 2392 | case 2: |
| 2393 | return BFD_RELOC_XTENSA_OP2; |
| 2394 | default: |
| 2395 | break; |
| 2396 | } |
| 2397 | return BFD_RELOC_NONE; |
| 2398 | } |
| 2399 | |
| 2400 | |
| 2401 | /* Convert from BFD relocation type code to operand number. |
| 2402 | Return -1 on failure. */ |
| 2403 | |
| 2404 | int |
| 2405 | reloc_to_opnum (reloc) |
| 2406 | bfd_reloc_code_real_type reloc; |
| 2407 | { |
| 2408 | switch (reloc) |
| 2409 | { |
| 2410 | case BFD_RELOC_XTENSA_OP0: |
| 2411 | return 0; |
| 2412 | case BFD_RELOC_XTENSA_OP1: |
| 2413 | return 1; |
| 2414 | case BFD_RELOC_XTENSA_OP2: |
| 2415 | return 2; |
| 2416 | default: |
| 2417 | break; |
| 2418 | } |
| 2419 | return -1; |
| 2420 | } |
| 2421 | |
| 2422 | |
| 2423 | static void |
| 2424 | xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line) |
| 2425 | xtensa_insnbuf insnbuf; |
| 2426 | xtensa_opcode opcode; |
| 2427 | xtensa_operand operand; |
| 2428 | int32 value; |
| 2429 | const char *file; |
| 2430 | unsigned int line; |
| 2431 | { |
| 2432 | xtensa_encode_result encode_result; |
| 2433 | uint32 valbuf = value; |
| 2434 | |
| 2435 | encode_result = xtensa_operand_encode (operand, &valbuf); |
| 2436 | |
| 2437 | switch (encode_result) |
| 2438 | { |
| 2439 | case xtensa_encode_result_ok: |
| 2440 | break; |
| 2441 | case xtensa_encode_result_align: |
| 2442 | as_bad_where ((char *) file, line, |
| 2443 | _("operand %d not properly aligned for '%s'"), |
| 2444 | value, xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 2445 | break; |
| 2446 | case xtensa_encode_result_not_in_table: |
| 2447 | as_bad_where ((char *) file, line, |
| 2448 | _("operand %d not in immediate table for '%s'"), |
| 2449 | value, xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 2450 | break; |
| 2451 | case xtensa_encode_result_too_high: |
| 2452 | as_bad_where ((char *) file, line, |
| 2453 | _("operand %d too large for '%s'"), value, |
| 2454 | xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 2455 | break; |
| 2456 | case xtensa_encode_result_too_low: |
| 2457 | as_bad_where ((char *) file, line, |
| 2458 | _("operand %d too small for '%s'"), value, |
| 2459 | xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 2460 | break; |
| 2461 | case xtensa_encode_result_not_ok: |
| 2462 | as_bad_where ((char *) file, line, |
| 2463 | _("operand %d is invalid for '%s'"), value, |
| 2464 | xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 2465 | break; |
| 2466 | default: |
| 2467 | abort (); |
| 2468 | } |
| 2469 | |
| 2470 | xtensa_operand_set_field (operand, insnbuf, valbuf); |
| 2471 | } |
| 2472 | |
| 2473 | |
| 2474 | static uint32 |
| 2475 | xtensa_insnbuf_get_operand (insnbuf, opcode, opnum) |
| 2476 | xtensa_insnbuf insnbuf; |
| 2477 | xtensa_opcode opcode; |
| 2478 | int opnum; |
| 2479 | { |
| 2480 | xtensa_operand op = xtensa_get_operand (xtensa_default_isa, opcode, opnum); |
| 2481 | return xtensa_operand_decode (op, xtensa_operand_get_field (op, insnbuf)); |
| 2482 | } |
| 2483 | |
| 2484 | |
| 2485 | static void |
| 2486 | xtensa_insnbuf_set_immediate_field (opcode, insnbuf, value, file, line) |
| 2487 | xtensa_opcode opcode; |
| 2488 | xtensa_insnbuf insnbuf; |
| 2489 | int32 value; |
| 2490 | const char *file; |
| 2491 | unsigned int line; |
| 2492 | { |
| 2493 | xtensa_isa isa = xtensa_default_isa; |
| 2494 | int last_opnd = xtensa_num_operands (isa, opcode) - 1; |
| 2495 | xtensa_operand operand = xtensa_get_operand (isa, opcode, last_opnd); |
| 2496 | xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line); |
| 2497 | } |
| 2498 | |
| 2499 | |
| 2500 | static bfd_boolean |
| 2501 | is_negatable_branch (insn) |
| 2502 | TInsn *insn; |
| 2503 | { |
| 2504 | xtensa_isa isa = xtensa_default_isa; |
| 2505 | int i; |
| 2506 | int num_ops = xtensa_num_operands (isa, insn->opcode); |
| 2507 | |
| 2508 | for (i = 0; i < num_ops; i++) |
| 2509 | { |
| 2510 | xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i); |
| 2511 | char *kind = xtensa_operand_kind (opnd); |
| 2512 | if (strlen (kind) == 1 && *kind == 'l') |
| 2513 | return TRUE; |
| 2514 | } |
| 2515 | return FALSE; |
| 2516 | } |
| 2517 | |
| 2518 | \f |
| 2519 | /* Various Other Internal Functions. */ |
| 2520 | |
| 2521 | static bfd_boolean |
| 2522 | is_unique_insn_expansion (r) |
| 2523 | TransitionRule *r; |
| 2524 | { |
| 2525 | if (!r->to_instr || r->to_instr->next != NULL) |
| 2526 | return FALSE; |
| 2527 | if (r->to_instr->typ != INSTR_INSTR) |
| 2528 | return FALSE; |
| 2529 | return TRUE; |
| 2530 | } |
| 2531 | |
| 2532 | |
| 2533 | static int |
| 2534 | xg_get_insn_size (insn) |
| 2535 | TInsn *insn; |
| 2536 | { |
| 2537 | assert (insn->insn_type == ITYPE_INSN); |
| 2538 | return xtensa_insn_length (xtensa_default_isa, insn->opcode); |
| 2539 | } |
| 2540 | |
| 2541 | |
| 2542 | static int |
| 2543 | xg_get_build_instr_size (insn) |
| 2544 | BuildInstr *insn; |
| 2545 | { |
| 2546 | assert (insn->typ == INSTR_INSTR); |
| 2547 | return xtensa_insn_length (xtensa_default_isa, insn->opcode); |
| 2548 | } |
| 2549 | |
| 2550 | |
| 2551 | bfd_boolean |
| 2552 | xg_is_narrow_insn (insn) |
| 2553 | TInsn *insn; |
| 2554 | { |
| 2555 | TransitionTable *table = xg_build_widen_table (); |
| 2556 | TransitionList *l; |
| 2557 | int num_match = 0; |
| 2558 | assert (insn->insn_type == ITYPE_INSN); |
| 2559 | assert (insn->opcode < table->num_opcodes); |
| 2560 | |
| 2561 | for (l = table->table[insn->opcode]; l != NULL; l = l->next) |
| 2562 | { |
| 2563 | TransitionRule *rule = l->rule; |
| 2564 | |
| 2565 | if (xg_instruction_matches_rule (insn, rule) |
| 2566 | && is_unique_insn_expansion (rule)) |
| 2567 | { |
| 2568 | /* It only generates one instruction... */ |
| 2569 | assert (insn->insn_type == ITYPE_INSN); |
| 2570 | /* ...and it is a larger instruction. */ |
| 2571 | if (xg_get_insn_size (insn) |
| 2572 | < xg_get_build_instr_size (rule->to_instr)) |
| 2573 | { |
| 2574 | num_match++; |
| 2575 | if (num_match > 1) |
| 2576 | return FALSE; |
| 2577 | } |
| 2578 | } |
| 2579 | } |
| 2580 | return (num_match == 1); |
| 2581 | } |
| 2582 | |
| 2583 | |
| 2584 | bfd_boolean |
| 2585 | xg_is_single_relaxable_insn (insn) |
| 2586 | TInsn *insn; |
| 2587 | { |
| 2588 | TransitionTable *table = xg_build_widen_table (); |
| 2589 | TransitionList *l; |
| 2590 | int num_match = 0; |
| 2591 | assert (insn->insn_type == ITYPE_INSN); |
| 2592 | assert (insn->opcode < table->num_opcodes); |
| 2593 | |
| 2594 | for (l = table->table[insn->opcode]; l != NULL; l = l->next) |
| 2595 | { |
| 2596 | TransitionRule *rule = l->rule; |
| 2597 | |
| 2598 | if (xg_instruction_matches_rule (insn, rule) |
| 2599 | && is_unique_insn_expansion (rule)) |
| 2600 | { |
| 2601 | assert (insn->insn_type == ITYPE_INSN); |
| 2602 | /* ... and it is a larger instruction. */ |
| 2603 | if (xg_get_insn_size (insn) |
| 2604 | <= xg_get_build_instr_size (rule->to_instr)) |
| 2605 | { |
| 2606 | num_match++; |
| 2607 | if (num_match > 1) |
| 2608 | return FALSE; |
| 2609 | } |
| 2610 | } |
| 2611 | } |
| 2612 | return (num_match == 1); |
| 2613 | } |
| 2614 | |
| 2615 | |
| 2616 | /* Return the largest size instruction that this instruction can |
| 2617 | expand to. Currently, in all cases, this is 3 bytes. Of course we |
| 2618 | could just calculate this once and generate a table. */ |
| 2619 | |
| 2620 | int |
| 2621 | xg_get_max_narrow_insn_size (opcode) |
| 2622 | xtensa_opcode opcode; |
| 2623 | { |
| 2624 | /* Go ahead and compute it, but it better be 3. */ |
| 2625 | TransitionTable *table = xg_build_widen_table (); |
| 2626 | TransitionList *l; |
| 2627 | int old_size = xtensa_insn_length (xtensa_default_isa, opcode); |
| 2628 | assert (opcode < table->num_opcodes); |
| 2629 | |
| 2630 | /* Actually we can do better. Check to see of Only one applies. */ |
| 2631 | for (l = table->table[opcode]; l != NULL; l = l->next) |
| 2632 | { |
| 2633 | TransitionRule *rule = l->rule; |
| 2634 | |
| 2635 | /* If it only generates one instruction. */ |
| 2636 | if (is_unique_insn_expansion (rule)) |
| 2637 | { |
| 2638 | int new_size = xtensa_insn_length (xtensa_default_isa, |
| 2639 | rule->to_instr->opcode); |
| 2640 | if (new_size > old_size) |
| 2641 | { |
| 2642 | assert (new_size == 3); |
| 2643 | return 3; |
| 2644 | } |
| 2645 | } |
| 2646 | } |
| 2647 | return old_size; |
| 2648 | } |
| 2649 | |
| 2650 | |
| 2651 | /* Return the maximum number of bytes this opcode can expand to. */ |
| 2652 | |
| 2653 | int |
| 2654 | xg_get_max_insn_widen_size (opcode) |
| 2655 | xtensa_opcode opcode; |
| 2656 | { |
| 2657 | TransitionTable *table = xg_build_widen_table (); |
| 2658 | TransitionList *l; |
| 2659 | int max_size = xtensa_insn_length (xtensa_default_isa, opcode); |
| 2660 | |
| 2661 | assert (opcode < table->num_opcodes); |
| 2662 | |
| 2663 | for (l = table->table[opcode]; l != NULL; l = l->next) |
| 2664 | { |
| 2665 | TransitionRule *rule = l->rule; |
| 2666 | BuildInstr *build_list; |
| 2667 | int this_size = 0; |
| 2668 | |
| 2669 | if (!rule) |
| 2670 | continue; |
| 2671 | build_list = rule->to_instr; |
| 2672 | if (is_unique_insn_expansion (rule)) |
| 2673 | { |
| 2674 | assert (build_list->typ == INSTR_INSTR); |
| 2675 | this_size = xg_get_max_insn_widen_size (build_list->opcode); |
| 2676 | } |
| 2677 | else |
| 2678 | for (; build_list != NULL; build_list = build_list->next) |
| 2679 | { |
| 2680 | switch (build_list->typ) |
| 2681 | { |
| 2682 | case INSTR_INSTR: |
| 2683 | this_size += xtensa_insn_length (xtensa_default_isa, |
| 2684 | build_list->opcode); |
| 2685 | |
| 2686 | break; |
| 2687 | case INSTR_LITERAL_DEF: |
| 2688 | case INSTR_LABEL_DEF: |
| 2689 | default: |
| 2690 | break; |
| 2691 | } |
| 2692 | } |
| 2693 | if (this_size > max_size) |
| 2694 | max_size = this_size; |
| 2695 | } |
| 2696 | return max_size; |
| 2697 | } |
| 2698 | |
| 2699 | |
| 2700 | /* Return the maximum number of literal bytes this opcode can generate. */ |
| 2701 | |
| 2702 | int |
| 2703 | xg_get_max_insn_widen_literal_size (opcode) |
| 2704 | xtensa_opcode opcode; |
| 2705 | { |
| 2706 | TransitionTable *table = xg_build_widen_table (); |
| 2707 | TransitionList *l; |
| 2708 | int max_size = 0; |
| 2709 | |
| 2710 | assert (opcode < table->num_opcodes); |
| 2711 | |
| 2712 | for (l = table->table[opcode]; l != NULL; l = l->next) |
| 2713 | { |
| 2714 | TransitionRule *rule = l->rule; |
| 2715 | BuildInstr *build_list; |
| 2716 | int this_size = 0; |
| 2717 | |
| 2718 | if (!rule) |
| 2719 | continue; |
| 2720 | build_list = rule->to_instr; |
| 2721 | if (is_unique_insn_expansion (rule)) |
| 2722 | { |
| 2723 | assert (build_list->typ == INSTR_INSTR); |
| 2724 | this_size = xg_get_max_insn_widen_literal_size (build_list->opcode); |
| 2725 | } |
| 2726 | else |
| 2727 | for (; build_list != NULL; build_list = build_list->next) |
| 2728 | { |
| 2729 | switch (build_list->typ) |
| 2730 | { |
| 2731 | case INSTR_LITERAL_DEF: |
| 2732 | /* hard coded 4-byte literal. */ |
| 2733 | this_size += 4; |
| 2734 | break; |
| 2735 | case INSTR_INSTR: |
| 2736 | case INSTR_LABEL_DEF: |
| 2737 | default: |
| 2738 | break; |
| 2739 | } |
| 2740 | } |
| 2741 | if (this_size > max_size) |
| 2742 | max_size = this_size; |
| 2743 | } |
| 2744 | return max_size; |
| 2745 | } |
| 2746 | |
| 2747 | |
| 2748 | bfd_boolean |
| 2749 | xg_is_relaxable_insn (insn, lateral_steps) |
| 2750 | TInsn *insn; |
| 2751 | int lateral_steps; |
| 2752 | { |
| 2753 | int steps_taken = 0; |
| 2754 | TransitionTable *table = xg_build_widen_table (); |
| 2755 | TransitionList *l; |
| 2756 | |
| 2757 | assert (insn->insn_type == ITYPE_INSN); |
| 2758 | assert (insn->opcode < table->num_opcodes); |
| 2759 | |
| 2760 | for (l = table->table[insn->opcode]; l != NULL; l = l->next) |
| 2761 | { |
| 2762 | TransitionRule *rule = l->rule; |
| 2763 | |
| 2764 | if (xg_instruction_matches_rule (insn, rule)) |
| 2765 | { |
| 2766 | if (steps_taken == lateral_steps) |
| 2767 | return TRUE; |
| 2768 | steps_taken++; |
| 2769 | } |
| 2770 | } |
| 2771 | return FALSE; |
| 2772 | } |
| 2773 | |
| 2774 | |
| 2775 | static symbolS * |
| 2776 | get_special_literal_symbol () |
| 2777 | { |
| 2778 | static symbolS *sym = NULL; |
| 2779 | |
| 2780 | if (sym == NULL) |
| 2781 | sym = symbol_find_or_make ("SPECIAL_LITERAL0\001"); |
| 2782 | return sym; |
| 2783 | } |
| 2784 | |
| 2785 | |
| 2786 | static symbolS * |
| 2787 | get_special_label_symbol () |
| 2788 | { |
| 2789 | static symbolS *sym = NULL; |
| 2790 | |
| 2791 | if (sym == NULL) |
| 2792 | sym = symbol_find_or_make ("SPECIAL_LABEL0\001"); |
| 2793 | return sym; |
| 2794 | } |
| 2795 | |
| 2796 | |
| 2797 | /* Return true on success. */ |
| 2798 | |
| 2799 | bfd_boolean |
| 2800 | xg_build_to_insn (targ, insn, bi) |
| 2801 | TInsn *targ; |
| 2802 | TInsn *insn; |
| 2803 | BuildInstr *bi; |
| 2804 | { |
| 2805 | BuildOp *op; |
| 2806 | symbolS *sym; |
| 2807 | |
| 2808 | memset (targ, 0, sizeof (TInsn)); |
| 2809 | switch (bi->typ) |
| 2810 | { |
| 2811 | case INSTR_INSTR: |
| 2812 | op = bi->ops; |
| 2813 | targ->opcode = bi->opcode; |
| 2814 | targ->insn_type = ITYPE_INSN; |
| 2815 | targ->is_specific_opcode = FALSE; |
| 2816 | |
| 2817 | for (; op != NULL; op = op->next) |
| 2818 | { |
| 2819 | int op_num = op->op_num; |
| 2820 | int op_data = op->op_data; |
| 2821 | |
| 2822 | assert (op->op_num < MAX_INSN_ARGS); |
| 2823 | |
| 2824 | if (targ->ntok <= op_num) |
| 2825 | targ->ntok = op_num + 1; |
| 2826 | |
| 2827 | switch (op->typ) |
| 2828 | { |
| 2829 | case OP_CONSTANT: |
| 2830 | set_expr_const (&targ->tok[op_num], op_data); |
| 2831 | break; |
| 2832 | case OP_OPERAND: |
| 2833 | assert (op_data < insn->ntok); |
| 2834 | copy_expr (&targ->tok[op_num], &insn->tok[op_data]); |
| 2835 | break; |
| 2836 | case OP_LITERAL: |
| 2837 | sym = get_special_literal_symbol (); |
| 2838 | set_expr_symbol_offset (&targ->tok[op_num], sym, 0); |
| 2839 | break; |
| 2840 | case OP_LABEL: |
| 2841 | sym = get_special_label_symbol (); |
| 2842 | set_expr_symbol_offset (&targ->tok[op_num], sym, 0); |
| 2843 | break; |
| 2844 | default: |
| 2845 | /* currently handles: |
| 2846 | OP_OPERAND_LOW8 |
| 2847 | OP_OPERAND_HI24S |
| 2848 | OP_OPERAND_F32MINUS */ |
| 2849 | if (xg_has_userdef_op_fn (op->typ)) |
| 2850 | { |
| 2851 | assert (op_data < insn->ntok); |
| 2852 | if (expr_is_const (&insn->tok[op_data])) |
| 2853 | { |
| 2854 | long val; |
| 2855 | copy_expr (&targ->tok[op_num], &insn->tok[op_data]); |
| 2856 | val = xg_apply_userdef_op_fn (op->typ, |
| 2857 | targ->tok[op_num]. |
| 2858 | X_add_number); |
| 2859 | targ->tok[op_num].X_add_number = val; |
| 2860 | } |
| 2861 | else |
| 2862 | return FALSE; /* We cannot use a relocation for this. */ |
| 2863 | break; |
| 2864 | } |
| 2865 | assert (0); |
| 2866 | break; |
| 2867 | } |
| 2868 | } |
| 2869 | break; |
| 2870 | |
| 2871 | case INSTR_LITERAL_DEF: |
| 2872 | op = bi->ops; |
| 2873 | targ->opcode = XTENSA_UNDEFINED; |
| 2874 | targ->insn_type = ITYPE_LITERAL; |
| 2875 | targ->is_specific_opcode = FALSE; |
| 2876 | for (; op != NULL; op = op->next) |
| 2877 | { |
| 2878 | int op_num = op->op_num; |
| 2879 | int op_data = op->op_data; |
| 2880 | assert (op->op_num < MAX_INSN_ARGS); |
| 2881 | |
| 2882 | if (targ->ntok <= op_num) |
| 2883 | targ->ntok = op_num + 1; |
| 2884 | |
| 2885 | switch (op->typ) |
| 2886 | { |
| 2887 | case OP_OPERAND: |
| 2888 | assert (op_data < insn->ntok); |
| 2889 | copy_expr (&targ->tok[op_num], &insn->tok[op_data]); |
| 2890 | break; |
| 2891 | case OP_LITERAL: |
| 2892 | case OP_CONSTANT: |
| 2893 | case OP_LABEL: |
| 2894 | default: |
| 2895 | assert (0); |
| 2896 | break; |
| 2897 | } |
| 2898 | } |
| 2899 | break; |
| 2900 | |
| 2901 | case INSTR_LABEL_DEF: |
| 2902 | op = bi->ops; |
| 2903 | targ->opcode = XTENSA_UNDEFINED; |
| 2904 | targ->insn_type = ITYPE_LABEL; |
| 2905 | targ->is_specific_opcode = FALSE; |
| 2906 | /* Literal with no ops. is a label? */ |
| 2907 | assert (op == NULL); |
| 2908 | break; |
| 2909 | |
| 2910 | default: |
| 2911 | assert (0); |
| 2912 | } |
| 2913 | |
| 2914 | return TRUE; |
| 2915 | } |
| 2916 | |
| 2917 | |
| 2918 | /* Return true on success. */ |
| 2919 | |
| 2920 | bfd_boolean |
| 2921 | xg_build_to_stack (istack, insn, bi) |
| 2922 | IStack *istack; |
| 2923 | TInsn *insn; |
| 2924 | BuildInstr *bi; |
| 2925 | { |
| 2926 | for (; bi != NULL; bi = bi->next) |
| 2927 | { |
| 2928 | TInsn *next_insn = istack_push_space (istack); |
| 2929 | |
| 2930 | if (!xg_build_to_insn (next_insn, insn, bi)) |
| 2931 | return FALSE; |
| 2932 | } |
| 2933 | return TRUE; |
| 2934 | } |
| 2935 | |
| 2936 | |
| 2937 | /* Return true on valid expansion. */ |
| 2938 | |
| 2939 | bfd_boolean |
| 2940 | xg_expand_to_stack (istack, insn, lateral_steps) |
| 2941 | IStack *istack; |
| 2942 | TInsn *insn; |
| 2943 | int lateral_steps; |
| 2944 | { |
| 2945 | int stack_size = istack->ninsn; |
| 2946 | int steps_taken = 0; |
| 2947 | TransitionTable *table = xg_build_widen_table (); |
| 2948 | TransitionList *l; |
| 2949 | |
| 2950 | assert (insn->insn_type == ITYPE_INSN); |
| 2951 | assert (insn->opcode < table->num_opcodes); |
| 2952 | |
| 2953 | for (l = table->table[insn->opcode]; l != NULL; l = l->next) |
| 2954 | { |
| 2955 | TransitionRule *rule = l->rule; |
| 2956 | |
| 2957 | if (xg_instruction_matches_rule (insn, rule)) |
| 2958 | { |
| 2959 | if (lateral_steps == steps_taken) |
| 2960 | { |
| 2961 | int i; |
| 2962 | |
| 2963 | /* This is it. Expand the rule to the stack. */ |
| 2964 | if (!xg_build_to_stack (istack, insn, rule->to_instr)) |
| 2965 | return FALSE; |
| 2966 | |
| 2967 | /* Check to see if it fits. */ |
| 2968 | for (i = stack_size; i < istack->ninsn; i++) |
| 2969 | { |
| 2970 | TInsn *insn = &istack->insn[i]; |
| 2971 | |
| 2972 | if (insn->insn_type == ITYPE_INSN |
| 2973 | && !tinsn_has_symbolic_operands (insn) |
| 2974 | && !xg_immeds_fit (insn)) |
| 2975 | { |
| 2976 | istack->ninsn = stack_size; |
| 2977 | return FALSE; |
| 2978 | } |
| 2979 | } |
| 2980 | return TRUE; |
| 2981 | } |
| 2982 | steps_taken++; |
| 2983 | } |
| 2984 | } |
| 2985 | return FALSE; |
| 2986 | } |
| 2987 | |
| 2988 | |
| 2989 | bfd_boolean |
| 2990 | xg_expand_narrow (targ, insn) |
| 2991 | TInsn *targ; |
| 2992 | TInsn *insn; |
| 2993 | { |
| 2994 | TransitionTable *table = xg_build_widen_table (); |
| 2995 | TransitionList *l; |
| 2996 | |
| 2997 | assert (insn->insn_type == ITYPE_INSN); |
| 2998 | assert (insn->opcode < table->num_opcodes); |
| 2999 | |
| 3000 | for (l = table->table[insn->opcode]; l != NULL; l = l->next) |
| 3001 | { |
| 3002 | TransitionRule *rule = l->rule; |
| 3003 | if (xg_instruction_matches_rule (insn, rule) |
| 3004 | && is_unique_insn_expansion (rule)) |
| 3005 | { |
| 3006 | /* Is it a larger instruction? */ |
| 3007 | if (xg_get_insn_size (insn) |
| 3008 | <= xg_get_build_instr_size (rule->to_instr)) |
| 3009 | { |
| 3010 | xg_build_to_insn (targ, insn, rule->to_instr); |
| 3011 | return FALSE; |
| 3012 | } |
| 3013 | } |
| 3014 | } |
| 3015 | return TRUE; |
| 3016 | } |
| 3017 | |
| 3018 | |
| 3019 | /* Assumes: All immeds are constants. Check that all constants fit |
| 3020 | into their immeds; return false if not. */ |
| 3021 | |
| 3022 | static bfd_boolean |
| 3023 | xg_immeds_fit (insn) |
| 3024 | const TInsn *insn; |
| 3025 | { |
| 3026 | int i; |
| 3027 | |
| 3028 | int n = insn->ntok; |
| 3029 | assert (insn->insn_type == ITYPE_INSN); |
| 3030 | for (i = 0; i < n; ++i) |
| 3031 | { |
| 3032 | const expressionS *expr = &insn->tok[i]; |
| 3033 | xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa, |
| 3034 | insn->opcode, i); |
| 3035 | if (!operand_is_immed (opnd)) |
| 3036 | continue; |
| 3037 | |
| 3038 | switch (expr->X_op) |
| 3039 | { |
| 3040 | case O_register: |
| 3041 | case O_constant: |
| 3042 | { |
| 3043 | if (xg_check_operand (expr->X_add_number, opnd)) |
| 3044 | return FALSE; |
| 3045 | } |
| 3046 | break; |
| 3047 | default: |
| 3048 | /* The symbol should have a fixup associated with it. */ |
| 3049 | assert (FALSE); |
| 3050 | break; |
| 3051 | } |
| 3052 | } |
| 3053 | return TRUE; |
| 3054 | } |
| 3055 | |
| 3056 | |
| 3057 | /* This should only be called after we have an initial |
| 3058 | estimate of the addresses. */ |
| 3059 | |
| 3060 | static bfd_boolean |
| 3061 | xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch) |
| 3062 | const TInsn *insn; |
| 3063 | segT pc_seg; |
| 3064 | fragS *pc_frag; |
| 3065 | offsetT pc_offset; |
| 3066 | long stretch; |
| 3067 | { |
| 3068 | symbolS *symbolP; |
| 3069 | offsetT target, pc, new_offset; |
| 3070 | int i; |
| 3071 | int n = insn->ntok; |
| 3072 | |
| 3073 | assert (insn->insn_type == ITYPE_INSN); |
| 3074 | |
| 3075 | for (i = 0; i < n; ++i) |
| 3076 | { |
| 3077 | const expressionS *expr = &insn->tok[i]; |
| 3078 | xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa, |
| 3079 | insn->opcode, i); |
| 3080 | if (!operand_is_immed (opnd)) |
| 3081 | continue; |
| 3082 | |
| 3083 | switch (expr->X_op) |
| 3084 | { |
| 3085 | case O_register: |
| 3086 | case O_constant: |
| 3087 | if (xg_check_operand (expr->X_add_number, opnd)) |
| 3088 | return FALSE; |
| 3089 | break; |
| 3090 | |
| 3091 | case O_symbol: |
| 3092 | /* We only allow symbols for pc-relative stuff. |
| 3093 | If pc_frag == 0, then we don't have frag locations yet. */ |
| 3094 | if (pc_frag == 0) |
| 3095 | return FALSE; |
| 3096 | |
| 3097 | /* If it is PC-relative and the symbol is in the same segment as |
| 3098 | the PC.... */ |
| 3099 | if (!xtensa_operand_isPCRelative (opnd) |
| 3100 | || S_GET_SEGMENT (expr->X_add_symbol) != pc_seg) |
| 3101 | return FALSE; |
| 3102 | |
| 3103 | symbolP = expr->X_add_symbol; |
| 3104 | target = S_GET_VALUE (symbolP) + expr->X_add_number; |
| 3105 | pc = pc_frag->fr_address + pc_offset; |
| 3106 | |
| 3107 | /* If frag has yet to be reached on this pass, assume it |
| 3108 | will move by STRETCH just as we did. If this is not so, |
| 3109 | it will be because some frag between grows, and that will |
| 3110 | force another pass. Beware zero-length frags. There |
| 3111 | should be a faster way to do this. */ |
| 3112 | |
| 3113 | if (stretch && is_dnrange (pc_frag, symbolP, stretch)) |
| 3114 | target += stretch; |
| 3115 | |
| 3116 | new_offset = xtensa_operand_do_reloc (opnd, target, pc); |
| 3117 | if (xg_check_operand (new_offset, opnd)) |
| 3118 | return FALSE; |
| 3119 | break; |
| 3120 | |
| 3121 | default: |
| 3122 | /* The symbol should have a fixup associated with it. */ |
| 3123 | return FALSE; |
| 3124 | } |
| 3125 | } |
| 3126 | |
| 3127 | return TRUE; |
| 3128 | } |
| 3129 | |
| 3130 | |
| 3131 | /* This will check to see if the value can be converted into the |
| 3132 | operand type. It will return true if it does not fit. */ |
| 3133 | |
| 3134 | static bfd_boolean |
| 3135 | xg_check_operand (value, operand) |
| 3136 | int32 value; |
| 3137 | xtensa_operand operand; |
| 3138 | { |
| 3139 | uint32 valbuf = value; |
| 3140 | return (xtensa_operand_encode (operand, &valbuf) != xtensa_encode_result_ok); |
| 3141 | } |
| 3142 | |
| 3143 | |
| 3144 | /* Check if a symbol is pointing to somewhere after |
| 3145 | the start frag, given that the segment has stretched |
| 3146 | by stretch during relaxation. |
| 3147 | |
| 3148 | This is more complicated than it might appear at first blush |
| 3149 | because of the stretching that goes on. Here is how the check |
| 3150 | works: |
| 3151 | |
| 3152 | If the symbol and the frag are in the same segment, then |
| 3153 | the symbol could be down range. Note that this function |
| 3154 | assumes that start_frag is in now_seg. |
| 3155 | |
| 3156 | If the symbol is pointing to a frag with an address greater than |
| 3157 | than the start_frag's address, then it _could_ be down range. |
| 3158 | |
| 3159 | The problem comes because target_frag may or may not have had |
| 3160 | stretch bytes added to its address already, depending on if it is |
| 3161 | before or after start frag. (And if we knew that, then we wouldn't |
| 3162 | need this function.) start_frag has definitely already had stretch |
| 3163 | bytes added to its address. |
| 3164 | |
| 3165 | If target_frag's address hasn't been adjusted yet, then to |
| 3166 | determine if it comes after start_frag, we need to subtract |
| 3167 | stretch from start_frag's address. |
| 3168 | |
| 3169 | If target_frag's address has been adjusted, then it might have |
| 3170 | been adjusted such that it comes after start_frag's address minus |
| 3171 | stretch bytes. |
| 3172 | |
| 3173 | So, in that case, we scan for it down stream to within |
| 3174 | stretch bytes. We could search to the end of the fr_chain, but |
| 3175 | that ends up taking too much time (over a minute on some gnu |
| 3176 | tests). */ |
| 3177 | |
| 3178 | int |
| 3179 | is_dnrange (start_frag, sym, stretch) |
| 3180 | fragS *start_frag; |
| 3181 | symbolS *sym; |
| 3182 | long stretch; |
| 3183 | { |
| 3184 | if (S_GET_SEGMENT (sym) == now_seg) |
| 3185 | { |
| 3186 | fragS *cur_frag = symbol_get_frag (sym); |
| 3187 | |
| 3188 | if (cur_frag->fr_address >= start_frag->fr_address - stretch) |
| 3189 | { |
| 3190 | int distance = stretch; |
| 3191 | |
| 3192 | while (cur_frag && distance >= 0) |
| 3193 | { |
| 3194 | distance -= cur_frag->fr_fix; |
| 3195 | if (cur_frag == start_frag) |
| 3196 | return 0; |
| 3197 | cur_frag = cur_frag->fr_next; |
| 3198 | } |
| 3199 | return 1; |
| 3200 | } |
| 3201 | } |
| 3202 | return 0; |
| 3203 | } |
| 3204 | |
| 3205 | \f |
| 3206 | /* Relax the assembly instruction at least "min_steps". |
| 3207 | Return the number of steps taken. */ |
| 3208 | |
| 3209 | int |
| 3210 | xg_assembly_relax (istack, insn, pc_seg, pc_frag, pc_offset, min_steps, |
| 3211 | stretch) |
| 3212 | IStack *istack; |
| 3213 | TInsn *insn; |
| 3214 | segT pc_seg; |
| 3215 | fragS *pc_frag; /* If pc_frag == 0, then no pc-relative. */ |
| 3216 | offsetT pc_offset; /* Offset in fragment. */ |
| 3217 | int min_steps; /* Minimum number of conversion steps. */ |
| 3218 | long stretch; /* Number of bytes stretched so far. */ |
| 3219 | { |
| 3220 | int steps_taken = 0; |
| 3221 | |
| 3222 | /* assert (has no symbolic operands) |
| 3223 | Some of its immeds don't fit. |
| 3224 | Try to build a relaxed version. |
| 3225 | This may go through a couple of stages |
| 3226 | of single instruction transformations before |
| 3227 | we get there. */ |
| 3228 | |
| 3229 | TInsn single_target; |
| 3230 | TInsn current_insn; |
| 3231 | int lateral_steps = 0; |
| 3232 | int istack_size = istack->ninsn; |
| 3233 | |
| 3234 | if (xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch) |
| 3235 | && steps_taken >= min_steps) |
| 3236 | { |
| 3237 | istack_push (istack, insn); |
| 3238 | return steps_taken; |
| 3239 | } |
| 3240 | tinsn_copy (¤t_insn, insn); |
| 3241 | |
| 3242 | /* Walk through all of the single instruction expansions. */ |
| 3243 | while (xg_is_single_relaxable_insn (¤t_insn)) |
| 3244 | { |
| 3245 | int error_val = xg_expand_narrow (&single_target, ¤t_insn); |
| 3246 | |
| 3247 | assert (!error_val); |
| 3248 | |
| 3249 | if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset, |
| 3250 | stretch)) |
| 3251 | { |
| 3252 | steps_taken++; |
| 3253 | if (steps_taken >= min_steps) |
| 3254 | { |
| 3255 | istack_push (istack, &single_target); |
| 3256 | return steps_taken; |
| 3257 | } |
| 3258 | } |
| 3259 | tinsn_copy (¤t_insn, &single_target); |
| 3260 | } |
| 3261 | |
| 3262 | /* Now check for a multi-instruction expansion. */ |
| 3263 | while (xg_is_relaxable_insn (¤t_insn, lateral_steps)) |
| 3264 | { |
| 3265 | if (xg_symbolic_immeds_fit (¤t_insn, pc_seg, pc_frag, pc_offset, |
| 3266 | stretch)) |
| 3267 | { |
| 3268 | if (steps_taken >= min_steps) |
| 3269 | { |
| 3270 | istack_push (istack, ¤t_insn); |
| 3271 | return steps_taken; |
| 3272 | } |
| 3273 | } |
| 3274 | steps_taken++; |
| 3275 | if (xg_expand_to_stack (istack, ¤t_insn, lateral_steps)) |
| 3276 | { |
| 3277 | if (steps_taken >= min_steps) |
| 3278 | return steps_taken; |
| 3279 | } |
| 3280 | lateral_steps++; |
| 3281 | istack->ninsn = istack_size; |
| 3282 | } |
| 3283 | |
| 3284 | /* It's not going to work -- use the original. */ |
| 3285 | istack_push (istack, insn); |
| 3286 | return steps_taken; |
| 3287 | } |
| 3288 | |
| 3289 | |
| 3290 | static void |
| 3291 | xg_force_frag_space (size) |
| 3292 | int size; |
| 3293 | { |
| 3294 | /* This may have the side effect of creating a new fragment for the |
| 3295 | space to go into. I just do not like the name of the "frag" |
| 3296 | functions. */ |
| 3297 | frag_grow (size); |
| 3298 | } |
| 3299 | |
| 3300 | |
| 3301 | void |
| 3302 | xg_finish_frag (last_insn, state, max_growth, is_insn) |
| 3303 | char *last_insn; |
| 3304 | enum xtensa_relax_statesE state; |
| 3305 | int max_growth; |
| 3306 | bfd_boolean is_insn; |
| 3307 | { |
| 3308 | /* Finish off this fragment so that it has at LEAST the desired |
| 3309 | max_growth. If it doesn't fit in this fragment, close this one |
| 3310 | and start a new one. In either case, return a pointer to the |
| 3311 | beginning of the growth area. */ |
| 3312 | |
| 3313 | fragS *old_frag; |
| 3314 | xg_force_frag_space (max_growth); |
| 3315 | |
| 3316 | old_frag = frag_now; |
| 3317 | |
| 3318 | frag_now->fr_opcode = last_insn; |
| 3319 | if (is_insn) |
| 3320 | frag_now->tc_frag_data.is_insn = TRUE; |
| 3321 | |
| 3322 | frag_var (rs_machine_dependent, max_growth, max_growth, |
| 3323 | state, frag_now->fr_symbol, frag_now->fr_offset, last_insn); |
| 3324 | |
| 3325 | /* Just to make sure that we did not split it up. */ |
| 3326 | assert (old_frag->fr_next == frag_now); |
| 3327 | } |
| 3328 | |
| 3329 | |
| 3330 | static bfd_boolean |
| 3331 | is_branch_jmp_to_next (insn, fragP) |
| 3332 | TInsn *insn; |
| 3333 | fragS *fragP; |
| 3334 | { |
| 3335 | xtensa_isa isa = xtensa_default_isa; |
| 3336 | int i; |
| 3337 | int num_ops = xtensa_num_operands (isa, insn->opcode); |
| 3338 | int target_op = -1; |
| 3339 | symbolS *sym; |
| 3340 | fragS *target_frag; |
| 3341 | |
| 3342 | if (is_loop_opcode (insn->opcode)) |
| 3343 | return FALSE; |
| 3344 | |
| 3345 | for (i = 0; i < num_ops; i++) |
| 3346 | { |
| 3347 | xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i); |
| 3348 | char *kind = xtensa_operand_kind (opnd); |
| 3349 | if (strlen (kind) == 1 && *kind == 'l') |
| 3350 | { |
| 3351 | target_op = i; |
| 3352 | break; |
| 3353 | } |
| 3354 | } |
| 3355 | if (target_op == -1) |
| 3356 | return FALSE; |
| 3357 | |
| 3358 | if (insn->ntok <= target_op) |
| 3359 | return FALSE; |
| 3360 | |
| 3361 | if (insn->tok[target_op].X_op != O_symbol) |
| 3362 | return FALSE; |
| 3363 | |
| 3364 | sym = insn->tok[target_op].X_add_symbol; |
| 3365 | if (sym == NULL) |
| 3366 | return FALSE; |
| 3367 | |
| 3368 | if (insn->tok[target_op].X_add_number != 0) |
| 3369 | return FALSE; |
| 3370 | |
| 3371 | target_frag = symbol_get_frag (sym); |
| 3372 | if (target_frag == NULL) |
| 3373 | return FALSE; |
| 3374 | |
| 3375 | if (is_next_frag_target (fragP->fr_next, target_frag) |
| 3376 | && S_GET_VALUE (sym) == target_frag->fr_address) |
| 3377 | return TRUE; |
| 3378 | |
| 3379 | return FALSE; |
| 3380 | } |
| 3381 | |
| 3382 | |
| 3383 | static void |
| 3384 | xg_add_branch_and_loop_targets (insn) |
| 3385 | TInsn *insn; |
| 3386 | { |
| 3387 | xtensa_isa isa = xtensa_default_isa; |
| 3388 | int num_ops = xtensa_num_operands (isa, insn->opcode); |
| 3389 | |
| 3390 | if (is_loop_opcode (insn->opcode)) |
| 3391 | { |
| 3392 | int i = 1; |
| 3393 | xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i); |
| 3394 | char *kind = xtensa_operand_kind (opnd); |
| 3395 | if (strlen (kind) == 1 && *kind == 'l') |
| 3396 | if (insn->tok[i].X_op == O_symbol) |
| 3397 | symbol_get_tc (insn->tok[i].X_add_symbol)->is_loop_target = TRUE; |
| 3398 | return; |
| 3399 | } |
| 3400 | |
| 3401 | /* Currently, we do not add branch targets. This is an optimization |
| 3402 | for later that tries to align only branch targets, not just any |
| 3403 | label in a text section. */ |
| 3404 | |
| 3405 | if (align_only_targets) |
| 3406 | { |
| 3407 | int i; |
| 3408 | |
| 3409 | for (i = 0; i < insn->ntok && i < num_ops; i++) |
| 3410 | { |
| 3411 | xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i); |
| 3412 | char *kind = xtensa_operand_kind (opnd); |
| 3413 | if (strlen (kind) == 1 && *kind == 'l' |
| 3414 | && insn->tok[i].X_op == O_symbol) |
| 3415 | { |
| 3416 | symbolS *sym = insn->tok[i].X_add_symbol; |
| 3417 | symbol_get_tc (sym)->is_branch_target = TRUE; |
| 3418 | if (S_IS_DEFINED (sym)) |
| 3419 | symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE; |
| 3420 | } |
| 3421 | } |
| 3422 | } |
| 3423 | } |
| 3424 | |
| 3425 | |
| 3426 | /* Return the transition rule that matches or NULL if none matches. */ |
| 3427 | |
| 3428 | bfd_boolean |
| 3429 | xg_instruction_matches_rule (insn, rule) |
| 3430 | TInsn *insn; |
| 3431 | TransitionRule *rule; |
| 3432 | { |
| 3433 | PreconditionList *condition_l; |
| 3434 | |
| 3435 | if (rule->opcode != insn->opcode) |
| 3436 | return FALSE; |
| 3437 | |
| 3438 | for (condition_l = rule->conditions; |
| 3439 | condition_l != NULL; |
| 3440 | condition_l = condition_l->next) |
| 3441 | { |
| 3442 | expressionS *exp1; |
| 3443 | expressionS *exp2; |
| 3444 | Precondition *cond = condition_l->precond; |
| 3445 | |
| 3446 | switch (cond->typ) |
| 3447 | { |
| 3448 | case OP_CONSTANT: |
| 3449 | /* The expression must be the constant. */ |
| 3450 | assert (cond->op_num < insn->ntok); |
| 3451 | exp1 = &insn->tok[cond->op_num]; |
| 3452 | if (!expr_is_const (exp1)) |
| 3453 | return FALSE; |
| 3454 | switch (cond->cmp) |
| 3455 | { |
| 3456 | case OP_EQUAL: |
| 3457 | if (get_expr_const (exp1) != cond->op_data) |
| 3458 | return FALSE; |
| 3459 | break; |
| 3460 | case OP_NOTEQUAL: |
| 3461 | if (get_expr_const (exp1) == cond->op_data) |
| 3462 | return FALSE; |
| 3463 | break; |
| 3464 | } |
| 3465 | break; |
| 3466 | |
| 3467 | case OP_OPERAND: |
| 3468 | assert (cond->op_num < insn->ntok); |
| 3469 | assert (cond->op_data < insn->ntok); |
| 3470 | exp1 = &insn->tok[cond->op_num]; |
| 3471 | exp2 = &insn->tok[cond->op_data]; |
| 3472 | |
| 3473 | switch (cond->cmp) |
| 3474 | { |
| 3475 | case OP_EQUAL: |
| 3476 | if (!expr_is_equal (exp1, exp2)) |
| 3477 | return FALSE; |
| 3478 | break; |
| 3479 | case OP_NOTEQUAL: |
| 3480 | if (expr_is_equal (exp1, exp2)) |
| 3481 | return FALSE; |
| 3482 | break; |
| 3483 | } |
| 3484 | break; |
| 3485 | |
| 3486 | case OP_LITERAL: |
| 3487 | case OP_LABEL: |
| 3488 | default: |
| 3489 | return FALSE; |
| 3490 | } |
| 3491 | } |
| 3492 | return TRUE; |
| 3493 | } |
| 3494 | |
| 3495 | |
| 3496 | TransitionRule * |
| 3497 | xg_instruction_match (insn) |
| 3498 | TInsn *insn; |
| 3499 | { |
| 3500 | TransitionTable *table = xg_build_simplify_table (); |
| 3501 | TransitionList *l; |
| 3502 | assert (insn->opcode < table->num_opcodes); |
| 3503 | |
| 3504 | /* Walk through all of the possible transitions. */ |
| 3505 | for (l = table->table[insn->opcode]; l != NULL; l = l->next) |
| 3506 | { |
| 3507 | TransitionRule *rule = l->rule; |
| 3508 | if (xg_instruction_matches_rule (insn, rule)) |
| 3509 | return rule; |
| 3510 | } |
| 3511 | return NULL; |
| 3512 | } |
| 3513 | |
| 3514 | |
| 3515 | /* Return false if no error. */ |
| 3516 | |
| 3517 | bfd_boolean |
| 3518 | xg_build_token_insn (instr_spec, old_insn, new_insn) |
| 3519 | BuildInstr *instr_spec; |
| 3520 | TInsn *old_insn; |
| 3521 | TInsn *new_insn; |
| 3522 | { |
| 3523 | int num_ops = 0; |
| 3524 | BuildOp *b_op; |
| 3525 | |
| 3526 | switch (instr_spec->typ) |
| 3527 | { |
| 3528 | case INSTR_INSTR: |
| 3529 | new_insn->insn_type = ITYPE_INSN; |
| 3530 | new_insn->opcode = instr_spec->opcode; |
| 3531 | new_insn->is_specific_opcode = FALSE; |
| 3532 | break; |
| 3533 | case INSTR_LITERAL_DEF: |
| 3534 | new_insn->insn_type = ITYPE_LITERAL; |
| 3535 | new_insn->opcode = XTENSA_UNDEFINED; |
| 3536 | new_insn->is_specific_opcode = FALSE; |
| 3537 | break; |
| 3538 | case INSTR_LABEL_DEF: |
| 3539 | as_bad (_("INSTR_LABEL_DEF not supported yet")); |
| 3540 | break; |
| 3541 | } |
| 3542 | |
| 3543 | for (b_op = instr_spec->ops; b_op != NULL; b_op = b_op->next) |
| 3544 | { |
| 3545 | expressionS *exp; |
| 3546 | const expressionS *src_exp; |
| 3547 | |
| 3548 | num_ops++; |
| 3549 | switch (b_op->typ) |
| 3550 | { |
| 3551 | case OP_CONSTANT: |
| 3552 | /* The expression must be the constant. */ |
| 3553 | assert (b_op->op_num < MAX_INSN_ARGS); |
| 3554 | exp = &new_insn->tok[b_op->op_num]; |
| 3555 | set_expr_const (exp, b_op->op_data); |
| 3556 | break; |
| 3557 | |
| 3558 | case OP_OPERAND: |
| 3559 | assert (b_op->op_num < MAX_INSN_ARGS); |
| 3560 | assert (b_op->op_data < (unsigned) old_insn->ntok); |
| 3561 | src_exp = &old_insn->tok[b_op->op_data]; |
| 3562 | exp = &new_insn->tok[b_op->op_num]; |
| 3563 | copy_expr (exp, src_exp); |
| 3564 | break; |
| 3565 | |
| 3566 | case OP_LITERAL: |
| 3567 | case OP_LABEL: |
| 3568 | as_bad (_("can't handle generation of literal/labels yet")); |
| 3569 | assert (0); |
| 3570 | |
| 3571 | default: |
| 3572 | as_bad (_("can't handle undefined OP TYPE")); |
| 3573 | assert (0); |
| 3574 | } |
| 3575 | } |
| 3576 | |
| 3577 | new_insn->ntok = num_ops; |
| 3578 | return FALSE; |
| 3579 | } |
| 3580 | |
| 3581 | |
| 3582 | /* Return true if it was simplified. */ |
| 3583 | |
| 3584 | bfd_boolean |
| 3585 | xg_simplify_insn (old_insn, new_insn) |
| 3586 | TInsn *old_insn; |
| 3587 | TInsn *new_insn; |
| 3588 | { |
| 3589 | TransitionRule *rule = xg_instruction_match (old_insn); |
| 3590 | BuildInstr *insn_spec; |
| 3591 | if (rule == NULL) |
| 3592 | return FALSE; |
| 3593 | |
| 3594 | insn_spec = rule->to_instr; |
| 3595 | /* There should only be one. */ |
| 3596 | assert (insn_spec != NULL); |
| 3597 | assert (insn_spec->next == NULL); |
| 3598 | if (insn_spec->next != NULL) |
| 3599 | return FALSE; |
| 3600 | |
| 3601 | xg_build_token_insn (insn_spec, old_insn, new_insn); |
| 3602 | |
| 3603 | return TRUE; |
| 3604 | } |
| 3605 | |
| 3606 | |
| 3607 | /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i -> |
| 3608 | l32i.n. (2) Check the number of operands. (3) Place the instruction |
| 3609 | tokens into the stack or if we can relax it at assembly time, place |
| 3610 | multiple instructions/literals onto the stack. Return false if no |
| 3611 | error. */ |
| 3612 | |
| 3613 | static bfd_boolean |
| 3614 | xg_expand_assembly_insn (istack, orig_insn) |
| 3615 | IStack *istack; |
| 3616 | TInsn *orig_insn; |
| 3617 | { |
| 3618 | int noperands; |
| 3619 | TInsn new_insn; |
| 3620 | memset (&new_insn, 0, sizeof (TInsn)); |
| 3621 | |
| 3622 | /* On return, we will be using the "use_tokens" with "use_ntok". |
| 3623 | This will reduce things like addi to addi.n. */ |
| 3624 | if (code_density_available () && !orig_insn->is_specific_opcode) |
| 3625 | { |
| 3626 | if (xg_simplify_insn (orig_insn, &new_insn)) |
| 3627 | orig_insn = &new_insn; |
| 3628 | } |
| 3629 | |
| 3630 | noperands = xtensa_num_operands (xtensa_default_isa, orig_insn->opcode); |
| 3631 | if (orig_insn->ntok < noperands) |
| 3632 | { |
| 3633 | as_bad (_("found %d operands for '%s': Expected %d"), |
| 3634 | orig_insn->ntok, |
| 3635 | xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode), |
| 3636 | noperands); |
| 3637 | return TRUE; |
| 3638 | } |
| 3639 | if (orig_insn->ntok > noperands) |
| 3640 | as_warn (_("found too many (%d) operands for '%s': Expected %d"), |
| 3641 | orig_insn->ntok, |
| 3642 | xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode), |
| 3643 | noperands); |
| 3644 | |
| 3645 | /* If there are not enough operands, we will assert above. If there |
| 3646 | are too many, just cut out the extras here. */ |
| 3647 | |
| 3648 | orig_insn->ntok = noperands; |
| 3649 | |
| 3650 | /* Cases: |
| 3651 | |
| 3652 | Instructions with all constant immeds: |
| 3653 | Assemble them and relax the instruction if possible. |
| 3654 | Give error if not possible; no fixup needed. |
| 3655 | |
| 3656 | Instructions with symbolic immeds: |
| 3657 | Assemble them with a Fix up (that may cause instruction expansion). |
| 3658 | Also close out the fragment if the fixup may cause instruction expansion. |
| 3659 | |
| 3660 | There are some other special cases where we need alignment. |
| 3661 | 1) before certain instructions with required alignment (OPCODE_ALIGN) |
| 3662 | 2) before labels that have jumps (LABEL_ALIGN) |
| 3663 | 3) after call instructions (RETURN_ALIGN) |
| 3664 | Multiple of these may be possible on the same fragment. |
| 3665 | If so, make sure to satisfy the required alignment. |
| 3666 | Then try to get the desired alignment. */ |
| 3667 | |
| 3668 | if (tinsn_has_invalid_symbolic_operands (orig_insn)) |
| 3669 | return TRUE; |
| 3670 | |
| 3671 | if (orig_insn->is_specific_opcode || !can_relax ()) |
| 3672 | { |
| 3673 | istack_push (istack, orig_insn); |
| 3674 | return FALSE; |
| 3675 | } |
| 3676 | |
| 3677 | if (tinsn_has_symbolic_operands (orig_insn)) |
| 3678 | { |
| 3679 | if (tinsn_has_complex_operands (orig_insn)) |
| 3680 | xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0); |
| 3681 | else |
| 3682 | istack_push (istack, orig_insn); |
| 3683 | } |
| 3684 | else |
| 3685 | { |
| 3686 | if (xg_immeds_fit (orig_insn)) |
| 3687 | istack_push (istack, orig_insn); |
| 3688 | else |
| 3689 | xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0); |
| 3690 | } |
| 3691 | |
| 3692 | #if 0 |
| 3693 | for (i = 0; i < istack->ninsn; i++) |
| 3694 | { |
| 3695 | if (xg_simplify_insn (&new_insn, &istack->insn[i])) |
| 3696 | istack->insn[i] = new_insn; |
| 3697 | } |
| 3698 | #endif |
| 3699 | |
| 3700 | return FALSE; |
| 3701 | } |
| 3702 | |
| 3703 | |
| 3704 | /* Currently all literals that are generated here are 32-bit L32R targets. */ |
| 3705 | |
| 3706 | symbolS * |
| 3707 | xg_assemble_literal (insn) |
| 3708 | /* const */ TInsn *insn; |
| 3709 | { |
| 3710 | emit_state state; |
| 3711 | symbolS *lit_sym = NULL; |
| 3712 | |
| 3713 | /* size = 4 for L32R. It could easily be larger when we move to |
| 3714 | larger constants. Add a parameter later. */ |
| 3715 | offsetT litsize = 4; |
| 3716 | offsetT litalign = 2; /* 2^2 = 4 */ |
| 3717 | expressionS saved_loc; |
| 3718 | set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ()); |
| 3719 | |
| 3720 | assert (insn->insn_type == ITYPE_LITERAL); |
| 3721 | assert (insn->ntok = 1); /* must be only one token here */ |
| 3722 | |
| 3723 | xtensa_switch_to_literal_fragment (&state); |
| 3724 | |
| 3725 | /* Force a 4-byte align here. Note that this opens a new frag, so all |
| 3726 | literals done with this function have a frag to themselves. That's |
| 3727 | important for the way text section literals work. */ |
| 3728 | frag_align (litalign, 0, 0); |
| 3729 | |
| 3730 | emit_expr (&insn->tok[0], litsize); |
| 3731 | |
| 3732 | assert (frag_now->tc_frag_data.literal_frag == NULL); |
| 3733 | frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg); |
| 3734 | frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now); |
| 3735 | lit_sym = frag_now->fr_symbol; |
| 3736 | frag_now->tc_frag_data.is_literal = TRUE; |
| 3737 | |
| 3738 | /* Go back. */ |
| 3739 | xtensa_restore_emit_state (&state); |
| 3740 | return lit_sym; |
| 3741 | } |
| 3742 | |
| 3743 | |
| 3744 | static void |
| 3745 | xg_assemble_literal_space (size) |
| 3746 | /* const */ int size; |
| 3747 | { |
| 3748 | emit_state state; |
| 3749 | /* We might have to do something about this alignment. It only |
| 3750 | takes effect if something is placed here. */ |
| 3751 | offsetT litalign = 2; /* 2^2 = 4 */ |
| 3752 | fragS *lit_saved_frag; |
| 3753 | |
| 3754 | expressionS saved_loc; |
| 3755 | |
| 3756 | assert (size % 4 == 0); |
| 3757 | set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ()); |
| 3758 | |
| 3759 | xtensa_switch_to_literal_fragment (&state); |
| 3760 | |
| 3761 | /* Force a 4-byte align here. */ |
| 3762 | frag_align (litalign, 0, 0); |
| 3763 | |
| 3764 | xg_force_frag_space (size); |
| 3765 | |
| 3766 | lit_saved_frag = frag_now; |
| 3767 | frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg); |
| 3768 | frag_now->tc_frag_data.is_literal = TRUE; |
| 3769 | frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now); |
| 3770 | xg_finish_frag (0, RELAX_LITERAL, size, FALSE); |
| 3771 | |
| 3772 | /* Go back. */ |
| 3773 | xtensa_restore_emit_state (&state); |
| 3774 | frag_now->tc_frag_data.literal_frag = lit_saved_frag; |
| 3775 | } |
| 3776 | |
| 3777 | |
| 3778 | symbolS * |
| 3779 | xtensa_create_literal_symbol (sec, frag) |
| 3780 | segT sec; |
| 3781 | fragS *frag; |
| 3782 | { |
| 3783 | static int lit_num = 0; |
| 3784 | static char name[256]; |
| 3785 | symbolS *symbolP; |
| 3786 | |
| 3787 | sprintf (name, ".L_lit_sym%d", lit_num); |
| 3788 | |
| 3789 | /* Create a local symbol. If it is in a linkonce section, we have to |
| 3790 | be careful to make sure that if it is used in a relocation that the |
| 3791 | symbol will be in the output file. */ |
| 3792 | if (get_is_linkonce_section (stdoutput, sec)) |
| 3793 | { |
| 3794 | symbolP = symbol_new (name, sec, 0, frag); |
| 3795 | S_CLEAR_EXTERNAL (symbolP); |
| 3796 | /* symbolP->local = 1; */ |
| 3797 | } |
| 3798 | else |
| 3799 | symbolP = symbol_new (name, sec, 0, frag); |
| 3800 | |
| 3801 | xtensa_add_literal_sym (symbolP); |
| 3802 | |
| 3803 | frag->tc_frag_data.is_literal = TRUE; |
| 3804 | lit_num++; |
| 3805 | return symbolP; |
| 3806 | } |
| 3807 | |
| 3808 | |
| 3809 | static void |
| 3810 | xtensa_add_literal_sym (sym) |
| 3811 | symbolS *sym; |
| 3812 | { |
| 3813 | sym_list *l; |
| 3814 | |
| 3815 | l = (sym_list *) xmalloc (sizeof (sym_list)); |
| 3816 | l->sym = sym; |
| 3817 | l->next = literal_syms; |
| 3818 | literal_syms = l; |
| 3819 | } |
| 3820 | |
| 3821 | |
| 3822 | static void |
| 3823 | xtensa_add_insn_label (sym) |
| 3824 | symbolS *sym; |
| 3825 | { |
| 3826 | sym_list *l; |
| 3827 | |
| 3828 | if (!free_insn_labels) |
| 3829 | l = (sym_list *) xmalloc (sizeof (sym_list)); |
| 3830 | else |
| 3831 | { |
| 3832 | l = free_insn_labels; |
| 3833 | free_insn_labels = l->next; |
| 3834 | } |
| 3835 | |
| 3836 | l->sym = sym; |
| 3837 | l->next = insn_labels; |
| 3838 | insn_labels = l; |
| 3839 | } |
| 3840 | |
| 3841 | |
| 3842 | static void |
| 3843 | xtensa_clear_insn_labels (void) |
| 3844 | { |
| 3845 | sym_list **pl; |
| 3846 | |
| 3847 | for (pl = &free_insn_labels; *pl != NULL; pl = &(*pl)->next) |
| 3848 | ; |
| 3849 | *pl = insn_labels; |
| 3850 | insn_labels = NULL; |
| 3851 | } |
| 3852 | |
| 3853 | |
| 3854 | /* Return true if the section flags are marked linkonce |
| 3855 | or the name is .gnu.linkonce*. */ |
| 3856 | |
| 3857 | bfd_boolean |
| 3858 | get_is_linkonce_section (abfd, sec) |
| 3859 | bfd *abfd ATTRIBUTE_UNUSED; |
| 3860 | segT sec; |
| 3861 | { |
| 3862 | flagword flags, link_once_flags; |
| 3863 | |
| 3864 | flags = bfd_get_section_flags (abfd, sec); |
| 3865 | link_once_flags = (flags & SEC_LINK_ONCE); |
| 3866 | |
| 3867 | /* Flags might not be set yet. */ |
| 3868 | if (!link_once_flags) |
| 3869 | { |
| 3870 | static size_t len = sizeof ".gnu.linkonce.t."; |
| 3871 | |
| 3872 | if (strncmp (segment_name (sec), ".gnu.linkonce.t.", len - 1) == 0) |
| 3873 | link_once_flags = SEC_LINK_ONCE; |
| 3874 | } |
| 3875 | return (link_once_flags != 0); |
| 3876 | } |
| 3877 | |
| 3878 | |
| 3879 | /* Emit an instruction to the current fragment. If record_fix is true, |
| 3880 | then this instruction will not change and we can go ahead and record |
| 3881 | the fixup. If record_fix is false, then the instruction may change |
| 3882 | and we are going to close out this fragment. Go ahead and set the |
| 3883 | fr_symbol and fr_offset instead of adding a fixup. */ |
| 3884 | |
| 3885 | static bfd_boolean |
| 3886 | xg_emit_insn (t_insn, record_fix) |
| 3887 | TInsn *t_insn; |
| 3888 | bfd_boolean record_fix; |
| 3889 | { |
| 3890 | bfd_boolean ok = TRUE; |
| 3891 | xtensa_isa isa = xtensa_default_isa; |
| 3892 | xtensa_opcode opcode = t_insn->opcode; |
| 3893 | bfd_boolean has_fixup = FALSE; |
| 3894 | int noperands; |
| 3895 | int i, byte_count; |
| 3896 | fragS *oldfrag; |
| 3897 | size_t old_size; |
| 3898 | char *f; |
| 3899 | static xtensa_insnbuf insnbuf = NULL; |
| 3900 | |
| 3901 | /* Use a static pointer to the insn buffer so we don't have to call |
| 3902 | malloc each time through. */ |
| 3903 | if (!insnbuf) |
| 3904 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 3905 | |
| 3906 | has_fixup = tinsn_to_insnbuf (t_insn, insnbuf); |
| 3907 | |
| 3908 | noperands = xtensa_num_operands (isa, opcode); |
| 3909 | assert (noperands == t_insn->ntok); |
| 3910 | |
| 3911 | byte_count = xtensa_insn_length (isa, opcode); |
| 3912 | oldfrag = frag_now; |
| 3913 | /* This should NEVER cause us to jump into a new frag; |
| 3914 | we've already reserved space. */ |
| 3915 | old_size = frag_now_fix (); |
| 3916 | f = frag_more (byte_count); |
| 3917 | assert (oldfrag == frag_now); |
| 3918 | |
| 3919 | /* This needs to generate a record that lists the parts that are |
| 3920 | instructions. */ |
| 3921 | if (!frag_now->tc_frag_data.is_insn) |
| 3922 | { |
| 3923 | /* If we are at the beginning of a fragment, switch this |
| 3924 | fragment to an instruction fragment. */ |
| 3925 | if (now_seg != absolute_section && old_size != 0) |
| 3926 | as_warn (_("instruction fragment may contain data")); |
| 3927 | frag_now->tc_frag_data.is_insn = TRUE; |
| 3928 | } |
| 3929 | |
| 3930 | xtensa_insnbuf_to_chars (isa, insnbuf, f); |
| 3931 | |
| 3932 | /* Now spit out the opcode fixup.... */ |
| 3933 | if (!has_fixup) |
| 3934 | return !ok; |
| 3935 | |
| 3936 | for (i = 0; i < noperands; ++i) |
| 3937 | { |
| 3938 | expressionS *expr = &t_insn->tok[i]; |
| 3939 | switch (expr->X_op) |
| 3940 | { |
| 3941 | case O_symbol: |
| 3942 | if (get_relaxable_immed (opcode) == i) |
| 3943 | { |
| 3944 | if (record_fix) |
| 3945 | { |
| 3946 | if (!xg_add_opcode_fix (opcode, i, expr, frag_now, |
| 3947 | f - frag_now->fr_literal)) |
| 3948 | ok = FALSE; |
| 3949 | } |
| 3950 | else |
| 3951 | { |
| 3952 | /* Write it to the fr_offset, fr_symbol. */ |
| 3953 | frag_now->fr_symbol = expr->X_add_symbol; |
| 3954 | frag_now->fr_offset = expr->X_add_number; |
| 3955 | } |
| 3956 | } |
| 3957 | else |
| 3958 | { |
| 3959 | as_bad (_("invalid operand %d on '%s'"), |
| 3960 | i, xtensa_opcode_name (isa, opcode)); |
| 3961 | ok = FALSE; |
| 3962 | } |
| 3963 | break; |
| 3964 | |
| 3965 | case O_constant: |
| 3966 | case O_register: |
| 3967 | break; |
| 3968 | |
| 3969 | default: |
| 3970 | as_bad (_("invalid expression for operand %d on '%s'"), |
| 3971 | i, xtensa_opcode_name (isa, opcode)); |
| 3972 | ok = FALSE; |
| 3973 | break; |
| 3974 | } |
| 3975 | } |
| 3976 | |
| 3977 | return !ok; |
| 3978 | } |
| 3979 | |
| 3980 | |
| 3981 | static bfd_boolean |
| 3982 | xg_emit_insn_to_buf (t_insn, buf, fragP, offset, build_fix) |
| 3983 | TInsn *t_insn; |
| 3984 | char *buf; |
| 3985 | fragS *fragP; |
| 3986 | offsetT offset; |
| 3987 | bfd_boolean build_fix; |
| 3988 | { |
| 3989 | static xtensa_insnbuf insnbuf = NULL; |
| 3990 | bfd_boolean has_symbolic_immed = FALSE; |
| 3991 | bfd_boolean ok = TRUE; |
| 3992 | if (!insnbuf) |
| 3993 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 3994 | |
| 3995 | has_symbolic_immed = tinsn_to_insnbuf (t_insn, insnbuf); |
| 3996 | if (has_symbolic_immed && build_fix) |
| 3997 | { |
| 3998 | /* Add a fixup. */ |
| 3999 | int opnum = get_relaxable_immed (t_insn->opcode); |
| 4000 | expressionS *exp = &t_insn->tok[opnum]; |
| 4001 | |
| 4002 | if (!xg_add_opcode_fix (t_insn->opcode, |
| 4003 | opnum, exp, fragP, offset)) |
| 4004 | ok = FALSE; |
| 4005 | } |
| 4006 | fragP->tc_frag_data.is_insn = TRUE; |
| 4007 | xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf); |
| 4008 | return ok; |
| 4009 | } |
| 4010 | |
| 4011 | |
| 4012 | /* Put in a fixup record based on the opcode. |
| 4013 | Return true on success. */ |
| 4014 | |
| 4015 | bfd_boolean |
| 4016 | xg_add_opcode_fix (opcode, opnum, expr, fragP, offset) |
| 4017 | xtensa_opcode opcode; |
| 4018 | int opnum; |
| 4019 | expressionS *expr; |
| 4020 | fragS *fragP; |
| 4021 | offsetT offset; |
| 4022 | { |
| 4023 | bfd_reloc_code_real_type reloc; |
| 4024 | reloc_howto_type *howto; |
| 4025 | int insn_length; |
| 4026 | fixS *the_fix; |
| 4027 | |
| 4028 | reloc = opnum_to_reloc (opnum); |
| 4029 | if (reloc == BFD_RELOC_NONE) |
| 4030 | { |
| 4031 | as_bad (_("invalid relocation operand %i on '%s'"), |
| 4032 | opnum, xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 4033 | return FALSE; |
| 4034 | } |
| 4035 | |
| 4036 | howto = bfd_reloc_type_lookup (stdoutput, reloc); |
| 4037 | |
| 4038 | if (!howto) |
| 4039 | { |
| 4040 | as_bad (_("undefined symbol for opcode \"%s\"."), |
| 4041 | xtensa_opcode_name (xtensa_default_isa, opcode)); |
| 4042 | return FALSE; |
| 4043 | } |
| 4044 | |
| 4045 | insn_length = xtensa_insn_length (xtensa_default_isa, opcode); |
| 4046 | the_fix = fix_new_exp (fragP, offset, insn_length, expr, |
| 4047 | howto->pc_relative, reloc); |
| 4048 | |
| 4049 | if (expr->X_add_symbol && |
| 4050 | (S_IS_EXTERNAL (expr->X_add_symbol) || S_IS_WEAK (expr->X_add_symbol))) |
| 4051 | the_fix->fx_plt = TRUE; |
| 4052 | |
| 4053 | return TRUE; |
| 4054 | } |
| 4055 | |
| 4056 | |
| 4057 | void |
| 4058 | xg_resolve_literals (insn, lit_sym) |
| 4059 | TInsn *insn; |
| 4060 | symbolS *lit_sym; |
| 4061 | { |
| 4062 | symbolS *sym = get_special_literal_symbol (); |
| 4063 | int i; |
| 4064 | if (lit_sym == 0) |
| 4065 | return; |
| 4066 | assert (insn->insn_type == ITYPE_INSN); |
| 4067 | for (i = 0; i < insn->ntok; i++) |
| 4068 | if (insn->tok[i].X_add_symbol == sym) |
| 4069 | insn->tok[i].X_add_symbol = lit_sym; |
| 4070 | |
| 4071 | } |
| 4072 | |
| 4073 | |
| 4074 | void |
| 4075 | xg_resolve_labels (insn, label_sym) |
| 4076 | TInsn *insn; |
| 4077 | symbolS *label_sym; |
| 4078 | { |
| 4079 | symbolS *sym = get_special_label_symbol (); |
| 4080 | int i; |
| 4081 | /* assert(!insn->is_literal); */ |
| 4082 | for (i = 0; i < insn->ntok; i++) |
| 4083 | if (insn->tok[i].X_add_symbol == sym) |
| 4084 | insn->tok[i].X_add_symbol = label_sym; |
| 4085 | |
| 4086 | } |
| 4087 | |
| 4088 | |
| 4089 | static void |
| 4090 | xg_assemble_tokens (insn) |
| 4091 | /*const */ TInsn *insn; |
| 4092 | { |
| 4093 | /* By the time we get here, there's not too much left to do. |
| 4094 | 1) Check our assumptions. |
| 4095 | 2) Check if the current instruction is "narrow". |
| 4096 | If so, then finish the frag, create another one. |
| 4097 | We could also go back to change some previous |
| 4098 | "narrow" frags into no-change ones if we have more than |
| 4099 | MAX_NARROW_ALIGNMENT of them without alignment restrictions |
| 4100 | between them. |
| 4101 | |
| 4102 | Cases: |
| 4103 | 1) It has constant operands and doesn't fit. |
| 4104 | Go ahead and assemble it so it will fail. |
| 4105 | 2) It has constant operands that fit. |
| 4106 | If narrow and !is_specific_opcode, |
| 4107 | assemble it and put in a relocation |
| 4108 | else |
| 4109 | assemble it. |
| 4110 | 3) It has a symbolic immediate operand |
| 4111 | a) Find the worst-case relaxation required |
| 4112 | b) Find the worst-case literal pool space required. |
| 4113 | Insert appropriate alignment & space in the literal. |
| 4114 | Assemble it. |
| 4115 | Add the relocation. */ |
| 4116 | |
| 4117 | assert (insn->insn_type == ITYPE_INSN); |
| 4118 | |
| 4119 | if (!tinsn_has_symbolic_operands (insn)) |
| 4120 | { |
| 4121 | if (xg_is_narrow_insn (insn) && !insn->is_specific_opcode) |
| 4122 | { |
| 4123 | /* assemble it but add max required space */ |
| 4124 | int max_size = xg_get_max_narrow_insn_size (insn->opcode); |
| 4125 | int min_size = xg_get_insn_size (insn); |
| 4126 | char *last_insn; |
| 4127 | assert (max_size == 3); |
| 4128 | /* make sure we have enough space to widen it */ |
| 4129 | xg_force_frag_space (max_size); |
| 4130 | /* Output the instruction. It may cause an error if some |
| 4131 | operands do not fit. */ |
| 4132 | last_insn = frag_more (0); |
| 4133 | if (xg_emit_insn (insn, TRUE)) |
| 4134 | as_warn (_("instruction with constant operands does not fit")); |
| 4135 | xg_finish_frag (last_insn, RELAX_NARROW, max_size - min_size, TRUE); |
| 4136 | } |
| 4137 | else |
| 4138 | { |
| 4139 | /* Assemble it. No relocation needed. */ |
| 4140 | int max_size = xg_get_insn_size (insn); |
| 4141 | xg_force_frag_space (max_size); |
| 4142 | if (xg_emit_insn (insn, FALSE)) |
| 4143 | as_warn (_("instruction with constant operands does not " |
| 4144 | "fit without widening")); |
| 4145 | /* frag_more (max_size); */ |
| 4146 | |
| 4147 | /* Special case for jx. If the jx is the next to last |
| 4148 | instruction in a loop, we will add a NOP after it. This |
| 4149 | avoids a hardware issue that could occur if the jx jumped |
| 4150 | to the next instruction. */ |
| 4151 | if (software_avoid_b_j_loop_end |
| 4152 | && is_jx_opcode (insn->opcode)) |
| 4153 | { |
| 4154 | maybe_has_b_j_loop_end = TRUE; |
| 4155 | /* add 2 of these */ |
| 4156 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4157 | frag_var (rs_machine_dependent, 4, 4, |
| 4158 | RELAX_ADD_NOP_IF_PRE_LOOP_END, |
| 4159 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4160 | } |
| 4161 | } |
| 4162 | } |
| 4163 | else |
| 4164 | { |
| 4165 | /* Need to assemble it with space for the relocation. */ |
| 4166 | if (!insn->is_specific_opcode) |
| 4167 | { |
| 4168 | /* Assemble it but add max required space. */ |
| 4169 | char *last_insn; |
| 4170 | int min_size = xg_get_insn_size (insn); |
| 4171 | int max_size = xg_get_max_insn_widen_size (insn->opcode); |
| 4172 | int max_literal_size = |
| 4173 | xg_get_max_insn_widen_literal_size (insn->opcode); |
| 4174 | |
| 4175 | #if 0 |
| 4176 | symbolS *immed_sym = xg_get_insn_immed_symbol (insn); |
| 4177 | set_frag_segment (frag_now, now_seg); |
| 4178 | #endif /* 0 */ |
| 4179 | |
| 4180 | /* Make sure we have enough space to widen the instruction. |
| 4181 | This may open a new fragment. */ |
| 4182 | xg_force_frag_space (max_size); |
| 4183 | if (max_literal_size != 0) |
| 4184 | xg_assemble_literal_space (max_literal_size); |
| 4185 | |
| 4186 | /* Output the instruction. It may cause an error if some |
| 4187 | operands do not fit. Emit the incomplete instruction. */ |
| 4188 | last_insn = frag_more (0); |
| 4189 | xg_emit_insn (insn, FALSE); |
| 4190 | |
| 4191 | xg_finish_frag (last_insn, RELAX_IMMED, max_size - min_size, TRUE); |
| 4192 | |
| 4193 | /* Special cases for loops: |
| 4194 | close_loop_end should be inserted AFTER short_loop. |
| 4195 | Make sure that CLOSE loops are processed BEFORE short_loops |
| 4196 | when converting them. */ |
| 4197 | |
| 4198 | /* "short_loop": add a NOP if the loop is < 4 bytes. */ |
| 4199 | if (software_avoid_short_loop |
| 4200 | && is_loop_opcode (insn->opcode)) |
| 4201 | { |
| 4202 | maybe_has_short_loop = TRUE; |
| 4203 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4204 | frag_var (rs_machine_dependent, 4, 4, |
| 4205 | RELAX_ADD_NOP_IF_SHORT_LOOP, |
| 4206 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4207 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4208 | frag_var (rs_machine_dependent, 4, 4, |
| 4209 | RELAX_ADD_NOP_IF_SHORT_LOOP, |
| 4210 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4211 | } |
| 4212 | |
| 4213 | /* "close_loop_end": Add up to 12 bytes of NOPs to keep a |
| 4214 | loop at least 12 bytes away from another loop's loop |
| 4215 | end. */ |
| 4216 | if (software_avoid_close_loop_end |
| 4217 | && is_loop_opcode (insn->opcode)) |
| 4218 | { |
| 4219 | maybe_has_close_loop_end = TRUE; |
| 4220 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4221 | frag_var (rs_machine_dependent, 12, 12, |
| 4222 | RELAX_ADD_NOP_IF_CLOSE_LOOP_END, |
| 4223 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4224 | } |
| 4225 | } |
| 4226 | else |
| 4227 | { |
| 4228 | /* Assemble it in place. No expansion will be required, |
| 4229 | but we'll still need a relocation record. */ |
| 4230 | int max_size = xg_get_insn_size (insn); |
| 4231 | xg_force_frag_space (max_size); |
| 4232 | if (xg_emit_insn (insn, TRUE)) |
| 4233 | as_warn (_("instruction's constant operands do not fit")); |
| 4234 | } |
| 4235 | } |
| 4236 | } |
| 4237 | |
| 4238 | |
| 4239 | /* Return true if the instruction can write to the specified |
| 4240 | integer register. */ |
| 4241 | |
| 4242 | static bfd_boolean |
| 4243 | is_register_writer (insn, regset, regnum) |
| 4244 | const TInsn *insn; |
| 4245 | const char *regset; |
| 4246 | int regnum; |
| 4247 | { |
| 4248 | int i; |
| 4249 | int num_ops; |
| 4250 | xtensa_isa isa = xtensa_default_isa; |
| 4251 | |
| 4252 | num_ops = xtensa_num_operands (isa, insn->opcode); |
| 4253 | |
| 4254 | for (i = 0; i < num_ops; i++) |
| 4255 | { |
| 4256 | xtensa_operand operand = xtensa_get_operand (isa, insn->opcode, i); |
| 4257 | char inout = xtensa_operand_inout (operand); |
| 4258 | |
| 4259 | if (inout == '>' || inout == '=') |
| 4260 | { |
| 4261 | if (strcmp (xtensa_operand_kind (operand), regset) == 0) |
| 4262 | { |
| 4263 | if ((insn->tok[i].X_op == O_register) |
| 4264 | && (insn->tok[i].X_add_number == regnum)) |
| 4265 | return TRUE; |
| 4266 | } |
| 4267 | } |
| 4268 | } |
| 4269 | return FALSE; |
| 4270 | } |
| 4271 | |
| 4272 | |
| 4273 | static bfd_boolean |
| 4274 | is_bad_loopend_opcode (tinsn) |
| 4275 | const TInsn * tinsn; |
| 4276 | { |
| 4277 | xtensa_opcode opcode = tinsn->opcode; |
| 4278 | |
| 4279 | if (opcode == XTENSA_UNDEFINED) |
| 4280 | return FALSE; |
| 4281 | |
| 4282 | if (opcode == xtensa_call0_opcode |
| 4283 | || opcode == xtensa_callx0_opcode |
| 4284 | || opcode == xtensa_call4_opcode |
| 4285 | || opcode == xtensa_callx4_opcode |
| 4286 | || opcode == xtensa_call8_opcode |
| 4287 | || opcode == xtensa_callx8_opcode |
| 4288 | || opcode == xtensa_call12_opcode |
| 4289 | || opcode == xtensa_callx12_opcode |
| 4290 | || opcode == xtensa_isync_opcode |
| 4291 | || opcode == xtensa_ret_opcode |
| 4292 | || opcode == xtensa_ret_n_opcode |
| 4293 | || opcode == xtensa_retw_opcode |
| 4294 | || opcode == xtensa_retw_n_opcode |
| 4295 | || opcode == xtensa_waiti_opcode) |
| 4296 | return TRUE; |
| 4297 | |
| 4298 | /* An RSR of LCOUNT is illegal as the last opcode in a loop. */ |
| 4299 | if (opcode == xtensa_rsr_opcode |
| 4300 | && tinsn->ntok >= 2 |
| 4301 | && tinsn->tok[1].X_op == O_constant |
| 4302 | && tinsn->tok[1].X_add_number == 2) |
| 4303 | return TRUE; |
| 4304 | |
| 4305 | return FALSE; |
| 4306 | } |
| 4307 | |
| 4308 | |
| 4309 | /* Labels that begin with ".Ln" or ".LM" are unaligned. |
| 4310 | This allows the debugger to add unaligned labels. |
| 4311 | Also, the assembler generates stabs labels that need |
| 4312 | not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */ |
| 4313 | |
| 4314 | bfd_boolean |
| 4315 | is_unaligned_label (sym) |
| 4316 | symbolS *sym; |
| 4317 | { |
| 4318 | const char *name = S_GET_NAME (sym); |
| 4319 | static size_t fake_size = 0; |
| 4320 | |
| 4321 | if (name |
| 4322 | && name[0] == '.' |
| 4323 | && name[1] == 'L' && (name[2] == 'n' || name[2] == 'M')) |
| 4324 | return TRUE; |
| 4325 | |
| 4326 | /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */ |
| 4327 | if (fake_size == 0) |
| 4328 | fake_size = strlen (FAKE_LABEL_NAME); |
| 4329 | |
| 4330 | if (name |
| 4331 | && strncmp (FAKE_LABEL_NAME, name, fake_size) == 0 |
| 4332 | && (name[fake_size] == 'F' |
| 4333 | || name[fake_size] == 'L' |
| 4334 | || (name[fake_size] == 'e' |
| 4335 | && strncmp ("endfunc", name+fake_size, 7) == 0))) |
| 4336 | return TRUE; |
| 4337 | |
| 4338 | return FALSE; |
| 4339 | } |
| 4340 | |
| 4341 | |
| 4342 | fragS * |
| 4343 | next_non_empty_frag (fragP) |
| 4344 | const fragS *fragP; |
| 4345 | { |
| 4346 | fragS *next_fragP = fragP->fr_next; |
| 4347 | |
| 4348 | /* Sometimes an empty will end up here due storage allocation issues. |
| 4349 | So we have to skip until we find something legit. */ |
| 4350 | while (next_fragP && next_fragP->fr_fix == 0) |
| 4351 | next_fragP = next_fragP->fr_next; |
| 4352 | |
| 4353 | if (next_fragP == NULL || next_fragP->fr_fix == 0) |
| 4354 | return NULL; |
| 4355 | |
| 4356 | return next_fragP; |
| 4357 | } |
| 4358 | |
| 4359 | |
| 4360 | xtensa_opcode |
| 4361 | next_frag_opcode (fragP) |
| 4362 | const fragS * fragP; |
| 4363 | { |
| 4364 | const fragS *next_fragP = next_non_empty_frag (fragP); |
| 4365 | static xtensa_insnbuf insnbuf = NULL; |
| 4366 | xtensa_isa isa = xtensa_default_isa; |
| 4367 | |
| 4368 | if (!insnbuf) |
| 4369 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 4370 | |
| 4371 | if (next_fragP == NULL) |
| 4372 | return XTENSA_UNDEFINED; |
| 4373 | |
| 4374 | xtensa_insnbuf_from_chars (isa, insnbuf, next_fragP->fr_literal); |
| 4375 | return xtensa_decode_insn (isa, insnbuf); |
| 4376 | } |
| 4377 | |
| 4378 | |
| 4379 | /* Return true if the target frag is one of the next non-empty frags. */ |
| 4380 | |
| 4381 | bfd_boolean |
| 4382 | is_next_frag_target (fragP, target) |
| 4383 | const fragS *fragP; |
| 4384 | const fragS *target; |
| 4385 | { |
| 4386 | if (fragP == NULL) |
| 4387 | return FALSE; |
| 4388 | |
| 4389 | for (; fragP; fragP = fragP->fr_next) |
| 4390 | { |
| 4391 | if (fragP == target) |
| 4392 | return TRUE; |
| 4393 | if (fragP->fr_fix != 0) |
| 4394 | return FALSE; |
| 4395 | if (fragP->fr_type == rs_fill && fragP->fr_offset != 0) |
| 4396 | return FALSE; |
| 4397 | if ((fragP->fr_type == rs_align || fragP->fr_type == rs_align_code) |
| 4398 | && ((fragP->fr_address % (1 << fragP->fr_offset)) != 0)) |
| 4399 | return FALSE; |
| 4400 | if (fragP->fr_type == rs_space) |
| 4401 | return FALSE; |
| 4402 | } |
| 4403 | return FALSE; |
| 4404 | } |
| 4405 | |
| 4406 | |
| 4407 | /* If the next legit fragment is an end-of-loop marker, |
| 4408 | switch its state so it will instantiate a NOP. */ |
| 4409 | |
| 4410 | static void |
| 4411 | update_next_frag_nop_state (fragP) |
| 4412 | fragS *fragP; |
| 4413 | { |
| 4414 | fragS *next_fragP = fragP->fr_next; |
| 4415 | |
| 4416 | while (next_fragP && next_fragP->fr_fix == 0) |
| 4417 | { |
| 4418 | if (next_fragP->fr_type == rs_machine_dependent |
| 4419 | && next_fragP->fr_subtype == RELAX_LOOP_END) |
| 4420 | { |
| 4421 | next_fragP->fr_subtype = RELAX_LOOP_END_ADD_NOP; |
| 4422 | return; |
| 4423 | } |
| 4424 | next_fragP = next_fragP->fr_next; |
| 4425 | } |
| 4426 | } |
| 4427 | |
| 4428 | |
| 4429 | static bfd_boolean |
| 4430 | next_frag_is_branch_target (fragP) |
| 4431 | const fragS *fragP; |
| 4432 | { |
| 4433 | /* Sometimes an empty will end up here due storage allocation issues, |
| 4434 | so we have to skip until we find something legit. */ |
| 4435 | for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next) |
| 4436 | { |
| 4437 | if (fragP->tc_frag_data.is_branch_target) |
| 4438 | return TRUE; |
| 4439 | if (fragP->fr_fix != 0) |
| 4440 | break; |
| 4441 | } |
| 4442 | return FALSE; |
| 4443 | } |
| 4444 | |
| 4445 | |
| 4446 | static bfd_boolean |
| 4447 | next_frag_is_loop_target (fragP) |
| 4448 | const fragS *fragP; |
| 4449 | { |
| 4450 | /* Sometimes an empty will end up here due storage allocation issues. |
| 4451 | So we have to skip until we find something legit. */ |
| 4452 | for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next) |
| 4453 | { |
| 4454 | if (fragP->tc_frag_data.is_loop_target) |
| 4455 | return TRUE; |
| 4456 | if (fragP->fr_fix != 0) |
| 4457 | break; |
| 4458 | } |
| 4459 | return FALSE; |
| 4460 | } |
| 4461 | |
| 4462 | |
| 4463 | static addressT |
| 4464 | next_frag_pre_opcode_bytes (fragp) |
| 4465 | const fragS *fragp; |
| 4466 | { |
| 4467 | const fragS *next_fragp = fragp->fr_next; |
| 4468 | |
| 4469 | xtensa_opcode next_opcode = next_frag_opcode (fragp); |
| 4470 | if (!is_loop_opcode (next_opcode)) |
| 4471 | return 0; |
| 4472 | |
| 4473 | /* Sometimes an empty will end up here due storage allocation issues. |
| 4474 | So we have to skip until we find something legit. */ |
| 4475 | while (next_fragp->fr_fix == 0) |
| 4476 | next_fragp = next_fragp->fr_next; |
| 4477 | |
| 4478 | if (next_fragp->fr_type != rs_machine_dependent) |
| 4479 | return 0; |
| 4480 | |
| 4481 | /* There is some implicit knowledge encoded in here. |
| 4482 | The LOOP instructions that are NOT RELAX_IMMED have |
| 4483 | been relaxed. */ |
| 4484 | if (next_fragp->fr_subtype > RELAX_IMMED) |
| 4485 | return get_expanded_loop_offset (next_opcode); |
| 4486 | |
| 4487 | return 0; |
| 4488 | } |
| 4489 | |
| 4490 | |
| 4491 | /* Mark a location where we can later insert literal frags. Update |
| 4492 | the section's literal_pool_loc, so subsequent literals can be |
| 4493 | placed nearest to their use. */ |
| 4494 | |
| 4495 | static void |
| 4496 | xtensa_mark_literal_pool_location () |
| 4497 | { |
| 4498 | /* Any labels pointing to the current location need |
| 4499 | to be adjusted to after the literal pool. */ |
| 4500 | emit_state s; |
| 4501 | fragS *pool_location; |
| 4502 | |
| 4503 | frag_align (2, 0, 0); |
| 4504 | |
| 4505 | /* We stash info in the fr_var of these frags |
| 4506 | so we can later move the literal's fixes into this |
| 4507 | frchain's fix list. We can use fr_var because fr_var's |
| 4508 | interpretation depends solely on the fr_type and subtype. */ |
| 4509 | pool_location = frag_now; |
| 4510 | frag_variant (rs_machine_dependent, 0, (int) frchain_now, |
| 4511 | RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL); |
| 4512 | frag_variant (rs_machine_dependent, 0, (int) now_seg, |
| 4513 | RELAX_LITERAL_POOL_END, NULL, 0, NULL); |
| 4514 | |
| 4515 | /* Now put a frag into the literal pool that points to this location. */ |
| 4516 | set_literal_pool_location (now_seg, pool_location); |
| 4517 | xtensa_switch_to_literal_fragment (&s); |
| 4518 | |
| 4519 | /* Close whatever frag is there. */ |
| 4520 | frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 4521 | frag_now->tc_frag_data.literal_frag = pool_location; |
| 4522 | frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 4523 | xtensa_restore_emit_state (&s); |
| 4524 | } |
| 4525 | |
| 4526 | |
| 4527 | /* The "loops_ok" argument is provided to allow ignoring labels that |
| 4528 | define loop ends. This fixes a bug where the NOPs to align a |
| 4529 | loop opcode were included in a previous zero-cost loop: |
| 4530 | |
| 4531 | loop a0, loopend |
| 4532 | <loop1 body> |
| 4533 | loopend: |
| 4534 | |
| 4535 | loop a2, loopend2 |
| 4536 | <loop2 body> |
| 4537 | |
| 4538 | would become: |
| 4539 | |
| 4540 | loop a0, loopend |
| 4541 | <loop1 body> |
| 4542 | nop.n <===== bad! |
| 4543 | loopend: |
| 4544 | |
| 4545 | loop a2, loopend2 |
| 4546 | <loop2 body> |
| 4547 | |
| 4548 | This argument is used to prevent moving the NOP to before the |
| 4549 | loop-end label, which is what you want in this special case. */ |
| 4550 | |
| 4551 | static void |
| 4552 | xtensa_move_labels (new_frag, new_offset, loops_ok) |
| 4553 | fragS *new_frag; |
| 4554 | valueT new_offset; |
| 4555 | bfd_boolean loops_ok; |
| 4556 | { |
| 4557 | sym_list *lit; |
| 4558 | |
| 4559 | for (lit = insn_labels; lit; lit = lit->next) |
| 4560 | { |
| 4561 | symbolS *lit_sym = lit->sym; |
| 4562 | if (loops_ok || symbol_get_tc (lit_sym)->is_loop_target == 0) |
| 4563 | { |
| 4564 | S_SET_VALUE (lit_sym, new_offset); |
| 4565 | symbol_set_frag (lit_sym, new_frag); |
| 4566 | } |
| 4567 | } |
| 4568 | } |
| 4569 | |
| 4570 | |
| 4571 | /* Assemble a NOP of the requested size in the buffer. User must have |
| 4572 | allocated "buf" with at least "size" bytes. */ |
| 4573 | |
| 4574 | void |
| 4575 | assemble_nop (size, buf) |
| 4576 | size_t size; |
| 4577 | char *buf; |
| 4578 | { |
| 4579 | static xtensa_insnbuf insnbuf = NULL; |
| 4580 | TInsn t_insn; |
| 4581 | if (!insnbuf) |
| 4582 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 4583 | |
| 4584 | tinsn_init (&t_insn); |
| 4585 | switch (size) |
| 4586 | { |
| 4587 | case 2: |
| 4588 | t_insn.opcode = xtensa_nop_n_opcode; |
| 4589 | t_insn.ntok = 0; |
| 4590 | if (t_insn.opcode == XTENSA_UNDEFINED) |
| 4591 | as_fatal (_("opcode 'NOP.N' unavailable in this configuration")); |
| 4592 | tinsn_to_insnbuf (&t_insn, insnbuf); |
| 4593 | xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf); |
| 4594 | break; |
| 4595 | |
| 4596 | case 3: |
| 4597 | t_insn.opcode = xtensa_or_opcode; |
| 4598 | assert (t_insn.opcode != XTENSA_UNDEFINED); |
| 4599 | if (t_insn.opcode == XTENSA_UNDEFINED) |
| 4600 | as_fatal (_("opcode 'OR' unavailable in this configuration")); |
| 4601 | set_expr_const (&t_insn.tok[0], 1); |
| 4602 | set_expr_const (&t_insn.tok[1], 1); |
| 4603 | set_expr_const (&t_insn.tok[2], 1); |
| 4604 | t_insn.ntok = 3; |
| 4605 | tinsn_to_insnbuf (&t_insn, insnbuf); |
| 4606 | xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf); |
| 4607 | break; |
| 4608 | |
| 4609 | default: |
| 4610 | as_fatal (_("invalid %d-byte NOP requested"), size); |
| 4611 | } |
| 4612 | } |
| 4613 | |
| 4614 | |
| 4615 | /* Return the number of bytes for the offset of the expanded loop |
| 4616 | instruction. This should be incorporated into the relaxation |
| 4617 | specification but is hard-coded here. This is used to auto-align |
| 4618 | the loop instruction. It is invalid to call this function if the |
| 4619 | configuration does not have loops or if the opcode is not a loop |
| 4620 | opcode. */ |
| 4621 | |
| 4622 | static addressT |
| 4623 | get_expanded_loop_offset (opcode) |
| 4624 | xtensa_opcode opcode; |
| 4625 | { |
| 4626 | /* This is the OFFSET of the loop instruction in the expanded loop. |
| 4627 | This MUST correspond directly to the specification of the loop |
| 4628 | expansion. It will be validated on fragment conversion. */ |
| 4629 | if (opcode == XTENSA_UNDEFINED) |
| 4630 | as_fatal (_("get_expanded_loop_offset: undefined opcode")); |
| 4631 | if (opcode == xtensa_loop_opcode) |
| 4632 | return 0; |
| 4633 | if (opcode == xtensa_loopnez_opcode) |
| 4634 | return 3; |
| 4635 | if (opcode == xtensa_loopgtz_opcode) |
| 4636 | return 6; |
| 4637 | as_fatal (_("get_expanded_loop_offset: invalid opcode")); |
| 4638 | return 0; |
| 4639 | } |
| 4640 | |
| 4641 | |
| 4642 | fragS * |
| 4643 | get_literal_pool_location (seg) |
| 4644 | segT seg; |
| 4645 | { |
| 4646 | return seg_info (seg)->tc_segment_info_data.literal_pool_loc; |
| 4647 | } |
| 4648 | |
| 4649 | |
| 4650 | static void |
| 4651 | set_literal_pool_location (seg, literal_pool_loc) |
| 4652 | segT seg; |
| 4653 | fragS *literal_pool_loc; |
| 4654 | { |
| 4655 | seg_info (seg)->tc_segment_info_data.literal_pool_loc = literal_pool_loc; |
| 4656 | } |
| 4657 | |
| 4658 | \f |
| 4659 | /* External Functions and Other GAS Hooks. */ |
| 4660 | |
| 4661 | const char * |
| 4662 | xtensa_target_format () |
| 4663 | { |
| 4664 | return (target_big_endian ? "elf32-xtensa-be" : "elf32-xtensa-le"); |
| 4665 | } |
| 4666 | |
| 4667 | |
| 4668 | void |
| 4669 | xtensa_file_arch_init (abfd) |
| 4670 | bfd *abfd; |
| 4671 | { |
| 4672 | bfd_set_private_flags (abfd, 0x100 | 0x200); |
| 4673 | } |
| 4674 | |
| 4675 | |
| 4676 | void |
| 4677 | md_number_to_chars (buf, val, n) |
| 4678 | char *buf; |
| 4679 | valueT val; |
| 4680 | int n; |
| 4681 | { |
| 4682 | if (target_big_endian) |
| 4683 | number_to_chars_bigendian (buf, val, n); |
| 4684 | else |
| 4685 | number_to_chars_littleendian (buf, val, n); |
| 4686 | } |
| 4687 | |
| 4688 | |
| 4689 | /* This function is called once, at assembler startup time. It should |
| 4690 | set up all the tables, etc. that the MD part of the assembler will |
| 4691 | need. */ |
| 4692 | |
| 4693 | void |
| 4694 | md_begin () |
| 4695 | { |
| 4696 | segT current_section = now_seg; |
| 4697 | int current_subsec = now_subseg; |
| 4698 | xtensa_isa isa; |
| 4699 | |
| 4700 | #if STATIC_LIBISA |
| 4701 | isa = xtensa_isa_init (); |
| 4702 | #else |
| 4703 | /* ISA was already initialized by xtensa_init(). */ |
| 4704 | isa = xtensa_default_isa; |
| 4705 | #endif |
| 4706 | |
| 4707 | /* Set up the .literal, .fini.literal and .init.literal sections. */ |
| 4708 | memset (&default_lit_sections, 0, sizeof (default_lit_sections)); |
| 4709 | default_lit_sections.init_lit_seg_name = INIT_LITERAL_SECTION_NAME; |
| 4710 | default_lit_sections.fini_lit_seg_name = FINI_LITERAL_SECTION_NAME; |
| 4711 | default_lit_sections.lit_seg_name = LITERAL_SECTION_NAME; |
| 4712 | |
| 4713 | subseg_set (current_section, current_subsec); |
| 4714 | |
| 4715 | xtensa_addi_opcode = xtensa_opcode_lookup (isa, "addi"); |
| 4716 | xtensa_addmi_opcode = xtensa_opcode_lookup (isa, "addmi"); |
| 4717 | xtensa_call0_opcode = xtensa_opcode_lookup (isa, "call0"); |
| 4718 | xtensa_call4_opcode = xtensa_opcode_lookup (isa, "call4"); |
| 4719 | xtensa_call8_opcode = xtensa_opcode_lookup (isa, "call8"); |
| 4720 | xtensa_call12_opcode = xtensa_opcode_lookup (isa, "call12"); |
| 4721 | xtensa_callx0_opcode = xtensa_opcode_lookup (isa, "callx0"); |
| 4722 | xtensa_callx4_opcode = xtensa_opcode_lookup (isa, "callx4"); |
| 4723 | xtensa_callx8_opcode = xtensa_opcode_lookup (isa, "callx8"); |
| 4724 | xtensa_callx12_opcode = xtensa_opcode_lookup (isa, "callx12"); |
| 4725 | xtensa_entry_opcode = xtensa_opcode_lookup (isa, "entry"); |
| 4726 | xtensa_isync_opcode = xtensa_opcode_lookup (isa, "isync"); |
| 4727 | xtensa_j_opcode = xtensa_opcode_lookup (isa, "j"); |
| 4728 | xtensa_jx_opcode = xtensa_opcode_lookup (isa, "jx"); |
| 4729 | xtensa_loop_opcode = xtensa_opcode_lookup (isa, "loop"); |
| 4730 | xtensa_loopnez_opcode = xtensa_opcode_lookup (isa, "loopnez"); |
| 4731 | xtensa_loopgtz_opcode = xtensa_opcode_lookup (isa, "loopgtz"); |
| 4732 | xtensa_nop_n_opcode = xtensa_opcode_lookup (isa, "nop.n"); |
| 4733 | xtensa_or_opcode = xtensa_opcode_lookup (isa, "or"); |
| 4734 | xtensa_ret_opcode = xtensa_opcode_lookup (isa, "ret"); |
| 4735 | xtensa_ret_n_opcode = xtensa_opcode_lookup (isa, "ret.n"); |
| 4736 | xtensa_retw_opcode = xtensa_opcode_lookup (isa, "retw"); |
| 4737 | xtensa_retw_n_opcode = xtensa_opcode_lookup (isa, "retw.n"); |
| 4738 | xtensa_rsr_opcode = xtensa_opcode_lookup (isa, "rsr"); |
| 4739 | xtensa_waiti_opcode = xtensa_opcode_lookup (isa, "waiti"); |
| 4740 | } |
| 4741 | |
| 4742 | |
| 4743 | /* tc_frob_label hook */ |
| 4744 | |
| 4745 | void |
| 4746 | xtensa_frob_label (sym) |
| 4747 | symbolS *sym; |
| 4748 | { |
| 4749 | if (generating_literals) |
| 4750 | xtensa_add_literal_sym (sym); |
| 4751 | else |
| 4752 | xtensa_add_insn_label (sym); |
| 4753 | |
| 4754 | if (symbol_get_tc (sym)->is_loop_target |
| 4755 | && (get_last_insn_flags (now_seg, now_subseg) |
| 4756 | & FLAG_IS_BAD_LOOPEND) != 0) |
| 4757 | as_bad (_("invalid last instruction for a zero-overhead loop")); |
| 4758 | |
| 4759 | /* No target aligning in the absolute section. */ |
| 4760 | if (now_seg != absolute_section |
| 4761 | && align_targets |
| 4762 | && !is_unaligned_label (sym) |
| 4763 | && !frag_now->tc_frag_data.is_literal) |
| 4764 | { |
| 4765 | /* frag_now->tc_frag_data.is_insn = TRUE; */ |
| 4766 | frag_var (rs_machine_dependent, 4, 4, |
| 4767 | RELAX_DESIRE_ALIGN_IF_TARGET, |
| 4768 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4769 | xtensa_move_labels (frag_now, 0, TRUE); |
| 4770 | |
| 4771 | /* If the label is already known to be a branch target, i.e., a |
| 4772 | forward branch, mark the frag accordingly. Backward branches |
| 4773 | are handled by xg_add_branch_and_loop_targets. */ |
| 4774 | if (symbol_get_tc (sym)->is_branch_target) |
| 4775 | symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE; |
| 4776 | |
| 4777 | /* Loops only go forward, so they can be identified here. */ |
| 4778 | if (symbol_get_tc (sym)->is_loop_target) |
| 4779 | symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE; |
| 4780 | } |
| 4781 | } |
| 4782 | |
| 4783 | |
| 4784 | /* md_flush_pending_output hook */ |
| 4785 | |
| 4786 | void |
| 4787 | xtensa_flush_pending_output () |
| 4788 | { |
| 4789 | /* If there is a non-zero instruction fragment, close it. */ |
| 4790 | if (frag_now_fix () != 0 && frag_now->tc_frag_data.is_insn) |
| 4791 | { |
| 4792 | frag_wane (frag_now); |
| 4793 | frag_new (0); |
| 4794 | } |
| 4795 | frag_now->tc_frag_data.is_insn = FALSE; |
| 4796 | |
| 4797 | xtensa_clear_insn_labels (); |
| 4798 | } |
| 4799 | |
| 4800 | |
| 4801 | void |
| 4802 | md_assemble (str) |
| 4803 | char *str; |
| 4804 | { |
| 4805 | xtensa_isa isa = xtensa_default_isa; |
| 4806 | char *opname; |
| 4807 | unsigned opnamelen; |
| 4808 | bfd_boolean has_underbar = FALSE; |
| 4809 | char *arg_strings[MAX_INSN_ARGS]; |
| 4810 | int num_args; |
| 4811 | IStack istack; /* Put instructions into here. */ |
| 4812 | TInsn orig_insn; /* Original instruction from the input. */ |
| 4813 | int i; |
| 4814 | symbolS *lit_sym = NULL; |
| 4815 | |
| 4816 | if (frag_now->tc_frag_data.is_literal) |
| 4817 | { |
| 4818 | static bfd_boolean reported = 0; |
| 4819 | if (reported < 4) |
| 4820 | as_bad (_("cannot assemble '%s' into a literal fragment"), str); |
| 4821 | if (reported == 3) |
| 4822 | as_bad (_("...")); |
| 4823 | reported++; |
| 4824 | return; |
| 4825 | } |
| 4826 | |
| 4827 | istack_init (&istack); |
| 4828 | tinsn_init (&orig_insn); |
| 4829 | |
| 4830 | /* Split off the opcode. */ |
| 4831 | opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/0123456789."); |
| 4832 | opname = xmalloc (opnamelen + 1); |
| 4833 | memcpy (opname, str, opnamelen); |
| 4834 | opname[opnamelen] = '\0'; |
| 4835 | |
| 4836 | num_args = tokenize_arguments (arg_strings, str + opnamelen); |
| 4837 | if (num_args == -1) |
| 4838 | { |
| 4839 | as_bad (_("syntax error")); |
| 4840 | return; |
| 4841 | } |
| 4842 | |
| 4843 | if (xg_translate_idioms (&opname, &num_args, arg_strings)) |
| 4844 | return; |
| 4845 | |
| 4846 | /* Check for an underbar prefix. */ |
| 4847 | if (*opname == '_') |
| 4848 | { |
| 4849 | has_underbar = TRUE; |
| 4850 | opname += 1; |
| 4851 | } |
| 4852 | |
| 4853 | orig_insn.insn_type = ITYPE_INSN; |
| 4854 | orig_insn.ntok = 0; |
| 4855 | orig_insn.is_specific_opcode = (has_underbar || !use_generics ()); |
| 4856 | specific_opcode = orig_insn.is_specific_opcode; |
| 4857 | |
| 4858 | orig_insn.opcode = xtensa_opcode_lookup (isa, opname); |
| 4859 | if (orig_insn.opcode == XTENSA_UNDEFINED) |
| 4860 | { |
| 4861 | as_bad (_("unknown opcode %s"), opname); |
| 4862 | return; |
| 4863 | } |
| 4864 | |
| 4865 | if (frag_now_fix () != 0 && !frag_now->tc_frag_data.is_insn) |
| 4866 | { |
| 4867 | frag_wane (frag_now); |
| 4868 | frag_new (0); |
| 4869 | } |
| 4870 | |
| 4871 | if (software_a0_b_retw_interlock) |
| 4872 | { |
| 4873 | if ((get_last_insn_flags (now_seg, now_subseg) & FLAG_IS_A0_WRITER) != 0 |
| 4874 | && is_conditional_branch_opcode (orig_insn.opcode)) |
| 4875 | { |
| 4876 | has_a0_b_retw = TRUE; |
| 4877 | |
| 4878 | /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW. |
| 4879 | After the first assembly pass we will check all of them and |
| 4880 | add a nop if needed. */ |
| 4881 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4882 | frag_var (rs_machine_dependent, 4, 4, |
| 4883 | RELAX_ADD_NOP_IF_A0_B_RETW, |
| 4884 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4885 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4886 | frag_var (rs_machine_dependent, 4, 4, |
| 4887 | RELAX_ADD_NOP_IF_A0_B_RETW, |
| 4888 | frag_now->fr_symbol, frag_now->fr_offset, NULL); |
| 4889 | } |
| 4890 | } |
| 4891 | |
| 4892 | /* Special case: The call instructions should be marked "specific opcode" |
| 4893 | to keep them from expanding. */ |
| 4894 | if (!use_longcalls () && is_direct_call_opcode (orig_insn.opcode)) |
| 4895 | orig_insn.is_specific_opcode = TRUE; |
| 4896 | |
| 4897 | /* Parse the arguments. */ |
| 4898 | if (parse_arguments (&orig_insn, num_args, arg_strings)) |
| 4899 | { |
| 4900 | as_bad (_("syntax error")); |
| 4901 | return; |
| 4902 | } |
| 4903 | |
| 4904 | /* Free the opcode and argument strings, now that they've been parsed. */ |
| 4905 | free (has_underbar ? opname - 1 : opname); |
| 4906 | opname = 0; |
| 4907 | while (num_args-- > 0) |
| 4908 | free (arg_strings[num_args]); |
| 4909 | |
| 4910 | /* Check for the right number and type of arguments. */ |
| 4911 | if (tinsn_check_arguments (&orig_insn)) |
| 4912 | return; |
| 4913 | |
| 4914 | /* See if the instruction implies an aligned section. */ |
| 4915 | if (is_entry_opcode (orig_insn.opcode) || is_loop_opcode (orig_insn.opcode)) |
| 4916 | record_alignment (now_seg, 2); |
| 4917 | |
| 4918 | xg_add_branch_and_loop_targets (&orig_insn); |
| 4919 | |
| 4920 | /* Special cases for instructions that force an alignment... */ |
| 4921 | if (!orig_insn.is_specific_opcode && is_loop_opcode (orig_insn.opcode)) |
| 4922 | { |
| 4923 | size_t max_fill; |
| 4924 | |
| 4925 | frag_now->tc_frag_data.is_insn = TRUE; |
| 4926 | frag_now->tc_frag_data.is_no_density = !code_density_available (); |
| 4927 | max_fill = get_text_align_max_fill_size |
| 4928 | (get_text_align_power (XTENSA_FETCH_WIDTH), |
| 4929 | TRUE, frag_now->tc_frag_data.is_no_density); |
| 4930 | frag_var (rs_machine_dependent, max_fill, max_fill, |
| 4931 | RELAX_ALIGN_NEXT_OPCODE, frag_now->fr_symbol, |
| 4932 | frag_now->fr_offset, NULL); |
| 4933 | |
| 4934 | xtensa_move_labels (frag_now, 0, FALSE); |
| 4935 | } |
| 4936 | |
| 4937 | /* Special-case for "entry" instruction. */ |
| 4938 | if (is_entry_opcode (orig_insn.opcode)) |
| 4939 | { |
| 4940 | /* Check that the second opcode (#1) is >= 16. */ |
| 4941 | if (orig_insn.ntok >= 2) |
| 4942 | { |
| 4943 | expressionS *exp = &orig_insn.tok[1]; |
| 4944 | switch (exp->X_op) |
| 4945 | { |
| 4946 | case O_constant: |
| 4947 | if (exp->X_add_number < 16) |
| 4948 | as_warn (_("entry instruction with stack decrement < 16")); |
| 4949 | break; |
| 4950 | |
| 4951 | default: |
| 4952 | as_warn (_("entry instruction with non-constant decrement")); |
| 4953 | } |
| 4954 | } |
| 4955 | |
| 4956 | if (!orig_insn.is_specific_opcode) |
| 4957 | { |
| 4958 | xtensa_mark_literal_pool_location (); |
| 4959 | |
| 4960 | /* Automatically align ENTRY instructions. */ |
| 4961 | xtensa_move_labels (frag_now, 0, TRUE); |
| 4962 | frag_align (2, 0, 0); |
| 4963 | } |
| 4964 | } |
| 4965 | |
| 4966 | /* Any extra alignment frags have been inserted now, and we're about to |
| 4967 | emit a new instruction so clear the list of labels. */ |
| 4968 | xtensa_clear_insn_labels (); |
| 4969 | |
| 4970 | if (software_a0_b_retw_interlock) |
| 4971 | set_last_insn_flags (now_seg, now_subseg, FLAG_IS_A0_WRITER, |
| 4972 | is_register_writer (&orig_insn, "a", 0)); |
| 4973 | |
| 4974 | set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND, |
| 4975 | is_bad_loopend_opcode (&orig_insn)); |
| 4976 | |
| 4977 | /* Finish it off: |
| 4978 | assemble_tokens (opcode, tok, ntok); |
| 4979 | expand the tokens from the orig_insn into the |
| 4980 | stack of instructions that will not expand |
| 4981 | unless required at relaxation time. */ |
| 4982 | if (xg_expand_assembly_insn (&istack, &orig_insn)) |
| 4983 | return; |
| 4984 | |
| 4985 | for (i = 0; i < istack.ninsn; i++) |
| 4986 | { |
| 4987 | TInsn *insn = &istack.insn[i]; |
| 4988 | if (insn->insn_type == ITYPE_LITERAL) |
| 4989 | { |
| 4990 | assert (lit_sym == NULL); |
| 4991 | lit_sym = xg_assemble_literal (insn); |
| 4992 | } |
| 4993 | else |
| 4994 | { |
| 4995 | if (lit_sym) |
| 4996 | xg_resolve_literals (insn, lit_sym); |
| 4997 | xg_assemble_tokens (insn); |
| 4998 | } |
| 4999 | } |
| 5000 | |
| 5001 | /* Now, if the original opcode was a call... */ |
| 5002 | if (align_targets && is_call_opcode (orig_insn.opcode)) |
| 5003 | { |
| 5004 | frag_now->tc_frag_data.is_insn = TRUE; |
| 5005 | frag_var (rs_machine_dependent, 4, 4, |
| 5006 | RELAX_DESIRE_ALIGN, |
| 5007 | frag_now->fr_symbol, |
| 5008 | frag_now->fr_offset, |
| 5009 | NULL); |
| 5010 | } |
| 5011 | } |
| 5012 | |
| 5013 | |
| 5014 | /* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references. |
| 5015 | If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this |
| 5016 | is the same as the standard code in read.c. */ |
| 5017 | |
| 5018 | void |
| 5019 | xtensa_cons_fix_new (frag, where, size, exp) |
| 5020 | fragS *frag; |
| 5021 | int where; |
| 5022 | int size; |
| 5023 | expressionS *exp; |
| 5024 | { |
| 5025 | bfd_reloc_code_real_type r; |
| 5026 | bfd_boolean plt = FALSE; |
| 5027 | |
| 5028 | if (*input_line_pointer == '@') |
| 5029 | { |
| 5030 | if (!strncmp (input_line_pointer, PLT_SUFFIX, strlen (PLT_SUFFIX) - 1) |
| 5031 | && !strncmp (input_line_pointer, plt_suffix, |
| 5032 | strlen (plt_suffix) - 1)) |
| 5033 | { |
| 5034 | as_bad (_("undefined @ suffix '%s', expected '%s'"), |
| 5035 | input_line_pointer, plt_suffix); |
| 5036 | ignore_rest_of_line (); |
| 5037 | return; |
| 5038 | } |
| 5039 | |
| 5040 | input_line_pointer += strlen (plt_suffix); |
| 5041 | plt = TRUE; |
| 5042 | } |
| 5043 | |
| 5044 | switch (size) |
| 5045 | { |
| 5046 | case 1: |
| 5047 | r = BFD_RELOC_8; |
| 5048 | break; |
| 5049 | case 2: |
| 5050 | r = BFD_RELOC_16; |
| 5051 | break; |
| 5052 | case 4: |
| 5053 | r = plt ? BFD_RELOC_XTENSA_PLT : BFD_RELOC_32; |
| 5054 | break; |
| 5055 | case 8: |
| 5056 | r = BFD_RELOC_64; |
| 5057 | break; |
| 5058 | default: |
| 5059 | as_bad (_("unsupported BFD relocation size %u"), size); |
| 5060 | r = BFD_RELOC_32; |
| 5061 | break; |
| 5062 | } |
| 5063 | fix_new_exp (frag, where, size, exp, 0, r); |
| 5064 | } |
| 5065 | |
| 5066 | |
| 5067 | /* TC_FRAG_INIT hook */ |
| 5068 | |
| 5069 | void |
| 5070 | xtensa_frag_init (frag) |
| 5071 | fragS *frag; |
| 5072 | { |
| 5073 | frag->tc_frag_data.is_no_density = !code_density_available (); |
| 5074 | } |
| 5075 | |
| 5076 | |
| 5077 | symbolS * |
| 5078 | md_undefined_symbol (name) |
| 5079 | char *name ATTRIBUTE_UNUSED; |
| 5080 | { |
| 5081 | return NULL; |
| 5082 | } |
| 5083 | |
| 5084 | |
| 5085 | /* Round up a section size to the appropriate boundary. */ |
| 5086 | |
| 5087 | valueT |
| 5088 | md_section_align (segment, size) |
| 5089 | segT segment ATTRIBUTE_UNUSED; |
| 5090 | valueT size; |
| 5091 | { |
| 5092 | return size; /* Byte alignment is fine. */ |
| 5093 | } |
| 5094 | |
| 5095 | |
| 5096 | long |
| 5097 | md_pcrel_from (fixP) |
| 5098 | fixS *fixP; |
| 5099 | { |
| 5100 | char *insn_p; |
| 5101 | static xtensa_insnbuf insnbuf = NULL; |
| 5102 | int opnum; |
| 5103 | xtensa_operand operand; |
| 5104 | xtensa_opcode opcode; |
| 5105 | xtensa_isa isa = xtensa_default_isa; |
| 5106 | valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; |
| 5107 | |
| 5108 | if (fixP->fx_done) |
| 5109 | return addr; |
| 5110 | |
| 5111 | if (fixP->fx_r_type == BFD_RELOC_XTENSA_ASM_EXPAND) |
| 5112 | return addr; |
| 5113 | |
| 5114 | if (!insnbuf) |
| 5115 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 5116 | |
| 5117 | insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where]; |
| 5118 | xtensa_insnbuf_from_chars (isa, insnbuf, insn_p); |
| 5119 | opcode = xtensa_decode_insn (isa, insnbuf); |
| 5120 | |
| 5121 | opnum = reloc_to_opnum (fixP->fx_r_type); |
| 5122 | |
| 5123 | if (opnum < 0) |
| 5124 | as_fatal (_("invalid operand relocation for '%s' instruction"), |
| 5125 | xtensa_opcode_name (isa, opcode)); |
| 5126 | if (opnum >= xtensa_num_operands (isa, opcode)) |
| 5127 | as_fatal (_("invalid relocation for operand %d in '%s' instruction"), |
| 5128 | opnum, xtensa_opcode_name (isa, opcode)); |
| 5129 | operand = xtensa_get_operand (isa, opcode, opnum); |
| 5130 | if (!operand) |
| 5131 | { |
| 5132 | as_warn_where (fixP->fx_file, |
| 5133 | fixP->fx_line, |
| 5134 | _("invalid relocation type %d for %s instruction"), |
| 5135 | fixP->fx_r_type, xtensa_opcode_name (isa, opcode)); |
| 5136 | return addr; |
| 5137 | } |
| 5138 | |
| 5139 | if (!operand_is_pcrel_label (operand)) |
| 5140 | { |
| 5141 | as_bad_where (fixP->fx_file, |
| 5142 | fixP->fx_line, |
| 5143 | _("invalid relocation for operand %d of '%s'"), |
| 5144 | opnum, xtensa_opcode_name (isa, opcode)); |
| 5145 | return addr; |
| 5146 | } |
| 5147 | if (!xtensa_operand_isPCRelative (operand)) |
| 5148 | { |
| 5149 | as_warn_where (fixP->fx_file, |
| 5150 | fixP->fx_line, |
| 5151 | _("non-PCREL relocation operand %d for '%s': %s"), |
| 5152 | opnum, xtensa_opcode_name (isa, opcode), |
| 5153 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
| 5154 | return addr; |
| 5155 | } |
| 5156 | |
| 5157 | return 0 - xtensa_operand_do_reloc (operand, 0, addr); |
| 5158 | } |
| 5159 | |
| 5160 | |
| 5161 | /* tc_symbol_new_hook */ |
| 5162 | |
| 5163 | void |
| 5164 | xtensa_symbol_new_hook (symbolP) |
| 5165 | symbolS *symbolP; |
| 5166 | { |
| 5167 | symbol_get_tc (symbolP)->plt = 0; |
| 5168 | } |
| 5169 | |
| 5170 | |
| 5171 | /* tc_fix_adjustable hook */ |
| 5172 | |
| 5173 | bfd_boolean |
| 5174 | xtensa_fix_adjustable (fixP) |
| 5175 | fixS *fixP; |
| 5176 | { |
| 5177 | /* We need the symbol name for the VTABLE entries. */ |
| 5178 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
| 5179 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
| 5180 | return 0; |
| 5181 | |
| 5182 | return 1; |
| 5183 | } |
| 5184 | |
| 5185 | |
| 5186 | void |
| 5187 | md_apply_fix3 (fixP, valP, seg) |
| 5188 | fixS *fixP; |
| 5189 | valueT *valP; |
| 5190 | segT seg ATTRIBUTE_UNUSED; |
| 5191 | { |
| 5192 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) |
| 5193 | { |
| 5194 | /* This happens when the relocation is within the current section. |
| 5195 | It seems this implies a PCREL operation. We'll catch it and error |
| 5196 | if not. */ |
| 5197 | |
| 5198 | char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where; |
| 5199 | static xtensa_insnbuf insnbuf = NULL; |
| 5200 | xtensa_opcode opcode; |
| 5201 | xtensa_isa isa; |
| 5202 | |
| 5203 | switch (fixP->fx_r_type) |
| 5204 | { |
| 5205 | case BFD_RELOC_XTENSA_ASM_EXPAND: |
| 5206 | fixP->fx_done = 1; |
| 5207 | break; |
| 5208 | |
| 5209 | case BFD_RELOC_XTENSA_ASM_SIMPLIFY: |
| 5210 | as_bad (_("unhandled local relocation fix %s"), |
| 5211 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
| 5212 | break; |
| 5213 | |
| 5214 | case BFD_RELOC_32: |
| 5215 | case BFD_RELOC_16: |
| 5216 | case BFD_RELOC_8: |
| 5217 | /* The only one we support that isn't an instruction field. */ |
| 5218 | md_number_to_chars (fixpos, *valP, fixP->fx_size); |
| 5219 | fixP->fx_done = 1; |
| 5220 | break; |
| 5221 | |
| 5222 | case BFD_RELOC_XTENSA_OP0: |
| 5223 | case BFD_RELOC_XTENSA_OP1: |
| 5224 | case BFD_RELOC_XTENSA_OP2: |
| 5225 | isa = xtensa_default_isa; |
| 5226 | if (!insnbuf) |
| 5227 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 5228 | |
| 5229 | xtensa_insnbuf_from_chars (isa, insnbuf, fixpos); |
| 5230 | opcode = xtensa_decode_insn (isa, insnbuf); |
| 5231 | if (opcode == XTENSA_UNDEFINED) |
| 5232 | as_fatal (_("undecodable FIX")); |
| 5233 | |
| 5234 | xtensa_insnbuf_set_immediate_field (opcode, insnbuf, *valP, |
| 5235 | fixP->fx_file, fixP->fx_line); |
| 5236 | |
| 5237 | fixP->fx_frag->tc_frag_data.is_insn = TRUE; |
| 5238 | xtensa_insnbuf_to_chars (isa, insnbuf, fixpos); |
| 5239 | fixP->fx_done = 1; |
| 5240 | break; |
| 5241 | |
| 5242 | case BFD_RELOC_VTABLE_INHERIT: |
| 5243 | case BFD_RELOC_VTABLE_ENTRY: |
| 5244 | fixP->fx_done = 0; |
| 5245 | break; |
| 5246 | |
| 5247 | default: |
| 5248 | as_bad (_("unhandled local relocation fix %s"), |
| 5249 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
| 5250 | } |
| 5251 | } |
| 5252 | } |
| 5253 | |
| 5254 | |
| 5255 | char * |
| 5256 | md_atof (type, litP, sizeP) |
| 5257 | int type; |
| 5258 | char *litP; |
| 5259 | int *sizeP; |
| 5260 | { |
| 5261 | int prec; |
| 5262 | LITTLENUM_TYPE words[4]; |
| 5263 | char *t; |
| 5264 | int i; |
| 5265 | |
| 5266 | switch (type) |
| 5267 | { |
| 5268 | case 'f': |
| 5269 | prec = 2; |
| 5270 | break; |
| 5271 | |
| 5272 | case 'd': |
| 5273 | prec = 4; |
| 5274 | break; |
| 5275 | |
| 5276 | default: |
| 5277 | *sizeP = 0; |
| 5278 | return "bad call to md_atof"; |
| 5279 | } |
| 5280 | |
| 5281 | t = atof_ieee (input_line_pointer, type, words); |
| 5282 | if (t) |
| 5283 | input_line_pointer = t; |
| 5284 | |
| 5285 | *sizeP = prec * 2; |
| 5286 | |
| 5287 | for (i = prec - 1; i >= 0; i--) |
| 5288 | { |
| 5289 | int idx = i; |
| 5290 | if (target_big_endian) |
| 5291 | idx = (prec - 1 - i); |
| 5292 | |
| 5293 | md_number_to_chars (litP, (valueT) words[idx], 2); |
| 5294 | litP += 2; |
| 5295 | } |
| 5296 | |
| 5297 | return NULL; |
| 5298 | } |
| 5299 | |
| 5300 | |
| 5301 | int |
| 5302 | md_estimate_size_before_relax (fragP, seg) |
| 5303 | fragS *fragP; |
| 5304 | segT seg ATTRIBUTE_UNUSED; |
| 5305 | { |
| 5306 | return fragP->tc_frag_data.text_expansion; |
| 5307 | } |
| 5308 | |
| 5309 | |
| 5310 | /* Translate internal representation of relocation info to BFD target |
| 5311 | format. */ |
| 5312 | |
| 5313 | arelent * |
| 5314 | tc_gen_reloc (section, fixp) |
| 5315 | asection *section ATTRIBUTE_UNUSED; |
| 5316 | fixS *fixp; |
| 5317 | { |
| 5318 | arelent *reloc; |
| 5319 | |
| 5320 | reloc = (arelent *) xmalloc (sizeof (arelent)); |
| 5321 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
| 5322 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
| 5323 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
| 5324 | |
| 5325 | /* Make sure none of our internal relocations make it this far. |
| 5326 | They'd better have been fully resolved by this point. */ |
| 5327 | assert ((int) fixp->fx_r_type > 0); |
| 5328 | |
| 5329 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); |
| 5330 | if (reloc->howto == NULL) |
| 5331 | { |
| 5332 | as_bad_where (fixp->fx_file, fixp->fx_line, |
| 5333 | _("cannot represent `%s' relocation in object file"), |
| 5334 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
| 5335 | return NULL; |
| 5336 | } |
| 5337 | |
| 5338 | if (!fixp->fx_pcrel != !reloc->howto->pc_relative) |
| 5339 | { |
| 5340 | as_fatal (_("internal error? cannot generate `%s' relocation"), |
| 5341 | bfd_get_reloc_code_name (fixp->fx_r_type)); |
| 5342 | } |
| 5343 | assert (!fixp->fx_pcrel == !reloc->howto->pc_relative); |
| 5344 | |
| 5345 | reloc->addend = fixp->fx_offset; |
| 5346 | |
| 5347 | switch (fixp->fx_r_type) |
| 5348 | { |
| 5349 | case BFD_RELOC_XTENSA_OP0: |
| 5350 | case BFD_RELOC_XTENSA_OP1: |
| 5351 | case BFD_RELOC_XTENSA_OP2: |
| 5352 | case BFD_RELOC_XTENSA_ASM_EXPAND: |
| 5353 | case BFD_RELOC_32: |
| 5354 | case BFD_RELOC_XTENSA_PLT: |
| 5355 | case BFD_RELOC_VTABLE_INHERIT: |
| 5356 | case BFD_RELOC_VTABLE_ENTRY: |
| 5357 | break; |
| 5358 | |
| 5359 | case BFD_RELOC_XTENSA_ASM_SIMPLIFY: |
| 5360 | as_warn (_("emitting simplification relocation")); |
| 5361 | break; |
| 5362 | |
| 5363 | default: |
| 5364 | as_warn (_("emitting unknown relocation")); |
| 5365 | } |
| 5366 | |
| 5367 | return reloc; |
| 5368 | } |
| 5369 | |
| 5370 | \f |
| 5371 | void |
| 5372 | xtensa_end () |
| 5373 | { |
| 5374 | directive_balance (); |
| 5375 | xtensa_move_literals (); |
| 5376 | |
| 5377 | xtensa_reorder_segments (); |
| 5378 | xtensa_cleanup_align_frags (); |
| 5379 | xtensa_fix_target_frags (); |
| 5380 | if (software_a0_b_retw_interlock && has_a0_b_retw) |
| 5381 | xtensa_fix_a0_b_retw_frags (); |
| 5382 | if (software_avoid_b_j_loop_end && maybe_has_b_j_loop_end) |
| 5383 | xtensa_fix_b_j_loop_end_frags (); |
| 5384 | |
| 5385 | /* "close_loop_end" should be processed BEFORE "short_loop". */ |
| 5386 | if (software_avoid_close_loop_end && maybe_has_close_loop_end) |
| 5387 | xtensa_fix_close_loop_end_frags (); |
| 5388 | |
| 5389 | if (software_avoid_short_loop && maybe_has_short_loop) |
| 5390 | xtensa_fix_short_loop_frags (); |
| 5391 | |
| 5392 | xtensa_sanity_check (); |
| 5393 | } |
| 5394 | |
| 5395 | |
| 5396 | static void |
| 5397 | xtensa_cleanup_align_frags () |
| 5398 | { |
| 5399 | frchainS *frchP; |
| 5400 | |
| 5401 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5402 | { |
| 5403 | fragS *fragP; |
| 5404 | |
| 5405 | /* Walk over all of the fragments in a subsection. */ |
| 5406 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5407 | { |
| 5408 | if ((fragP->fr_type == rs_align |
| 5409 | || fragP->fr_type == rs_align_code |
| 5410 | || (fragP->fr_type == rs_machine_dependent |
| 5411 | && (fragP->fr_subtype == RELAX_DESIRE_ALIGN |
| 5412 | || fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET))) |
| 5413 | && fragP->fr_fix == 0) |
| 5414 | { |
| 5415 | fragS * next = fragP->fr_next; |
| 5416 | |
| 5417 | while (next |
| 5418 | && next->fr_type == rs_machine_dependent |
| 5419 | && next->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET) |
| 5420 | { |
| 5421 | frag_wane (next); |
| 5422 | next = next->fr_next; |
| 5423 | } |
| 5424 | } |
| 5425 | } |
| 5426 | } |
| 5427 | } |
| 5428 | |
| 5429 | |
| 5430 | /* Re-process all of the fragments looking to convert all of the |
| 5431 | RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch |
| 5432 | target in the next fragment, convert this to RELAX_DESIRE_ALIGN. |
| 5433 | If the next fragment starts with a loop target, AND the previous |
| 5434 | fragment can be expanded to negate the branch, convert this to a |
| 5435 | RELAX_LOOP_END. Otherwise, convert to a .fill 0. */ |
| 5436 | |
| 5437 | static void |
| 5438 | xtensa_fix_target_frags () |
| 5439 | { |
| 5440 | frchainS *frchP; |
| 5441 | |
| 5442 | /* When this routine is called, all of the subsections are still intact |
| 5443 | so we walk over subsections instead of sections. */ |
| 5444 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5445 | { |
| 5446 | bfd_boolean prev_frag_can_negate_branch = FALSE; |
| 5447 | fragS *fragP; |
| 5448 | |
| 5449 | /* Walk over all of the fragments in a subsection. */ |
| 5450 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5451 | { |
| 5452 | if (fragP->fr_type == rs_machine_dependent |
| 5453 | && fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET) |
| 5454 | { |
| 5455 | if (next_frag_is_loop_target (fragP)) |
| 5456 | { |
| 5457 | if (prev_frag_can_negate_branch) |
| 5458 | fragP->fr_subtype = RELAX_LOOP_END; |
| 5459 | else |
| 5460 | { |
| 5461 | if (!align_only_targets || |
| 5462 | next_frag_is_branch_target (fragP)) |
| 5463 | fragP->fr_subtype = RELAX_DESIRE_ALIGN; |
| 5464 | else |
| 5465 | frag_wane (fragP); |
| 5466 | } |
| 5467 | } |
| 5468 | else if (!align_only_targets |
| 5469 | || next_frag_is_branch_target (fragP)) |
| 5470 | fragP->fr_subtype = RELAX_DESIRE_ALIGN; |
| 5471 | else |
| 5472 | frag_wane (fragP); |
| 5473 | } |
| 5474 | if (fragP->fr_fix != 0) |
| 5475 | prev_frag_can_negate_branch = FALSE; |
| 5476 | if (frag_can_negate_branch (fragP)) |
| 5477 | prev_frag_can_negate_branch = TRUE; |
| 5478 | } |
| 5479 | } |
| 5480 | } |
| 5481 | |
| 5482 | |
| 5483 | static bfd_boolean |
| 5484 | frag_can_negate_branch (fragP) |
| 5485 | fragS *fragP; |
| 5486 | { |
| 5487 | if (fragP->fr_type == rs_machine_dependent |
| 5488 | && fragP->fr_subtype == RELAX_IMMED) |
| 5489 | { |
| 5490 | TInsn t_insn; |
| 5491 | tinsn_from_chars (&t_insn, fragP->fr_opcode); |
| 5492 | if (is_negatable_branch (&t_insn)) |
| 5493 | return TRUE; |
| 5494 | } |
| 5495 | return FALSE; |
| 5496 | } |
| 5497 | |
| 5498 | |
| 5499 | /* Re-process all of the fragments looking to convert all of the |
| 5500 | RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a |
| 5501 | conditional branch or a retw/retw.n, convert this frag to one that |
| 5502 | will generate a NOP. In any case close it off with a .fill 0. */ |
| 5503 | |
| 5504 | static void |
| 5505 | xtensa_fix_a0_b_retw_frags () |
| 5506 | { |
| 5507 | frchainS *frchP; |
| 5508 | |
| 5509 | /* When this routine is called, all of the subsections are still intact |
| 5510 | so we walk over subsections instead of sections. */ |
| 5511 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5512 | { |
| 5513 | fragS *fragP; |
| 5514 | |
| 5515 | /* Walk over all of the fragments in a subsection. */ |
| 5516 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5517 | { |
| 5518 | if (fragP->fr_type == rs_machine_dependent |
| 5519 | && fragP->fr_subtype == RELAX_ADD_NOP_IF_A0_B_RETW) |
| 5520 | { |
| 5521 | if (next_instrs_are_b_retw (fragP)) |
| 5522 | relax_frag_add_nop (fragP); |
| 5523 | else |
| 5524 | frag_wane (fragP); |
| 5525 | } |
| 5526 | } |
| 5527 | } |
| 5528 | } |
| 5529 | |
| 5530 | |
| 5531 | bfd_boolean |
| 5532 | next_instrs_are_b_retw (fragP) |
| 5533 | fragS * fragP; |
| 5534 | { |
| 5535 | xtensa_opcode opcode; |
| 5536 | const fragS *next_fragP = next_non_empty_frag (fragP); |
| 5537 | static xtensa_insnbuf insnbuf = NULL; |
| 5538 | xtensa_isa isa = xtensa_default_isa; |
| 5539 | int offset = 0; |
| 5540 | |
| 5541 | if (!insnbuf) |
| 5542 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 5543 | |
| 5544 | if (next_fragP == NULL) |
| 5545 | return FALSE; |
| 5546 | |
| 5547 | /* Check for the conditional branch. */ |
| 5548 | xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]); |
| 5549 | opcode = xtensa_decode_insn (isa, insnbuf); |
| 5550 | |
| 5551 | if (!is_conditional_branch_opcode (opcode)) |
| 5552 | return FALSE; |
| 5553 | |
| 5554 | offset += xtensa_insn_length (isa, opcode); |
| 5555 | if (offset == next_fragP->fr_fix) |
| 5556 | { |
| 5557 | next_fragP = next_non_empty_frag (next_fragP); |
| 5558 | offset = 0; |
| 5559 | } |
| 5560 | if (next_fragP == NULL) |
| 5561 | return FALSE; |
| 5562 | |
| 5563 | /* Check for the retw/retw.n. */ |
| 5564 | xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]); |
| 5565 | opcode = xtensa_decode_insn (isa, insnbuf); |
| 5566 | |
| 5567 | if (is_windowed_return_opcode (opcode)) |
| 5568 | return TRUE; |
| 5569 | return FALSE; |
| 5570 | } |
| 5571 | |
| 5572 | |
| 5573 | /* Re-process all of the fragments looking to convert all of the |
| 5574 | RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a |
| 5575 | loop end label, convert this frag to one that will generate a NOP. |
| 5576 | In any case close it off with a .fill 0. */ |
| 5577 | |
| 5578 | static void |
| 5579 | xtensa_fix_b_j_loop_end_frags () |
| 5580 | { |
| 5581 | frchainS *frchP; |
| 5582 | |
| 5583 | /* When this routine is called, all of the subsections are still intact |
| 5584 | so we walk over subsections instead of sections. */ |
| 5585 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5586 | { |
| 5587 | fragS *fragP; |
| 5588 | |
| 5589 | /* Walk over all of the fragments in a subsection. */ |
| 5590 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5591 | { |
| 5592 | if (fragP->fr_type == rs_machine_dependent |
| 5593 | && fragP->fr_subtype == RELAX_ADD_NOP_IF_PRE_LOOP_END) |
| 5594 | { |
| 5595 | if (next_instr_is_loop_end (fragP)) |
| 5596 | relax_frag_add_nop (fragP); |
| 5597 | else |
| 5598 | frag_wane (fragP); |
| 5599 | } |
| 5600 | } |
| 5601 | } |
| 5602 | } |
| 5603 | |
| 5604 | |
| 5605 | bfd_boolean |
| 5606 | next_instr_is_loop_end (fragP) |
| 5607 | fragS * fragP; |
| 5608 | { |
| 5609 | const fragS *next_fragP; |
| 5610 | |
| 5611 | if (next_frag_is_loop_target (fragP)) |
| 5612 | return FALSE; |
| 5613 | |
| 5614 | next_fragP = next_non_empty_frag (fragP); |
| 5615 | if (next_fragP == NULL) |
| 5616 | return FALSE; |
| 5617 | |
| 5618 | if (!next_frag_is_loop_target (next_fragP)) |
| 5619 | return FALSE; |
| 5620 | |
| 5621 | /* If the size is >= 3 then there is more than one instruction here. |
| 5622 | The hardware bug will not fire. */ |
| 5623 | if (next_fragP->fr_fix > 3) |
| 5624 | return FALSE; |
| 5625 | |
| 5626 | return TRUE; |
| 5627 | } |
| 5628 | |
| 5629 | |
| 5630 | /* Re-process all of the fragments looking to convert all of the |
| 5631 | RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is |
| 5632 | not MY loop's loop end within 12 bytes, add enough nops here to |
| 5633 | make it at least 12 bytes away. In any case close it off with a |
| 5634 | .fill 0. */ |
| 5635 | |
| 5636 | static void |
| 5637 | xtensa_fix_close_loop_end_frags () |
| 5638 | { |
| 5639 | frchainS *frchP; |
| 5640 | |
| 5641 | /* When this routine is called, all of the subsections are still intact |
| 5642 | so we walk over subsections instead of sections. */ |
| 5643 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5644 | { |
| 5645 | fragS *fragP; |
| 5646 | |
| 5647 | fragS *current_target = NULL; |
| 5648 | offsetT current_offset = 0; |
| 5649 | |
| 5650 | /* Walk over all of the fragments in a subsection. */ |
| 5651 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5652 | { |
| 5653 | if (fragP->fr_type == rs_machine_dependent |
| 5654 | && fragP->fr_subtype == RELAX_IMMED) |
| 5655 | { |
| 5656 | /* Read it. If the instruction is a loop, get the target. */ |
| 5657 | xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode); |
| 5658 | if (is_loop_opcode (opcode)) |
| 5659 | { |
| 5660 | TInsn t_insn; |
| 5661 | |
| 5662 | tinsn_from_chars (&t_insn, fragP->fr_opcode); |
| 5663 | tinsn_immed_from_frag (&t_insn, fragP); |
| 5664 | |
| 5665 | /* Get the current fragment target. */ |
| 5666 | if (fragP->fr_symbol) |
| 5667 | { |
| 5668 | current_target = symbol_get_frag (fragP->fr_symbol); |
| 5669 | current_offset = fragP->fr_offset; |
| 5670 | } |
| 5671 | } |
| 5672 | } |
| 5673 | |
| 5674 | if (current_target |
| 5675 | && fragP->fr_type == rs_machine_dependent |
| 5676 | && fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END) |
| 5677 | { |
| 5678 | size_t min_bytes; |
| 5679 | size_t bytes_added = 0; |
| 5680 | |
| 5681 | #define REQUIRED_LOOP_DIVIDING_BYTES 12 |
| 5682 | /* Max out at 12. */ |
| 5683 | min_bytes = min_bytes_to_other_loop_end |
| 5684 | (fragP->fr_next, current_target, current_offset, |
| 5685 | REQUIRED_LOOP_DIVIDING_BYTES); |
| 5686 | |
| 5687 | if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES) |
| 5688 | { |
| 5689 | while (min_bytes + bytes_added |
| 5690 | < REQUIRED_LOOP_DIVIDING_BYTES) |
| 5691 | { |
| 5692 | int length = 3; |
| 5693 | |
| 5694 | if (fragP->fr_var < length) |
| 5695 | as_warn (_("fr_var %lu < length %d; ignoring"), |
| 5696 | fragP->fr_var, length); |
| 5697 | else |
| 5698 | { |
| 5699 | assemble_nop (length, |
| 5700 | fragP->fr_literal + fragP->fr_fix); |
| 5701 | fragP->fr_fix += length; |
| 5702 | fragP->fr_var -= length; |
| 5703 | } |
| 5704 | bytes_added += length; |
| 5705 | } |
| 5706 | } |
| 5707 | frag_wane (fragP); |
| 5708 | } |
| 5709 | } |
| 5710 | } |
| 5711 | } |
| 5712 | |
| 5713 | |
| 5714 | size_t |
| 5715 | min_bytes_to_other_loop_end (fragP, current_target, current_offset, max_size) |
| 5716 | fragS *fragP; |
| 5717 | fragS *current_target; |
| 5718 | offsetT current_offset; |
| 5719 | size_t max_size; |
| 5720 | { |
| 5721 | size_t offset = 0; |
| 5722 | fragS *current_fragP; |
| 5723 | |
| 5724 | for (current_fragP = fragP; |
| 5725 | current_fragP; |
| 5726 | current_fragP = current_fragP->fr_next) |
| 5727 | { |
| 5728 | if (current_fragP->tc_frag_data.is_loop_target |
| 5729 | && current_fragP != current_target) |
| 5730 | return offset + current_offset; |
| 5731 | |
| 5732 | offset += unrelaxed_frag_min_size (current_fragP); |
| 5733 | |
| 5734 | if (offset + current_offset >= max_size) |
| 5735 | return max_size; |
| 5736 | } |
| 5737 | return max_size; |
| 5738 | } |
| 5739 | |
| 5740 | |
| 5741 | size_t |
| 5742 | unrelaxed_frag_min_size (fragP) |
| 5743 | fragS * fragP; |
| 5744 | { |
| 5745 | size_t size = fragP->fr_fix; |
| 5746 | |
| 5747 | /* add fill size */ |
| 5748 | if (fragP->fr_type == rs_fill) |
| 5749 | size += fragP->fr_offset; |
| 5750 | |
| 5751 | return size; |
| 5752 | } |
| 5753 | |
| 5754 | |
| 5755 | /* Re-process all of the fragments looking to convert all |
| 5756 | of the RELAX_ADD_NOP_IF_SHORT_LOOP. If: |
| 5757 | |
| 5758 | A) |
| 5759 | 1) the instruction size count to the loop end label |
| 5760 | is too short (<= 2 instructions), |
| 5761 | 2) loop has a jump or branch in it |
| 5762 | |
| 5763 | or B) |
| 5764 | 1) software_avoid_all_short_loops is true |
| 5765 | 2) The generating loop was a 'loopgtz' or 'loopnez' |
| 5766 | 3) the instruction size count to the loop end label is too short |
| 5767 | (<= 2 instructions) |
| 5768 | then convert this frag (and maybe the next one) to generate a NOP. |
| 5769 | In any case close it off with a .fill 0. */ |
| 5770 | |
| 5771 | static void |
| 5772 | xtensa_fix_short_loop_frags () |
| 5773 | { |
| 5774 | frchainS *frchP; |
| 5775 | |
| 5776 | /* When this routine is called, all of the subsections are still intact |
| 5777 | so we walk over subsections instead of sections. */ |
| 5778 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5779 | { |
| 5780 | fragS *fragP; |
| 5781 | fragS *current_target = NULL; |
| 5782 | offsetT current_offset = 0; |
| 5783 | xtensa_opcode current_opcode = XTENSA_UNDEFINED; |
| 5784 | |
| 5785 | /* Walk over all of the fragments in a subsection. */ |
| 5786 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5787 | { |
| 5788 | /* check on the current loop */ |
| 5789 | if (fragP->fr_type == rs_machine_dependent |
| 5790 | && fragP->fr_subtype == RELAX_IMMED) |
| 5791 | { |
| 5792 | /* Read it. If the instruction is a loop, get the target. */ |
| 5793 | xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode); |
| 5794 | if (is_loop_opcode (opcode)) |
| 5795 | { |
| 5796 | TInsn t_insn; |
| 5797 | |
| 5798 | tinsn_from_chars (&t_insn, fragP->fr_opcode); |
| 5799 | tinsn_immed_from_frag (&t_insn, fragP); |
| 5800 | |
| 5801 | /* Get the current fragment target. */ |
| 5802 | if (fragP->fr_symbol) |
| 5803 | { |
| 5804 | current_target = symbol_get_frag (fragP->fr_symbol); |
| 5805 | current_offset = fragP->fr_offset; |
| 5806 | current_opcode = opcode; |
| 5807 | } |
| 5808 | } |
| 5809 | } |
| 5810 | |
| 5811 | if (fragP->fr_type == rs_machine_dependent |
| 5812 | && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP) |
| 5813 | { |
| 5814 | size_t insn_count = |
| 5815 | count_insns_to_loop_end (fragP->fr_next, TRUE, 3); |
| 5816 | if (insn_count < 3 |
| 5817 | && (branch_before_loop_end (fragP->fr_next) |
| 5818 | || (software_avoid_all_short_loops |
| 5819 | && current_opcode != XTENSA_UNDEFINED |
| 5820 | && !is_the_loop_opcode (current_opcode)))) |
| 5821 | relax_frag_add_nop (fragP); |
| 5822 | else |
| 5823 | frag_wane (fragP); |
| 5824 | } |
| 5825 | } |
| 5826 | } |
| 5827 | } |
| 5828 | |
| 5829 | |
| 5830 | size_t |
| 5831 | count_insns_to_loop_end (base_fragP, count_relax_add, max_count) |
| 5832 | fragS *base_fragP; |
| 5833 | bfd_boolean count_relax_add; |
| 5834 | size_t max_count; |
| 5835 | { |
| 5836 | fragS *fragP = NULL; |
| 5837 | size_t insn_count = 0; |
| 5838 | |
| 5839 | fragP = base_fragP; |
| 5840 | |
| 5841 | for (; fragP && !fragP->tc_frag_data.is_loop_target; fragP = fragP->fr_next) |
| 5842 | { |
| 5843 | insn_count += unrelaxed_frag_min_insn_count (fragP); |
| 5844 | if (insn_count >= max_count) |
| 5845 | return max_count; |
| 5846 | |
| 5847 | if (count_relax_add) |
| 5848 | { |
| 5849 | if (fragP->fr_type == rs_machine_dependent |
| 5850 | && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP) |
| 5851 | { |
| 5852 | /* In order to add the appropriate number of |
| 5853 | NOPs, we count an instruction for downstream |
| 5854 | occurrences. */ |
| 5855 | insn_count++; |
| 5856 | if (insn_count >= max_count) |
| 5857 | return max_count; |
| 5858 | } |
| 5859 | } |
| 5860 | } |
| 5861 | return insn_count; |
| 5862 | } |
| 5863 | |
| 5864 | |
| 5865 | size_t |
| 5866 | unrelaxed_frag_min_insn_count (fragP) |
| 5867 | fragS *fragP; |
| 5868 | { |
| 5869 | size_t insn_count = 0; |
| 5870 | int offset = 0; |
| 5871 | |
| 5872 | if (!fragP->tc_frag_data.is_insn) |
| 5873 | return insn_count; |
| 5874 | |
| 5875 | /* Decode the fixed instructions. */ |
| 5876 | while (offset < fragP->fr_fix) |
| 5877 | { |
| 5878 | xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset); |
| 5879 | if (opcode == XTENSA_UNDEFINED) |
| 5880 | { |
| 5881 | as_fatal (_("undecodable instruction in instruction frag")); |
| 5882 | return insn_count; |
| 5883 | } |
| 5884 | offset += xtensa_insn_length (xtensa_default_isa, opcode); |
| 5885 | insn_count++; |
| 5886 | } |
| 5887 | |
| 5888 | return insn_count; |
| 5889 | } |
| 5890 | |
| 5891 | |
| 5892 | bfd_boolean |
| 5893 | branch_before_loop_end (base_fragP) |
| 5894 | fragS *base_fragP; |
| 5895 | { |
| 5896 | fragS *fragP; |
| 5897 | |
| 5898 | for (fragP = base_fragP; |
| 5899 | fragP && !fragP->tc_frag_data.is_loop_target; |
| 5900 | fragP = fragP->fr_next) |
| 5901 | { |
| 5902 | if (unrelaxed_frag_has_b_j (fragP)) |
| 5903 | return TRUE; |
| 5904 | } |
| 5905 | return FALSE; |
| 5906 | } |
| 5907 | |
| 5908 | |
| 5909 | bfd_boolean |
| 5910 | unrelaxed_frag_has_b_j (fragP) |
| 5911 | fragS *fragP; |
| 5912 | { |
| 5913 | size_t insn_count = 0; |
| 5914 | int offset = 0; |
| 5915 | |
| 5916 | if (!fragP->tc_frag_data.is_insn) |
| 5917 | return FALSE; |
| 5918 | |
| 5919 | /* Decode the fixed instructions. */ |
| 5920 | while (offset < fragP->fr_fix) |
| 5921 | { |
| 5922 | xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset); |
| 5923 | if (opcode == XTENSA_UNDEFINED) |
| 5924 | { |
| 5925 | as_fatal (_("undecodable instruction in instruction frag")); |
| 5926 | return insn_count; |
| 5927 | } |
| 5928 | if (is_branch_or_jump_opcode (opcode)) |
| 5929 | return TRUE; |
| 5930 | offset += xtensa_insn_length (xtensa_default_isa, opcode); |
| 5931 | } |
| 5932 | return FALSE; |
| 5933 | } |
| 5934 | |
| 5935 | |
| 5936 | /* Checks to be made after initial assembly but before relaxation. */ |
| 5937 | |
| 5938 | static void |
| 5939 | xtensa_sanity_check () |
| 5940 | { |
| 5941 | char *file_name; |
| 5942 | int line; |
| 5943 | |
| 5944 | frchainS *frchP; |
| 5945 | |
| 5946 | as_where (&file_name, &line); |
| 5947 | for (frchP = frchain_root; frchP; frchP = frchP->frch_next) |
| 5948 | { |
| 5949 | fragS *fragP; |
| 5950 | |
| 5951 | /* Walk over all of the fragments in a subsection. */ |
| 5952 | for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next) |
| 5953 | { |
| 5954 | /* Currently we only check for empty loops here. */ |
| 5955 | if (fragP->fr_type == rs_machine_dependent |
| 5956 | && fragP->fr_subtype == RELAX_IMMED) |
| 5957 | { |
| 5958 | static xtensa_insnbuf insnbuf = NULL; |
| 5959 | TInsn t_insn; |
| 5960 | |
| 5961 | if (fragP->fr_opcode != NULL) |
| 5962 | { |
| 5963 | if (!insnbuf) |
| 5964 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 5965 | tinsn_from_chars (&t_insn, fragP->fr_opcode); |
| 5966 | tinsn_immed_from_frag (&t_insn, fragP); |
| 5967 | |
| 5968 | if (is_loop_opcode (t_insn.opcode)) |
| 5969 | { |
| 5970 | if (is_empty_loop (&t_insn, fragP)) |
| 5971 | { |
| 5972 | new_logical_line (fragP->fr_file, fragP->fr_line); |
| 5973 | as_bad (_("invalid empty loop")); |
| 5974 | } |
| 5975 | if (!is_local_forward_loop (&t_insn, fragP)) |
| 5976 | { |
| 5977 | new_logical_line (fragP->fr_file, fragP->fr_line); |
| 5978 | as_bad (_("loop target does not follow " |
| 5979 | "loop instruction in section")); |
| 5980 | } |
| 5981 | } |
| 5982 | } |
| 5983 | } |
| 5984 | } |
| 5985 | } |
| 5986 | new_logical_line (file_name, line); |
| 5987 | } |
| 5988 | |
| 5989 | |
| 5990 | #define LOOP_IMMED_OPN 1 |
| 5991 | |
| 5992 | /* Return true if the loop target is the next non-zero fragment. */ |
| 5993 | |
| 5994 | bfd_boolean |
| 5995 | is_empty_loop (insn, fragP) |
| 5996 | const TInsn *insn; |
| 5997 | fragS *fragP; |
| 5998 | { |
| 5999 | const expressionS *expr; |
| 6000 | symbolS *symbolP; |
| 6001 | fragS *next_fragP; |
| 6002 | |
| 6003 | if (insn->insn_type != ITYPE_INSN) |
| 6004 | return FALSE; |
| 6005 | |
| 6006 | if (!is_loop_opcode (insn->opcode)) |
| 6007 | return FALSE; |
| 6008 | |
| 6009 | if (insn->ntok <= LOOP_IMMED_OPN) |
| 6010 | return FALSE; |
| 6011 | |
| 6012 | expr = &insn->tok[LOOP_IMMED_OPN]; |
| 6013 | |
| 6014 | if (expr->X_op != O_symbol) |
| 6015 | return FALSE; |
| 6016 | |
| 6017 | symbolP = expr->X_add_symbol; |
| 6018 | if (!symbolP) |
| 6019 | return FALSE; |
| 6020 | |
| 6021 | if (symbol_get_frag (symbolP) == NULL) |
| 6022 | return FALSE; |
| 6023 | |
| 6024 | if (S_GET_VALUE (symbolP) != 0) |
| 6025 | return FALSE; |
| 6026 | |
| 6027 | /* Walk through the zero-size fragments from this one. If we find |
| 6028 | the target fragment, then this is a zero-size loop. */ |
| 6029 | for (next_fragP = fragP->fr_next; |
| 6030 | next_fragP != NULL; |
| 6031 | next_fragP = next_fragP->fr_next) |
| 6032 | { |
| 6033 | if (next_fragP == symbol_get_frag (symbolP)) |
| 6034 | return TRUE; |
| 6035 | if (next_fragP->fr_fix != 0) |
| 6036 | return FALSE; |
| 6037 | } |
| 6038 | return FALSE; |
| 6039 | } |
| 6040 | |
| 6041 | |
| 6042 | bfd_boolean |
| 6043 | is_local_forward_loop (insn, fragP) |
| 6044 | const TInsn *insn; |
| 6045 | fragS *fragP; |
| 6046 | { |
| 6047 | const expressionS *expr; |
| 6048 | symbolS *symbolP; |
| 6049 | fragS *next_fragP; |
| 6050 | |
| 6051 | if (insn->insn_type != ITYPE_INSN) |
| 6052 | return FALSE; |
| 6053 | |
| 6054 | if (!is_loop_opcode (insn->opcode)) |
| 6055 | return FALSE; |
| 6056 | |
| 6057 | if (insn->ntok <= LOOP_IMMED_OPN) |
| 6058 | return FALSE; |
| 6059 | |
| 6060 | expr = &insn->tok[LOOP_IMMED_OPN]; |
| 6061 | |
| 6062 | if (expr->X_op != O_symbol) |
| 6063 | return FALSE; |
| 6064 | |
| 6065 | symbolP = expr->X_add_symbol; |
| 6066 | if (!symbolP) |
| 6067 | return FALSE; |
| 6068 | |
| 6069 | if (symbol_get_frag (symbolP) == NULL) |
| 6070 | return FALSE; |
| 6071 | |
| 6072 | /* Walk through fragments until we find the target. |
| 6073 | If we do not find the target, then this is an invalid loop. */ |
| 6074 | for (next_fragP = fragP->fr_next; |
| 6075 | next_fragP != NULL; |
| 6076 | next_fragP = next_fragP->fr_next) |
| 6077 | if (next_fragP == symbol_get_frag (symbolP)) |
| 6078 | return TRUE; |
| 6079 | |
| 6080 | return FALSE; |
| 6081 | } |
| 6082 | |
| 6083 | \f |
| 6084 | /* Alignment Functions. */ |
| 6085 | |
| 6086 | size_t |
| 6087 | get_text_align_power (target_size) |
| 6088 | int target_size; |
| 6089 | { |
| 6090 | size_t i = 0; |
| 6091 | for (i = 0; i < sizeof (size_t); i++) |
| 6092 | { |
| 6093 | if (target_size <= (1 << i)) |
| 6094 | return i; |
| 6095 | } |
| 6096 | as_fatal (_("get_text_align_power: argument too large")); |
| 6097 | return 0; |
| 6098 | } |
| 6099 | |
| 6100 | |
| 6101 | addressT |
| 6102 | get_text_align_max_fill_size (align_pow, use_nops, use_no_density) |
| 6103 | int align_pow; |
| 6104 | bfd_boolean use_nops; |
| 6105 | bfd_boolean use_no_density; |
| 6106 | { |
| 6107 | if (!use_nops) |
| 6108 | return (1 << align_pow); |
| 6109 | if (use_no_density) |
| 6110 | return 3 * (1 << align_pow); |
| 6111 | |
| 6112 | return 1 + (1 << align_pow); |
| 6113 | } |
| 6114 | |
| 6115 | |
| 6116 | /* get_text_align_fill_size () |
| 6117 | |
| 6118 | Desired alignments: |
| 6119 | give the address |
| 6120 | target_size = size of next instruction |
| 6121 | align_pow = get_text_align_power (target_size). |
| 6122 | use_nops = 0 |
| 6123 | use_no_density = 0; |
| 6124 | Loop alignments: |
| 6125 | address = current address + loop instruction size; |
| 6126 | target_size = 3 (for 2 or 3 byte target) |
| 6127 | = 8 (for 8 byte target) |
| 6128 | align_pow = get_text_align_power (target_size); |
| 6129 | use_nops = 1 |
| 6130 | use_no_density = set appropriately |
| 6131 | Text alignments: |
| 6132 | address = current address + loop instruction size; |
| 6133 | target_size = 0 |
| 6134 | align_pow = get_text_align_power (target_size); |
| 6135 | use_nops = 0 |
| 6136 | use_no_density = 0. */ |
| 6137 | |
| 6138 | addressT |
| 6139 | get_text_align_fill_size (address, align_pow, target_size, |
| 6140 | use_nops, use_no_density) |
| 6141 | addressT address; |
| 6142 | int align_pow; |
| 6143 | int target_size; |
| 6144 | bfd_boolean use_nops; |
| 6145 | bfd_boolean use_no_density; |
| 6146 | { |
| 6147 | /* Input arguments: |
| 6148 | |
| 6149 | align_pow: log2 (required alignment). |
| 6150 | |
| 6151 | target_size: alignment must allow the new_address and |
| 6152 | new_address+target_size-1. |
| 6153 | |
| 6154 | use_nops: if true, then we can only use 2 or 3 byte nops. |
| 6155 | |
| 6156 | use_no_density: if use_nops and use_no_density, we can only use |
| 6157 | 3-byte nops. |
| 6158 | |
| 6159 | Usually, for non-zero target_size, the align_pow is the power of 2 |
| 6160 | that is greater than or equal to the target_size. This handles the |
| 6161 | 2-byte, 3-byte and 8-byte instructions. */ |
| 6162 | |
| 6163 | size_t alignment = (1 << align_pow); |
| 6164 | if (!use_nops) |
| 6165 | { |
| 6166 | /* This is the easy case. */ |
| 6167 | size_t mod; |
| 6168 | mod = address % alignment; |
| 6169 | if (mod != 0) |
| 6170 | mod = alignment - mod; |
| 6171 | assert ((address + mod) % alignment == 0); |
| 6172 | return mod; |
| 6173 | } |
| 6174 | |
| 6175 | /* This is the slightly harder case. */ |
| 6176 | assert ((int) alignment >= target_size); |
| 6177 | assert (target_size > 0); |
| 6178 | if (!use_no_density) |
| 6179 | { |
| 6180 | size_t i; |
| 6181 | for (i = 0; i < alignment * 2; i++) |
| 6182 | { |
| 6183 | if (i == 1) |
| 6184 | continue; |
| 6185 | if ((address + i) >> align_pow == |
| 6186 | (address + i + target_size - 1) >> align_pow) |
| 6187 | return i; |
| 6188 | } |
| 6189 | } |
| 6190 | else |
| 6191 | { |
| 6192 | size_t i; |
| 6193 | |
| 6194 | /* Can only fill multiples of 3. */ |
| 6195 | for (i = 0; i <= alignment * 3; i += 3) |
| 6196 | { |
| 6197 | if ((address + i) >> align_pow == |
| 6198 | (address + i + target_size - 1) >> align_pow) |
| 6199 | return i; |
| 6200 | } |
| 6201 | } |
| 6202 | assert (0); |
| 6203 | return 0; |
| 6204 | } |
| 6205 | |
| 6206 | |
| 6207 | /* This will assert if it is not possible. */ |
| 6208 | |
| 6209 | size_t |
| 6210 | get_text_align_nop_count (fill_size, use_no_density) |
| 6211 | size_t fill_size; |
| 6212 | bfd_boolean use_no_density; |
| 6213 | { |
| 6214 | size_t count = 0; |
| 6215 | if (use_no_density) |
| 6216 | { |
| 6217 | assert (fill_size % 3 == 0); |
| 6218 | return (fill_size / 3); |
| 6219 | } |
| 6220 | |
| 6221 | assert (fill_size != 1); /* Bad argument. */ |
| 6222 | |
| 6223 | while (fill_size > 1) |
| 6224 | { |
| 6225 | size_t insn_size = 3; |
| 6226 | if (fill_size == 2 || fill_size == 4) |
| 6227 | insn_size = 2; |
| 6228 | fill_size -= insn_size; |
| 6229 | count++; |
| 6230 | } |
| 6231 | assert (fill_size != 1); /* Bad algorithm. */ |
| 6232 | return count; |
| 6233 | } |
| 6234 | |
| 6235 | |
| 6236 | size_t |
| 6237 | get_text_align_nth_nop_size (fill_size, n, use_no_density) |
| 6238 | size_t fill_size; |
| 6239 | size_t n; |
| 6240 | bfd_boolean use_no_density; |
| 6241 | { |
| 6242 | size_t count = 0; |
| 6243 | |
| 6244 | assert (get_text_align_nop_count (fill_size, use_no_density) > n); |
| 6245 | |
| 6246 | if (use_no_density) |
| 6247 | return 3; |
| 6248 | |
| 6249 | while (fill_size > 1) |
| 6250 | { |
| 6251 | size_t insn_size = 3; |
| 6252 | if (fill_size == 2 || fill_size == 4) |
| 6253 | insn_size = 2; |
| 6254 | fill_size -= insn_size; |
| 6255 | count++; |
| 6256 | if (n + 1 == count) |
| 6257 | return insn_size; |
| 6258 | } |
| 6259 | assert (0); |
| 6260 | return 0; |
| 6261 | } |
| 6262 | |
| 6263 | |
| 6264 | /* For the given fragment, find the appropriate address |
| 6265 | for it to begin at if we are using NOPs to align it. */ |
| 6266 | |
| 6267 | static addressT |
| 6268 | get_noop_aligned_address (fragP, address) |
| 6269 | fragS *fragP; |
| 6270 | addressT address; |
| 6271 | { |
| 6272 | static xtensa_insnbuf insnbuf = NULL; |
| 6273 | size_t fill_size = 0; |
| 6274 | |
| 6275 | if (!insnbuf) |
| 6276 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 6277 | |
| 6278 | switch (fragP->fr_type) |
| 6279 | { |
| 6280 | case rs_machine_dependent: |
| 6281 | if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE) |
| 6282 | { |
| 6283 | /* The rule is: get next fragment's FIRST instruction. Find |
| 6284 | the smallest number of bytes that need to be added to |
| 6285 | ensure that the next fragment's FIRST instruction will fit |
| 6286 | in a single word. |
| 6287 | |
| 6288 | E.G., 2 bytes : 0, 1, 2 mod 4 |
| 6289 | 3 bytes: 0, 1 mod 4 |
| 6290 | |
| 6291 | If the FIRST instruction MIGHT be relaxed, |
| 6292 | assume that it will become a 3 byte instruction. */ |
| 6293 | |
| 6294 | int target_insn_size; |
| 6295 | xtensa_opcode opcode = next_frag_opcode (fragP); |
| 6296 | addressT pre_opcode_bytes; |
| 6297 | |
| 6298 | if (opcode == XTENSA_UNDEFINED) |
| 6299 | { |
| 6300 | as_bad_where (fragP->fr_file, fragP->fr_line, |
| 6301 | _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE")); |
| 6302 | as_fatal (_("cannot continue")); |
| 6303 | } |
| 6304 | |
| 6305 | target_insn_size = xtensa_insn_length (xtensa_default_isa, opcode); |
| 6306 | |
| 6307 | pre_opcode_bytes = next_frag_pre_opcode_bytes (fragP); |
| 6308 | |
| 6309 | if (is_loop_opcode (opcode)) |
| 6310 | { |
| 6311 | /* next_fragP should be the loop. */ |
| 6312 | const fragS *next_fragP = next_non_empty_frag (fragP); |
| 6313 | xtensa_opcode next_opcode = next_frag_opcode (next_fragP); |
| 6314 | size_t alignment; |
| 6315 | |
| 6316 | pre_opcode_bytes += target_insn_size; |
| 6317 | |
| 6318 | /* For loops, the alignment depends on the size of the |
| 6319 | instruction following the loop, not the loop instruction. */ |
| 6320 | if (next_opcode == XTENSA_UNDEFINED) |
| 6321 | target_insn_size = 3; |
| 6322 | else |
| 6323 | { |
| 6324 | target_insn_size = |
| 6325 | xtensa_insn_length (xtensa_default_isa, next_opcode); |
| 6326 | |
| 6327 | if (target_insn_size == 2) |
| 6328 | target_insn_size = 3; /* ISA specifies this. */ |
| 6329 | } |
| 6330 | |
| 6331 | /* If it was 8, then we'll need a larger alignment |
| 6332 | for the section. */ |
| 6333 | alignment = get_text_align_power (target_insn_size); |
| 6334 | |
| 6335 | /* Is Now_seg valid */ |
| 6336 | record_alignment (now_seg, alignment); |
| 6337 | } |
| 6338 | else |
| 6339 | as_fatal (_("expected loop opcode in relax align next target")); |
| 6340 | |
| 6341 | fill_size = get_text_align_fill_size |
| 6342 | (address + pre_opcode_bytes, |
| 6343 | get_text_align_power (target_insn_size), |
| 6344 | target_insn_size, TRUE, fragP->tc_frag_data.is_no_density); |
| 6345 | } |
| 6346 | break; |
| 6347 | #if 0 |
| 6348 | case rs_align: |
| 6349 | case rs_align_code: |
| 6350 | fill_size = get_text_align_fill_size |
| 6351 | (address, fragP->fr_offset, 1, TRUE, |
| 6352 | fragP->tc_frag_data.is_no_density); |
| 6353 | break; |
| 6354 | #endif |
| 6355 | default: |
| 6356 | as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE")); |
| 6357 | } |
| 6358 | |
| 6359 | return address + fill_size; |
| 6360 | } |
| 6361 | |
| 6362 | |
| 6363 | /* 3 mechanisms for relaxing an alignment: |
| 6364 | |
| 6365 | Align to a power of 2. |
| 6366 | Align so the next fragment's instruction does not cross a word boundary. |
| 6367 | Align the current instruction so that if the next instruction |
| 6368 | were 3 bytes, it would not cross a word boundary. |
| 6369 | |
| 6370 | We can align with: |
| 6371 | |
| 6372 | zeros - This is easy; always insert zeros. |
| 6373 | nops - 3 and 2 byte instructions |
| 6374 | 2 - 2 byte nop |
| 6375 | 3 - 3 byte nop |
| 6376 | 4 - 2, 2-byte nops |
| 6377 | >=5 : 3 byte instruction + fn(n-3) |
| 6378 | widening - widen previous instructions. */ |
| 6379 | |
| 6380 | static addressT |
| 6381 | get_widen_aligned_address (fragP, address) |
| 6382 | fragS *fragP; |
| 6383 | addressT address; |
| 6384 | { |
| 6385 | addressT align_pow, new_address, loop_insn_offset; |
| 6386 | fragS *next_frag; |
| 6387 | int insn_size; |
| 6388 | xtensa_opcode opcode, next_opcode; |
| 6389 | static xtensa_insnbuf insnbuf = NULL; |
| 6390 | |
| 6391 | if (!insnbuf) |
| 6392 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 6393 | |
| 6394 | if (fragP->fr_type == rs_align || fragP->fr_type == rs_align_code) |
| 6395 | { |
| 6396 | align_pow = fragP->fr_offset; |
| 6397 | new_address = ((address + ((1 << align_pow) - 1)) |
| 6398 | << align_pow) >> align_pow; |
| 6399 | return new_address; |
| 6400 | } |
| 6401 | |
| 6402 | if (fragP->fr_type == rs_machine_dependent) |
| 6403 | { |
| 6404 | switch (fragP->fr_subtype) |
| 6405 | { |
| 6406 | case RELAX_DESIRE_ALIGN: |
| 6407 | |
| 6408 | /* The rule is: get the next fragment's FIRST instruction. |
| 6409 | Find the smallest number of bytes needed to be added |
| 6410 | in order to ensure that the next fragment is FIRST |
| 6411 | instruction will fit in a single word. |
| 6412 | i.e. 2 bytes : 0, 1, 2. mod 4 |
| 6413 | 3 bytes: 0, 1 mod 4 |
| 6414 | If the FIRST instruction MIGHT be relaxed, |
| 6415 | assume that it will become a 3-byte instruction. */ |
| 6416 | |
| 6417 | insn_size = 3; |
| 6418 | /* Check to see if it might be 2 bytes. */ |
| 6419 | next_opcode = next_frag_opcode (fragP); |
| 6420 | if (next_opcode != XTENSA_UNDEFINED |
| 6421 | && xtensa_insn_length (xtensa_default_isa, next_opcode) == 2) |
| 6422 | insn_size = 2; |
| 6423 | |
| 6424 | assert (insn_size <= 4); |
| 6425 | for (new_address = address; new_address < address + 4; new_address++) |
| 6426 | { |
| 6427 | if (new_address >> 2 == (new_address + insn_size - 1) >> 2) |
| 6428 | return new_address; |
| 6429 | } |
| 6430 | as_bad (_("internal error aligning")); |
| 6431 | return address; |
| 6432 | |
| 6433 | case RELAX_ALIGN_NEXT_OPCODE: |
| 6434 | /* The rule is: get next fragment's FIRST instruction. |
| 6435 | Find the smallest number of bytes needed to be added |
| 6436 | in order to ensure that the next fragment's FIRST |
| 6437 | instruction will fit in a single word. |
| 6438 | i.e. 2 bytes : 0, 1, 2. mod 4 |
| 6439 | 3 bytes: 0, 1 mod 4 |
| 6440 | If the FIRST instruction MIGHT be relaxed, |
| 6441 | assume that it will become a 3 byte instruction. */ |
| 6442 | |
| 6443 | opcode = next_frag_opcode (fragP); |
| 6444 | if (opcode == XTENSA_UNDEFINED) |
| 6445 | { |
| 6446 | as_bad_where (fragP->fr_file, fragP->fr_line, |
| 6447 | _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE")); |
| 6448 | as_fatal (_("cannot continue")); |
| 6449 | } |
| 6450 | insn_size = xtensa_insn_length (xtensa_default_isa, opcode); |
| 6451 | assert (insn_size <= 4); |
| 6452 | assert (is_loop_opcode (opcode)); |
| 6453 | |
| 6454 | loop_insn_offset = 0; |
| 6455 | next_frag = next_non_empty_frag (fragP); |
| 6456 | |
| 6457 | /* If the loop has been expanded then the loop |
| 6458 | instruction could be at an offset from this fragment. */ |
| 6459 | if (next_frag->fr_subtype != RELAX_IMMED) |
| 6460 | loop_insn_offset = get_expanded_loop_offset (opcode); |
| 6461 | |
| 6462 | for (new_address = address; new_address < address + 4; new_address++) |
| 6463 | { |
| 6464 | if ((new_address + loop_insn_offset + insn_size) >> 2 == |
| 6465 | (new_address + loop_insn_offset + insn_size + 2) >> 2) |
| 6466 | return new_address; |
| 6467 | } |
| 6468 | as_bad (_("internal error aligning")); |
| 6469 | return address; |
| 6470 | |
| 6471 | default: |
| 6472 | as_bad (_("internal error aligning")); |
| 6473 | return address; |
| 6474 | } |
| 6475 | } |
| 6476 | as_bad (_("internal error aligning")); |
| 6477 | return address; |
| 6478 | } |
| 6479 | |
| 6480 | \f |
| 6481 | /* md_relax_frag Hook and Helper Functions. */ |
| 6482 | |
| 6483 | /* Return the number of bytes added to this fragment, given that the |
| 6484 | input has been stretched already by "stretch". */ |
| 6485 | |
| 6486 | long |
| 6487 | xtensa_relax_frag (fragP, stretch, stretched_p) |
| 6488 | fragS *fragP; |
| 6489 | long stretch; |
| 6490 | int *stretched_p; |
| 6491 | { |
| 6492 | int unreported = fragP->tc_frag_data.unreported_expansion; |
| 6493 | long new_stretch = 0; |
| 6494 | char *file_name; |
| 6495 | int line, lit_size; |
| 6496 | |
| 6497 | as_where (&file_name, &line); |
| 6498 | new_logical_line (fragP->fr_file, fragP->fr_line); |
| 6499 | |
| 6500 | fragP->tc_frag_data.unreported_expansion = 0; |
| 6501 | |
| 6502 | switch (fragP->fr_subtype) |
| 6503 | { |
| 6504 | case RELAX_ALIGN_NEXT_OPCODE: |
| 6505 | /* Always convert. */ |
| 6506 | new_stretch = relax_frag_text_align (fragP, stretch); |
| 6507 | break; |
| 6508 | |
| 6509 | case RELAX_LOOP_END: |
| 6510 | /* Do nothing. */ |
| 6511 | break; |
| 6512 | |
| 6513 | case RELAX_LOOP_END_ADD_NOP: |
| 6514 | /* Add a NOP and switch to .fill 0. */ |
| 6515 | new_stretch = relax_frag_add_nop (fragP); |
| 6516 | break; |
| 6517 | |
| 6518 | case RELAX_DESIRE_ALIGN: |
| 6519 | /* We REALLY want to change the relaxation order here. This |
| 6520 | should do NOTHING. The narrowing before it will either align |
| 6521 | it or not. */ |
| 6522 | break; |
| 6523 | |
| 6524 | case RELAX_LITERAL: |
| 6525 | case RELAX_LITERAL_FINAL: |
| 6526 | return 0; |
| 6527 | |
| 6528 | case RELAX_LITERAL_NR: |
| 6529 | lit_size = 4; |
| 6530 | fragP->fr_subtype = RELAX_LITERAL_FINAL; |
| 6531 | assert (unreported == lit_size); |
| 6532 | memset (&fragP->fr_literal[fragP->fr_fix], 0, 4); |
| 6533 | fragP->fr_var -= lit_size; |
| 6534 | fragP->fr_fix += lit_size; |
| 6535 | new_stretch = 4; |
| 6536 | break; |
| 6537 | |
| 6538 | case RELAX_NARROW: |
| 6539 | new_stretch = relax_frag_narrow (fragP, stretch); |
| 6540 | break; |
| 6541 | |
| 6542 | case RELAX_IMMED: |
| 6543 | case RELAX_IMMED_STEP1: |
| 6544 | case RELAX_IMMED_STEP2: |
| 6545 | /* Place the immediate. */ |
| 6546 | new_stretch = relax_frag_immed (now_seg, fragP, stretch, |
| 6547 | fragP->fr_subtype - RELAX_IMMED, |
| 6548 | stretched_p); |
| 6549 | break; |
| 6550 | |
| 6551 | case RELAX_LITERAL_POOL_BEGIN: |
| 6552 | case RELAX_LITERAL_POOL_END: |
| 6553 | /* No relaxation required. */ |
| 6554 | break; |
| 6555 | |
| 6556 | default: |
| 6557 | as_bad (_("bad relaxation state")); |
| 6558 | } |
| 6559 | |
| 6560 | new_logical_line (file_name, line); |
| 6561 | return new_stretch; |
| 6562 | } |
| 6563 | |
| 6564 | |
| 6565 | static long |
| 6566 | relax_frag_text_align (fragP, stretch) |
| 6567 | fragS *fragP; |
| 6568 | long stretch; |
| 6569 | { |
| 6570 | addressT old_address, old_next_address, old_size; |
| 6571 | addressT new_address, new_next_address, new_size; |
| 6572 | addressT growth; |
| 6573 | |
| 6574 | /* Overview of the relaxation procedure for alignment |
| 6575 | inside an executable section: |
| 6576 | |
| 6577 | The old size is stored in the tc_frag_data.text_expansion field. |
| 6578 | |
| 6579 | Calculate the new address, fix up the text_expansion and |
| 6580 | return the growth. */ |
| 6581 | |
| 6582 | /* Calculate the old address of this fragment and the next fragment. */ |
| 6583 | old_address = fragP->fr_address - stretch; |
| 6584 | old_next_address = (fragP->fr_address - stretch + fragP->fr_fix + |
| 6585 | fragP->tc_frag_data.text_expansion); |
| 6586 | old_size = old_next_address - old_address; |
| 6587 | |
| 6588 | /* Calculate the new address of this fragment and the next fragment. */ |
| 6589 | new_address = fragP->fr_address; |
| 6590 | new_next_address = |
| 6591 | get_noop_aligned_address (fragP, fragP->fr_address + fragP->fr_fix); |
| 6592 | new_size = new_next_address - new_address; |
| 6593 | |
| 6594 | growth = new_size - old_size; |
| 6595 | |
| 6596 | /* Fix up the text_expansion field and return the new growth. */ |
| 6597 | fragP->tc_frag_data.text_expansion += growth; |
| 6598 | return growth; |
| 6599 | } |
| 6600 | |
| 6601 | |
| 6602 | /* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we |
| 6603 | don't know about the availability of density yet. TODO: When the |
| 6604 | flags are stored per fragment, use NOP.N when possible. */ |
| 6605 | |
| 6606 | static long |
| 6607 | relax_frag_add_nop (fragP) |
| 6608 | fragS *fragP; |
| 6609 | { |
| 6610 | static xtensa_insnbuf insnbuf = NULL; |
| 6611 | TInsn t_insn; |
| 6612 | char *nop_buf = fragP->fr_literal + fragP->fr_fix; |
| 6613 | int length; |
| 6614 | if (!insnbuf) |
| 6615 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 6616 | |
| 6617 | tinsn_init (&t_insn); |
| 6618 | t_insn.opcode = xtensa_or_opcode; |
| 6619 | assert (t_insn.opcode != XTENSA_UNDEFINED); |
| 6620 | |
| 6621 | t_insn.ntok = 3; |
| 6622 | set_expr_const (&t_insn.tok[0], 1); |
| 6623 | set_expr_const (&t_insn.tok[1], 1); |
| 6624 | set_expr_const (&t_insn.tok[2], 1); |
| 6625 | |
| 6626 | tinsn_to_insnbuf (&t_insn, insnbuf); |
| 6627 | fragP->tc_frag_data.is_insn = TRUE; |
| 6628 | xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, nop_buf); |
| 6629 | |
| 6630 | length = xtensa_insn_length (xtensa_default_isa, t_insn.opcode); |
| 6631 | if (fragP->fr_var < length) |
| 6632 | { |
| 6633 | as_warn (_("fr_var (%ld) < length (%d); ignoring"), |
| 6634 | fragP->fr_var, length); |
| 6635 | frag_wane (fragP); |
| 6636 | return 0; |
| 6637 | } |
| 6638 | |
| 6639 | fragP->fr_fix += length; |
| 6640 | fragP->fr_var -= length; |
| 6641 | frag_wane (fragP); |
| 6642 | return length; |
| 6643 | } |
| 6644 | |
| 6645 | |
| 6646 | static long |
| 6647 | relax_frag_narrow (fragP, stretch) |
| 6648 | fragS *fragP; |
| 6649 | long stretch; |
| 6650 | { |
| 6651 | /* Overview of the relaxation procedure for alignment inside an |
| 6652 | executable section: Find the number of widenings required and the |
| 6653 | number of nop bytes required. Store the number of bytes ALREADY |
| 6654 | widened. If there are enough instructions to widen (must go back |
| 6655 | ONLY through NARROW fragments), mark each of the fragments as TO BE |
| 6656 | widened, recalculate the fragment addresses. */ |
| 6657 | |
| 6658 | assert (fragP->fr_type == rs_machine_dependent |
| 6659 | && fragP->fr_subtype == RELAX_NARROW); |
| 6660 | |
| 6661 | if (!future_alignment_required (fragP, 0)) |
| 6662 | { |
| 6663 | /* If already expanded but no longer needed because of a prior |
| 6664 | stretch, it is SAFE to unexpand because the next fragment will |
| 6665 | NEVER start at an address > the previous time through the |
| 6666 | relaxation. */ |
| 6667 | if (fragP->tc_frag_data.text_expansion) |
| 6668 | { |
| 6669 | if (stretch > 0) |
| 6670 | { |
| 6671 | fragP->tc_frag_data.text_expansion = 0; |
| 6672 | return -1; |
| 6673 | } |
| 6674 | /* Otherwise we have to live with this bad choice. */ |
| 6675 | return 0; |
| 6676 | } |
| 6677 | return 0; |
| 6678 | } |
| 6679 | |
| 6680 | if (fragP->tc_frag_data.text_expansion == 0) |
| 6681 | { |
| 6682 | fragP->tc_frag_data.text_expansion = 1; |
| 6683 | return 1; |
| 6684 | } |
| 6685 | |
| 6686 | return 0; |
| 6687 | } |
| 6688 | |
| 6689 | |
| 6690 | static bfd_boolean |
| 6691 | future_alignment_required (fragP, stretch) |
| 6692 | fragS *fragP; |
| 6693 | long stretch; |
| 6694 | { |
| 6695 | long address = fragP->fr_address + stretch; |
| 6696 | int num_widens = 0; |
| 6697 | addressT aligned_address; |
| 6698 | offsetT desired_diff; |
| 6699 | |
| 6700 | while (fragP) |
| 6701 | { |
| 6702 | /* Limit this to a small search. */ |
| 6703 | if (num_widens > 8) |
| 6704 | return FALSE; |
| 6705 | address += fragP->fr_fix; |
| 6706 | |
| 6707 | switch (fragP->fr_type) |
| 6708 | { |
| 6709 | case rs_fill: |
| 6710 | address += fragP->fr_offset * fragP->fr_var; |
| 6711 | break; |
| 6712 | |
| 6713 | case rs_machine_dependent: |
| 6714 | switch (fragP->fr_subtype) |
| 6715 | { |
| 6716 | case RELAX_NARROW: |
| 6717 | /* address += fragP->fr_fix; */ |
| 6718 | num_widens++; |
| 6719 | break; |
| 6720 | |
| 6721 | case RELAX_IMMED: |
| 6722 | address += (/* fragP->fr_fix + */ |
| 6723 | fragP->tc_frag_data.text_expansion); |
| 6724 | break; |
| 6725 | |
| 6726 | case RELAX_ALIGN_NEXT_OPCODE: |
| 6727 | case RELAX_DESIRE_ALIGN: |
| 6728 | /* address += fragP->fr_fix; */ |
| 6729 | aligned_address = get_widen_aligned_address (fragP, address); |
| 6730 | desired_diff = aligned_address - address; |
| 6731 | assert (desired_diff >= 0); |
| 6732 | /* If there are enough wideners in between do it. */ |
| 6733 | /* return (num_widens == desired_diff); */ |
| 6734 | if (num_widens == desired_diff) |
| 6735 | return TRUE; |
| 6736 | if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE) |
| 6737 | return FALSE; |
| 6738 | break; |
| 6739 | |
| 6740 | default: |
| 6741 | return FALSE; |
| 6742 | } |
| 6743 | break; |
| 6744 | |
| 6745 | default: |
| 6746 | return FALSE; |
| 6747 | } |
| 6748 | fragP = fragP->fr_next; |
| 6749 | } |
| 6750 | |
| 6751 | return FALSE; |
| 6752 | } |
| 6753 | |
| 6754 | |
| 6755 | static long |
| 6756 | relax_frag_immed (segP, fragP, stretch, min_steps, stretched_p) |
| 6757 | segT segP; |
| 6758 | fragS *fragP; |
| 6759 | long stretch; |
| 6760 | int min_steps; |
| 6761 | int *stretched_p; |
| 6762 | { |
| 6763 | static xtensa_insnbuf insnbuf = NULL; |
| 6764 | TInsn t_insn; |
| 6765 | int old_size; |
| 6766 | bfd_boolean negatable_branch = FALSE; |
| 6767 | bfd_boolean branch_jmp_to_next = FALSE; |
| 6768 | IStack istack; |
| 6769 | offsetT frag_offset; |
| 6770 | int num_steps; |
| 6771 | fragS *lit_fragP; |
| 6772 | int num_text_bytes, num_literal_bytes; |
| 6773 | int literal_diff, text_diff; |
| 6774 | |
| 6775 | assert (fragP->fr_opcode != NULL); |
| 6776 | |
| 6777 | if (!insnbuf) |
| 6778 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 6779 | |
| 6780 | tinsn_from_chars (&t_insn, fragP->fr_opcode); |
| 6781 | tinsn_immed_from_frag (&t_insn, fragP); |
| 6782 | |
| 6783 | negatable_branch = is_negatable_branch (&t_insn); |
| 6784 | |
| 6785 | old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode); |
| 6786 | |
| 6787 | if (software_avoid_b_j_loop_end) |
| 6788 | branch_jmp_to_next = is_branch_jmp_to_next (&t_insn, fragP); |
| 6789 | |
| 6790 | /* Special case: replace a branch to the next instruction with a NOP. |
| 6791 | This is required to work around a hardware bug in T1040.0 and also |
| 6792 | serves as an optimization. */ |
| 6793 | |
| 6794 | if (branch_jmp_to_next |
| 6795 | && ((old_size == 2) || (old_size == 3)) |
| 6796 | && !next_frag_is_loop_target (fragP)) |
| 6797 | return 0; |
| 6798 | |
| 6799 | /* Here is the fun stuff: Get the immediate field from this |
| 6800 | instruction. If it fits, we are done. If not, find the next |
| 6801 | instruction sequence that fits. */ |
| 6802 | |
| 6803 | frag_offset = fragP->fr_opcode - fragP->fr_literal; |
| 6804 | istack_init (&istack); |
| 6805 | num_steps = xg_assembly_relax (&istack, &t_insn, segP, fragP, frag_offset, |
| 6806 | min_steps, stretch); |
| 6807 | if (num_steps < min_steps) |
| 6808 | { |
| 6809 | as_fatal (_("internal error: relaxation failed")); |
| 6810 | return 0; |
| 6811 | } |
| 6812 | |
| 6813 | if (num_steps > RELAX_IMMED_MAXSTEPS) |
| 6814 | { |
| 6815 | as_fatal (_("internal error: relaxation requires too many steps")); |
| 6816 | return 0; |
| 6817 | } |
| 6818 | |
| 6819 | fragP->fr_subtype = (int) RELAX_IMMED + num_steps; |
| 6820 | |
| 6821 | /* Figure out the number of bytes needed. */ |
| 6822 | lit_fragP = 0; |
| 6823 | num_text_bytes = get_num_stack_text_bytes (&istack) - old_size; |
| 6824 | num_literal_bytes = get_num_stack_literal_bytes (&istack); |
| 6825 | literal_diff = num_literal_bytes - fragP->tc_frag_data.literal_expansion; |
| 6826 | text_diff = num_text_bytes - fragP->tc_frag_data.text_expansion; |
| 6827 | |
| 6828 | /* It MUST get larger. If not, we could get an infinite loop. */ |
| 6829 | know (num_text_bytes >= 0); |
| 6830 | know (literal_diff >= 0 && text_diff >= 0); |
| 6831 | |
| 6832 | fragP->tc_frag_data.text_expansion = num_text_bytes; |
| 6833 | fragP->tc_frag_data.literal_expansion = num_literal_bytes; |
| 6834 | |
| 6835 | /* Find the associated expandable literal for this. */ |
| 6836 | if (literal_diff != 0) |
| 6837 | { |
| 6838 | lit_fragP = fragP->tc_frag_data.literal_frag; |
| 6839 | if (lit_fragP) |
| 6840 | { |
| 6841 | assert (literal_diff == 4); |
| 6842 | lit_fragP->tc_frag_data.unreported_expansion += literal_diff; |
| 6843 | |
| 6844 | /* We expect that the literal section state has NOT been |
| 6845 | modified yet. */ |
| 6846 | assert (lit_fragP->fr_type == rs_machine_dependent |
| 6847 | && lit_fragP->fr_subtype == RELAX_LITERAL); |
| 6848 | lit_fragP->fr_subtype = RELAX_LITERAL_NR; |
| 6849 | |
| 6850 | /* We need to mark this section for another iteration |
| 6851 | of relaxation. */ |
| 6852 | (*stretched_p)++; |
| 6853 | } |
| 6854 | } |
| 6855 | |
| 6856 | /* This implicitly uses the assumption that a branch is negated |
| 6857 | when the size of the output increases by at least 2 bytes. */ |
| 6858 | |
| 6859 | if (negatable_branch && num_text_bytes >= 2) |
| 6860 | { |
| 6861 | /* If next frag is a loop end, then switch it to add a NOP. */ |
| 6862 | update_next_frag_nop_state (fragP); |
| 6863 | } |
| 6864 | |
| 6865 | return text_diff; |
| 6866 | } |
| 6867 | |
| 6868 | \f |
| 6869 | /* md_convert_frag Hook and Helper Functions. */ |
| 6870 | |
| 6871 | void |
| 6872 | md_convert_frag (abfd, sec, fragp) |
| 6873 | bfd *abfd ATTRIBUTE_UNUSED; |
| 6874 | segT sec; |
| 6875 | fragS *fragp; |
| 6876 | { |
| 6877 | char *file_name; |
| 6878 | int line; |
| 6879 | |
| 6880 | as_where (&file_name, &line); |
| 6881 | new_logical_line (fragp->fr_file, fragp->fr_line); |
| 6882 | |
| 6883 | switch (fragp->fr_subtype) |
| 6884 | { |
| 6885 | case RELAX_ALIGN_NEXT_OPCODE: |
| 6886 | /* Always convert. */ |
| 6887 | convert_frag_align_next_opcode (fragp); |
| 6888 | break; |
| 6889 | |
| 6890 | case RELAX_DESIRE_ALIGN: |
| 6891 | /* Do nothing. If not aligned already, too bad. */ |
| 6892 | break; |
| 6893 | |
| 6894 | case RELAX_LITERAL: |
| 6895 | case RELAX_LITERAL_FINAL: |
| 6896 | break; |
| 6897 | |
| 6898 | case RELAX_NARROW: |
| 6899 | /* No conversion. */ |
| 6900 | convert_frag_narrow (fragp); |
| 6901 | break; |
| 6902 | |
| 6903 | case RELAX_IMMED: |
| 6904 | case RELAX_IMMED_STEP1: |
| 6905 | case RELAX_IMMED_STEP2: |
| 6906 | /* Place the immediate. */ |
| 6907 | convert_frag_immed (sec, fragp, fragp->fr_subtype - RELAX_IMMED); |
| 6908 | break; |
| 6909 | |
| 6910 | case RELAX_LITERAL_NR: |
| 6911 | if (use_literal_section) |
| 6912 | { |
| 6913 | /* This should have been handled during relaxation. When |
| 6914 | relaxing a code segment, literals sometimes need to be |
| 6915 | added to the corresponding literal segment. If that |
| 6916 | literal segment has already been relaxed, then we end up |
| 6917 | in this situation. Marking the literal segments as data |
| 6918 | would make this happen less often (since GAS always relaxes |
| 6919 | code before data), but we could still get into trouble if |
| 6920 | there are instructions in a segment that is not marked as |
| 6921 | containing code. Until we can implement a better solution, |
| 6922 | cheat and adjust the addresses of all the following frags. |
| 6923 | This could break subsequent alignments, but the linker's |
| 6924 | literal coalescing will do that anyway. */ |
| 6925 | |
| 6926 | fragS *f; |
| 6927 | fragp->fr_subtype = RELAX_LITERAL_FINAL; |
| 6928 | assert (fragp->tc_frag_data.unreported_expansion == 4); |
| 6929 | memset (&fragp->fr_literal[fragp->fr_fix], 0, 4); |
| 6930 | fragp->fr_var -= 4; |
| 6931 | fragp->fr_fix += 4; |
| 6932 | for (f = fragp->fr_next; f; f = f->fr_next) |
| 6933 | f->fr_address += 4; |
| 6934 | } |
| 6935 | else |
| 6936 | as_bad (_("invalid relaxation fragment result")); |
| 6937 | break; |
| 6938 | } |
| 6939 | |
| 6940 | fragp->fr_var = 0; |
| 6941 | new_logical_line (file_name, line); |
| 6942 | } |
| 6943 | |
| 6944 | |
| 6945 | void |
| 6946 | convert_frag_align_next_opcode (fragp) |
| 6947 | fragS *fragp; |
| 6948 | { |
| 6949 | char *nop_buf; /* Location for Writing. */ |
| 6950 | size_t i; |
| 6951 | |
| 6952 | bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density; |
| 6953 | addressT aligned_address; |
| 6954 | size_t fill_size, nop_count; |
| 6955 | |
| 6956 | aligned_address = get_noop_aligned_address (fragp, fragp->fr_address + |
| 6957 | fragp->fr_fix); |
| 6958 | fill_size = aligned_address - (fragp->fr_address + fragp->fr_fix); |
| 6959 | nop_count = get_text_align_nop_count (fill_size, use_no_density); |
| 6960 | nop_buf = fragp->fr_literal + fragp->fr_fix; |
| 6961 | |
| 6962 | for (i = 0; i < nop_count; i++) |
| 6963 | { |
| 6964 | size_t nop_size; |
| 6965 | nop_size = get_text_align_nth_nop_size (fill_size, i, use_no_density); |
| 6966 | |
| 6967 | assemble_nop (nop_size, nop_buf); |
| 6968 | nop_buf += nop_size; |
| 6969 | } |
| 6970 | |
| 6971 | fragp->fr_fix += fill_size; |
| 6972 | fragp->fr_var -= fill_size; |
| 6973 | } |
| 6974 | |
| 6975 | |
| 6976 | static void |
| 6977 | convert_frag_narrow (fragP) |
| 6978 | fragS *fragP; |
| 6979 | { |
| 6980 | static xtensa_insnbuf insnbuf = NULL; |
| 6981 | TInsn t_insn, single_target; |
| 6982 | int size, old_size, diff, error_val; |
| 6983 | offsetT frag_offset; |
| 6984 | |
| 6985 | if (fragP->tc_frag_data.text_expansion == 0) |
| 6986 | { |
| 6987 | /* No conversion. */ |
| 6988 | fragP->fr_var = 0; |
| 6989 | return; |
| 6990 | } |
| 6991 | |
| 6992 | assert (fragP->fr_opcode != NULL); |
| 6993 | |
| 6994 | if (!insnbuf) |
| 6995 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 6996 | |
| 6997 | tinsn_from_chars (&t_insn, fragP->fr_opcode); |
| 6998 | tinsn_immed_from_frag (&t_insn, fragP); |
| 6999 | |
| 7000 | /* Just convert it to a wide form.... */ |
| 7001 | size = 0; |
| 7002 | old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode); |
| 7003 | |
| 7004 | tinsn_init (&single_target); |
| 7005 | frag_offset = fragP->fr_opcode - fragP->fr_literal; |
| 7006 | |
| 7007 | error_val = xg_expand_narrow (&single_target, &t_insn); |
| 7008 | if (error_val) |
| 7009 | as_bad (_("unable to widen instruction")); |
| 7010 | |
| 7011 | size = xtensa_insn_length (xtensa_default_isa, single_target.opcode); |
| 7012 | xg_emit_insn_to_buf (&single_target, fragP->fr_opcode, |
| 7013 | fragP, frag_offset, TRUE); |
| 7014 | |
| 7015 | diff = size - old_size; |
| 7016 | assert (diff >= 0); |
| 7017 | assert (diff <= fragP->fr_var); |
| 7018 | fragP->fr_var -= diff; |
| 7019 | fragP->fr_fix += diff; |
| 7020 | |
| 7021 | /* clean it up */ |
| 7022 | fragP->fr_var = 0; |
| 7023 | } |
| 7024 | |
| 7025 | |
| 7026 | static void |
| 7027 | convert_frag_immed (segP, fragP, min_steps) |
| 7028 | segT segP; |
| 7029 | fragS *fragP; |
| 7030 | int min_steps; |
| 7031 | { |
| 7032 | char *immed_instr = fragP->fr_opcode; |
| 7033 | static xtensa_insnbuf insnbuf = NULL; |
| 7034 | TInsn orig_t_insn; |
| 7035 | bfd_boolean expanded = FALSE; |
| 7036 | char *fr_opcode = fragP->fr_opcode; |
| 7037 | bfd_boolean branch_jmp_to_next = FALSE; |
| 7038 | int size; |
| 7039 | |
| 7040 | assert (fragP->fr_opcode != NULL); |
| 7041 | |
| 7042 | if (!insnbuf) |
| 7043 | insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa); |
| 7044 | |
| 7045 | tinsn_from_chars (&orig_t_insn, fragP->fr_opcode); |
| 7046 | tinsn_immed_from_frag (&orig_t_insn, fragP); |
| 7047 | |
| 7048 | /* Here is the fun stuff: Get the immediate field from this |
| 7049 | instruction. If it fits, we're done. If not, find the next |
| 7050 | instruction sequence that fits. */ |
| 7051 | |
| 7052 | if (software_avoid_b_j_loop_end) |
| 7053 | branch_jmp_to_next = is_branch_jmp_to_next (&orig_t_insn, fragP); |
| 7054 | |
| 7055 | if (branch_jmp_to_next && !next_frag_is_loop_target (fragP)) |
| 7056 | { |
| 7057 | /* Conversion just inserts a NOP and marks the fix as completed. */ |
| 7058 | size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode); |
| 7059 | assemble_nop (size, fragP->fr_opcode); |
| 7060 | fragP->fr_var = 0; |
| 7061 | } |
| 7062 | else |
| 7063 | { |
| 7064 | IStack istack; |
| 7065 | int i; |
| 7066 | symbolS *lit_sym = NULL; |
| 7067 | int total_size = 0; |
| 7068 | int old_size; |
| 7069 | int diff; |
| 7070 | symbolS *gen_label = NULL; |
| 7071 | offsetT frag_offset; |
| 7072 | |
| 7073 | /* It does not fit. Find something that does and |
| 7074 | convert immediately. */ |
| 7075 | frag_offset = fragP->fr_opcode - fragP->fr_literal; |
| 7076 | istack_init (&istack); |
| 7077 | xg_assembly_relax (&istack, &orig_t_insn, |
| 7078 | segP, fragP, frag_offset, min_steps, 0); |
| 7079 | |
| 7080 | old_size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode); |
| 7081 | |
| 7082 | /* Assemble this right inline. */ |
| 7083 | |
| 7084 | /* First, create the mapping from a label name to the REAL label. */ |
| 7085 | total_size = 0; |
| 7086 | for (i = 0; i < istack.ninsn; i++) |
| 7087 | { |
| 7088 | TInsn *t_insn = &istack.insn[i]; |
| 7089 | int size = 0; |
| 7090 | fragS *lit_frag; |
| 7091 | |
| 7092 | switch (t_insn->insn_type) |
| 7093 | { |
| 7094 | case ITYPE_LITERAL: |
| 7095 | if (lit_sym != NULL) |
| 7096 | as_bad (_("multiple literals in expansion")); |
| 7097 | /* First find the appropriate space in the literal pool. */ |
| 7098 | lit_frag = fragP->tc_frag_data.literal_frag; |
| 7099 | if (lit_frag == NULL) |
| 7100 | as_bad (_("no registered fragment for literal")); |
| 7101 | if (t_insn->ntok != 1) |
| 7102 | as_bad (_("number of literal tokens != 1")); |
| 7103 | |
| 7104 | /* Set the literal symbol and add a fixup. */ |
| 7105 | lit_sym = lit_frag->fr_symbol; |
| 7106 | break; |
| 7107 | |
| 7108 | case ITYPE_LABEL: |
| 7109 | assert (gen_label == NULL); |
| 7110 | gen_label = symbol_new (FAKE_LABEL_NAME, now_seg, |
| 7111 | fragP->fr_opcode - fragP->fr_literal + |
| 7112 | total_size, fragP); |
| 7113 | break; |
| 7114 | |
| 7115 | case ITYPE_INSN: |
| 7116 | size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode); |
| 7117 | total_size += size; |
| 7118 | break; |
| 7119 | } |
| 7120 | } |
| 7121 | |
| 7122 | total_size = 0; |
| 7123 | for (i = 0; i < istack.ninsn; i++) |
| 7124 | { |
| 7125 | TInsn *t_insn = &istack.insn[i]; |
| 7126 | fragS *lit_frag; |
| 7127 | int size; |
| 7128 | segT target_seg; |
| 7129 | |
| 7130 | switch (t_insn->insn_type) |
| 7131 | { |
| 7132 | case ITYPE_LITERAL: |
| 7133 | lit_frag = fragP->tc_frag_data.literal_frag; |
| 7134 | /* already checked */ |
| 7135 | assert (lit_frag != NULL); |
| 7136 | assert (lit_sym != NULL); |
| 7137 | assert (t_insn->ntok == 1); |
| 7138 | /* add a fixup */ |
| 7139 | target_seg = S_GET_SEGMENT (lit_sym); |
| 7140 | assert (target_seg); |
| 7141 | fix_new_exp_in_seg (target_seg, 0, lit_frag, 0, 4, |
| 7142 | &t_insn->tok[0], FALSE, BFD_RELOC_32); |
| 7143 | break; |
| 7144 | |
| 7145 | case ITYPE_LABEL: |
| 7146 | break; |
| 7147 | |
| 7148 | case ITYPE_INSN: |
| 7149 | xg_resolve_labels (t_insn, gen_label); |
| 7150 | xg_resolve_literals (t_insn, lit_sym); |
| 7151 | size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode); |
| 7152 | total_size += size; |
| 7153 | xg_emit_insn_to_buf (t_insn, immed_instr, fragP, |
| 7154 | immed_instr - fragP->fr_literal, TRUE); |
| 7155 | immed_instr += size; |
| 7156 | break; |
| 7157 | } |
| 7158 | } |
| 7159 | |
| 7160 | diff = total_size - old_size; |
| 7161 | assert (diff >= 0); |
| 7162 | if (diff != 0) |
| 7163 | expanded = TRUE; |
| 7164 | assert (diff <= fragP->fr_var); |
| 7165 | fragP->fr_var -= diff; |
| 7166 | fragP->fr_fix += diff; |
| 7167 | } |
| 7168 | |
| 7169 | /* Clean it up. */ |
| 7170 | fragP->fr_var = 0; |
| 7171 | |
| 7172 | /* Check for undefined immediates in LOOP instructions. */ |
| 7173 | if (is_loop_opcode (orig_t_insn.opcode)) |
| 7174 | { |
| 7175 | symbolS *sym; |
| 7176 | sym = orig_t_insn.tok[1].X_add_symbol; |
| 7177 | if (sym != NULL && !S_IS_DEFINED (sym)) |
| 7178 | { |
| 7179 | as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym)); |
| 7180 | return; |
| 7181 | } |
| 7182 | sym = orig_t_insn.tok[1].X_op_symbol; |
| 7183 | if (sym != NULL && !S_IS_DEFINED (sym)) |
| 7184 | { |
| 7185 | as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym)); |
| 7186 | return; |
| 7187 | } |
| 7188 | } |
| 7189 | |
| 7190 | if (expanded && is_loop_opcode (orig_t_insn.opcode)) |
| 7191 | convert_frag_immed_finish_loop (segP, fragP, &orig_t_insn); |
| 7192 | |
| 7193 | if (expanded && is_direct_call_opcode (orig_t_insn.opcode)) |
| 7194 | { |
| 7195 | /* Add an expansion note on the expanded instruction. */ |
| 7196 | fix_new_exp_in_seg (now_seg, 0, fragP, fr_opcode - fragP->fr_literal, 4, |
| 7197 | &orig_t_insn.tok[0], TRUE, |
| 7198 | BFD_RELOC_XTENSA_ASM_EXPAND); |
| 7199 | |
| 7200 | } |
| 7201 | } |
| 7202 | |
| 7203 | |
| 7204 | /* Add a new fix expression into the desired segment. We have to |
| 7205 | switch to that segment to do this. */ |
| 7206 | |
| 7207 | static fixS * |
| 7208 | fix_new_exp_in_seg (new_seg, new_subseg, |
| 7209 | frag, where, size, exp, pcrel, r_type) |
| 7210 | segT new_seg; |
| 7211 | subsegT new_subseg; |
| 7212 | fragS *frag; |
| 7213 | int where; |
| 7214 | int size; |
| 7215 | expressionS *exp; |
| 7216 | int pcrel; |
| 7217 | bfd_reloc_code_real_type r_type; |
| 7218 | { |
| 7219 | fixS *new_fix; |
| 7220 | segT seg = now_seg; |
| 7221 | subsegT subseg = now_subseg; |
| 7222 | assert (new_seg != 0); |
| 7223 | subseg_set (new_seg, new_subseg); |
| 7224 | |
| 7225 | if (r_type == BFD_RELOC_32 |
| 7226 | && exp->X_add_symbol |
| 7227 | && symbol_get_tc (exp->X_add_symbol)->plt == 1) |
| 7228 | { |
| 7229 | r_type = BFD_RELOC_XTENSA_PLT; |
| 7230 | } |
| 7231 | |
| 7232 | new_fix = fix_new_exp (frag, where, size, exp, pcrel, r_type); |
| 7233 | subseg_set (seg, subseg); |
| 7234 | return new_fix; |
| 7235 | } |
| 7236 | |
| 7237 | |
| 7238 | /* Relax a loop instruction so that it can span loop >256 bytes. */ |
| 7239 | /* |
| 7240 | loop as, .L1 |
| 7241 | .L0: |
| 7242 | rsr as, LEND |
| 7243 | wsr as, LBEG |
| 7244 | addi as, as, lo8(label-.L1) |
| 7245 | addmi as, as, mid8(label-.L1) |
| 7246 | wsr as, LEND |
| 7247 | isync |
| 7248 | rsr as, LCOUNT |
| 7249 | addi as, as, 1 |
| 7250 | .L1: |
| 7251 | <<body>> |
| 7252 | label: */ |
| 7253 | |
| 7254 | static void |
| 7255 | convert_frag_immed_finish_loop (segP, fragP, t_insn) |
| 7256 | segT segP; |
| 7257 | fragS *fragP; |
| 7258 | TInsn *t_insn; |
| 7259 | { |
| 7260 | TInsn loop_insn; |
| 7261 | TInsn addi_insn; |
| 7262 | TInsn addmi_insn; |
| 7263 | unsigned long target; |
| 7264 | static xtensa_insnbuf insnbuf = NULL; |
| 7265 | unsigned int loop_length, loop_length_hi, loop_length_lo; |
| 7266 | xtensa_isa isa = xtensa_default_isa; |
| 7267 | addressT loop_offset; |
| 7268 | addressT addi_offset = 9; |
| 7269 | addressT addmi_offset = 12; |
| 7270 | |
| 7271 | if (!insnbuf) |
| 7272 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 7273 | |
| 7274 | /* Get the loop offset. */ |
| 7275 | loop_offset = get_expanded_loop_offset (t_insn->opcode); |
| 7276 | /* Validate that there really is a LOOP at the loop_offset. */ |
| 7277 | tinsn_from_chars (&loop_insn, fragP->fr_opcode + loop_offset); |
| 7278 | |
| 7279 | if (!is_loop_opcode (loop_insn.opcode)) |
| 7280 | { |
| 7281 | as_bad_where (fragP->fr_file, fragP->fr_line, |
| 7282 | _("loop relaxation specification does not correspond")); |
| 7283 | assert (0); |
| 7284 | } |
| 7285 | addi_offset += loop_offset; |
| 7286 | addmi_offset += loop_offset; |
| 7287 | |
| 7288 | assert (t_insn->ntok == 2); |
| 7289 | target = get_expression_value (segP, &t_insn->tok[1]); |
| 7290 | |
| 7291 | know (symbolP); |
| 7292 | know (symbolP->sy_frag); |
| 7293 | know (!(S_GET_SEGMENT (symbolP) == absolute_section) |
| 7294 | || symbol_get_frag (symbolP) == &zero_address_frag); |
| 7295 | |
| 7296 | loop_length = target - (fragP->fr_address + fragP->fr_fix); |
| 7297 | loop_length_hi = loop_length & ~0x0ff; |
| 7298 | loop_length_lo = loop_length & 0x0ff; |
| 7299 | if (loop_length_lo >= 128) |
| 7300 | { |
| 7301 | loop_length_lo -= 256; |
| 7302 | loop_length_hi += 256; |
| 7303 | } |
| 7304 | |
| 7305 | /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most |
| 7306 | 32512. If the loop is larger than that, then we just fail. */ |
| 7307 | if (loop_length_hi > 32512) |
| 7308 | as_bad_where (fragP->fr_file, fragP->fr_line, |
| 7309 | _("loop too long for LOOP instruction")); |
| 7310 | |
| 7311 | tinsn_from_chars (&addi_insn, fragP->fr_opcode + addi_offset); |
| 7312 | assert (addi_insn.opcode == xtensa_addi_opcode); |
| 7313 | |
| 7314 | tinsn_from_chars (&addmi_insn, fragP->fr_opcode + addmi_offset); |
| 7315 | assert (addmi_insn.opcode == xtensa_addmi_opcode); |
| 7316 | |
| 7317 | set_expr_const (&addi_insn.tok[2], loop_length_lo); |
| 7318 | tinsn_to_insnbuf (&addi_insn, insnbuf); |
| 7319 | |
| 7320 | fragP->tc_frag_data.is_insn = TRUE; |
| 7321 | xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addi_offset); |
| 7322 | |
| 7323 | set_expr_const (&addmi_insn.tok[2], loop_length_hi); |
| 7324 | tinsn_to_insnbuf (&addmi_insn, insnbuf); |
| 7325 | xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addmi_offset); |
| 7326 | } |
| 7327 | |
| 7328 | |
| 7329 | static offsetT |
| 7330 | get_expression_value (segP, exp) |
| 7331 | segT segP; |
| 7332 | expressionS *exp; |
| 7333 | { |
| 7334 | if (exp->X_op == O_constant) |
| 7335 | return exp->X_add_number; |
| 7336 | if (exp->X_op == O_symbol) |
| 7337 | { |
| 7338 | /* Find the fragment. */ |
| 7339 | symbolS *sym = exp->X_add_symbol; |
| 7340 | |
| 7341 | assert (S_GET_SEGMENT (sym) == segP |
| 7342 | || S_GET_SEGMENT (sym) == absolute_section); |
| 7343 | |
| 7344 | return (S_GET_VALUE (sym) + exp->X_add_number); |
| 7345 | } |
| 7346 | as_bad (_("invalid expression evaluation type %d"), exp->X_op); |
| 7347 | return 0; |
| 7348 | } |
| 7349 | |
| 7350 | \f |
| 7351 | /* A map that keeps information on a per-subsegment basis. This is |
| 7352 | maintained during initial assembly, but is invalid once the |
| 7353 | subsegments are smashed together. I.E., it cannot be used during |
| 7354 | the relaxation. */ |
| 7355 | |
| 7356 | typedef struct subseg_map_struct |
| 7357 | { |
| 7358 | /* the key */ |
| 7359 | segT seg; |
| 7360 | subsegT subseg; |
| 7361 | |
| 7362 | /* the data */ |
| 7363 | unsigned flags; |
| 7364 | |
| 7365 | struct subseg_map_struct *next; |
| 7366 | } subseg_map; |
| 7367 | |
| 7368 | static subseg_map *sseg_map = NULL; |
| 7369 | |
| 7370 | |
| 7371 | static unsigned |
| 7372 | get_last_insn_flags (seg, subseg) |
| 7373 | segT seg; |
| 7374 | subsegT subseg; |
| 7375 | { |
| 7376 | subseg_map *subseg_e; |
| 7377 | |
| 7378 | for (subseg_e = sseg_map; subseg_e != NULL; subseg_e = subseg_e->next) |
| 7379 | if (seg == subseg_e->seg && subseg == subseg_e->subseg) |
| 7380 | return subseg_e->flags; |
| 7381 | |
| 7382 | return 0; |
| 7383 | } |
| 7384 | |
| 7385 | |
| 7386 | static void |
| 7387 | set_last_insn_flags (seg, subseg, fl, val) |
| 7388 | segT seg; |
| 7389 | subsegT subseg; |
| 7390 | unsigned fl; |
| 7391 | bfd_boolean val; |
| 7392 | { |
| 7393 | subseg_map *subseg_e; |
| 7394 | |
| 7395 | for (subseg_e = sseg_map; subseg_e; subseg_e = subseg_e->next) |
| 7396 | if (seg == subseg_e->seg && subseg == subseg_e->subseg) |
| 7397 | break; |
| 7398 | |
| 7399 | if (!subseg_e) |
| 7400 | { |
| 7401 | subseg_e = (subseg_map *) xmalloc (sizeof (subseg_map)); |
| 7402 | memset (subseg_e, 0, sizeof (subseg_map)); |
| 7403 | subseg_e->seg = seg; |
| 7404 | subseg_e->subseg = subseg; |
| 7405 | subseg_e->flags = 0; |
| 7406 | subseg_e->next = sseg_map; |
| 7407 | sseg_map = subseg_e; |
| 7408 | } |
| 7409 | |
| 7410 | if (val) |
| 7411 | subseg_e->flags |= fl; |
| 7412 | else |
| 7413 | subseg_e->flags &= ~fl; |
| 7414 | } |
| 7415 | |
| 7416 | \f |
| 7417 | /* Segment Lists and emit_state Stuff. */ |
| 7418 | |
| 7419 | /* Remove the segment from the global sections list. */ |
| 7420 | |
| 7421 | static void |
| 7422 | xtensa_remove_section (sec) |
| 7423 | segT sec; |
| 7424 | { |
| 7425 | /* Handle brain-dead bfd_section_list_remove macro, which |
| 7426 | expect the address of the prior section's "next" field, not |
| 7427 | just the address of the section to remove. */ |
| 7428 | |
| 7429 | segT *ps_next_ptr = &stdoutput->sections; |
| 7430 | while (*ps_next_ptr != sec && *ps_next_ptr != NULL) |
| 7431 | ps_next_ptr = &(*ps_next_ptr)->next; |
| 7432 | |
| 7433 | assert (*ps_next_ptr != NULL); |
| 7434 | |
| 7435 | bfd_section_list_remove (stdoutput, ps_next_ptr); |
| 7436 | } |
| 7437 | |
| 7438 | |
| 7439 | static void |
| 7440 | xtensa_insert_section (after_sec, sec) |
| 7441 | segT after_sec; |
| 7442 | segT sec; |
| 7443 | { |
| 7444 | segT *after_sec_next; |
| 7445 | if (after_sec == NULL) |
| 7446 | after_sec_next = &stdoutput->sections; |
| 7447 | else |
| 7448 | after_sec_next = &after_sec->next; |
| 7449 | |
| 7450 | bfd_section_list_insert (stdoutput, after_sec_next, sec); |
| 7451 | } |
| 7452 | |
| 7453 | |
| 7454 | static void |
| 7455 | xtensa_move_seg_list_to_beginning (head) |
| 7456 | seg_list *head; |
| 7457 | { |
| 7458 | head = head->next; |
| 7459 | while (head) |
| 7460 | { |
| 7461 | segT literal_section = head->seg; |
| 7462 | |
| 7463 | /* Move the literal section to the front of the section list. */ |
| 7464 | assert (literal_section); |
| 7465 | xtensa_remove_section (literal_section); |
| 7466 | xtensa_insert_section (NULL, literal_section); |
| 7467 | |
| 7468 | head = head->next; |
| 7469 | } |
| 7470 | } |
| 7471 | |
| 7472 | |
| 7473 | void |
| 7474 | xtensa_move_literals () |
| 7475 | { |
| 7476 | seg_list *segment; |
| 7477 | frchainS *frchain_from, *frchain_to; |
| 7478 | fragS *search_frag, *next_frag, *last_frag, *literal_pool, *insert_after; |
| 7479 | fragS **frag_splice; |
| 7480 | emit_state state; |
| 7481 | segT dest_seg; |
| 7482 | fixS *fix, *next_fix, **fix_splice; |
| 7483 | sym_list *lit; |
| 7484 | |
| 7485 | /* As clunky as this is, we can't rely on frag_var |
| 7486 | and frag_variant to get called in all situations. */ |
| 7487 | |
| 7488 | segment = literal_head->next; |
| 7489 | while (segment) |
| 7490 | { |
| 7491 | frchain_from = seg_info (segment->seg)->frchainP; |
| 7492 | search_frag = frchain_from->frch_root; |
| 7493 | while (search_frag) |
| 7494 | { |
| 7495 | search_frag->tc_frag_data.is_literal = TRUE; |
| 7496 | search_frag = search_frag->fr_next; |
| 7497 | } |
| 7498 | segment = segment->next; |
| 7499 | } |
| 7500 | |
| 7501 | if (use_literal_section) |
| 7502 | return; |
| 7503 | |
| 7504 | segment = literal_head->next; |
| 7505 | while (segment) |
| 7506 | { |
| 7507 | frchain_from = seg_info (segment->seg)->frchainP; |
| 7508 | search_frag = frchain_from->frch_root; |
| 7509 | literal_pool = NULL; |
| 7510 | frchain_to = NULL; |
| 7511 | frag_splice = &(frchain_from->frch_root); |
| 7512 | |
| 7513 | while (!search_frag->tc_frag_data.literal_frag) |
| 7514 | { |
| 7515 | assert (search_frag->fr_fix == 0 |
| 7516 | || search_frag->fr_type == rs_align); |
| 7517 | search_frag = search_frag->fr_next; |
| 7518 | } |
| 7519 | |
| 7520 | assert (search_frag->tc_frag_data.literal_frag->fr_subtype |
| 7521 | == RELAX_LITERAL_POOL_BEGIN); |
| 7522 | xtensa_switch_section_emit_state (&state, segment->seg, 0); |
| 7523 | |
| 7524 | /* Make sure that all the frags in this series are closed, and |
| 7525 | that there is at least one left over of zero-size. This |
| 7526 | prevents us from making a segment with an frchain without any |
| 7527 | frags in it. */ |
| 7528 | frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 7529 | last_frag = frag_now; |
| 7530 | frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 7531 | |
| 7532 | while (search_frag != frag_now) |
| 7533 | { |
| 7534 | next_frag = search_frag->fr_next; |
| 7535 | |
| 7536 | /* First, move the frag out of the literal section and |
| 7537 | to the appropriate place. */ |
| 7538 | if (search_frag->tc_frag_data.literal_frag) |
| 7539 | { |
| 7540 | literal_pool = search_frag->tc_frag_data.literal_frag; |
| 7541 | assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN); |
| 7542 | /* Note that we set this fr_var to be a fix |
| 7543 | chain when we created the literal pool location |
| 7544 | as RELAX_LITERAL_POOL_BEGIN. */ |
| 7545 | frchain_to = (frchainS *) literal_pool->fr_var; |
| 7546 | } |
| 7547 | insert_after = literal_pool; |
| 7548 | |
| 7549 | while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END) |
| 7550 | insert_after = insert_after->fr_next; |
| 7551 | |
| 7552 | dest_seg = (segT) insert_after->fr_next->fr_var; |
| 7553 | |
| 7554 | *frag_splice = next_frag; |
| 7555 | search_frag->fr_next = insert_after->fr_next; |
| 7556 | insert_after->fr_next = search_frag; |
| 7557 | search_frag->tc_frag_data.lit_seg = dest_seg; |
| 7558 | |
| 7559 | /* Now move any fixups associated with this frag to the |
| 7560 | right section. */ |
| 7561 | fix = frchain_from->fix_root; |
| 7562 | fix_splice = &(frchain_from->fix_root); |
| 7563 | while (fix) |
| 7564 | { |
| 7565 | next_fix = fix->fx_next; |
| 7566 | if (fix->fx_frag == search_frag) |
| 7567 | { |
| 7568 | *fix_splice = next_fix; |
| 7569 | fix->fx_next = frchain_to->fix_root; |
| 7570 | frchain_to->fix_root = fix; |
| 7571 | if (frchain_to->fix_tail == NULL) |
| 7572 | frchain_to->fix_tail = fix; |
| 7573 | } |
| 7574 | else |
| 7575 | fix_splice = &(fix->fx_next); |
| 7576 | fix = next_fix; |
| 7577 | } |
| 7578 | search_frag = next_frag; |
| 7579 | } |
| 7580 | |
| 7581 | if (frchain_from->fix_root != NULL) |
| 7582 | { |
| 7583 | frchain_from = seg_info (segment->seg)->frchainP; |
| 7584 | as_warn (_("fixes not all moved from %s"), segment->seg->name); |
| 7585 | |
| 7586 | assert (frchain_from->fix_root == NULL); |
| 7587 | } |
| 7588 | frchain_from->fix_tail = NULL; |
| 7589 | xtensa_restore_emit_state (&state); |
| 7590 | segment = segment->next; |
| 7591 | } |
| 7592 | |
| 7593 | /* Now fix up the SEGMENT value for all the literal symbols. */ |
| 7594 | for (lit = literal_syms; lit; lit = lit->next) |
| 7595 | { |
| 7596 | symbolS *lit_sym = lit->sym; |
| 7597 | segT dest_seg = symbol_get_frag (lit_sym)->tc_frag_data.lit_seg; |
| 7598 | S_SET_SEGMENT (lit_sym, dest_seg); |
| 7599 | } |
| 7600 | } |
| 7601 | |
| 7602 | |
| 7603 | static void |
| 7604 | xtensa_reorder_seg_list (head, after) |
| 7605 | seg_list *head; |
| 7606 | segT after; |
| 7607 | { |
| 7608 | /* Move all of the sections in the section list to come |
| 7609 | after "after" in the gnu segment list. */ |
| 7610 | |
| 7611 | head = head->next; |
| 7612 | while (head) |
| 7613 | { |
| 7614 | segT literal_section = head->seg; |
| 7615 | |
| 7616 | /* Move the literal section after "after". */ |
| 7617 | assert (literal_section); |
| 7618 | if (literal_section != after) |
| 7619 | { |
| 7620 | xtensa_remove_section (literal_section); |
| 7621 | xtensa_insert_section (after, literal_section); |
| 7622 | } |
| 7623 | |
| 7624 | head = head->next; |
| 7625 | } |
| 7626 | } |
| 7627 | |
| 7628 | |
| 7629 | /* Push all the literal segments to the end of the gnu list. */ |
| 7630 | |
| 7631 | void |
| 7632 | xtensa_reorder_segments () |
| 7633 | { |
| 7634 | segT sec; |
| 7635 | segT last_sec; |
| 7636 | int old_count = 0; |
| 7637 | int new_count = 0; |
| 7638 | |
| 7639 | for (sec = stdoutput->sections; sec != NULL; sec = sec->next) |
| 7640 | old_count++; |
| 7641 | |
| 7642 | /* Now that we have the last section, push all the literal |
| 7643 | sections to the end. */ |
| 7644 | last_sec = get_last_sec (); |
| 7645 | xtensa_reorder_seg_list (literal_head, last_sec); |
| 7646 | xtensa_reorder_seg_list (init_literal_head, last_sec); |
| 7647 | xtensa_reorder_seg_list (fini_literal_head, last_sec); |
| 7648 | |
| 7649 | /* Now perform the final error check. */ |
| 7650 | for (sec = stdoutput->sections; sec != NULL; sec = sec->next) |
| 7651 | new_count++; |
| 7652 | assert (new_count == old_count); |
| 7653 | } |
| 7654 | |
| 7655 | |
| 7656 | segT |
| 7657 | get_last_sec () |
| 7658 | { |
| 7659 | segT last_sec = stdoutput->sections; |
| 7660 | while (last_sec->next != NULL) |
| 7661 | last_sec = last_sec->next; |
| 7662 | |
| 7663 | return last_sec; |
| 7664 | } |
| 7665 | |
| 7666 | |
| 7667 | /* Change the emit state (seg, subseg, and frag related stuff) to the |
| 7668 | correct location. Return a emit_state which can be passed to |
| 7669 | xtensa_restore_emit_state to return to current fragment. */ |
| 7670 | |
| 7671 | void |
| 7672 | xtensa_switch_to_literal_fragment (result) |
| 7673 | emit_state *result; |
| 7674 | { |
| 7675 | /* When we mark a literal pool location, we want to put a frag in |
| 7676 | the literal pool that points to it. But to do that, we want to |
| 7677 | switch_to_literal_fragment. But literal sections don't have |
| 7678 | literal pools, so their location is always null, so we would |
| 7679 | recurse forever. This is kind of hacky, but it works. */ |
| 7680 | |
| 7681 | static bfd_boolean recursive = FALSE; |
| 7682 | fragS *pool_location = get_literal_pool_location (now_seg); |
| 7683 | bfd_boolean is_init = |
| 7684 | (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME)); |
| 7685 | |
| 7686 | bfd_boolean is_fini = |
| 7687 | (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME)); |
| 7688 | |
| 7689 | |
| 7690 | if (pool_location == NULL |
| 7691 | && !use_literal_section |
| 7692 | && !recursive |
| 7693 | && !is_init && ! is_fini) |
| 7694 | { |
| 7695 | as_warn (_("inlining literal pool; " |
| 7696 | "specify location with .literal_position.")); |
| 7697 | recursive = TRUE; |
| 7698 | xtensa_mark_literal_pool_location (); |
| 7699 | recursive = FALSE; |
| 7700 | } |
| 7701 | |
| 7702 | /* Special case: If we are in the ".fini" or ".init" section, then |
| 7703 | we will ALWAYS be generating to the ".fini.literal" and |
| 7704 | ".init.literal" sections. */ |
| 7705 | |
| 7706 | if (is_init) |
| 7707 | { |
| 7708 | cache_literal_section (init_literal_head, |
| 7709 | default_lit_sections.init_lit_seg_name, |
| 7710 | &default_lit_sections.init_lit_seg); |
| 7711 | xtensa_switch_section_emit_state (result, |
| 7712 | default_lit_sections.init_lit_seg, 0); |
| 7713 | } |
| 7714 | else if (is_fini) |
| 7715 | { |
| 7716 | cache_literal_section (fini_literal_head, |
| 7717 | default_lit_sections.fini_lit_seg_name, |
| 7718 | &default_lit_sections.fini_lit_seg); |
| 7719 | xtensa_switch_section_emit_state (result, |
| 7720 | default_lit_sections.fini_lit_seg, 0); |
| 7721 | } |
| 7722 | else |
| 7723 | { |
| 7724 | cache_literal_section (literal_head, |
| 7725 | default_lit_sections.lit_seg_name, |
| 7726 | &default_lit_sections.lit_seg); |
| 7727 | xtensa_switch_section_emit_state (result, |
| 7728 | default_lit_sections.lit_seg, 0); |
| 7729 | } |
| 7730 | |
| 7731 | if (!use_literal_section && |
| 7732 | !is_init && !is_fini && |
| 7733 | get_literal_pool_location (now_seg) != pool_location) |
| 7734 | { |
| 7735 | /* Close whatever frag is there. */ |
| 7736 | frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 7737 | frag_now->tc_frag_data.literal_frag = pool_location; |
| 7738 | frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL); |
| 7739 | } |
| 7740 | |
| 7741 | /* Do a 4 byte align here. */ |
| 7742 | frag_align (2, 0, 0); |
| 7743 | } |
| 7744 | |
| 7745 | |
| 7746 | /* Call this function before emitting data into the literal section. |
| 7747 | This is a helper function for xtensa_switch_to_literal_fragment. |
| 7748 | This is similar to a .section new_now_seg subseg. */ |
| 7749 | |
| 7750 | void |
| 7751 | xtensa_switch_section_emit_state (state, new_now_seg, new_now_subseg) |
| 7752 | emit_state *state; |
| 7753 | segT new_now_seg; |
| 7754 | subsegT new_now_subseg; |
| 7755 | { |
| 7756 | state->name = now_seg->name; |
| 7757 | state->now_seg = now_seg; |
| 7758 | state->now_subseg = now_subseg; |
| 7759 | state->generating_literals = generating_literals; |
| 7760 | generating_literals++; |
| 7761 | subseg_new (segment_name (new_now_seg), new_now_subseg); |
| 7762 | } |
| 7763 | |
| 7764 | |
| 7765 | /* Use to restore the emitting into the normal place. */ |
| 7766 | |
| 7767 | void |
| 7768 | xtensa_restore_emit_state (state) |
| 7769 | emit_state *state; |
| 7770 | { |
| 7771 | generating_literals = state->generating_literals; |
| 7772 | subseg_new (state->name, state->now_subseg); |
| 7773 | } |
| 7774 | |
| 7775 | |
| 7776 | /* Get a segment of a given name. If the segment is already |
| 7777 | present, return it; otherwise, create a new one. */ |
| 7778 | |
| 7779 | static void |
| 7780 | cache_literal_section (head, name, seg) |
| 7781 | seg_list *head; |
| 7782 | const char *name; |
| 7783 | segT *seg; |
| 7784 | { |
| 7785 | segT current_section = now_seg; |
| 7786 | int current_subsec = now_subseg; |
| 7787 | |
| 7788 | if (*seg != 0) |
| 7789 | return; |
| 7790 | *seg = retrieve_literal_seg (head, name); |
| 7791 | subseg_set (current_section, current_subsec); |
| 7792 | } |
| 7793 | |
| 7794 | |
| 7795 | /* Get a segment of a given name. If the segment is already |
| 7796 | present, return it; otherwise, create a new one. */ |
| 7797 | |
| 7798 | static segT |
| 7799 | retrieve_literal_seg (head, name) |
| 7800 | seg_list *head; |
| 7801 | const char *name; |
| 7802 | { |
| 7803 | segT ret = 0; |
| 7804 | |
| 7805 | assert (head); |
| 7806 | |
| 7807 | ret = seg_present (name); |
| 7808 | if (!ret) |
| 7809 | { |
| 7810 | ret = subseg_new (name, (subsegT) 0); |
| 7811 | add_seg_list (head, ret); |
| 7812 | bfd_set_section_flags (stdoutput, ret, SEC_HAS_CONTENTS | |
| 7813 | SEC_READONLY | SEC_ALLOC | SEC_LOAD | SEC_CODE); |
| 7814 | bfd_set_section_alignment (stdoutput, ret, 2); |
| 7815 | } |
| 7816 | |
| 7817 | return ret; |
| 7818 | } |
| 7819 | |
| 7820 | |
| 7821 | /* Return a segment of a given name if it is present. */ |
| 7822 | |
| 7823 | static segT |
| 7824 | seg_present (name) |
| 7825 | const char *name; |
| 7826 | { |
| 7827 | segT seg; |
| 7828 | seg = stdoutput->sections; |
| 7829 | |
| 7830 | while (seg) |
| 7831 | { |
| 7832 | if (!strcmp (segment_name (seg), name)) |
| 7833 | return seg; |
| 7834 | seg = seg->next; |
| 7835 | } |
| 7836 | |
| 7837 | return 0; |
| 7838 | } |
| 7839 | |
| 7840 | |
| 7841 | /* Add a segment to a segment list. */ |
| 7842 | |
| 7843 | static void |
| 7844 | add_seg_list (head, seg) |
| 7845 | seg_list *head; |
| 7846 | segT seg; |
| 7847 | { |
| 7848 | seg_list *n; |
| 7849 | n = (seg_list *) xmalloc (sizeof (seg_list)); |
| 7850 | assert (n); |
| 7851 | |
| 7852 | n->seg = seg; |
| 7853 | n->next = head->next; |
| 7854 | head->next = n; |
| 7855 | } |
| 7856 | |
| 7857 | \f |
| 7858 | /* Set up Property Tables after Relaxation. */ |
| 7859 | |
| 7860 | #define XTENSA_INSN_SEC_NAME ".xt.insn" |
| 7861 | #define XTENSA_LIT_SEC_NAME ".xt.lit" |
| 7862 | |
| 7863 | void |
| 7864 | xtensa_post_relax_hook () |
| 7865 | { |
| 7866 | xtensa_move_seg_list_to_beginning (literal_head); |
| 7867 | xtensa_move_seg_list_to_beginning (init_literal_head); |
| 7868 | xtensa_move_seg_list_to_beginning (fini_literal_head); |
| 7869 | |
| 7870 | xtensa_create_property_segments (get_frag_is_insn, |
| 7871 | XTENSA_INSN_SEC_NAME, |
| 7872 | xt_literal_sec); |
| 7873 | if (use_literal_section) |
| 7874 | xtensa_create_property_segments (get_frag_is_literal, |
| 7875 | XTENSA_LIT_SEC_NAME, |
| 7876 | xt_insn_sec); |
| 7877 | } |
| 7878 | |
| 7879 | |
| 7880 | static bfd_boolean |
| 7881 | get_frag_is_literal (fragP) |
| 7882 | const fragS *fragP; |
| 7883 | { |
| 7884 | assert (fragP != NULL); |
| 7885 | return (fragP->tc_frag_data.is_literal); |
| 7886 | } |
| 7887 | |
| 7888 | |
| 7889 | static bfd_boolean |
| 7890 | get_frag_is_insn (fragP) |
| 7891 | const fragS *fragP; |
| 7892 | { |
| 7893 | assert (fragP != NULL); |
| 7894 | return (fragP->tc_frag_data.is_insn); |
| 7895 | } |
| 7896 | |
| 7897 | |
| 7898 | static void |
| 7899 | xtensa_create_property_segments (property_function, section_name_base, |
| 7900 | sec_type) |
| 7901 | frag_predicate property_function; |
| 7902 | const char * section_name_base; |
| 7903 | xt_section_type sec_type; |
| 7904 | { |
| 7905 | segT *seclist; |
| 7906 | |
| 7907 | /* Walk over all of the current segments. |
| 7908 | Walk over each fragment |
| 7909 | For each fragment that has instructions |
| 7910 | Build an instruction record (append where possible). */ |
| 7911 | |
| 7912 | for (seclist = &stdoutput->sections; |
| 7913 | seclist && *seclist; |
| 7914 | seclist = &(*seclist)->next) |
| 7915 | { |
| 7916 | segT sec = *seclist; |
| 7917 | if (section_has_property (sec, property_function)) |
| 7918 | { |
| 7919 | char * property_section_name = |
| 7920 | xtensa_get_property_section_name (stdoutput, sec, |
| 7921 | section_name_base); |
| 7922 | segT insn_sec = retrieve_xtensa_section (property_section_name); |
| 7923 | segment_info_type *xt_seg_info = retrieve_segment_info (insn_sec); |
| 7924 | xtensa_block_info ** xt_blocks = |
| 7925 | &xt_seg_info->tc_segment_info_data.blocks[sec_type]; |
| 7926 | /* Walk over all of the frchains here and add new sections. */ |
| 7927 | add_xt_block_frags (sec, insn_sec, xt_blocks, property_function); |
| 7928 | } |
| 7929 | } |
| 7930 | |
| 7931 | /* Now we fill them out.... */ |
| 7932 | |
| 7933 | for (seclist = &stdoutput->sections; |
| 7934 | seclist && *seclist; |
| 7935 | seclist = &(*seclist)->next) |
| 7936 | { |
| 7937 | segment_info_type *seginfo; |
| 7938 | xtensa_block_info *block; |
| 7939 | segT sec = *seclist; |
| 7940 | seginfo = seg_info (sec); |
| 7941 | block = seginfo->tc_segment_info_data.blocks[sec_type]; |
| 7942 | |
| 7943 | if (block) |
| 7944 | { |
| 7945 | xtensa_block_info *cur_block; |
| 7946 | /* This is a section with some data. */ |
| 7947 | size_t num_recs = 0; |
| 7948 | size_t rec_size; |
| 7949 | |
| 7950 | for (cur_block = block; cur_block; cur_block = cur_block->next) |
| 7951 | num_recs++; |
| 7952 | |
| 7953 | rec_size = num_recs * 8; |
| 7954 | bfd_set_section_size (stdoutput, sec, rec_size); |
| 7955 | |
| 7956 | /* In order to make this work with the assembler, we have to |
| 7957 | build some frags and then build the "fixups" for it. It |
| 7958 | would be easier to just set the contents then set the |
| 7959 | arlents. */ |
| 7960 | |
| 7961 | if (num_recs) |
| 7962 | { |
| 7963 | /* Allocate a fragment and leak it. */ |
| 7964 | fragS *fragP; |
| 7965 | size_t frag_size; |
| 7966 | fixS *fixes; |
| 7967 | frchainS *frchainP; |
| 7968 | size_t i; |
| 7969 | char *frag_data; |
| 7970 | |
| 7971 | frag_size = sizeof (fragS) + rec_size; |
| 7972 | fragP = (fragS *) xmalloc (frag_size); |
| 7973 | |
| 7974 | memset (fragP, 0, frag_size); |
| 7975 | fragP->fr_address = 0; |
| 7976 | fragP->fr_next = NULL; |
| 7977 | fragP->fr_fix = rec_size; |
| 7978 | fragP->fr_var = 0; |
| 7979 | fragP->fr_type = rs_fill; |
| 7980 | /* the rest are zeros */ |
| 7981 | |
| 7982 | frchainP = seginfo->frchainP; |
| 7983 | frchainP->frch_root = fragP; |
| 7984 | frchainP->frch_last = fragP; |
| 7985 | |
| 7986 | fixes = (fixS *) xmalloc (sizeof (fixS) * num_recs); |
| 7987 | memset (fixes, 0, sizeof (fixS) * num_recs); |
| 7988 | |
| 7989 | seginfo->fix_root = fixes; |
| 7990 | seginfo->fix_tail = &fixes[num_recs - 1]; |
| 7991 | cur_block = block; |
| 7992 | frag_data = &fragP->fr_literal[0]; |
| 7993 | for (i = 0; i < num_recs; i++) |
| 7994 | { |
| 7995 | fixS *fix = &fixes[i]; |
| 7996 | assert (cur_block); |
| 7997 | |
| 7998 | /* Write the fixup. */ |
| 7999 | if (i != num_recs - 1) |
| 8000 | fix->fx_next = &fixes[i + 1]; |
| 8001 | else |
| 8002 | fix->fx_next = NULL; |
| 8003 | fix->fx_size = 4; |
| 8004 | fix->fx_done = 0; |
| 8005 | fix->fx_frag = fragP; |
| 8006 | fix->fx_where = i * 8; |
| 8007 | fix->fx_addsy = section_symbol (cur_block->sec); |
| 8008 | fix->fx_offset = cur_block->offset; |
| 8009 | fix->fx_r_type = BFD_RELOC_32; |
| 8010 | fix->fx_file = "Internal Assembly"; |
| 8011 | fix->fx_line = 0; |
| 8012 | |
| 8013 | /* Write the length. */ |
| 8014 | md_number_to_chars (&frag_data[4 + 8 * i], |
| 8015 | cur_block->size, 4); |
| 8016 | cur_block = cur_block->next; |
| 8017 | } |
| 8018 | } |
| 8019 | } |
| 8020 | } |
| 8021 | } |
| 8022 | |
| 8023 | |
| 8024 | segment_info_type * |
| 8025 | retrieve_segment_info (seg) |
| 8026 | segT seg; |
| 8027 | { |
| 8028 | segment_info_type *seginfo; |
| 8029 | seginfo = (segment_info_type *) bfd_get_section_userdata (stdoutput, seg); |
| 8030 | if (!seginfo) |
| 8031 | { |
| 8032 | frchainS *frchainP; |
| 8033 | |
| 8034 | seginfo = (segment_info_type *) xmalloc (sizeof (*seginfo)); |
| 8035 | memset ((PTR) seginfo, 0, sizeof (*seginfo)); |
| 8036 | seginfo->fix_root = NULL; |
| 8037 | seginfo->fix_tail = NULL; |
| 8038 | seginfo->bfd_section = seg; |
| 8039 | seginfo->sym = 0; |
| 8040 | /* We will not be dealing with these, only our special ones. */ |
| 8041 | #if 0 |
| 8042 | if (seg == bfd_abs_section_ptr) |
| 8043 | abs_seg_info = seginfo; |
| 8044 | else if (seg == bfd_und_section_ptr) |
| 8045 | und_seg_info = seginfo; |
| 8046 | else |
| 8047 | #endif |
| 8048 | bfd_set_section_userdata (stdoutput, seg, (PTR) seginfo); |
| 8049 | #if 0 |
| 8050 | seg_fix_rootP = &segment_info[seg].fix_root; |
| 8051 | seg_fix_tailP = &segment_info[seg].fix_tail; |
| 8052 | #endif |
| 8053 | |
| 8054 | frchainP = (frchainS *) xmalloc (sizeof (frchainS)); |
| 8055 | frchainP->frch_root = NULL; |
| 8056 | frchainP->frch_last = NULL; |
| 8057 | frchainP->frch_next = NULL; |
| 8058 | frchainP->frch_seg = seg; |
| 8059 | frchainP->frch_subseg = 0; |
| 8060 | frchainP->fix_root = NULL; |
| 8061 | frchainP->fix_tail = NULL; |
| 8062 | /* Do not init the objstack. */ |
| 8063 | /* obstack_begin (&frchainP->frch_obstack, chunksize); */ |
| 8064 | /* frchainP->frch_frag_now = fragP; */ |
| 8065 | frchainP->frch_frag_now = NULL; |
| 8066 | |
| 8067 | seginfo->frchainP = frchainP; |
| 8068 | } |
| 8069 | |
| 8070 | return seginfo; |
| 8071 | } |
| 8072 | |
| 8073 | |
| 8074 | segT |
| 8075 | retrieve_xtensa_section (sec_name) |
| 8076 | char *sec_name; |
| 8077 | { |
| 8078 | bfd *abfd = stdoutput; |
| 8079 | flagword flags, out_flags, link_once_flags; |
| 8080 | segT s; |
| 8081 | |
| 8082 | flags = bfd_get_section_flags (abfd, now_seg); |
| 8083 | link_once_flags = (flags & SEC_LINK_ONCE); |
| 8084 | if (link_once_flags) |
| 8085 | link_once_flags |= (flags & SEC_LINK_DUPLICATES); |
| 8086 | out_flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY | link_once_flags); |
| 8087 | |
| 8088 | s = bfd_make_section_old_way (abfd, sec_name); |
| 8089 | if (s == NULL) |
| 8090 | as_bad (_("could not create section %s"), sec_name); |
| 8091 | if (!bfd_set_section_flags (abfd, s, out_flags)) |
| 8092 | as_bad (_("invalid flag combination on section %s"), sec_name); |
| 8093 | |
| 8094 | return s; |
| 8095 | } |
| 8096 | |
| 8097 | |
| 8098 | bfd_boolean |
| 8099 | section_has_property (sec, property_function) |
| 8100 | segT sec; |
| 8101 | frag_predicate property_function; |
| 8102 | { |
| 8103 | segment_info_type *seginfo = seg_info (sec); |
| 8104 | fragS *fragP; |
| 8105 | |
| 8106 | if (seginfo && seginfo->frchainP) |
| 8107 | { |
| 8108 | for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next) |
| 8109 | { |
| 8110 | if (property_function (fragP) |
| 8111 | && (fragP->fr_type != rs_fill || fragP->fr_fix != 0)) |
| 8112 | return TRUE; |
| 8113 | } |
| 8114 | } |
| 8115 | return FALSE; |
| 8116 | } |
| 8117 | |
| 8118 | |
| 8119 | /* Two types of block sections exist right now: literal and insns. */ |
| 8120 | |
| 8121 | void |
| 8122 | add_xt_block_frags (sec, xt_block_sec, xt_block, property_function) |
| 8123 | segT sec; |
| 8124 | segT xt_block_sec; |
| 8125 | xtensa_block_info **xt_block; |
| 8126 | frag_predicate property_function; |
| 8127 | { |
| 8128 | segment_info_type *seg_info; |
| 8129 | segment_info_type *xt_seg_info; |
| 8130 | bfd_vma seg_offset; |
| 8131 | fragS *fragP; |
| 8132 | |
| 8133 | xt_seg_info = retrieve_segment_info (xt_block_sec); |
| 8134 | seg_info = retrieve_segment_info (sec); |
| 8135 | |
| 8136 | /* Build it if needed. */ |
| 8137 | while (*xt_block != NULL) |
| 8138 | xt_block = &(*xt_block)->next; |
| 8139 | /* We are either at NULL at the beginning or at the end. */ |
| 8140 | |
| 8141 | /* Walk through the frags. */ |
| 8142 | seg_offset = 0; |
| 8143 | |
| 8144 | if (seg_info->frchainP) |
| 8145 | { |
| 8146 | for (fragP = seg_info->frchainP->frch_root; |
| 8147 | fragP; |
| 8148 | fragP = fragP->fr_next) |
| 8149 | { |
| 8150 | if (property_function (fragP) |
| 8151 | && (fragP->fr_type != rs_fill || fragP->fr_fix != 0)) |
| 8152 | { |
| 8153 | if (*xt_block != NULL) |
| 8154 | { |
| 8155 | if ((*xt_block)->offset + (*xt_block)->size |
| 8156 | == fragP->fr_address) |
| 8157 | (*xt_block)->size += fragP->fr_fix; |
| 8158 | else |
| 8159 | xt_block = &((*xt_block)->next); |
| 8160 | } |
| 8161 | if (*xt_block == NULL) |
| 8162 | { |
| 8163 | xtensa_block_info *new_block = (xtensa_block_info *) |
| 8164 | xmalloc (sizeof (xtensa_block_info)); |
| 8165 | new_block->sec = sec; |
| 8166 | new_block->offset = fragP->fr_address; |
| 8167 | new_block->size = fragP->fr_fix; |
| 8168 | new_block->next = NULL; |
| 8169 | *xt_block = new_block; |
| 8170 | } |
| 8171 | } |
| 8172 | } |
| 8173 | } |
| 8174 | } |
| 8175 | |
| 8176 | \f |
| 8177 | /* Instruction Stack Functions (from "xtensa-istack.h"). */ |
| 8178 | |
| 8179 | void |
| 8180 | istack_init (stack) |
| 8181 | IStack *stack; |
| 8182 | { |
| 8183 | memset (stack, 0, sizeof (IStack)); |
| 8184 | stack->ninsn = 0; |
| 8185 | } |
| 8186 | |
| 8187 | |
| 8188 | bfd_boolean |
| 8189 | istack_empty (stack) |
| 8190 | IStack *stack; |
| 8191 | { |
| 8192 | return (stack->ninsn == 0); |
| 8193 | } |
| 8194 | |
| 8195 | |
| 8196 | bfd_boolean |
| 8197 | istack_full (stack) |
| 8198 | IStack *stack; |
| 8199 | { |
| 8200 | return (stack->ninsn == MAX_ISTACK); |
| 8201 | } |
| 8202 | |
| 8203 | |
| 8204 | /* Return a pointer to the top IStack entry. |
| 8205 | It is an error to call this if istack_empty () is true. */ |
| 8206 | |
| 8207 | TInsn * |
| 8208 | istack_top (stack) |
| 8209 | IStack *stack; |
| 8210 | { |
| 8211 | int rec = stack->ninsn - 1; |
| 8212 | assert (!istack_empty (stack)); |
| 8213 | return &stack->insn[rec]; |
| 8214 | } |
| 8215 | |
| 8216 | |
| 8217 | /* Add a new TInsn to an IStack. |
| 8218 | It is an error to call this if istack_full () is true. */ |
| 8219 | |
| 8220 | void |
| 8221 | istack_push (stack, insn) |
| 8222 | IStack *stack; |
| 8223 | TInsn *insn; |
| 8224 | { |
| 8225 | int rec = stack->ninsn; |
| 8226 | assert (!istack_full (stack)); |
| 8227 | tinsn_copy (&stack->insn[rec], insn); |
| 8228 | stack->ninsn++; |
| 8229 | } |
| 8230 | |
| 8231 | |
| 8232 | /* Clear space for the next TInsn on the IStack and return a pointer |
| 8233 | to it. It is an error to call this if istack_full () is true. */ |
| 8234 | |
| 8235 | TInsn * |
| 8236 | istack_push_space (stack) |
| 8237 | IStack *stack; |
| 8238 | { |
| 8239 | int rec = stack->ninsn; |
| 8240 | TInsn *insn; |
| 8241 | assert (!istack_full (stack)); |
| 8242 | insn = &stack->insn[rec]; |
| 8243 | memset (insn, 0, sizeof (TInsn)); |
| 8244 | stack->ninsn++; |
| 8245 | return insn; |
| 8246 | } |
| 8247 | |
| 8248 | |
| 8249 | /* Remove the last pushed instruction. It is an error to call this if |
| 8250 | istack_empty () returns true. */ |
| 8251 | |
| 8252 | void |
| 8253 | istack_pop (stack) |
| 8254 | IStack *stack; |
| 8255 | { |
| 8256 | int rec = stack->ninsn - 1; |
| 8257 | assert (!istack_empty (stack)); |
| 8258 | stack->ninsn--; |
| 8259 | memset (&stack->insn[rec], 0, sizeof (TInsn)); |
| 8260 | } |
| 8261 | |
| 8262 | \f |
| 8263 | /* TInsn functions. */ |
| 8264 | |
| 8265 | void |
| 8266 | tinsn_init (dst) |
| 8267 | TInsn *dst; |
| 8268 | { |
| 8269 | memset (dst, 0, sizeof (TInsn)); |
| 8270 | } |
| 8271 | |
| 8272 | |
| 8273 | void |
| 8274 | tinsn_copy (dst, src) |
| 8275 | TInsn *dst; |
| 8276 | const TInsn *src; |
| 8277 | { |
| 8278 | tinsn_init (dst); |
| 8279 | memcpy (dst, src, sizeof (TInsn)); |
| 8280 | } |
| 8281 | |
| 8282 | |
| 8283 | /* Get the ``num''th token of the TInsn. |
| 8284 | It is illegal to call this if num > insn->ntoks. */ |
| 8285 | |
| 8286 | expressionS * |
| 8287 | tinsn_get_tok (insn, num) |
| 8288 | TInsn *insn; |
| 8289 | int num; |
| 8290 | { |
| 8291 | assert (num < insn->ntok); |
| 8292 | return &insn->tok[num]; |
| 8293 | } |
| 8294 | |
| 8295 | |
| 8296 | /* Return true if ANY of the operands in the insn are symbolic. */ |
| 8297 | |
| 8298 | static bfd_boolean |
| 8299 | tinsn_has_symbolic_operands (insn) |
| 8300 | const TInsn *insn; |
| 8301 | { |
| 8302 | int i; |
| 8303 | int n = insn->ntok; |
| 8304 | |
| 8305 | assert (insn->insn_type == ITYPE_INSN); |
| 8306 | |
| 8307 | for (i = 0; i < n; ++i) |
| 8308 | { |
| 8309 | switch (insn->tok[i].X_op) |
| 8310 | { |
| 8311 | case O_register: |
| 8312 | case O_constant: |
| 8313 | break; |
| 8314 | default: |
| 8315 | return TRUE; |
| 8316 | } |
| 8317 | } |
| 8318 | return FALSE; |
| 8319 | } |
| 8320 | |
| 8321 | |
| 8322 | bfd_boolean |
| 8323 | tinsn_has_invalid_symbolic_operands (insn) |
| 8324 | const TInsn *insn; |
| 8325 | { |
| 8326 | int i; |
| 8327 | int n = insn->ntok; |
| 8328 | |
| 8329 | assert (insn->insn_type == ITYPE_INSN); |
| 8330 | |
| 8331 | for (i = 0; i < n; ++i) |
| 8332 | { |
| 8333 | switch (insn->tok[i].X_op) |
| 8334 | { |
| 8335 | case O_register: |
| 8336 | case O_constant: |
| 8337 | break; |
| 8338 | default: |
| 8339 | if (i == get_relaxable_immed (insn->opcode)) |
| 8340 | break; |
| 8341 | as_bad (_("invalid symbolic operand %d on '%s'"), |
| 8342 | i, xtensa_opcode_name (xtensa_default_isa, insn->opcode)); |
| 8343 | return TRUE; |
| 8344 | } |
| 8345 | } |
| 8346 | return FALSE; |
| 8347 | } |
| 8348 | |
| 8349 | |
| 8350 | /* For assembly code with complex expressions (e.g. subtraction), |
| 8351 | we have to build them in the literal pool so that |
| 8352 | their results are calculated correctly after relaxation. |
| 8353 | The relaxation only handles expressions that |
| 8354 | boil down to SYMBOL + OFFSET. */ |
| 8355 | |
| 8356 | static bfd_boolean |
| 8357 | tinsn_has_complex_operands (insn) |
| 8358 | const TInsn *insn; |
| 8359 | { |
| 8360 | int i; |
| 8361 | int n = insn->ntok; |
| 8362 | assert (insn->insn_type == ITYPE_INSN); |
| 8363 | for (i = 0; i < n; ++i) |
| 8364 | { |
| 8365 | switch (insn->tok[i].X_op) |
| 8366 | { |
| 8367 | case O_register: |
| 8368 | case O_constant: |
| 8369 | case O_symbol: |
| 8370 | break; |
| 8371 | default: |
| 8372 | return TRUE; |
| 8373 | } |
| 8374 | } |
| 8375 | return FALSE; |
| 8376 | } |
| 8377 | |
| 8378 | |
| 8379 | /* Convert the constant operands in the t_insn to insnbuf. |
| 8380 | Return true if there is a symbol in the immediate field. |
| 8381 | |
| 8382 | Before this is called, |
| 8383 | 1) the number of operands are correct |
| 8384 | 2) the t_insn is a ITYPE_INSN |
| 8385 | 3) ONLY the relaxable_ is built |
| 8386 | 4) All operands are O_constant, O_symbol. All constants fit |
| 8387 | The return value tells whether there are any remaining O_symbols. */ |
| 8388 | |
| 8389 | static bfd_boolean |
| 8390 | tinsn_to_insnbuf (t_insn, insnbuf) |
| 8391 | TInsn *t_insn; |
| 8392 | xtensa_insnbuf insnbuf; |
| 8393 | { |
| 8394 | xtensa_isa isa = xtensa_default_isa; |
| 8395 | xtensa_opcode opcode = t_insn->opcode; |
| 8396 | bfd_boolean has_fixup = FALSE; |
| 8397 | int noperands = xtensa_num_operands (isa, opcode); |
| 8398 | int i; |
| 8399 | uint32 opnd_value; |
| 8400 | char *file_name; |
| 8401 | int line; |
| 8402 | |
| 8403 | assert (t_insn->insn_type == ITYPE_INSN); |
| 8404 | if (noperands != t_insn->ntok) |
| 8405 | as_fatal (_("operand number mismatch")); |
| 8406 | |
| 8407 | xtensa_encode_insn (isa, opcode, insnbuf); |
| 8408 | |
| 8409 | for (i = 0; i < noperands; ++i) |
| 8410 | { |
| 8411 | expressionS *expr = &t_insn->tok[i]; |
| 8412 | xtensa_operand operand = xtensa_get_operand (isa, opcode, i); |
| 8413 | switch (expr->X_op) |
| 8414 | { |
| 8415 | case O_register: |
| 8416 | /* The register number has already been checked in |
| 8417 | expression_maybe_register, so we don't need to check here. */ |
| 8418 | opnd_value = expr->X_add_number; |
| 8419 | (void) xtensa_operand_encode (operand, &opnd_value); |
| 8420 | xtensa_operand_set_field (operand, insnbuf, opnd_value); |
| 8421 | break; |
| 8422 | |
| 8423 | case O_constant: |
| 8424 | as_where (&file_name, &line); |
| 8425 | /* It is a constant and we called this function, |
| 8426 | then we have to try to fit it. */ |
| 8427 | xtensa_insnbuf_set_operand (insnbuf, opcode, operand, |
| 8428 | expr->X_add_number, file_name, line); |
| 8429 | break; |
| 8430 | |
| 8431 | case O_symbol: |
| 8432 | default: |
| 8433 | has_fixup = TRUE; |
| 8434 | break; |
| 8435 | } |
| 8436 | } |
| 8437 | return has_fixup; |
| 8438 | } |
| 8439 | |
| 8440 | |
| 8441 | /* Check the instruction arguments. Return true on failure. */ |
| 8442 | |
| 8443 | bfd_boolean |
| 8444 | tinsn_check_arguments (insn) |
| 8445 | const TInsn *insn; |
| 8446 | { |
| 8447 | xtensa_isa isa = xtensa_default_isa; |
| 8448 | xtensa_opcode opcode = insn->opcode; |
| 8449 | |
| 8450 | if (opcode == XTENSA_UNDEFINED) |
| 8451 | { |
| 8452 | as_bad (_("invalid opcode")); |
| 8453 | return TRUE; |
| 8454 | } |
| 8455 | |
| 8456 | if (xtensa_num_operands (isa, opcode) > insn->ntok) |
| 8457 | { |
| 8458 | as_bad (_("too few operands")); |
| 8459 | return TRUE; |
| 8460 | } |
| 8461 | |
| 8462 | if (xtensa_num_operands (isa, opcode) < insn->ntok) |
| 8463 | { |
| 8464 | as_bad (_("too many operands")); |
| 8465 | return TRUE; |
| 8466 | } |
| 8467 | return FALSE; |
| 8468 | } |
| 8469 | |
| 8470 | |
| 8471 | /* Load an instruction from its encoded form. */ |
| 8472 | |
| 8473 | static void |
| 8474 | tinsn_from_chars (t_insn, f) |
| 8475 | TInsn *t_insn; |
| 8476 | char *f; |
| 8477 | { |
| 8478 | static xtensa_insnbuf insnbuf = NULL; |
| 8479 | int i; |
| 8480 | xtensa_opcode opcode; |
| 8481 | xtensa_isa isa = xtensa_default_isa; |
| 8482 | |
| 8483 | if (!insnbuf) |
| 8484 | insnbuf = xtensa_insnbuf_alloc (isa); |
| 8485 | |
| 8486 | xtensa_insnbuf_from_chars (isa, insnbuf, f); |
| 8487 | opcode = xtensa_decode_insn (isa, insnbuf); |
| 8488 | |
| 8489 | /* Find the immed. */ |
| 8490 | tinsn_init (t_insn); |
| 8491 | t_insn->insn_type = ITYPE_INSN; |
| 8492 | t_insn->is_specific_opcode = FALSE; /* Must not be specific. */ |
| 8493 | t_insn->opcode = opcode; |
| 8494 | t_insn->ntok = xtensa_num_operands (isa, opcode); |
| 8495 | for (i = 0; i < t_insn->ntok; i++) |
| 8496 | { |
| 8497 | set_expr_const (&t_insn->tok[i], |
| 8498 | xtensa_insnbuf_get_operand (insnbuf, opcode, i)); |
| 8499 | } |
| 8500 | } |
| 8501 | |
| 8502 | |
| 8503 | /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */ |
| 8504 | |
| 8505 | static void |
| 8506 | tinsn_immed_from_frag (t_insn, fragP) |
| 8507 | TInsn *t_insn; |
| 8508 | fragS *fragP; |
| 8509 | { |
| 8510 | xtensa_opcode opcode = t_insn->opcode; |
| 8511 | int opnum; |
| 8512 | |
| 8513 | if (fragP->fr_symbol) |
| 8514 | { |
| 8515 | opnum = get_relaxable_immed (opcode); |
| 8516 | set_expr_symbol_offset (&t_insn->tok[opnum], |
| 8517 | fragP->fr_symbol, fragP->fr_offset); |
| 8518 | } |
| 8519 | } |
| 8520 | |
| 8521 | |
| 8522 | static int |
| 8523 | get_num_stack_text_bytes (istack) |
| 8524 | IStack *istack; |
| 8525 | { |
| 8526 | int i; |
| 8527 | int text_bytes = 0; |
| 8528 | |
| 8529 | for (i = 0; i < istack->ninsn; i++) |
| 8530 | { |
| 8531 | TInsn *t_insn = &istack->insn[i]; |
| 8532 | if (t_insn->insn_type == ITYPE_INSN) |
| 8533 | text_bytes += xg_get_insn_size (t_insn); |
| 8534 | } |
| 8535 | return text_bytes; |
| 8536 | } |
| 8537 | |
| 8538 | |
| 8539 | static int |
| 8540 | get_num_stack_literal_bytes (istack) |
| 8541 | IStack *istack; |
| 8542 | { |
| 8543 | int i; |
| 8544 | int lit_bytes = 0; |
| 8545 | |
| 8546 | for (i = 0; i < istack->ninsn; i++) |
| 8547 | { |
| 8548 | TInsn *t_insn = &istack->insn[i]; |
| 8549 | |
| 8550 | if (t_insn->insn_type == ITYPE_LITERAL && t_insn->ntok == 1) |
| 8551 | lit_bytes += 4; |
| 8552 | } |
| 8553 | return lit_bytes; |
| 8554 | } |
| 8555 | |
| 8556 | \f |
| 8557 | /* Expression utilities. */ |
| 8558 | |
| 8559 | /* Return true if the expression is an integer constant. */ |
| 8560 | |
| 8561 | bfd_boolean |
| 8562 | expr_is_const (s) |
| 8563 | const expressionS *s; |
| 8564 | { |
| 8565 | return (s->X_op == O_constant); |
| 8566 | } |
| 8567 | |
| 8568 | |
| 8569 | /* Get the expression constant. |
| 8570 | Calling this is illegal if expr_is_const () returns true. */ |
| 8571 | |
| 8572 | offsetT |
| 8573 | get_expr_const (s) |
| 8574 | const expressionS *s; |
| 8575 | { |
| 8576 | assert (expr_is_const (s)); |
| 8577 | return s->X_add_number; |
| 8578 | } |
| 8579 | |
| 8580 | |
| 8581 | /* Set the expression to a constant value. */ |
| 8582 | |
| 8583 | void |
| 8584 | set_expr_const (s, val) |
| 8585 | expressionS *s; |
| 8586 | offsetT val; |
| 8587 | { |
| 8588 | s->X_op = O_constant; |
| 8589 | s->X_add_number = val; |
| 8590 | s->X_add_symbol = NULL; |
| 8591 | s->X_op_symbol = NULL; |
| 8592 | } |
| 8593 | |
| 8594 | |
| 8595 | /* Set the expression to a symbol + constant offset. */ |
| 8596 | |
| 8597 | void |
| 8598 | set_expr_symbol_offset (s, sym, offset) |
| 8599 | expressionS *s; |
| 8600 | symbolS *sym; |
| 8601 | offsetT offset; |
| 8602 | { |
| 8603 | s->X_op = O_symbol; |
| 8604 | s->X_add_symbol = sym; |
| 8605 | s->X_op_symbol = NULL; /* unused */ |
| 8606 | s->X_add_number = offset; |
| 8607 | } |
| 8608 | |
| 8609 | |
| 8610 | bfd_boolean |
| 8611 | expr_is_equal (s1, s2) |
| 8612 | expressionS *s1; |
| 8613 | expressionS *s2; |
| 8614 | { |
| 8615 | if (s1->X_op != s2->X_op) |
| 8616 | return FALSE; |
| 8617 | if (s1->X_add_symbol != s2->X_add_symbol) |
| 8618 | return FALSE; |
| 8619 | if (s1->X_op_symbol != s2->X_op_symbol) |
| 8620 | return FALSE; |
| 8621 | if (s1->X_add_number != s2->X_add_number) |
| 8622 | return FALSE; |
| 8623 | return TRUE; |
| 8624 | } |
| 8625 | |
| 8626 | |
| 8627 | static void |
| 8628 | copy_expr (dst, src) |
| 8629 | expressionS *dst; |
| 8630 | const expressionS *src; |
| 8631 | { |
| 8632 | memcpy (dst, src, sizeof (expressionS)); |
| 8633 | } |
| 8634 | |
| 8635 | \f |
| 8636 | /* Support for Tensilica's "--rename-section" option. */ |
| 8637 | |
| 8638 | #ifdef XTENSA_SECTION_RENAME |
| 8639 | |
| 8640 | struct rename_section_struct |
| 8641 | { |
| 8642 | char *old_name; |
| 8643 | char *new_name; |
| 8644 | struct rename_section_struct *next; |
| 8645 | }; |
| 8646 | |
| 8647 | static struct rename_section_struct *section_rename; |
| 8648 | |
| 8649 | |
| 8650 | /* Parse the string oldname=new_name:oldname2=new_name2 |
| 8651 | and call add_section_rename. */ |
| 8652 | |
| 8653 | void |
| 8654 | build_section_rename (arg) |
| 8655 | const char *arg; |
| 8656 | { |
| 8657 | char *this_arg = NULL; |
| 8658 | char *next_arg = NULL; |
| 8659 | |
| 8660 | for (this_arg = strdup (arg); this_arg != NULL; this_arg = next_arg) |
| 8661 | { |
| 8662 | if (this_arg) |
| 8663 | { |
| 8664 | next_arg = strchr (this_arg, ':'); |
| 8665 | if (next_arg) |
| 8666 | { |
| 8667 | *next_arg = '\0'; |
| 8668 | next_arg++; |
| 8669 | } |
| 8670 | } |
| 8671 | { |
| 8672 | char *old_name = this_arg; |
| 8673 | char *new_name = strchr (this_arg, '='); |
| 8674 | |
| 8675 | if (*old_name == '\0') |
| 8676 | { |
| 8677 | as_warn (_("ignoring extra '-rename-section' delimiter ':'")); |
| 8678 | continue; |
| 8679 | } |
| 8680 | if (!new_name || new_name[1] == '\0') |
| 8681 | { |
| 8682 | as_warn (_("ignoring invalid '-rename-section' " |
| 8683 | "specification: '%s'"), old_name); |
| 8684 | continue; |
| 8685 | } |
| 8686 | *new_name = '\0'; |
| 8687 | new_name++; |
| 8688 | add_section_rename (old_name, new_name); |
| 8689 | } |
| 8690 | } |
| 8691 | } |
| 8692 | |
| 8693 | |
| 8694 | static void |
| 8695 | add_section_rename (old_name, new_name) |
| 8696 | char *old_name; |
| 8697 | char *new_name; |
| 8698 | { |
| 8699 | struct rename_section_struct *r = section_rename; |
| 8700 | |
| 8701 | /* Check for invalid section renaming. */ |
| 8702 | for (r = section_rename; r != NULL; r = r->next) |
| 8703 | { |
| 8704 | if (strcmp (r->old_name, old_name) == 0) |
| 8705 | as_bad (_("section %s renamed multiple times"), old_name); |
| 8706 | if (strcmp (r->new_name, new_name) == 0) |
| 8707 | as_bad (_("multiple sections remapped to output section %s"), |
| 8708 | new_name); |
| 8709 | } |
| 8710 | |
| 8711 | /* Now add it. */ |
| 8712 | r = (struct rename_section_struct *) |
| 8713 | xmalloc (sizeof (struct rename_section_struct)); |
| 8714 | r->old_name = strdup (old_name); |
| 8715 | r->new_name = strdup (new_name); |
| 8716 | r->next = section_rename; |
| 8717 | section_rename = r; |
| 8718 | } |
| 8719 | |
| 8720 | |
| 8721 | const char * |
| 8722 | xtensa_section_rename (name) |
| 8723 | const char *name; |
| 8724 | { |
| 8725 | struct rename_section_struct *r = section_rename; |
| 8726 | |
| 8727 | for (r = section_rename; r != NULL; r = r->next) |
| 8728 | if (strcmp (r->old_name, name) == 0) |
| 8729 | return r->new_name; |
| 8730 | |
| 8731 | return name; |
| 8732 | } |
| 8733 | |
| 8734 | #endif /* XTENSA_SECTION_RENAME */ |