| 1 | @c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. |
| 2 | @c This is part of the GAS manual. |
| 3 | @c For copying conditions, see the file as.texinfo. |
| 4 | @ifset GENERIC |
| 5 | @page |
| 6 | @node Sparc-Dependent |
| 7 | @chapter SPARC Dependent Features |
| 8 | @end ifset |
| 9 | @ifclear GENERIC |
| 10 | @node Machine Dependencies |
| 11 | @chapter SPARC Dependent Features |
| 12 | @end ifclear |
| 13 | |
| 14 | @cindex SPARC support |
| 15 | @menu |
| 16 | * Sparc-Opts:: Options |
| 17 | * Sparc-Aligned-Data:: Option to enforce aligned data |
| 18 | * Sparc-Float:: Floating Point |
| 19 | * Sparc-Directives:: Sparc Machine Directives |
| 20 | @end menu |
| 21 | |
| 22 | @node Sparc-Opts |
| 23 | @section Options |
| 24 | |
| 25 | @cindex options for SPARC |
| 26 | @cindex SPARC options |
| 27 | @cindex architectures, SPARC |
| 28 | @cindex SPARC architectures |
| 29 | The SPARC chip family includes several successive levels, using the same |
| 30 | core instruction set, but including a few additional instructions at |
| 31 | each level. There are exceptions to this however. For details on what |
| 32 | instructions each variant supports, please see the chip's architecture |
| 33 | reference manual. |
| 34 | |
| 35 | By default, @code{@value{AS}} assumes the core instruction set (SPARC |
| 36 | v6), but ``bumps'' the architecture level as needed: it switches to |
| 37 | successively higher architectures as it encounters instructions that |
| 38 | only exist in the higher levels. |
| 39 | |
| 40 | If not configured for SPARC v9 (@code{sparc64-*-*}) GAS will not bump |
| 41 | passed sparclite by default, an option must be passed to enable the |
| 42 | v9 instructions. |
| 43 | |
| 44 | GAS treats sparclite as being compatible with v8, unless an architecture |
| 45 | is explicitly requested. SPARC v9 is always incompatible with sparclite. |
| 46 | |
| 47 | @c The order here is the same as the order of enum sparc_opcode_arch_val |
| 48 | @c to give the user a sense of the order of the "bumping". |
| 49 | |
| 50 | @table @code |
| 51 | @kindex -Av6 |
| 52 | @kindex Av7 |
| 53 | @kindex -Av8 |
| 54 | @kindex -Asparclet |
| 55 | @kindex -Asparclite |
| 56 | @kindex -Av9 |
| 57 | @kindex -Av9a |
| 58 | @item -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite |
| 59 | @itemx -Av8plus | -Av8plusa | -Av9 | -Av9a |
| 60 | Use one of the @samp{-A} options to select one of the SPARC |
| 61 | architectures explicitly. If you select an architecture explicitly, |
| 62 | @code{@value{AS}} reports a fatal error if it encounters an instruction |
| 63 | or feature requiring an incompatible or higher level. |
| 64 | |
| 65 | @samp{-Av8plus} and @samp{-Av8plusa} select a 32 bit environment. |
| 66 | |
| 67 | @samp{-Av9} and @samp{-Av9a} select a 64 bit environment and are not |
| 68 | available unless GAS is explicitly configured with 64 bit environment |
| 69 | support. |
| 70 | |
| 71 | @samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with |
| 72 | UltraSPARC extensions. |
| 73 | |
| 74 | @item -xarch=v8plus | -xarch=v8plusa |
| 75 | For compatibility with the Solaris v9 assembler. These options are |
| 76 | equivalent to -Av8plus and -Av8plusa, respectively. |
| 77 | |
| 78 | @item -bump |
| 79 | Warn whenever it is necessary to switch to another level. |
| 80 | If an architecture level is explicitly requested, GAS will not issue |
| 81 | warnings until that level is reached, and will then bump the level |
| 82 | as required (except between incompatible levels). |
| 83 | |
| 84 | @item -32 | -64 |
| 85 | Select the word size, either 32 bits or 64 bits. |
| 86 | These options are only available with the ELF object file format, |
| 87 | and require that the necessary BFD support has been included. |
| 88 | @end table |
| 89 | |
| 90 | @node Sparc-Aligned-Data |
| 91 | @section Enforcing aligned data |
| 92 | |
| 93 | @cindex data alignment on SPARC |
| 94 | @cindex SPARC data alignment |
| 95 | SPARC GAS normally permits data to be misaligned. For example, it |
| 96 | permits the @code{.long} pseudo-op to be used on a byte boundary. |
| 97 | However, the native SunOS and Solaris assemblers issue an error when |
| 98 | they see misaligned data. |
| 99 | |
| 100 | @kindex --enforce-aligned-data |
| 101 | You can use the @code{--enforce-aligned-data} option to make SPARC GAS |
| 102 | also issue an error about misaligned data, just as the SunOS and Solaris |
| 103 | assemblers do. |
| 104 | |
| 105 | The @code{--enforce-aligned-data} option is not the default because gcc |
| 106 | issues misaligned data pseudo-ops when it initializes certain packed |
| 107 | data structures (structures defined using the @code{packed} attribute). |
| 108 | You may have to assemble with GAS in order to initialize packed data |
| 109 | structures in your own code. |
| 110 | |
| 111 | @ignore |
| 112 | @c FIXME: (sparc) Fill in "syntax" section! |
| 113 | @c subsection syntax |
| 114 | I don't know anything about Sparc syntax. Someone who does |
| 115 | will have to write this section. |
| 116 | @end ignore |
| 117 | |
| 118 | @node Sparc-Float |
| 119 | @section Floating Point |
| 120 | |
| 121 | @cindex floating point, SPARC (@sc{ieee}) |
| 122 | @cindex SPARC floating point (@sc{ieee}) |
| 123 | The Sparc uses @sc{ieee} floating-point numbers. |
| 124 | |
| 125 | @node Sparc-Directives |
| 126 | @section Sparc Machine Directives |
| 127 | |
| 128 | @cindex SPARC machine directives |
| 129 | @cindex machine directives, SPARC |
| 130 | The Sparc version of @code{@value{AS}} supports the following additional |
| 131 | machine directives: |
| 132 | |
| 133 | @table @code |
| 134 | @cindex @code{align} directive, SPARC |
| 135 | @item .align |
| 136 | This must be followed by the desired alignment in bytes. |
| 137 | |
| 138 | @cindex @code{common} directive, SPARC |
| 139 | @item .common |
| 140 | This must be followed by a symbol name, a positive number, and |
| 141 | @code{"bss"}. This behaves somewhat like @code{.comm}, but the |
| 142 | syntax is different. |
| 143 | |
| 144 | @cindex @code{half} directive, SPARC |
| 145 | @item .half |
| 146 | This is functionally identical to @code{.short}. |
| 147 | |
| 148 | @cindex @code{proc} directive, SPARC |
| 149 | @item .proc |
| 150 | This directive is ignored. Any text following it on the same |
| 151 | line is also ignored. |
| 152 | |
| 153 | @cindex @code{reserve} directive, SPARC |
| 154 | @item .reserve |
| 155 | This must be followed by a symbol name, a positive number, and |
| 156 | @code{"bss"}. This behaves somewhat like @code{.lcomm}, but the |
| 157 | syntax is different. |
| 158 | |
| 159 | @cindex @code{seg} directive, SPARC |
| 160 | @item .seg |
| 161 | This must be followed by @code{"text"}, @code{"data"}, or |
| 162 | @code{"data1"}. It behaves like @code{.text}, @code{.data}, or |
| 163 | @code{.data 1}. |
| 164 | |
| 165 | @cindex @code{skip} directive, SPARC |
| 166 | @item .skip |
| 167 | This is functionally identical to the @code{.space} directive. |
| 168 | |
| 169 | @cindex @code{word} directive, SPARC |
| 170 | @item .word |
| 171 | On the Sparc, the @code{.word} directive produces 32 bit values, |
| 172 | instead of the 16 bit values it produces on many other machines. |
| 173 | |
| 174 | @cindex @code{xword} directive, SPARC |
| 175 | @item .xword |
| 176 | On the Sparc V9 processor, the @code{.xword} directive produces |
| 177 | 64 bit values. |
| 178 | @end table |
| 179 | |