| 1 | // diagnostic.s Test file for diagnostic quality. |
| 2 | |
| 3 | .text |
| 4 | fmul, s0, s1, s2 |
| 5 | fmul , s0, s1, s2 |
| 6 | fmul , s0, s1, s2 |
| 7 | b.random label1 |
| 8 | fmull s0 |
| 9 | aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa |
| 10 | sys 1,c1,c3,3, |
| 11 | ext v0.8b, v1.8b, v2.8b, 8 |
| 12 | ext v0.16b, v1.16b, v2.16b, 20 |
| 13 | svc -1 |
| 14 | svc 65536 |
| 15 | ccmp w0, 32, 10, le |
| 16 | ccmp x0, -1, 10, le |
| 17 | tlbi alle3is, x0 |
| 18 | tlbi vaale1is |
| 19 | tlbi vaale1is x0 |
| 20 | msr spsel, 3 |
| 21 | fcvtzu x15, d31, #66 |
| 22 | scvtf s0, w0, 33 |
| 23 | scvtf s0, w0, 0 |
| 24 | smlal v0.4s, v31.4h, v16.h[1] |
| 25 | smlal v0.4s, v31.4h, v15.h[8] |
| 26 | add sp, x0, x7, lsr #2 |
| 27 | add x0, x0, x7, uxtx #5 |
| 28 | add x0, xzr, x7, ror #5 |
| 29 | add w0, wzr, w7, asr #32 |
| 30 | st2 {v0.4s, v1.4s}, [sp], #24 |
| 31 | ldr q0, [x0, w0, uxtw #5] |
| 32 | st2 {v0.4s, v1.4s, v2.4s, v3.4s}, [sp], #64 |
| 33 | adds x1, sp, 2134, lsl #4 |
| 34 | movz w0, 2134, lsl #8 |
| 35 | movz w0, 2134, lsl #32 |
| 36 | movz x0, 2134, lsl #47 |
| 37 | sbfiz w0, w7, 15, 18 |
| 38 | sbfiz w0, w7, 15, 0 |
| 39 | shll v1.4s, v2.4h, #15 |
| 40 | shll v1.4s, v2.4h, #32 |
| 41 | shl v1.2s, v2.2s, 32 |
| 42 | sqshrn2 v2.16b, v3.8h, #17 |
| 43 | movi v1.4h, 256 |
| 44 | movi v1.4h, -129 |
| 45 | movi v1.4h, 255, msl #8 |
| 46 | movi d0, 256 |
| 47 | movi v1.4h, 255, lsl #7 |
| 48 | movi v1.4h, 255, lsl #16 |
| 49 | movi v2.2s, 255, msl #0 |
| 50 | movi v2.2s, 255, msl #15 |
| 51 | fmov v1.2s, 1.01 |
| 52 | fmov v1.2d, 1.01 |
| 53 | fmov s3, 1.01 |
| 54 | fmov d3, 1.01 |
| 55 | fcmp d0, #1.0 |
| 56 | fcmp d0, x0 |
| 57 | cmgt v0.4s, v2.4s, #1 |
| 58 | fmov d3, 1.00, lsl #3 |
| 59 | st2 {v0.4s, v1.4s}, [sp], sp |
| 60 | st2 {v0.4s, v1.4s}, [sp], zr |
| 61 | ldr q0, [x0, w0, lsr #4] |
| 62 | adds x1, sp, 2134, uxtw #12 |
| 63 | movz x0, 2134, lsl #64 |
| 64 | adds sp, sp, 2134, lsl #12 |
| 65 | ldxrb w2, [x0, #1] |
| 66 | ldrb w0, x1, x2, sxtx |
| 67 | prfm PLDL3KEEP, [x9, x15, sxtx #2] |
| 68 | sysl x7, #1, C16, C30, #1 |
| 69 | sysl x7, #1, C15, C77, #1 |
| 70 | add x0, xzr, x7, uxtx #5 |
| 71 | mov x0, ##5 |
| 72 | bad expression |
| 73 | mockup-op |
| 74 | orr x0. x0, #0xff, lsl #1 |
| 75 | movk x1, #:abs_g1_s:s12 |
| 76 | movz x1, #:abs_g1_s:s12, lsl #16 |
| 77 | prfm pldl3strm, [sp, w0, sxtw #3]! |
| 78 | prfm 0x2f, LABEL1 |
| 79 | dmb #16 |
| 80 | tbz w0, #40, 0x17c |
| 81 | st2 {v4.2d, v5.2d, v6.2d}, [x3] |
| 82 | ld2 {v1.4h, v0.4h}, [x1] |
| 83 | isb osh |
| 84 | st2 {v4.2d, v5.2d, v6.2d}, \[x3\] |
| 85 | ldnp w7, w15, [x3, #3] |
| 86 | stnp x7, x15, [x3, #32]! |
| 87 | ldnp w7, w15, [x3, #256] |
| 88 | movi v1.2d, 4294967295, lsl #0 |
| 89 | movi v1.8b, 97, lsl #8 |
| 90 | msr dummy, x1 |
| 91 | fmov s0, 0x42000000 |
| 92 | ldp x0, x1, [x2, #4] |
| 93 | ldp x0, x1, [x2, #4]! |
| 94 | ldp x0, x1, [x2], #4 |
| 95 | stp w0, w1, [x2, #3] |
| 96 | stp w0, w1, [x2, #2]! |
| 97 | stp w0, w1, [x2], #1 |
| 98 | cinc w0, w1, al |
| 99 | cinc w0, w1, nv |
| 100 | cset w0, al |
| 101 | cset w0, nv |
| 102 | |
| 103 | # test diagnostic info on optional operand |
| 104 | ret lr |
| 105 | ret kk |
| 106 | clrex x0 |
| 107 | clrex w0 |
| 108 | clrex kk |
| 109 | sys #0, c0, c0, #0, kk |
| 110 | sys #0, c0, c0, #0, |
| 111 | |
| 112 | casp w0,w1,w2,w3,[x4] |
| 113 | |
| 114 | # test warning of unpredictable load pairs |
| 115 | ldp x0, x0, [sp] |
| 116 | ldp d0, d0, [sp] |
| 117 | ldp x0, x0, [sp], #16 |
| 118 | ldnp x0, x0, [sp] |
| 119 | |
| 120 | # test warning of unpredictable writeback |
| 121 | ldr x0, [x0, #8]! |
| 122 | str x0, [x0, #8]! |
| 123 | str x1, [x1], #8 |
| 124 | stp x0, x1, [x0, #16]! |
| 125 | ldp x0, x1, [x1], #16 |
| 126 | adr x2, :got:s1 |
| 127 | ldr x0, [x0, :got:s1] |
| 128 | |
| 129 | # Test error of 32-bit base reg |
| 130 | ldr x1, [wsp, #8]! |
| 131 | ldp x6, x29, [w7, #8]! |
| 132 | str x30, [w11, #8]! |
| 133 | stp x8, x27, [wsp, #8]! |
| 134 | |
| 135 | # Test various valid load/store reg combination. |
| 136 | # especially we shouldn't warn on xzr, although |
| 137 | # xzr is with the same encoding 31 as sp. |
| 138 | .macro ldst_pair_wb_2 op, reg1, reg2 |
| 139 | .irp base x3, x6, x25, sp |
| 140 | \op \reg1, \reg2, [\base], #16 |
| 141 | \op \reg1, \reg2, [\base, #32]! |
| 142 | \op \reg2, \reg1, [\base], #32 |
| 143 | \op \reg2, \reg1, [\base, #16]! |
| 144 | .endr |
| 145 | .endm |
| 146 | |
| 147 | .macro ldst_pair_wb_1 op, reg1, width |
| 148 | .irp reg2 0, 14, 21, 23, 29 |
| 149 | ldst_pair_wb_2 \op, \reg1, \width\reg2 |
| 150 | .endr |
| 151 | .endm |
| 152 | |
| 153 | .macro ldst_pair_wb_64 op |
| 154 | .irp reg1 x2, x15, x16, x27, x30, xzr |
| 155 | ldst_pair_wb_1 \op, \reg1, x |
| 156 | .endr |
| 157 | .endm |
| 158 | |
| 159 | .macro ldst_pair_wb_32 op |
| 160 | .irp reg1 w1, w12, w16, w19, w30, wzr |
| 161 | ldst_pair_wb_1 \op, \reg1, w |
| 162 | .endr |
| 163 | .endm |
| 164 | |
| 165 | .macro ldst_single_wb_1 op, reg |
| 166 | .irp base x1, x4, x13, x26, sp |
| 167 | \op \reg, [\base], #16 |
| 168 | .endr |
| 169 | .endm |
| 170 | |
| 171 | .macro ldst_single_wb_32 op |
| 172 | .irp reg w0, w3, w12, w21, w28, w30, wzr |
| 173 | ldst_single_wb_1 \op, \reg |
| 174 | .endr |
| 175 | .endm |
| 176 | |
| 177 | .macro ldst_single_wb_64 op |
| 178 | .irp reg x2, x5, x17, x23, x24, x30, xzr |
| 179 | ldst_single_wb_1 \op, \reg |
| 180 | .endr |
| 181 | .endm |
| 182 | |
| 183 | ldst_pair_wb_32 stp |
| 184 | ldst_pair_wb_64 stp |
| 185 | |
| 186 | ldst_pair_wb_32 ldp |
| 187 | ldst_pair_wb_64 ldp |
| 188 | |
| 189 | ldst_pair_wb_64 ldpsw |
| 190 | |
| 191 | ldst_single_wb_32 str |
| 192 | ldst_single_wb_64 str |
| 193 | |
| 194 | ldst_single_wb_32 strb |
| 195 | |
| 196 | ldst_single_wb_32 strh |
| 197 | |
| 198 | ldst_single_wb_32 ldr |
| 199 | ldst_single_wb_64 ldr |
| 200 | |
| 201 | ldst_single_wb_32 ldrb |
| 202 | |
| 203 | ldst_single_wb_32 ldrh |
| 204 | |
| 205 | ldst_single_wb_32 ldrsb |
| 206 | ldst_single_wb_64 ldrsb |
| 207 | |
| 208 | ldst_single_wb_32 ldrsh |
| 209 | ldst_single_wb_64 ldrsh |
| 210 | |
| 211 | ldst_single_wb_64 ldrsw |
| 212 | |
| 213 | dup v0.2d, v1.2d[-1] |
| 214 | dup v0.2d, v1.2d[0] |
| 215 | dup v0.2d, v1.2d[1] |
| 216 | dup v0.2d, v1.2d[2] |
| 217 | dup v0.2d, v1.2d[64] |
| 218 | |
| 219 | dup v0.4s, v1.4s[-1] |
| 220 | dup v0.4s, v1.4s[0] |
| 221 | dup v0.4s, v1.4s[3] |
| 222 | dup v0.4s, v1.4s[4] |
| 223 | dup v0.4s, v1.4s[65] |
| 224 | |
| 225 | dup v0.8h, v1.8h[-1] |
| 226 | dup v0.8h, v1.8h[0] |
| 227 | dup v0.8h, v1.8h[7] |
| 228 | dup v0.8h, v1.8h[8] |
| 229 | dup v0.8h, v1.8h[66] |
| 230 | |
| 231 | dup v0.16b, v1.16b[-1] |
| 232 | dup v0.16b, v1.16b[0] |
| 233 | dup v0.16b, v1.16b[15] |
| 234 | dup v0.16b, v1.16b[16] |
| 235 | dup v0.16b, v1.16b[67] |
| 236 | |
| 237 | ld2 {v0.d, v1.d}[-1], [x0] |
| 238 | ld2 {v0.d, v1.d}[0], [x0] |
| 239 | ld2 {v0.d, v1.d}[1], [x0] |
| 240 | ld2 {v0.d, v1.d}[2], [x0] |
| 241 | ld2 {v0.d, v1.d}[64], [x0] |
| 242 | |
| 243 | ld2 {v0.s, v1.s}[-1], [x0] |
| 244 | ld2 {v0.s, v1.s}[0], [x0] |
| 245 | ld2 {v0.s, v1.s}[3], [x0] |
| 246 | ld2 {v0.s, v1.s}[4], [x0] |
| 247 | ld2 {v0.s, v1.s}[65], [x0] |
| 248 | |
| 249 | ld2 {v0.h, v1.h}[-1], [x0] |
| 250 | ld2 {v0.h, v1.h}[0], [x0] |
| 251 | ld2 {v0.h, v1.h}[7], [x0] |
| 252 | ld2 {v0.h, v1.h}[8], [x0] |
| 253 | ld2 {v0.h, v1.h}[66], [x0] |
| 254 | |
| 255 | ld2 {v0.b, v1.b}[-1], [x0] |
| 256 | ld2 {v0.b, v1.b}[0], [x0] |
| 257 | ld2 {v0.b, v1.b}[15], [x0] |
| 258 | ld2 {v0.b, v1.b}[16], [x0] |
| 259 | ld2 {v0.b, v1.b}[67], [x0] |
| 260 | |
| 261 | fmov d0, #2 |
| 262 | fmov d0, #-2 |
| 263 | fmov s0, 2 |
| 264 | fmov s0, -2 |
| 265 | |
| 266 | st2 {v0.4s, v1.4s}, [sp], xzr |
| 267 | str x1, [x2, sp] |
| 268 | |
| 269 | ldr x0, [x1, #:lo12:foo] // OK |
| 270 | ldnp x1, x2, [x3, #:lo12:foo] |
| 271 | ld1 {v0.4s}, [x3, #:lo12:foo] |
| 272 | stuminl x0, [x3, #:lo12:foo] |
| 273 | prfum pldl1keep, [x3, #:lo12:foo] |
| 274 | |
| 275 | ldr x0, [x3], x4 |
| 276 | ldnp x1, x2, [x3], x4 |
| 277 | ld1 {v0.4s}, [x3], x4 // OK |
| 278 | stuminl x0, [x3], x4 |
| 279 | prfum pldl1keep, [x3], x4 |