| 1 | /* shifted.s Test file for AArch64 add-substract (extended reg.) and |
| 2 | add-substract (shifted reg.) instructions. |
| 3 | |
| 4 | Copyright (C) 2011-2014 Free Software Foundation, Inc. |
| 5 | Contributed by ARM Ltd. |
| 6 | |
| 7 | This file is part of GAS. |
| 8 | |
| 9 | GAS is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3 of the license, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | GAS is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program; see the file COPYING3. If not, |
| 21 | see <http://www.gnu.org/licenses/>. */ |
| 22 | |
| 23 | .macro op3_64 op, shift |
| 24 | \op x1, x2, x3, \shift #0 |
| 25 | \op x1, x2, x3, \shift #1 |
| 26 | \op x1, x2, x3, \shift #3 |
| 27 | \op x1, x2, x3, \shift #7 |
| 28 | \op x1, x2, x3, \shift #15 |
| 29 | \op x1, x2, x3, \shift #31 |
| 30 | \op x1, x2, x3, \shift #63 |
| 31 | .endm |
| 32 | |
| 33 | .macro op3_32 op, shift |
| 34 | \op w1, w2, w3, \shift #0 |
| 35 | \op w1, w2, w3, \shift #1 |
| 36 | \op w1, w2, w3, \shift #3 |
| 37 | \op w1, w2, w3, \shift #7 |
| 38 | \op w1, w2, w3, \shift #15 |
| 39 | \op w1, w2, w3, \shift #31 |
| 40 | .endm |
| 41 | |
| 42 | .macro op3_64x op, shift |
| 43 | \op x1, x2, w3, \shift |
| 44 | \op x1, x2, w3, \shift #1 |
| 45 | \op x1, x2, w3, \shift #2 |
| 46 | \op x1, x2, w3, \shift #3 |
| 47 | \op x1, x2, w3, \shift #4 |
| 48 | .endm |
| 49 | |
| 50 | .macro op3_64x_more op, shift |
| 51 | \op x1, x2, x3, \shift |
| 52 | \op x1, x2, x3, \shift #1 |
| 53 | \op x1, x2, x3, \shift #2 |
| 54 | \op x1, x2, x3, \shift #3 |
| 55 | \op x1, x2, x3, \shift #4 |
| 56 | .endm |
| 57 | |
| 58 | .macro op3_32x op, shift |
| 59 | \op w1, w2, w3, \shift |
| 60 | \op w1, w2, w3, \shift #1 |
| 61 | \op w1, w2, w3, \shift #2 |
| 62 | \op w1, w2, w3, \shift #3 |
| 63 | \op w1, w2, w3, \shift #4 |
| 64 | .endm |
| 65 | |
| 66 | .macro op2_64 op, shift |
| 67 | \op x2, x3, \shift #0 |
| 68 | \op x2, x3, \shift #1 |
| 69 | \op x2, x3, \shift #3 |
| 70 | \op x2, x3, \shift #7 |
| 71 | \op x2, x3, \shift #15 |
| 72 | \op x2, x3, \shift #31 |
| 73 | \op x2, x3, \shift #63 |
| 74 | .endm |
| 75 | |
| 76 | .macro op2_32 op, shift |
| 77 | \op w2, w3, \shift #0 |
| 78 | \op w2, w3, \shift #1 |
| 79 | \op w2, w3, \shift #3 |
| 80 | \op w2, w3, \shift #7 |
| 81 | \op w2, w3, \shift #15 |
| 82 | \op w2, w3, \shift #31 |
| 83 | .endm |
| 84 | |
| 85 | .macro op2_64x op, shift |
| 86 | \op x2, w3, \shift |
| 87 | \op x2, w3, \shift #1 |
| 88 | \op x2, w3, \shift #2 |
| 89 | \op x2, w3, \shift #3 |
| 90 | \op x2, w3, \shift #4 |
| 91 | .endm |
| 92 | |
| 93 | .macro op2_32x op, shift |
| 94 | \op w2, w3, \shift |
| 95 | \op w2, w3, \shift #1 |
| 96 | \op w2, w3, \shift #2 |
| 97 | \op w2, w3, \shift #3 |
| 98 | \op w2, w3, \shift #4 |
| 99 | .endm |
| 100 | |
| 101 | .macro logical op |
| 102 | op3_64 \op, lsl |
| 103 | op3_64 \op, lsr |
| 104 | op3_64 \op, asr |
| 105 | op3_64 \op, ror |
| 106 | op3_32 \op, lsl |
| 107 | op3_32 \op, lsr |
| 108 | op3_32 \op, asr |
| 109 | op3_32 \op, ror |
| 110 | .endm |
| 111 | |
| 112 | .macro arith3 op |
| 113 | op3_64 \op, lsl |
| 114 | op3_64 \op, lsr |
| 115 | op3_64 \op, asr |
| 116 | op3_64x \op, uxtb |
| 117 | op3_64x \op, uxth |
| 118 | op3_64x \op, uxtw |
| 119 | op3_64x_more \op, uxtx |
| 120 | op3_64x \op, sxtb |
| 121 | op3_64x \op, sxth |
| 122 | op3_64x \op, sxtw |
| 123 | op3_64x_more \op, sxtx |
| 124 | op3_32 \op, lsl |
| 125 | op3_32 \op, lsr |
| 126 | op3_32 \op, asr |
| 127 | op3_32x \op, uxtb |
| 128 | op3_32x \op, uxth |
| 129 | op3_32x \op, sxtb |
| 130 | op3_32x \op, sxth |
| 131 | .endm |
| 132 | |
| 133 | .macro arith2 op, if_ext=1 |
| 134 | op2_64 \op, lsl |
| 135 | op2_64 \op, lsr |
| 136 | op2_64 \op, asr |
| 137 | .if \if_ext |
| 138 | op2_64x \op, uxtb |
| 139 | op2_64x \op, uxth |
| 140 | op2_64x \op, uxtw |
| 141 | op2_64x \op, sxtb |
| 142 | op2_64x \op, sxth |
| 143 | op2_64x \op, sxtw |
| 144 | .endif |
| 145 | op2_32 \op, lsl |
| 146 | op2_32 \op, lsr |
| 147 | op2_32 \op, asr |
| 148 | .if \if_ext |
| 149 | op2_32x \op, uxtb |
| 150 | op2_32x \op, uxth |
| 151 | op2_32x \op, sxtb |
| 152 | op2_32x \op, sxth |
| 153 | .endif |
| 154 | .endm |
| 155 | |
| 156 | func: |
| 157 | logical orr |
| 158 | logical and |
| 159 | logical eor |
| 160 | |
| 161 | logical bic |
| 162 | logical orn |
| 163 | logical eon |
| 164 | |
| 165 | arith3 add |
| 166 | arith3 sub |
| 167 | |
| 168 | arith2 neg, 0 |
| 169 | arith2 cmp |
| 170 | arith2 cmn |