| 1 | #as: -mevexrcig=rd |
| 2 | #objdump: -dw |
| 3 | #name: x86_64 AVX512DQ rcig insns |
| 4 | #source: x86-64-avx512dq-rcig.s |
| 5 | |
| 6 | .*: +file format .* |
| 7 | |
| 8 | |
| 9 | Disassembly of section \.text: |
| 10 | |
| 11 | 0+ <_start>: |
| 12 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 50 f4 ab[ ]*vrangepd \$0xab,\{sae\},%zmm28,%zmm29,%zmm30 |
| 13 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 50 f4 7b[ ]*vrangepd \$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 |
| 14 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 50 f4 ab[ ]*vrangeps \$0xab,\{sae\},%zmm28,%zmm29,%zmm30 |
| 15 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 50 f4 7b[ ]*vrangeps \$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 |
| 16 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 51 f4 ab[ ]*vrangesd \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 17 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 51 f4 7b[ ]*vrangesd \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 18 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 51 f4 ab[ ]*vrangess \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 19 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 51 f4 7b[ ]*vrangess \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 20 | [ ]*[a-f0-9]+:[ ]*62 03 fd 38 56 f5 ab[ ]*vreducepd \$0xab,\{sae\},%zmm29,%zmm30 |
| 21 | [ ]*[a-f0-9]+:[ ]*62 03 fd 38 56 f5 7b[ ]*vreducepd \$0x7b,\{sae\},%zmm29,%zmm30 |
| 22 | [ ]*[a-f0-9]+:[ ]*62 03 7d 38 56 f5 ab[ ]*vreduceps \$0xab,\{sae\},%zmm29,%zmm30 |
| 23 | [ ]*[a-f0-9]+:[ ]*62 03 7d 38 56 f5 7b[ ]*vreduceps \$0x7b,\{sae\},%zmm29,%zmm30 |
| 24 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 57 f4 ab[ ]*vreducesd \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 25 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 57 f4 7b[ ]*vreducesd \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 26 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 57 f4 ab[ ]*vreducess \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 27 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 57 f4 7b[ ]*vreducess \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 28 | [ ]*[a-f0-9]+:[ ]*62 01 fd 38 7a f5[ ]*vcvttpd2qq \{sae\},%zmm29,%zmm30 |
| 29 | [ ]*[a-f0-9]+:[ ]*62 01 fd 38 78 f5[ ]*vcvttpd2uqq \{sae\},%zmm29,%zmm30 |
| 30 | [ ]*[a-f0-9]+:[ ]*62 01 7d 38 7a f5[ ]*vcvttps2qq \{sae\},%ymm29,%zmm30 |
| 31 | [ ]*[a-f0-9]+:[ ]*62 01 7d 38 78 f5[ ]*vcvttps2uqq \{sae\},%ymm29,%zmm30 |
| 32 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 50 f4 ab[ ]*vrangepd \$0xab,\{sae\},%zmm28,%zmm29,%zmm30 |
| 33 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 50 f4 7b[ ]*vrangepd \$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 |
| 34 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 50 f4 ab[ ]*vrangeps \$0xab,\{sae\},%zmm28,%zmm29,%zmm30 |
| 35 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 50 f4 7b[ ]*vrangeps \$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 |
| 36 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 51 f4 ab[ ]*vrangesd \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 37 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 51 f4 7b[ ]*vrangesd \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 38 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 51 f4 ab[ ]*vrangess \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 39 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 51 f4 7b[ ]*vrangess \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 40 | [ ]*[a-f0-9]+:[ ]*62 03 fd 38 56 f5 ab[ ]*vreducepd \$0xab,\{sae\},%zmm29,%zmm30 |
| 41 | [ ]*[a-f0-9]+:[ ]*62 03 fd 38 56 f5 7b[ ]*vreducepd \$0x7b,\{sae\},%zmm29,%zmm30 |
| 42 | [ ]*[a-f0-9]+:[ ]*62 03 7d 38 56 f5 ab[ ]*vreduceps \$0xab,\{sae\},%zmm29,%zmm30 |
| 43 | [ ]*[a-f0-9]+:[ ]*62 03 7d 38 56 f5 7b[ ]*vreduceps \$0x7b,\{sae\},%zmm29,%zmm30 |
| 44 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 57 f4 ab[ ]*vreducesd \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 45 | [ ]*[a-f0-9]+:[ ]*62 03 95 30 57 f4 7b[ ]*vreducesd \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 46 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 57 f4 ab[ ]*vreducess \$0xab,\{sae\},%xmm28,%xmm29,%xmm30 |
| 47 | [ ]*[a-f0-9]+:[ ]*62 03 15 30 57 f4 7b[ ]*vreducess \$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 |
| 48 | [ ]*[a-f0-9]+:[ ]*62 01 fd 38 7a f5[ ]*vcvttpd2qq \{sae\},%zmm29,%zmm30 |
| 49 | [ ]*[a-f0-9]+:[ ]*62 01 fd 38 78 f5[ ]*vcvttpd2uqq \{sae\},%zmm29,%zmm30 |
| 50 | [ ]*[a-f0-9]+:[ ]*62 01 7d 38 7a f5[ ]*vcvttps2qq \{sae\},%ymm29,%zmm30 |
| 51 | [ ]*[a-f0-9]+:[ ]*62 01 7d 38 78 f5[ ]*vcvttps2uqq \{sae\},%ymm29,%zmm30 |
| 52 | #pass |