| 1 | #as: |
| 2 | #objdump: -dw -Mintel |
| 3 | #name: x86_64 AVX512VL/VPCLMULQDQ insns (Intel disassembly) |
| 4 | #source: x86-64-avx512vl_vpclmulqdq.s |
| 5 | |
| 6 | .*: +file format .* |
| 7 | |
| 8 | |
| 9 | Disassembly of section \.text: |
| 10 | |
| 11 | 0+ <_start>: |
| 12 | [ ]*[a-f0-9]+:[ ]*62 23 15 00 44 ca ab[ ]*vpclmulqdq xmm25,xmm29,xmm18,0xab |
| 13 | [ ]*[a-f0-9]+:[ ]*62 23 15 00 44 8c f0 23 01 00 00 7b[ ]*vpclmulqdq xmm25,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b |
| 14 | [ ]*[a-f0-9]+:[ ]*62 63 15 00 44 4a 7f 7b[ ]*vpclmulqdq xmm25,xmm29,XMMWORD PTR \[rdx\+0x7f0\],0x7b |
| 15 | [ ]*[a-f0-9]+:[ ]*62 23 6d 20 44 ea ab[ ]*vpclmulqdq ymm29,ymm18,ymm18,0xab |
| 16 | [ ]*[a-f0-9]+:[ ]*62 23 6d 20 44 ac f0 23 01 00 00 7b[ ]*vpclmulqdq ymm29,ymm18,YMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b |
| 17 | [ ]*[a-f0-9]+:[ ]*62 63 6d 20 44 6a 7f 7b[ ]*vpclmulqdq ymm29,ymm18,YMMWORD PTR \[rdx\+0xfe0\],0x7b |
| 18 | [ ]*[a-f0-9]+:[ ]*62 23 15 00 44 ca ab[ ]*vpclmulqdq xmm25,xmm29,xmm18,0xab |
| 19 | [ ]*[a-f0-9]+:[ ]*62 23 15 00 44 8c f0 23 01 00 00 7b[ ]*vpclmulqdq xmm25,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b |
| 20 | [ ]*[a-f0-9]+:[ ]*62 63 15 00 44 4a 7f 7b[ ]*vpclmulqdq xmm25,xmm29,XMMWORD PTR \[rdx\+0x7f0\],0x7b |
| 21 | [ ]*[a-f0-9]+:[ ]*62 23 6d 20 44 ea ab[ ]*vpclmulqdq ymm29,ymm18,ymm18,0xab |
| 22 | [ ]*[a-f0-9]+:[ ]*62 23 6d 20 44 ac f0 23 01 00 00 7b[ ]*vpclmulqdq ymm29,ymm18,YMMWORD PTR \[rax\+r14\*8\+0x123\],0x7b |
| 23 | [ ]*[a-f0-9]+:[ ]*62 63 6d 20 44 6a 7f 7b[ ]*vpclmulqdq ymm29,ymm18,YMMWORD PTR \[rdx\+0xfe0\],0x7b |
| 24 | [ ]*[a-f0-9]+:[ ]*62 a3 2d 00 44 dc ab[ ]*vpclmulqdq xmm19,xmm26,xmm20,0xab |
| 25 | [ ]*[a-f0-9]+:[ ]*62 a3 2d 00 44 9c f0 34 12 00 00 7b[ ]*vpclmulqdq xmm19,xmm26,XMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b |
| 26 | [ ]*[a-f0-9]+:[ ]*62 e3 2d 00 44 5a 7f 7b[ ]*vpclmulqdq xmm19,xmm26,XMMWORD PTR \[rdx\+0x7f0\],0x7b |
| 27 | [ ]*[a-f0-9]+:[ ]*62 83 15 20 44 fb ab[ ]*vpclmulqdq ymm23,ymm29,ymm27,0xab |
| 28 | [ ]*[a-f0-9]+:[ ]*62 a3 15 20 44 bc f0 34 12 00 00 7b[ ]*vpclmulqdq ymm23,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b |
| 29 | [ ]*[a-f0-9]+:[ ]*62 e3 15 20 44 7a 7f 7b[ ]*vpclmulqdq ymm23,ymm29,YMMWORD PTR \[rdx\+0xfe0\],0x7b |
| 30 | [ ]*[a-f0-9]+:[ ]*62 a3 2d 00 44 dc ab[ ]*vpclmulqdq xmm19,xmm26,xmm20,0xab |
| 31 | [ ]*[a-f0-9]+:[ ]*62 a3 2d 00 44 9c f0 34 12 00 00 7b[ ]*vpclmulqdq xmm19,xmm26,XMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b |
| 32 | [ ]*[a-f0-9]+:[ ]*62 e3 2d 00 44 5a 7f 7b[ ]*vpclmulqdq xmm19,xmm26,XMMWORD PTR \[rdx\+0x7f0\],0x7b |
| 33 | [ ]*[a-f0-9]+:[ ]*62 83 15 20 44 fb ab[ ]*vpclmulqdq ymm23,ymm29,ymm27,0xab |
| 34 | [ ]*[a-f0-9]+:[ ]*62 a3 15 20 44 bc f0 34 12 00 00 7b[ ]*vpclmulqdq ymm23,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\],0x7b |
| 35 | [ ]*[a-f0-9]+:[ ]*62 e3 15 20 44 7a 7f 7b[ ]*vpclmulqdq ymm23,ymm29,YMMWORD PTR \[rdx\+0xfe0\],0x7b |
| 36 | #pass |