| 1 | #PROG: nm |
| 2 | #as: -mips32r2 -32 |
| 3 | #name: MIPS16 intermix |
| 4 | |
| 5 | 0+[0-9a-f]+ t __call_stub_fp_m16_static16_d_d |
| 6 | 0+[0-9a-f]+ t __call_stub_fp_m16_static16_d_l |
| 7 | 0+[0-9a-f]+ t __call_stub_fp_m16_static1_d_d |
| 8 | 0+[0-9a-f]+ t __call_stub_fp_m16_static1_d_l |
| 9 | 0+[0-9a-f]+ t __call_stub_fp_m32_static16_d_d |
| 10 | 0+[0-9a-f]+ t __call_stub_fp_m32_static16_d_l |
| 11 | 0+[0-9a-f]+ t __call_stub_fp_m32_static1_d_d |
| 12 | 0+[0-9a-f]+ t __call_stub_fp_m32_static1_d_l |
| 13 | 0+[0-9a-f]+ t __call_stub_m16_static16_d |
| 14 | 0+[0-9a-f]+ t __call_stub_m16_static16_dl |
| 15 | 0+[0-9a-f]+ t __call_stub_m16_static16_dlld |
| 16 | 0+[0-9a-f]+ t __call_stub_m16_static1_d |
| 17 | 0+[0-9a-f]+ t __call_stub_m16_static1_dl |
| 18 | 0+[0-9a-f]+ t __call_stub_m16_static1_dlld |
| 19 | 0+[0-9a-f]+ t __call_stub_m32_static16_d |
| 20 | 0+[0-9a-f]+ t __call_stub_m32_static16_dl |
| 21 | 0+[0-9a-f]+ t __call_stub_m32_static16_dlld |
| 22 | 0+[0-9a-f]+ t __call_stub_m32_static1_d |
| 23 | 0+[0-9a-f]+ t __call_stub_m32_static1_dl |
| 24 | 0+[0-9a-f]+ t __call_stub_m32_static1_dlld |
| 25 | 0+[0-9a-f]+ t __fn_stub_m16_d |
| 26 | 0+[0-9a-f]+ t __fn_stub_m16_d_d |
| 27 | 0+[0-9a-f]+ t __fn_stub_m16_dl |
| 28 | 0+[0-9a-f]+ t __fn_stub_m16_dlld |
| 29 | 0+[0-9a-f]+ t __fn_stub_m16_static16_d |
| 30 | 0+[0-9a-f]+ t __fn_stub_m16_static16_d_d |
| 31 | 0+[0-9a-f]+ t __fn_stub_m16_static16_dl |
| 32 | 0+[0-9a-f]+ t __fn_stub_m16_static16_dlld |
| 33 | 0+[0-9a-f]+ t __fn_stub_m16_static1_d |
| 34 | 0+[0-9a-f]+ t __fn_stub_m16_static1_d_d |
| 35 | 0+[0-9a-f]+ t __fn_stub_m16_static1_dl |
| 36 | 0+[0-9a-f]+ t __fn_stub_m16_static1_dlld |
| 37 | 0+[0-9a-f]+ t __fn_stub_m16_static32_d |
| 38 | 0+[0-9a-f]+ t __fn_stub_m16_static32_d_d |
| 39 | 0+[0-9a-f]+ t __fn_stub_m16_static32_dl |
| 40 | 0+[0-9a-f]+ t __fn_stub_m16_static32_dlld |
| 41 | 0+[0-9a-f]+ t __fn_stub_m16_static_d |
| 42 | 0+[0-9a-f]+ t __fn_stub_m16_static_d_d |
| 43 | 0+[0-9a-f]+ t __fn_stub_m16_static_dl |
| 44 | 0+[0-9a-f]+ t __fn_stub_m16_static_dlld |
| 45 | [ ]+ U __mips16_adddf3 |
| 46 | [ ]+ U __mips16_fixdfsi |
| 47 | [ ]+ U __mips16_floatsidf |
| 48 | [ ]+ U __mips16_ret_df |
| 49 | 0+[0-9a-f]+ T f16 |
| 50 | 0+[0-9a-f]+ T f32 |
| 51 | 0+[0-9a-f]+ T m16_d |
| 52 | 0+[0-9a-f]+ T m16_d_d |
| 53 | 0+[0-9a-f]+ T m16_d_l |
| 54 | 0+[0-9a-f]+ T m16_dl |
| 55 | 0+[0-9a-f]+ T m16_dlld |
| 56 | 0+[0-9a-f]+ T m16_l |
| 57 | 0+[0-9a-f]+ T m16_ld |
| 58 | 0+[0-9a-f]+ t m16_static16_d |
| 59 | 0+[0-9a-f]+ t m16_static16_d_d |
| 60 | 0+[0-9a-f]+ t m16_static16_d_l |
| 61 | 0+[0-9a-f]+ t m16_static16_dl |
| 62 | 0+[0-9a-f]+ t m16_static16_dlld |
| 63 | 0+[0-9a-f]+ t m16_static16_l |
| 64 | 0+[0-9a-f]+ t m16_static16_ld |
| 65 | 0+[0-9a-f]+ t m16_static1_d |
| 66 | 0+[0-9a-f]+ t m16_static1_d_d |
| 67 | 0+[0-9a-f]+ t m16_static1_d_l |
| 68 | 0+[0-9a-f]+ t m16_static1_dl |
| 69 | 0+[0-9a-f]+ t m16_static1_dlld |
| 70 | 0+[0-9a-f]+ t m16_static1_l |
| 71 | 0+[0-9a-f]+ t m16_static1_ld |
| 72 | 0+[0-9a-f]+ t m16_static32_d |
| 73 | 0+[0-9a-f]+ t m16_static32_d_d |
| 74 | 0+[0-9a-f]+ t m16_static32_d_l |
| 75 | 0+[0-9a-f]+ t m16_static32_dl |
| 76 | 0+[0-9a-f]+ t m16_static32_dlld |
| 77 | 0+[0-9a-f]+ t m16_static32_l |
| 78 | 0+[0-9a-f]+ t m16_static32_ld |
| 79 | 0+[0-9a-f]+ t m16_static_d |
| 80 | 0+[0-9a-f]+ t m16_static_d_d |
| 81 | 0+[0-9a-f]+ t m16_static_d_l |
| 82 | 0+[0-9a-f]+ t m16_static_dl |
| 83 | 0+[0-9a-f]+ t m16_static_dlld |
| 84 | 0+[0-9a-f]+ t m16_static_l |
| 85 | 0+[0-9a-f]+ t m16_static_ld |
| 86 | 0+[0-9a-f]+ T m32_d |
| 87 | 0+[0-9a-f]+ T m32_d_d |
| 88 | 0+[0-9a-f]+ T m32_d_l |
| 89 | 0+[0-9a-f]+ T m32_dl |
| 90 | 0+[0-9a-f]+ T m32_dlld |
| 91 | 0+[0-9a-f]+ T m32_l |
| 92 | 0+[0-9a-f]+ T m32_ld |
| 93 | 0+[0-9a-f]+ t m32_static16_d |
| 94 | 0+[0-9a-f]+ t m32_static16_d_d |
| 95 | 0+[0-9a-f]+ t m32_static16_d_l |
| 96 | 0+[0-9a-f]+ t m32_static16_dl |
| 97 | 0+[0-9a-f]+ t m32_static16_dlld |
| 98 | 0+[0-9a-f]+ t m32_static16_l |
| 99 | 0+[0-9a-f]+ t m32_static16_ld |
| 100 | 0+[0-9a-f]+ t m32_static1_d |
| 101 | 0+[0-9a-f]+ t m32_static1_d_d |
| 102 | 0+[0-9a-f]+ t m32_static1_d_l |
| 103 | 0+[0-9a-f]+ t m32_static1_dl |
| 104 | 0+[0-9a-f]+ t m32_static1_dlld |
| 105 | 0+[0-9a-f]+ t m32_static1_l |
| 106 | 0+[0-9a-f]+ t m32_static1_ld |
| 107 | 0+[0-9a-f]+ t m32_static32_d |
| 108 | 0+[0-9a-f]+ t m32_static32_d_d |
| 109 | 0+[0-9a-f]+ t m32_static32_d_l |
| 110 | 0+[0-9a-f]+ t m32_static32_dl |
| 111 | 0+[0-9a-f]+ t m32_static32_dlld |
| 112 | 0+[0-9a-f]+ t m32_static32_l |
| 113 | 0+[0-9a-f]+ t m32_static32_ld |
| 114 | 0+[0-9a-f]+ t m32_static_d |
| 115 | 0+[0-9a-f]+ t m32_static_d_d |
| 116 | 0+[0-9a-f]+ t m32_static_d_l |
| 117 | 0+[0-9a-f]+ t m32_static_dl |
| 118 | 0+[0-9a-f]+ t m32_static_dlld |
| 119 | 0+[0-9a-f]+ t m32_static_l |
| 120 | 0+[0-9a-f]+ t m32_static_ld |
| 121 | #pass |