| 1 | #objdump: -dr --prefix-addresses -mmips:4000 |
| 2 | #as: -march=r4000 -mtune=r4000 |
| 3 | #name: MIPS R4000 drol |
| 4 | |
| 5 | # Test the drol and dror macros. |
| 6 | |
| 7 | .*: +file format .*mips.* |
| 8 | |
| 9 | Disassembly of section .text: |
| 10 | 0+0000 <[^>]*> dnegu at,a1 |
| 11 | 0+0004 <[^>]*> dsrlv at,a0,at |
| 12 | 0+0008 <[^>]*> dsllv a0,a0,a1 |
| 13 | 0+000c <[^>]*> or a0,a0,at |
| 14 | 0+0010 <[^>]*> dnegu at,a2 |
| 15 | 0+0014 <[^>]*> dsrlv at,a1,at |
| 16 | 0+0018 <[^>]*> dsllv a0,a1,a2 |
| 17 | 0+001c <[^>]*> or a0,a0,at |
| 18 | 0+0020 <[^>]*> dsll at,a0,0x1 |
| 19 | 0+0024 <[^>]*> dsrl32 a0,a0,0x1f |
| 20 | 0+0028 <[^>]*> or a0,a0,at |
| 21 | 0+002c <[^>]*> dsrl a0,a1,0x0 |
| 22 | 0+0030 <[^>]*> dsll at,a1,0x1 |
| 23 | 0+0034 <[^>]*> dsrl32 a0,a1,0x1f |
| 24 | 0+0038 <[^>]*> or a0,a0,at |
| 25 | 0+003c <[^>]*> dsll at,a1,0x1f |
| 26 | 0+0040 <[^>]*> dsrl32 a0,a1,0x1 |
| 27 | 0+0044 <[^>]*> or a0,a0,at |
| 28 | 0+0048 <[^>]*> dsll32 at,a1,0x0 |
| 29 | 0+004c <[^>]*> dsrl32 a0,a1,0x0 |
| 30 | 0+0050 <[^>]*> or a0,a0,at |
| 31 | 0+0054 <[^>]*> dsll32 at,a1,0x1 |
| 32 | 0+0058 <[^>]*> dsrl a0,a1,0x1f |
| 33 | 0+005c <[^>]*> or a0,a0,at |
| 34 | 0+0060 <[^>]*> dsll32 at,a1,0x1f |
| 35 | 0+0064 <[^>]*> dsrl a0,a1,0x1 |
| 36 | 0+0068 <[^>]*> or a0,a0,at |
| 37 | 0+006c <[^>]*> dsrl a0,a1,0x0 |
| 38 | 0+0070 <[^>]*> dnegu at,a1 |
| 39 | 0+0074 <[^>]*> dsllv at,a0,at |
| 40 | 0+0078 <[^>]*> dsrlv a0,a0,a1 |
| 41 | 0+007c <[^>]*> or a0,a0,at |
| 42 | 0+0080 <[^>]*> dnegu at,a2 |
| 43 | 0+0084 <[^>]*> dsllv at,a1,at |
| 44 | 0+0088 <[^>]*> dsrlv a0,a1,a2 |
| 45 | 0+008c <[^>]*> or a0,a0,at |
| 46 | 0+0090 <[^>]*> dsrl at,a0,0x1 |
| 47 | 0+0094 <[^>]*> dsll32 a0,a0,0x1f |
| 48 | 0+0098 <[^>]*> or a0,a0,at |
| 49 | 0+009c <[^>]*> dsrl a0,a1,0x0 |
| 50 | 0+00a0 <[^>]*> dsrl at,a1,0x1 |
| 51 | 0+00a4 <[^>]*> dsll32 a0,a1,0x1f |
| 52 | 0+00a8 <[^>]*> or a0,a0,at |
| 53 | 0+00ac <[^>]*> dsrl at,a1,0x1f |
| 54 | 0+00b0 <[^>]*> dsll32 a0,a1,0x1 |
| 55 | 0+00b4 <[^>]*> or a0,a0,at |
| 56 | 0+00b8 <[^>]*> dsrl32 at,a1,0x0 |
| 57 | 0+00bc <[^>]*> dsll32 a0,a1,0x0 |
| 58 | 0+00c0 <[^>]*> or a0,a0,at |
| 59 | 0+00c4 <[^>]*> dsrl32 at,a1,0x1 |
| 60 | 0+00c8 <[^>]*> dsll a0,a1,0x1f |
| 61 | 0+00cc <[^>]*> or a0,a0,at |
| 62 | 0+00d0 <[^>]*> dsrl32 at,a1,0x1f |
| 63 | 0+00d4 <[^>]*> dsll a0,a1,0x1 |
| 64 | 0+00d8 <[^>]*> or a0,a0,at |
| 65 | 0+00dc <[^>]*> dsrl a0,a1,0x0 |
| 66 | ... |