| 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
| 2 | |
| 3 | Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
| 4 | 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011 |
| 5 | Free Software Foundation, Inc. |
| 6 | |
| 7 | This file is part of GDB. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 21 | |
| 22 | #include "defs.h" |
| 23 | #include "doublest.h" |
| 24 | #include "frame.h" |
| 25 | #include "frame-unwind.h" |
| 26 | #include "frame-base.h" |
| 27 | #include "dwarf2-frame.h" |
| 28 | #include "inferior.h" |
| 29 | #include "symtab.h" |
| 30 | #include "value.h" |
| 31 | #include "gdbcmd.h" |
| 32 | #include "gdbcore.h" |
| 33 | #include "dis-asm.h" |
| 34 | #include "symfile.h" |
| 35 | #include "objfiles.h" |
| 36 | #include "gdb_string.h" |
| 37 | #include "linespec.h" |
| 38 | #include "regcache.h" |
| 39 | #include "reggroups.h" |
| 40 | #include "arch-utils.h" |
| 41 | #include "osabi.h" |
| 42 | #include "block.h" |
| 43 | #include "infcall.h" |
| 44 | #include "trad-frame.h" |
| 45 | |
| 46 | #include "elf-bfd.h" |
| 47 | |
| 48 | #include "alpha-tdep.h" |
| 49 | |
| 50 | /* Instruction decoding. The notations for registers, immediates and |
| 51 | opcodes are the same as the one used in Compaq's Alpha architecture |
| 52 | handbook. */ |
| 53 | |
| 54 | #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26) |
| 55 | |
| 56 | /* Memory instruction format */ |
| 57 | #define MEM_RA(insn) ((insn & 0x03e00000) >> 21) |
| 58 | #define MEM_RB(insn) ((insn & 0x001f0000) >> 16) |
| 59 | #define MEM_DISP(insn) \ |
| 60 | (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff)) |
| 61 | |
| 62 | static const int lda_opcode = 0x08; |
| 63 | static const int stq_opcode = 0x2d; |
| 64 | |
| 65 | /* Branch instruction format */ |
| 66 | #define BR_RA(insn) MEM_RA(insn) |
| 67 | |
| 68 | static const int bne_opcode = 0x3d; |
| 69 | |
| 70 | /* Operate instruction format */ |
| 71 | #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5) |
| 72 | #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000) |
| 73 | #define OPR_RA(insn) MEM_RA(insn) |
| 74 | #define OPR_RC(insn) ((insn & 0x1f)) |
| 75 | #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13) |
| 76 | |
| 77 | static const int subq_opcode = 0x10; |
| 78 | static const int subq_function = 0x29; |
| 79 | |
| 80 | \f |
| 81 | /* Return the name of the REGNO register. |
| 82 | |
| 83 | An empty name corresponds to a register number that used to |
| 84 | be used for a virtual register. That virtual register has |
| 85 | been removed, but the index is still reserved to maintain |
| 86 | compatibility with existing remote alpha targets. */ |
| 87 | |
| 88 | static const char * |
| 89 | alpha_register_name (struct gdbarch *gdbarch, int regno) |
| 90 | { |
| 91 | static const char * const register_names[] = |
| 92 | { |
| 93 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", |
| 94 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", |
| 95 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", |
| 96 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", |
| 97 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", |
| 98 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", |
| 99 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", |
| 100 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", |
| 101 | "pc", "", "unique" |
| 102 | }; |
| 103 | |
| 104 | if (regno < 0) |
| 105 | return NULL; |
| 106 | if (regno >= ARRAY_SIZE(register_names)) |
| 107 | return NULL; |
| 108 | return register_names[regno]; |
| 109 | } |
| 110 | |
| 111 | static int |
| 112 | alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno) |
| 113 | { |
| 114 | return (regno == ALPHA_ZERO_REGNUM |
| 115 | || strlen (alpha_register_name (gdbarch, regno)) == 0); |
| 116 | } |
| 117 | |
| 118 | static int |
| 119 | alpha_cannot_store_register (struct gdbarch *gdbarch, int regno) |
| 120 | { |
| 121 | return (regno == ALPHA_ZERO_REGNUM |
| 122 | || strlen (alpha_register_name (gdbarch, regno)) == 0); |
| 123 | } |
| 124 | |
| 125 | static struct type * |
| 126 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
| 127 | { |
| 128 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
| 129 | return builtin_type (gdbarch)->builtin_data_ptr; |
| 130 | if (regno == ALPHA_PC_REGNUM) |
| 131 | return builtin_type (gdbarch)->builtin_func_ptr; |
| 132 | |
| 133 | /* Don't need to worry about little vs big endian until |
| 134 | some jerk tries to port to alpha-unicosmk. */ |
| 135 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
| 136 | return builtin_type (gdbarch)->builtin_double; |
| 137 | |
| 138 | return builtin_type (gdbarch)->builtin_int64; |
| 139 | } |
| 140 | |
| 141 | /* Is REGNUM a member of REGGROUP? */ |
| 142 | |
| 143 | static int |
| 144 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
| 145 | struct reggroup *group) |
| 146 | { |
| 147 | /* Filter out any registers eliminated, but whose regnum is |
| 148 | reserved for backward compatibility, e.g. the vfp. */ |
| 149 | if (gdbarch_register_name (gdbarch, regnum) == NULL |
| 150 | || *gdbarch_register_name (gdbarch, regnum) == '\0') |
| 151 | return 0; |
| 152 | |
| 153 | if (group == all_reggroup) |
| 154 | return 1; |
| 155 | |
| 156 | /* Zero should not be saved or restored. Technically it is a general |
| 157 | register (just as $f31 would be a float if we represented it), but |
| 158 | there's no point displaying it during "info regs", so leave it out |
| 159 | of all groups except for "all". */ |
| 160 | if (regnum == ALPHA_ZERO_REGNUM) |
| 161 | return 0; |
| 162 | |
| 163 | /* All other registers are saved and restored. */ |
| 164 | if (group == save_reggroup || group == restore_reggroup) |
| 165 | return 1; |
| 166 | |
| 167 | /* All other groups are non-overlapping. */ |
| 168 | |
| 169 | /* Since this is really a PALcode memory slot... */ |
| 170 | if (regnum == ALPHA_UNIQUE_REGNUM) |
| 171 | return group == system_reggroup; |
| 172 | |
| 173 | /* Force the FPCR to be considered part of the floating point state. */ |
| 174 | if (regnum == ALPHA_FPCR_REGNUM) |
| 175 | return group == float_reggroup; |
| 176 | |
| 177 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) |
| 178 | return group == float_reggroup; |
| 179 | else |
| 180 | return group == general_reggroup; |
| 181 | } |
| 182 | |
| 183 | /* The following represents exactly the conversion performed by |
| 184 | the LDS instruction. This applies to both single-precision |
| 185 | floating point and 32-bit integers. */ |
| 186 | |
| 187 | static void |
| 188 | alpha_lds (struct gdbarch *gdbarch, void *out, const void *in) |
| 189 | { |
| 190 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 191 | ULONGEST mem = extract_unsigned_integer (in, 4, byte_order); |
| 192 | ULONGEST frac = (mem >> 0) & 0x7fffff; |
| 193 | ULONGEST sign = (mem >> 31) & 1; |
| 194 | ULONGEST exp_msb = (mem >> 30) & 1; |
| 195 | ULONGEST exp_low = (mem >> 23) & 0x7f; |
| 196 | ULONGEST exp, reg; |
| 197 | |
| 198 | exp = (exp_msb << 10) | exp_low; |
| 199 | if (exp_msb) |
| 200 | { |
| 201 | if (exp_low == 0x7f) |
| 202 | exp = 0x7ff; |
| 203 | } |
| 204 | else |
| 205 | { |
| 206 | if (exp_low != 0x00) |
| 207 | exp |= 0x380; |
| 208 | } |
| 209 | |
| 210 | reg = (sign << 63) | (exp << 52) | (frac << 29); |
| 211 | store_unsigned_integer (out, 8, byte_order, reg); |
| 212 | } |
| 213 | |
| 214 | /* Similarly, this represents exactly the conversion performed by |
| 215 | the STS instruction. */ |
| 216 | |
| 217 | static void |
| 218 | alpha_sts (struct gdbarch *gdbarch, void *out, const void *in) |
| 219 | { |
| 220 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 221 | ULONGEST reg, mem; |
| 222 | |
| 223 | reg = extract_unsigned_integer (in, 8, byte_order); |
| 224 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); |
| 225 | store_unsigned_integer (out, 4, byte_order, mem); |
| 226 | } |
| 227 | |
| 228 | /* The alpha needs a conversion between register and memory format if the |
| 229 | register is a floating point register and memory format is float, as the |
| 230 | register format must be double or memory format is an integer with 4 |
| 231 | bytes or less, as the representation of integers in floating point |
| 232 | registers is different. */ |
| 233 | |
| 234 | static int |
| 235 | alpha_convert_register_p (struct gdbarch *gdbarch, int regno, |
| 236 | struct type *type) |
| 237 | { |
| 238 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31 |
| 239 | && TYPE_LENGTH (type) != 8); |
| 240 | } |
| 241 | |
| 242 | static void |
| 243 | alpha_register_to_value (struct frame_info *frame, int regnum, |
| 244 | struct type *valtype, gdb_byte *out) |
| 245 | { |
| 246 | gdb_byte in[MAX_REGISTER_SIZE]; |
| 247 | |
| 248 | frame_register_read (frame, regnum, in); |
| 249 | switch (TYPE_LENGTH (valtype)) |
| 250 | { |
| 251 | case 4: |
| 252 | alpha_sts (get_frame_arch (frame), out, in); |
| 253 | break; |
| 254 | default: |
| 255 | error (_("Cannot retrieve value from floating point register")); |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | static void |
| 260 | alpha_value_to_register (struct frame_info *frame, int regnum, |
| 261 | struct type *valtype, const gdb_byte *in) |
| 262 | { |
| 263 | gdb_byte out[MAX_REGISTER_SIZE]; |
| 264 | |
| 265 | switch (TYPE_LENGTH (valtype)) |
| 266 | { |
| 267 | case 4: |
| 268 | alpha_lds (get_frame_arch (frame), out, in); |
| 269 | break; |
| 270 | default: |
| 271 | error (_("Cannot store value in floating point register")); |
| 272 | } |
| 273 | put_frame_register (frame, regnum, out); |
| 274 | } |
| 275 | |
| 276 | \f |
| 277 | /* The alpha passes the first six arguments in the registers, the rest on |
| 278 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
| 279 | then moved into the register file; this simplifies the passing of a |
| 280 | large struct which extends from the registers to the stack, plus avoids |
| 281 | three ptrace invocations per word. |
| 282 | |
| 283 | We don't bother tracking which register values should go in integer |
| 284 | regs or fp regs; we load the same values into both. |
| 285 | |
| 286 | If the called function is returning a structure, the address of the |
| 287 | structure to be returned is passed as a hidden first argument. */ |
| 288 | |
| 289 | static CORE_ADDR |
| 290 | alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
| 291 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 292 | int nargs, struct value **args, CORE_ADDR sp, |
| 293 | int struct_return, CORE_ADDR struct_addr) |
| 294 | { |
| 295 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 296 | int i; |
| 297 | int accumulate_size = struct_return ? 8 : 0; |
| 298 | struct alpha_arg |
| 299 | { |
| 300 | const gdb_byte *contents; |
| 301 | int len; |
| 302 | int offset; |
| 303 | }; |
| 304 | struct alpha_arg *alpha_args |
| 305 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); |
| 306 | struct alpha_arg *m_arg; |
| 307 | gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
| 308 | int required_arg_regs; |
| 309 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
| 310 | |
| 311 | /* The ABI places the address of the called function in T12. */ |
| 312 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); |
| 313 | |
| 314 | /* Set the return address register to point to the entry point |
| 315 | of the program, where a breakpoint lies in wait. */ |
| 316 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); |
| 317 | |
| 318 | /* Lay out the arguments in memory. */ |
| 319 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
| 320 | { |
| 321 | struct value *arg = args[i]; |
| 322 | struct type *arg_type = check_typedef (value_type (arg)); |
| 323 | |
| 324 | /* Cast argument to long if necessary as the compiler does it too. */ |
| 325 | switch (TYPE_CODE (arg_type)) |
| 326 | { |
| 327 | case TYPE_CODE_INT: |
| 328 | case TYPE_CODE_BOOL: |
| 329 | case TYPE_CODE_CHAR: |
| 330 | case TYPE_CODE_RANGE: |
| 331 | case TYPE_CODE_ENUM: |
| 332 | if (TYPE_LENGTH (arg_type) == 4) |
| 333 | { |
| 334 | /* 32-bit values must be sign-extended to 64 bits |
| 335 | even if the base data type is unsigned. */ |
| 336 | arg_type = builtin_type (gdbarch)->builtin_int32; |
| 337 | arg = value_cast (arg_type, arg); |
| 338 | } |
| 339 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) |
| 340 | { |
| 341 | arg_type = builtin_type (gdbarch)->builtin_int64; |
| 342 | arg = value_cast (arg_type, arg); |
| 343 | } |
| 344 | break; |
| 345 | |
| 346 | case TYPE_CODE_FLT: |
| 347 | /* "float" arguments loaded in registers must be passed in |
| 348 | register format, aka "double". */ |
| 349 | if (accumulate_size < sizeof (arg_reg_buffer) |
| 350 | && TYPE_LENGTH (arg_type) == 4) |
| 351 | { |
| 352 | arg_type = builtin_type (gdbarch)->builtin_double; |
| 353 | arg = value_cast (arg_type, arg); |
| 354 | } |
| 355 | /* Tru64 5.1 has a 128-bit long double, and passes this by |
| 356 | invisible reference. No one else uses this data type. */ |
| 357 | else if (TYPE_LENGTH (arg_type) == 16) |
| 358 | { |
| 359 | /* Allocate aligned storage. */ |
| 360 | sp = (sp & -16) - 16; |
| 361 | |
| 362 | /* Write the real data into the stack. */ |
| 363 | write_memory (sp, value_contents (arg), 16); |
| 364 | |
| 365 | /* Construct the indirection. */ |
| 366 | arg_type = lookup_pointer_type (arg_type); |
| 367 | arg = value_from_pointer (arg_type, sp); |
| 368 | } |
| 369 | break; |
| 370 | |
| 371 | case TYPE_CODE_COMPLEX: |
| 372 | /* ??? The ABI says that complex values are passed as two |
| 373 | separate scalar values. This distinction only matters |
| 374 | for complex float. However, GCC does not implement this. */ |
| 375 | |
| 376 | /* Tru64 5.1 has a 128-bit long double, and passes this by |
| 377 | invisible reference. */ |
| 378 | if (TYPE_LENGTH (arg_type) == 32) |
| 379 | { |
| 380 | /* Allocate aligned storage. */ |
| 381 | sp = (sp & -16) - 16; |
| 382 | |
| 383 | /* Write the real data into the stack. */ |
| 384 | write_memory (sp, value_contents (arg), 32); |
| 385 | |
| 386 | /* Construct the indirection. */ |
| 387 | arg_type = lookup_pointer_type (arg_type); |
| 388 | arg = value_from_pointer (arg_type, sp); |
| 389 | } |
| 390 | break; |
| 391 | |
| 392 | default: |
| 393 | break; |
| 394 | } |
| 395 | m_arg->len = TYPE_LENGTH (arg_type); |
| 396 | m_arg->offset = accumulate_size; |
| 397 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; |
| 398 | m_arg->contents = value_contents (arg); |
| 399 | } |
| 400 | |
| 401 | /* Determine required argument register loads, loading an argument register |
| 402 | is expensive as it uses three ptrace calls. */ |
| 403 | required_arg_regs = accumulate_size / 8; |
| 404 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) |
| 405 | required_arg_regs = ALPHA_NUM_ARG_REGS; |
| 406 | |
| 407 | /* Make room for the arguments on the stack. */ |
| 408 | if (accumulate_size < sizeof(arg_reg_buffer)) |
| 409 | accumulate_size = 0; |
| 410 | else |
| 411 | accumulate_size -= sizeof(arg_reg_buffer); |
| 412 | sp -= accumulate_size; |
| 413 | |
| 414 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
| 415 | sp &= ~15; |
| 416 | |
| 417 | /* `Push' arguments on the stack. */ |
| 418 | for (i = nargs; m_arg--, --i >= 0;) |
| 419 | { |
| 420 | const gdb_byte *contents = m_arg->contents; |
| 421 | int offset = m_arg->offset; |
| 422 | int len = m_arg->len; |
| 423 | |
| 424 | /* Copy the bytes destined for registers into arg_reg_buffer. */ |
| 425 | if (offset < sizeof(arg_reg_buffer)) |
| 426 | { |
| 427 | if (offset + len <= sizeof(arg_reg_buffer)) |
| 428 | { |
| 429 | memcpy (arg_reg_buffer + offset, contents, len); |
| 430 | continue; |
| 431 | } |
| 432 | else |
| 433 | { |
| 434 | int tlen = sizeof(arg_reg_buffer) - offset; |
| 435 | memcpy (arg_reg_buffer + offset, contents, tlen); |
| 436 | offset += tlen; |
| 437 | contents += tlen; |
| 438 | len -= tlen; |
| 439 | } |
| 440 | } |
| 441 | |
| 442 | /* Everything else goes to the stack. */ |
| 443 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); |
| 444 | } |
| 445 | if (struct_return) |
| 446 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, |
| 447 | byte_order, struct_addr); |
| 448 | |
| 449 | /* Load the argument registers. */ |
| 450 | for (i = 0; i < required_arg_regs; i++) |
| 451 | { |
| 452 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
| 453 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); |
| 454 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, |
| 455 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); |
| 456 | } |
| 457 | |
| 458 | /* Finally, update the stack pointer. */ |
| 459 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); |
| 460 | |
| 461 | return sp; |
| 462 | } |
| 463 | |
| 464 | /* Extract from REGCACHE the value about to be returned from a function |
| 465 | and copy it into VALBUF. */ |
| 466 | |
| 467 | static void |
| 468 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
| 469 | gdb_byte *valbuf) |
| 470 | { |
| 471 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
| 472 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 473 | int length = TYPE_LENGTH (valtype); |
| 474 | gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; |
| 475 | ULONGEST l; |
| 476 | |
| 477 | switch (TYPE_CODE (valtype)) |
| 478 | { |
| 479 | case TYPE_CODE_FLT: |
| 480 | switch (length) |
| 481 | { |
| 482 | case 4: |
| 483 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
| 484 | alpha_sts (gdbarch, valbuf, raw_buffer); |
| 485 | break; |
| 486 | |
| 487 | case 8: |
| 488 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); |
| 489 | break; |
| 490 | |
| 491 | case 16: |
| 492 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); |
| 493 | read_memory (l, valbuf, 16); |
| 494 | break; |
| 495 | |
| 496 | default: |
| 497 | internal_error (__FILE__, __LINE__, |
| 498 | _("unknown floating point width")); |
| 499 | } |
| 500 | break; |
| 501 | |
| 502 | case TYPE_CODE_COMPLEX: |
| 503 | switch (length) |
| 504 | { |
| 505 | case 8: |
| 506 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ |
| 507 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); |
| 508 | break; |
| 509 | |
| 510 | case 16: |
| 511 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); |
| 512 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); |
| 513 | break; |
| 514 | |
| 515 | case 32: |
| 516 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); |
| 517 | read_memory (l, valbuf, 32); |
| 518 | break; |
| 519 | |
| 520 | default: |
| 521 | internal_error (__FILE__, __LINE__, |
| 522 | _("unknown floating point width")); |
| 523 | } |
| 524 | break; |
| 525 | |
| 526 | default: |
| 527 | /* Assume everything else degenerates to an integer. */ |
| 528 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); |
| 529 | store_unsigned_integer (valbuf, length, byte_order, l); |
| 530 | break; |
| 531 | } |
| 532 | } |
| 533 | |
| 534 | /* Insert the given value into REGCACHE as if it was being |
| 535 | returned by a function. */ |
| 536 | |
| 537 | static void |
| 538 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
| 539 | const gdb_byte *valbuf) |
| 540 | { |
| 541 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
| 542 | int length = TYPE_LENGTH (valtype); |
| 543 | gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; |
| 544 | ULONGEST l; |
| 545 | |
| 546 | switch (TYPE_CODE (valtype)) |
| 547 | { |
| 548 | case TYPE_CODE_FLT: |
| 549 | switch (length) |
| 550 | { |
| 551 | case 4: |
| 552 | alpha_lds (gdbarch, raw_buffer, valbuf); |
| 553 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
| 554 | break; |
| 555 | |
| 556 | case 8: |
| 557 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); |
| 558 | break; |
| 559 | |
| 560 | case 16: |
| 561 | /* FIXME: 128-bit long doubles are returned like structures: |
| 562 | by writing into indirect storage provided by the caller |
| 563 | as the first argument. */ |
| 564 | error (_("Cannot set a 128-bit long double return value.")); |
| 565 | |
| 566 | default: |
| 567 | internal_error (__FILE__, __LINE__, |
| 568 | _("unknown floating point width")); |
| 569 | } |
| 570 | break; |
| 571 | |
| 572 | case TYPE_CODE_COMPLEX: |
| 573 | switch (length) |
| 574 | { |
| 575 | case 8: |
| 576 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ |
| 577 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); |
| 578 | break; |
| 579 | |
| 580 | case 16: |
| 581 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); |
| 582 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); |
| 583 | break; |
| 584 | |
| 585 | case 32: |
| 586 | /* FIXME: 128-bit long doubles are returned like structures: |
| 587 | by writing into indirect storage provided by the caller |
| 588 | as the first argument. */ |
| 589 | error (_("Cannot set a 128-bit long double return value.")); |
| 590 | |
| 591 | default: |
| 592 | internal_error (__FILE__, __LINE__, |
| 593 | _("unknown floating point width")); |
| 594 | } |
| 595 | break; |
| 596 | |
| 597 | default: |
| 598 | /* Assume everything else degenerates to an integer. */ |
| 599 | /* 32-bit values must be sign-extended to 64 bits |
| 600 | even if the base data type is unsigned. */ |
| 601 | if (length == 4) |
| 602 | valtype = builtin_type (gdbarch)->builtin_int32; |
| 603 | l = unpack_long (valtype, valbuf); |
| 604 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); |
| 605 | break; |
| 606 | } |
| 607 | } |
| 608 | |
| 609 | static enum return_value_convention |
| 610 | alpha_return_value (struct gdbarch *gdbarch, struct type *func_type, |
| 611 | struct type *type, struct regcache *regcache, |
| 612 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 613 | { |
| 614 | enum type_code code = TYPE_CODE (type); |
| 615 | |
| 616 | if ((code == TYPE_CODE_STRUCT |
| 617 | || code == TYPE_CODE_UNION |
| 618 | || code == TYPE_CODE_ARRAY) |
| 619 | && gdbarch_tdep (gdbarch)->return_in_memory (type)) |
| 620 | { |
| 621 | if (readbuf) |
| 622 | { |
| 623 | ULONGEST addr; |
| 624 | regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); |
| 625 | read_memory (addr, readbuf, TYPE_LENGTH (type)); |
| 626 | } |
| 627 | |
| 628 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; |
| 629 | } |
| 630 | |
| 631 | if (readbuf) |
| 632 | alpha_extract_return_value (type, regcache, readbuf); |
| 633 | if (writebuf) |
| 634 | alpha_store_return_value (type, regcache, writebuf); |
| 635 | |
| 636 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 637 | } |
| 638 | |
| 639 | static int |
| 640 | alpha_return_in_memory_always (struct type *type) |
| 641 | { |
| 642 | return 1; |
| 643 | } |
| 644 | \f |
| 645 | static const gdb_byte * |
| 646 | alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) |
| 647 | { |
| 648 | static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */ |
| 649 | |
| 650 | *len = sizeof(break_insn); |
| 651 | return break_insn; |
| 652 | } |
| 653 | |
| 654 | \f |
| 655 | /* This returns the PC of the first insn after the prologue. |
| 656 | If we can't find the prologue, then return 0. */ |
| 657 | |
| 658 | CORE_ADDR |
| 659 | alpha_after_prologue (CORE_ADDR pc) |
| 660 | { |
| 661 | struct symtab_and_line sal; |
| 662 | CORE_ADDR func_addr, func_end; |
| 663 | |
| 664 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 665 | return 0; |
| 666 | |
| 667 | sal = find_pc_line (func_addr, 0); |
| 668 | if (sal.end < func_end) |
| 669 | return sal.end; |
| 670 | |
| 671 | /* The line after the prologue is after the end of the function. In this |
| 672 | case, tell the caller to find the prologue the hard way. */ |
| 673 | return 0; |
| 674 | } |
| 675 | |
| 676 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
| 677 | |
| 678 | unsigned int |
| 679 | alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 680 | { |
| 681 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 682 | gdb_byte buf[ALPHA_INSN_SIZE]; |
| 683 | int status; |
| 684 | |
| 685 | status = target_read_memory (pc, buf, sizeof (buf)); |
| 686 | if (status) |
| 687 | memory_error (status, pc); |
| 688 | return extract_unsigned_integer (buf, sizeof (buf), byte_order); |
| 689 | } |
| 690 | |
| 691 | /* To skip prologues, I use this predicate. Returns either PC itself |
| 692 | if the code at PC does not look like a function prologue; otherwise |
| 693 | returns an address that (if we're lucky) follows the prologue. If |
| 694 | LENIENT, then we must skip everything which is involved in setting |
| 695 | up the frame (it's OK to skip more, just so long as we don't skip |
| 696 | anything which might clobber the registers which are being saved. */ |
| 697 | |
| 698 | static CORE_ADDR |
| 699 | alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 700 | { |
| 701 | unsigned long inst; |
| 702 | int offset; |
| 703 | CORE_ADDR post_prologue_pc; |
| 704 | gdb_byte buf[ALPHA_INSN_SIZE]; |
| 705 | |
| 706 | /* Silently return the unaltered pc upon memory errors. |
| 707 | This could happen on OSF/1 if decode_line_1 tries to skip the |
| 708 | prologue for quickstarted shared library functions when the |
| 709 | shared library is not yet mapped in. |
| 710 | Reading target memory is slow over serial lines, so we perform |
| 711 | this check only if the target has shared libraries (which all |
| 712 | Alpha targets do). */ |
| 713 | if (target_read_memory (pc, buf, sizeof (buf))) |
| 714 | return pc; |
| 715 | |
| 716 | /* See if we can determine the end of the prologue via the symbol table. |
| 717 | If so, then return either PC, or the PC after the prologue, whichever |
| 718 | is greater. */ |
| 719 | |
| 720 | post_prologue_pc = alpha_after_prologue (pc); |
| 721 | if (post_prologue_pc != 0) |
| 722 | return max (pc, post_prologue_pc); |
| 723 | |
| 724 | /* Can't determine prologue from the symbol table, need to examine |
| 725 | instructions. */ |
| 726 | |
| 727 | /* Skip the typical prologue instructions. These are the stack adjustment |
| 728 | instruction and the instructions that save registers on the stack |
| 729 | or in the gcc frame. */ |
| 730 | for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE) |
| 731 | { |
| 732 | inst = alpha_read_insn (gdbarch, pc + offset); |
| 733 | |
| 734 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
| 735 | continue; |
| 736 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ |
| 737 | continue; |
| 738 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
| 739 | continue; |
| 740 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ |
| 741 | continue; |
| 742 | |
| 743 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
| 744 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ |
| 745 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ |
| 746 | continue; |
| 747 | |
| 748 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
| 749 | continue; |
| 750 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ |
| 751 | continue; |
| 752 | |
| 753 | break; |
| 754 | } |
| 755 | return pc + offset; |
| 756 | } |
| 757 | |
| 758 | \f |
| 759 | /* Figure out where the longjmp will land. |
| 760 | We expect the first arg to be a pointer to the jmp_buf structure from |
| 761 | which we extract the PC (JB_PC) that we will land at. The PC is copied |
| 762 | into the "pc". This routine returns true on success. */ |
| 763 | |
| 764 | static int |
| 765 | alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) |
| 766 | { |
| 767 | struct gdbarch *gdbarch = get_frame_arch (frame); |
| 768 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 769 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 770 | CORE_ADDR jb_addr; |
| 771 | gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; |
| 772 | |
| 773 | jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM); |
| 774 | |
| 775 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
| 776 | raw_buffer, tdep->jb_elt_size)) |
| 777 | return 0; |
| 778 | |
| 779 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order); |
| 780 | return 1; |
| 781 | } |
| 782 | |
| 783 | \f |
| 784 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that |
| 785 | describe the location and shape of the sigcontext structure. After |
| 786 | that, all registers are in memory, so it's easy. */ |
| 787 | /* ??? Shouldn't we be able to do this generically, rather than with |
| 788 | OSABI data specific to Alpha? */ |
| 789 | |
| 790 | struct alpha_sigtramp_unwind_cache |
| 791 | { |
| 792 | CORE_ADDR sigcontext_addr; |
| 793 | }; |
| 794 | |
| 795 | static struct alpha_sigtramp_unwind_cache * |
| 796 | alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
| 797 | void **this_prologue_cache) |
| 798 | { |
| 799 | struct alpha_sigtramp_unwind_cache *info; |
| 800 | struct gdbarch_tdep *tdep; |
| 801 | |
| 802 | if (*this_prologue_cache) |
| 803 | return *this_prologue_cache; |
| 804 | |
| 805 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
| 806 | *this_prologue_cache = info; |
| 807 | |
| 808 | tdep = gdbarch_tdep (get_frame_arch (this_frame)); |
| 809 | info->sigcontext_addr = tdep->sigcontext_addr (this_frame); |
| 810 | |
| 811 | return info; |
| 812 | } |
| 813 | |
| 814 | /* Return the address of REGNUM in a sigtramp frame. Since this is |
| 815 | all arithmetic, it doesn't seem worthwhile to cache it. */ |
| 816 | |
| 817 | static CORE_ADDR |
| 818 | alpha_sigtramp_register_address (struct gdbarch *gdbarch, |
| 819 | CORE_ADDR sigcontext_addr, int regnum) |
| 820 | { |
| 821 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 822 | |
| 823 | if (regnum >= 0 && regnum < 32) |
| 824 | return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; |
| 825 | else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) |
| 826 | return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; |
| 827 | else if (regnum == ALPHA_PC_REGNUM) |
| 828 | return sigcontext_addr + tdep->sc_pc_offset; |
| 829 | |
| 830 | return 0; |
| 831 | } |
| 832 | |
| 833 | /* Given a GDB frame, determine the address of the calling function's |
| 834 | frame. This will be used to create a new GDB frame struct. */ |
| 835 | |
| 836 | static void |
| 837 | alpha_sigtramp_frame_this_id (struct frame_info *this_frame, |
| 838 | void **this_prologue_cache, |
| 839 | struct frame_id *this_id) |
| 840 | { |
| 841 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 842 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 843 | struct alpha_sigtramp_unwind_cache *info |
| 844 | = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
| 845 | CORE_ADDR stack_addr, code_addr; |
| 846 | |
| 847 | /* If the OSABI couldn't locate the sigcontext, give up. */ |
| 848 | if (info->sigcontext_addr == 0) |
| 849 | return; |
| 850 | |
| 851 | /* If we have dynamic signal trampolines, find their start. |
| 852 | If we do not, then we must assume there is a symbol record |
| 853 | that can provide the start address. */ |
| 854 | if (tdep->dynamic_sigtramp_offset) |
| 855 | { |
| 856 | int offset; |
| 857 | code_addr = get_frame_pc (this_frame); |
| 858 | offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr); |
| 859 | if (offset >= 0) |
| 860 | code_addr -= offset; |
| 861 | else |
| 862 | code_addr = 0; |
| 863 | } |
| 864 | else |
| 865 | code_addr = get_frame_func (this_frame); |
| 866 | |
| 867 | /* The stack address is trivially read from the sigcontext. */ |
| 868 | stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr, |
| 869 | ALPHA_SP_REGNUM); |
| 870 | stack_addr = get_frame_memory_unsigned (this_frame, stack_addr, |
| 871 | ALPHA_REGISTER_SIZE); |
| 872 | |
| 873 | *this_id = frame_id_build (stack_addr, code_addr); |
| 874 | } |
| 875 | |
| 876 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
| 877 | |
| 878 | static struct value * |
| 879 | alpha_sigtramp_frame_prev_register (struct frame_info *this_frame, |
| 880 | void **this_prologue_cache, int regnum) |
| 881 | { |
| 882 | struct alpha_sigtramp_unwind_cache *info |
| 883 | = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
| 884 | CORE_ADDR addr; |
| 885 | |
| 886 | if (info->sigcontext_addr != 0) |
| 887 | { |
| 888 | /* All integer and fp registers are stored in memory. */ |
| 889 | addr = alpha_sigtramp_register_address (get_frame_arch (this_frame), |
| 890 | info->sigcontext_addr, regnum); |
| 891 | if (addr != 0) |
| 892 | return frame_unwind_got_memory (this_frame, regnum, addr); |
| 893 | } |
| 894 | |
| 895 | /* This extra register may actually be in the sigcontext, but our |
| 896 | current description of it in alpha_sigtramp_frame_unwind_cache |
| 897 | doesn't include it. Too bad. Fall back on whatever's in the |
| 898 | outer frame. */ |
| 899 | return frame_unwind_got_register (this_frame, regnum, regnum); |
| 900 | } |
| 901 | |
| 902 | static int |
| 903 | alpha_sigtramp_frame_sniffer (const struct frame_unwind *self, |
| 904 | struct frame_info *this_frame, |
| 905 | void **this_prologue_cache) |
| 906 | { |
| 907 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 908 | CORE_ADDR pc = get_frame_pc (this_frame); |
| 909 | char *name; |
| 910 | |
| 911 | /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead |
| 912 | look at tramp-frame.h and other simplier per-architecture |
| 913 | sigtramp unwinders. */ |
| 914 | |
| 915 | /* We shouldn't even bother to try if the OSABI didn't register a |
| 916 | sigcontext_addr handler or pc_in_sigtramp hander. */ |
| 917 | if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL) |
| 918 | return 0; |
| 919 | if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL) |
| 920 | return 0; |
| 921 | |
| 922 | /* Otherwise we should be in a signal frame. */ |
| 923 | find_pc_partial_function (pc, &name, NULL, NULL); |
| 924 | if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name)) |
| 925 | return 1; |
| 926 | |
| 927 | return 0; |
| 928 | } |
| 929 | |
| 930 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { |
| 931 | SIGTRAMP_FRAME, |
| 932 | alpha_sigtramp_frame_this_id, |
| 933 | alpha_sigtramp_frame_prev_register, |
| 934 | NULL, |
| 935 | alpha_sigtramp_frame_sniffer |
| 936 | }; |
| 937 | |
| 938 | \f |
| 939 | |
| 940 | /* Heuristic_proc_start may hunt through the text section for a long |
| 941 | time across a 2400 baud serial line. Allows the user to limit this |
| 942 | search. */ |
| 943 | static unsigned int heuristic_fence_post = 0; |
| 944 | |
| 945 | /* Attempt to locate the start of the function containing PC. We assume that |
| 946 | the previous function ends with an about_to_return insn. Not foolproof by |
| 947 | any means, since gcc is happy to put the epilogue in the middle of a |
| 948 | function. But we're guessing anyway... */ |
| 949 | |
| 950 | static CORE_ADDR |
| 951 | alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 952 | { |
| 953 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 954 | CORE_ADDR last_non_nop = pc; |
| 955 | CORE_ADDR fence = pc - heuristic_fence_post; |
| 956 | CORE_ADDR orig_pc = pc; |
| 957 | CORE_ADDR func; |
| 958 | struct inferior *inf; |
| 959 | |
| 960 | if (pc == 0) |
| 961 | return 0; |
| 962 | |
| 963 | /* First see if we can find the start of the function from minimal |
| 964 | symbol information. This can succeed with a binary that doesn't |
| 965 | have debug info, but hasn't been stripped. */ |
| 966 | func = get_pc_function_start (pc); |
| 967 | if (func) |
| 968 | return func; |
| 969 | |
| 970 | if (heuristic_fence_post == UINT_MAX |
| 971 | || fence < tdep->vm_min_address) |
| 972 | fence = tdep->vm_min_address; |
| 973 | |
| 974 | /* Search back for previous return; also stop at a 0, which might be |
| 975 | seen for instance before the start of a code section. Don't include |
| 976 | nops, since this usually indicates padding between functions. */ |
| 977 | for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE) |
| 978 | { |
| 979 | unsigned int insn = alpha_read_insn (gdbarch, pc); |
| 980 | switch (insn) |
| 981 | { |
| 982 | case 0: /* invalid insn */ |
| 983 | case 0x6bfa8001: /* ret $31,($26),1 */ |
| 984 | return last_non_nop; |
| 985 | |
| 986 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ |
| 987 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ |
| 988 | break; |
| 989 | |
| 990 | default: |
| 991 | last_non_nop = pc; |
| 992 | break; |
| 993 | } |
| 994 | } |
| 995 | |
| 996 | inf = current_inferior (); |
| 997 | |
| 998 | /* It's not clear to me why we reach this point when stopping quietly, |
| 999 | but with this test, at least we don't print out warnings for every |
| 1000 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ |
| 1001 | if (inf->control.stop_soon == NO_STOP_QUIETLY) |
| 1002 | { |
| 1003 | static int blurb_printed = 0; |
| 1004 | |
| 1005 | if (fence == tdep->vm_min_address) |
| 1006 | warning (_("Hit beginning of text section without finding \ |
| 1007 | enclosing function for address %s"), paddress (gdbarch, orig_pc)); |
| 1008 | else |
| 1009 | warning (_("Hit heuristic-fence-post without finding \ |
| 1010 | enclosing function for address %s"), paddress (gdbarch, orig_pc)); |
| 1011 | |
| 1012 | if (!blurb_printed) |
| 1013 | { |
| 1014 | printf_filtered (_("\ |
| 1015 | This warning occurs if you are debugging a function without any symbols\n\ |
| 1016 | (for example, in a stripped executable). In that case, you may wish to\n\ |
| 1017 | increase the size of the search with the `set heuristic-fence-post' command.\n\ |
| 1018 | \n\ |
| 1019 | Otherwise, you told GDB there was a function where there isn't one, or\n\ |
| 1020 | (more likely) you have encountered a bug in GDB.\n")); |
| 1021 | blurb_printed = 1; |
| 1022 | } |
| 1023 | } |
| 1024 | |
| 1025 | return 0; |
| 1026 | } |
| 1027 | |
| 1028 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows |
| 1029 | something about the traditional layout of alpha stack frames. */ |
| 1030 | |
| 1031 | struct alpha_heuristic_unwind_cache |
| 1032 | { |
| 1033 | CORE_ADDR vfp; |
| 1034 | CORE_ADDR start_pc; |
| 1035 | struct trad_frame_saved_reg *saved_regs; |
| 1036 | int return_reg; |
| 1037 | }; |
| 1038 | |
| 1039 | /* If a probing loop sequence starts at PC, simulate it and compute |
| 1040 | FRAME_SIZE and PC after its execution. Otherwise, return with PC and |
| 1041 | FRAME_SIZE unchanged. */ |
| 1042 | |
| 1043 | static void |
| 1044 | alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc, |
| 1045 | int *frame_size) |
| 1046 | { |
| 1047 | CORE_ADDR cur_pc = *pc; |
| 1048 | int cur_frame_size = *frame_size; |
| 1049 | int nb_of_iterations, reg_index, reg_probe; |
| 1050 | unsigned int insn; |
| 1051 | |
| 1052 | /* The following pattern is recognized as a probing loop: |
| 1053 | |
| 1054 | lda REG_INDEX,NB_OF_ITERATIONS |
| 1055 | lda REG_PROBE,<immediate>(sp) |
| 1056 | |
| 1057 | LOOP_START: |
| 1058 | stq zero,<immediate>(REG_PROBE) |
| 1059 | subq REG_INDEX,0x1,REG_INDEX |
| 1060 | lda REG_PROBE,<immediate>(REG_PROBE) |
| 1061 | bne REG_INDEX, LOOP_START |
| 1062 | |
| 1063 | lda sp,<immediate>(REG_PROBE) |
| 1064 | |
| 1065 | If anything different is found, the function returns without |
| 1066 | changing PC and FRAME_SIZE. Otherwise, PC will point immediately |
| 1067 | after this sequence, and FRAME_SIZE will be updated. */ |
| 1068 | |
| 1069 | /* lda REG_INDEX,NB_OF_ITERATIONS */ |
| 1070 | |
| 1071 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1072 | if (INSN_OPCODE (insn) != lda_opcode) |
| 1073 | return; |
| 1074 | reg_index = MEM_RA (insn); |
| 1075 | nb_of_iterations = MEM_DISP (insn); |
| 1076 | |
| 1077 | /* lda REG_PROBE,<immediate>(sp) */ |
| 1078 | |
| 1079 | cur_pc += ALPHA_INSN_SIZE; |
| 1080 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1081 | if (INSN_OPCODE (insn) != lda_opcode |
| 1082 | || MEM_RB (insn) != ALPHA_SP_REGNUM) |
| 1083 | return; |
| 1084 | reg_probe = MEM_RA (insn); |
| 1085 | cur_frame_size -= MEM_DISP (insn); |
| 1086 | |
| 1087 | /* stq zero,<immediate>(REG_PROBE) */ |
| 1088 | |
| 1089 | cur_pc += ALPHA_INSN_SIZE; |
| 1090 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1091 | if (INSN_OPCODE (insn) != stq_opcode |
| 1092 | || MEM_RA (insn) != 0x1f |
| 1093 | || MEM_RB (insn) != reg_probe) |
| 1094 | return; |
| 1095 | |
| 1096 | /* subq REG_INDEX,0x1,REG_INDEX */ |
| 1097 | |
| 1098 | cur_pc += ALPHA_INSN_SIZE; |
| 1099 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1100 | if (INSN_OPCODE (insn) != subq_opcode |
| 1101 | || !OPR_HAS_IMMEDIATE (insn) |
| 1102 | || OPR_FUNCTION (insn) != subq_function |
| 1103 | || OPR_LIT(insn) != 1 |
| 1104 | || OPR_RA (insn) != reg_index |
| 1105 | || OPR_RC (insn) != reg_index) |
| 1106 | return; |
| 1107 | |
| 1108 | /* lda REG_PROBE,<immediate>(REG_PROBE) */ |
| 1109 | |
| 1110 | cur_pc += ALPHA_INSN_SIZE; |
| 1111 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1112 | if (INSN_OPCODE (insn) != lda_opcode |
| 1113 | || MEM_RA (insn) != reg_probe |
| 1114 | || MEM_RB (insn) != reg_probe) |
| 1115 | return; |
| 1116 | cur_frame_size -= MEM_DISP (insn) * nb_of_iterations; |
| 1117 | |
| 1118 | /* bne REG_INDEX, LOOP_START */ |
| 1119 | |
| 1120 | cur_pc += ALPHA_INSN_SIZE; |
| 1121 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1122 | if (INSN_OPCODE (insn) != bne_opcode |
| 1123 | || MEM_RA (insn) != reg_index) |
| 1124 | return; |
| 1125 | |
| 1126 | /* lda sp,<immediate>(REG_PROBE) */ |
| 1127 | |
| 1128 | cur_pc += ALPHA_INSN_SIZE; |
| 1129 | insn = alpha_read_insn (gdbarch, cur_pc); |
| 1130 | if (INSN_OPCODE (insn) != lda_opcode |
| 1131 | || MEM_RA (insn) != ALPHA_SP_REGNUM |
| 1132 | || MEM_RB (insn) != reg_probe) |
| 1133 | return; |
| 1134 | cur_frame_size -= MEM_DISP (insn); |
| 1135 | |
| 1136 | *pc = cur_pc; |
| 1137 | *frame_size = cur_frame_size; |
| 1138 | } |
| 1139 | |
| 1140 | static struct alpha_heuristic_unwind_cache * |
| 1141 | alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame, |
| 1142 | void **this_prologue_cache, |
| 1143 | CORE_ADDR start_pc) |
| 1144 | { |
| 1145 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 1146 | struct alpha_heuristic_unwind_cache *info; |
| 1147 | ULONGEST val; |
| 1148 | CORE_ADDR limit_pc, cur_pc; |
| 1149 | int frame_reg, frame_size, return_reg, reg; |
| 1150 | |
| 1151 | if (*this_prologue_cache) |
| 1152 | return *this_prologue_cache; |
| 1153 | |
| 1154 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
| 1155 | *this_prologue_cache = info; |
| 1156 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
| 1157 | |
| 1158 | limit_pc = get_frame_pc (this_frame); |
| 1159 | if (start_pc == 0) |
| 1160 | start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc); |
| 1161 | info->start_pc = start_pc; |
| 1162 | |
| 1163 | frame_reg = ALPHA_SP_REGNUM; |
| 1164 | frame_size = 0; |
| 1165 | return_reg = -1; |
| 1166 | |
| 1167 | /* If we've identified a likely place to start, do code scanning. */ |
| 1168 | if (start_pc != 0) |
| 1169 | { |
| 1170 | /* Limit the forward search to 50 instructions. */ |
| 1171 | if (start_pc + 200 < limit_pc) |
| 1172 | limit_pc = start_pc + 200; |
| 1173 | |
| 1174 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE) |
| 1175 | { |
| 1176 | unsigned int word = alpha_read_insn (gdbarch, cur_pc); |
| 1177 | |
| 1178 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
| 1179 | { |
| 1180 | if (word & 0x8000) |
| 1181 | { |
| 1182 | /* Consider only the first stack allocation instruction |
| 1183 | to contain the static size of the frame. */ |
| 1184 | if (frame_size == 0) |
| 1185 | frame_size = (-word) & 0xffff; |
| 1186 | } |
| 1187 | else |
| 1188 | { |
| 1189 | /* Exit loop if a positive stack adjustment is found, which |
| 1190 | usually means that the stack cleanup code in the function |
| 1191 | epilogue is reached. */ |
| 1192 | break; |
| 1193 | } |
| 1194 | } |
| 1195 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
| 1196 | { |
| 1197 | reg = (word & 0x03e00000) >> 21; |
| 1198 | |
| 1199 | /* Ignore this instruction if we have already encountered |
| 1200 | an instruction saving the same register earlier in the |
| 1201 | function code. The current instruction does not tell |
| 1202 | us where the original value upon function entry is saved. |
| 1203 | All it says is that the function we are scanning reused |
| 1204 | that register for some computation of its own, and is now |
| 1205 | saving its result. */ |
| 1206 | if (trad_frame_addr_p(info->saved_regs, reg)) |
| 1207 | continue; |
| 1208 | |
| 1209 | if (reg == 31) |
| 1210 | continue; |
| 1211 | |
| 1212 | /* Do not compute the address where the register was saved yet, |
| 1213 | because we don't know yet if the offset will need to be |
| 1214 | relative to $sp or $fp (we can not compute the address |
| 1215 | relative to $sp if $sp is updated during the execution of |
| 1216 | the current subroutine, for instance when doing some alloca). |
| 1217 | So just store the offset for the moment, and compute the |
| 1218 | address later when we know whether this frame has a frame |
| 1219 | pointer or not. */ |
| 1220 | /* Hack: temporarily add one, so that the offset is non-zero |
| 1221 | and we can tell which registers have save offsets below. */ |
| 1222 | info->saved_regs[reg].addr = (word & 0xffff) + 1; |
| 1223 | |
| 1224 | /* Starting with OSF/1-3.2C, the system libraries are shipped |
| 1225 | without local symbols, but they still contain procedure |
| 1226 | descriptors without a symbol reference. GDB is currently |
| 1227 | unable to find these procedure descriptors and uses |
| 1228 | heuristic_proc_desc instead. |
| 1229 | As some low level compiler support routines (__div*, __add*) |
| 1230 | use a non-standard return address register, we have to |
| 1231 | add some heuristics to determine the return address register, |
| 1232 | or stepping over these routines will fail. |
| 1233 | Usually the return address register is the first register |
| 1234 | saved on the stack, but assembler optimization might |
| 1235 | rearrange the register saves. |
| 1236 | So we recognize only a few registers (t7, t9, ra) within |
| 1237 | the procedure prologue as valid return address registers. |
| 1238 | If we encounter a return instruction, we extract the |
| 1239 | the return address register from it. |
| 1240 | |
| 1241 | FIXME: Rewriting GDB to access the procedure descriptors, |
| 1242 | e.g. via the minimal symbol table, might obviate this |
| 1243 | hack. */ |
| 1244 | if (return_reg == -1 |
| 1245 | && cur_pc < (start_pc + 80) |
| 1246 | && (reg == ALPHA_T7_REGNUM |
| 1247 | || reg == ALPHA_T9_REGNUM |
| 1248 | || reg == ALPHA_RA_REGNUM)) |
| 1249 | return_reg = reg; |
| 1250 | } |
| 1251 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ |
| 1252 | return_reg = (word >> 16) & 0x1f; |
| 1253 | else if (word == 0x47de040f) /* bis sp,sp,fp */ |
| 1254 | frame_reg = ALPHA_GCC_FP_REGNUM; |
| 1255 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ |
| 1256 | frame_reg = ALPHA_GCC_FP_REGNUM; |
| 1257 | |
| 1258 | alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size); |
| 1259 | } |
| 1260 | |
| 1261 | /* If we haven't found a valid return address register yet, keep |
| 1262 | searching in the procedure prologue. */ |
| 1263 | if (return_reg == -1) |
| 1264 | { |
| 1265 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) |
| 1266 | { |
| 1267 | unsigned int word = alpha_read_insn (gdbarch, cur_pc); |
| 1268 | |
| 1269 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
| 1270 | { |
| 1271 | reg = (word & 0x03e00000) >> 21; |
| 1272 | if (reg == ALPHA_T7_REGNUM |
| 1273 | || reg == ALPHA_T9_REGNUM |
| 1274 | || reg == ALPHA_RA_REGNUM) |
| 1275 | { |
| 1276 | return_reg = reg; |
| 1277 | break; |
| 1278 | } |
| 1279 | } |
| 1280 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ |
| 1281 | { |
| 1282 | return_reg = (word >> 16) & 0x1f; |
| 1283 | break; |
| 1284 | } |
| 1285 | |
| 1286 | cur_pc += ALPHA_INSN_SIZE; |
| 1287 | } |
| 1288 | } |
| 1289 | } |
| 1290 | |
| 1291 | /* Failing that, do default to the customary RA. */ |
| 1292 | if (return_reg == -1) |
| 1293 | return_reg = ALPHA_RA_REGNUM; |
| 1294 | info->return_reg = return_reg; |
| 1295 | |
| 1296 | val = get_frame_register_unsigned (this_frame, frame_reg); |
| 1297 | info->vfp = val + frame_size; |
| 1298 | |
| 1299 | /* Convert offsets to absolute addresses. See above about adding |
| 1300 | one to the offsets to make all detected offsets non-zero. */ |
| 1301 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) |
| 1302 | if (trad_frame_addr_p(info->saved_regs, reg)) |
| 1303 | info->saved_regs[reg].addr += val - 1; |
| 1304 | |
| 1305 | /* The stack pointer of the previous frame is computed by popping |
| 1306 | the current stack frame. */ |
| 1307 | if (!trad_frame_addr_p (info->saved_regs, ALPHA_SP_REGNUM)) |
| 1308 | trad_frame_set_value (info->saved_regs, ALPHA_SP_REGNUM, info->vfp); |
| 1309 | |
| 1310 | return info; |
| 1311 | } |
| 1312 | |
| 1313 | /* Given a GDB frame, determine the address of the calling function's |
| 1314 | frame. This will be used to create a new GDB frame struct. */ |
| 1315 | |
| 1316 | static void |
| 1317 | alpha_heuristic_frame_this_id (struct frame_info *this_frame, |
| 1318 | void **this_prologue_cache, |
| 1319 | struct frame_id *this_id) |
| 1320 | { |
| 1321 | struct alpha_heuristic_unwind_cache *info |
| 1322 | = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); |
| 1323 | |
| 1324 | *this_id = frame_id_build (info->vfp, info->start_pc); |
| 1325 | } |
| 1326 | |
| 1327 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
| 1328 | |
| 1329 | static struct value * |
| 1330 | alpha_heuristic_frame_prev_register (struct frame_info *this_frame, |
| 1331 | void **this_prologue_cache, int regnum) |
| 1332 | { |
| 1333 | struct alpha_heuristic_unwind_cache *info |
| 1334 | = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); |
| 1335 | |
| 1336 | /* The PC of the previous frame is stored in the link register of |
| 1337 | the current frame. Frob regnum so that we pull the value from |
| 1338 | the correct place. */ |
| 1339 | if (regnum == ALPHA_PC_REGNUM) |
| 1340 | regnum = info->return_reg; |
| 1341 | |
| 1342 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); |
| 1343 | } |
| 1344 | |
| 1345 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
| 1346 | NORMAL_FRAME, |
| 1347 | alpha_heuristic_frame_this_id, |
| 1348 | alpha_heuristic_frame_prev_register, |
| 1349 | NULL, |
| 1350 | default_frame_sniffer |
| 1351 | }; |
| 1352 | |
| 1353 | static CORE_ADDR |
| 1354 | alpha_heuristic_frame_base_address (struct frame_info *this_frame, |
| 1355 | void **this_prologue_cache) |
| 1356 | { |
| 1357 | struct alpha_heuristic_unwind_cache *info |
| 1358 | = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0); |
| 1359 | |
| 1360 | return info->vfp; |
| 1361 | } |
| 1362 | |
| 1363 | static const struct frame_base alpha_heuristic_frame_base = { |
| 1364 | &alpha_heuristic_frame_unwind, |
| 1365 | alpha_heuristic_frame_base_address, |
| 1366 | alpha_heuristic_frame_base_address, |
| 1367 | alpha_heuristic_frame_base_address |
| 1368 | }; |
| 1369 | |
| 1370 | /* Just like reinit_frame_cache, but with the right arguments to be |
| 1371 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
| 1372 | |
| 1373 | static void |
| 1374 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
| 1375 | { |
| 1376 | reinit_frame_cache (); |
| 1377 | } |
| 1378 | |
| 1379 | \f |
| 1380 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
| 1381 | dummy frame. The frame ID's base needs to match the TOS value |
| 1382 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's |
| 1383 | breakpoint. */ |
| 1384 | |
| 1385 | static struct frame_id |
| 1386 | alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
| 1387 | { |
| 1388 | ULONGEST base; |
| 1389 | base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM); |
| 1390 | return frame_id_build (base, get_frame_pc (this_frame)); |
| 1391 | } |
| 1392 | |
| 1393 | static CORE_ADDR |
| 1394 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 1395 | { |
| 1396 | ULONGEST pc; |
| 1397 | pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM); |
| 1398 | return pc; |
| 1399 | } |
| 1400 | |
| 1401 | \f |
| 1402 | /* Helper routines for alpha*-nat.c files to move register sets to and |
| 1403 | from core files. The UNIQUE pointer is allowed to be NULL, as most |
| 1404 | targets don't supply this value in their core files. */ |
| 1405 | |
| 1406 | void |
| 1407 | alpha_supply_int_regs (struct regcache *regcache, int regno, |
| 1408 | const void *r0_r30, const void *pc, const void *unique) |
| 1409 | { |
| 1410 | const gdb_byte *regs = r0_r30; |
| 1411 | int i; |
| 1412 | |
| 1413 | for (i = 0; i < 31; ++i) |
| 1414 | if (regno == i || regno == -1) |
| 1415 | regcache_raw_supply (regcache, i, regs + i * 8); |
| 1416 | |
| 1417 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) |
| 1418 | regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL); |
| 1419 | |
| 1420 | if (regno == ALPHA_PC_REGNUM || regno == -1) |
| 1421 | regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc); |
| 1422 | |
| 1423 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) |
| 1424 | regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique); |
| 1425 | } |
| 1426 | |
| 1427 | void |
| 1428 | alpha_fill_int_regs (const struct regcache *regcache, |
| 1429 | int regno, void *r0_r30, void *pc, void *unique) |
| 1430 | { |
| 1431 | gdb_byte *regs = r0_r30; |
| 1432 | int i; |
| 1433 | |
| 1434 | for (i = 0; i < 31; ++i) |
| 1435 | if (regno == i || regno == -1) |
| 1436 | regcache_raw_collect (regcache, i, regs + i * 8); |
| 1437 | |
| 1438 | if (regno == ALPHA_PC_REGNUM || regno == -1) |
| 1439 | regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc); |
| 1440 | |
| 1441 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) |
| 1442 | regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique); |
| 1443 | } |
| 1444 | |
| 1445 | void |
| 1446 | alpha_supply_fp_regs (struct regcache *regcache, int regno, |
| 1447 | const void *f0_f30, const void *fpcr) |
| 1448 | { |
| 1449 | const gdb_byte *regs = f0_f30; |
| 1450 | int i; |
| 1451 | |
| 1452 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) |
| 1453 | if (regno == i || regno == -1) |
| 1454 | regcache_raw_supply (regcache, i, |
| 1455 | regs + (i - ALPHA_FP0_REGNUM) * 8); |
| 1456 | |
| 1457 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) |
| 1458 | regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr); |
| 1459 | } |
| 1460 | |
| 1461 | void |
| 1462 | alpha_fill_fp_regs (const struct regcache *regcache, |
| 1463 | int regno, void *f0_f30, void *fpcr) |
| 1464 | { |
| 1465 | gdb_byte *regs = f0_f30; |
| 1466 | int i; |
| 1467 | |
| 1468 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) |
| 1469 | if (regno == i || regno == -1) |
| 1470 | regcache_raw_collect (regcache, i, |
| 1471 | regs + (i - ALPHA_FP0_REGNUM) * 8); |
| 1472 | |
| 1473 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) |
| 1474 | regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr); |
| 1475 | } |
| 1476 | |
| 1477 | \f |
| 1478 | |
| 1479 | /* Return nonzero if the G_floating register value in REG is equal to |
| 1480 | zero for FP control instructions. */ |
| 1481 | |
| 1482 | static int |
| 1483 | fp_register_zero_p (LONGEST reg) |
| 1484 | { |
| 1485 | /* Check that all bits except the sign bit are zero. */ |
| 1486 | const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1; |
| 1487 | |
| 1488 | return ((reg & zero_mask) == 0); |
| 1489 | } |
| 1490 | |
| 1491 | /* Return the value of the sign bit for the G_floating register |
| 1492 | value held in REG. */ |
| 1493 | |
| 1494 | static int |
| 1495 | fp_register_sign_bit (LONGEST reg) |
| 1496 | { |
| 1497 | const LONGEST sign_mask = (LONGEST) 1 << 63; |
| 1498 | |
| 1499 | return ((reg & sign_mask) != 0); |
| 1500 | } |
| 1501 | |
| 1502 | /* alpha_software_single_step() is called just before we want to resume |
| 1503 | the inferior, if we want to single-step it but there is no hardware |
| 1504 | or kernel single-step support (NetBSD on Alpha, for example). We find |
| 1505 | the target of the coming instruction and breakpoint it. */ |
| 1506 | |
| 1507 | static CORE_ADDR |
| 1508 | alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) |
| 1509 | { |
| 1510 | struct gdbarch *gdbarch = get_frame_arch (frame); |
| 1511 | unsigned int insn; |
| 1512 | unsigned int op; |
| 1513 | int regno; |
| 1514 | int offset; |
| 1515 | LONGEST rav; |
| 1516 | |
| 1517 | insn = alpha_read_insn (gdbarch, pc); |
| 1518 | |
| 1519 | /* Opcode is top 6 bits. */ |
| 1520 | op = (insn >> 26) & 0x3f; |
| 1521 | |
| 1522 | if (op == 0x1a) |
| 1523 | { |
| 1524 | /* Jump format: target PC is: |
| 1525 | RB & ~3 */ |
| 1526 | return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3); |
| 1527 | } |
| 1528 | |
| 1529 | if ((op & 0x30) == 0x30) |
| 1530 | { |
| 1531 | /* Branch format: target PC is: |
| 1532 | (new PC) + (4 * sext(displacement)) */ |
| 1533 | if (op == 0x30 /* BR */ |
| 1534 | || op == 0x34) /* BSR */ |
| 1535 | { |
| 1536 | branch_taken: |
| 1537 | offset = (insn & 0x001fffff); |
| 1538 | if (offset & 0x00100000) |
| 1539 | offset |= 0xffe00000; |
| 1540 | offset *= ALPHA_INSN_SIZE; |
| 1541 | return (pc + ALPHA_INSN_SIZE + offset); |
| 1542 | } |
| 1543 | |
| 1544 | /* Need to determine if branch is taken; read RA. */ |
| 1545 | regno = (insn >> 21) & 0x1f; |
| 1546 | switch (op) |
| 1547 | { |
| 1548 | case 0x31: /* FBEQ */ |
| 1549 | case 0x36: /* FBGE */ |
| 1550 | case 0x37: /* FBGT */ |
| 1551 | case 0x33: /* FBLE */ |
| 1552 | case 0x32: /* FBLT */ |
| 1553 | case 0x35: /* FBNE */ |
| 1554 | regno += gdbarch_fp0_regnum (gdbarch); |
| 1555 | } |
| 1556 | |
| 1557 | rav = get_frame_register_signed (frame, regno); |
| 1558 | |
| 1559 | switch (op) |
| 1560 | { |
| 1561 | case 0x38: /* BLBC */ |
| 1562 | if ((rav & 1) == 0) |
| 1563 | goto branch_taken; |
| 1564 | break; |
| 1565 | case 0x3c: /* BLBS */ |
| 1566 | if (rav & 1) |
| 1567 | goto branch_taken; |
| 1568 | break; |
| 1569 | case 0x39: /* BEQ */ |
| 1570 | if (rav == 0) |
| 1571 | goto branch_taken; |
| 1572 | break; |
| 1573 | case 0x3d: /* BNE */ |
| 1574 | if (rav != 0) |
| 1575 | goto branch_taken; |
| 1576 | break; |
| 1577 | case 0x3a: /* BLT */ |
| 1578 | if (rav < 0) |
| 1579 | goto branch_taken; |
| 1580 | break; |
| 1581 | case 0x3b: /* BLE */ |
| 1582 | if (rav <= 0) |
| 1583 | goto branch_taken; |
| 1584 | break; |
| 1585 | case 0x3f: /* BGT */ |
| 1586 | if (rav > 0) |
| 1587 | goto branch_taken; |
| 1588 | break; |
| 1589 | case 0x3e: /* BGE */ |
| 1590 | if (rav >= 0) |
| 1591 | goto branch_taken; |
| 1592 | break; |
| 1593 | |
| 1594 | /* Floating point branches. */ |
| 1595 | |
| 1596 | case 0x31: /* FBEQ */ |
| 1597 | if (fp_register_zero_p (rav)) |
| 1598 | goto branch_taken; |
| 1599 | break; |
| 1600 | case 0x36: /* FBGE */ |
| 1601 | if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav)) |
| 1602 | goto branch_taken; |
| 1603 | break; |
| 1604 | case 0x37: /* FBGT */ |
| 1605 | if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav)) |
| 1606 | goto branch_taken; |
| 1607 | break; |
| 1608 | case 0x33: /* FBLE */ |
| 1609 | if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav)) |
| 1610 | goto branch_taken; |
| 1611 | break; |
| 1612 | case 0x32: /* FBLT */ |
| 1613 | if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav)) |
| 1614 | goto branch_taken; |
| 1615 | break; |
| 1616 | case 0x35: /* FBNE */ |
| 1617 | if (! fp_register_zero_p (rav)) |
| 1618 | goto branch_taken; |
| 1619 | break; |
| 1620 | } |
| 1621 | } |
| 1622 | |
| 1623 | /* Not a branch or branch not taken; target PC is: |
| 1624 | pc + 4 */ |
| 1625 | return (pc + ALPHA_INSN_SIZE); |
| 1626 | } |
| 1627 | |
| 1628 | int |
| 1629 | alpha_software_single_step (struct frame_info *frame) |
| 1630 | { |
| 1631 | struct gdbarch *gdbarch = get_frame_arch (frame); |
| 1632 | struct address_space *aspace = get_frame_address_space (frame); |
| 1633 | CORE_ADDR pc, next_pc; |
| 1634 | |
| 1635 | pc = get_frame_pc (frame); |
| 1636 | next_pc = alpha_next_pc (frame, pc); |
| 1637 | |
| 1638 | insert_single_step_breakpoint (gdbarch, aspace, next_pc); |
| 1639 | return 1; |
| 1640 | } |
| 1641 | |
| 1642 | \f |
| 1643 | /* Initialize the current architecture based on INFO. If possible, re-use an |
| 1644 | architecture from ARCHES, which is a list of architectures already created |
| 1645 | during this debugging session. |
| 1646 | |
| 1647 | Called e.g. at program startup, when reading a core file, and when reading |
| 1648 | a binary file. */ |
| 1649 | |
| 1650 | static struct gdbarch * |
| 1651 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 1652 | { |
| 1653 | struct gdbarch_tdep *tdep; |
| 1654 | struct gdbarch *gdbarch; |
| 1655 | |
| 1656 | /* Try to determine the ABI of the object we are loading. */ |
| 1657 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
| 1658 | { |
| 1659 | /* If it's an ECOFF file, assume it's OSF/1. */ |
| 1660 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) |
| 1661 | info.osabi = GDB_OSABI_OSF1; |
| 1662 | } |
| 1663 | |
| 1664 | /* Find a candidate among extant architectures. */ |
| 1665 | arches = gdbarch_list_lookup_by_info (arches, &info); |
| 1666 | if (arches != NULL) |
| 1667 | return arches->gdbarch; |
| 1668 | |
| 1669 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); |
| 1670 | gdbarch = gdbarch_alloc (&info, tdep); |
| 1671 | |
| 1672 | /* Lowest text address. This is used by heuristic_proc_start() |
| 1673 | to decide when to stop looking. */ |
| 1674 | tdep->vm_min_address = (CORE_ADDR) 0x120000000LL; |
| 1675 | |
| 1676 | tdep->dynamic_sigtramp_offset = NULL; |
| 1677 | tdep->sigcontext_addr = NULL; |
| 1678 | tdep->sc_pc_offset = 2 * 8; |
| 1679 | tdep->sc_regs_offset = 4 * 8; |
| 1680 | tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; |
| 1681 | |
| 1682 | tdep->jb_pc = -1; /* longjmp support not enabled by default. */ |
| 1683 | |
| 1684 | tdep->return_in_memory = alpha_return_in_memory_always; |
| 1685 | |
| 1686 | /* Type sizes */ |
| 1687 | set_gdbarch_short_bit (gdbarch, 16); |
| 1688 | set_gdbarch_int_bit (gdbarch, 32); |
| 1689 | set_gdbarch_long_bit (gdbarch, 64); |
| 1690 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 1691 | set_gdbarch_float_bit (gdbarch, 32); |
| 1692 | set_gdbarch_double_bit (gdbarch, 64); |
| 1693 | set_gdbarch_long_double_bit (gdbarch, 64); |
| 1694 | set_gdbarch_ptr_bit (gdbarch, 64); |
| 1695 | |
| 1696 | /* Register info */ |
| 1697 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); |
| 1698 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); |
| 1699 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
| 1700 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); |
| 1701 | |
| 1702 | set_gdbarch_register_name (gdbarch, alpha_register_name); |
| 1703 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
| 1704 | |
| 1705 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); |
| 1706 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); |
| 1707 | |
| 1708 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
| 1709 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); |
| 1710 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); |
| 1711 | |
| 1712 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
| 1713 | |
| 1714 | /* Prologue heuristics. */ |
| 1715 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
| 1716 | |
| 1717 | /* Disassembler. */ |
| 1718 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); |
| 1719 | |
| 1720 | /* Call info. */ |
| 1721 | |
| 1722 | set_gdbarch_return_value (gdbarch, alpha_return_value); |
| 1723 | |
| 1724 | /* Settings for calling functions in the inferior. */ |
| 1725 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
| 1726 | |
| 1727 | /* Methods for saving / extracting a dummy frame's ID. */ |
| 1728 | set_gdbarch_dummy_id (gdbarch, alpha_dummy_id); |
| 1729 | |
| 1730 | /* Return the unwound PC value. */ |
| 1731 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); |
| 1732 | |
| 1733 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1734 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
| 1735 | |
| 1736 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
| 1737 | set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE); |
| 1738 | set_gdbarch_cannot_step_breakpoint (gdbarch, 1); |
| 1739 | |
| 1740 | /* Hook in ABI-specific overrides, if they have been registered. */ |
| 1741 | gdbarch_init_osabi (info, gdbarch); |
| 1742 | |
| 1743 | /* Now that we have tuned the configuration, set a few final things |
| 1744 | based on what the OS ABI has told us. */ |
| 1745 | |
| 1746 | if (tdep->jb_pc >= 0) |
| 1747 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); |
| 1748 | |
| 1749 | frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind); |
| 1750 | frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind); |
| 1751 | |
| 1752 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
| 1753 | |
| 1754 | return gdbarch; |
| 1755 | } |
| 1756 | |
| 1757 | void |
| 1758 | alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
| 1759 | { |
| 1760 | dwarf2_append_unwinders (gdbarch); |
| 1761 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
| 1762 | } |
| 1763 | |
| 1764 | extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ |
| 1765 | |
| 1766 | void |
| 1767 | _initialize_alpha_tdep (void) |
| 1768 | { |
| 1769 | struct cmd_list_element *c; |
| 1770 | |
| 1771 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
| 1772 | |
| 1773 | /* Let the user set the fence post for heuristic_proc_start. */ |
| 1774 | |
| 1775 | /* We really would like to have both "0" and "unlimited" work, but |
| 1776 | command.c doesn't deal with that. So make it a var_zinteger |
| 1777 | because the user can always use "999999" or some such for unlimited. */ |
| 1778 | /* We need to throw away the frame cache when we set this, since it |
| 1779 | might change our ability to get backtraces. */ |
| 1780 | add_setshow_zinteger_cmd ("heuristic-fence-post", class_support, |
| 1781 | &heuristic_fence_post, _("\ |
| 1782 | Set the distance searched for the start of a function."), _("\ |
| 1783 | Show the distance searched for the start of a function."), _("\ |
| 1784 | If you are debugging a stripped executable, GDB needs to search through the\n\ |
| 1785 | program for the start of a function. This command sets the distance of the\n\ |
| 1786 | search. The only need to set it is when debugging a stripped executable."), |
| 1787 | reinit_frame_cache_sfunc, |
| 1788 | NULL, /* FIXME: i18n: The distance searched for |
| 1789 | the start of a function is \"%d\". */ |
| 1790 | &setlist, &showlist); |
| 1791 | } |