| 1 | /* Target-dependent definitions for AMD64. |
| 2 | |
| 3 | Copyright (C) 2001, 2003-2004, 2007-2012 Free Software Foundation, |
| 4 | Inc. |
| 5 | Contributed by Jiri Smid, SuSE Labs. |
| 6 | |
| 7 | This file is part of GDB. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 21 | |
| 22 | #ifndef AMD64_TDEP_H |
| 23 | #define AMD64_TDEP_H |
| 24 | |
| 25 | struct gdbarch; |
| 26 | struct frame_info; |
| 27 | struct regcache; |
| 28 | |
| 29 | #include "i386-tdep.h" |
| 30 | |
| 31 | /* Register numbers of various important registers. */ |
| 32 | |
| 33 | enum amd64_regnum |
| 34 | { |
| 35 | AMD64_RAX_REGNUM, /* %rax */ |
| 36 | AMD64_RBX_REGNUM, /* %rbx */ |
| 37 | AMD64_RCX_REGNUM, /* %rcx */ |
| 38 | AMD64_RDX_REGNUM, /* %rdx */ |
| 39 | AMD64_RSI_REGNUM, /* %rsi */ |
| 40 | AMD64_RDI_REGNUM, /* %rdi */ |
| 41 | AMD64_RBP_REGNUM, /* %rbp */ |
| 42 | AMD64_RSP_REGNUM, /* %rsp */ |
| 43 | AMD64_R8_REGNUM, /* %r8 */ |
| 44 | AMD64_R9_REGNUM, /* %r9 */ |
| 45 | AMD64_R10_REGNUM, /* %r10 */ |
| 46 | AMD64_R11_REGNUM, /* %r11 */ |
| 47 | AMD64_R12_REGNUM, /* %r12 */ |
| 48 | AMD64_R13_REGNUM, /* %r13 */ |
| 49 | AMD64_R14_REGNUM, /* %r14 */ |
| 50 | AMD64_R15_REGNUM, /* %r15 */ |
| 51 | AMD64_RIP_REGNUM, /* %rip */ |
| 52 | AMD64_EFLAGS_REGNUM, /* %eflags */ |
| 53 | AMD64_CS_REGNUM, /* %cs */ |
| 54 | AMD64_SS_REGNUM, /* %ss */ |
| 55 | AMD64_DS_REGNUM, /* %ds */ |
| 56 | AMD64_ES_REGNUM, /* %es */ |
| 57 | AMD64_FS_REGNUM, /* %fs */ |
| 58 | AMD64_GS_REGNUM, /* %gs */ |
| 59 | AMD64_ST0_REGNUM = 24, /* %st0 */ |
| 60 | AMD64_ST1_REGNUM, /* %st1 */ |
| 61 | AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8, |
| 62 | AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9, |
| 63 | AMD64_FTAG_REGNUM = AMD64_ST0_REGNUM + 10, |
| 64 | AMD64_XMM0_REGNUM = 40, /* %xmm0 */ |
| 65 | AMD64_XMM1_REGNUM, /* %xmm1 */ |
| 66 | AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16, |
| 67 | AMD64_YMM0H_REGNUM, /* %ymm0h */ |
| 68 | AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15 |
| 69 | }; |
| 70 | |
| 71 | /* Number of general purpose registers. */ |
| 72 | #define AMD64_NUM_GREGS 24 |
| 73 | |
| 74 | #define AMD64_NUM_REGS (AMD64_YMM15H_REGNUM + 1) |
| 75 | |
| 76 | extern struct displaced_step_closure *amd64_displaced_step_copy_insn |
| 77 | (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, |
| 78 | struct regcache *regs); |
| 79 | extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch, |
| 80 | struct displaced_step_closure *closure, |
| 81 | CORE_ADDR from, CORE_ADDR to, |
| 82 | struct regcache *regs); |
| 83 | |
| 84 | extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch); |
| 85 | extern void amd64_x32_init_abi (struct gdbarch_info info, |
| 86 | struct gdbarch *gdbarch); |
| 87 | |
| 88 | /* Fill register REGNUM in REGCACHE with the appropriate |
| 89 | floating-point or SSE register value from *FXSAVE. If REGNUM is |
| 90 | -1, do this for all registers. This function masks off any of the |
| 91 | reserved bits in *FXSAVE. */ |
| 92 | |
| 93 | extern void amd64_supply_fxsave (struct regcache *regcache, int regnum, |
| 94 | const void *fxsave); |
| 95 | |
| 96 | /* Similar to amd64_supply_fxsave, but use XSAVE extended state. */ |
| 97 | extern void amd64_supply_xsave (struct regcache *regcache, int regnum, |
| 98 | const void *xsave); |
| 99 | |
| 100 | /* Fill register REGNUM (if it is a floating-point or SSE register) in |
| 101 | *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for |
| 102 | all registers. This function doesn't touch any of the reserved |
| 103 | bits in *FXSAVE. */ |
| 104 | |
| 105 | extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum, |
| 106 | void *fxsave); |
| 107 | |
| 108 | /* Similar to amd64_collect_fxsave, but use XSAVE extended state. */ |
| 109 | extern void amd64_collect_xsave (const struct regcache *regcache, |
| 110 | int regnum, void *xsave, int gcore); |
| 111 | |
| 112 | void amd64_classify (struct type *type, enum amd64_reg_class class[2]); |
| 113 | |
| 114 | \f |
| 115 | |
| 116 | /* Variables exported from amd64-linux-tdep.c. */ |
| 117 | extern int amd64_linux_gregset_reg_offset[]; |
| 118 | |
| 119 | /* Variables exported from amd64nbsd-tdep.c. */ |
| 120 | extern int amd64nbsd_r_reg_offset[]; |
| 121 | |
| 122 | /* Variables exported from amd64obsd-tdep.c. */ |
| 123 | extern int amd64obsd_r_reg_offset[]; |
| 124 | |
| 125 | /* Variables exported from amd64fbsd-tdep.c. */ |
| 126 | extern CORE_ADDR amd64fbsd_sigtramp_start_addr; |
| 127 | extern CORE_ADDR amd64fbsd_sigtramp_end_addr; |
| 128 | extern int amd64fbsd_sc_reg_offset[]; |
| 129 | |
| 130 | #endif /* amd64-tdep.h */ |